1 /******************************************************************************* 2 SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 4 Copyright (c) 2006-2013, Myricom Inc. 5 All rights reserved. 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, 11 this list of conditions and the following disclaimer. 12 13 2. Neither the name of the Myricom Inc, nor the names of its 14 contributors may be used to endorse or promote products derived from 15 this software without specific prior written permission. 16 17 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 21 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 POSSIBILITY OF SUCH DAMAGE. 28 29 $FreeBSD$ 30 31 ***************************************************************************/ 32 33 #define MXGE_ETH_STOPPED 0 34 #define MXGE_ETH_STOPPING 1 35 #define MXGE_ETH_STARTING 2 36 #define MXGE_ETH_RUNNING 3 37 #define MXGE_ETH_OPEN_FAILED 4 38 39 #define MXGE_FW_OFFSET 1024*1024 40 #define MXGE_EEPROM_STRINGS_SIZE 256 41 #define MXGE_MAX_SEND_DESC 128 42 43 #ifndef VLAN_CAPABILITIES 44 #define VLAN_CAPABILITIES(ifp) 45 #define mxge_vlans_active(sc) (sc)->ifp->if_nvlans 46 #else 47 #define mxge_vlans_active(sc) if_getvlantrunk((sc)->ifp) 48 #endif 49 50 #ifndef VLAN_TAG_VALUE 51 #define MXGE_NEW_VLAN_API 52 #endif 53 54 #ifndef IFCAP_LRO 55 #define IFCAP_LRO 0 56 #endif 57 58 #ifndef IFCAP_TSO 59 #define IFCAP_TSO 0 60 #endif 61 62 #ifndef IFCAP_TSO4 63 #define IFCAP_TSO4 0 64 #endif 65 66 #ifndef IFCAP_TSO6 67 #define IFCAP_TSO6 0 68 #endif 69 70 #ifndef IFCAP_TXCSUM_IPV6 71 #define IFCAP_TXCSUM_IPV6 0 72 #endif 73 74 #ifndef IFCAP_RXCSUM_IPV6 75 #define IFCAP_RXCSUM_IPV6 0 76 #endif 77 78 #ifndef CSUM_TSO 79 #define CSUM_TSO 0 80 #endif 81 82 #ifndef CSUM_TCP_IPV6 83 #define CSUM_TCP_IPV6 0 84 #endif 85 86 #ifndef CSUM_UDP_IPV6 87 #define CSUM_UDP_IPV6 0 88 #endif 89 90 #ifndef CSUM_DELAY_DATA_IPV6 91 #define CSUM_DELAY_DATA_IPV6 0 92 #endif 93 94 typedef struct { 95 void *addr; 96 bus_addr_t bus_addr; 97 bus_dma_tag_t dmat; 98 bus_dmamap_t map; 99 } mxge_dma_t; 100 101 typedef struct { 102 mcp_slot_t *entry; 103 mxge_dma_t dma; 104 int cnt; 105 int idx; 106 int mask; 107 } mxge_rx_done_t; 108 109 typedef struct 110 { 111 uint32_t data0; 112 uint32_t data1; 113 uint32_t data2; 114 } mxge_cmd_t; 115 116 struct mxge_rx_buffer_state { 117 struct mbuf *m; 118 bus_dmamap_t map; 119 }; 120 121 struct mxge_tx_buffer_state { 122 struct mbuf *m; 123 bus_dmamap_t map; 124 int flag; 125 }; 126 127 typedef struct 128 { 129 volatile mcp_kreq_ether_recv_t *lanai; /* lanai ptr for recv ring */ 130 mcp_kreq_ether_recv_t *shadow; /* host shadow of recv ring */ 131 struct mxge_rx_buffer_state *info; 132 bus_dma_tag_t dmat; 133 bus_dmamap_t extra_map; 134 int cnt; 135 int nbufs; 136 int cl_size; 137 int alloc_fail; 138 int mask; /* number of rx slots -1 */ 139 int mlen; 140 } mxge_rx_ring_t; 141 142 typedef struct 143 { 144 struct mtx mtx; 145 struct buf_ring *br; 146 volatile mcp_kreq_ether_send_t *lanai; /* lanai ptr for sendq */ 147 volatile uint32_t *send_go; /* doorbell for sendq */ 148 volatile uint32_t *send_stop; /* doorbell for sendq */ 149 mcp_kreq_ether_send_t *req_list; /* host shadow of sendq */ 150 char *req_bytes; 151 bus_dma_segment_t *seg_list; 152 struct mxge_tx_buffer_state *info; 153 bus_dma_tag_t dmat; 154 int req; /* transmits submitted */ 155 int mask; /* number of transmit slots -1 */ 156 int done; /* transmits completed */ 157 int pkt_done; /* packets completed */ 158 int max_desc; /* max descriptors per xmit */ 159 int queue_active; /* fw currently polling this queue*/ 160 int activate; 161 int deactivate; 162 int stall; /* #times hw queue exhausted */ 163 int wake; /* #times irq re-enabled xmit */ 164 int watchdog_req; /* cache of req */ 165 int watchdog_done; /* cache of done */ 166 int watchdog_rx_pause; /* cache of pause rq recvd */ 167 int defrag; 168 char mtx_name[16]; 169 } mxge_tx_ring_t; 170 171 struct mxge_softc; 172 typedef struct mxge_softc mxge_softc_t; 173 174 struct mxge_slice_state { 175 mxge_softc_t *sc; 176 mxge_tx_ring_t tx; /* transmit ring */ 177 mxge_rx_ring_t rx_small; 178 mxge_rx_ring_t rx_big; 179 mxge_rx_done_t rx_done; 180 mcp_irq_data_t *fw_stats; 181 volatile uint32_t *irq_claim; 182 u_long ipackets; 183 u_long opackets; 184 u_long obytes; 185 u_long omcasts; 186 u_long oerrors; 187 int if_drv_flags; 188 struct lro_ctrl lc; 189 mxge_dma_t fw_stats_dma; 190 struct sysctl_oid *sysctl_tree; 191 struct sysctl_ctx_list sysctl_ctx; 192 char scratch[256]; 193 }; 194 195 struct mxge_softc { 196 if_t ifp; 197 struct mxge_slice_state *ss; 198 int tx_boundary; /* boundary transmits cannot cross*/ 199 int lro_cnt; 200 bus_dma_tag_t parent_dmat; 201 volatile uint8_t *sram; 202 int sram_size; 203 volatile uint32_t *irq_deassert; 204 mcp_cmd_response_t *cmd; 205 mxge_dma_t cmd_dma; 206 mxge_dma_t zeropad_dma; 207 struct pci_dev *pdev; 208 int legacy_irq; 209 int link_state; 210 unsigned int rdma_tags_available; 211 int intr_coal_delay; 212 volatile uint32_t *intr_coal_delay_ptr; 213 int wc; 214 struct mtx cmd_mtx; 215 struct mtx driver_mtx; 216 int wake_queue; 217 int stop_queue; 218 int down_cnt; 219 int watchdog_resets; 220 int watchdog_countdown; 221 int pause; 222 struct resource *mem_res; 223 struct resource *irq_res; 224 struct resource **msix_irq_res; 225 struct resource *msix_table_res; 226 struct resource *msix_pba_res; 227 void *ih; 228 void **msix_ih; 229 char *fw_name; 230 char eeprom_strings[MXGE_EEPROM_STRINGS_SIZE]; 231 char fw_version[128]; 232 int fw_ver_major; 233 int fw_ver_minor; 234 int fw_ver_tiny; 235 int adopted_rx_filter_bug; 236 device_t dev; 237 struct ifmedia media; 238 int read_dma; 239 int write_dma; 240 int read_write_dma; 241 int fw_multicast_support; 242 int link_width; 243 int max_mtu; 244 int throttle; 245 int tx_defrag; 246 int media_flags; 247 int need_media_probe; 248 int num_slices; 249 int rx_ring_size; 250 int dying; 251 int connector; 252 int current_media; 253 int max_tso6_hlen; 254 mxge_dma_t dmabench_dma; 255 struct callout co_hdl; 256 struct taskqueue *tq; 257 struct task watchdog_task; 258 struct sysctl_oid *slice_sysctl_tree; 259 struct sysctl_ctx_list slice_sysctl_ctx; 260 char *mac_addr_string; 261 uint8_t mac_addr[6]; /* eeprom mac address */ 262 uint16_t pectl; /* save PCIe CTL state */ 263 char product_code_string[64]; 264 char serial_number_string[64]; 265 char cmd_mtx_name[16]; 266 char driver_mtx_name[16]; 267 }; 268 269 #define MXGE_PCI_VENDOR_MYRICOM 0x14c1 270 #define MXGE_PCI_DEVICE_Z8E 0x0008 271 #define MXGE_PCI_DEVICE_Z8E_9 0x0009 272 #define MXGE_PCI_REV_Z8E 0 273 #define MXGE_PCI_REV_Z8ES 1 274 #define MXGE_XFP_COMPLIANCE_BYTE 131 275 #define MXGE_SFP_COMPLIANCE_BYTE 3 276 #define MXGE_MIN_THROTTLE 416 277 #define MXGE_MAX_THROTTLE 4096 278 279 /* Types of connectors on NICs supported by this driver */ 280 #define MXGE_CX4 0 281 #define MXGE_XFP 1 282 #define MXGE_SFP 2 283 #define MXGE_QRF 3 284 285 #define MXGE_HIGHPART_TO_U32(X) \ 286 (sizeof (X) == 8) ? ((uint32_t)((uint64_t)(X) >> 32)) : (0) 287 #define MXGE_LOWPART_TO_U32(X) ((uint32_t)(X)) 288 289 struct mxge_media_type 290 { 291 int flag; 292 uint8_t bitmask; 293 char *name; 294 }; 295 296 struct mxge_pkt_info { 297 int ip_off; 298 int ip_hlen; 299 struct ip *ip; 300 struct ip6_hdr *ip6; 301 struct tcphdr *tcp; 302 }; 303 304 static inline void 305 mxge_pio_copy(volatile void *to_v, void *from_v, size_t size) 306 { 307 register volatile uintptr_t *to; 308 volatile uintptr_t *from; 309 size_t i; 310 311 to = (volatile uintptr_t *) to_v; 312 from = from_v; 313 for (i = (size / sizeof (uintptr_t)); i; i--) { 314 *to = *from; 315 to++; 316 from++; 317 } 318 319 } 320 321 void mxge_lro_flush(struct mxge_slice_state *ss, struct lro_entry *lro); 322 int mxge_lro_rx(struct mxge_slice_state *ss, struct mbuf *m_head, 323 uint32_t csum); 324 325 326 /* 327 This file uses Myri10GE driver indentation. 328 329 Local Variables: 330 c-file-style:"linux" 331 tab-width:8 332 End: 333 */ 334