1 /******************************************************************************* 2 3 Copyright (c) 2006-2009, Myricom Inc. 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Neither the name of the Myricom Inc, nor the names of its 13 contributors may be used to endorse or promote products derived from 14 this software without specific prior written permission. 15 16 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 20 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 POSSIBILITY OF SUCH DAMAGE. 27 28 $FreeBSD$ 29 30 ***************************************************************************/ 31 32 #define MXGE_ETH_STOPPED 0 33 #define MXGE_ETH_STOPPING 1 34 #define MXGE_ETH_STARTING 2 35 #define MXGE_ETH_RUNNING 3 36 #define MXGE_ETH_OPEN_FAILED 4 37 38 #define MXGE_FW_OFFSET 1024*1024 39 #define MXGE_EEPROM_STRINGS_SIZE 256 40 #define MXGE_MAX_SEND_DESC 128 41 42 #if ((__FreeBSD_version > 800000 && __FreeBSD_version < 800005) \ 43 || __FreeBSD_version < 700111) 44 #define MXGE_VIRT_JUMBOS 1 45 #else 46 #define MXGE_VIRT_JUMBOS 0 47 #endif 48 49 #if (__FreeBSD_version > 800082) 50 #define IFNET_BUF_RING 1 51 #endif 52 53 #ifndef VLAN_CAPABILITIES 54 #define VLAN_CAPABILITIES(ifp) 55 #define mxge_vlans_active(sc) (sc)->ifp->if_nvlans 56 #else 57 #define mxge_vlans_active(sc) (sc)->ifp->if_vlantrunk 58 #endif 59 60 #ifndef VLAN_TAG_VALUE 61 #define MXGE_NEW_VLAN_API 62 #endif 63 64 #ifndef IFCAP_LRO 65 #define IFCAP_LRO 0 66 #endif 67 68 #ifndef IFCAP_TSO 69 #define IFCAP_TSO 0 70 #endif 71 72 #ifndef IFCAP_TSO4 73 #define IFCAP_TSO4 0 74 #endif 75 76 #ifndef CSUM_TSO 77 #define CSUM_TSO 0 78 #endif 79 80 81 typedef struct { 82 void *addr; 83 bus_addr_t bus_addr; 84 bus_dma_tag_t dmat; 85 bus_dmamap_t map; 86 } mxge_dma_t; 87 88 89 typedef struct { 90 mcp_slot_t *entry; 91 mxge_dma_t dma; 92 int cnt; 93 int idx; 94 int mask; 95 } mxge_rx_done_t; 96 97 typedef struct 98 { 99 uint32_t data0; 100 uint32_t data1; 101 uint32_t data2; 102 } mxge_cmd_t; 103 104 struct mxge_rx_buffer_state { 105 struct mbuf *m; 106 bus_dmamap_t map; 107 }; 108 109 struct mxge_tx_buffer_state { 110 struct mbuf *m; 111 bus_dmamap_t map; 112 int flag; 113 }; 114 115 typedef struct 116 { 117 volatile mcp_kreq_ether_recv_t *lanai; /* lanai ptr for recv ring */ 118 mcp_kreq_ether_recv_t *shadow; /* host shadow of recv ring */ 119 struct mxge_rx_buffer_state *info; 120 bus_dma_tag_t dmat; 121 bus_dmamap_t extra_map; 122 int cnt; 123 int nbufs; 124 int cl_size; 125 int alloc_fail; 126 int mask; /* number of rx slots -1 */ 127 int mlen; 128 } mxge_rx_ring_t; 129 130 typedef struct 131 { 132 struct mtx mtx; 133 #ifdef IFNET_BUF_RING 134 struct buf_ring *br; 135 #endif 136 volatile mcp_kreq_ether_send_t *lanai; /* lanai ptr for sendq */ 137 volatile uint32_t *send_go; /* doorbell for sendq */ 138 volatile uint32_t *send_stop; /* doorbell for sendq */ 139 mcp_kreq_ether_send_t *req_list; /* host shadow of sendq */ 140 char *req_bytes; 141 bus_dma_segment_t *seg_list; 142 struct mxge_tx_buffer_state *info; 143 bus_dma_tag_t dmat; 144 int req; /* transmits submitted */ 145 int mask; /* number of transmit slots -1 */ 146 int done; /* transmits completed */ 147 int pkt_done; /* packets completed */ 148 int max_desc; /* max descriptors per xmit */ 149 int queue_active; /* fw currently polling this queue*/ 150 int activate; 151 int deactivate; 152 int stall; /* #times hw queue exhausted */ 153 int wake; /* #times irq re-enabled xmit */ 154 int watchdog_req; /* cache of req */ 155 int watchdog_done; /* cache of done */ 156 int watchdog_rx_pause; /* cache of pause rq recvd */ 157 int defrag; 158 char mtx_name[16]; 159 } mxge_tx_ring_t; 160 161 struct lro_entry; 162 struct lro_entry 163 { 164 SLIST_ENTRY(lro_entry) next; 165 struct mbuf *m_head; 166 struct mbuf *m_tail; 167 int timestamp; 168 struct ip *ip; 169 uint32_t tsval; 170 uint32_t tsecr; 171 uint32_t source_ip; 172 uint32_t dest_ip; 173 uint32_t next_seq; 174 uint32_t ack_seq; 175 uint32_t len; 176 uint32_t data_csum; 177 uint16_t window; 178 uint16_t source_port; 179 uint16_t dest_port; 180 uint16_t append_cnt; 181 uint16_t mss; 182 183 }; 184 SLIST_HEAD(lro_head, lro_entry); 185 186 struct mxge_softc; 187 typedef struct mxge_softc mxge_softc_t; 188 189 struct mxge_slice_state { 190 mxge_softc_t *sc; 191 mxge_tx_ring_t tx; /* transmit ring */ 192 mxge_rx_ring_t rx_small; 193 mxge_rx_ring_t rx_big; 194 mxge_rx_done_t rx_done; 195 mcp_irq_data_t *fw_stats; 196 volatile uint32_t *irq_claim; 197 u_long ipackets; 198 u_long opackets; 199 u_long obytes; 200 u_long omcasts; 201 u_long oerrors; 202 int if_drv_flags; 203 struct lro_head lro_active; 204 struct lro_head lro_free; 205 int lro_queued; 206 int lro_flushed; 207 int lro_bad_csum; 208 mxge_dma_t fw_stats_dma; 209 struct sysctl_oid *sysctl_tree; 210 struct sysctl_ctx_list sysctl_ctx; 211 char scratch[256]; 212 }; 213 214 struct mxge_softc { 215 struct ifnet* ifp; 216 struct mxge_slice_state *ss; 217 int csum_flag; /* rx_csums? */ 218 int tx_boundary; /* boundary transmits cannot cross*/ 219 int lro_cnt; 220 bus_dma_tag_t parent_dmat; 221 volatile uint8_t *sram; 222 int sram_size; 223 volatile uint32_t *irq_deassert; 224 mcp_cmd_response_t *cmd; 225 mxge_dma_t cmd_dma; 226 mxge_dma_t zeropad_dma; 227 struct pci_dev *pdev; 228 int legacy_irq; 229 int link_state; 230 unsigned int rdma_tags_available; 231 int intr_coal_delay; 232 volatile uint32_t *intr_coal_delay_ptr; 233 int wc; 234 struct mtx cmd_mtx; 235 struct mtx driver_mtx; 236 int wake_queue; 237 int stop_queue; 238 int down_cnt; 239 int watchdog_resets; 240 int watchdog_countdown; 241 int pause; 242 struct resource *mem_res; 243 struct resource *irq_res; 244 struct resource **msix_irq_res; 245 struct resource *msix_table_res; 246 struct resource *msix_pba_res; 247 void *ih; 248 void **msix_ih; 249 char *fw_name; 250 char eeprom_strings[MXGE_EEPROM_STRINGS_SIZE]; 251 char fw_version[128]; 252 int fw_ver_major; 253 int fw_ver_minor; 254 int fw_ver_tiny; 255 int adopted_rx_filter_bug; 256 device_t dev; 257 struct ifmedia media; 258 int read_dma; 259 int write_dma; 260 int read_write_dma; 261 int fw_multicast_support; 262 int link_width; 263 int max_mtu; 264 int throttle; 265 int tx_defrag; 266 int media_flags; 267 int need_media_probe; 268 int num_slices; 269 int rx_ring_size; 270 int dying; 271 int connector; 272 int current_media; 273 mxge_dma_t dmabench_dma; 274 struct callout co_hdl; 275 struct taskqueue *tq; 276 struct task watchdog_task; 277 struct sysctl_oid *slice_sysctl_tree; 278 struct sysctl_ctx_list slice_sysctl_ctx; 279 char *mac_addr_string; 280 uint8_t mac_addr[6]; /* eeprom mac address */ 281 uint16_t pectl; /* save PCIe CTL state */ 282 char product_code_string[64]; 283 char serial_number_string[64]; 284 char cmd_mtx_name[16]; 285 char driver_mtx_name[16]; 286 }; 287 288 #define MXGE_PCI_VENDOR_MYRICOM 0x14c1 289 #define MXGE_PCI_DEVICE_Z8E 0x0008 290 #define MXGE_PCI_DEVICE_Z8E_9 0x0009 291 #define MXGE_PCI_REV_Z8E 0 292 #define MXGE_PCI_REV_Z8ES 1 293 #define MXGE_XFP_COMPLIANCE_BYTE 131 294 #define MXGE_SFP_COMPLIANCE_BYTE 3 295 #define MXGE_MIN_THROTTLE 416 296 #define MXGE_MAX_THROTTLE 4096 297 298 /* Types of connectors on NICs supported by this driver */ 299 #define MXGE_CX4 0 300 #define MXGE_XFP 1 301 #define MXGE_SFP 2 302 #define MXGE_QRF 3 303 304 #define MXGE_HIGHPART_TO_U32(X) \ 305 (sizeof (X) == 8) ? ((uint32_t)((uint64_t)(X) >> 32)) : (0) 306 #define MXGE_LOWPART_TO_U32(X) ((uint32_t)(X)) 307 308 struct mxge_media_type 309 { 310 int flag; 311 uint8_t bitmask; 312 char *name; 313 }; 314 315 /* implement our own memory barriers, since bus_space_barrier 316 cannot handle write-combining regions */ 317 318 #if __FreeBSD_version < 800053 319 320 #if defined (__GNUC__) 321 #if #cpu(i386) || defined __i386 || defined i386 || defined __i386__ || #cpu(x86_64) || defined __x86_64__ 322 #define wmb() __asm__ __volatile__ ("sfence;": : :"memory") 323 #elif #cpu(sparc64) || defined sparc64 || defined __sparcv9 324 #define wmb() __asm__ __volatile__ ("membar #MemIssue": : :"memory") 325 #elif #cpu(sparc) || defined sparc || defined __sparc__ 326 #define wmb() __asm__ __volatile__ ("stbar;": : :"memory") 327 #else 328 #define wmb() /* XXX just to make this compile */ 329 #endif 330 #else 331 #error "unknown compiler" 332 #endif 333 334 #endif 335 336 static inline void 337 mxge_pio_copy(volatile void *to_v, void *from_v, size_t size) 338 { 339 register volatile uintptr_t *to; 340 volatile uintptr_t *from; 341 size_t i; 342 343 to = (volatile uintptr_t *) to_v; 344 from = from_v; 345 for (i = (size / sizeof (uintptr_t)); i; i--) { 346 *to = *from; 347 to++; 348 from++; 349 } 350 351 } 352 353 void mxge_lro_flush(struct mxge_slice_state *ss, struct lro_entry *lro); 354 int mxge_lro_rx(struct mxge_slice_state *ss, struct mbuf *m_head, 355 uint32_t csum); 356 357 358 359 /* 360 This file uses Myri10GE driver indentation. 361 362 Local Variables: 363 c-file-style:"linux" 364 tab-width:8 365 End: 366 */ 367