1 /******************************************************************************* 2 3 Copyright (c) 2006-2007, Myricom Inc. 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Neither the name of the Myricom Inc, nor the names of its 13 contributors may be used to endorse or promote products derived from 14 this software without specific prior written permission. 15 16 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 20 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 POSSIBILITY OF SUCH DAMAGE. 27 28 $FreeBSD$ 29 30 ***************************************************************************/ 31 32 #define MXGE_ETH_STOPPED 0 33 #define MXGE_ETH_STOPPING 1 34 #define MXGE_ETH_STARTING 2 35 #define MXGE_ETH_RUNNING 3 36 #define MXGE_ETH_OPEN_FAILED 4 37 38 #define MXGE_FW_OFFSET 1024*1024 39 #define MXGE_EEPROM_STRINGS_SIZE 256 40 #define MXGE_MAX_SEND_DESC 128 41 42 typedef struct { 43 void *addr; 44 bus_addr_t bus_addr; 45 bus_dma_tag_t dmat; 46 bus_dmamap_t map; 47 } mxge_dma_t; 48 49 50 typedef struct { 51 mcp_slot_t *entry; 52 mxge_dma_t dma; 53 int cnt; 54 int idx; 55 int mask; 56 } mxge_rx_done_t; 57 58 typedef struct 59 { 60 uint32_t data0; 61 uint32_t data1; 62 uint32_t data2; 63 } mxge_cmd_t; 64 65 struct mxge_rx_buffer_state { 66 struct mbuf *m; 67 bus_dmamap_t map; 68 }; 69 70 struct mxge_tx_buffer_state { 71 struct mbuf *m; 72 bus_dmamap_t map; 73 int flag; 74 }; 75 76 typedef struct 77 { 78 volatile mcp_kreq_ether_recv_t *lanai; /* lanai ptr for recv ring */ 79 mcp_kreq_ether_recv_t *shadow; /* host shadow of recv ring */ 80 struct mxge_rx_buffer_state *info; 81 bus_dma_tag_t dmat; 82 bus_dmamap_t extra_map; 83 int cnt; 84 int nbufs; 85 int cl_size; 86 int alloc_fail; 87 int mask; /* number of rx slots -1 */ 88 } mxge_rx_ring_t; 89 90 typedef struct 91 { 92 struct mtx mtx; 93 volatile mcp_kreq_ether_send_t *lanai; /* lanai ptr for sendq */ 94 mcp_kreq_ether_send_t *req_list; /* host shadow of sendq */ 95 char *req_bytes; 96 bus_dma_segment_t *seg_list; 97 struct mxge_tx_buffer_state *info; 98 bus_dma_tag_t dmat; 99 int req; /* transmits submitted */ 100 int mask; /* number of transmit slots -1 */ 101 int done; /* transmits completed */ 102 int pkt_done; /* packets completed */ 103 int max_desc; /* max descriptors per xmit */ 104 int stall; /* #times hw queue exhausted */ 105 int wake; /* #times irq re-enabled xmit */ 106 int watchdog_req; /* cache of req */ 107 int watchdog_done; /* cache of done */ 108 int watchdog_rx_pause; /* cache of pause rq recvd */ 109 int defrag; 110 char mtx_name[16]; 111 } mxge_tx_ring_t; 112 113 struct lro_entry; 114 struct lro_entry 115 { 116 SLIST_ENTRY(lro_entry) next; 117 struct mbuf *m_head; 118 struct mbuf *m_tail; 119 int timestamp; 120 struct ip *ip; 121 uint32_t tsval; 122 uint32_t tsecr; 123 uint32_t source_ip; 124 uint32_t dest_ip; 125 uint32_t next_seq; 126 uint32_t ack_seq; 127 uint32_t len; 128 uint32_t data_csum; 129 uint16_t window; 130 uint16_t source_port; 131 uint16_t dest_port; 132 uint16_t append_cnt; 133 uint16_t mss; 134 135 }; 136 SLIST_HEAD(lro_head, lro_entry); 137 138 struct mxge_softc; 139 typedef struct mxge_softc mxge_softc_t; 140 141 struct mxge_slice_state { 142 mxge_softc_t *sc; 143 mxge_tx_ring_t tx; /* transmit ring */ 144 mxge_rx_ring_t rx_small; 145 mxge_rx_ring_t rx_big; 146 mxge_rx_done_t rx_done; 147 mcp_irq_data_t *fw_stats; 148 volatile uint32_t *irq_claim; 149 u_long ipackets; 150 struct lro_head lro_active; 151 struct lro_head lro_free; 152 int lro_queued; 153 int lro_flushed; 154 int lro_bad_csum; 155 mxge_dma_t fw_stats_dma; 156 struct sysctl_oid *sysctl_tree; 157 struct sysctl_ctx_list sysctl_ctx; 158 char scratch[256]; 159 }; 160 161 struct mxge_softc { 162 struct ifnet* ifp; 163 struct mxge_slice_state *ss; 164 int csum_flag; /* rx_csums? */ 165 int tx_boundary; /* boundary transmits cannot cross*/ 166 int lro_cnt; 167 bus_dma_tag_t parent_dmat; 168 volatile uint8_t *sram; 169 int sram_size; 170 volatile uint32_t *irq_deassert; 171 mcp_cmd_response_t *cmd; 172 mxge_dma_t cmd_dma; 173 mxge_dma_t zeropad_dma; 174 struct pci_dev *pdev; 175 int msi_enabled; 176 int link_state; 177 unsigned int rdma_tags_available; 178 int intr_coal_delay; 179 volatile uint32_t *intr_coal_delay_ptr; 180 int wc; 181 struct mtx cmd_mtx; 182 struct mtx driver_mtx; 183 int wake_queue; 184 int stop_queue; 185 int down_cnt; 186 int watchdog_resets; 187 int watchdog_countdown; 188 int pause; 189 struct resource *mem_res; 190 struct resource *irq_res; 191 struct resource **msix_irq_res; 192 struct resource *msix_table_res; 193 struct resource *msix_pba_res; 194 void *ih; 195 void **msix_ih; 196 char *fw_name; 197 char eeprom_strings[MXGE_EEPROM_STRINGS_SIZE]; 198 char fw_version[128]; 199 int fw_ver_major; 200 int fw_ver_minor; 201 int fw_ver_tiny; 202 int adopted_rx_filter_bug; 203 device_t dev; 204 struct ifmedia media; 205 int read_dma; 206 int write_dma; 207 int read_write_dma; 208 int fw_multicast_support; 209 int link_width; 210 int max_mtu; 211 int tx_defrag; 212 int media_flags; 213 int need_media_probe; 214 int num_slices; 215 int rx_ring_size; 216 mxge_dma_t dmabench_dma; 217 struct callout co_hdl; 218 struct sysctl_oid *slice_sysctl_tree; 219 struct sysctl_ctx_list slice_sysctl_ctx; 220 char *mac_addr_string; 221 uint8_t mac_addr[6]; /* eeprom mac address */ 222 char product_code_string[64]; 223 char serial_number_string[64]; 224 char cmd_mtx_name[16]; 225 char driver_mtx_name[16]; 226 }; 227 228 #define MXGE_PCI_VENDOR_MYRICOM 0x14c1 229 #define MXGE_PCI_DEVICE_Z8E 0x0008 230 #define MXGE_PCI_DEVICE_Z8E_9 0x0009 231 #define MXGE_XFP_COMPLIANCE_BYTE 131 232 233 #define MXGE_HIGHPART_TO_U32(X) \ 234 (sizeof (X) == 8) ? ((uint32_t)((uint64_t)(X) >> 32)) : (0) 235 #define MXGE_LOWPART_TO_U32(X) ((uint32_t)(X)) 236 237 struct mxge_media_type 238 { 239 int flag; 240 uint8_t bitmask; 241 char *name; 242 }; 243 244 /* implement our own memory barriers, since bus_space_barrier 245 cannot handle write-combining regions */ 246 247 #if defined (__GNUC__) 248 #if #cpu(i386) || defined __i386 || defined i386 || defined __i386__ || #cpu(x86_64) || defined __x86_64__ 249 #define mb() __asm__ __volatile__ ("sfence;": : :"memory") 250 #elif #cpu(sparc64) || defined sparc64 || defined __sparcv9 251 #define mb() __asm__ __volatile__ ("membar #MemIssue": : :"memory") 252 #elif #cpu(sparc) || defined sparc || defined __sparc__ 253 #define mb() __asm__ __volatile__ ("stbar;": : :"memory") 254 #else 255 #define mb() /* XXX just to make this compile */ 256 #endif 257 #else 258 #error "unknown compiler" 259 #endif 260 261 static inline void 262 mxge_pio_copy(volatile void *to_v, void *from_v, size_t size) 263 { 264 register volatile uintptr_t *to; 265 volatile uintptr_t *from; 266 size_t i; 267 268 to = (volatile uintptr_t *) to_v; 269 from = from_v; 270 for (i = (size / sizeof (uintptr_t)); i; i--) { 271 *to = *from; 272 to++; 273 from++; 274 } 275 276 } 277 278 void mxge_lro_flush(struct mxge_slice_state *ss, struct lro_entry *lro); 279 int mxge_lro_rx(struct mxge_slice_state *ss, struct mbuf *m_head, 280 uint32_t csum); 281 282 283 284 /* 285 This file uses Myri10GE driver indentation. 286 287 Local Variables: 288 c-file-style:"linux" 289 tab-width:8 290 End: 291 */ 292