xref: /freebsd/sys/dev/mxge/if_mxge_var.h (revision 193d9e768ba63fcfb187cfd17f461f7d41345048)
1 /*******************************************************************************
2 
3 Copyright (c) 2006-2013, Myricom Inc.
4 All rights reserved.
5 
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8 
9  1. Redistributions of source code must retain the above copyright notice,
10     this list of conditions and the following disclaimer.
11 
12  2. Neither the name of the Myricom Inc, nor the names of its
13     contributors may be used to endorse or promote products derived from
14     this software without specific prior written permission.
15 
16 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 POSSIBILITY OF SUCH DAMAGE.
27 
28 $FreeBSD$
29 
30 ***************************************************************************/
31 
32 #define MXGE_ETH_STOPPED 0
33 #define MXGE_ETH_STOPPING 1
34 #define MXGE_ETH_STARTING 2
35 #define MXGE_ETH_RUNNING 3
36 #define MXGE_ETH_OPEN_FAILED 4
37 
38 #define MXGE_FW_OFFSET 1024*1024
39 #define MXGE_EEPROM_STRINGS_SIZE 256
40 #define MXGE_MAX_SEND_DESC 128
41 
42 #if ((__FreeBSD_version > 800000 && __FreeBSD_version < 800005) \
43      || __FreeBSD_version < 700111)
44 #define MXGE_VIRT_JUMBOS 1
45 #else
46 #define MXGE_VIRT_JUMBOS 0
47 #endif
48 
49 #if (__FreeBSD_version > 800082)
50 #define IFNET_BUF_RING 1
51 #endif
52 
53 #if (__FreeBSD_version < 1000020)
54 #undef IF_Kbps
55 #undef IF_Mbps
56 #undef IF_Gbps
57 #define	IF_Kbps(x)	((uintmax_t)(x) * 1000)	/* kilobits/sec. */
58 #define	IF_Mbps(x)	(IF_Kbps((x) * 1000))	/* megabits/sec. */
59 #define	IF_Gbps(x)	(IF_Mbps((x) * 1000))	/* gigabits/sec. */
60 #endif
61 
62 #ifndef VLAN_CAPABILITIES
63 #define VLAN_CAPABILITIES(ifp)
64 #define mxge_vlans_active(sc) (sc)->ifp->if_nvlans
65 #else
66 #define mxge_vlans_active(sc) (sc)->ifp->if_vlantrunk
67 #endif
68 
69 #ifndef VLAN_TAG_VALUE
70 #define MXGE_NEW_VLAN_API
71 #endif
72 
73 #ifndef IFCAP_LRO
74 #define IFCAP_LRO 0
75 #endif
76 
77 #ifndef IFCAP_TSO
78 #define IFCAP_TSO 0
79 #endif
80 
81 #ifndef IFCAP_TSO4
82 #define IFCAP_TSO4 0
83 #endif
84 
85 #ifndef IFCAP_TSO6
86 #define IFCAP_TSO6 0
87 #endif
88 
89 #ifndef IFCAP_TXCSUM_IPV6
90 #define IFCAP_TXCSUM_IPV6 0
91 #endif
92 
93 #ifndef IFCAP_RXCSUM_IPV6
94 #define IFCAP_RXCSUM_IPV6 0
95 #endif
96 
97 #ifndef CSUM_TSO
98 #define CSUM_TSO 0
99 #endif
100 
101 #ifndef CSUM_TCP_IPV6
102 #define CSUM_TCP_IPV6 0
103 #endif
104 
105 #ifndef CSUM_UDP_IPV6
106 #define CSUM_UDP_IPV6 0
107 #endif
108 
109 #ifndef CSUM_DELAY_DATA_IPV6
110 #define CSUM_DELAY_DATA_IPV6 0
111 #endif
112 
113 typedef struct {
114 	void *addr;
115 	bus_addr_t bus_addr;
116 	bus_dma_tag_t dmat;
117 	bus_dmamap_t map;
118 } mxge_dma_t;
119 
120 
121 typedef struct {
122 	mcp_slot_t *entry;
123 	mxge_dma_t dma;
124 	int cnt;
125 	int idx;
126 	int mask;
127 } mxge_rx_done_t;
128 
129 typedef struct
130 {
131   uint32_t data0;
132   uint32_t data1;
133   uint32_t data2;
134 } mxge_cmd_t;
135 
136 struct mxge_rx_buffer_state {
137 	struct mbuf *m;
138 	bus_dmamap_t map;
139 };
140 
141 struct mxge_tx_buffer_state {
142 	struct mbuf *m;
143 	bus_dmamap_t map;
144 	int flag;
145 };
146 
147 typedef struct
148 {
149 	volatile mcp_kreq_ether_recv_t *lanai;	/* lanai ptr for recv ring */
150 	mcp_kreq_ether_recv_t *shadow;	/* host shadow of recv ring */
151 	struct mxge_rx_buffer_state *info;
152 	bus_dma_tag_t dmat;
153 	bus_dmamap_t extra_map;
154 	int cnt;
155 	int nbufs;
156 	int cl_size;
157 	int alloc_fail;
158 	int mask;			/* number of rx slots -1 */
159 	int mlen;
160 } mxge_rx_ring_t;
161 
162 typedef struct
163 {
164 	struct mtx mtx;
165 #ifdef IFNET_BUF_RING
166 	struct buf_ring *br;
167 #endif
168 	volatile mcp_kreq_ether_send_t *lanai;	/* lanai ptr for sendq	*/
169 	volatile uint32_t *send_go;		/* doorbell for sendq */
170 	volatile uint32_t *send_stop;		/* doorbell for sendq */
171 	mcp_kreq_ether_send_t *req_list;	/* host shadow of sendq */
172 	char *req_bytes;
173 	bus_dma_segment_t *seg_list;
174 	struct mxge_tx_buffer_state *info;
175 	bus_dma_tag_t dmat;
176 	int req;			/* transmits submitted	*/
177 	int mask;			/* number of transmit slots -1 */
178 	int done;			/* transmits completed	*/
179 	int pkt_done;			/* packets completed */
180 	int max_desc;			/* max descriptors per xmit */
181 	int queue_active;		/* fw currently polling this queue*/
182 	int activate;
183 	int deactivate;
184 	int stall;			/* #times hw queue exhausted */
185 	int wake;			/* #times irq re-enabled xmit */
186 	int watchdog_req;		/* cache of req */
187 	int watchdog_done;		/* cache of done */
188 	int watchdog_rx_pause;		/* cache of pause rq recvd */
189 	int defrag;
190 	char mtx_name[16];
191 } mxge_tx_ring_t;
192 
193 struct mxge_softc;
194 typedef struct mxge_softc mxge_softc_t;
195 
196 struct mxge_slice_state {
197 	mxge_softc_t *sc;
198 	mxge_tx_ring_t tx;		/* transmit ring 	*/
199 	mxge_rx_ring_t rx_small;
200 	mxge_rx_ring_t rx_big;
201 	mxge_rx_done_t rx_done;
202 	mcp_irq_data_t *fw_stats;
203 	volatile uint32_t *irq_claim;
204 	u_long ipackets;
205 	u_long opackets;
206 	u_long obytes;
207 	u_long omcasts;
208 	u_long oerrors;
209 	int if_drv_flags;
210 	struct lro_ctrl lc;
211 	mxge_dma_t fw_stats_dma;
212 	struct sysctl_oid *sysctl_tree;
213 	struct sysctl_ctx_list sysctl_ctx;
214 	char scratch[256];
215 };
216 
217 struct mxge_softc {
218 	struct ifnet* ifp;
219 	struct mxge_slice_state *ss;
220 	int tx_boundary;		/* boundary transmits cannot cross*/
221 	int lro_cnt;
222 	bus_dma_tag_t	parent_dmat;
223 	volatile uint8_t *sram;
224 	int sram_size;
225 	volatile uint32_t *irq_deassert;
226 	mcp_cmd_response_t *cmd;
227 	mxge_dma_t cmd_dma;
228 	mxge_dma_t zeropad_dma;
229 	struct pci_dev *pdev;
230 	int legacy_irq;
231 	int link_state;
232 	unsigned int rdma_tags_available;
233 	int intr_coal_delay;
234 	volatile uint32_t *intr_coal_delay_ptr;
235 	int wc;
236 	struct mtx cmd_mtx;
237 	struct mtx driver_mtx;
238 	int wake_queue;
239 	int stop_queue;
240 	int down_cnt;
241 	int watchdog_resets;
242 	int watchdog_countdown;
243 	int pause;
244 	struct resource *mem_res;
245 	struct resource *irq_res;
246 	struct resource **msix_irq_res;
247 	struct resource *msix_table_res;
248 	struct resource *msix_pba_res;
249 	void *ih;
250 	void **msix_ih;
251 	char *fw_name;
252 	char eeprom_strings[MXGE_EEPROM_STRINGS_SIZE];
253 	char fw_version[128];
254 	int fw_ver_major;
255 	int fw_ver_minor;
256 	int fw_ver_tiny;
257 	int adopted_rx_filter_bug;
258 	device_t dev;
259 	struct ifmedia media;
260 	int read_dma;
261 	int write_dma;
262 	int read_write_dma;
263 	int fw_multicast_support;
264 	int link_width;
265 	int max_mtu;
266 	int throttle;
267 	int tx_defrag;
268 	int media_flags;
269 	int need_media_probe;
270 	int num_slices;
271 	int rx_ring_size;
272 	int dying;
273 	int connector;
274 	int current_media;
275 	int max_tso6_hlen;
276 	mxge_dma_t dmabench_dma;
277 	struct callout co_hdl;
278 	struct taskqueue *tq;
279 	struct task watchdog_task;
280 	struct sysctl_oid *slice_sysctl_tree;
281 	struct sysctl_ctx_list slice_sysctl_ctx;
282 	char *mac_addr_string;
283 	uint8_t	mac_addr[6];		/* eeprom mac address */
284 	uint16_t pectl;			/* save PCIe CTL state */
285 	char product_code_string[64];
286 	char serial_number_string[64];
287 	char cmd_mtx_name[16];
288 	char driver_mtx_name[16];
289 };
290 
291 #define MXGE_PCI_VENDOR_MYRICOM 	0x14c1
292 #define MXGE_PCI_DEVICE_Z8E 	0x0008
293 #define MXGE_PCI_DEVICE_Z8E_9 	0x0009
294 #define MXGE_PCI_REV_Z8E	0
295 #define MXGE_PCI_REV_Z8ES	1
296 #define MXGE_XFP_COMPLIANCE_BYTE	131
297 #define MXGE_SFP_COMPLIANCE_BYTE	  3
298 #define MXGE_MIN_THROTTLE	416
299 #define MXGE_MAX_THROTTLE	4096
300 
301 /* Types of connectors on NICs supported by this driver */
302 #define MXGE_CX4 0
303 #define MXGE_XFP 1
304 #define MXGE_SFP 2
305 #define MXGE_QRF 3
306 
307 #define MXGE_HIGHPART_TO_U32(X) \
308 (sizeof (X) == 8) ? ((uint32_t)((uint64_t)(X) >> 32)) : (0)
309 #define MXGE_LOWPART_TO_U32(X) ((uint32_t)(X))
310 
311 struct mxge_media_type
312 {
313 	int flag;
314 	uint8_t bitmask;
315 	char *name;
316 };
317 
318 struct mxge_pkt_info {
319 	int ip_off;
320 	int ip_hlen;
321 	struct ip *ip;
322 	struct ip6_hdr *ip6;
323 	struct tcphdr *tcp;
324 };
325 
326 
327 /* implement our own memory barriers, since bus_space_barrier
328    cannot handle write-combining regions */
329 
330 #if __FreeBSD_version < 800053
331 
332 #if defined (__GNUC__)
333   #if #cpu(i386) || defined __i386 || defined i386 || defined __i386__ || #cpu(x86_64) || defined __x86_64__
334     #define wmb()  __asm__ __volatile__ ("sfence;": : :"memory")
335   #elif #cpu(sparc64) || defined sparc64 || defined __sparcv9
336     #define wmb()  __asm__ __volatile__ ("membar #MemIssue": : :"memory")
337   #elif #cpu(sparc) || defined sparc || defined __sparc__
338     #define wmb()  __asm__ __volatile__ ("stbar;": : :"memory")
339   #else
340     #define wmb() 	/* XXX just to make this compile */
341   #endif
342 #else
343   #error "unknown compiler"
344 #endif
345 
346 #endif
347 
348 static inline void
349 mxge_pio_copy(volatile void *to_v, void *from_v, size_t size)
350 {
351   register volatile uintptr_t *to;
352   volatile uintptr_t *from;
353   size_t i;
354 
355   to = (volatile uintptr_t *) to_v;
356   from = from_v;
357   for (i = (size / sizeof (uintptr_t)); i; i--) {
358 	  *to = *from;
359 	  to++;
360 	  from++;
361   }
362 
363 }
364 
365 void mxge_lro_flush(struct mxge_slice_state *ss, struct lro_entry *lro);
366 int mxge_lro_rx(struct mxge_slice_state *ss, struct mbuf *m_head,
367 		uint32_t csum);
368 
369 
370 
371 /*
372   This file uses Myri10GE driver indentation.
373 
374   Local Variables:
375   c-file-style:"linux"
376   tab-width:8
377   End:
378 */
379