1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2007-2009 Sam Leffler, Errno Consulting 5 * Copyright (c) 2007-2009 Marvell Semiconductor, Inc. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer, 13 * without modification. 14 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 15 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 16 * redistribution must be conditioned upon including a substantially 17 * similar Disclaimer requirement for further binary redistribution. 18 * 19 * NO WARRANTY 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 23 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 24 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 25 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 28 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGES. 31 * 32 * $FreeBSD$ 33 */ 34 35 /* 36 * Definitions for the Marvell Wireless LAN controller Hardware Access Layer. 37 */ 38 #ifndef _MWL_HALREG_H_ 39 #define _MWL_HALREG_H_ 40 41 #define MWL_ANT_INFO_SUPPORT /* per-antenna data in rx descriptor */ 42 43 #define MACREG_REG_TSF_LOW 0xa600 /* TSF lo */ 44 #define MACREG_REG_TSF_HIGH 0xa604 /* TSF hi */ 45 #define MACREG_REG_CHIP_REV 0xa814 /* chip rev */ 46 47 // Map to 0x80000000 (Bus control) on BAR0 48 #define MACREG_REG_H2A_INTERRUPT_EVENTS 0x00000C18 // (From host to ARM) 49 #define MACREG_REG_H2A_INTERRUPT_CAUSE 0x00000C1C // (From host to ARM) 50 #define MACREG_REG_H2A_INTERRUPT_MASK 0x00000C20 // (From host to ARM) 51 #define MACREG_REG_H2A_INTERRUPT_CLEAR_SEL 0x00000C24 // (From host to ARM) 52 #define MACREG_REG_H2A_INTERRUPT_STATUS_MASK 0x00000C28 // (From host to ARM) 53 54 #define MACREG_REG_A2H_INTERRUPT_EVENTS 0x00000C2C // (From ARM to host) 55 #define MACREG_REG_A2H_INTERRUPT_CAUSE 0x00000C30 // (From ARM to host) 56 #define MACREG_REG_A2H_INTERRUPT_MASK 0x00000C34 // (From ARM to host) 57 #define MACREG_REG_A2H_INTERRUPT_CLEAR_SEL 0x00000C38 // (From ARM to host) 58 #define MACREG_REG_A2H_INTERRUPT_STATUS_MASK 0x00000C3C // (From ARM to host) 59 60 61 // Map to 0x80000000 on BAR1 62 #define MACREG_REG_GEN_PTR 0x00000C10 63 #define MACREG_REG_INT_CODE 0x00000C14 64 #define MACREG_REG_SCRATCH 0x00000C40 65 #define MACREG_REG_FW_PRESENT 0x0000BFFC 66 67 #define MACREG_REG_PROMISCUOUS 0xA300 68 69 // Bit definitio for MACREG_REG_A2H_INTERRUPT_CAUSE (A2HRIC) 70 #define MACREG_A2HRIC_BIT_TX_DONE 0x00000001 // bit 0 71 #define MACREG_A2HRIC_BIT_RX_RDY 0x00000002 // bit 1 72 #define MACREG_A2HRIC_BIT_OPC_DONE 0x00000004 // bit 2 73 #define MACREG_A2HRIC_BIT_MAC_EVENT 0x00000008 // bit 3 74 #define MACREG_A2HRIC_BIT_RX_PROBLEM 0x00000010 // bit 4 75 76 #define MACREG_A2HRIC_BIT_RADIO_OFF 0x00000020 // bit 5 77 #define MACREG_A2HRIC_BIT_RADIO_ON 0x00000040 // bit 6 78 79 #define MACREG_A2HRIC_BIT_RADAR_DETECT 0x00000080 // bit 7 80 81 #define MACREG_A2HRIC_BIT_ICV_ERROR 0x00000100 // bit 8 82 #define MACREG_A2HRIC_BIT_MIC_ERROR 0x00000200 // bit 9 83 #define MACREG_A2HRIC_BIT_QUEUE_EMPTY 0x00004000 84 #define MACREG_A2HRIC_BIT_QUEUE_FULL 0x00000800 85 #define MACREG_A2HRIC_BIT_CHAN_SWITCH 0x00001000 86 #define MACREG_A2HRIC_BIT_TX_WATCHDOG 0x00002000 87 #define MACREG_A2HRIC_BIT_BA_WATCHDOG 0x00000400 88 #define MACREQ_A2HRIC_BIT_TX_ACK 0x00008000 89 #define ISR_SRC_BITS ((MACREG_A2HRIC_BIT_RX_RDY) | \ 90 (MACREG_A2HRIC_BIT_TX_DONE) | \ 91 (MACREG_A2HRIC_BIT_OPC_DONE) | \ 92 (MACREG_A2HRIC_BIT_MAC_EVENT)| \ 93 (MACREG_A2HRIC_BIT_MIC_ERROR)| \ 94 (MACREG_A2HRIC_BIT_ICV_ERROR)| \ 95 (MACREG_A2HRIC_BIT_RADAR_DETECT)| \ 96 (MACREG_A2HRIC_BIT_CHAN_SWITCH)| \ 97 (MACREG_A2HRIC_BIT_TX_WATCHDOG)| \ 98 (MACREG_A2HRIC_BIT_QUEUE_EMPTY)| \ 99 (MACREG_A2HRIC_BIT_BA_WATCHDOG)| \ 100 (MACREQ_A2HRIC_BIT_TX_ACK)) 101 102 #define MACREG_A2HRIC_BIT_MASK ISR_SRC_BITS 103 104 105 // Bit definitio for MACREG_REG_H2A_INTERRUPT_CAUSE (H2ARIC) 106 #define MACREG_H2ARIC_BIT_PPA_READY 0x00000001 // bit 0 107 #define MACREG_H2ARIC_BIT_DOOR_BELL 0x00000002 // bit 1 108 #define ISR_RESET (1<<15) 109 110 // INT code register event definition 111 #define MACREG_INT_CODE_CMD_FINISHED 0x00000005 112 113 /* 114 * Host/Firmware Interface definitions. 115 */ 116 117 /** 118 * Define total number of TX queues in the shared memory. 119 * This count includes the EDCA queues, Block Ack queues, and HCCA queues 120 * In addition to this, there could be a management packet queue some 121 * time in the future 122 */ 123 #define NUM_EDCA_QUEUES 4 124 #define NUM_HCCA_QUEUES 0 125 #define NUM_BA_QUEUES 0 126 #define NUM_MGMT_QUEUES 0 127 #define NUM_ACK_EVENT_QUEUE 1 128 #define TOTAL_TX_QUEUES \ 129 (NUM_EDCA_QUEUES + NUM_HCCA_QUEUES + NUM_BA_QUEUES + NUM_MGMT_QUEUES + NUM_ACK_EVENT_QUEUE) 130 #define MAX_TXWCB_QUEUES TOTAL_TX_QUEUES - NUM_ACK_EVENT_QUEUE 131 #define MAX_RXWCB_QUEUES 1 132 133 //============================================================================= 134 // PUBLIC DEFINITIONS 135 //============================================================================= 136 137 #define RATE_INDEX_MAX_ARRAY 14 138 #define WOW_MAX_STATION 32 139 140 /* 141 * Hardware tx/rx descriptors. 142 * 143 * NB: tx descriptor size must match f/w expected size 144 * because f/w prefetch's the next descriptor linearly 145 * and doesn't chase the next pointer. 146 */ 147 struct mwl_txdesc { 148 uint32_t Status; 149 #define EAGLE_TXD_STATUS_IDLE 0x00000000 150 #define EAGLE_TXD_STATUS_USED 0x00000001 151 #define EAGLE_TXD_STATUS_OK 0x00000001 152 #define EAGLE_TXD_STATUS_OK_RETRY 0x00000002 153 #define EAGLE_TXD_STATUS_OK_MORE_RETRY 0x00000004 154 #define EAGLE_TXD_STATUS_MULTICAST_TX 0x00000008 155 #define EAGLE_TXD_STATUS_BROADCAST_TX 0x00000010 156 #define EAGLE_TXD_STATUS_FAILED_LINK_ERROR 0x00000020 157 #define EAGLE_TXD_STATUS_FAILED_EXCEED_LIMIT 0x00000040 158 #define EAGLE_TXD_STATUS_FAILED_XRETRY EAGLE_TXD_STATUS_FAILED_EXCEED_LIMIT 159 #define EAGLE_TXD_STATUS_FAILED_AGING 0x00000080 160 #define EAGLE_TXD_STATUS_FW_OWNED 0x80000000 161 uint8_t DataRate; 162 uint8_t TxPriority; 163 uint16_t QosCtrl; 164 uint32_t PktPtr; 165 uint16_t PktLen; 166 uint8_t DestAddr[6]; 167 uint32_t pPhysNext; 168 uint32_t SapPktInfo; 169 #define EAGLE_TXD_MODE_BONLY 1 170 #define EAGLE_TXD_MODE_GONLY 2 171 #define EAGLE_TXD_MODE_BG 3 172 #define EAGLE_TXD_MODE_NONLY 4 173 #define EAGLE_TXD_MODE_BN 5 174 #define EAGLE_TXD_MODE_GN 6 175 #define EAGLE_TXD_MODE_BGN 7 176 #define EAGLE_TXD_MODE_AONLY 8 177 #define EAGLE_TXD_MODE_AG 10 178 #define EAGLE_TXD_MODE_AN 12 179 uint16_t Format; 180 #define EAGLE_TXD_FORMAT 0x0001 /* frame format/rate */ 181 #define EAGLE_TXD_FORMAT_LEGACY 0x0000 /* legacy rate frame */ 182 #define EAGLE_TXD_FORMAT_HT 0x0001 /* HT rate frame */ 183 #define EAGLE_TXD_GI 0x0002 /* guard interval */ 184 #define EAGLE_TXD_GI_SHORT 0x0002 /* short guard interval */ 185 #define EAGLE_TXD_GI_LONG 0x0000 /* long guard interval */ 186 #define EAGLE_TXD_CHW 0x0004 /* channel width */ 187 #define EAGLE_TXD_CHW_20 0x0000 /* 20MHz channel width */ 188 #define EAGLE_TXD_CHW_40 0x0004 /* 40MHz channel width */ 189 #define EAGLE_TXD_RATE 0x01f8 /* tx rate (legacy)/ MCS */ 190 #define EAGLE_TXD_RATE_S 3 191 #define EAGLE_TXD_ADV 0x0600 /* advanced coding */ 192 #define EAGLE_TXD_ADV_S 9 193 #define EAGLE_TXD_ADV_NONE 0x0000 194 #define EAGLE_TXD_ADV_LDPC 0x0200 195 #define EAGLE_TXD_ADV_RS 0x0400 196 /* NB: 3 is reserved */ 197 #define EAGLE_TXD_ANTENNA 0x1800 /* antenna select */ 198 #define EAGLE_TXD_ANTENNA_S 11 199 #define EAGLE_TXD_EXTCHAN 0x6000 /* extension channel */ 200 #define EAGLE_TXD_EXTCHAN_S 13 201 #define EAGLE_TXD_EXTCHAN_HI 0x0000 /* above */ 202 #define EAGLE_TXD_EXTCHAN_LO 0x2000 /* below */ 203 #define EAGLE_TXD_PREAMBLE 0x8000 204 #define EAGLE_TXD_PREAMBLE_SHORT 0x8000 /* short preamble */ 205 #define EAGLE_TXD_PREAMBLE_LONG 0x0000 /* long preamble */ 206 uint16_t pad; /* align to 4-byte boundary */ 207 #define EAGLE_TXD_FIXED_RATE 0x0100 /* get tx rate from Format */ 208 #define EAGLE_TXD_DONT_AGGR 0x0200 /* don't aggregate frame */ 209 uint32_t ack_wcb_addr; 210 } __packed; 211 212 struct mwl_ant_info { 213 uint8_t rssi_a; /* RSSI for antenna A */ 214 uint8_t rssi_b; /* RSSI for antenna B */ 215 uint8_t rssi_c; /* RSSI for antenna C */ 216 uint8_t rsvd1; /* Reserved */ 217 uint8_t nf_a; /* Noise floor for antenna A */ 218 uint8_t nf_b; /* Noise floor for antenna B */ 219 uint8_t nf_c; /* Noise floor for antenna C */ 220 uint8_t rsvd2; /* Reserved */ 221 uint8_t nf; /* Noise floor */ 222 uint8_t rsvd3[3]; /* Reserved - To make word aligned */ 223 } __packed; 224 225 struct mwl_rxdesc { 226 uint8_t RxControl; /* control element */ 227 #define EAGLE_RXD_CTRL_DRIVER_OWN 0x00 228 #define EAGLE_RXD_CTRL_OS_OWN 0x04 229 #define EAGLE_RXD_CTRL_DMA_OWN 0x80 230 uint8_t RSSI; /* received signal strengt indication */ 231 uint8_t Status; /* status field w/ USED bit */ 232 #define EAGLE_RXD_STATUS_IDLE 0x00 233 #define EAGLE_RXD_STATUS_OK 0x01 234 #define EAGLE_RXD_STATUS_MULTICAST_RX 0x02 235 #define EAGLE_RXD_STATUS_BROADCAST_RX 0x04 236 #define EAGLE_RXD_STATUS_FRAGMENT_RX 0x08 237 #define EAGLE_RXD_STATUS_GENERAL_DECRYPT_ERR 0xff 238 #define EAGLE_RXD_STATUS_DECRYPT_ERR_MASK 0x80 239 #define EAGLE_RXD_STATUS_TKIP_MIC_DECRYPT_ERR 0x02 240 #define EAGLE_RXD_STATUS_WEP_ICV_DECRYPT_ERR 0x04 241 #define EAGLE_RXD_STATUS_TKIP_ICV_DECRYPT_ERR 0x08 242 uint8_t Channel; /* channel # pkt received on */ 243 uint16_t PktLen; /* total length of received data */ 244 uint8_t SQ2; /* not used */ 245 uint8_t Rate; /* received data rate */ 246 uint32_t pPhysBuffData; /* physical address of payload data */ 247 uint32_t pPhysNext; /* physical address of next RX desc */ 248 uint16_t QosCtrl; /* received QosCtrl field variable */ 249 uint16_t HtSig2; /* like name states */ 250 #ifdef MWL_ANT_INFO_SUPPORT 251 struct mwl_ant_info ai; /* antenna info */ 252 #endif 253 } __packed; 254 255 /* 256 // Define OpMode for SoftAP/Station mode 257 // 258 // The following mode signature has to be written to PCI scratch register#0 259 // right after successfully downloading the last block of firmware and 260 // before waiting for firmware ready signature 261 */ 262 #define HostCmd_STA_MODE 0x5A 263 #define HostCmd_SOFTAP_MODE 0xA5 264 265 #define HostCmd_STA_FWRDY_SIGNATURE 0xF0F1F2F4 266 #define HostCmd_SOFTAP_FWRDY_SIGNATURE 0xF1F2F4A5 267 268 //*************************************************************************** 269 //*************************************************************************** 270 271 //*************************************************************************** 272 273 #define HostCmd_CMD_CODE_DNLD 0x0001 274 #define HostCmd_CMD_GET_HW_SPEC 0x0003 275 #define HostCmd_CMD_SET_HW_SPEC 0x0004 276 #define HostCmd_CMD_MAC_MULTICAST_ADR 0x0010 277 #define HostCmd_CMD_802_11_GET_STAT 0x0014 278 #define HostCmd_CMD_MAC_REG_ACCESS 0x0019 279 #define HostCmd_CMD_BBP_REG_ACCESS 0x001a 280 #define HostCmd_CMD_RF_REG_ACCESS 0x001b 281 #define HostCmd_CMD_802_11_RADIO_CONTROL 0x001c 282 #define HostCmd_CMD_802_11_RF_TX_POWER 0x001e 283 #define HostCmd_CMD_802_11_RF_ANTENNA 0x0020 284 #define HostCmd_CMD_SET_BEACON 0x0100 285 #define HostCmd_CMD_SET_AID 0x010d 286 #define HostCmd_CMD_SET_RF_CHANNEL 0x010a 287 #define HostCmd_CMD_SET_INFRA_MODE 0x010e 288 #define HostCmd_CMD_SET_G_PROTECT_FLAG 0x010f 289 #define HostCmd_CMD_802_11_RTS_THSD 0x0113 290 #define HostCmd_CMD_802_11_SET_SLOT 0x0114 291 292 #define HostCmd_CMD_802_11H_DETECT_RADAR 0x0120 293 #define HostCmd_CMD_SET_WMM_MODE 0x0123 294 #define HostCmd_CMD_HT_GUARD_INTERVAL 0x0124 295 #define HostCmd_CMD_SET_FIXED_RATE 0x0126 296 #define HostCmd_CMD_SET_LINKADAPT_CS_MODE 0x0129 297 #define HostCmd_CMD_SET_MAC_ADDR 0x0202 298 #define HostCmd_CMD_SET_RATE_ADAPT_MODE 0x0203 299 #define HostCmd_CMD_GET_WATCHDOG_BITMAP 0x0205 300 301 //SoftAP command code 302 #define HostCmd_CMD_BSS_START 0x1100 303 #define HostCmd_CMD_SET_NEW_STN 0x1111 304 #define HostCmd_CMD_SET_KEEP_ALIVE 0x1112 305 #define HostCmd_CMD_SET_APMODE 0x1114 306 #define HostCmd_CMD_SET_SWITCH_CHANNEL 0x1121 307 308 /* 309 @HWENCR@ 310 Command to update firmware encryption keys. 311 */ 312 #define HostCmd_CMD_UPDATE_ENCRYPTION 0x1122 313 /* 314 @11E-BA@ 315 Command to create/destroy block ACK 316 */ 317 #define HostCmd_CMD_BASTREAM 0x1125 318 #define HostCmd_CMD_SET_RIFS 0x1126 319 #define HostCmd_CMD_SET_N_PROTECT_FLAG 0x1131 320 #define HostCmd_CMD_SET_N_PROTECT_OPMODE 0x1132 321 #define HostCmd_CMD_SET_OPTIMIZATION_LEVEL 0x1133 322 #define HostCmd_CMD_GET_CALTABLE 0x1134 323 #define HostCmd_CMD_SET_MIMOPSHT 0x1135 324 #define HostCmd_CMD_GET_BEACON 0x1138 325 #define HostCmd_CMD_SET_REGION_CODE 0x1139 326 #define HostCmd_CMD_SET_POWERSAVESTATION 0x1140 327 #define HostCmd_CMD_SET_TIM 0x1141 328 #define HostCmd_CMD_GET_TIM 0x1142 329 #define HostCmd_CMD_GET_SEQNO 0x1143 330 #define HostCmd_CMD_DWDS_ENABLE 0x1144 331 #define HostCmd_CMD_AMPDU_RETRY_RATEDROP_MODE 0x1145 332 #define HostCmd_CMD_CFEND_ENABLE 0x1146 333 334 /* 335 // Define general result code for each command 336 */ 337 #define HostCmd_RESULT_OK 0x0000 // OK 338 #define HostCmd_RESULT_ERROR 0x0001 // Genenral error 339 #define HostCmd_RESULT_NOT_SUPPORT 0x0002 // Command is not valid 340 #define HostCmd_RESULT_PENDING 0x0003 // Command is pending (will be processed) 341 #define HostCmd_RESULT_BUSY 0x0004 // System is busy (command ignored) 342 #define HostCmd_RESULT_PARTIAL_DATA 0x0005 // Data buffer is not big enough 343 344 345 /* 346 // Definition of action or option for each command 347 // 348 // Define general purpose action 349 */ 350 #define HostCmd_ACT_GEN_READ 0x0000 351 #define HostCmd_ACT_GEN_WRITE 0x0001 352 #define HostCmd_ACT_GEN_GET 0x0000 353 #define HostCmd_ACT_GEN_SET 0x0001 354 #define HostCmd_ACT_GEN_OFF 0x0000 355 #define HostCmd_ACT_GEN_ON 0x0001 356 357 #define HostCmd_ACT_DIFF_CHANNEL 0x0002 358 #define HostCmd_ACT_GEN_SET_LIST 0x0002 359 360 // Define action or option for HostCmd_FW_USE_FIXED_RATE 361 #define HostCmd_ACT_USE_FIXED_RATE 0x0001 362 #define HostCmd_ACT_NOT_USE_FIXED_RATE 0x0002 363 364 // Define action or option for HostCmd_CMD_802_11_SET_WEP 365 //#define HostCmd_ACT_ENABLE 0x0001 // Use MAC control for WEP on/off 366 //#define HostCmd_ACT_DISABLE 0x0000 367 #define HostCmd_ACT_ADD 0x0002 368 #define HostCmd_ACT_REMOVE 0x0004 369 #define HostCmd_ACT_USE_DEFAULT 0x0008 370 371 #define HostCmd_TYPE_WEP_40_BIT 0x0001 // 40 bit 372 #define HostCmd_TYPE_WEP_104_BIT 0x0002 // 104 bit 373 #define HostCmd_TYPE_WEP_128_BIT 0x0003 // 128 bit 374 #define HostCmd_TYPE_WEP_TX_KEY 0x0004 // TX WEP 375 376 #define HostCmd_NUM_OF_WEP_KEYS 4 377 378 #define HostCmd_WEP_KEY_INDEX_MASK 0x3fffffff 379 380 381 // Define action or option for HostCmd_CMD_802_11_RESET 382 #define HostCmd_ACT_HALT 0x0001 383 #define HostCmd_ACT_RESTART 0x0002 384 385 // Define action or option for HostCmd_CMD_802_11_RADIO_CONTROL 386 #define HostCmd_TYPE_AUTO_PREAMBLE 0x0001 387 #define HostCmd_TYPE_SHORT_PREAMBLE 0x0002 388 #define HostCmd_TYPE_LONG_PREAMBLE 0x0003 389 390 // Define action or option for CMD_802_11_RF_CHANNEL 391 #define HostCmd_TYPE_802_11A 0x0001 392 #define HostCmd_TYPE_802_11B 0x0002 393 394 // Define action or option for HostCmd_CMD_802_11_RF_TX_POWER 395 #define HostCmd_ACT_TX_POWER_OPT_SET_HIGH 0x0003 396 #define HostCmd_ACT_TX_POWER_OPT_SET_MID 0x0002 397 #define HostCmd_ACT_TX_POWER_OPT_SET_LOW 0x0001 398 #define HostCmd_ACT_TX_POWER_OPT_SET_AUTO 0x0000 399 400 #define HostCmd_ACT_TX_POWER_LEVEL_MIN 0x000e // in dbm 401 #define HostCmd_ACT_TX_POWER_LEVEL_GAP 0x0001 // in dbm 402 // Define action or option for HostCmd_CMD_802_11_DATA_RATE 403 #define HostCmd_ACT_SET_TX_AUTO 0x0000 404 #define HostCmd_ACT_SET_TX_FIX_RATE 0x0001 405 #define HostCmd_ACT_GET_TX_RATE 0x0002 406 407 #define HostCmd_ACT_SET_RX 0x0001 408 #define HostCmd_ACT_SET_TX 0x0002 409 #define HostCmd_ACT_SET_BOTH 0x0003 410 #define HostCmd_ACT_GET_RX 0x0004 411 #define HostCmd_ACT_GET_TX 0x0008 412 #define HostCmd_ACT_GET_BOTH 0x000c 413 414 #define TYPE_ANTENNA_DIVERSITY 0xffff 415 416 // Define action or option for HostCmd_CMD_802_11_PS_MODE 417 #define HostCmd_TYPE_CAM 0x0000 418 #define HostCmd_TYPE_MAX_PSP 0x0001 419 #define HostCmd_TYPE_FAST_PSP 0x0002 420 421 #define HostCmd_CMD_SET_EDCA_PARAMS 0x0115 422 423 //============================================================================= 424 // HOST COMMAND DEFINITIONS 425 //============================================================================= 426 427 // 428 // Definition of data structure for each command 429 // 430 // Define general data structure 431 typedef struct { 432 uint16_t Cmd; 433 uint16_t Length; 434 #ifdef MWL_MBSS_SUPPORT 435 uint8_t SeqNum; 436 uint8_t MacId; 437 #else 438 uint16_t SeqNum; 439 #endif 440 uint16_t Result; 441 } __packed FWCmdHdr; 442 443 typedef struct { 444 FWCmdHdr CmdHdr; 445 uint8_t Version; // HW revision 446 uint8_t HostIf; // Host interface 447 uint16_t NumOfMCastAdr; // Max. number of Multicast address FW can handle 448 uint8_t PermanentAddr[6]; // MAC address 449 uint16_t RegionCode; // Region Code 450 uint32_t FWReleaseNumber; // 4 byte of FW release number 451 uint32_t ulFwAwakeCookie; // Firmware awake cookie 452 uint32_t DeviceCaps; // Device capabilities (see above) 453 uint32_t RxPdWrPtr; // Rx shared memory queue 454 uint32_t NumTxQueues; // # TX queues in WcbBase array 455 uint32_t WcbBase[MAX_TXWCB_QUEUES]; // TX WCB Rings 456 uint32_t Flags; 457 #define SET_HW_SPEC_DISABLEMBSS 0x08 458 #define SET_HW_SPEC_HOSTFORM_BEACON 0x10 459 #define SET_HW_SPEC_HOSTFORM_PROBERESP 0x20 460 #define SET_HW_SPEC_HOST_POWERSAVE 0x40 461 #define SET_HW_SPEC_HOSTENCRDECR_MGMT 0x80 462 uint32_t TxWcbNumPerQueue; 463 uint32_t TotalRxWcb; 464 } __packed HostCmd_DS_SET_HW_SPEC; 465 466 typedef struct { 467 FWCmdHdr CmdHdr; 468 u_int8_t Version; /* version of the HW */ 469 u_int8_t HostIf; /* host interface */ 470 u_int16_t NumOfWCB; /* Max. number of WCB FW can handle */ 471 u_int16_t NumOfMCastAddr; /* MaxNbr of MC addresses FW can handle */ 472 u_int8_t PermanentAddr[6]; /* MAC address programmed in HW */ 473 u_int16_t RegionCode; 474 u_int16_t NumberOfAntenna; /* Number of antenna used */ 475 u_int32_t FWReleaseNumber; /* 4 byte of FW release number */ 476 u_int32_t WcbBase0; 477 u_int32_t RxPdWrPtr; 478 u_int32_t RxPdRdPtr; 479 u_int32_t ulFwAwakeCookie; 480 u_int32_t WcbBase1[TOTAL_TX_QUEUES-1]; 481 } __packed HostCmd_DS_GET_HW_SPEC; 482 483 typedef struct { 484 FWCmdHdr CmdHdr; 485 u_int32_t Enable; /* FALSE: Disable or TRUE: Enable */ 486 } __packed HostCmd_DS_BSS_START; 487 488 489 typedef struct { 490 u_int8_t ElemId; 491 u_int8_t Len; 492 u_int8_t OuiType[4]; /* 00:50:f2:01 */ 493 u_int8_t Ver[2]; 494 u_int8_t GrpKeyCipher[4]; 495 u_int8_t PwsKeyCnt[2]; 496 u_int8_t PwsKeyCipherList[4]; 497 u_int8_t AuthKeyCnt[2]; 498 u_int8_t AuthKeyList[4]; 499 } __packed RsnIE_t; 500 501 typedef struct { 502 u_int8_t ElemId; 503 u_int8_t Len; 504 u_int8_t Ver[2]; 505 u_int8_t GrpKeyCipher[4]; 506 u_int8_t PwsKeyCnt[2]; 507 u_int8_t PwsKeyCipherList[4]; 508 u_int8_t AuthKeyCnt[2]; 509 u_int8_t AuthKeyList[4]; 510 u_int8_t RsnCap[2]; 511 } __packed Rsn48IE_t; 512 513 typedef struct { 514 u_int8_t ElementId; 515 u_int8_t Len; 516 u_int8_t CfpCnt; 517 u_int8_t CfpPeriod; 518 u_int16_t CfpMaxDuration; 519 u_int16_t CfpDurationRemaining; 520 } __packed CfParams_t; 521 522 typedef struct { 523 u_int8_t ElementId; 524 u_int8_t Len; 525 u_int16_t AtimWindow; 526 } __packed IbssParams_t; 527 528 typedef union { 529 CfParams_t CfParamSet; 530 IbssParams_t IbssParamSet; 531 } __packed SsParams_t; 532 533 typedef struct { 534 u_int8_t ElementId; 535 u_int8_t Len; 536 u_int16_t DwellTime; 537 u_int8_t HopSet; 538 u_int8_t HopPattern; 539 u_int8_t HopIndex; 540 } __packed FhParams_t; 541 542 typedef struct { 543 u_int8_t ElementId; 544 u_int8_t Len; 545 u_int8_t CurrentChan; 546 } __packed DsParams_t; 547 548 typedef union { 549 FhParams_t FhParamSet; 550 DsParams_t DsParamSet; 551 } __packed PhyParams_t; 552 553 typedef struct { 554 u_int8_t FirstChannelNum; 555 u_int8_t NumOfChannels; 556 u_int8_t MaxTxPwrLevel; 557 } __packed ChannelInfo_t; 558 559 typedef struct { 560 u_int8_t ElementId; 561 u_int8_t Len; 562 u_int8_t CountryStr[3]; 563 ChannelInfo_t ChannelInfo[40]; 564 } __packed Country_t; 565 566 typedef struct { 567 u_int8_t AIFSN : 4; 568 u_int8_t ACM : 1; 569 u_int8_t ACI : 2; 570 u_int8_t rsvd : 1; 571 572 }__packed ACIAIFSN_field_t; 573 574 typedef struct { 575 u_int8_t ECW_min : 4; 576 u_int8_t ECW_max : 4; 577 }__packed ECWmin_max_field_t; 578 579 typedef struct { 580 ACIAIFSN_field_t ACI_AIFSN; 581 ECWmin_max_field_t ECW_min_max; 582 u_int16_t TXOP_lim; 583 }__packed ACparam_rcd_t; 584 585 typedef struct { 586 u_int8_t ElementId; 587 u_int8_t Len; 588 u_int8_t OUI[3]; 589 u_int8_t Type; 590 u_int8_t Subtype; 591 u_int8_t version; 592 u_int8_t rsvd; 593 ACparam_rcd_t AC_BE; 594 ACparam_rcd_t AC_BK; 595 ACparam_rcd_t AC_VI; 596 ACparam_rcd_t AC_VO; 597 } __packed WMM_param_elem_t ; 598 599 typedef struct { 600 #ifdef MWL_MBSS_SUPPORT 601 u_int8_t StaMacAddr[6]; 602 #endif 603 u_int8_t SsId[32]; 604 u_int8_t BssType; 605 u_int16_t BcnPeriod; 606 u_int8_t DtimPeriod; 607 SsParams_t SsParamSet; 608 PhyParams_t PhyParamSet; 609 u_int16_t ProbeDelay; 610 u_int16_t CapInfo; /* see below */ 611 u_int8_t BssBasicRateSet[14]; 612 u_int8_t OpRateSet[14]; 613 RsnIE_t RsnIE; 614 Rsn48IE_t Rsn48IE; 615 WMM_param_elem_t WMMParam; 616 Country_t Country; 617 u_int32_t ApRFType; /* 0->B, 1->G, 2->Mixed, 3->A, 4->11J */ 618 } __packed StartCmd_t; 619 620 #define HostCmd_CAPINFO_DEFAULT 0x0000 621 #define HostCmd_CAPINFO_ESS 0x0001 622 #define HostCmd_CAPINFO_IBSS 0x0002 623 #define HostCmd_CAPINFO_CF_POLLABLE 0x0004 624 #define HostCmd_CAPINFO_CF_REQUEST 0x0008 625 #define HostCmd_CAPINFO_PRIVACY 0x0010 626 #define HostCmd_CAPINFO_SHORT_PREAMBLE 0x0020 627 #define HostCmd_CAPINFO_PBCC 0x0040 628 #define HostCmd_CAPINFO_CHANNEL_AGILITY 0x0080 629 #define HostCmd_CAPINFO_SHORT_SLOT 0x0400 630 #define HostCmd_CAPINFO_DSSS_OFDM 0x2000 631 632 typedef struct { 633 FWCmdHdr CmdHdr; 634 StartCmd_t StartCmd; 635 } __packed HostCmd_DS_AP_BEACON; 636 637 typedef struct { 638 FWCmdHdr CmdHdr; 639 uint16_t FrmBodyLen; 640 uint8_t FrmBody[1]; /* NB: variable length */ 641 } __packed HostCmd_DS_SET_BEACON; 642 643 // Define data structure for HostCmd_CMD_MAC_MULTICAST_ADR 644 typedef struct { 645 FWCmdHdr CmdHdr; 646 uint16_t Action; 647 uint16_t NumOfAdrs; 648 #define MWL_HAL_MCAST_MAX 32 649 uint8_t MACList[6*32]; 650 } __packed HostCmd_DS_MAC_MULTICAST_ADR; 651 652 // Indicate to FW the current state of AP ERP info 653 typedef struct { 654 FWCmdHdr CmdHdr; 655 uint32_t GProtectFlag; 656 } __packed HostCmd_FW_SET_G_PROTECT_FLAG; 657 658 typedef struct { 659 FWCmdHdr CmdHdr; 660 } __packed HostCmd_FW_SET_INFRA_MODE; 661 662 // Define data structure for HostCmd_CMD_802_11_RF_CHANNEL 663 typedef struct { 664 FWCmdHdr CmdHdr; 665 uint16_t Action; 666 uint8_t CurrentChannel; /* channel # */ 667 uint32_t ChannelFlags; /* see below */ 668 } __packed HostCmd_FW_SET_RF_CHANNEL; 669 670 /* bits 0-5 specify frequency band */ 671 #define FREQ_BAND_2DOT4GHZ 0x0001 672 #define FREQ_BAND_4DOT9GHZ 0x0002 /* XXX not implemented */ 673 #define FREQ_BAND_5GHZ 0x0004 674 #define FREQ_BAND_5DOT2GHZ 0x0008 /* XXX not implemented */ 675 /* bits 6-10 specify channel width */ 676 #define CH_AUTO_WIDTH 0x0000 /* XXX not used? */ 677 #define CH_10_MHz_WIDTH 0x0040 678 #define CH_20_MHz_WIDTH 0x0080 679 #define CH_40_MHz_WIDTH 0x0100 680 /* bits 11-12 specify extension channel */ 681 #define EXT_CH_NONE 0x0000 /* no extension channel */ 682 #define EXT_CH_ABOVE_CTRL_CH 0x0800 /* extension channel above */ 683 #define EXT_CH_AUTO 0x1000 /* XXX not used? */ 684 #define EXT_CH_BELOW_CTRL_CH 0x1800 /* extension channel below */ 685 /* bits 13-31 are reserved */ 686 687 #define FIXED_RATE_WITH_AUTO_RATE_DROP 0 688 #define FIXED_RATE_WITHOUT_AUTORATE_DROP 1 689 690 #define LEGACY_RATE_TYPE 0 691 #define HT_RATE_TYPE 1 692 693 #define RETRY_COUNT_VALID 0 694 #define RETRY_COUNT_INVALID 1 695 696 typedef struct { 697 // lower rate after the retry count 698 uint32_t FixRateType; //0: legacy, 1: HT 699 uint32_t RetryCountValid; //0: retry count is not valid, 1: use retry count specified 700 } __packed FIX_RATE_FLAG; 701 702 typedef struct { 703 FIX_RATE_FLAG FixRateTypeFlags; 704 uint32_t FixedRate; // legacy rate(not index) or an MCS code. 705 uint32_t RetryCount; 706 } __packed FIXED_RATE_ENTRY; 707 708 typedef struct { 709 FWCmdHdr CmdHdr; 710 uint32_t Action; //HostCmd_ACT_GEN_GET 0x0000 711 //HostCmd_ACT_GEN_SET 0x0001 712 //HostCmd_ACT_NOT_USE_FIXED_RATE 0x0002 713 uint32_t AllowRateDrop; // use fixed rate specified but firmware can drop to 714 uint32_t EntryCount; 715 FIXED_RATE_ENTRY FixedRateTable[4]; 716 uint8_t MulticastRate; 717 uint8_t MultiRateTxType; 718 uint8_t ManagementRate; 719 } __packed HostCmd_FW_USE_FIXED_RATE; 720 721 typedef struct { 722 uint32_t AllowRateDrop; 723 uint32_t EntryCount; 724 FIXED_RATE_ENTRY FixedRateTable[4]; 725 } __packed USE_FIXED_RATE_INFO; 726 727 typedef struct { 728 FWCmdHdr CmdHdr; 729 uint32_t Action; 730 uint32_t GIType; 731 #define GI_TYPE_LONG 0x0001 732 #define GI_TYPE_SHORT 0x0002 733 } __packed HostCmd_FW_HT_GUARD_INTERVAL; 734 735 typedef struct { 736 FWCmdHdr CmdHdr; 737 uint32_t Action; 738 uint8_t RxAntennaMap; 739 uint8_t TxAntennaMap; 740 } __packed HostCmd_FW_HT_MIMO_CONFIG; 741 742 typedef struct { 743 FWCmdHdr CmdHdr; 744 uint16_t Action; 745 uint8_t Slot; // Slot=0 if regular, Slot=1 if short. 746 } __packed HostCmd_FW_SET_SLOT; 747 748 749 // Define data structure for HostCmd_CMD_802_11_GET_STAT 750 typedef struct { 751 FWCmdHdr CmdHdr; 752 uint32_t TxRetrySuccesses; 753 uint32_t TxMultipleRetrySuccesses; 754 uint32_t TxFailures; 755 uint32_t RTSSuccesses; 756 uint32_t RTSFailures; 757 uint32_t AckFailures; 758 uint32_t RxDuplicateFrames; 759 uint32_t FCSErrorCount; 760 uint32_t TxWatchDogTimeouts; 761 uint32_t RxOverflows; //used 762 uint32_t RxFragErrors; //used 763 uint32_t RxMemErrors; //used 764 uint32_t PointerErrors; //used 765 uint32_t TxUnderflows; //used 766 uint32_t TxDone; 767 uint32_t TxDoneBufTryPut; 768 uint32_t TxDoneBufPut; 769 uint32_t Wait4TxBuf; // Put size of requested buffer in here 770 uint32_t TxAttempts; 771 uint32_t TxSuccesses; 772 uint32_t TxFragments; 773 uint32_t TxMulticasts; 774 uint32_t RxNonCtlPkts; 775 uint32_t RxMulticasts; 776 uint32_t RxUndecryptableFrames; 777 uint32_t RxICVErrors; 778 uint32_t RxExcludedFrames; 779 } __packed HostCmd_DS_802_11_GET_STAT; 780 781 782 // Define data structure for HostCmd_CMD_MAC_REG_ACCESS 783 typedef struct { 784 FWCmdHdr CmdHdr; 785 uint16_t Action; 786 uint16_t Offset; 787 uint32_t Value; 788 uint16_t Reserved; 789 } __packed HostCmd_DS_MAC_REG_ACCESS; 790 791 // Define data structure for HostCmd_CMD_BBP_REG_ACCESS 792 typedef struct { 793 FWCmdHdr CmdHdr; 794 uint16_t Action; 795 uint16_t Offset; 796 uint8_t Value; 797 uint8_t Reserverd[3]; 798 } __packed HostCmd_DS_BBP_REG_ACCESS; 799 800 // Define data structure for HostCmd_CMD_RF_REG_ACCESS 801 typedef struct { 802 FWCmdHdr CmdHdr; 803 uint16_t Action; 804 uint16_t Offset; 805 uint8_t Value; 806 uint8_t Reserverd[3]; 807 } __packed HostCmd_DS_RF_REG_ACCESS; 808 809 810 // Define data structure for HostCmd_CMD_802_11_RADIO_CONTROL 811 typedef struct { 812 FWCmdHdr CmdHdr; 813 uint16_t Action; 814 uint16_t Control; // @bit0: 1/0,on/off, @bit1: 1/0, long/short @bit2: 1/0,auto/fix 815 uint16_t RadioOn; 816 } __packed HostCmd_DS_802_11_RADIO_CONTROL; 817 818 819 #define TX_POWER_LEVEL_TOTAL 8 820 // Define data structure for HostCmd_CMD_802_11_RF_TX_POWER 821 typedef struct { 822 FWCmdHdr CmdHdr; 823 uint16_t Action; 824 uint16_t SupportTxPowerLevel; 825 uint16_t CurrentTxPowerLevel; 826 uint16_t Reserved; 827 uint16_t PowerLevelList[TX_POWER_LEVEL_TOTAL]; 828 } __packed HostCmd_DS_802_11_RF_TX_POWER; 829 830 // Define data structure for HostCmd_CMD_802_11_RF_ANTENNA 831 typedef struct _HostCmd_DS_802_11_RF_ANTENNA { 832 FWCmdHdr CmdHdr; 833 uint16_t Action; 834 uint16_t AntennaMode; // Number of antennas or 0xffff(diversity) 835 } __packed HostCmd_DS_802_11_RF_ANTENNA; 836 837 // Define data structure for HostCmd_CMD_802_11_PS_MODE 838 typedef struct { 839 FWCmdHdr CmdHdr; 840 uint16_t Action; 841 uint16_t PowerMode; // CAM, Max.PSP or Fast PSP 842 } __packed HostCmd_DS_802_11_PS_MODE; 843 844 typedef struct { 845 FWCmdHdr CmdHdr; 846 uint16_t Action; 847 uint16_t Threshold; 848 } __packed HostCmd_DS_802_11_RTS_THSD; 849 850 // used for stand alone bssid sets/clears 851 typedef struct { 852 FWCmdHdr CmdHdr; 853 #ifdef MWL_MBSS_SUPPORT 854 uint16_t MacType; 855 #define WL_MAC_TYPE_PRIMARY_CLIENT 0 856 #define WL_MAC_TYPE_SECONDARY_CLIENT 1 857 #define WL_MAC_TYPE_PRIMARY_AP 2 858 #define WL_MAC_TYPE_SECONDARY_AP 3 859 #endif 860 uint8_t MacAddr[6]; 861 } __packed HostCmd_DS_SET_MAC, 862 HostCmd_FW_SET_BSSID, 863 HostCmd_FW_SET_MAC; 864 865 // Indicate to FW to send out PS Poll 866 typedef struct { 867 FWCmdHdr CmdHdr; 868 uint32_t PSPoll; 869 } __packed HostCmd_FW_TX_POLL; 870 871 // used for AID sets/clears 872 typedef struct { 873 FWCmdHdr CmdHdr; 874 uint16_t AssocID; 875 uint8_t MacAddr[6]; //AP's Mac Address(BSSID) 876 uint32_t GProtection; 877 uint8_t ApRates[ RATE_INDEX_MAX_ARRAY]; 878 } __packed HostCmd_FW_SET_AID; 879 880 typedef struct { 881 uint32_t LegacyRateBitMap; 882 uint32_t HTRateBitMap; 883 uint16_t CapInfo; 884 uint16_t HTCapabilitiesInfo; 885 uint8_t MacHTParamInfo; 886 uint8_t Rev; 887 struct { 888 uint8_t ControlChan; 889 uint8_t AddChan; 890 uint16_t OpMode; 891 uint16_t stbc; 892 } __packed AddHtInfo; 893 } __packed PeerInfo_t; 894 895 typedef struct { 896 FWCmdHdr CmdHdr; 897 uint16_t AID; 898 uint8_t MacAddr[6]; 899 uint16_t StnId; 900 uint16_t Action; 901 uint16_t Reserved; 902 PeerInfo_t PeerInfo; 903 uint8_t Qosinfo; 904 uint8_t isQosSta; 905 uint32_t FwStaPtr; 906 } __packed HostCmd_FW_SET_NEW_STN; 907 908 typedef struct { 909 FWCmdHdr CmdHdr; 910 uint8_t tick; 911 } __packed HostCmd_FW_SET_KEEP_ALIVE_TICK; 912 913 typedef struct { 914 FWCmdHdr CmdHdr; 915 uint8_t QNum; 916 } __packed HostCmd_FW_SET_RIFS; 917 918 typedef struct { 919 FWCmdHdr CmdHdr; 920 uint8_t ApMode; 921 } __packed HostCmd_FW_SET_APMODE; 922 923 typedef struct { 924 FWCmdHdr CmdHdr; 925 uint16_t Action; // see following 926 uint16_t RadarTypeCode; 927 } __packed HostCmd_802_11h_Detect_Radar; 928 929 #define DR_DFS_DISABLE 0 930 #define DR_CHK_CHANNEL_AVAILABLE_START 1 931 #define DR_CHK_CHANNEL_AVAILABLE_STOP 2 932 #define DR_IN_SERVICE_MONITOR_START 3 933 934 //New Structure for Update Tim 30/9/2003 935 typedef struct { 936 FWCmdHdr CmdHdr; 937 uint16_t Aid; 938 uint32_t Set; 939 } __packed HostCmd_UpdateTIM; 940 941 typedef struct { 942 FWCmdHdr CmdHdr; 943 uint32_t SsidBroadcastEnable; 944 } __packed HostCmd_SSID_BROADCAST; 945 946 typedef struct { 947 FWCmdHdr CmdHdr; 948 uint32_t WdsEnable; 949 } __packed HostCmd_WDS; 950 951 typedef struct { 952 FWCmdHdr CmdHdr; 953 uint32_t Next11hChannel; 954 uint32_t Mode; 955 uint32_t InitialCount; 956 uint32_t ChannelFlags ; 957 } __packed HostCmd_SET_SWITCH_CHANNEL; 958 959 typedef struct { 960 FWCmdHdr CmdHdr; 961 uint32_t SpectrumMgmt; 962 } __packed HostCmd_SET_SPECTRUM_MGMT; 963 964 typedef struct { 965 FWCmdHdr CmdHdr; 966 int32_t PowerConstraint; 967 } __packed HostCmd_SET_POWER_CONSTRAINT; 968 969 typedef struct { 970 uint8_t FirstChannelNo; 971 uint8_t NoofChannel; 972 uint8_t MaxTransmitPw; 973 } __packed DomainChannelEntry; 974 975 typedef struct { 976 uint8_t CountryString[3]; 977 uint8_t GChannelLen; 978 DomainChannelEntry DomainEntryG[1]; /** Assume only 1 G zone **/ 979 uint8_t AChannelLen; 980 DomainChannelEntry DomainEntryA[20]; /** Assume max of 5 A zone **/ 981 } __packed DomainCountryInfo; 982 983 typedef struct { 984 FWCmdHdr CmdHdr; 985 uint32_t Action ; // 0 -> unset, 1 ->set 986 DomainCountryInfo DomainInfo ; 987 } __packed HostCmd_SET_COUNTRY_INFO; 988 989 typedef struct { 990 FWCmdHdr CmdHdr; 991 uint16_t regionCode ; 992 } __packed HostCmd_SET_REGIONCODE_INFO; 993 994 // for HostCmd_CMD_SET_WMM_MODE 995 typedef struct { 996 FWCmdHdr CmdHdr; 997 uint16_t Action; // 0->unset, 1->set 998 } __packed HostCmd_FW_SetWMMMode; 999 1000 typedef struct { 1001 FWCmdHdr CmdHdr; 1002 uint16_t Action; // 0->unset, 1->set 1003 uint16_t IeListLen; 1004 uint8_t IeList[200]; 1005 } __packed HostCmd_FW_SetIEs; 1006 1007 #define EDCA_PARAM_SIZE 18 1008 #define BA_PARAM_SIZE 2 1009 1010 typedef struct { 1011 FWCmdHdr CmdHdr; 1012 uint16_t Action; //0 = get all, 0x1 =set CWMin/Max, 0x2 = set TXOP , 0x4 =set AIFSN 1013 uint16_t TxOP; // in unit of 32 us 1014 uint32_t CWMax; // 0~15 1015 uint32_t CWMin; // 0~15 1016 uint8_t AIFSN; 1017 uint8_t TxQNum; // Tx Queue number. 1018 } __packed HostCmd_FW_SET_EDCA_PARAMS; 1019 1020 /****************************************************************************** 1021 @HWENCR@ 1022 Hardware Encryption related data structures and constant definitions. 1023 Note that all related changes are marked with the @HWENCR@ tag. 1024 *******************************************************************************/ 1025 1026 #define MAX_ENCR_KEY_LENGTH 16 /* max 128 bits - depends on type */ 1027 #define MIC_KEY_LENGTH 8 /* size of Tx/Rx MIC key - 8 bytes*/ 1028 1029 #define ENCR_KEY_TYPE_ID_WEP 0x00 /* Key type is WEP */ 1030 #define ENCR_KEY_TYPE_ID_TKIP 0x01 /* Key type is TKIP */ 1031 #define ENCR_KEY_TYPE_ID_AES 0x02 /* Key type is AES-CCMP */ 1032 1033 /* flags used in structure - same as driver EKF_XXX flags */ 1034 #define ENCR_KEY_FLAG_INUSE 0x00000001 /* indicate key is in use */ 1035 #define ENCR_KEY_FLAG_RXGROUPKEY 0x00000002 /* Group key for RX only */ 1036 #define ENCR_KEY_FLAG_TXGROUPKEY 0x00000004 /* Group key for TX */ 1037 #define ENCR_KEY_FLAG_PAIRWISE 0x00000008 /* pairwise */ 1038 #define ENCR_KEY_FLAG_RXONLY 0x00000010 /* only used for RX */ 1039 // These flags are new additions - for hardware encryption commands only. 1040 #define ENCR_KEY_FLAG_AUTHENTICATOR 0x00000020 /* Key is for Authenticator */ 1041 #define ENCR_KEY_FLAG_TSC_VALID 0x00000040 /* Sequence counters valid */ 1042 #define ENCR_KEY_FLAG_WEP_TXKEY 0x01000000 /* Tx key for WEP */ 1043 #define ENCR_KEY_FLAG_MICKEY_VALID 0x02000000 /* Tx/Rx MIC keys are valid */ 1044 1045 /* 1046 UPDATE_ENCRYPTION command action type. 1047 */ 1048 typedef enum { 1049 // request to enable/disable HW encryption 1050 EncrActionEnableHWEncryption, 1051 // request to set encryption key 1052 EncrActionTypeSetKey, 1053 // request to remove one or more keys 1054 EncrActionTypeRemoveKey, 1055 EncrActionTypeSetGroupKey 1056 } ENCR_ACTION_TYPE; 1057 1058 /* 1059 Key material definitions (for WEP, TKIP, & AES-CCMP) 1060 */ 1061 1062 /* 1063 WEP Key material definition 1064 ---------------------------- 1065 WEPKey --> An array of 'MAX_ENCR_KEY_LENGTH' bytes. 1066 Note that we do not support 152bit WEP keys 1067 */ 1068 typedef struct { 1069 // WEP key material (max 128bit) 1070 uint8_t KeyMaterial[ MAX_ENCR_KEY_LENGTH ]; 1071 } __packed WEP_TYPE_KEY; 1072 1073 /* 1074 TKIP Key material definition 1075 ---------------------------- 1076 This structure defines TKIP key material. Note that 1077 the TxMicKey and RxMicKey may or may not be valid. 1078 */ 1079 /* TKIP Sequence counter - 24 bits */ 1080 /* Incremented on each fragment MPDU */ 1081 typedef struct { 1082 uint16_t low; 1083 uint32_t high; 1084 } __packed ENCR_TKIPSEQCNT; 1085 1086 typedef struct { 1087 // TKIP Key material. Key type (group or pairwise key) is 1088 // determined by flags in KEY_PARAM_SET structure. 1089 uint8_t KeyMaterial[ MAX_ENCR_KEY_LENGTH ]; 1090 uint8_t TkipTxMicKey[ MIC_KEY_LENGTH ]; 1091 uint8_t TkipRxMicKey[ MIC_KEY_LENGTH ]; 1092 ENCR_TKIPSEQCNT TkipRsc; 1093 ENCR_TKIPSEQCNT TkipTsc; 1094 } __packed TKIP_TYPE_KEY; 1095 1096 /* 1097 AES-CCMP Key material definition 1098 -------------------------------- 1099 This structure defines AES-CCMP key material. 1100 */ 1101 typedef struct { 1102 // AES Key material 1103 uint8_t KeyMaterial[ MAX_ENCR_KEY_LENGTH ]; 1104 } __packed AES_TYPE_KEY; 1105 1106 /* 1107 Encryption key definition. 1108 -------------------------- 1109 This structure provides all required/essential 1110 information about the key being set/removed. 1111 */ 1112 typedef struct { 1113 uint16_t Length; // Total length of this structure 1114 uint16_t KeyTypeId; // Key type - WEP, TKIP or AES-CCMP. 1115 uint32_t KeyInfo; // key flags (ENCR_KEY_FLAG_XXX_ 1116 uint32_t KeyIndex; // For WEP only - actual key index 1117 uint16_t KeyLen; // Size of the key 1118 union { // Key material (variable size array) 1119 WEP_TYPE_KEY WepKey; 1120 TKIP_TYPE_KEY TkipKey; 1121 AES_TYPE_KEY AesKey; 1122 }__packed Key; 1123 #ifdef MWL_MBSS_SUPPORT 1124 uint8_t Macaddr[6]; 1125 #endif 1126 } __packed KEY_PARAM_SET; 1127 1128 /* 1129 HostCmd_FW_UPDATE_ENCRYPTION 1130 ---------------------------- 1131 Define data structure for updating firmware encryption keys. 1132 1133 */ 1134 typedef struct { 1135 FWCmdHdr CmdHdr; 1136 uint32_t ActionType; // ENCR_ACTION_TYPE 1137 uint32_t DataLength; // size of the data buffer attached. 1138 #ifdef MWL_MBSS_SUPPORT 1139 uint8_t macaddr[6]; 1140 #endif 1141 uint8_t ActionData[1]; 1142 } __packed HostCmd_FW_UPDATE_ENCRYPTION; 1143 1144 1145 typedef struct { 1146 FWCmdHdr CmdHdr; 1147 uint32_t ActionType; // ENCR_ACTION_TYPE 1148 uint32_t DataLength; // size of the data buffer attached. 1149 KEY_PARAM_SET KeyParam; 1150 #ifndef MWL_MBSS_SUPPORT 1151 uint8_t Macaddr[8]; /* XXX? */ 1152 #endif 1153 } __packed HostCmd_FW_UPDATE_ENCRYPTION_SET_KEY; 1154 1155 typedef struct { 1156 // Rate flags - see above. 1157 uint32_t Flags; 1158 // Rate in 500Kbps units. 1159 uint8_t RateKbps; 1160 // 802.11 rate to conversion table index value. 1161 // This is the value required by the firmware/hardware. 1162 uint16_t RateCodeToIndex; 1163 }__packed RATE_INFO; 1164 1165 /* 1166 UPDATE_STADB command action type. 1167 */ 1168 typedef enum { 1169 // request to add entry to stainfo db 1170 StaInfoDbActionAddEntry, 1171 // request to modify peer entry 1172 StaInfoDbActionModifyEntry, 1173 // request to remove peer from stainfo db 1174 StaInfoDbActionRemoveEntry 1175 }__packed STADB_ACTION_TYPE; 1176 1177 /* 1178 @11E-BA@ 1179 802.11e/WMM Related command(s)/data structures 1180 */ 1181 1182 // Flag to indicate if the stream is an immediate block ack stream. 1183 // if this bit is not set, the stream is delayed block ack stream. 1184 #define BASTREAM_FLAG_DELAYED_TYPE 0x00 1185 #define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01 1186 1187 // Flag to indicate the direction of the stream (upstream/downstream). 1188 // If this bit is not set, the direction is downstream. 1189 #define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00 1190 #define BASTREAM_FLAG_DIRECTION_DOWNSTREAM 0x02 1191 #define BASTREAM_FLAG_DIRECTION_DLP 0x04 1192 #define BASTREAM_FLAG_DIRECTION_BOTH 0x06 1193 1194 typedef enum { 1195 BaCreateStream, 1196 BaUpdateStream, 1197 BaDestroyStream, 1198 BaFlushStream, 1199 BaCheckCreateStream 1200 } BASTREAM_ACTION_TYPE; 1201 1202 typedef struct { 1203 uint32_t Context; 1204 } __packed BASTREAM_CONTEXT; 1205 1206 // parameters for block ack creation 1207 typedef struct { 1208 // BA Creation flags - see above 1209 uint32_t Flags; 1210 // idle threshold 1211 uint32_t IdleThrs; 1212 // block ack transmit threshold (after how many pkts should we send BAR?) 1213 uint32_t BarThrs; 1214 // receiver window size 1215 uint32_t WindowSize; 1216 // MAC Address of the BA partner 1217 uint8_t PeerMacAddr[6]; 1218 // Dialog Token 1219 uint8_t DialogToken; 1220 //TID for the traffic stream in this BA 1221 uint8_t Tid; 1222 // shared memory queue ID (not sure if this is required) 1223 uint8_t QueueId; 1224 uint8_t ParamInfo; 1225 // returned by firmware - firmware context pointer. 1226 // this context pointer will be passed to firmware for all future commands. 1227 BASTREAM_CONTEXT FwBaContext; 1228 uint8_t ResetSeqNo; /** 0 or 1**/ 1229 uint16_t StartSeqNo; 1230 1231 // proxy sta MAC Address 1232 uint8_t StaSrcMacAddr[6]; 1233 }__packed BASTREAM_CREATE_STREAM; 1234 1235 // new transmit sequence number information 1236 typedef struct { 1237 // BA flags - see above 1238 uint32_t Flags; 1239 // returned by firmware in the create ba stream response 1240 BASTREAM_CONTEXT FwBaContext; 1241 // new sequence number for this block ack stream 1242 uint16_t BaSeqNum; 1243 }__packed BASTREAM_UPDATE_STREAM; 1244 1245 typedef struct { 1246 // BA Stream flags 1247 uint32_t Flags; 1248 // returned by firmware in the create ba stream response 1249 BASTREAM_CONTEXT FwBaContext; 1250 }__packed BASTREAM_STREAM_INFO; 1251 1252 //Command to create/destroy block ACK 1253 typedef struct { 1254 FWCmdHdr CmdHdr; 1255 uint32_t ActionType; 1256 union 1257 { 1258 // information required to create BA Stream... 1259 BASTREAM_CREATE_STREAM CreateParams; 1260 // update starting/new sequence number etc. 1261 BASTREAM_UPDATE_STREAM UpdtSeqNum; 1262 // destroy an existing stream... 1263 BASTREAM_STREAM_INFO DestroyParams; 1264 // destroy an existing stream... 1265 BASTREAM_STREAM_INFO FlushParams; 1266 }__packed BaInfo; 1267 }__packed HostCmd_FW_BASTREAM; 1268 1269 // Define data structure for HostCmd_CMD_GET_WATCHDOG_BITMAP 1270 typedef struct { 1271 FWCmdHdr CmdHdr; 1272 uint8_t Watchdogbitmap; // for SW/BA 1273 } __packed HostCmd_FW_GET_WATCHDOG_BITMAP; 1274 1275 1276 1277 // Define data structure for HostCmd_CMD_SET_REGION_POWER 1278 typedef struct { 1279 FWCmdHdr CmdHdr; 1280 uint16_t MaxPowerLevel; 1281 uint16_t Reserved; 1282 } __packed HostCmd_DS_SET_REGION_POWER; 1283 1284 // Define data structure for HostCmd_CMD_SET_RATE_ADAPT_MODE 1285 typedef struct { 1286 FWCmdHdr CmdHdr; 1287 uint16_t Action; 1288 uint16_t RateAdaptMode; 1289 } __packed HostCmd_DS_SET_RATE_ADAPT_MODE; 1290 1291 // Define data structure for HostCmd_CMD_SET_LINKADAPT_CS_MODE 1292 typedef struct { 1293 FWCmdHdr CmdHdr; 1294 uint16_t Action; 1295 uint16_t CSMode; 1296 } __packed HostCmd_DS_SET_LINKADAPT_CS_MODE; 1297 1298 typedef struct { 1299 FWCmdHdr CmdHdr; 1300 uint32_t NProtectFlag; 1301 } __packed HostCmd_FW_SET_N_PROTECT_FLAG; 1302 1303 typedef struct { 1304 FWCmdHdr CmdHdr; 1305 uint8_t NProtectOpMode; 1306 } __packed HostCmd_FW_SET_N_PROTECT_OPMODE; 1307 1308 typedef struct { 1309 FWCmdHdr CmdHdr; 1310 uint8_t OptLevel; 1311 } __packed HostCmd_FW_SET_OPTIMIZATION_LEVEL; 1312 1313 typedef struct { 1314 FWCmdHdr CmdHdr; 1315 uint8_t annex; 1316 uint8_t index; 1317 uint8_t len; 1318 uint8_t Reserverd; 1319 #define CAL_TBL_SIZE 160 1320 uint8_t calTbl[CAL_TBL_SIZE]; 1321 } __packed HostCmd_FW_GET_CALTABLE; 1322 1323 typedef struct { 1324 FWCmdHdr CmdHdr; 1325 uint8_t Addr[6]; 1326 uint8_t Enable; 1327 uint8_t Mode; 1328 } __packed HostCmd_FW_SET_MIMOPSHT; 1329 1330 #define MAX_BEACON_SIZE 1024 1331 typedef struct { 1332 FWCmdHdr CmdHdr; 1333 uint16_t Bcnlen; 1334 uint8_t Reserverd[2]; 1335 uint8_t Bcn[MAX_BEACON_SIZE]; 1336 } __packed HostCmd_FW_GET_BEACON; 1337 1338 typedef struct { 1339 FWCmdHdr CmdHdr; 1340 uint8_t NumberOfPowersave; 1341 uint8_t reserved; 1342 } __packed HostCmd_SET_POWERSAVESTATION; 1343 1344 typedef struct { 1345 FWCmdHdr CmdHdr; 1346 uint16_t Aid; 1347 uint32_t Set; 1348 uint8_t reserved; 1349 } __packed HostCmd_SET_TIM; 1350 1351 typedef struct { 1352 FWCmdHdr CmdHdr; 1353 uint8_t TrafficMap[251]; 1354 uint8_t reserved; 1355 } __packed HostCmd_GET_TIM; 1356 1357 typedef struct { 1358 FWCmdHdr CmdHdr; 1359 uint8_t MacAddr[6]; 1360 uint8_t TID; 1361 uint16_t SeqNo; 1362 uint8_t reserved; 1363 } __packed HostCmd_GET_SEQNO; 1364 1365 typedef struct { 1366 FWCmdHdr CmdHdr; 1367 uint32_t Enable; //0 -- Disbale. or 1 -- Enable. 1368 } __packed HostCmd_DWDS_ENABLE; 1369 1370 typedef struct { 1371 FWCmdHdr CmdHdr; 1372 uint16_t Action; /* 0: Get. 1:Set */ 1373 uint32_t Option; /* 0: default. 1:Aggressive */ 1374 uint32_t Threshold; /* Range 0-200, default 8 */ 1375 }__packed HostCmd_FW_AMPDU_RETRY_RATEDROP_MODE; 1376 1377 typedef struct { 1378 FWCmdHdr CmdHdr; 1379 uint32_t Enable; /* 0 -- Disable. or 1 -- Enable */ 1380 }__packed HostCmd_CFEND_ENABLE; 1381 #endif /* _MWL_HALREG_H_ */ 1382