1 /*- 2 * Copyright (c) 2007-2009 Sam Leffler, Errno Consulting 3 * Copyright (c) 2007-2009 Marvell Semiconductor, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer, 11 * without modification. 12 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 13 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 14 * redistribution must be conditioned upon including a substantially 15 * similar Disclaimer requirement for further binary redistribution. 16 * 17 * NO WARRANTY 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 21 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 22 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 23 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 26 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28 * THE POSSIBILITY OF SUCH DAMAGES. 29 * 30 * $FreeBSD$ 31 */ 32 33 /* 34 * Definitions for the Marvell Wireless LAN controller Hardware Access Layer. 35 */ 36 #ifndef _MWL_HALREG_H_ 37 #define _MWL_HALREG_H_ 38 39 #define MWL_ANT_INFO_SUPPORT /* per-antenna data in rx descriptor */ 40 41 #define MACREG_REG_TSF_LOW 0xa600 /* TSF lo */ 42 #define MACREG_REG_TSF_HIGH 0xa604 /* TSF hi */ 43 #define MACREG_REG_CHIP_REV 0xa814 /* chip rev */ 44 45 // Map to 0x80000000 (Bus control) on BAR0 46 #define MACREG_REG_H2A_INTERRUPT_EVENTS 0x00000C18 // (From host to ARM) 47 #define MACREG_REG_H2A_INTERRUPT_CAUSE 0x00000C1C // (From host to ARM) 48 #define MACREG_REG_H2A_INTERRUPT_MASK 0x00000C20 // (From host to ARM) 49 #define MACREG_REG_H2A_INTERRUPT_CLEAR_SEL 0x00000C24 // (From host to ARM) 50 #define MACREG_REG_H2A_INTERRUPT_STATUS_MASK 0x00000C28 // (From host to ARM) 51 52 #define MACREG_REG_A2H_INTERRUPT_EVENTS 0x00000C2C // (From ARM to host) 53 #define MACREG_REG_A2H_INTERRUPT_CAUSE 0x00000C30 // (From ARM to host) 54 #define MACREG_REG_A2H_INTERRUPT_MASK 0x00000C34 // (From ARM to host) 55 #define MACREG_REG_A2H_INTERRUPT_CLEAR_SEL 0x00000C38 // (From ARM to host) 56 #define MACREG_REG_A2H_INTERRUPT_STATUS_MASK 0x00000C3C // (From ARM to host) 57 58 59 // Map to 0x80000000 on BAR1 60 #define MACREG_REG_GEN_PTR 0x00000C10 61 #define MACREG_REG_INT_CODE 0x00000C14 62 #define MACREG_REG_SCRATCH 0x00000C40 63 #define MACREG_REG_FW_PRESENT 0x0000BFFC 64 65 #define MACREG_REG_PROMISCUOUS 0xA300 66 67 // Bit definitio for MACREG_REG_A2H_INTERRUPT_CAUSE (A2HRIC) 68 #define MACREG_A2HRIC_BIT_TX_DONE 0x00000001 // bit 0 69 #define MACREG_A2HRIC_BIT_RX_RDY 0x00000002 // bit 1 70 #define MACREG_A2HRIC_BIT_OPC_DONE 0x00000004 // bit 2 71 #define MACREG_A2HRIC_BIT_MAC_EVENT 0x00000008 // bit 3 72 #define MACREG_A2HRIC_BIT_RX_PROBLEM 0x00000010 // bit 4 73 74 #define MACREG_A2HRIC_BIT_RADIO_OFF 0x00000020 // bit 5 75 #define MACREG_A2HRIC_BIT_RADIO_ON 0x00000040 // bit 6 76 77 #define MACREG_A2HRIC_BIT_RADAR_DETECT 0x00000080 // bit 7 78 79 #define MACREG_A2HRIC_BIT_ICV_ERROR 0x00000100 // bit 8 80 #define MACREG_A2HRIC_BIT_MIC_ERROR 0x00000200 // bit 9 81 #define MACREG_A2HRIC_BIT_QUEUE_EMPTY 0x00004000 82 #define MACREG_A2HRIC_BIT_QUEUE_FULL 0x00000800 83 #define MACREG_A2HRIC_BIT_CHAN_SWITCH 0x00001000 84 #define MACREG_A2HRIC_BIT_TX_WATCHDOG 0x00002000 85 #define MACREG_A2HRIC_BIT_BA_WATCHDOG 0x00000400 86 #define ISR_SRC_BITS ((MACREG_A2HRIC_BIT_RX_RDY) | \ 87 (MACREG_A2HRIC_BIT_TX_DONE) | \ 88 (MACREG_A2HRIC_BIT_OPC_DONE) | \ 89 (MACREG_A2HRIC_BIT_MAC_EVENT)| \ 90 (MACREG_A2HRIC_BIT_MIC_ERROR)| \ 91 (MACREG_A2HRIC_BIT_ICV_ERROR)| \ 92 (MACREG_A2HRIC_BIT_RADAR_DETECT)| \ 93 (MACREG_A2HRIC_BIT_CHAN_SWITCH)| \ 94 (MACREG_A2HRIC_BIT_TX_WATCHDOG)| \ 95 (MACREG_A2HRIC_BIT_QUEUE_EMPTY)| \ 96 (MACREG_A2HRIC_BIT_BA_WATCHDOG)) 97 98 #define MACREG_A2HRIC_BIT_MASK ISR_SRC_BITS 99 100 101 // Bit definitio for MACREG_REG_H2A_INTERRUPT_CAUSE (H2ARIC) 102 #define MACREG_H2ARIC_BIT_PPA_READY 0x00000001 // bit 0 103 #define MACREG_H2ARIC_BIT_DOOR_BELL 0x00000002 // bit 1 104 #define ISR_RESET (1<<15) 105 106 // INT code register event definition 107 #define MACREG_INT_CODE_CMD_FINISHED 0x00000005 108 109 /* 110 * Host/Firmware Interface definitions. 111 */ 112 113 /** 114 * Define total number of TX queues in the shared memory. 115 * This count includes the EDCA queues, Block Ack queues, and HCCA queues 116 * In addition to this, there could be a management packet queue some 117 * time in the future 118 */ 119 #define NUM_EDCA_QUEUES 4 120 #define NUM_HCCA_QUEUES 0 121 #define NUM_BA_QUEUES 0 122 #define NUM_MGMT_QUEUES 0 123 #define TOTAL_TX_QUEUES \ 124 (NUM_EDCA_QUEUES + NUM_HCCA_QUEUES + NUM_BA_QUEUES + NUM_MGMT_QUEUES) 125 #define MAX_TXWCB_QUEUES TOTAL_TX_QUEUES 126 #define MAX_RXWCB_QUEUES 1 127 128 //============================================================================= 129 // PUBLIC DEFINITIONS 130 //============================================================================= 131 132 #define RATE_INDEX_MAX_ARRAY 14 133 #define WOW_MAX_STATION 32 134 135 /* 136 * Hardware tx/rx descriptors. 137 * 138 * NB: tx descriptor size must match f/w expected size 139 * because f/w prefetch's the next descriptor linearly 140 * and doesn't chase the next pointer. 141 */ 142 struct mwl_txdesc { 143 uint32_t Status; 144 #define EAGLE_TXD_STATUS_IDLE 0x00000000 145 #define EAGLE_TXD_STATUS_USED 0x00000001 146 #define EAGLE_TXD_STATUS_OK 0x00000001 147 #define EAGLE_TXD_STATUS_OK_RETRY 0x00000002 148 #define EAGLE_TXD_STATUS_OK_MORE_RETRY 0x00000004 149 #define EAGLE_TXD_STATUS_MULTICAST_TX 0x00000008 150 #define EAGLE_TXD_STATUS_BROADCAST_TX 0x00000010 151 #define EAGLE_TXD_STATUS_FAILED_LINK_ERROR 0x00000020 152 #define EAGLE_TXD_STATUS_FAILED_EXCEED_LIMIT 0x00000040 153 #define EAGLE_TXD_STATUS_FAILED_XRETRY EAGLE_TXD_STATUS_FAILED_EXCEED_LIMIT 154 #define EAGLE_TXD_STATUS_FAILED_AGING 0x00000080 155 #define EAGLE_TXD_STATUS_FW_OWNED 0x80000000 156 uint8_t DataRate; 157 uint8_t TxPriority; 158 uint16_t QosCtrl; 159 uint32_t PktPtr; 160 uint16_t PktLen; 161 uint8_t DestAddr[6]; 162 uint32_t pPhysNext; 163 uint32_t SapPktInfo; 164 #define EAGLE_TXD_MODE_BONLY 1 165 #define EAGLE_TXD_MODE_GONLY 2 166 #define EAGLE_TXD_MODE_BG 3 167 #define EAGLE_TXD_MODE_NONLY 4 168 #define EAGLE_TXD_MODE_BN 5 169 #define EAGLE_TXD_MODE_GN 6 170 #define EAGLE_TXD_MODE_BGN 7 171 #define EAGLE_TXD_MODE_AONLY 8 172 #define EAGLE_TXD_MODE_AG 10 173 #define EAGLE_TXD_MODE_AN 12 174 uint16_t Format; 175 #define EAGLE_TXD_FORMAT 0x0001 /* frame format/rate */ 176 #define EAGLE_TXD_FORMAT_LEGACY 0x0000 /* legacy rate frame */ 177 #define EAGLE_TXD_FORMAT_HT 0x0001 /* HT rate frame */ 178 #define EAGLE_TXD_GI 0x0002 /* guard interval */ 179 #define EAGLE_TXD_GI_SHORT 0x0002 /* short guard interval */ 180 #define EAGLE_TXD_GI_LONG 0x0000 /* long guard interval */ 181 #define EAGLE_TXD_CHW 0x0004 /* channel width */ 182 #define EAGLE_TXD_CHW_20 0x0000 /* 20MHz channel width */ 183 #define EAGLE_TXD_CHW_40 0x0004 /* 40MHz channel width */ 184 #define EAGLE_TXD_RATE 0x01f8 /* tx rate (legacy)/ MCS */ 185 #define EAGLE_TXD_RATE_S 3 186 #define EAGLE_TXD_ADV 0x0600 /* advanced coding */ 187 #define EAGLE_TXD_ADV_S 9 188 #define EAGLE_TXD_ADV_NONE 0x0000 189 #define EAGLE_TXD_ADV_LDPC 0x0200 190 #define EAGLE_TXD_ADV_RS 0x0400 191 /* NB: 3 is reserved */ 192 #define EAGLE_TXD_ANTENNA 0x1800 /* antenna select */ 193 #define EAGLE_TXD_ANTENNA_S 11 194 #define EAGLE_TXD_EXTCHAN 0x6000 /* extension channel */ 195 #define EAGLE_TXD_EXTCHAN_S 13 196 #define EAGLE_TXD_EXTCHAN_HI 0x0000 /* above */ 197 #define EAGLE_TXD_EXTCHAN_LO 0x2000 /* below */ 198 #define EAGLE_TXD_PREAMBLE 0x8000 199 #define EAGLE_TXD_PREAMBLE_SHORT 0x8000 /* short preamble */ 200 #define EAGLE_TXD_PREAMBLE_LONG 0x0000 /* long preamble */ 201 uint16_t pad; /* align to 4-byte boundary */ 202 #define EAGLE_TXD_FIXED_RATE 0x0100 /* get tx rate from Format */ 203 #define EAGLE_TXD_DONT_AGGR 0x0200 /* don't aggregate frame */ 204 } __packed; 205 206 struct mwl_ant_info { 207 uint8_t rssi_a; /* RSSI for antenna A */ 208 uint8_t rssi_b; /* RSSI for antenna B */ 209 uint8_t rssi_c; /* RSSI for antenna C */ 210 uint8_t rsvd1; /* Reserved */ 211 uint8_t nf_a; /* Noise floor for antenna A */ 212 uint8_t nf_b; /* Noise floor for antenna B */ 213 uint8_t nf_c; /* Noise floor for antenna C */ 214 uint8_t rsvd2; /* Reserved */ 215 uint8_t nf; /* Noise floor */ 216 } __packed; 217 218 struct mwl_rxdesc { 219 uint8_t RxControl; /* control element */ 220 #define EAGLE_RXD_CTRL_DRIVER_OWN 0x00 221 #define EAGLE_RXD_CTRL_OS_OWN 0x04 222 #define EAGLE_RXD_CTRL_DMA_OWN 0x80 223 uint8_t RSSI; /* received signal strengt indication */ 224 uint8_t Status; /* status field w/ USED bit */ 225 #define EAGLE_RXD_STATUS_IDLE 0x00 226 #define EAGLE_RXD_STATUS_OK 0x01 227 #define EAGLE_RXD_STATUS_MULTICAST_RX 0x02 228 #define EAGLE_RXD_STATUS_BROADCAST_RX 0x04 229 #define EAGLE_RXD_STATUS_FRAGMENT_RX 0x08 230 #define EAGLE_RXD_STATUS_GENERAL_DECRYPT_ERR 0xff 231 #define EAGLE_RXD_STATUS_DECRYPT_ERR_MASK 0x80 232 #define EAGLE_RXD_STATUS_TKIP_MIC_DECRYPT_ERR 0x02 233 #define EAGLE_RXD_STATUS_WEP_ICV_DECRYPT_ERR 0x04 234 #define EAGLE_RXD_STATUS_TKIP_ICV_DECRYPT_ERR 0x08 235 uint8_t Channel; /* channel # pkt received on */ 236 uint16_t PktLen; /* total length of received data */ 237 uint8_t SQ2; /* not used */ 238 uint8_t Rate; /* received data rate */ 239 uint32_t pPhysBuffData; /* physical address of payload data */ 240 uint32_t pPhysNext; /* physical address of next RX desc */ 241 uint16_t QosCtrl; /* received QosCtrl field variable */ 242 uint16_t HtSig2; /* like name states */ 243 #ifdef MWL_ANT_INFO_SUPPORT 244 struct mwl_ant_info ai; /* antenna info */ 245 #endif 246 } __packed; 247 248 /* 249 // Define OpMode for SoftAP/Station mode 250 // 251 // The following mode signature has to be written to PCI scratch register#0 252 // right after successfully downloading the last block of firmware and 253 // before waiting for firmware ready signature 254 */ 255 #define HostCmd_STA_MODE 0x5A 256 #define HostCmd_SOFTAP_MODE 0xA5 257 258 #define HostCmd_STA_FWRDY_SIGNATURE 0xF0F1F2F4 259 #define HostCmd_SOFTAP_FWRDY_SIGNATURE 0xF1F2F4A5 260 261 //*************************************************************************** 262 //*************************************************************************** 263 264 //*************************************************************************** 265 266 #define HostCmd_CMD_CODE_DNLD 0x0001 267 #define HostCmd_CMD_GET_HW_SPEC 0x0003 268 #define HostCmd_CMD_SET_HW_SPEC 0x0004 269 #define HostCmd_CMD_MAC_MULTICAST_ADR 0x0010 270 #define HostCmd_CMD_802_11_GET_STAT 0x0014 271 #define HostCmd_CMD_MAC_REG_ACCESS 0x0019 272 #define HostCmd_CMD_BBP_REG_ACCESS 0x001a 273 #define HostCmd_CMD_RF_REG_ACCESS 0x001b 274 #define HostCmd_CMD_802_11_RADIO_CONTROL 0x001c 275 #define HostCmd_CMD_802_11_RF_TX_POWER 0x001e 276 #define HostCmd_CMD_802_11_RF_ANTENNA 0x0020 277 #define HostCmd_CMD_SET_BEACON 0x0100 278 #define HostCmd_CMD_SET_AID 0x010d 279 #define HostCmd_CMD_SET_RF_CHANNEL 0x010a 280 #define HostCmd_CMD_SET_INFRA_MODE 0x010e 281 #define HostCmd_CMD_SET_G_PROTECT_FLAG 0x010f 282 #define HostCmd_CMD_802_11_RTS_THSD 0x0113 283 #define HostCmd_CMD_802_11_SET_SLOT 0x0114 284 285 #define HostCmd_CMD_802_11H_DETECT_RADAR 0x0120 286 #define HostCmd_CMD_SET_WMM_MODE 0x0123 287 #define HostCmd_CMD_HT_GUARD_INTERVAL 0x0124 288 #define HostCmd_CMD_SET_FIXED_RATE 0x0126 289 #define HostCmd_CMD_SET_LINKADAPT_CS_MODE 0x0129 290 #define HostCmd_CMD_SET_MAC_ADDR 0x0202 291 #define HostCmd_CMD_SET_RATE_ADAPT_MODE 0x0203 292 #define HostCmd_CMD_GET_WATCHDOG_BITMAP 0x0205 293 294 //SoftAP command code 295 #define HostCmd_CMD_BSS_START 0x1100 296 #define HostCmd_CMD_SET_NEW_STN 0x1111 297 #define HostCmd_CMD_SET_KEEP_ALIVE 0x1112 298 #define HostCmd_CMD_SET_APMODE 0x1114 299 #define HostCmd_CMD_SET_SWITCH_CHANNEL 0x1121 300 301 /* 302 @HWENCR@ 303 Command to update firmware encryption keys. 304 */ 305 #define HostCmd_CMD_UPDATE_ENCRYPTION 0x1122 306 /* 307 @11E-BA@ 308 Command to create/destroy block ACK 309 */ 310 #define HostCmd_CMD_BASTREAM 0x1125 311 #define HostCmd_CMD_SET_RIFS 0x1126 312 #define HostCmd_CMD_SET_N_PROTECT_FLAG 0x1131 313 #define HostCmd_CMD_SET_N_PROTECT_OPMODE 0x1132 314 #define HostCmd_CMD_SET_OPTIMIZATION_LEVEL 0x1133 315 #define HostCmd_CMD_GET_CALTABLE 0x1134 316 #define HostCmd_CMD_SET_MIMOPSHT 0x1135 317 #define HostCmd_CMD_GET_BEACON 0x1138 318 #define HostCmd_CMD_SET_REGION_CODE 0x1139 319 #define HostCmd_CMD_SET_POWERSAVESTATION 0x1140 320 #define HostCmd_CMD_SET_TIM 0x1141 321 #define HostCmd_CMD_GET_TIM 0x1142 322 #define HostCmd_CMD_GET_SEQNO 0x1143 323 324 /* 325 // Define general result code for each command 326 */ 327 #define HostCmd_RESULT_OK 0x0000 // OK 328 #define HostCmd_RESULT_ERROR 0x0001 // Genenral error 329 #define HostCmd_RESULT_NOT_SUPPORT 0x0002 // Command is not valid 330 #define HostCmd_RESULT_PENDING 0x0003 // Command is pending (will be processed) 331 #define HostCmd_RESULT_BUSY 0x0004 // System is busy (command ignored) 332 #define HostCmd_RESULT_PARTIAL_DATA 0x0005 // Data buffer is not big enough 333 334 335 /* 336 // Definition of action or option for each command 337 // 338 // Define general purpose action 339 */ 340 #define HostCmd_ACT_GEN_READ 0x0000 341 #define HostCmd_ACT_GEN_WRITE 0x0001 342 #define HostCmd_ACT_GEN_GET 0x0000 343 #define HostCmd_ACT_GEN_SET 0x0001 344 #define HostCmd_ACT_GEN_OFF 0x0000 345 #define HostCmd_ACT_GEN_ON 0x0001 346 347 #define HostCmd_ACT_DIFF_CHANNEL 0x0002 348 #define HostCmd_ACT_GEN_SET_LIST 0x0002 349 350 // Define action or option for HostCmd_FW_USE_FIXED_RATE 351 #define HostCmd_ACT_USE_FIXED_RATE 0x0001 352 #define HostCmd_ACT_NOT_USE_FIXED_RATE 0x0002 353 354 // Define action or option for HostCmd_CMD_802_11_SET_WEP 355 //#define HostCmd_ACT_ENABLE 0x0001 // Use MAC control for WEP on/off 356 //#define HostCmd_ACT_DISABLE 0x0000 357 #define HostCmd_ACT_ADD 0x0002 358 #define HostCmd_ACT_REMOVE 0x0004 359 #define HostCmd_ACT_USE_DEFAULT 0x0008 360 361 #define HostCmd_TYPE_WEP_40_BIT 0x0001 // 40 bit 362 #define HostCmd_TYPE_WEP_104_BIT 0x0002 // 104 bit 363 #define HostCmd_TYPE_WEP_128_BIT 0x0003 // 128 bit 364 #define HostCmd_TYPE_WEP_TX_KEY 0x0004 // TX WEP 365 366 #define HostCmd_NUM_OF_WEP_KEYS 4 367 368 #define HostCmd_WEP_KEY_INDEX_MASK 0x3fffffff 369 370 371 // Define action or option for HostCmd_CMD_802_11_RESET 372 #define HostCmd_ACT_HALT 0x0001 373 #define HostCmd_ACT_RESTART 0x0002 374 375 // Define action or option for HostCmd_CMD_802_11_RADIO_CONTROL 376 #define HostCmd_TYPE_AUTO_PREAMBLE 0x0001 377 #define HostCmd_TYPE_SHORT_PREAMBLE 0x0002 378 #define HostCmd_TYPE_LONG_PREAMBLE 0x0003 379 380 // Define action or option for CMD_802_11_RF_CHANNEL 381 #define HostCmd_TYPE_802_11A 0x0001 382 #define HostCmd_TYPE_802_11B 0x0002 383 384 // Define action or option for HostCmd_CMD_802_11_RF_TX_POWER 385 #define HostCmd_ACT_TX_POWER_OPT_SET_HIGH 0x0003 386 #define HostCmd_ACT_TX_POWER_OPT_SET_MID 0x0002 387 #define HostCmd_ACT_TX_POWER_OPT_SET_LOW 0x0001 388 #define HostCmd_ACT_TX_POWER_OPT_SET_AUTO 0x0000 389 390 #define HostCmd_ACT_TX_POWER_LEVEL_MIN 0x000e // in dbm 391 #define HostCmd_ACT_TX_POWER_LEVEL_GAP 0x0001 // in dbm 392 // Define action or option for HostCmd_CMD_802_11_DATA_RATE 393 #define HostCmd_ACT_SET_TX_AUTO 0x0000 394 #define HostCmd_ACT_SET_TX_FIX_RATE 0x0001 395 #define HostCmd_ACT_GET_TX_RATE 0x0002 396 397 #define HostCmd_ACT_SET_RX 0x0001 398 #define HostCmd_ACT_SET_TX 0x0002 399 #define HostCmd_ACT_SET_BOTH 0x0003 400 #define HostCmd_ACT_GET_RX 0x0004 401 #define HostCmd_ACT_GET_TX 0x0008 402 #define HostCmd_ACT_GET_BOTH 0x000c 403 404 #define TYPE_ANTENNA_DIVERSITY 0xffff 405 406 // Define action or option for HostCmd_CMD_802_11_PS_MODE 407 #define HostCmd_TYPE_CAM 0x0000 408 #define HostCmd_TYPE_MAX_PSP 0x0001 409 #define HostCmd_TYPE_FAST_PSP 0x0002 410 411 #define HostCmd_CMD_SET_EDCA_PARAMS 0x0115 412 413 //============================================================================= 414 // HOST COMMAND DEFINITIONS 415 //============================================================================= 416 417 // 418 // Definition of data structure for each command 419 // 420 // Define general data structure 421 typedef struct { 422 uint16_t Cmd; 423 uint16_t Length; 424 #ifdef MWL_MBSS_SUPPORT 425 uint8_t SeqNum; 426 uint8_t MacId; 427 #else 428 uint16_t SeqNum; 429 #endif 430 uint16_t Result; 431 } __packed FWCmdHdr; 432 433 typedef struct { 434 FWCmdHdr CmdHdr; 435 uint8_t Version; // HW revision 436 uint8_t HostIf; // Host interface 437 uint16_t NumOfMCastAdr; // Max. number of Multicast address FW can handle 438 uint8_t PermanentAddr[6]; // MAC address 439 uint16_t RegionCode; // Region Code 440 uint32_t FWReleaseNumber; // 4 byte of FW release number 441 uint32_t ulFwAwakeCookie; // Firmware awake cookie 442 uint32_t DeviceCaps; // Device capabilities (see above) 443 uint32_t RxPdWrPtr; // Rx shared memory queue 444 uint32_t NumTxQueues; // # TX queues in WcbBase array 445 uint32_t WcbBase[MAX_TXWCB_QUEUES]; // TX WCB Rings 446 uint32_t Flags; 447 #define SET_HW_SPEC_DISABLEMBSS 0x08 448 #define SET_HW_SPEC_HOSTFORM_BEACON 0x10 449 #define SET_HW_SPEC_HOSTFORM_PROBERESP 0x20 450 #define SET_HW_SPEC_HOST_POWERSAVE 0x40 451 #define SET_HW_SPEC_HOSTENCRDECR_MGMT 0x80 452 uint32_t TxWcbNumPerQueue; 453 uint32_t TotalRxWcb; 454 } __packed HostCmd_DS_SET_HW_SPEC; 455 456 typedef struct { 457 FWCmdHdr CmdHdr; 458 u_int8_t Version; /* version of the HW */ 459 u_int8_t HostIf; /* host interface */ 460 u_int16_t NumOfWCB; /* Max. number of WCB FW can handle */ 461 u_int16_t NumOfMCastAddr; /* MaxNbr of MC addresses FW can handle */ 462 u_int8_t PermanentAddr[6]; /* MAC address programmed in HW */ 463 u_int16_t RegionCode; 464 u_int16_t NumberOfAntenna; /* Number of antenna used */ 465 u_int32_t FWReleaseNumber; /* 4 byte of FW release number */ 466 u_int32_t WcbBase0; 467 u_int32_t RxPdWrPtr; 468 u_int32_t RxPdRdPtr; 469 u_int32_t ulFwAwakeCookie; 470 u_int32_t WcbBase1; 471 u_int32_t WcbBase2; 472 u_int32_t WcbBase3; 473 } __packed HostCmd_DS_GET_HW_SPEC; 474 475 typedef struct { 476 FWCmdHdr CmdHdr; 477 u_int32_t Enable; /* FALSE: Disable or TRUE: Enable */ 478 } __packed HostCmd_DS_BSS_START; 479 480 481 typedef struct { 482 u_int8_t ElemId; 483 u_int8_t Len; 484 u_int8_t OuiType[4]; /* 00:50:f2:01 */ 485 u_int8_t Ver[2]; 486 u_int8_t GrpKeyCipher[4]; 487 u_int8_t PwsKeyCnt[2]; 488 u_int8_t PwsKeyCipherList[4]; 489 u_int8_t AuthKeyCnt[2]; 490 u_int8_t AuthKeyList[4]; 491 } __packed RsnIE_t; 492 493 typedef struct { 494 u_int8_t ElemId; 495 u_int8_t Len; 496 u_int8_t Ver[2]; 497 u_int8_t GrpKeyCipher[4]; 498 u_int8_t PwsKeyCnt[2]; 499 u_int8_t PwsKeyCipherList[4]; 500 u_int8_t AuthKeyCnt[2]; 501 u_int8_t AuthKeyList[4]; 502 u_int8_t RsnCap[2]; 503 } __packed Rsn48IE_t; 504 505 typedef struct { 506 u_int8_t ElementId; 507 u_int8_t Len; 508 u_int8_t CfpCnt; 509 u_int8_t CfpPeriod; 510 u_int16_t CfpMaxDuration; 511 u_int16_t CfpDurationRemaining; 512 } __packed CfParams_t; 513 514 typedef struct { 515 u_int8_t ElementId; 516 u_int8_t Len; 517 u_int16_t AtimWindow; 518 } __packed IbssParams_t; 519 520 typedef union { 521 CfParams_t CfParamSet; 522 IbssParams_t IbssParamSet; 523 } __packed SsParams_t; 524 525 typedef struct { 526 u_int8_t ElementId; 527 u_int8_t Len; 528 u_int16_t DwellTime; 529 u_int8_t HopSet; 530 u_int8_t HopPattern; 531 u_int8_t HopIndex; 532 } __packed FhParams_t; 533 534 typedef struct { 535 u_int8_t ElementId; 536 u_int8_t Len; 537 u_int8_t CurrentChan; 538 } __packed DsParams_t; 539 540 typedef union { 541 FhParams_t FhParamSet; 542 DsParams_t DsParamSet; 543 } __packed PhyParams_t; 544 545 typedef struct { 546 u_int8_t FirstChannelNum; 547 u_int8_t NumOfChannels; 548 u_int8_t MaxTxPwrLevel; 549 } __packed ChannelInfo_t; 550 551 typedef struct { 552 u_int8_t ElementId; 553 u_int8_t Len; 554 u_int8_t CountryStr[3]; 555 ChannelInfo_t ChannelInfo[40]; 556 } __packed Country_t; 557 558 typedef struct { 559 u_int8_t AIFSN : 4; 560 u_int8_t ACM : 1; 561 u_int8_t ACI : 2; 562 u_int8_t rsvd : 1; 563 564 }__packed ACIAIFSN_field_t; 565 566 typedef struct { 567 u_int8_t ECW_min : 4; 568 u_int8_t ECW_max : 4; 569 }__packed ECWmin_max_field_t; 570 571 typedef struct { 572 ACIAIFSN_field_t ACI_AIFSN; 573 ECWmin_max_field_t ECW_min_max; 574 u_int16_t TXOP_lim; 575 }__packed ACparam_rcd_t; 576 577 typedef struct { 578 u_int8_t ElementId; 579 u_int8_t Len; 580 u_int8_t OUI[3]; 581 u_int8_t Type; 582 u_int8_t Subtype; 583 u_int8_t version; 584 u_int8_t rsvd; 585 ACparam_rcd_t AC_BE; 586 ACparam_rcd_t AC_BK; 587 ACparam_rcd_t AC_VI; 588 ACparam_rcd_t AC_VO; 589 } __packed WMM_param_elem_t ; 590 591 typedef struct { 592 #ifdef MWL_MBSS_SUPPORT 593 u_int8_t StaMacAddr[6]; 594 #endif 595 u_int8_t SsId[32]; 596 u_int8_t BssType; 597 u_int16_t BcnPeriod; 598 u_int8_t DtimPeriod; 599 SsParams_t SsParamSet; 600 PhyParams_t PhyParamSet; 601 u_int16_t ProbeDelay; 602 u_int16_t CapInfo; /* see below */ 603 u_int8_t BssBasicRateSet[14]; 604 u_int8_t OpRateSet[14]; 605 RsnIE_t RsnIE; 606 Rsn48IE_t Rsn48IE; 607 WMM_param_elem_t WMMParam; 608 Country_t Country; 609 u_int32_t ApRFType; /* 0->B, 1->G, 2->Mixed, 3->A, 4->11J */ 610 } __packed StartCmd_t; 611 612 #define HostCmd_CAPINFO_DEFAULT 0x0000 613 #define HostCmd_CAPINFO_ESS 0x0001 614 #define HostCmd_CAPINFO_IBSS 0x0002 615 #define HostCmd_CAPINFO_CF_POLLABLE 0x0004 616 #define HostCmd_CAPINFO_CF_REQUEST 0x0008 617 #define HostCmd_CAPINFO_PRIVACY 0x0010 618 #define HostCmd_CAPINFO_SHORT_PREAMBLE 0x0020 619 #define HostCmd_CAPINFO_PBCC 0x0040 620 #define HostCmd_CAPINFO_CHANNEL_AGILITY 0x0080 621 #define HostCmd_CAPINFO_SHORT_SLOT 0x0400 622 #define HostCmd_CAPINFO_DSSS_OFDM 0x2000 623 624 typedef struct { 625 FWCmdHdr CmdHdr; 626 StartCmd_t StartCmd; 627 } __packed HostCmd_DS_AP_BEACON; 628 629 typedef struct { 630 FWCmdHdr CmdHdr; 631 uint16_t FrmBodyLen; 632 uint8_t FrmBody[1]; /* NB: variable length */ 633 } __packed HostCmd_DS_SET_BEACON; 634 635 // Define data structure for HostCmd_CMD_MAC_MULTICAST_ADR 636 typedef struct { 637 FWCmdHdr CmdHdr; 638 uint16_t Action; 639 uint16_t NumOfAdrs; 640 #define MWL_HAL_MCAST_MAX 32 641 uint8_t MACList[6*32]; 642 } __packed HostCmd_DS_MAC_MULTICAST_ADR; 643 644 // Indicate to FW the current state of AP ERP info 645 typedef struct { 646 FWCmdHdr CmdHdr; 647 uint32_t GProtectFlag; 648 } __packed HostCmd_FW_SET_G_PROTECT_FLAG; 649 650 typedef struct { 651 FWCmdHdr CmdHdr; 652 } __packed HostCmd_FW_SET_INFRA_MODE; 653 654 // Define data structure for HostCmd_CMD_802_11_RF_CHANNEL 655 typedef struct { 656 FWCmdHdr CmdHdr; 657 uint16_t Action; 658 uint8_t CurrentChannel; /* channel # */ 659 uint32_t ChannelFlags; /* see below */ 660 } __packed HostCmd_FW_SET_RF_CHANNEL; 661 662 /* bits 0-5 specify frequency band */ 663 #define FREQ_BAND_2DOT4GHZ 0x0001 664 #define FREQ_BAND_4DOT9GHZ 0x0002 /* XXX not implemented */ 665 #define FREQ_BAND_5GHZ 0x0004 666 #define FREQ_BAND_5DOT2GHZ 0x0008 /* XXX not implemented */ 667 /* bits 6-10 specify channel width */ 668 #define CH_AUTO_WIDTH 0x0000 /* XXX not used? */ 669 #define CH_10_MHz_WIDTH 0x0040 670 #define CH_20_MHz_WIDTH 0x0080 671 #define CH_40_MHz_WIDTH 0x0100 672 /* bits 11-12 specify extension channel */ 673 #define EXT_CH_NONE 0x0000 /* no extension channel */ 674 #define EXT_CH_ABOVE_CTRL_CH 0x0800 /* extension channel above */ 675 #define EXT_CH_AUTO 0x1000 /* XXX not used? */ 676 #define EXT_CH_BELOW_CTRL_CH 0x1800 /* extension channel below */ 677 /* bits 13-31 are reserved */ 678 679 #define FIXED_RATE_WITH_AUTO_RATE_DROP 0 680 #define FIXED_RATE_WITHOUT_AUTORATE_DROP 1 681 682 #define LEGACY_RATE_TYPE 0 683 #define HT_RATE_TYPE 1 684 685 #define RETRY_COUNT_VALID 0 686 #define RETRY_COUNT_INVALID 1 687 688 typedef struct { 689 // lower rate after the retry count 690 uint32_t FixRateType; //0: legacy, 1: HT 691 uint32_t RetryCountValid; //0: retry count is not valid, 1: use retry count specified 692 } __packed FIX_RATE_FLAG; 693 694 typedef struct { 695 FIX_RATE_FLAG FixRateTypeFlags; 696 uint32_t FixedRate; // legacy rate(not index) or an MCS code. 697 uint32_t RetryCount; 698 } __packed FIXED_RATE_ENTRY; 699 700 typedef struct { 701 FWCmdHdr CmdHdr; 702 uint32_t Action; //HostCmd_ACT_GEN_GET 0x0000 703 //HostCmd_ACT_GEN_SET 0x0001 704 //HostCmd_ACT_NOT_USE_FIXED_RATE 0x0002 705 uint32_t AllowRateDrop; // use fixed rate specified but firmware can drop to 706 uint32_t EntryCount; 707 FIXED_RATE_ENTRY FixedRateTable[4]; 708 uint8_t MulticastRate; 709 uint8_t MultiRateTxType; 710 uint8_t ManagementRate; 711 } __packed HostCmd_FW_USE_FIXED_RATE; 712 713 typedef struct { 714 uint32_t AllowRateDrop; 715 uint32_t EntryCount; 716 FIXED_RATE_ENTRY FixedRateTable[4]; 717 } __packed USE_FIXED_RATE_INFO; 718 719 typedef struct { 720 FWCmdHdr CmdHdr; 721 uint32_t Action; 722 uint32_t GIType; 723 #define GI_TYPE_LONG 0x0001 724 #define GI_TYPE_SHORT 0x0002 725 } __packed HostCmd_FW_HT_GUARD_INTERVAL; 726 727 typedef struct { 728 FWCmdHdr CmdHdr; 729 uint32_t Action; 730 uint8_t RxAntennaMap; 731 uint8_t TxAntennaMap; 732 } __packed HostCmd_FW_HT_MIMO_CONFIG; 733 734 typedef struct { 735 FWCmdHdr CmdHdr; 736 uint16_t Action; 737 uint8_t Slot; // Slot=0 if regular, Slot=1 if short. 738 } __packed HostCmd_FW_SET_SLOT; 739 740 741 // Define data structure for HostCmd_CMD_802_11_GET_STAT 742 typedef struct { 743 FWCmdHdr CmdHdr; 744 uint32_t TxRetrySuccesses; 745 uint32_t TxMultipleRetrySuccesses; 746 uint32_t TxFailures; 747 uint32_t RTSSuccesses; 748 uint32_t RTSFailures; 749 uint32_t AckFailures; 750 uint32_t RxDuplicateFrames; 751 uint32_t FCSErrorCount; 752 uint32_t TxWatchDogTimeouts; 753 uint32_t RxOverflows; //used 754 uint32_t RxFragErrors; //used 755 uint32_t RxMemErrors; //used 756 uint32_t PointerErrors; //used 757 uint32_t TxUnderflows; //used 758 uint32_t TxDone; 759 uint32_t TxDoneBufTryPut; 760 uint32_t TxDoneBufPut; 761 uint32_t Wait4TxBuf; // Put size of requested buffer in here 762 uint32_t TxAttempts; 763 uint32_t TxSuccesses; 764 uint32_t TxFragments; 765 uint32_t TxMulticasts; 766 uint32_t RxNonCtlPkts; 767 uint32_t RxMulticasts; 768 uint32_t RxUndecryptableFrames; 769 uint32_t RxICVErrors; 770 uint32_t RxExcludedFrames; 771 } __packed HostCmd_DS_802_11_GET_STAT; 772 773 774 // Define data structure for HostCmd_CMD_MAC_REG_ACCESS 775 typedef struct { 776 FWCmdHdr CmdHdr; 777 uint16_t Action; 778 uint16_t Offset; 779 uint32_t Value; 780 uint16_t Reserved; 781 } __packed HostCmd_DS_MAC_REG_ACCESS; 782 783 // Define data structure for HostCmd_CMD_BBP_REG_ACCESS 784 typedef struct { 785 FWCmdHdr CmdHdr; 786 uint16_t Action; 787 uint16_t Offset; 788 uint8_t Value; 789 uint8_t Reserverd[3]; 790 } __packed HostCmd_DS_BBP_REG_ACCESS; 791 792 // Define data structure for HostCmd_CMD_RF_REG_ACCESS 793 typedef struct { 794 FWCmdHdr CmdHdr; 795 uint16_t Action; 796 uint16_t Offset; 797 uint8_t Value; 798 uint8_t Reserverd[3]; 799 } __packed HostCmd_DS_RF_REG_ACCESS; 800 801 802 // Define data structure for HostCmd_CMD_802_11_RADIO_CONTROL 803 typedef struct { 804 FWCmdHdr CmdHdr; 805 uint16_t Action; 806 uint16_t Control; // @bit0: 1/0,on/off, @bit1: 1/0, long/short @bit2: 1/0,auto/fix 807 uint16_t RadioOn; 808 } __packed HostCmd_DS_802_11_RADIO_CONTROL; 809 810 811 #define TX_POWER_LEVEL_TOTAL 8 812 // Define data structure for HostCmd_CMD_802_11_RF_TX_POWER 813 typedef struct { 814 FWCmdHdr CmdHdr; 815 uint16_t Action; 816 uint16_t SupportTxPowerLevel; 817 uint16_t CurrentTxPowerLevel; 818 uint16_t Reserved; 819 uint16_t PowerLevelList[TX_POWER_LEVEL_TOTAL]; 820 } __packed HostCmd_DS_802_11_RF_TX_POWER; 821 822 // Define data structure for HostCmd_CMD_802_11_RF_ANTENNA 823 typedef struct _HostCmd_DS_802_11_RF_ANTENNA { 824 FWCmdHdr CmdHdr; 825 uint16_t Action; 826 uint16_t AntennaMode; // Number of antennas or 0xffff(diversity) 827 } __packed HostCmd_DS_802_11_RF_ANTENNA; 828 829 // Define data structure for HostCmd_CMD_802_11_PS_MODE 830 typedef struct { 831 FWCmdHdr CmdHdr; 832 uint16_t Action; 833 uint16_t PowerMode; // CAM, Max.PSP or Fast PSP 834 } __packed HostCmd_DS_802_11_PS_MODE; 835 836 typedef struct { 837 FWCmdHdr CmdHdr; 838 uint16_t Action; 839 uint16_t Threshold; 840 } __packed HostCmd_DS_802_11_RTS_THSD; 841 842 // used for stand alone bssid sets/clears 843 typedef struct { 844 FWCmdHdr CmdHdr; 845 #ifdef MWL_MBSS_SUPPORT 846 uint16_t MacType; 847 #define WL_MAC_TYPE_PRIMARY_CLIENT 0 848 #define WL_MAC_TYPE_SECONDARY_CLIENT 1 849 #define WL_MAC_TYPE_PRIMARY_AP 2 850 #define WL_MAC_TYPE_SECONDARY_AP 3 851 #endif 852 uint8_t MacAddr[6]; 853 } __packed HostCmd_DS_SET_MAC, 854 HostCmd_FW_SET_BSSID, 855 HostCmd_FW_SET_MAC; 856 857 // Indicate to FW to send out PS Poll 858 typedef struct { 859 FWCmdHdr CmdHdr; 860 uint32_t PSPoll; 861 } __packed HostCmd_FW_TX_POLL; 862 863 // used for AID sets/clears 864 typedef struct { 865 FWCmdHdr CmdHdr; 866 uint16_t AssocID; 867 uint8_t MacAddr[6]; //AP's Mac Address(BSSID) 868 uint32_t GProtection; 869 uint8_t ApRates[ RATE_INDEX_MAX_ARRAY]; 870 } __packed HostCmd_FW_SET_AID; 871 872 typedef struct { 873 uint32_t LegacyRateBitMap; 874 uint32_t HTRateBitMap; 875 uint16_t CapInfo; 876 uint16_t HTCapabilitiesInfo; 877 uint8_t MacHTParamInfo; 878 uint8_t Rev; 879 struct { 880 uint8_t ControlChan; 881 uint8_t AddChan; 882 uint16_t OpMode; 883 uint16_t stbc; 884 } __packed AddHtInfo; 885 } __packed PeerInfo_t; 886 887 typedef struct { 888 FWCmdHdr CmdHdr; 889 uint16_t AID; 890 uint8_t MacAddr[6]; 891 uint16_t StnId; 892 uint16_t Action; 893 uint16_t Reserved; 894 PeerInfo_t PeerInfo; 895 uint8_t Qosinfo; 896 uint8_t isQosSta; 897 } __packed HostCmd_FW_SET_NEW_STN; 898 899 typedef struct { 900 FWCmdHdr CmdHdr; 901 uint8_t tick; 902 } __packed HostCmd_FW_SET_KEEP_ALIVE_TICK; 903 904 typedef struct { 905 FWCmdHdr CmdHdr; 906 uint8_t QNum; 907 } __packed HostCmd_FW_SET_RIFS; 908 909 typedef struct { 910 FWCmdHdr CmdHdr; 911 uint8_t ApMode; 912 } __packed HostCmd_FW_SET_APMODE; 913 914 typedef struct { 915 FWCmdHdr CmdHdr; 916 uint16_t Action; // see following 917 uint16_t RadarTypeCode; 918 } __packed HostCmd_802_11h_Detect_Radar; 919 920 #define DR_DFS_DISABLE 0 921 #define DR_CHK_CHANNEL_AVAILABLE_START 1 922 #define DR_CHK_CHANNEL_AVAILABLE_STOP 2 923 #define DR_IN_SERVICE_MONITOR_START 3 924 925 //New Structure for Update Tim 30/9/2003 926 typedef struct { 927 FWCmdHdr CmdHdr; 928 uint16_t Aid; 929 uint32_t Set; 930 } __packed HostCmd_UpdateTIM; 931 932 typedef struct { 933 FWCmdHdr CmdHdr; 934 uint32_t SsidBroadcastEnable; 935 } __packed HostCmd_SSID_BROADCAST; 936 937 typedef struct { 938 FWCmdHdr CmdHdr; 939 uint32_t WdsEnable; 940 } __packed HostCmd_WDS; 941 942 typedef struct { 943 FWCmdHdr CmdHdr; 944 uint32_t Next11hChannel; 945 uint32_t Mode; 946 uint32_t InitialCount; 947 uint32_t ChannelFlags ; 948 } __packed HostCmd_SET_SWITCH_CHANNEL; 949 950 typedef struct { 951 FWCmdHdr CmdHdr; 952 uint32_t SpectrumMgmt; 953 } __packed HostCmd_SET_SPECTRUM_MGMT; 954 955 typedef struct { 956 FWCmdHdr CmdHdr; 957 int32_t PowerConstraint; 958 } __packed HostCmd_SET_POWER_CONSTRAINT; 959 960 typedef struct { 961 uint8_t FirstChannelNo; 962 uint8_t NoofChannel; 963 uint8_t MaxTransmitPw; 964 } __packed DomainChannelEntry; 965 966 typedef struct { 967 uint8_t CountryString[3]; 968 uint8_t GChannelLen; 969 DomainChannelEntry DomainEntryG[1]; /** Assume only 1 G zone **/ 970 uint8_t AChannelLen; 971 DomainChannelEntry DomainEntryA[20]; /** Assume max of 5 A zone **/ 972 } __packed DomainCountryInfo; 973 974 typedef struct { 975 FWCmdHdr CmdHdr; 976 uint32_t Action ; // 0 -> unset, 1 ->set 977 DomainCountryInfo DomainInfo ; 978 } __packed HostCmd_SET_COUNTRY_INFO; 979 980 typedef struct { 981 FWCmdHdr CmdHdr; 982 uint16_t regionCode ; 983 } __packed HostCmd_SET_REGIONCODE_INFO; 984 985 // for HostCmd_CMD_SET_WMM_MODE 986 typedef struct { 987 FWCmdHdr CmdHdr; 988 uint16_t Action; // 0->unset, 1->set 989 } __packed HostCmd_FW_SetWMMMode; 990 991 typedef struct { 992 FWCmdHdr CmdHdr; 993 uint16_t Action; // 0->unset, 1->set 994 uint16_t IeListLen; 995 uint8_t IeList[200]; 996 } __packed HostCmd_FW_SetIEs; 997 998 #define EDCA_PARAM_SIZE 18 999 #define BA_PARAM_SIZE 2 1000 1001 typedef struct { 1002 FWCmdHdr CmdHdr; 1003 uint16_t Action; //0 = get all, 0x1 =set CWMin/Max, 0x2 = set TXOP , 0x4 =set AIFSN 1004 uint16_t TxOP; // in unit of 32 us 1005 uint32_t CWMax; // 0~15 1006 uint32_t CWMin; // 0~15 1007 uint8_t AIFSN; 1008 uint8_t TxQNum; // Tx Queue number. 1009 } __packed HostCmd_FW_SET_EDCA_PARAMS; 1010 1011 /****************************************************************************** 1012 @HWENCR@ 1013 Hardware Encryption related data structures and constant definitions. 1014 Note that all related changes are marked with the @HWENCR@ tag. 1015 *******************************************************************************/ 1016 1017 #define MAX_ENCR_KEY_LENGTH 16 /* max 128 bits - depends on type */ 1018 #define MIC_KEY_LENGTH 8 /* size of Tx/Rx MIC key - 8 bytes*/ 1019 1020 #define ENCR_KEY_TYPE_ID_WEP 0x00 /* Key type is WEP */ 1021 #define ENCR_KEY_TYPE_ID_TKIP 0x01 /* Key type is TKIP */ 1022 #define ENCR_KEY_TYPE_ID_AES 0x02 /* Key type is AES-CCMP */ 1023 1024 /* flags used in structure - same as driver EKF_XXX flags */ 1025 #define ENCR_KEY_FLAG_INUSE 0x00000001 /* indicate key is in use */ 1026 #define ENCR_KEY_FLAG_RXGROUPKEY 0x00000002 /* Group key for RX only */ 1027 #define ENCR_KEY_FLAG_TXGROUPKEY 0x00000004 /* Group key for TX */ 1028 #define ENCR_KEY_FLAG_PAIRWISE 0x00000008 /* pairwise */ 1029 #define ENCR_KEY_FLAG_RXONLY 0x00000010 /* only used for RX */ 1030 // These flags are new additions - for hardware encryption commands only. 1031 #define ENCR_KEY_FLAG_AUTHENTICATOR 0x00000020 /* Key is for Authenticator */ 1032 #define ENCR_KEY_FLAG_TSC_VALID 0x00000040 /* Sequence counters valid */ 1033 #define ENCR_KEY_FLAG_WEP_TXKEY 0x01000000 /* Tx key for WEP */ 1034 #define ENCR_KEY_FLAG_MICKEY_VALID 0x02000000 /* Tx/Rx MIC keys are valid */ 1035 1036 /* 1037 UPDATE_ENCRYPTION command action type. 1038 */ 1039 typedef enum { 1040 // request to enable/disable HW encryption 1041 EncrActionEnableHWEncryption, 1042 // request to set encryption key 1043 EncrActionTypeSetKey, 1044 // request to remove one or more keys 1045 EncrActionTypeRemoveKey, 1046 EncrActionTypeSetGroupKey 1047 } ENCR_ACTION_TYPE; 1048 1049 /* 1050 Key material definitions (for WEP, TKIP, & AES-CCMP) 1051 */ 1052 1053 /* 1054 WEP Key material definition 1055 ---------------------------- 1056 WEPKey --> An array of 'MAX_ENCR_KEY_LENGTH' bytes. 1057 Note that we do not support 152bit WEP keys 1058 */ 1059 typedef struct { 1060 // WEP key material (max 128bit) 1061 uint8_t KeyMaterial[ MAX_ENCR_KEY_LENGTH ]; 1062 } __packed WEP_TYPE_KEY; 1063 1064 /* 1065 TKIP Key material definition 1066 ---------------------------- 1067 This structure defines TKIP key material. Note that 1068 the TxMicKey and RxMicKey may or may not be valid. 1069 */ 1070 /* TKIP Sequence counter - 24 bits */ 1071 /* Incremented on each fragment MPDU */ 1072 typedef struct { 1073 uint16_t low; 1074 uint32_t high; 1075 } __packed ENCR_TKIPSEQCNT; 1076 1077 typedef struct { 1078 // TKIP Key material. Key type (group or pairwise key) is 1079 // determined by flags in KEY_PARAM_SET structure. 1080 uint8_t KeyMaterial[ MAX_ENCR_KEY_LENGTH ]; 1081 uint8_t TkipTxMicKey[ MIC_KEY_LENGTH ]; 1082 uint8_t TkipRxMicKey[ MIC_KEY_LENGTH ]; 1083 ENCR_TKIPSEQCNT TkipRsc; 1084 ENCR_TKIPSEQCNT TkipTsc; 1085 } __packed TKIP_TYPE_KEY; 1086 1087 /* 1088 AES-CCMP Key material definition 1089 -------------------------------- 1090 This structure defines AES-CCMP key material. 1091 */ 1092 typedef struct { 1093 // AES Key material 1094 uint8_t KeyMaterial[ MAX_ENCR_KEY_LENGTH ]; 1095 } __packed AES_TYPE_KEY; 1096 1097 /* 1098 Encryption key definition. 1099 -------------------------- 1100 This structure provides all required/essential 1101 information about the key being set/removed. 1102 */ 1103 typedef struct { 1104 uint16_t Length; // Total length of this structure 1105 uint16_t KeyTypeId; // Key type - WEP, TKIP or AES-CCMP. 1106 uint32_t KeyInfo; // key flags (ENCR_KEY_FLAG_XXX_ 1107 uint32_t KeyIndex; // For WEP only - actual key index 1108 uint16_t KeyLen; // Size of the key 1109 union { // Key material (variable size array) 1110 WEP_TYPE_KEY WepKey; 1111 TKIP_TYPE_KEY TkipKey; 1112 AES_TYPE_KEY AesKey; 1113 }__packed Key; 1114 #ifdef MWL_MBSS_SUPPORT 1115 uint8_t Macaddr[6]; 1116 #endif 1117 } __packed KEY_PARAM_SET; 1118 1119 /* 1120 HostCmd_FW_UPDATE_ENCRYPTION 1121 ---------------------------- 1122 Define data structure for updating firmware encryption keys. 1123 1124 */ 1125 typedef struct { 1126 FWCmdHdr CmdHdr; 1127 uint32_t ActionType; // ENCR_ACTION_TYPE 1128 uint32_t DataLength; // size of the data buffer attached. 1129 #ifdef MWL_MBSS_SUPPORT 1130 uint8_t macaddr[6]; 1131 #endif 1132 uint8_t ActionData[1]; 1133 } __packed HostCmd_FW_UPDATE_ENCRYPTION; 1134 1135 1136 typedef struct { 1137 FWCmdHdr CmdHdr; 1138 uint32_t ActionType; // ENCR_ACTION_TYPE 1139 uint32_t DataLength; // size of the data buffer attached. 1140 KEY_PARAM_SET KeyParam; 1141 #ifndef MWL_MBSS_SUPPORT 1142 uint8_t Macaddr[8]; /* XXX? */ 1143 #endif 1144 } __packed HostCmd_FW_UPDATE_ENCRYPTION_SET_KEY; 1145 1146 typedef struct { 1147 // Rate flags - see above. 1148 uint32_t Flags; 1149 // Rate in 500Kbps units. 1150 uint8_t RateKbps; 1151 // 802.11 rate to conversion table index value. 1152 // This is the value required by the firmware/hardware. 1153 uint16_t RateCodeToIndex; 1154 }__packed RATE_INFO; 1155 1156 /* 1157 UPDATE_STADB command action type. 1158 */ 1159 typedef enum { 1160 // request to add entry to stainfo db 1161 StaInfoDbActionAddEntry, 1162 // request to modify peer entry 1163 StaInfoDbActionModifyEntry, 1164 // request to remove peer from stainfo db 1165 StaInfoDbActionRemoveEntry 1166 }__packed STADB_ACTION_TYPE; 1167 1168 /* 1169 @11E-BA@ 1170 802.11e/WMM Related command(s)/data structures 1171 */ 1172 1173 // Flag to indicate if the stream is an immediate block ack stream. 1174 // if this bit is not set, the stream is delayed block ack stream. 1175 #define BASTREAM_FLAG_DELAYED_TYPE 0x00 1176 #define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01 1177 1178 // Flag to indicate the direction of the stream (upstream/downstream). 1179 // If this bit is not set, the direction is downstream. 1180 #define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00 1181 #define BASTREAM_FLAG_DIRECTION_DOWNSTREAM 0x02 1182 #define BASTREAM_FLAG_DIRECTION_DLP 0x04 1183 #define BASTREAM_FLAG_DIRECTION_BOTH 0x06 1184 1185 typedef enum { 1186 BaCreateStream, 1187 BaUpdateStream, 1188 BaDestroyStream, 1189 BaFlushStream, 1190 BaCheckCreateStream 1191 } BASTREAM_ACTION_TYPE; 1192 1193 typedef struct { 1194 uint32_t Context; 1195 } __packed BASTREAM_CONTEXT; 1196 1197 // parameters for block ack creation 1198 typedef struct { 1199 // BA Creation flags - see above 1200 uint32_t Flags; 1201 // idle threshold 1202 uint32_t IdleThrs; 1203 // block ack transmit threshold (after how many pkts should we send BAR?) 1204 uint32_t BarThrs; 1205 // receiver window size 1206 uint32_t WindowSize; 1207 // MAC Address of the BA partner 1208 uint8_t PeerMacAddr[6]; 1209 // Dialog Token 1210 uint8_t DialogToken; 1211 //TID for the traffic stream in this BA 1212 uint8_t Tid; 1213 // shared memory queue ID (not sure if this is required) 1214 uint8_t QueueId; 1215 uint8_t ParamInfo; 1216 // returned by firmware - firmware context pointer. 1217 // this context pointer will be passed to firmware for all future commands. 1218 BASTREAM_CONTEXT FwBaContext; 1219 uint8_t ResetSeqNo; /** 0 or 1**/ 1220 uint16_t StartSeqNo; 1221 }__packed BASTREAM_CREATE_STREAM; 1222 1223 // new transmit sequence number information 1224 typedef struct { 1225 // BA flags - see above 1226 uint32_t Flags; 1227 // returned by firmware in the create ba stream response 1228 BASTREAM_CONTEXT FwBaContext; 1229 // new sequence number for this block ack stream 1230 uint16_t BaSeqNum; 1231 }__packed BASTREAM_UPDATE_STREAM; 1232 1233 typedef struct { 1234 // BA Stream flags 1235 uint32_t Flags; 1236 // returned by firmware in the create ba stream response 1237 BASTREAM_CONTEXT FwBaContext; 1238 }__packed BASTREAM_STREAM_INFO; 1239 1240 //Command to create/destroy block ACK 1241 typedef struct { 1242 FWCmdHdr CmdHdr; 1243 uint32_t ActionType; 1244 union 1245 { 1246 // information required to create BA Stream... 1247 BASTREAM_CREATE_STREAM CreateParams; 1248 // update starting/new sequence number etc. 1249 BASTREAM_UPDATE_STREAM UpdtSeqNum; 1250 // destroy an existing stream... 1251 BASTREAM_STREAM_INFO DestroyParams; 1252 // destroy an existing stream... 1253 BASTREAM_STREAM_INFO FlushParams; 1254 }__packed BaInfo; 1255 }__packed HostCmd_FW_BASTREAM; 1256 1257 // Define data structure for HostCmd_CMD_GET_WATCHDOG_BITMAP 1258 typedef struct { 1259 FWCmdHdr CmdHdr; 1260 uint8_t Watchdogbitmap; // for SW/BA 1261 } __packed HostCmd_FW_GET_WATCHDOG_BITMAP; 1262 1263 1264 1265 // Define data structure for HostCmd_CMD_SET_REGION_POWER 1266 typedef struct { 1267 FWCmdHdr CmdHdr; 1268 uint16_t MaxPowerLevel; 1269 uint16_t Reserved; 1270 } __packed HostCmd_DS_SET_REGION_POWER; 1271 1272 // Define data structure for HostCmd_CMD_SET_RATE_ADAPT_MODE 1273 typedef struct { 1274 FWCmdHdr CmdHdr; 1275 uint16_t Action; 1276 uint16_t RateAdaptMode; 1277 } __packed HostCmd_DS_SET_RATE_ADAPT_MODE; 1278 1279 // Define data structure for HostCmd_CMD_SET_LINKADAPT_CS_MODE 1280 typedef struct { 1281 FWCmdHdr CmdHdr; 1282 uint16_t Action; 1283 uint16_t CSMode; 1284 } __packed HostCmd_DS_SET_LINKADAPT_CS_MODE; 1285 1286 typedef struct { 1287 FWCmdHdr CmdHdr; 1288 uint32_t NProtectFlag; 1289 } __packed HostCmd_FW_SET_N_PROTECT_FLAG; 1290 1291 typedef struct { 1292 FWCmdHdr CmdHdr; 1293 uint8_t NProtectOpMode; 1294 } __packed HostCmd_FW_SET_N_PROTECT_OPMODE; 1295 1296 typedef struct { 1297 FWCmdHdr CmdHdr; 1298 uint8_t OptLevel; 1299 } __packed HostCmd_FW_SET_OPTIMIZATION_LEVEL; 1300 1301 typedef struct { 1302 FWCmdHdr CmdHdr; 1303 uint8_t annex; 1304 uint8_t index; 1305 uint8_t len; 1306 uint8_t Reserverd; 1307 #define CAL_TBL_SIZE 160 1308 uint8_t calTbl[CAL_TBL_SIZE]; 1309 } __packed HostCmd_FW_GET_CALTABLE; 1310 1311 typedef struct { 1312 FWCmdHdr CmdHdr; 1313 uint8_t Addr[6]; 1314 uint8_t Enable; 1315 uint8_t Mode; 1316 } __packed HostCmd_FW_SET_MIMOPSHT; 1317 1318 #define MAX_BEACON_SIZE 1024 1319 typedef struct { 1320 FWCmdHdr CmdHdr; 1321 uint16_t Bcnlen; 1322 uint8_t Reserverd[2]; 1323 uint8_t Bcn[MAX_BEACON_SIZE]; 1324 } __packed HostCmd_FW_GET_BEACON; 1325 1326 typedef struct { 1327 FWCmdHdr CmdHdr; 1328 uint8_t NumberOfPowersave; 1329 uint8_t reserved; 1330 } __packed HostCmd_SET_POWERSAVESTATION; 1331 1332 typedef struct { 1333 FWCmdHdr CmdHdr; 1334 uint16_t Aid; 1335 uint32_t Set; 1336 uint8_t reserved; 1337 } __packed HostCmd_SET_TIM; 1338 1339 typedef struct { 1340 FWCmdHdr CmdHdr; 1341 uint8_t TrafficMap[251]; 1342 uint8_t reserved; 1343 } __packed HostCmd_GET_TIM; 1344 1345 typedef struct { 1346 FWCmdHdr CmdHdr; 1347 uint8_t MacAddr[6]; 1348 uint8_t TID; 1349 uint16_t SeqNo; 1350 uint8_t reserved; 1351 } __packed HostCmd_GET_SEQNO; 1352 #endif /* _MWL_HALREG_H_ */ 1353