1 /*- 2 * Copyright (c) 2007-2009 Sam Leffler, Errno Consulting 3 * Copyright (c) 2007-2009 Marvell Semiconductor, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer, 11 * without modification. 12 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 13 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 14 * redistribution must be conditioned upon including a substantially 15 * similar Disclaimer requirement for further binary redistribution. 16 * 17 * NO WARRANTY 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 21 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 22 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 23 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 26 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28 * THE POSSIBILITY OF SUCH DAMAGES. 29 * 30 * $FreeBSD$ 31 */ 32 33 #ifndef _MWL_HAL_H_ 34 #define _MWL_HAL_H_ 35 /* 36 * Hardware Access Layer for Marvell Wireless Devices. 37 */ 38 39 #define MWL_MBSS_SUPPORT /* enable multi-bss support */ 40 41 /* 42 * Define total number of TX queues in the shared memory. 43 * This count includes the EDCA queues, Block Ack queues, and HCCA queues 44 * In addition to this, there could be a management packet queue some 45 * time in the future 46 */ 47 #define MWL_NUM_EDCA_QUEUES 4 48 #define MWL_NUM_HCCA_QUEUES 0 49 #define MWL_NUM_BA_QUEUES 0 50 #define MWL_NUM_MGMT_QUEUES 0 51 #define MWL_NUM_TX_QUEUES \ 52 (MWL_NUM_EDCA_QUEUES + MWL_NUM_HCCA_QUEUES + MWL_NUM_BA_QUEUES + \ 53 MWL_NUM_MGMT_QUEUES) 54 #define MWL_MAX_RXWCB_QUEUES 1 55 56 #define MWL_MAX_SUPPORTED_RATES 12 57 #define MWL_MAX_SUPPORTED_MCS 32 58 59 typedef enum { 60 MWL_HAL_OK 61 } MWL_HAL_STATUS; 62 63 /* 64 * Transmit queue assignment. 65 */ 66 enum { 67 MWL_WME_AC_BK = 0, /* background access category */ 68 MWL_WME_AC_BE = 1, /* best effort access category*/ 69 MWL_WME_AC_VI = 2, /* video access category */ 70 MWL_WME_AC_VO = 3, /* voice access category */ 71 }; 72 73 struct device; 74 75 struct mwl_hal { 76 bus_space_handle_t mh_ioh; /* BAR 1 copied from softc */ 77 bus_space_tag_t mh_iot; 78 uint32_t mh_imask; /* interrupt mask */ 79 /* remainder is opaque to driver */ 80 }; 81 struct mwl_hal *mwl_hal_attach(struct device *dev, uint16_t devid, 82 bus_space_handle_t ioh, bus_space_tag_t iot, bus_dma_tag_t tag); 83 void mwl_hal_detach(struct mwl_hal *); 84 85 /* 86 * Query whether multi-bss support is available/enabled. 87 */ 88 int mwl_hal_ismbsscapable(struct mwl_hal *); 89 90 typedef enum { 91 MWL_HAL_AP, 92 MWL_HAL_STA, /* infrastructure mode */ 93 MWL_HAL_IBSS /* ibss/adhoc mode */ 94 } MWL_HAL_BSSTYPE; 95 struct mwl_hal_vap; 96 97 struct mwl_hal_vap *mwl_hal_newvap(struct mwl_hal *, MWL_HAL_BSSTYPE, 98 const uint8_t mac[6]); 99 void mwl_hal_delvap(struct mwl_hal_vap *); 100 101 enum { 102 MWL_HAL_DEBUG_SENDCMD = 0x00000001, 103 MWL_HAL_DEBUG_CMDDONE = 0x00000002, 104 MWL_HAL_DEBUG_IGNHANG = 0x00000004, 105 }; 106 void mwl_hal_setdebug(struct mwl_hal *, int); 107 int mwl_hal_getdebug(struct mwl_hal *); 108 109 typedef struct { 110 uint16_t freqLow, freqHigh; 111 int nchannels; 112 struct mwl_hal_channel { 113 uint16_t freq; /* channel center */ 114 uint8_t ieee; /* channel number */ 115 int8_t maxTxPow; /* max tx power (dBm) */ 116 uint8_t targetPowers[4];/* target powers (dBm) */ 117 #define MWL_HAL_MAXCHAN 40 118 } channels[MWL_HAL_MAXCHAN]; 119 } MWL_HAL_CHANNELINFO; 120 int mwl_hal_getchannelinfo(struct mwl_hal *, int band, int chw, 121 const MWL_HAL_CHANNELINFO **); 122 123 /* 124 * Return the current ISR setting and clear the cause. 125 */ 126 static __inline void 127 mwl_hal_getisr(struct mwl_hal *mh, uint32_t *status) 128 { 129 #define MACREG_REG_A2H_INTERRUPT_CAUSE 0x00000C30 // (From ARM to host) 130 #define MACREG_REG_INT_CODE 0x00000C14 131 uint32_t cause; 132 133 cause = bus_space_read_4(mh->mh_iot, mh->mh_ioh, 134 MACREG_REG_A2H_INTERRUPT_CAUSE); 135 if (cause == 0xffffffff) { /* card removed */ 136 cause = 0; 137 } else if (cause != 0) { 138 /* clear cause bits */ 139 bus_space_write_4(mh->mh_iot, mh->mh_ioh, 140 MACREG_REG_A2H_INTERRUPT_CAUSE, cause &~ mh->mh_imask); 141 (void) bus_space_read_4(mh->mh_iot, mh->mh_ioh, 142 MACREG_REG_INT_CODE); 143 cause &= mh->mh_imask; 144 } 145 *status = cause; 146 #undef MACREG_REG_INT_CODE 147 #undef MACREG_REG_A2H_INTERRUPT_CAUSE 148 } 149 150 void mwl_hal_intrset(struct mwl_hal *mh, uint32_t mask); 151 152 /* 153 * Kick the firmware to tell it there are new tx descriptors 154 * for processing. The driver says what h/w q has work in 155 * case the f/w ever gets smarter. 156 */ 157 static __inline void 158 mwl_hal_txstart(struct mwl_hal *mh, int qnum) 159 { 160 #define MACREG_REG_H2A_INTERRUPT_EVENTS 0x00000C18 // (From host to ARM) 161 #define MACREG_H2ARIC_BIT_PPA_READY 0x00000001 // bit 0 162 #define MACREG_REG_INT_CODE 0x00000C14 163 164 bus_space_write_4(mh->mh_iot, mh->mh_ioh, 165 MACREG_REG_H2A_INTERRUPT_EVENTS, MACREG_H2ARIC_BIT_PPA_READY); 166 (void) bus_space_read_4(mh->mh_iot, mh->mh_ioh, MACREG_REG_INT_CODE); 167 #undef MACREG_REG_INT_CODE 168 #undef MACREG_H2ARIC_BIT_PPA_READY 169 #undef MACREG_REG_H2A_INTERRUPT_EVENTS 170 } 171 172 void mwl_hal_cmddone(struct mwl_hal *mh); 173 174 typedef struct { 175 uint32_t FreqBand : 6, 176 #define MWL_FREQ_BAND_2DOT4GHZ 0x1 177 #define MWL_FREQ_BAND_5GHZ 0x4 178 ChnlWidth: 5, 179 #define MWL_CH_10_MHz_WIDTH 0x1 180 #define MWL_CH_20_MHz_WIDTH 0x2 181 #define MWL_CH_40_MHz_WIDTH 0x4 182 ExtChnlOffset: 2, 183 #define MWL_EXT_CH_NONE 0x0 184 #define MWL_EXT_CH_ABOVE_CTRL_CH 0x1 185 #define MWL_EXT_CH_BELOW_CTRL_CH 0x3 186 : 19; /* reserved */ 187 } MWL_HAL_CHANNEL_FLAGS; 188 189 typedef struct { 190 uint32_t channel; 191 MWL_HAL_CHANNEL_FLAGS channelFlags; 192 } MWL_HAL_CHANNEL; 193 194 /* 195 * Get Hardware/Firmware capabilities. 196 */ 197 struct mwl_hal_hwspec { 198 uint8_t hwVersion; /* version of the HW */ 199 uint8_t hostInterface; /* host interface */ 200 uint16_t maxNumWCB; /* max # of WCB FW handles */ 201 uint16_t maxNumMCAddr; /* max # of mcast addresses FW handles*/ 202 uint16_t maxNumTxWcb; /* max # of tx descs per WCB */ 203 uint8_t macAddr[6]; /* MAC address programmed in HW */ 204 uint16_t regionCode; /* EEPROM region code */ 205 uint16_t numAntennas; /* Number of antenna used */ 206 uint32_t fwReleaseNumber; /* firmware release number */ 207 uint32_t wcbBase0; 208 uint32_t rxDescRead; 209 uint32_t rxDescWrite; 210 uint32_t ulFwAwakeCookie; 211 uint32_t wcbBase[4]; 212 }; 213 int mwl_hal_gethwspecs(struct mwl_hal *mh, struct mwl_hal_hwspec *); 214 215 /* 216 * Supply tx/rx dma-related settings to the firmware. 217 */ 218 struct mwl_hal_txrxdma { 219 uint32_t maxNumWCB; /* max # of WCB FW handles */ 220 uint32_t maxNumTxWcb; /* max # of tx descs per WCB */ 221 uint32_t rxDescRead; 222 uint32_t rxDescWrite; 223 uint32_t wcbBase[4]; 224 }; 225 int mwl_hal_sethwdma(struct mwl_hal *mh, const struct mwl_hal_txrxdma *); 226 227 /* 228 * Get Hardware Statistics. 229 * 230 * Items marked with ! are deprecated and not ever updated. In 231 * some cases this is because work has been moved to the host (e.g. 232 * rx defragmentation). 233 */ 234 struct mwl_hal_hwstats { 235 uint32_t TxRetrySuccesses; /* tx success w/ 1 retry */ 236 uint32_t TxMultipleRetrySuccesses;/* tx success w/ >1 retry */ 237 uint32_t TxFailures; /* tx fail due to no ACK */ 238 uint32_t RTSSuccesses; /* CTS rx'd for RTS */ 239 uint32_t RTSFailures; /* CTS not rx'd for RTS */ 240 uint32_t AckFailures; /* same as TxFailures */ 241 uint32_t RxDuplicateFrames; /* rx discard for dup seqno */ 242 uint32_t FCSErrorCount; /* rx discard for bad FCS */ 243 uint32_t TxWatchDogTimeouts; /* MAC tx hang (f/w recovery) */ 244 uint32_t RxOverflows; /* no f/w buffer for rx data */ 245 uint32_t RxFragErrors; /* !rx fail due to defrag */ 246 uint32_t RxMemErrors; /* out of mem or desc corrupted 247 in some way */ 248 uint32_t RxPointerErrors; /* MAC internal ptr problem */ 249 uint32_t TxUnderflows; /* !tx underflow on dma */ 250 uint32_t TxDone; /* MAC tx ops completed 251 (possibly w/ error) */ 252 uint32_t TxDoneBufTryPut; /* ! */ 253 uint32_t TxDoneBufPut; /* same as TxDone */ 254 uint32_t Wait4TxBuf; /* !no f/w buf avail when 255 supplied a tx descriptor */ 256 uint32_t TxAttempts; /* tx descriptors processed */ 257 uint32_t TxSuccesses; /* tx attempts successful */ 258 uint32_t TxFragments; /* tx with fragmentation */ 259 uint32_t TxMulticasts; /* tx multicast frames */ 260 uint32_t RxNonCtlPkts; /* rx non-control frames */ 261 uint32_t RxMulticasts; /* rx multicast frames */ 262 uint32_t RxUndecryptableFrames; /* rx failed due to crypto */ 263 uint32_t RxICVErrors; /* rx failed due to ICV check */ 264 uint32_t RxExcludedFrames; /* rx discarded, e.g. bssid */ 265 }; 266 int mwl_hal_gethwstats(struct mwl_hal *mh, struct mwl_hal_hwstats *); 267 268 /* 269 * Set HT Guard Interval. 270 * 271 * GIType = 0: enable long and short GI 272 * GIType = 1: enable short GI 273 * GIType = 2: enable long GI 274 */ 275 int mwl_hal_sethtgi(struct mwl_hal_vap *, int GIType); 276 277 /* 278 * Set Radio Configuration. 279 * 280 * onoff != 0 turns radio on; otherwise off. 281 * if radio is enabled, the preamble is set too. 282 */ 283 typedef enum { 284 WL_LONG_PREAMBLE = 1, 285 WL_SHORT_PREAMBLE = 3, 286 WL_AUTO_PREAMBLE = 5, 287 } MWL_HAL_PREAMBLE; 288 int mwl_hal_setradio(struct mwl_hal *mh, int onoff, MWL_HAL_PREAMBLE preamble); 289 290 /* 291 * Set Antenna Configuration (legacy operation). 292 * 293 * The RX antenna can be selected using the the bitmask 294 * ant (bit 0 = antenna 1, bit 1 = antenna 2, etc.) 295 * (diversity?XXX) 296 */ 297 typedef enum { 298 WL_ANTENNATYPE_RX = 1, 299 WL_ANTENNATYPE_TX = 2, 300 } MWL_HAL_ANTENNA; 301 int mwl_hal_setantenna(struct mwl_hal *mh, MWL_HAL_ANTENNA dirSet, int ant); 302 303 /* 304 * Set the threshold for using RTS on TX. 305 */ 306 int mwl_hal_setrtsthreshold(struct mwl_hal_vap *, int threshold); 307 308 /* 309 * Set the adapter to operate in infrastructure mode. 310 */ 311 int mwl_hal_setinframode(struct mwl_hal_vap *); 312 313 /* 314 * Set Radar Detection Configuration. 315 */ 316 typedef enum { 317 DR_DFS_DISABLE = 0, 318 DR_CHK_CHANNEL_AVAILABLE_START = 1, 319 DR_CHK_CHANNEL_AVAILABLE_STOP = 2, 320 DR_IN_SERVICE_MONITOR_START = 3 321 } MWL_HAL_RADAR; 322 int mwl_hal_setradardetection(struct mwl_hal *mh, MWL_HAL_RADAR action); 323 /* 324 * Set the region code that selects the radar bin'ing agorithm. 325 */ 326 int mwl_hal_setregioncode(struct mwl_hal *mh, int regionCode); 327 328 /* 329 * Initiate an 802.11h-based channel switch. The CSA ie 330 * is included in the next beacon(s) using the specified 331 * information and the firmware counts down until switch 332 * time after which it notifies the driver by delivering 333 * an interrupt with MACREG_A2HRIC_BIT_CHAN_SWITCH set in 334 * the cause register. 335 */ 336 int mwl_hal_setchannelswitchie(struct mwl_hal *, 337 const MWL_HAL_CHANNEL *nextchan, uint32_t mode, uint32_t count); 338 339 /* 340 * Set regdomain code (IEEE SKU). 341 */ 342 enum { 343 DOMAIN_CODE_FCC = 0x10, /* USA */ 344 DOMAIN_CODE_IC = 0x20, /* Canda */ 345 DOMAIN_CODE_ETSI = 0x30, /* Europe */ 346 DOMAIN_CODE_SPAIN = 0x31, /* Spain */ 347 DOMAIN_CODE_FRANCE = 0x32, /* France */ 348 DOMAIN_CODE_ETSI_131 = 0x130,/* ETSI w/ 1.3.1 radar type */ 349 DOMAIN_CODE_MKK = 0x40, /* Japan */ 350 DOMAIN_CODE_MKK2 = 0x41, /* Japan w/ 10MHz chan spacing */ 351 DOMAIN_CODE_DGT = 0x80, /* Taiwan */ 352 DOMAIN_CODE_AUS = 0x81, /* Australia */ 353 }; 354 355 /* 356 * Transmit rate control. Rate codes with bit 0x80 set are 357 * interpreted as MCS codes (this limits us to 0-127). The 358 * transmit rate can be set to a single fixed rate or can 359 * be configured to start at an initial rate and drop based 360 * on retry counts. 361 */ 362 typedef enum { 363 RATE_AUTO = 0, /* rate selected by firmware */ 364 RATE_FIXED = 2, /* rate fixed */ 365 RATE_FIXED_DROP = 1, /* rate starts fixed but may drop */ 366 } MWL_HAL_TXRATE_HANDLING; 367 368 typedef struct { 369 uint8_t McastRate; /* rate for multicast frames */ 370 #define RATE_MCS 0x80 /* rate is an MCS index */ 371 uint8_t MgtRate; /* rate for management frames */ 372 struct { 373 uint8_t TryCount; /* try this many times */ 374 uint8_t Rate; /* use this tx rate */ 375 } RateSeries[4]; /* rate series */ 376 } MWL_HAL_TXRATE; 377 378 int mwl_hal_settxrate(struct mwl_hal_vap *, 379 MWL_HAL_TXRATE_HANDLING handling, const MWL_HAL_TXRATE *rate); 380 /* NB: hack for setting rates while scanning */ 381 int mwl_hal_settxrate_auto(struct mwl_hal *, const MWL_HAL_TXRATE *rate); 382 383 /* 384 * Set the Slot Time Configuration. 385 * NB: usecs must either be 9 or 20 for now. 386 */ 387 int mwl_hal_setslottime(struct mwl_hal *mh, int usecs); 388 389 /* 390 * Adjust current transmit power settings according to powerLevel. 391 * This translates to low/medium/high use of the current tx power rate tables. 392 */ 393 int mwl_hal_adjusttxpower(struct mwl_hal *, uint32_t powerLevel); 394 /* 395 * Set the transmit power for the specified channel; the power 396 * is taken from the calibration data and capped according to 397 * the specified max tx power (in dBm). 398 */ 399 int mwl_hal_settxpower(struct mwl_hal *, const MWL_HAL_CHANNEL *, 400 uint8_t maxtxpow); 401 402 /* 403 * Set the Multicast Address Filter. 404 * A packed array addresses is specified. 405 */ 406 #define MWL_HAL_MCAST_MAX 32 407 int mwl_hal_setmcast(struct mwl_hal *mh, int nmc, const uint8_t macs[]); 408 409 /* 410 * Crypto Configuration. 411 */ 412 typedef struct { 413 uint16_t pad; 414 uint16_t keyTypeId; 415 #define KEY_TYPE_ID_WEP 0 416 #define KEY_TYPE_ID_TKIP 1 417 #define KEY_TYPE_ID_AES 2 /* AES-CCMP */ 418 uint32_t keyFlags; 419 #define KEY_FLAG_INUSE 0x00000001 /* indicate key is in use */ 420 #define KEY_FLAG_RXGROUPKEY 0x00000002 /* Group key for RX only */ 421 #define KEY_FLAG_TXGROUPKEY 0x00000004 /* Group key for TX */ 422 #define KEY_FLAG_PAIRWISE 0x00000008 /* pairwise */ 423 #define KEY_FLAG_RXONLY 0x00000010 /* only used for RX */ 424 #define KEY_FLAG_AUTHENTICATOR 0x00000020 /* Key is for Authenticator */ 425 #define KEY_FLAG_TSC_VALID 0x00000040 /* Sequence counters valid */ 426 #define KEY_FLAG_WEP_TXKEY 0x01000000 /* Tx key for WEP */ 427 #define KEY_FLAG_MICKEY_VALID 0x02000000 /* Tx/Rx MIC keys are valid */ 428 uint32_t keyIndex; /* for WEP only; actual key index */ 429 uint16_t keyLen; /* key size in bytes */ 430 union { /* key material, keyLen gives size */ 431 uint8_t wep[16]; /* enough for 128 bits */ 432 uint8_t aes[16]; 433 struct { 434 /* NB: group or pairwise key is determined by keyFlags */ 435 uint8_t keyMaterial[16]; 436 uint8_t txMic[8]; 437 uint8_t rxMic[8]; 438 struct { 439 uint16_t low; 440 uint32_t high; 441 } rsc; 442 struct { 443 uint16_t low; 444 uint32_t high; 445 } tsc; 446 } __packed tkip; 447 }__packed key; 448 } __packed MWL_HAL_KEYVAL; 449 450 /* 451 * Plumb a unicast/group key. The mac address identifies 452 * the station, use the broadcast address for group keys. 453 */ 454 int mwl_hal_keyset(struct mwl_hal_vap *, const MWL_HAL_KEYVAL *kv, 455 const uint8_t mac[6]); 456 457 /* 458 * Plumb a unicast/group key. The mac address identifies 459 * the station, use the broadcast address for group keys. 460 */ 461 int mwl_hal_keyreset(struct mwl_hal_vap *, const MWL_HAL_KEYVAL *kv, 462 const uint8_t mac[6]); 463 464 /* 465 * Set the MAC address. 466 */ 467 int mwl_hal_setmac(struct mwl_hal_vap *, const uint8_t addr[6]); 468 469 /* 470 * Set the beacon frame contents. The firmware will modify the 471 * frame only to add CSA and WME ie's and to fill in dynamic fields 472 * such as the sequence #.. 473 */ 474 int mwl_hal_setbeacon(struct mwl_hal_vap *, const void *, size_t); 475 476 /* 477 * Handle power save operation for AP operation when offloaded to 478 * the host (SET_HW_SPEC_HOST_POWERSAVE). mwl_hal_setbss_powersave 479 * informs the firmware whether 1+ associated stations are in power 480 * save mode (it will then buffer mcast traffic). mwl_hal_setsta_powersave 481 * specifies a change in power save state for an associated station. 482 */ 483 int mwl_hal_setpowersave_bss(struct mwl_hal_vap *, uint8_t nsta); 484 int mwl_hal_setpowersave_sta(struct mwl_hal_vap *, uint16_t aid, int ena); 485 486 /* 487 * Set Association Configuration for station operation. 488 */ 489 int mwl_hal_setassocid(struct mwl_hal_vap *, const uint8_t bssId[6], 490 uint16_t assocId); 491 492 /* 493 * Set the current channel. 494 */ 495 int mwl_hal_setchannel(struct mwl_hal *mh, const MWL_HAL_CHANNEL *c); 496 497 /* 498 * A-MPDU Block Ack (BA) stream support. There are several 499 * streams that the driver must multiplex. Once assigned 500 * to a station the driver queues frames to a corresponding 501 * transmit queue and the firmware handles all the work. 502 * 503 * XXX no way to find out how many streams are supported 504 */ 505 typedef struct { 506 void *data[2]; /* opaque data */ 507 int txq; 508 } MWL_HAL_BASTREAM; 509 510 const MWL_HAL_BASTREAM *mwl_hal_bastream_alloc(struct mwl_hal *mh, 511 int ba_type, const uint8_t Macaddr[16], uint8_t Tid, 512 uint8_t ParamInfo, void *, void *); 513 const MWL_HAL_BASTREAM *mwl_hal_bastream_lookup(struct mwl_hal *mh, int s); 514 int mwl_hal_bastream_create(struct mwl_hal *mh, const MWL_HAL_BASTREAM *, 515 int BarThrs, int WindowSize, uint16_t seqno); 516 int mwl_hal_bastream_destroy(struct mwl_hal *mh, const MWL_HAL_BASTREAM *); 517 int mwl_hal_bastream_get_seqno(struct mwl_hal *mh, const MWL_HAL_BASTREAM *, 518 uint16_t *pseqno); 519 int mwl_hal_getwatchdogbitmap(struct mwl_hal *mh, uint8_t bitmap[1]); 520 /* for sysctl hookup for debugging */ 521 void mwl_hal_setbastreams(struct mwl_hal *mh, int mask); 522 int mwl_hal_getbastreams(struct mwl_hal *mh); 523 524 /* 525 * Inform the firmware of a new association station. 526 * The address is the MAC address of the peer station. 527 * The AID is supplied sans the 0xc000 bits. The station 528 * ID is defined by the caller. The peer information must 529 * be supplied. 530 * 531 * NB: All values are in host byte order; any byte swapping 532 * is handled by the hal. 533 */ 534 typedef struct { 535 uint32_t LegacyRateBitMap; 536 uint32_t HTRateBitMap; 537 uint16_t CapInfo; 538 uint16_t HTCapabilitiesInfo; 539 uint8_t MacHTParamInfo; 540 uint8_t Rev; 541 struct { 542 uint8_t ControlChan; 543 uint8_t AddChan; 544 uint8_t OpMode; 545 uint8_t stbc; 546 } __packed AddHtInfo; 547 } __packed MWL_HAL_PEERINFO; 548 int mwl_hal_newstation(struct mwl_hal_vap *, const uint8_t addr[6], 549 uint16_t aid, uint16_t sid, const MWL_HAL_PEERINFO *, 550 int isQosSta, int wmeInfo); 551 int mwl_hal_delstation(struct mwl_hal_vap *, const uint8_t addr[6]); 552 553 /* 554 * Prod the firmware to age packets on station power 555 * save queues and reap frames on the tx aggregation q's. 556 */ 557 int mwl_hal_setkeepalive(struct mwl_hal *mh); 558 559 typedef enum { 560 AP_MODE_B_ONLY = 1, 561 AP_MODE_G_ONLY = 2, 562 AP_MODE_MIXED = 3, 563 AP_MODE_N_ONLY = 4, 564 AP_MODE_BandN = 5, 565 AP_MODE_GandN = 6, 566 AP_MODE_BandGandN = 7, 567 AP_MODE_A_ONLY = 8, 568 AP_MODE_AandG = 10, 569 AP_MODE_AandN = 12, 570 } MWL_HAL_APMODE; 571 int mwl_hal_setapmode(struct mwl_hal_vap *, MWL_HAL_APMODE); 572 573 /* 574 * Enable/disable firmware operation. mwl_hal_start is 575 * also used to sync state updates, e.g. beacon frame 576 * reconstruction after content changes. 577 */ 578 int mwl_hal_stop(struct mwl_hal_vap *); 579 int mwl_hal_start(struct mwl_hal_vap *); 580 581 /* 582 * Enable/disable 11g protection use. This call specifies 583 * the ERP information element flags to use. 584 */ 585 int mwl_hal_setgprot(struct mwl_hal *, int); 586 587 /* 588 * Enable/disable WMM support. 589 */ 590 int mwl_hal_setwmm(struct mwl_hal *mh, int onoff); 591 592 /* 593 * Configure WMM EDCA parameters for the specified h/w ring. 594 */ 595 int mwl_hal_setedcaparams(struct mwl_hal *mh, uint8_t qnum, 596 uint32_t CWmin, uint32_t CWmax, uint8_t AIFSN, uint16_t TXOPLimit); 597 598 /* 599 * Configure rate adaptation for indooor/outdoor operation. 600 * XXX wtf? 601 */ 602 int mwl_hal_setrateadaptmode(struct mwl_hal *mh, uint16_t mode); 603 604 typedef enum { 605 CSMODE_CONSERVATIVE = 0, 606 CSMODE_AGGRESSIVE = 1, 607 CSMODE_AUTO_ENA = 2, 608 CSMODE_AUTO_DIS = 3, 609 } MWL_HAL_CSMODE; 610 int mwl_hal_setcsmode(struct mwl_hal *mh, MWL_HAL_CSMODE csmode); 611 612 /* 613 * Configure 11n protection on/off. 614 */ 615 typedef enum { 616 HTPROTECT_NONE = 0, /* disable */ 617 HTPROTECT_OPT = 1, /* optional */ 618 HTPROTECT_HT20 = 2, /* protect only HT20 */ 619 HTPROTECT_HT2040 = 3, /* protect HT20/40 */ 620 HTPROTECT_AUTO = 4, /* automatic */ 621 } MWL_HAL_HTPROTECT; 622 int mwl_hal_setnprot(struct mwl_hal_vap *, MWL_HAL_HTPROTECT mode); 623 /* 624 * Configure 11n protection mechanism for when protection is enabled. 625 */ 626 int mwl_hal_setnprotmode(struct mwl_hal_vap *, uint8_t mode); 627 628 /* 629 * Enable/disable Marvell "turbo mode"". 630 */ 631 int mwl_hal_setoptimizationlevel(struct mwl_hal *mh, int onoff); 632 633 /* 634 * Set MIMO Power Save handling for a station; the enable and mode 635 * values come directly from the Action frame. 636 */ 637 int mwl_hal_setmimops(struct mwl_hal *mh, const uint8_t addr[6], 638 uint8_t enable, uint8_t mode); 639 640 /* 641 * Retrieve the region/country code from the EEPROM. 642 */ 643 int mwl_hal_getregioncode(struct mwl_hal *mh, uint8_t *countryCode); 644 int mwl_hal_GetBeacon(struct mwl_hal *mh, uint8_t *pBcn, uint16_t *pLen); 645 int mwl_hal_SetRifs(struct mwl_hal *mh, uint8_t QNum); 646 647 /* 648 * Set/get promiscuous mode. 649 */ 650 int mwl_hal_setpromisc(struct mwl_hal *, int ena); 651 int mwl_hal_getpromisc(struct mwl_hal *); 652 653 /* 654 * Diagnostic interface. This is an open-ended interface that 655 * is opaque to applications. Diagnostic programs use this to 656 * retrieve internal data structures, etc. There is no guarantee 657 * that calling conventions for calls other than MWL_DIAG_REVS 658 * are stable between HAL releases; a diagnostic application must 659 * use the HAL revision information to deal with ABI/API differences. 660 */ 661 int mwl_hal_getdiagstate(struct mwl_hal *mh, int request, 662 const void *args, uint32_t argsize, 663 void **result, uint32_t *resultsize); 664 665 int mwl_hal_fwload(struct mwl_hal *mh, void *fwargs); 666 #endif /* _MWL_HAL_H_ */ 667