1665484d8SDoug Ambrisko /* 2ecea5be4SKashyap D Desai * Copyright (c) 2015, AVAGO Tech. All rights reserved. Author: Marian Choy 38e727371SKashyap D Desai * Copyright (c) 2014, LSI Corp. All rights reserved. Author: Marian Choy 4ecea5be4SKashyap D Desai * Support: freebsdraid@avagotech.com 5665484d8SDoug Ambrisko * 6665484d8SDoug Ambrisko * Redistribution and use in source and binary forms, with or without 78e727371SKashyap D Desai * modification, are permitted provided that the following conditions are 88e727371SKashyap D Desai * met: 9665484d8SDoug Ambrisko * 108e727371SKashyap D Desai * 1. Redistributions of source code must retain the above copyright notice, 118e727371SKashyap D Desai * this list of conditions and the following disclaimer. 2. Redistributions 128e727371SKashyap D Desai * in binary form must reproduce the above copyright notice, this list of 138e727371SKashyap D Desai * conditions and the following disclaimer in the documentation and/or other 148e727371SKashyap D Desai * materials provided with the distribution. 3. Neither the name of the 158e727371SKashyap D Desai * <ORGANIZATION> nor the names of its contributors may be used to endorse or 168e727371SKashyap D Desai * promote products derived from this software without specific prior written 178e727371SKashyap D Desai * permission. 18665484d8SDoug Ambrisko * 198e727371SKashyap D Desai * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 208e727371SKashyap D Desai * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 218e727371SKashyap D Desai * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 228e727371SKashyap D Desai * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 238e727371SKashyap D Desai * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 248e727371SKashyap D Desai * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 258e727371SKashyap D Desai * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 268e727371SKashyap D Desai * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 278e727371SKashyap D Desai * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 288e727371SKashyap D Desai * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29665484d8SDoug Ambrisko * POSSIBILITY OF SUCH DAMAGE. 30665484d8SDoug Ambrisko * 318e727371SKashyap D Desai * The views and conclusions contained in the software and documentation are 328e727371SKashyap D Desai * those of the authors and should not be interpreted as representing 33665484d8SDoug Ambrisko * official policies,either expressed or implied, of the FreeBSD Project. 34665484d8SDoug Ambrisko * 35ecea5be4SKashyap D Desai * Send feedback to: <megaraidfbsd@avagotech.com> Mail to: AVAGO TECHNOLOGIES 1621 368e727371SKashyap D Desai * Barber Lane, Milpitas, CA 95035 ATTN: MegaRaid FreeBSD 37665484d8SDoug Ambrisko * 38665484d8SDoug Ambrisko */ 39665484d8SDoug Ambrisko 40665484d8SDoug Ambrisko #include <sys/cdefs.h> 41665484d8SDoug Ambrisko __FBSDID("$FreeBSD$"); 42665484d8SDoug Ambrisko 43665484d8SDoug Ambrisko #include <dev/mrsas/mrsas.h> 44665484d8SDoug Ambrisko #include <dev/mrsas/mrsas_ioctl.h> 45665484d8SDoug Ambrisko 46665484d8SDoug Ambrisko #include <cam/cam.h> 47665484d8SDoug Ambrisko #include <cam/cam_ccb.h> 48665484d8SDoug Ambrisko 49665484d8SDoug Ambrisko #include <sys/sysctl.h> 50665484d8SDoug Ambrisko #include <sys/types.h> 518071588dSKashyap D Desai #include <sys/sysent.h> 52665484d8SDoug Ambrisko #include <sys/kthread.h> 53665484d8SDoug Ambrisko #include <sys/taskqueue.h> 54d18d1b47SKashyap D Desai #include <sys/smp.h> 55665484d8SDoug Ambrisko 56665484d8SDoug Ambrisko 57665484d8SDoug Ambrisko /* 58665484d8SDoug Ambrisko * Function prototypes 59665484d8SDoug Ambrisko */ 60665484d8SDoug Ambrisko static d_open_t mrsas_open; 61665484d8SDoug Ambrisko static d_close_t mrsas_close; 62665484d8SDoug Ambrisko static d_read_t mrsas_read; 63665484d8SDoug Ambrisko static d_write_t mrsas_write; 64665484d8SDoug Ambrisko static d_ioctl_t mrsas_ioctl; 65da011113SKashyap D Desai static d_poll_t mrsas_poll; 66665484d8SDoug Ambrisko 678071588dSKashyap D Desai static void mrsas_ich_startup(void *arg); 68536094dcSKashyap D Desai static struct mrsas_mgmt_info mrsas_mgmt_info; 69665484d8SDoug Ambrisko static struct mrsas_ident *mrsas_find_ident(device_t); 70d18d1b47SKashyap D Desai static int mrsas_setup_msix(struct mrsas_softc *sc); 71d18d1b47SKashyap D Desai static int mrsas_allocate_msix(struct mrsas_softc *sc); 72665484d8SDoug Ambrisko static void mrsas_shutdown_ctlr(struct mrsas_softc *sc, u_int32_t opcode); 73665484d8SDoug Ambrisko static void mrsas_flush_cache(struct mrsas_softc *sc); 74665484d8SDoug Ambrisko static void mrsas_reset_reply_desc(struct mrsas_softc *sc); 75665484d8SDoug Ambrisko static void mrsas_ocr_thread(void *arg); 76665484d8SDoug Ambrisko static int mrsas_get_map_info(struct mrsas_softc *sc); 77665484d8SDoug Ambrisko static int mrsas_get_ld_map_info(struct mrsas_softc *sc); 78665484d8SDoug Ambrisko static int mrsas_sync_map_info(struct mrsas_softc *sc); 79665484d8SDoug Ambrisko static int mrsas_get_pd_list(struct mrsas_softc *sc); 80665484d8SDoug Ambrisko static int mrsas_get_ld_list(struct mrsas_softc *sc); 81665484d8SDoug Ambrisko static int mrsas_setup_irq(struct mrsas_softc *sc); 82665484d8SDoug Ambrisko static int mrsas_alloc_mem(struct mrsas_softc *sc); 83665484d8SDoug Ambrisko static int mrsas_init_fw(struct mrsas_softc *sc); 84665484d8SDoug Ambrisko static int mrsas_setup_raidmap(struct mrsas_softc *sc); 85a688fcd0SKashyap D Desai static void megasas_setup_jbod_map(struct mrsas_softc *sc); 86a688fcd0SKashyap D Desai static int megasas_sync_pd_seq_num(struct mrsas_softc *sc, boolean_t pend); 87665484d8SDoug Ambrisko static int mrsas_clear_intr(struct mrsas_softc *sc); 88af51c29fSKashyap D Desai static int mrsas_get_ctrl_info(struct mrsas_softc *sc); 89af51c29fSKashyap D Desai static void mrsas_update_ext_vd_details(struct mrsas_softc *sc); 908e727371SKashyap D Desai static int 918e727371SKashyap D Desai mrsas_issue_blocked_abort_cmd(struct mrsas_softc *sc, 92665484d8SDoug Ambrisko struct mrsas_mfi_cmd *cmd_to_abort); 9379b4460bSKashyap D Desai static void 9479b4460bSKashyap D Desai mrsas_get_pd_info(struct mrsas_softc *sc, u_int16_t device_id); 95dbcc81dfSKashyap D Desai static struct mrsas_softc * 96dbcc81dfSKashyap D Desai mrsas_get_softc_instance(struct cdev *dev, 975844115eSKashyap D Desai u_long cmd, caddr_t arg); 98e315cf4dSKashyap D Desai u_int32_t 99e315cf4dSKashyap D Desai mrsas_read_reg_with_retries(struct mrsas_softc *sc, int offset); 100665484d8SDoug Ambrisko u_int32_t mrsas_read_reg(struct mrsas_softc *sc, int offset); 1018e727371SKashyap D Desai u_int8_t 1028e727371SKashyap D Desai mrsas_build_mptmfi_passthru(struct mrsas_softc *sc, 103665484d8SDoug Ambrisko struct mrsas_mfi_cmd *mfi_cmd); 104daeed973SKashyap D Desai void mrsas_complete_outstanding_ioctls(struct mrsas_softc *sc); 105665484d8SDoug Ambrisko int mrsas_transition_to_ready(struct mrsas_softc *sc, int ocr); 106665484d8SDoug Ambrisko int mrsas_init_adapter(struct mrsas_softc *sc); 107665484d8SDoug Ambrisko int mrsas_alloc_mpt_cmds(struct mrsas_softc *sc); 108665484d8SDoug Ambrisko int mrsas_alloc_ioc_cmd(struct mrsas_softc *sc); 109665484d8SDoug Ambrisko int mrsas_alloc_ctlr_info_cmd(struct mrsas_softc *sc); 110665484d8SDoug Ambrisko int mrsas_ioc_init(struct mrsas_softc *sc); 111665484d8SDoug Ambrisko int mrsas_bus_scan(struct mrsas_softc *sc); 112665484d8SDoug Ambrisko int mrsas_issue_dcmd(struct mrsas_softc *sc, struct mrsas_mfi_cmd *cmd); 113665484d8SDoug Ambrisko int mrsas_issue_polled(struct mrsas_softc *sc, struct mrsas_mfi_cmd *cmd); 114f0c7594bSKashyap D Desai int mrsas_reset_ctrl(struct mrsas_softc *sc, u_int8_t reset_reason); 115f0c7594bSKashyap D Desai int mrsas_wait_for_outstanding(struct mrsas_softc *sc, u_int8_t check_reason); 1164bb0a4f0SKashyap D Desai int mrsas_complete_cmd(struct mrsas_softc *sc, u_int32_t MSIxIndex); 1178bb601acSKashyap D Desai int mrsas_reset_targets(struct mrsas_softc *sc); 1188e727371SKashyap D Desai int 1198e727371SKashyap D Desai mrsas_issue_blocked_cmd(struct mrsas_softc *sc, 120665484d8SDoug Ambrisko struct mrsas_mfi_cmd *cmd); 1218e727371SKashyap D Desai int 1228e727371SKashyap D Desai mrsas_alloc_tmp_dcmd(struct mrsas_softc *sc, struct mrsas_tmp_dcmd *tcmd, 123665484d8SDoug Ambrisko int size); 124665484d8SDoug Ambrisko void mrsas_release_mfi_cmd(struct mrsas_mfi_cmd *cmd); 125665484d8SDoug Ambrisko void mrsas_wakeup(struct mrsas_softc *sc, struct mrsas_mfi_cmd *cmd); 126665484d8SDoug Ambrisko void mrsas_complete_aen(struct mrsas_softc *sc, struct mrsas_mfi_cmd *cmd); 127665484d8SDoug Ambrisko void mrsas_complete_abort(struct mrsas_softc *sc, struct mrsas_mfi_cmd *cmd); 128665484d8SDoug Ambrisko void mrsas_disable_intr(struct mrsas_softc *sc); 129665484d8SDoug Ambrisko void mrsas_enable_intr(struct mrsas_softc *sc); 130665484d8SDoug Ambrisko void mrsas_free_ioc_cmd(struct mrsas_softc *sc); 131665484d8SDoug Ambrisko void mrsas_free_mem(struct mrsas_softc *sc); 132665484d8SDoug Ambrisko void mrsas_free_tmp_dcmd(struct mrsas_tmp_dcmd *tmp); 133665484d8SDoug Ambrisko void mrsas_isr(void *arg); 134665484d8SDoug Ambrisko void mrsas_teardown_intr(struct mrsas_softc *sc); 135665484d8SDoug Ambrisko void mrsas_addr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 136665484d8SDoug Ambrisko void mrsas_kill_hba(struct mrsas_softc *sc); 137665484d8SDoug Ambrisko void mrsas_aen_handler(struct mrsas_softc *sc); 1388e727371SKashyap D Desai void 1398e727371SKashyap D Desai mrsas_write_reg(struct mrsas_softc *sc, int offset, 140665484d8SDoug Ambrisko u_int32_t value); 1418e727371SKashyap D Desai void 1428e727371SKashyap D Desai mrsas_fire_cmd(struct mrsas_softc *sc, u_int32_t req_desc_lo, 143665484d8SDoug Ambrisko u_int32_t req_desc_hi); 144665484d8SDoug Ambrisko void mrsas_free_ctlr_info_cmd(struct mrsas_softc *sc); 1458e727371SKashyap D Desai void 1468e727371SKashyap D Desai mrsas_complete_mptmfi_passthru(struct mrsas_softc *sc, 147665484d8SDoug Ambrisko struct mrsas_mfi_cmd *cmd, u_int8_t status); 148665484d8SDoug Ambrisko struct mrsas_mfi_cmd *mrsas_get_mfi_cmd(struct mrsas_softc *sc); 1498e727371SKashyap D Desai 1508e727371SKashyap D Desai MRSAS_REQUEST_DESCRIPTOR_UNION *mrsas_build_mpt_cmd 1518e727371SKashyap D Desai (struct mrsas_softc *sc, struct mrsas_mfi_cmd *cmd); 152665484d8SDoug Ambrisko 153665484d8SDoug Ambrisko extern int mrsas_cam_attach(struct mrsas_softc *sc); 154665484d8SDoug Ambrisko extern void mrsas_cam_detach(struct mrsas_softc *sc); 155665484d8SDoug Ambrisko extern void mrsas_cmd_done(struct mrsas_softc *sc, struct mrsas_mpt_cmd *cmd); 156665484d8SDoug Ambrisko extern void mrsas_free_frame(struct mrsas_softc *sc, struct mrsas_mfi_cmd *cmd); 157665484d8SDoug Ambrisko extern int mrsas_alloc_mfi_cmds(struct mrsas_softc *sc); 158665484d8SDoug Ambrisko extern struct mrsas_mpt_cmd *mrsas_get_mpt_cmd(struct mrsas_softc *sc); 159536094dcSKashyap D Desai extern int mrsas_passthru(struct mrsas_softc *sc, void *arg, u_long ioctlCmd); 160665484d8SDoug Ambrisko extern uint8_t MR_ValidateMapInfo(struct mrsas_softc *sc); 1614799d485SKashyap D Desai extern u_int16_t MR_GetLDTgtId(u_int32_t ld, MR_DRV_RAID_MAP_ALL * map); 1624799d485SKashyap D Desai extern MR_LD_RAID *MR_LdRaidGet(u_int32_t ld, MR_DRV_RAID_MAP_ALL * map); 163665484d8SDoug Ambrisko extern void mrsas_xpt_freeze(struct mrsas_softc *sc); 164665484d8SDoug Ambrisko extern void mrsas_xpt_release(struct mrsas_softc *sc); 1658e727371SKashyap D Desai extern MRSAS_REQUEST_DESCRIPTOR_UNION * 1668e727371SKashyap D Desai mrsas_get_request_desc(struct mrsas_softc *sc, 167665484d8SDoug Ambrisko u_int16_t index); 168665484d8SDoug Ambrisko extern int mrsas_bus_scan_sim(struct mrsas_softc *sc, struct cam_sim *sim); 169665484d8SDoug Ambrisko static int mrsas_alloc_evt_log_info_cmd(struct mrsas_softc *sc); 170665484d8SDoug Ambrisko static void mrsas_free_evt_log_info_cmd(struct mrsas_softc *sc); 1712a1d3bcdSKashyap D Desai void mrsas_release_mpt_cmd(struct mrsas_mpt_cmd *cmd); 1722a1d3bcdSKashyap D Desai 1732a1d3bcdSKashyap D Desai void mrsas_map_mpt_cmd_status(struct mrsas_mpt_cmd *cmd, 1742a1d3bcdSKashyap D Desai union ccb *ccb_ptr, u_int8_t status, u_int8_t extStatus, 1752a1d3bcdSKashyap D Desai u_int32_t data_length, u_int8_t *sense); 176b518670cSKashyap D Desai void 177b518670cSKashyap D Desai mrsas_write_64bit_req_desc(struct mrsas_softc *sc, u_int32_t req_desc_lo, 178b518670cSKashyap D Desai u_int32_t req_desc_hi); 1792a1d3bcdSKashyap D Desai 1808e727371SKashyap D Desai 181665484d8SDoug Ambrisko SYSCTL_NODE(_hw, OID_AUTO, mrsas, CTLFLAG_RD, 0, "MRSAS Driver Parameters"); 182665484d8SDoug Ambrisko 1838e727371SKashyap D Desai /* 184665484d8SDoug Ambrisko * PCI device struct and table 185665484d8SDoug Ambrisko * 186665484d8SDoug Ambrisko */ 187665484d8SDoug Ambrisko typedef struct mrsas_ident { 188665484d8SDoug Ambrisko uint16_t vendor; 189665484d8SDoug Ambrisko uint16_t device; 190665484d8SDoug Ambrisko uint16_t subvendor; 191665484d8SDoug Ambrisko uint16_t subdevice; 192665484d8SDoug Ambrisko const char *desc; 193665484d8SDoug Ambrisko } MRSAS_CTLR_ID; 194665484d8SDoug Ambrisko 195665484d8SDoug Ambrisko MRSAS_CTLR_ID device_table[] = { 196ecea5be4SKashyap D Desai {0x1000, MRSAS_TBOLT, 0xffff, 0xffff, "AVAGO Thunderbolt SAS Controller"}, 197ecea5be4SKashyap D Desai {0x1000, MRSAS_INVADER, 0xffff, 0xffff, "AVAGO Invader SAS Controller"}, 198ecea5be4SKashyap D Desai {0x1000, MRSAS_FURY, 0xffff, 0xffff, "AVAGO Fury SAS Controller"}, 199c620f351SKashyap D Desai {0x1000, MRSAS_INTRUDER, 0xffff, 0xffff, "AVAGO Intruder SAS Controller"}, 200c620f351SKashyap D Desai {0x1000, MRSAS_INTRUDER_24, 0xffff, 0xffff, "AVAGO Intruder_24 SAS Controller"}, 2018cd174a4SKashyap D Desai {0x1000, MRSAS_CUTLASS_52, 0xffff, 0xffff, "AVAGO Cutlass_52 SAS Controller"}, 2028cd174a4SKashyap D Desai {0x1000, MRSAS_CUTLASS_53, 0xffff, 0xffff, "AVAGO Cutlass_53 SAS Controller"}, 2037aade8bfSKashyap D Desai {0x1000, MRSAS_VENTURA, 0xffff, 0xffff, "AVAGO Ventura SAS Controller"}, 2047aade8bfSKashyap D Desai {0x1000, MRSAS_CRUSADER, 0xffff, 0xffff, "AVAGO Crusader SAS Controller"}, 2057aade8bfSKashyap D Desai {0x1000, MRSAS_HARPOON, 0xffff, 0xffff, "AVAGO Harpoon SAS Controller"}, 2067aade8bfSKashyap D Desai {0x1000, MRSAS_TOMCAT, 0xffff, 0xffff, "AVAGO Tomcat SAS Controller"}, 2077aade8bfSKashyap D Desai {0x1000, MRSAS_VENTURA_4PORT, 0xffff, 0xffff, "AVAGO Ventura_4Port SAS Controller"}, 2087aade8bfSKashyap D Desai {0x1000, MRSAS_CRUSADER_4PORT, 0xffff, 0xffff, "AVAGO Crusader_4Port SAS Controller"}, 2092909aab4SKashyap D Desai {0x1000, MRSAS_AERO_10E0, 0xffff, 0xffff, "BROADCOM AERO-10E0 SAS Controller"}, 2102909aab4SKashyap D Desai {0x1000, MRSAS_AERO_10E1, 0xffff, 0xffff, "BROADCOM AERO-10E1 SAS Controller"}, 2112909aab4SKashyap D Desai {0x1000, MRSAS_AERO_10E2, 0xffff, 0xffff, "BROADCOM AERO-10E2 SAS Controller"}, 2122909aab4SKashyap D Desai {0x1000, MRSAS_AERO_10E3, 0xffff, 0xffff, "BROADCOM AERO-10E3 SAS Controller"}, 2132909aab4SKashyap D Desai {0x1000, MRSAS_AERO_10E4, 0xffff, 0xffff, "BROADCOM AERO-10E4 SAS Controller"}, 2142909aab4SKashyap D Desai {0x1000, MRSAS_AERO_10E5, 0xffff, 0xffff, "BROADCOM AERO-10E5 SAS Controller"}, 2152909aab4SKashyap D Desai {0x1000, MRSAS_AERO_10E6, 0xffff, 0xffff, "BROADCOM AERO-10E6 SAS Controller"}, 2162909aab4SKashyap D Desai {0x1000, MRSAS_AERO_10E7, 0xffff, 0xffff, "BROADCOM AERO-10E7 SAS Controller"}, 217665484d8SDoug Ambrisko {0, 0, 0, 0, NULL} 218665484d8SDoug Ambrisko }; 219665484d8SDoug Ambrisko 2208e727371SKashyap D Desai /* 221665484d8SDoug Ambrisko * Character device entry points 222665484d8SDoug Ambrisko * 223665484d8SDoug Ambrisko */ 224665484d8SDoug Ambrisko static struct cdevsw mrsas_cdevsw = { 225665484d8SDoug Ambrisko .d_version = D_VERSION, 226665484d8SDoug Ambrisko .d_open = mrsas_open, 227665484d8SDoug Ambrisko .d_close = mrsas_close, 228665484d8SDoug Ambrisko .d_read = mrsas_read, 229665484d8SDoug Ambrisko .d_write = mrsas_write, 230665484d8SDoug Ambrisko .d_ioctl = mrsas_ioctl, 231da011113SKashyap D Desai .d_poll = mrsas_poll, 232665484d8SDoug Ambrisko .d_name = "mrsas", 233665484d8SDoug Ambrisko }; 234665484d8SDoug Ambrisko 235665484d8SDoug Ambrisko MALLOC_DEFINE(M_MRSAS, "mrsasbuf", "Buffers for the MRSAS driver"); 236665484d8SDoug Ambrisko 2378e727371SKashyap D Desai /* 2388e727371SKashyap D Desai * In the cdevsw routines, we find our softc by using the si_drv1 member of 2398e727371SKashyap D Desai * struct cdev. We set this variable to point to our softc in our attach 2408e727371SKashyap D Desai * routine when we create the /dev entry. 241665484d8SDoug Ambrisko */ 242665484d8SDoug Ambrisko int 2437fc5f329SJohn Baldwin mrsas_open(struct cdev *dev, int oflags, int devtype, struct thread *td) 244665484d8SDoug Ambrisko { 245665484d8SDoug Ambrisko struct mrsas_softc *sc; 246665484d8SDoug Ambrisko 247665484d8SDoug Ambrisko sc = dev->si_drv1; 248665484d8SDoug Ambrisko return (0); 249665484d8SDoug Ambrisko } 250665484d8SDoug Ambrisko 251665484d8SDoug Ambrisko int 2527fc5f329SJohn Baldwin mrsas_close(struct cdev *dev, int fflag, int devtype, struct thread *td) 253665484d8SDoug Ambrisko { 254665484d8SDoug Ambrisko struct mrsas_softc *sc; 255665484d8SDoug Ambrisko 256665484d8SDoug Ambrisko sc = dev->si_drv1; 257665484d8SDoug Ambrisko return (0); 258665484d8SDoug Ambrisko } 259665484d8SDoug Ambrisko 260665484d8SDoug Ambrisko int 261665484d8SDoug Ambrisko mrsas_read(struct cdev *dev, struct uio *uio, int ioflag) 262665484d8SDoug Ambrisko { 263665484d8SDoug Ambrisko struct mrsas_softc *sc; 264665484d8SDoug Ambrisko 265665484d8SDoug Ambrisko sc = dev->si_drv1; 266665484d8SDoug Ambrisko return (0); 267665484d8SDoug Ambrisko } 268665484d8SDoug Ambrisko int 269665484d8SDoug Ambrisko mrsas_write(struct cdev *dev, struct uio *uio, int ioflag) 270665484d8SDoug Ambrisko { 271665484d8SDoug Ambrisko struct mrsas_softc *sc; 272665484d8SDoug Ambrisko 273665484d8SDoug Ambrisko sc = dev->si_drv1; 274665484d8SDoug Ambrisko return (0); 275665484d8SDoug Ambrisko } 276665484d8SDoug Ambrisko 277e315cf4dSKashyap D Desai u_int32_t 278e315cf4dSKashyap D Desai mrsas_read_reg_with_retries(struct mrsas_softc *sc, int offset) 279e315cf4dSKashyap D Desai { 280e315cf4dSKashyap D Desai u_int32_t i = 0, ret_val; 281e315cf4dSKashyap D Desai 282e315cf4dSKashyap D Desai if (sc->is_aero) { 283e315cf4dSKashyap D Desai do { 284e315cf4dSKashyap D Desai ret_val = mrsas_read_reg(sc, offset); 285e315cf4dSKashyap D Desai i++; 286e315cf4dSKashyap D Desai } while(ret_val == 0 && i < 3); 287e315cf4dSKashyap D Desai } else 288e315cf4dSKashyap D Desai ret_val = mrsas_read_reg(sc, offset); 289e315cf4dSKashyap D Desai 290e315cf4dSKashyap D Desai return ret_val; 291e315cf4dSKashyap D Desai } 292e315cf4dSKashyap D Desai 2938e727371SKashyap D Desai /* 294665484d8SDoug Ambrisko * Register Read/Write Functions 295665484d8SDoug Ambrisko * 296665484d8SDoug Ambrisko */ 297665484d8SDoug Ambrisko void 298665484d8SDoug Ambrisko mrsas_write_reg(struct mrsas_softc *sc, int offset, 299665484d8SDoug Ambrisko u_int32_t value) 300665484d8SDoug Ambrisko { 301665484d8SDoug Ambrisko bus_space_tag_t bus_tag = sc->bus_tag; 302665484d8SDoug Ambrisko bus_space_handle_t bus_handle = sc->bus_handle; 303665484d8SDoug Ambrisko 304665484d8SDoug Ambrisko bus_space_write_4(bus_tag, bus_handle, offset, value); 305665484d8SDoug Ambrisko } 306665484d8SDoug Ambrisko 307665484d8SDoug Ambrisko u_int32_t 308665484d8SDoug Ambrisko mrsas_read_reg(struct mrsas_softc *sc, int offset) 309665484d8SDoug Ambrisko { 310665484d8SDoug Ambrisko bus_space_tag_t bus_tag = sc->bus_tag; 311665484d8SDoug Ambrisko bus_space_handle_t bus_handle = sc->bus_handle; 312665484d8SDoug Ambrisko 313665484d8SDoug Ambrisko return ((u_int32_t)bus_space_read_4(bus_tag, bus_handle, offset)); 314665484d8SDoug Ambrisko } 315665484d8SDoug Ambrisko 316665484d8SDoug Ambrisko 3178e727371SKashyap D Desai /* 318665484d8SDoug Ambrisko * Interrupt Disable/Enable/Clear Functions 319665484d8SDoug Ambrisko * 320665484d8SDoug Ambrisko */ 3218e727371SKashyap D Desai void 3228e727371SKashyap D Desai mrsas_disable_intr(struct mrsas_softc *sc) 323665484d8SDoug Ambrisko { 324665484d8SDoug Ambrisko u_int32_t mask = 0xFFFFFFFF; 325665484d8SDoug Ambrisko u_int32_t status; 326665484d8SDoug Ambrisko 3272f863eb8SKashyap D Desai sc->mask_interrupts = 1; 328665484d8SDoug Ambrisko mrsas_write_reg(sc, offsetof(mrsas_reg_set, outbound_intr_mask), mask); 329665484d8SDoug Ambrisko /* Dummy read to force pci flush */ 330665484d8SDoug Ambrisko status = mrsas_read_reg(sc, offsetof(mrsas_reg_set, outbound_intr_mask)); 331665484d8SDoug Ambrisko } 332665484d8SDoug Ambrisko 3338e727371SKashyap D Desai void 3348e727371SKashyap D Desai mrsas_enable_intr(struct mrsas_softc *sc) 335665484d8SDoug Ambrisko { 336665484d8SDoug Ambrisko u_int32_t mask = MFI_FUSION_ENABLE_INTERRUPT_MASK; 337665484d8SDoug Ambrisko u_int32_t status; 338665484d8SDoug Ambrisko 3392f863eb8SKashyap D Desai sc->mask_interrupts = 0; 340665484d8SDoug Ambrisko mrsas_write_reg(sc, offsetof(mrsas_reg_set, outbound_intr_status), ~0); 341665484d8SDoug Ambrisko status = mrsas_read_reg(sc, offsetof(mrsas_reg_set, outbound_intr_status)); 342665484d8SDoug Ambrisko 343665484d8SDoug Ambrisko mrsas_write_reg(sc, offsetof(mrsas_reg_set, outbound_intr_mask), ~mask); 344665484d8SDoug Ambrisko status = mrsas_read_reg(sc, offsetof(mrsas_reg_set, outbound_intr_mask)); 345665484d8SDoug Ambrisko } 346665484d8SDoug Ambrisko 3478e727371SKashyap D Desai static int 3488e727371SKashyap D Desai mrsas_clear_intr(struct mrsas_softc *sc) 349665484d8SDoug Ambrisko { 3508bb601acSKashyap D Desai u_int32_t status; 351665484d8SDoug Ambrisko 352665484d8SDoug Ambrisko /* Read received interrupt */ 353e315cf4dSKashyap D Desai status = mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, outbound_intr_status)); 354665484d8SDoug Ambrisko 355665484d8SDoug Ambrisko /* Not our interrupt, so just return */ 356665484d8SDoug Ambrisko if (!(status & MFI_FUSION_ENABLE_INTERRUPT_MASK)) 357665484d8SDoug Ambrisko return (0); 358665484d8SDoug Ambrisko 359665484d8SDoug Ambrisko /* We got a reply interrupt */ 360665484d8SDoug Ambrisko return (1); 361665484d8SDoug Ambrisko } 362665484d8SDoug Ambrisko 3638e727371SKashyap D Desai /* 364665484d8SDoug Ambrisko * PCI Support Functions 365665484d8SDoug Ambrisko * 366665484d8SDoug Ambrisko */ 3678e727371SKashyap D Desai static struct mrsas_ident * 3688e727371SKashyap D Desai mrsas_find_ident(device_t dev) 369665484d8SDoug Ambrisko { 370665484d8SDoug Ambrisko struct mrsas_ident *pci_device; 371665484d8SDoug Ambrisko 3728e727371SKashyap D Desai for (pci_device = device_table; pci_device->vendor != 0; pci_device++) { 373665484d8SDoug Ambrisko if ((pci_device->vendor == pci_get_vendor(dev)) && 374665484d8SDoug Ambrisko (pci_device->device == pci_get_device(dev)) && 375665484d8SDoug Ambrisko ((pci_device->subvendor == pci_get_subvendor(dev)) || 376665484d8SDoug Ambrisko (pci_device->subvendor == 0xffff)) && 377665484d8SDoug Ambrisko ((pci_device->subdevice == pci_get_subdevice(dev)) || 378665484d8SDoug Ambrisko (pci_device->subdevice == 0xffff))) 379665484d8SDoug Ambrisko return (pci_device); 380665484d8SDoug Ambrisko } 381665484d8SDoug Ambrisko return (NULL); 382665484d8SDoug Ambrisko } 383665484d8SDoug Ambrisko 3848e727371SKashyap D Desai static int 3858e727371SKashyap D Desai mrsas_probe(device_t dev) 386665484d8SDoug Ambrisko { 387665484d8SDoug Ambrisko static u_int8_t first_ctrl = 1; 388665484d8SDoug Ambrisko struct mrsas_ident *id; 389665484d8SDoug Ambrisko 390665484d8SDoug Ambrisko if ((id = mrsas_find_ident(dev)) != NULL) { 391665484d8SDoug Ambrisko if (first_ctrl) { 392ecea5be4SKashyap D Desai printf("AVAGO MegaRAID SAS FreeBSD mrsas driver version: %s\n", 3938e727371SKashyap D Desai MRSAS_VERSION); 394665484d8SDoug Ambrisko first_ctrl = 0; 395665484d8SDoug Ambrisko } 396665484d8SDoug Ambrisko device_set_desc(dev, id->desc); 397665484d8SDoug Ambrisko /* between BUS_PROBE_DEFAULT and BUS_PROBE_LOW_PRIORITY */ 398665484d8SDoug Ambrisko return (-30); 399665484d8SDoug Ambrisko } 400665484d8SDoug Ambrisko return (ENXIO); 401665484d8SDoug Ambrisko } 402665484d8SDoug Ambrisko 4038e727371SKashyap D Desai /* 404665484d8SDoug Ambrisko * mrsas_setup_sysctl: setup sysctl values for mrsas 405665484d8SDoug Ambrisko * input: Adapter instance soft state 406665484d8SDoug Ambrisko * 407665484d8SDoug Ambrisko * Setup sysctl entries for mrsas driver. 408665484d8SDoug Ambrisko */ 409665484d8SDoug Ambrisko static void 410665484d8SDoug Ambrisko mrsas_setup_sysctl(struct mrsas_softc *sc) 411665484d8SDoug Ambrisko { 412665484d8SDoug Ambrisko struct sysctl_ctx_list *sysctl_ctx = NULL; 413665484d8SDoug Ambrisko struct sysctl_oid *sysctl_tree = NULL; 414665484d8SDoug Ambrisko char tmpstr[80], tmpstr2[80]; 415665484d8SDoug Ambrisko 416665484d8SDoug Ambrisko /* 417665484d8SDoug Ambrisko * Setup the sysctl variable so the user can change the debug level 418665484d8SDoug Ambrisko * on the fly. 419665484d8SDoug Ambrisko */ 420665484d8SDoug Ambrisko snprintf(tmpstr, sizeof(tmpstr), "MRSAS controller %d", 421665484d8SDoug Ambrisko device_get_unit(sc->mrsas_dev)); 422665484d8SDoug Ambrisko snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mrsas_dev)); 423665484d8SDoug Ambrisko 424665484d8SDoug Ambrisko sysctl_ctx = device_get_sysctl_ctx(sc->mrsas_dev); 425665484d8SDoug Ambrisko if (sysctl_ctx != NULL) 426665484d8SDoug Ambrisko sysctl_tree = device_get_sysctl_tree(sc->mrsas_dev); 427665484d8SDoug Ambrisko 428665484d8SDoug Ambrisko if (sysctl_tree == NULL) { 429665484d8SDoug Ambrisko sysctl_ctx_init(&sc->sysctl_ctx); 430665484d8SDoug Ambrisko sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx, 431665484d8SDoug Ambrisko SYSCTL_STATIC_CHILDREN(_hw_mrsas), OID_AUTO, tmpstr2, 432665484d8SDoug Ambrisko CTLFLAG_RD, 0, tmpstr); 433665484d8SDoug Ambrisko if (sc->sysctl_tree == NULL) 434665484d8SDoug Ambrisko return; 435665484d8SDoug Ambrisko sysctl_ctx = &sc->sysctl_ctx; 436665484d8SDoug Ambrisko sysctl_tree = sc->sysctl_tree; 437665484d8SDoug Ambrisko } 438665484d8SDoug Ambrisko SYSCTL_ADD_UINT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 439665484d8SDoug Ambrisko OID_AUTO, "disable_ocr", CTLFLAG_RW, &sc->disableOnlineCtrlReset, 0, 440665484d8SDoug Ambrisko "Disable the use of OCR"); 441665484d8SDoug Ambrisko 442665484d8SDoug Ambrisko SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 443665484d8SDoug Ambrisko OID_AUTO, "driver_version", CTLFLAG_RD, MRSAS_VERSION, 444665484d8SDoug Ambrisko strlen(MRSAS_VERSION), "driver version"); 445665484d8SDoug Ambrisko 446665484d8SDoug Ambrisko SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 447665484d8SDoug Ambrisko OID_AUTO, "reset_count", CTLFLAG_RD, 448665484d8SDoug Ambrisko &sc->reset_count, 0, "number of ocr from start of the day"); 449665484d8SDoug Ambrisko 450665484d8SDoug Ambrisko SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 451665484d8SDoug Ambrisko OID_AUTO, "fw_outstanding", CTLFLAG_RD, 452f0188618SHans Petter Selasky &sc->fw_outstanding.val_rdonly, 0, "FW outstanding commands"); 453665484d8SDoug Ambrisko 454665484d8SDoug Ambrisko SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 455665484d8SDoug Ambrisko OID_AUTO, "io_cmds_highwater", CTLFLAG_RD, 456665484d8SDoug Ambrisko &sc->io_cmds_highwater, 0, "Max FW outstanding commands"); 457665484d8SDoug Ambrisko 458665484d8SDoug Ambrisko SYSCTL_ADD_UINT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 459665484d8SDoug Ambrisko OID_AUTO, "mrsas_debug", CTLFLAG_RW, &sc->mrsas_debug, 0, 460665484d8SDoug Ambrisko "Driver debug level"); 461665484d8SDoug Ambrisko 462665484d8SDoug Ambrisko SYSCTL_ADD_UINT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 463665484d8SDoug Ambrisko OID_AUTO, "mrsas_io_timeout", CTLFLAG_RW, &sc->mrsas_io_timeout, 464665484d8SDoug Ambrisko 0, "Driver IO timeout value in mili-second."); 465665484d8SDoug Ambrisko 466665484d8SDoug Ambrisko SYSCTL_ADD_UINT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 467665484d8SDoug Ambrisko OID_AUTO, "mrsas_fw_fault_check_delay", CTLFLAG_RW, 468665484d8SDoug Ambrisko &sc->mrsas_fw_fault_check_delay, 469665484d8SDoug Ambrisko 0, "FW fault check thread delay in seconds. <default is 1 sec>"); 470665484d8SDoug Ambrisko 471665484d8SDoug Ambrisko SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 472665484d8SDoug Ambrisko OID_AUTO, "reset_in_progress", CTLFLAG_RD, 473665484d8SDoug Ambrisko &sc->reset_in_progress, 0, "ocr in progress status"); 474665484d8SDoug Ambrisko 475d993dd83SKashyap D Desai SYSCTL_ADD_UINT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 476d993dd83SKashyap D Desai OID_AUTO, "block_sync_cache", CTLFLAG_RW, 477d993dd83SKashyap D Desai &sc->block_sync_cache, 0, 478d993dd83SKashyap D Desai "Block SYNC CACHE at driver. <default: 0, send it to FW>"); 479821df4b9SKashyap D Desai SYSCTL_ADD_UINT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 480821df4b9SKashyap D Desai OID_AUTO, "stream detection", CTLFLAG_RW, 481821df4b9SKashyap D Desai &sc->drv_stream_detection, 0, 482821df4b9SKashyap D Desai "Disable/Enable Stream detection. <default: 1, Enable Stream Detection>"); 4833d273176SKashyap D Desai SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 4843d273176SKashyap D Desai OID_AUTO, "prp_count", CTLFLAG_RD, 4853d273176SKashyap D Desai &sc->prp_count.val_rdonly, 0, "Number of IOs for which PRPs are built"); 4863d273176SKashyap D Desai SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 4873d273176SKashyap D Desai OID_AUTO, "SGE holes", CTLFLAG_RD, 4883d273176SKashyap D Desai &sc->sge_holes.val_rdonly, 0, "Number of IOs with holes in SGEs"); 489665484d8SDoug Ambrisko } 490665484d8SDoug Ambrisko 4918e727371SKashyap D Desai /* 492665484d8SDoug Ambrisko * mrsas_get_tunables: get tunable parameters. 493665484d8SDoug Ambrisko * input: Adapter instance soft state 494665484d8SDoug Ambrisko * 495665484d8SDoug Ambrisko * Get tunable parameters. This will help to debug driver at boot time. 496665484d8SDoug Ambrisko */ 497665484d8SDoug Ambrisko static void 498665484d8SDoug Ambrisko mrsas_get_tunables(struct mrsas_softc *sc) 499665484d8SDoug Ambrisko { 500665484d8SDoug Ambrisko char tmpstr[80]; 501665484d8SDoug Ambrisko 502665484d8SDoug Ambrisko /* XXX default to some debugging for now */ 50356d91e49SKashyap D Desai sc->mrsas_debug = 50456d91e49SKashyap D Desai (MRSAS_FAULT | MRSAS_OCR | MRSAS_INFO | MRSAS_TRACE | MRSAS_AEN); 505665484d8SDoug Ambrisko sc->mrsas_io_timeout = MRSAS_IO_TIMEOUT; 506665484d8SDoug Ambrisko sc->mrsas_fw_fault_check_delay = 1; 507665484d8SDoug Ambrisko sc->reset_count = 0; 508665484d8SDoug Ambrisko sc->reset_in_progress = 0; 509d993dd83SKashyap D Desai sc->block_sync_cache = 0; 510821df4b9SKashyap D Desai sc->drv_stream_detection = 1; 511665484d8SDoug Ambrisko 512665484d8SDoug Ambrisko /* 513665484d8SDoug Ambrisko * Grab the global variables. 514665484d8SDoug Ambrisko */ 515665484d8SDoug Ambrisko TUNABLE_INT_FETCH("hw.mrsas.debug_level", &sc->mrsas_debug); 516665484d8SDoug Ambrisko 51716dc2814SKashyap D Desai /* 51816dc2814SKashyap D Desai * Grab the global variables. 51916dc2814SKashyap D Desai */ 52016dc2814SKashyap D Desai TUNABLE_INT_FETCH("hw.mrsas.lb_pending_cmds", &sc->lb_pending_cmds); 52116dc2814SKashyap D Desai 522665484d8SDoug Ambrisko /* Grab the unit-instance variables */ 523665484d8SDoug Ambrisko snprintf(tmpstr, sizeof(tmpstr), "dev.mrsas.%d.debug_level", 524665484d8SDoug Ambrisko device_get_unit(sc->mrsas_dev)); 525665484d8SDoug Ambrisko TUNABLE_INT_FETCH(tmpstr, &sc->mrsas_debug); 526665484d8SDoug Ambrisko } 527665484d8SDoug Ambrisko 5288e727371SKashyap D Desai /* 529665484d8SDoug Ambrisko * mrsas_alloc_evt_log_info cmd: Allocates memory to get event log information. 530665484d8SDoug Ambrisko * Used to get sequence number at driver load time. 531665484d8SDoug Ambrisko * input: Adapter soft state 532665484d8SDoug Ambrisko * 533665484d8SDoug Ambrisko * Allocates DMAable memory for the event log info internal command. 534665484d8SDoug Ambrisko */ 5358e727371SKashyap D Desai int 5368e727371SKashyap D Desai mrsas_alloc_evt_log_info_cmd(struct mrsas_softc *sc) 537665484d8SDoug Ambrisko { 538665484d8SDoug Ambrisko int el_info_size; 539665484d8SDoug Ambrisko 540665484d8SDoug Ambrisko /* Allocate get event log info command */ 541665484d8SDoug Ambrisko el_info_size = sizeof(struct mrsas_evt_log_info); 5428e727371SKashyap D Desai if (bus_dma_tag_create(sc->mrsas_parent_tag, 5438e727371SKashyap D Desai 1, 0, 5448e727371SKashyap D Desai BUS_SPACE_MAXADDR_32BIT, 5458e727371SKashyap D Desai BUS_SPACE_MAXADDR, 5468e727371SKashyap D Desai NULL, NULL, 5478e727371SKashyap D Desai el_info_size, 5488e727371SKashyap D Desai 1, 5498e727371SKashyap D Desai el_info_size, 5508e727371SKashyap D Desai BUS_DMA_ALLOCNOW, 5518e727371SKashyap D Desai NULL, NULL, 552665484d8SDoug Ambrisko &sc->el_info_tag)) { 553665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot allocate event log info tag\n"); 554665484d8SDoug Ambrisko return (ENOMEM); 555665484d8SDoug Ambrisko } 556665484d8SDoug Ambrisko if (bus_dmamem_alloc(sc->el_info_tag, (void **)&sc->el_info_mem, 557665484d8SDoug Ambrisko BUS_DMA_NOWAIT, &sc->el_info_dmamap)) { 558665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot allocate event log info cmd mem\n"); 559665484d8SDoug Ambrisko return (ENOMEM); 560665484d8SDoug Ambrisko } 561665484d8SDoug Ambrisko if (bus_dmamap_load(sc->el_info_tag, sc->el_info_dmamap, 562665484d8SDoug Ambrisko sc->el_info_mem, el_info_size, mrsas_addr_cb, 563665484d8SDoug Ambrisko &sc->el_info_phys_addr, BUS_DMA_NOWAIT)) { 564665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot load event log info cmd mem\n"); 565665484d8SDoug Ambrisko return (ENOMEM); 566665484d8SDoug Ambrisko } 567665484d8SDoug Ambrisko memset(sc->el_info_mem, 0, el_info_size); 568665484d8SDoug Ambrisko return (0); 569665484d8SDoug Ambrisko } 570665484d8SDoug Ambrisko 5718e727371SKashyap D Desai /* 572665484d8SDoug Ambrisko * mrsas_free_evt_info_cmd: Free memory for Event log info command 573665484d8SDoug Ambrisko * input: Adapter soft state 574665484d8SDoug Ambrisko * 575665484d8SDoug Ambrisko * Deallocates memory for the event log info internal command. 576665484d8SDoug Ambrisko */ 5778e727371SKashyap D Desai void 5788e727371SKashyap D Desai mrsas_free_evt_log_info_cmd(struct mrsas_softc *sc) 579665484d8SDoug Ambrisko { 580665484d8SDoug Ambrisko if (sc->el_info_phys_addr) 581665484d8SDoug Ambrisko bus_dmamap_unload(sc->el_info_tag, sc->el_info_dmamap); 582665484d8SDoug Ambrisko if (sc->el_info_mem != NULL) 583665484d8SDoug Ambrisko bus_dmamem_free(sc->el_info_tag, sc->el_info_mem, sc->el_info_dmamap); 584665484d8SDoug Ambrisko if (sc->el_info_tag != NULL) 585665484d8SDoug Ambrisko bus_dma_tag_destroy(sc->el_info_tag); 586665484d8SDoug Ambrisko } 587665484d8SDoug Ambrisko 5888e727371SKashyap D Desai /* 589665484d8SDoug Ambrisko * mrsas_get_seq_num: Get latest event sequence number 590665484d8SDoug Ambrisko * @sc: Adapter soft state 591665484d8SDoug Ambrisko * @eli: Firmware event log sequence number information. 5928e727371SKashyap D Desai * 593665484d8SDoug Ambrisko * Firmware maintains a log of all events in a non-volatile area. 594665484d8SDoug Ambrisko * Driver get the sequence number using DCMD 595665484d8SDoug Ambrisko * "MR_DCMD_CTRL_EVENT_GET_INFO" at driver load time. 596665484d8SDoug Ambrisko */ 597665484d8SDoug Ambrisko 598665484d8SDoug Ambrisko static int 599665484d8SDoug Ambrisko mrsas_get_seq_num(struct mrsas_softc *sc, 600665484d8SDoug Ambrisko struct mrsas_evt_log_info *eli) 601665484d8SDoug Ambrisko { 602665484d8SDoug Ambrisko struct mrsas_mfi_cmd *cmd; 603665484d8SDoug Ambrisko struct mrsas_dcmd_frame *dcmd; 604f0c7594bSKashyap D Desai u_int8_t do_ocr = 1, retcode = 0; 605665484d8SDoug Ambrisko 606665484d8SDoug Ambrisko cmd = mrsas_get_mfi_cmd(sc); 607665484d8SDoug Ambrisko 608665484d8SDoug Ambrisko if (!cmd) { 609665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Failed to get a free cmd\n"); 610665484d8SDoug Ambrisko return -ENOMEM; 611665484d8SDoug Ambrisko } 612665484d8SDoug Ambrisko dcmd = &cmd->frame->dcmd; 613665484d8SDoug Ambrisko 614665484d8SDoug Ambrisko if (mrsas_alloc_evt_log_info_cmd(sc) != SUCCESS) { 615665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot allocate evt log info cmd\n"); 616665484d8SDoug Ambrisko mrsas_release_mfi_cmd(cmd); 617665484d8SDoug Ambrisko return -ENOMEM; 618665484d8SDoug Ambrisko } 619665484d8SDoug Ambrisko memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); 620665484d8SDoug Ambrisko 621665484d8SDoug Ambrisko dcmd->cmd = MFI_CMD_DCMD; 622665484d8SDoug Ambrisko dcmd->cmd_status = 0x0; 623665484d8SDoug Ambrisko dcmd->sge_count = 1; 624665484d8SDoug Ambrisko dcmd->flags = MFI_FRAME_DIR_READ; 625665484d8SDoug Ambrisko dcmd->timeout = 0; 626665484d8SDoug Ambrisko dcmd->pad_0 = 0; 627665484d8SDoug Ambrisko dcmd->data_xfer_len = sizeof(struct mrsas_evt_log_info); 628665484d8SDoug Ambrisko dcmd->opcode = MR_DCMD_CTRL_EVENT_GET_INFO; 629665484d8SDoug Ambrisko dcmd->sgl.sge32[0].phys_addr = sc->el_info_phys_addr; 630665484d8SDoug Ambrisko dcmd->sgl.sge32[0].length = sizeof(struct mrsas_evt_log_info); 631665484d8SDoug Ambrisko 632f0c7594bSKashyap D Desai retcode = mrsas_issue_blocked_cmd(sc, cmd); 633f0c7594bSKashyap D Desai if (retcode == ETIMEDOUT) 634f0c7594bSKashyap D Desai goto dcmd_timeout; 635665484d8SDoug Ambrisko 636f0c7594bSKashyap D Desai do_ocr = 0; 637665484d8SDoug Ambrisko /* 638665484d8SDoug Ambrisko * Copy the data back into callers buffer 639665484d8SDoug Ambrisko */ 640665484d8SDoug Ambrisko memcpy(eli, sc->el_info_mem, sizeof(struct mrsas_evt_log_info)); 641665484d8SDoug Ambrisko mrsas_free_evt_log_info_cmd(sc); 642f0c7594bSKashyap D Desai 643f0c7594bSKashyap D Desai dcmd_timeout: 644f0c7594bSKashyap D Desai if (do_ocr) 645f0c7594bSKashyap D Desai sc->do_timedout_reset = MFI_DCMD_TIMEOUT_OCR; 646f0c7594bSKashyap D Desai else 647665484d8SDoug Ambrisko mrsas_release_mfi_cmd(cmd); 648665484d8SDoug Ambrisko 649f0c7594bSKashyap D Desai return retcode; 650665484d8SDoug Ambrisko } 651665484d8SDoug Ambrisko 652665484d8SDoug Ambrisko 6538e727371SKashyap D Desai /* 654665484d8SDoug Ambrisko * mrsas_register_aen: Register for asynchronous event notification 655665484d8SDoug Ambrisko * @sc: Adapter soft state 656665484d8SDoug Ambrisko * @seq_num: Starting sequence number 657665484d8SDoug Ambrisko * @class_locale: Class of the event 6588e727371SKashyap D Desai * 659665484d8SDoug Ambrisko * This function subscribes for events beyond the @seq_num 660665484d8SDoug Ambrisko * and type @class_locale. 661665484d8SDoug Ambrisko * 6628e727371SKashyap D Desai */ 663665484d8SDoug Ambrisko static int 664665484d8SDoug Ambrisko mrsas_register_aen(struct mrsas_softc *sc, u_int32_t seq_num, 665665484d8SDoug Ambrisko u_int32_t class_locale_word) 666665484d8SDoug Ambrisko { 667665484d8SDoug Ambrisko int ret_val; 668665484d8SDoug Ambrisko struct mrsas_mfi_cmd *cmd; 669665484d8SDoug Ambrisko struct mrsas_dcmd_frame *dcmd; 670665484d8SDoug Ambrisko union mrsas_evt_class_locale curr_aen; 671665484d8SDoug Ambrisko union mrsas_evt_class_locale prev_aen; 672665484d8SDoug Ambrisko 673665484d8SDoug Ambrisko /* 674665484d8SDoug Ambrisko * If there an AEN pending already (aen_cmd), check if the 6758e727371SKashyap D Desai * class_locale of that pending AEN is inclusive of the new AEN 6768e727371SKashyap D Desai * request we currently have. If it is, then we don't have to do 6778e727371SKashyap D Desai * anything. In other words, whichever events the current AEN request 6788e727371SKashyap D Desai * is subscribing to, have already been subscribed to. If the old_cmd 6798e727371SKashyap D Desai * is _not_ inclusive, then we have to abort that command, form a 6808e727371SKashyap D Desai * class_locale that is superset of both old and current and re-issue 6818e727371SKashyap D Desai * to the FW 6828e727371SKashyap D Desai */ 683665484d8SDoug Ambrisko 684665484d8SDoug Ambrisko curr_aen.word = class_locale_word; 685665484d8SDoug Ambrisko 686665484d8SDoug Ambrisko if (sc->aen_cmd) { 687665484d8SDoug Ambrisko 688665484d8SDoug Ambrisko prev_aen.word = sc->aen_cmd->frame->dcmd.mbox.w[1]; 689665484d8SDoug Ambrisko 690665484d8SDoug Ambrisko /* 691665484d8SDoug Ambrisko * A class whose enum value is smaller is inclusive of all 692665484d8SDoug Ambrisko * higher values. If a PROGRESS (= -1) was previously 693665484d8SDoug Ambrisko * registered, then a new registration requests for higher 694665484d8SDoug Ambrisko * classes need not be sent to FW. They are automatically 6958e727371SKashyap D Desai * included. Locale numbers don't have such hierarchy. They 6968e727371SKashyap D Desai * are bitmap values 697665484d8SDoug Ambrisko */ 698665484d8SDoug Ambrisko if ((prev_aen.members.class <= curr_aen.members.class) && 699665484d8SDoug Ambrisko !((prev_aen.members.locale & curr_aen.members.locale) ^ 700665484d8SDoug Ambrisko curr_aen.members.locale)) { 701665484d8SDoug Ambrisko /* 702665484d8SDoug Ambrisko * Previously issued event registration includes 703665484d8SDoug Ambrisko * current request. Nothing to do. 704665484d8SDoug Ambrisko */ 705665484d8SDoug Ambrisko return 0; 706665484d8SDoug Ambrisko } else { 707665484d8SDoug Ambrisko curr_aen.members.locale |= prev_aen.members.locale; 708665484d8SDoug Ambrisko 709665484d8SDoug Ambrisko if (prev_aen.members.class < curr_aen.members.class) 710665484d8SDoug Ambrisko curr_aen.members.class = prev_aen.members.class; 711665484d8SDoug Ambrisko 712665484d8SDoug Ambrisko sc->aen_cmd->abort_aen = 1; 713665484d8SDoug Ambrisko ret_val = mrsas_issue_blocked_abort_cmd(sc, 714665484d8SDoug Ambrisko sc->aen_cmd); 715665484d8SDoug Ambrisko 716665484d8SDoug Ambrisko if (ret_val) { 717731b7561SKashyap D Desai printf("mrsas: Failed to abort previous AEN command\n"); 718665484d8SDoug Ambrisko return ret_val; 719c2a20ff9SKashyap D Desai } else 720c2a20ff9SKashyap D Desai sc->aen_cmd = NULL; 721665484d8SDoug Ambrisko } 722665484d8SDoug Ambrisko } 723665484d8SDoug Ambrisko cmd = mrsas_get_mfi_cmd(sc); 724665484d8SDoug Ambrisko if (!cmd) 725731b7561SKashyap D Desai return ENOMEM; 726665484d8SDoug Ambrisko 727665484d8SDoug Ambrisko dcmd = &cmd->frame->dcmd; 728665484d8SDoug Ambrisko 729665484d8SDoug Ambrisko memset(sc->evt_detail_mem, 0, sizeof(struct mrsas_evt_detail)); 730665484d8SDoug Ambrisko 731665484d8SDoug Ambrisko /* 732665484d8SDoug Ambrisko * Prepare DCMD for aen registration 733665484d8SDoug Ambrisko */ 734665484d8SDoug Ambrisko memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); 735665484d8SDoug Ambrisko 736665484d8SDoug Ambrisko dcmd->cmd = MFI_CMD_DCMD; 737665484d8SDoug Ambrisko dcmd->cmd_status = 0x0; 738665484d8SDoug Ambrisko dcmd->sge_count = 1; 739665484d8SDoug Ambrisko dcmd->flags = MFI_FRAME_DIR_READ; 740665484d8SDoug Ambrisko dcmd->timeout = 0; 741665484d8SDoug Ambrisko dcmd->pad_0 = 0; 742665484d8SDoug Ambrisko dcmd->data_xfer_len = sizeof(struct mrsas_evt_detail); 743665484d8SDoug Ambrisko dcmd->opcode = MR_DCMD_CTRL_EVENT_WAIT; 744665484d8SDoug Ambrisko dcmd->mbox.w[0] = seq_num; 745665484d8SDoug Ambrisko sc->last_seq_num = seq_num; 746665484d8SDoug Ambrisko dcmd->mbox.w[1] = curr_aen.word; 747665484d8SDoug Ambrisko dcmd->sgl.sge32[0].phys_addr = (u_int32_t)sc->evt_detail_phys_addr; 748665484d8SDoug Ambrisko dcmd->sgl.sge32[0].length = sizeof(struct mrsas_evt_detail); 749665484d8SDoug Ambrisko 750665484d8SDoug Ambrisko if (sc->aen_cmd != NULL) { 751665484d8SDoug Ambrisko mrsas_release_mfi_cmd(cmd); 752665484d8SDoug Ambrisko return 0; 753665484d8SDoug Ambrisko } 754665484d8SDoug Ambrisko /* 755665484d8SDoug Ambrisko * Store reference to the cmd used to register for AEN. When an 756665484d8SDoug Ambrisko * application wants us to register for AEN, we have to abort this 757665484d8SDoug Ambrisko * cmd and re-register with a new EVENT LOCALE supplied by that app 758665484d8SDoug Ambrisko */ 759665484d8SDoug Ambrisko sc->aen_cmd = cmd; 760665484d8SDoug Ambrisko 761665484d8SDoug Ambrisko /* 7628e727371SKashyap D Desai * Issue the aen registration frame 763665484d8SDoug Ambrisko */ 764665484d8SDoug Ambrisko if (mrsas_issue_dcmd(sc, cmd)) { 765665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot issue AEN DCMD command.\n"); 766665484d8SDoug Ambrisko return (1); 767665484d8SDoug Ambrisko } 768665484d8SDoug Ambrisko return 0; 769665484d8SDoug Ambrisko } 7708e727371SKashyap D Desai 7718e727371SKashyap D Desai /* 7728e727371SKashyap D Desai * mrsas_start_aen: Subscribes to AEN during driver load time 773665484d8SDoug Ambrisko * @instance: Adapter soft state 774665484d8SDoug Ambrisko */ 7758e727371SKashyap D Desai static int 7768e727371SKashyap D Desai mrsas_start_aen(struct mrsas_softc *sc) 777665484d8SDoug Ambrisko { 778665484d8SDoug Ambrisko struct mrsas_evt_log_info eli; 779665484d8SDoug Ambrisko union mrsas_evt_class_locale class_locale; 780665484d8SDoug Ambrisko 781665484d8SDoug Ambrisko 782665484d8SDoug Ambrisko /* Get the latest sequence number from FW */ 783665484d8SDoug Ambrisko 784665484d8SDoug Ambrisko memset(&eli, 0, sizeof(eli)); 785665484d8SDoug Ambrisko 786665484d8SDoug Ambrisko if (mrsas_get_seq_num(sc, &eli)) 787665484d8SDoug Ambrisko return -1; 788665484d8SDoug Ambrisko 789665484d8SDoug Ambrisko /* Register AEN with FW for latest sequence number plus 1 */ 790665484d8SDoug Ambrisko class_locale.members.reserved = 0; 791665484d8SDoug Ambrisko class_locale.members.locale = MR_EVT_LOCALE_ALL; 792665484d8SDoug Ambrisko class_locale.members.class = MR_EVT_CLASS_DEBUG; 793665484d8SDoug Ambrisko 794665484d8SDoug Ambrisko return mrsas_register_aen(sc, eli.newest_seq_num + 1, 795665484d8SDoug Ambrisko class_locale.word); 796d18d1b47SKashyap D Desai 797665484d8SDoug Ambrisko } 798665484d8SDoug Ambrisko 7998e727371SKashyap D Desai /* 800d18d1b47SKashyap D Desai * mrsas_setup_msix: Allocate MSI-x vectors 8018e727371SKashyap D Desai * @sc: adapter soft state 802d18d1b47SKashyap D Desai */ 8038e727371SKashyap D Desai static int 8048e727371SKashyap D Desai mrsas_setup_msix(struct mrsas_softc *sc) 805d18d1b47SKashyap D Desai { 806d18d1b47SKashyap D Desai int i; 8078e727371SKashyap D Desai 808d18d1b47SKashyap D Desai for (i = 0; i < sc->msix_vectors; i++) { 809d18d1b47SKashyap D Desai sc->irq_context[i].sc = sc; 810d18d1b47SKashyap D Desai sc->irq_context[i].MSIxIndex = i; 811d18d1b47SKashyap D Desai sc->irq_id[i] = i + 1; 812d18d1b47SKashyap D Desai sc->mrsas_irq[i] = bus_alloc_resource_any 813d18d1b47SKashyap D Desai (sc->mrsas_dev, SYS_RES_IRQ, &sc->irq_id[i] 814d18d1b47SKashyap D Desai ,RF_ACTIVE); 815d18d1b47SKashyap D Desai if (sc->mrsas_irq[i] == NULL) { 816d18d1b47SKashyap D Desai device_printf(sc->mrsas_dev, "Can't allocate MSI-x\n"); 817d18d1b47SKashyap D Desai goto irq_alloc_failed; 818d18d1b47SKashyap D Desai } 819d18d1b47SKashyap D Desai if (bus_setup_intr(sc->mrsas_dev, 820d18d1b47SKashyap D Desai sc->mrsas_irq[i], 821d18d1b47SKashyap D Desai INTR_MPSAFE | INTR_TYPE_CAM, 822d18d1b47SKashyap D Desai NULL, mrsas_isr, &sc->irq_context[i], 823d18d1b47SKashyap D Desai &sc->intr_handle[i])) { 824d18d1b47SKashyap D Desai device_printf(sc->mrsas_dev, 825d18d1b47SKashyap D Desai "Cannot set up MSI-x interrupt handler\n"); 826d18d1b47SKashyap D Desai goto irq_alloc_failed; 827d18d1b47SKashyap D Desai } 828d18d1b47SKashyap D Desai } 829d18d1b47SKashyap D Desai return SUCCESS; 830d18d1b47SKashyap D Desai 831d18d1b47SKashyap D Desai irq_alloc_failed: 832d18d1b47SKashyap D Desai mrsas_teardown_intr(sc); 833d18d1b47SKashyap D Desai return (FAIL); 834d18d1b47SKashyap D Desai } 835d18d1b47SKashyap D Desai 8368e727371SKashyap D Desai /* 837d18d1b47SKashyap D Desai * mrsas_allocate_msix: Setup MSI-x vectors 8388e727371SKashyap D Desai * @sc: adapter soft state 839d18d1b47SKashyap D Desai */ 8408e727371SKashyap D Desai static int 8418e727371SKashyap D Desai mrsas_allocate_msix(struct mrsas_softc *sc) 842d18d1b47SKashyap D Desai { 843d18d1b47SKashyap D Desai if (pci_alloc_msix(sc->mrsas_dev, &sc->msix_vectors) == 0) { 844d18d1b47SKashyap D Desai device_printf(sc->mrsas_dev, "Using MSI-X with %d number" 845d18d1b47SKashyap D Desai " of vectors\n", sc->msix_vectors); 846d18d1b47SKashyap D Desai } else { 847d18d1b47SKashyap D Desai device_printf(sc->mrsas_dev, "MSI-x setup failed\n"); 848d18d1b47SKashyap D Desai goto irq_alloc_failed; 849d18d1b47SKashyap D Desai } 850d18d1b47SKashyap D Desai return SUCCESS; 851d18d1b47SKashyap D Desai 852d18d1b47SKashyap D Desai irq_alloc_failed: 853d18d1b47SKashyap D Desai mrsas_teardown_intr(sc); 854d18d1b47SKashyap D Desai return (FAIL); 855d18d1b47SKashyap D Desai } 8568e727371SKashyap D Desai 8578e727371SKashyap D Desai /* 858665484d8SDoug Ambrisko * mrsas_attach: PCI entry point 8598e727371SKashyap D Desai * input: pointer to device struct 860665484d8SDoug Ambrisko * 8618e727371SKashyap D Desai * Performs setup of PCI and registers, initializes mutexes and linked lists, 8628e727371SKashyap D Desai * registers interrupts and CAM, and initializes the adapter/controller to 8638e727371SKashyap D Desai * its proper state. 864665484d8SDoug Ambrisko */ 8658e727371SKashyap D Desai static int 8668e727371SKashyap D Desai mrsas_attach(device_t dev) 867665484d8SDoug Ambrisko { 868665484d8SDoug Ambrisko struct mrsas_softc *sc = device_get_softc(dev); 8697aade8bfSKashyap D Desai uint32_t cmd, error; 870665484d8SDoug Ambrisko 8714bb0a4f0SKashyap D Desai memset(sc, 0, sizeof(struct mrsas_softc)); 8724bb0a4f0SKashyap D Desai 873665484d8SDoug Ambrisko /* Look up our softc and initialize its fields. */ 874665484d8SDoug Ambrisko sc->mrsas_dev = dev; 875665484d8SDoug Ambrisko sc->device_id = pci_get_device(dev); 876665484d8SDoug Ambrisko 8772909aab4SKashyap D Desai switch (sc->device_id) { 8782909aab4SKashyap D Desai case MRSAS_INVADER: 8792909aab4SKashyap D Desai case MRSAS_FURY: 8802909aab4SKashyap D Desai case MRSAS_INTRUDER: 8812909aab4SKashyap D Desai case MRSAS_INTRUDER_24: 8822909aab4SKashyap D Desai case MRSAS_CUTLASS_52: 8832909aab4SKashyap D Desai case MRSAS_CUTLASS_53: 884f9c63081SKashyap D Desai sc->mrsas_gen3_ctrl = 1; 8852909aab4SKashyap D Desai break; 8862909aab4SKashyap D Desai case MRSAS_VENTURA: 8872909aab4SKashyap D Desai case MRSAS_CRUSADER: 8882909aab4SKashyap D Desai case MRSAS_HARPOON: 8892909aab4SKashyap D Desai case MRSAS_TOMCAT: 8902909aab4SKashyap D Desai case MRSAS_VENTURA_4PORT: 8912909aab4SKashyap D Desai case MRSAS_CRUSADER_4PORT: 8927aade8bfSKashyap D Desai sc->is_ventura = true; 8932909aab4SKashyap D Desai break; 8942909aab4SKashyap D Desai case MRSAS_AERO_10E1: 8952909aab4SKashyap D Desai case MRSAS_AERO_10E5: 8962909aab4SKashyap D Desai device_printf(dev, "Adapter is in configurable secure mode\n"); 8972909aab4SKashyap D Desai case MRSAS_AERO_10E2: 8982909aab4SKashyap D Desai case MRSAS_AERO_10E6: 8992909aab4SKashyap D Desai sc->is_aero = true; 9002909aab4SKashyap D Desai break; 9012909aab4SKashyap D Desai case MRSAS_AERO_10E0: 9022909aab4SKashyap D Desai case MRSAS_AERO_10E3: 9032909aab4SKashyap D Desai case MRSAS_AERO_10E4: 9042909aab4SKashyap D Desai case MRSAS_AERO_10E7: 9052909aab4SKashyap D Desai device_printf(dev, "Adapter is in non-secure mode\n"); 9062909aab4SKashyap D Desai return SUCCESS; 9072909aab4SKashyap D Desai 908f9c63081SKashyap D Desai } 909f9c63081SKashyap D Desai 910665484d8SDoug Ambrisko mrsas_get_tunables(sc); 911665484d8SDoug Ambrisko 912665484d8SDoug Ambrisko /* 913665484d8SDoug Ambrisko * Set up PCI and registers 914665484d8SDoug Ambrisko */ 915665484d8SDoug Ambrisko cmd = pci_read_config(dev, PCIR_COMMAND, 2); 916665484d8SDoug Ambrisko if ((cmd & PCIM_CMD_PORTEN) == 0) { 917665484d8SDoug Ambrisko return (ENXIO); 918665484d8SDoug Ambrisko } 919665484d8SDoug Ambrisko /* Force the busmaster enable bit on. */ 920665484d8SDoug Ambrisko cmd |= PCIM_CMD_BUSMASTEREN; 921665484d8SDoug Ambrisko pci_write_config(dev, PCIR_COMMAND, cmd, 2); 922665484d8SDoug Ambrisko 9232909aab4SKashyap D Desai /* For Ventura/Aero system registers are mapped to BAR0 */ 9242909aab4SKashyap D Desai if (sc->is_ventura || sc->is_aero) 9257aade8bfSKashyap D Desai sc->reg_res_id = PCIR_BAR(0); /* BAR0 offset */ 9267aade8bfSKashyap D Desai else 9277aade8bfSKashyap D Desai sc->reg_res_id = PCIR_BAR(1); /* BAR1 offset */ 928665484d8SDoug Ambrisko 92943cd6160SJustin Hibbits if ((sc->reg_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 93043cd6160SJustin Hibbits &(sc->reg_res_id), RF_ACTIVE)) 931665484d8SDoug Ambrisko == NULL) { 932665484d8SDoug Ambrisko device_printf(dev, "Cannot allocate PCI registers\n"); 933665484d8SDoug Ambrisko goto attach_fail; 934665484d8SDoug Ambrisko } 935665484d8SDoug Ambrisko sc->bus_tag = rman_get_bustag(sc->reg_res); 936665484d8SDoug Ambrisko sc->bus_handle = rman_get_bushandle(sc->reg_res); 937665484d8SDoug Ambrisko 938665484d8SDoug Ambrisko /* Intialize mutexes */ 939665484d8SDoug Ambrisko mtx_init(&sc->sim_lock, "mrsas_sim_lock", NULL, MTX_DEF); 940665484d8SDoug Ambrisko mtx_init(&sc->pci_lock, "mrsas_pci_lock", NULL, MTX_DEF); 941665484d8SDoug Ambrisko mtx_init(&sc->io_lock, "mrsas_io_lock", NULL, MTX_DEF); 942665484d8SDoug Ambrisko mtx_init(&sc->aen_lock, "mrsas_aen_lock", NULL, MTX_DEF); 943665484d8SDoug Ambrisko mtx_init(&sc->ioctl_lock, "mrsas_ioctl_lock", NULL, MTX_SPIN); 944665484d8SDoug Ambrisko mtx_init(&sc->mpt_cmd_pool_lock, "mrsas_mpt_cmd_pool_lock", NULL, MTX_DEF); 945665484d8SDoug Ambrisko mtx_init(&sc->mfi_cmd_pool_lock, "mrsas_mfi_cmd_pool_lock", NULL, MTX_DEF); 946665484d8SDoug Ambrisko mtx_init(&sc->raidmap_lock, "mrsas_raidmap_lock", NULL, MTX_DEF); 947821df4b9SKashyap D Desai mtx_init(&sc->stream_lock, "mrsas_stream_lock", NULL, MTX_DEF); 948665484d8SDoug Ambrisko 949665484d8SDoug Ambrisko /* Intialize linked list */ 950665484d8SDoug Ambrisko TAILQ_INIT(&sc->mrsas_mpt_cmd_list_head); 951665484d8SDoug Ambrisko TAILQ_INIT(&sc->mrsas_mfi_cmd_list_head); 952665484d8SDoug Ambrisko 953f5fb2237SKashyap D Desai mrsas_atomic_set(&sc->fw_outstanding, 0); 9548bb601acSKashyap D Desai mrsas_atomic_set(&sc->target_reset_outstanding, 0); 9553d273176SKashyap D Desai mrsas_atomic_set(&sc->prp_count, 0); 9563d273176SKashyap D Desai mrsas_atomic_set(&sc->sge_holes, 0); 957665484d8SDoug Ambrisko 958665484d8SDoug Ambrisko sc->io_cmds_highwater = 0; 959665484d8SDoug Ambrisko 960665484d8SDoug Ambrisko sc->adprecovery = MRSAS_HBA_OPERATIONAL; 961665484d8SDoug Ambrisko sc->UnevenSpanSupport = 0; 962665484d8SDoug Ambrisko 963d18d1b47SKashyap D Desai sc->msix_enable = 0; 964d18d1b47SKashyap D Desai 965665484d8SDoug Ambrisko /* Initialize Firmware */ 966665484d8SDoug Ambrisko if (mrsas_init_fw(sc) != SUCCESS) { 967665484d8SDoug Ambrisko goto attach_fail_fw; 968665484d8SDoug Ambrisko } 9698071588dSKashyap D Desai /* Register mrsas to CAM layer */ 970665484d8SDoug Ambrisko if ((mrsas_cam_attach(sc) != SUCCESS)) { 971665484d8SDoug Ambrisko goto attach_fail_cam; 972665484d8SDoug Ambrisko } 973665484d8SDoug Ambrisko /* Register IRQs */ 974665484d8SDoug Ambrisko if (mrsas_setup_irq(sc) != SUCCESS) { 975665484d8SDoug Ambrisko goto attach_fail_irq; 976665484d8SDoug Ambrisko } 977665484d8SDoug Ambrisko error = mrsas_kproc_create(mrsas_ocr_thread, sc, 978665484d8SDoug Ambrisko &sc->ocr_thread, 0, 0, "mrsas_ocr%d", 979665484d8SDoug Ambrisko device_get_unit(sc->mrsas_dev)); 980665484d8SDoug Ambrisko if (error) { 9818071588dSKashyap D Desai device_printf(sc->mrsas_dev, "Error %d starting OCR thread\n", error); 9828071588dSKashyap D Desai goto attach_fail_ocr_thread; 983665484d8SDoug Ambrisko } 984536094dcSKashyap D Desai /* 9858071588dSKashyap D Desai * After FW initialization and OCR thread creation 9868071588dSKashyap D Desai * we will defer the cdev creation, AEN setup on ICH callback 987536094dcSKashyap D Desai */ 9888071588dSKashyap D Desai sc->mrsas_ich.ich_func = mrsas_ich_startup; 9898071588dSKashyap D Desai sc->mrsas_ich.ich_arg = sc; 9908071588dSKashyap D Desai if (config_intrhook_establish(&sc->mrsas_ich) != 0) { 9918071588dSKashyap D Desai device_printf(sc->mrsas_dev, "Config hook is already established\n"); 9928071588dSKashyap D Desai } 9938071588dSKashyap D Desai mrsas_setup_sysctl(sc); 9948071588dSKashyap D Desai return SUCCESS; 995536094dcSKashyap D Desai 9968071588dSKashyap D Desai attach_fail_ocr_thread: 9978071588dSKashyap D Desai if (sc->ocr_thread_active) 9988071588dSKashyap D Desai wakeup(&sc->ocr_chan); 999665484d8SDoug Ambrisko attach_fail_irq: 1000665484d8SDoug Ambrisko mrsas_teardown_intr(sc); 1001665484d8SDoug Ambrisko attach_fail_cam: 1002665484d8SDoug Ambrisko mrsas_cam_detach(sc); 1003665484d8SDoug Ambrisko attach_fail_fw: 1004d18d1b47SKashyap D Desai /* if MSIX vector is allocated and FW Init FAILED then release MSIX */ 1005d18d1b47SKashyap D Desai if (sc->msix_enable == 1) 1006d18d1b47SKashyap D Desai pci_release_msi(sc->mrsas_dev); 1007665484d8SDoug Ambrisko mrsas_free_mem(sc); 1008665484d8SDoug Ambrisko mtx_destroy(&sc->sim_lock); 1009665484d8SDoug Ambrisko mtx_destroy(&sc->aen_lock); 1010665484d8SDoug Ambrisko mtx_destroy(&sc->pci_lock); 1011665484d8SDoug Ambrisko mtx_destroy(&sc->io_lock); 1012665484d8SDoug Ambrisko mtx_destroy(&sc->ioctl_lock); 1013665484d8SDoug Ambrisko mtx_destroy(&sc->mpt_cmd_pool_lock); 1014665484d8SDoug Ambrisko mtx_destroy(&sc->mfi_cmd_pool_lock); 1015665484d8SDoug Ambrisko mtx_destroy(&sc->raidmap_lock); 1016821df4b9SKashyap D Desai mtx_destroy(&sc->stream_lock); 1017665484d8SDoug Ambrisko attach_fail: 1018665484d8SDoug Ambrisko if (sc->reg_res) { 1019665484d8SDoug Ambrisko bus_release_resource(sc->mrsas_dev, SYS_RES_MEMORY, 1020665484d8SDoug Ambrisko sc->reg_res_id, sc->reg_res); 1021665484d8SDoug Ambrisko } 1022665484d8SDoug Ambrisko return (ENXIO); 1023665484d8SDoug Ambrisko } 1024665484d8SDoug Ambrisko 10258e727371SKashyap D Desai /* 10268071588dSKashyap D Desai * Interrupt config hook 10278071588dSKashyap D Desai */ 10288071588dSKashyap D Desai static void 10298071588dSKashyap D Desai mrsas_ich_startup(void *arg) 10308071588dSKashyap D Desai { 103179b4460bSKashyap D Desai int i = 0; 10328071588dSKashyap D Desai struct mrsas_softc *sc = (struct mrsas_softc *)arg; 10338071588dSKashyap D Desai 10348071588dSKashyap D Desai /* 10358071588dSKashyap D Desai * Intialize a counting Semaphore to take care no. of concurrent IOCTLs 10368071588dSKashyap D Desai */ 1037731b7561SKashyap D Desai sema_init(&sc->ioctl_count_sema, MRSAS_MAX_IOCTL_CMDS, 10388071588dSKashyap D Desai IOCTL_SEMA_DESCRIPTION); 10398071588dSKashyap D Desai 10408071588dSKashyap D Desai /* Create a /dev entry for mrsas controller. */ 10418071588dSKashyap D Desai sc->mrsas_cdev = make_dev(&mrsas_cdevsw, device_get_unit(sc->mrsas_dev), UID_ROOT, 10428071588dSKashyap D Desai GID_OPERATOR, (S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP), "mrsas%u", 10438071588dSKashyap D Desai device_get_unit(sc->mrsas_dev)); 10448071588dSKashyap D Desai 10458071588dSKashyap D Desai if (device_get_unit(sc->mrsas_dev) == 0) { 10468071588dSKashyap D Desai make_dev_alias_p(MAKEDEV_CHECKNAME, 10478071588dSKashyap D Desai &sc->mrsas_linux_emulator_cdev, sc->mrsas_cdev, 10488071588dSKashyap D Desai "megaraid_sas_ioctl_node"); 10498071588dSKashyap D Desai } 10508071588dSKashyap D Desai if (sc->mrsas_cdev) 10518071588dSKashyap D Desai sc->mrsas_cdev->si_drv1 = sc; 10528071588dSKashyap D Desai 10538071588dSKashyap D Desai /* 10548071588dSKashyap D Desai * Add this controller to mrsas_mgmt_info structure so that it can be 10558071588dSKashyap D Desai * exported to management applications 10568071588dSKashyap D Desai */ 10578071588dSKashyap D Desai if (device_get_unit(sc->mrsas_dev) == 0) 10588071588dSKashyap D Desai memset(&mrsas_mgmt_info, 0, sizeof(mrsas_mgmt_info)); 10598071588dSKashyap D Desai 10608071588dSKashyap D Desai mrsas_mgmt_info.count++; 10618071588dSKashyap D Desai mrsas_mgmt_info.sc_ptr[mrsas_mgmt_info.max_index] = sc; 10628071588dSKashyap D Desai mrsas_mgmt_info.max_index++; 10638071588dSKashyap D Desai 10648071588dSKashyap D Desai /* Enable Interrupts */ 10658071588dSKashyap D Desai mrsas_enable_intr(sc); 10668071588dSKashyap D Desai 106779b4460bSKashyap D Desai /* Call DCMD get_pd_info for all system PDs */ 106879b4460bSKashyap D Desai for (i = 0; i < MRSAS_MAX_PD; i++) { 106979b4460bSKashyap D Desai if ((sc->target_list[i].target_id != 0xffff) && 107079b4460bSKashyap D Desai sc->pd_info_mem) 107179b4460bSKashyap D Desai mrsas_get_pd_info(sc, sc->target_list[i].target_id); 107279b4460bSKashyap D Desai } 107379b4460bSKashyap D Desai 10748071588dSKashyap D Desai /* Initiate AEN (Asynchronous Event Notification) */ 10758071588dSKashyap D Desai if (mrsas_start_aen(sc)) { 10768071588dSKashyap D Desai device_printf(sc->mrsas_dev, "Error: AEN registration FAILED !!! " 10778071588dSKashyap D Desai "Further events from the controller will not be communicated.\n" 10788071588dSKashyap D Desai "Either there is some problem in the controller" 10798071588dSKashyap D Desai "or the controller does not support AEN.\n" 10808071588dSKashyap D Desai "Please contact to the SUPPORT TEAM if the problem persists\n"); 10818071588dSKashyap D Desai } 10828071588dSKashyap D Desai if (sc->mrsas_ich.ich_arg != NULL) { 10838071588dSKashyap D Desai device_printf(sc->mrsas_dev, "Disestablish mrsas intr hook\n"); 10848071588dSKashyap D Desai config_intrhook_disestablish(&sc->mrsas_ich); 10858071588dSKashyap D Desai sc->mrsas_ich.ich_arg = NULL; 10868071588dSKashyap D Desai } 10878071588dSKashyap D Desai } 10888071588dSKashyap D Desai 10898071588dSKashyap D Desai /* 1090665484d8SDoug Ambrisko * mrsas_detach: De-allocates and teardown resources 10918e727371SKashyap D Desai * input: pointer to device struct 1092665484d8SDoug Ambrisko * 10938e727371SKashyap D Desai * This function is the entry point for device disconnect and detach. 10948e727371SKashyap D Desai * It performs memory de-allocations, shutdown of the controller and various 1095665484d8SDoug Ambrisko * teardown and destroy resource functions. 1096665484d8SDoug Ambrisko */ 10978e727371SKashyap D Desai static int 10988e727371SKashyap D Desai mrsas_detach(device_t dev) 1099665484d8SDoug Ambrisko { 1100665484d8SDoug Ambrisko struct mrsas_softc *sc; 1101665484d8SDoug Ambrisko int i = 0; 1102665484d8SDoug Ambrisko 1103665484d8SDoug Ambrisko sc = device_get_softc(dev); 1104665484d8SDoug Ambrisko sc->remove_in_progress = 1; 1105536094dcSKashyap D Desai 1106839ee025SKashyap D Desai /* Destroy the character device so no other IOCTL will be handled */ 11078071588dSKashyap D Desai if ((device_get_unit(dev) == 0) && sc->mrsas_linux_emulator_cdev) 11088071588dSKashyap D Desai destroy_dev(sc->mrsas_linux_emulator_cdev); 1109839ee025SKashyap D Desai destroy_dev(sc->mrsas_cdev); 1110839ee025SKashyap D Desai 1111536094dcSKashyap D Desai /* 1112536094dcSKashyap D Desai * Take the instance off the instance array. Note that we will not 1113536094dcSKashyap D Desai * decrement the max_index. We let this array be sparse array 1114536094dcSKashyap D Desai */ 1115536094dcSKashyap D Desai for (i = 0; i < mrsas_mgmt_info.max_index; i++) { 1116536094dcSKashyap D Desai if (mrsas_mgmt_info.sc_ptr[i] == sc) { 1117536094dcSKashyap D Desai mrsas_mgmt_info.count--; 1118536094dcSKashyap D Desai mrsas_mgmt_info.sc_ptr[i] = NULL; 1119536094dcSKashyap D Desai break; 1120536094dcSKashyap D Desai } 1121536094dcSKashyap D Desai } 1122536094dcSKashyap D Desai 1123665484d8SDoug Ambrisko if (sc->ocr_thread_active) 1124665484d8SDoug Ambrisko wakeup(&sc->ocr_chan); 1125665484d8SDoug Ambrisko while (sc->reset_in_progress) { 1126665484d8SDoug Ambrisko i++; 1127665484d8SDoug Ambrisko if (!(i % MRSAS_RESET_NOTICE_INTERVAL)) { 1128665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_INFO, 1129f0c7594bSKashyap D Desai "[%2d]waiting for OCR to be finished from %s\n", i, __func__); 1130665484d8SDoug Ambrisko } 1131665484d8SDoug Ambrisko pause("mr_shutdown", hz); 1132665484d8SDoug Ambrisko } 1133665484d8SDoug Ambrisko i = 0; 1134665484d8SDoug Ambrisko while (sc->ocr_thread_active) { 1135665484d8SDoug Ambrisko i++; 1136665484d8SDoug Ambrisko if (!(i % MRSAS_RESET_NOTICE_INTERVAL)) { 1137665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_INFO, 1138665484d8SDoug Ambrisko "[%2d]waiting for " 1139665484d8SDoug Ambrisko "mrsas_ocr thread to quit ocr %d\n", i, 1140665484d8SDoug Ambrisko sc->ocr_thread_active); 1141665484d8SDoug Ambrisko } 1142665484d8SDoug Ambrisko pause("mr_shutdown", hz); 1143665484d8SDoug Ambrisko } 1144665484d8SDoug Ambrisko mrsas_flush_cache(sc); 1145665484d8SDoug Ambrisko mrsas_shutdown_ctlr(sc, MR_DCMD_CTRL_SHUTDOWN); 1146665484d8SDoug Ambrisko mrsas_disable_intr(sc); 1147821df4b9SKashyap D Desai 11482909aab4SKashyap D Desai if ((sc->is_ventura || sc->is_aero) && sc->streamDetectByLD) { 1149821df4b9SKashyap D Desai for (i = 0; i < MAX_LOGICAL_DRIVES_EXT; ++i) 1150821df4b9SKashyap D Desai free(sc->streamDetectByLD[i], M_MRSAS); 1151821df4b9SKashyap D Desai free(sc->streamDetectByLD, M_MRSAS); 1152821df4b9SKashyap D Desai sc->streamDetectByLD = NULL; 1153821df4b9SKashyap D Desai } 1154821df4b9SKashyap D Desai 1155665484d8SDoug Ambrisko mrsas_cam_detach(sc); 1156665484d8SDoug Ambrisko mrsas_teardown_intr(sc); 1157665484d8SDoug Ambrisko mrsas_free_mem(sc); 1158665484d8SDoug Ambrisko mtx_destroy(&sc->sim_lock); 1159665484d8SDoug Ambrisko mtx_destroy(&sc->aen_lock); 1160665484d8SDoug Ambrisko mtx_destroy(&sc->pci_lock); 1161665484d8SDoug Ambrisko mtx_destroy(&sc->io_lock); 1162665484d8SDoug Ambrisko mtx_destroy(&sc->ioctl_lock); 1163665484d8SDoug Ambrisko mtx_destroy(&sc->mpt_cmd_pool_lock); 1164665484d8SDoug Ambrisko mtx_destroy(&sc->mfi_cmd_pool_lock); 1165665484d8SDoug Ambrisko mtx_destroy(&sc->raidmap_lock); 1166821df4b9SKashyap D Desai mtx_destroy(&sc->stream_lock); 1167839ee025SKashyap D Desai 1168839ee025SKashyap D Desai /* Wait for all the semaphores to be released */ 1169731b7561SKashyap D Desai while (sema_value(&sc->ioctl_count_sema) != MRSAS_MAX_IOCTL_CMDS) 1170839ee025SKashyap D Desai pause("mr_shutdown", hz); 1171839ee025SKashyap D Desai 1172839ee025SKashyap D Desai /* Destroy the counting semaphore created for Ioctl */ 1173839ee025SKashyap D Desai sema_destroy(&sc->ioctl_count_sema); 1174839ee025SKashyap D Desai 1175665484d8SDoug Ambrisko if (sc->reg_res) { 1176665484d8SDoug Ambrisko bus_release_resource(sc->mrsas_dev, 1177665484d8SDoug Ambrisko SYS_RES_MEMORY, sc->reg_res_id, sc->reg_res); 1178665484d8SDoug Ambrisko } 1179665484d8SDoug Ambrisko if (sc->sysctl_tree != NULL) 1180665484d8SDoug Ambrisko sysctl_ctx_free(&sc->sysctl_ctx); 1181839ee025SKashyap D Desai 1182665484d8SDoug Ambrisko return (0); 1183665484d8SDoug Ambrisko } 1184665484d8SDoug Ambrisko 1185f28ecf2bSAndriy Gapon static int 1186f28ecf2bSAndriy Gapon mrsas_shutdown(device_t dev) 1187f28ecf2bSAndriy Gapon { 1188f28ecf2bSAndriy Gapon struct mrsas_softc *sc; 1189f28ecf2bSAndriy Gapon int i; 1190f28ecf2bSAndriy Gapon 1191f28ecf2bSAndriy Gapon sc = device_get_softc(dev); 1192f28ecf2bSAndriy Gapon sc->remove_in_progress = 1; 1193*879e0604SMateusz Guzik if (!KERNEL_PANICKED()) { 1194f28ecf2bSAndriy Gapon if (sc->ocr_thread_active) 1195f28ecf2bSAndriy Gapon wakeup(&sc->ocr_chan); 1196f28ecf2bSAndriy Gapon i = 0; 1197f28ecf2bSAndriy Gapon while (sc->reset_in_progress && i < 15) { 1198f28ecf2bSAndriy Gapon i++; 1199f28ecf2bSAndriy Gapon if ((i % MRSAS_RESET_NOTICE_INTERVAL) == 0) { 1200f28ecf2bSAndriy Gapon mrsas_dprint(sc, MRSAS_INFO, 1201f28ecf2bSAndriy Gapon "[%2d]waiting for OCR to be finished " 1202f28ecf2bSAndriy Gapon "from %s\n", i, __func__); 1203f28ecf2bSAndriy Gapon } 1204f28ecf2bSAndriy Gapon pause("mr_shutdown", hz); 1205f28ecf2bSAndriy Gapon } 1206f28ecf2bSAndriy Gapon if (sc->reset_in_progress) { 1207f28ecf2bSAndriy Gapon mrsas_dprint(sc, MRSAS_INFO, 1208f28ecf2bSAndriy Gapon "gave up waiting for OCR to be finished\n"); 1209f28ecf2bSAndriy Gapon } 1210f28ecf2bSAndriy Gapon } 1211f28ecf2bSAndriy Gapon 1212f28ecf2bSAndriy Gapon mrsas_flush_cache(sc); 1213f28ecf2bSAndriy Gapon mrsas_shutdown_ctlr(sc, MR_DCMD_CTRL_SHUTDOWN); 1214f28ecf2bSAndriy Gapon mrsas_disable_intr(sc); 1215f28ecf2bSAndriy Gapon return (0); 1216f28ecf2bSAndriy Gapon } 1217f28ecf2bSAndriy Gapon 12188e727371SKashyap D Desai /* 1219665484d8SDoug Ambrisko * mrsas_free_mem: Frees allocated memory 1220665484d8SDoug Ambrisko * input: Adapter instance soft state 1221665484d8SDoug Ambrisko * 1222665484d8SDoug Ambrisko * This function is called from mrsas_detach() to free previously allocated 1223665484d8SDoug Ambrisko * memory. 1224665484d8SDoug Ambrisko */ 12258e727371SKashyap D Desai void 12268e727371SKashyap D Desai mrsas_free_mem(struct mrsas_softc *sc) 1227665484d8SDoug Ambrisko { 1228665484d8SDoug Ambrisko int i; 12292a1d3bcdSKashyap D Desai u_int32_t max_fw_cmds; 1230665484d8SDoug Ambrisko struct mrsas_mfi_cmd *mfi_cmd; 1231665484d8SDoug Ambrisko struct mrsas_mpt_cmd *mpt_cmd; 1232665484d8SDoug Ambrisko 1233665484d8SDoug Ambrisko /* 1234665484d8SDoug Ambrisko * Free RAID map memory 1235665484d8SDoug Ambrisko */ 12368e727371SKashyap D Desai for (i = 0; i < 2; i++) { 1237665484d8SDoug Ambrisko if (sc->raidmap_phys_addr[i]) 1238665484d8SDoug Ambrisko bus_dmamap_unload(sc->raidmap_tag[i], sc->raidmap_dmamap[i]); 1239665484d8SDoug Ambrisko if (sc->raidmap_mem[i] != NULL) 1240665484d8SDoug Ambrisko bus_dmamem_free(sc->raidmap_tag[i], sc->raidmap_mem[i], sc->raidmap_dmamap[i]); 1241665484d8SDoug Ambrisko if (sc->raidmap_tag[i] != NULL) 1242665484d8SDoug Ambrisko bus_dma_tag_destroy(sc->raidmap_tag[i]); 12434799d485SKashyap D Desai 12444799d485SKashyap D Desai if (sc->ld_drv_map[i] != NULL) 12454799d485SKashyap D Desai free(sc->ld_drv_map[i], M_MRSAS); 1246665484d8SDoug Ambrisko } 1247a688fcd0SKashyap D Desai for (i = 0; i < 2; i++) { 1248a688fcd0SKashyap D Desai if (sc->jbodmap_phys_addr[i]) 1249a688fcd0SKashyap D Desai bus_dmamap_unload(sc->jbodmap_tag[i], sc->jbodmap_dmamap[i]); 1250a688fcd0SKashyap D Desai if (sc->jbodmap_mem[i] != NULL) 1251a688fcd0SKashyap D Desai bus_dmamem_free(sc->jbodmap_tag[i], sc->jbodmap_mem[i], sc->jbodmap_dmamap[i]); 1252a688fcd0SKashyap D Desai if (sc->jbodmap_tag[i] != NULL) 1253a688fcd0SKashyap D Desai bus_dma_tag_destroy(sc->jbodmap_tag[i]); 1254a688fcd0SKashyap D Desai } 1255665484d8SDoug Ambrisko /* 1256453130d9SPedro F. Giffuni * Free version buffer memory 1257665484d8SDoug Ambrisko */ 1258665484d8SDoug Ambrisko if (sc->verbuf_phys_addr) 1259665484d8SDoug Ambrisko bus_dmamap_unload(sc->verbuf_tag, sc->verbuf_dmamap); 1260665484d8SDoug Ambrisko if (sc->verbuf_mem != NULL) 1261665484d8SDoug Ambrisko bus_dmamem_free(sc->verbuf_tag, sc->verbuf_mem, sc->verbuf_dmamap); 1262665484d8SDoug Ambrisko if (sc->verbuf_tag != NULL) 1263665484d8SDoug Ambrisko bus_dma_tag_destroy(sc->verbuf_tag); 1264665484d8SDoug Ambrisko 1265665484d8SDoug Ambrisko 1266665484d8SDoug Ambrisko /* 1267665484d8SDoug Ambrisko * Free sense buffer memory 1268665484d8SDoug Ambrisko */ 1269665484d8SDoug Ambrisko if (sc->sense_phys_addr) 1270665484d8SDoug Ambrisko bus_dmamap_unload(sc->sense_tag, sc->sense_dmamap); 1271665484d8SDoug Ambrisko if (sc->sense_mem != NULL) 1272665484d8SDoug Ambrisko bus_dmamem_free(sc->sense_tag, sc->sense_mem, sc->sense_dmamap); 1273665484d8SDoug Ambrisko if (sc->sense_tag != NULL) 1274665484d8SDoug Ambrisko bus_dma_tag_destroy(sc->sense_tag); 1275665484d8SDoug Ambrisko 1276665484d8SDoug Ambrisko /* 1277665484d8SDoug Ambrisko * Free chain frame memory 1278665484d8SDoug Ambrisko */ 1279665484d8SDoug Ambrisko if (sc->chain_frame_phys_addr) 1280665484d8SDoug Ambrisko bus_dmamap_unload(sc->chain_frame_tag, sc->chain_frame_dmamap); 1281665484d8SDoug Ambrisko if (sc->chain_frame_mem != NULL) 1282665484d8SDoug Ambrisko bus_dmamem_free(sc->chain_frame_tag, sc->chain_frame_mem, sc->chain_frame_dmamap); 1283665484d8SDoug Ambrisko if (sc->chain_frame_tag != NULL) 1284665484d8SDoug Ambrisko bus_dma_tag_destroy(sc->chain_frame_tag); 1285665484d8SDoug Ambrisko 1286665484d8SDoug Ambrisko /* 1287665484d8SDoug Ambrisko * Free IO Request memory 1288665484d8SDoug Ambrisko */ 1289665484d8SDoug Ambrisko if (sc->io_request_phys_addr) 1290665484d8SDoug Ambrisko bus_dmamap_unload(sc->io_request_tag, sc->io_request_dmamap); 1291665484d8SDoug Ambrisko if (sc->io_request_mem != NULL) 1292665484d8SDoug Ambrisko bus_dmamem_free(sc->io_request_tag, sc->io_request_mem, sc->io_request_dmamap); 1293665484d8SDoug Ambrisko if (sc->io_request_tag != NULL) 1294665484d8SDoug Ambrisko bus_dma_tag_destroy(sc->io_request_tag); 1295665484d8SDoug Ambrisko 1296665484d8SDoug Ambrisko /* 1297665484d8SDoug Ambrisko * Free Reply Descriptor memory 1298665484d8SDoug Ambrisko */ 1299665484d8SDoug Ambrisko if (sc->reply_desc_phys_addr) 1300665484d8SDoug Ambrisko bus_dmamap_unload(sc->reply_desc_tag, sc->reply_desc_dmamap); 1301665484d8SDoug Ambrisko if (sc->reply_desc_mem != NULL) 1302665484d8SDoug Ambrisko bus_dmamem_free(sc->reply_desc_tag, sc->reply_desc_mem, sc->reply_desc_dmamap); 1303665484d8SDoug Ambrisko if (sc->reply_desc_tag != NULL) 1304665484d8SDoug Ambrisko bus_dma_tag_destroy(sc->reply_desc_tag); 1305665484d8SDoug Ambrisko 1306665484d8SDoug Ambrisko /* 1307665484d8SDoug Ambrisko * Free event detail memory 1308665484d8SDoug Ambrisko */ 1309665484d8SDoug Ambrisko if (sc->evt_detail_phys_addr) 1310665484d8SDoug Ambrisko bus_dmamap_unload(sc->evt_detail_tag, sc->evt_detail_dmamap); 1311665484d8SDoug Ambrisko if (sc->evt_detail_mem != NULL) 1312665484d8SDoug Ambrisko bus_dmamem_free(sc->evt_detail_tag, sc->evt_detail_mem, sc->evt_detail_dmamap); 1313665484d8SDoug Ambrisko if (sc->evt_detail_tag != NULL) 1314665484d8SDoug Ambrisko bus_dma_tag_destroy(sc->evt_detail_tag); 1315665484d8SDoug Ambrisko 1316665484d8SDoug Ambrisko /* 131779b4460bSKashyap D Desai * Free PD info memory 131879b4460bSKashyap D Desai */ 131979b4460bSKashyap D Desai if (sc->pd_info_phys_addr) 132079b4460bSKashyap D Desai bus_dmamap_unload(sc->pd_info_tag, sc->pd_info_dmamap); 132179b4460bSKashyap D Desai if (sc->pd_info_mem != NULL) 132279b4460bSKashyap D Desai bus_dmamem_free(sc->pd_info_tag, sc->pd_info_mem, sc->pd_info_dmamap); 132379b4460bSKashyap D Desai if (sc->pd_info_tag != NULL) 132479b4460bSKashyap D Desai bus_dma_tag_destroy(sc->pd_info_tag); 132579b4460bSKashyap D Desai 132679b4460bSKashyap D Desai /* 1327665484d8SDoug Ambrisko * Free MFI frames 1328665484d8SDoug Ambrisko */ 1329665484d8SDoug Ambrisko if (sc->mfi_cmd_list) { 1330665484d8SDoug Ambrisko for (i = 0; i < MRSAS_MAX_MFI_CMDS; i++) { 1331665484d8SDoug Ambrisko mfi_cmd = sc->mfi_cmd_list[i]; 1332665484d8SDoug Ambrisko mrsas_free_frame(sc, mfi_cmd); 1333665484d8SDoug Ambrisko } 1334665484d8SDoug Ambrisko } 1335665484d8SDoug Ambrisko if (sc->mficmd_frame_tag != NULL) 1336665484d8SDoug Ambrisko bus_dma_tag_destroy(sc->mficmd_frame_tag); 1337665484d8SDoug Ambrisko 1338665484d8SDoug Ambrisko /* 1339665484d8SDoug Ambrisko * Free MPT internal command list 1340665484d8SDoug Ambrisko */ 13412a1d3bcdSKashyap D Desai max_fw_cmds = sc->max_fw_cmds; 1342665484d8SDoug Ambrisko if (sc->mpt_cmd_list) { 13432a1d3bcdSKashyap D Desai for (i = 0; i < max_fw_cmds; i++) { 1344665484d8SDoug Ambrisko mpt_cmd = sc->mpt_cmd_list[i]; 1345665484d8SDoug Ambrisko bus_dmamap_destroy(sc->data_tag, mpt_cmd->data_dmamap); 1346665484d8SDoug Ambrisko free(sc->mpt_cmd_list[i], M_MRSAS); 1347665484d8SDoug Ambrisko } 1348665484d8SDoug Ambrisko free(sc->mpt_cmd_list, M_MRSAS); 1349665484d8SDoug Ambrisko sc->mpt_cmd_list = NULL; 1350665484d8SDoug Ambrisko } 1351665484d8SDoug Ambrisko /* 1352665484d8SDoug Ambrisko * Free MFI internal command list 1353665484d8SDoug Ambrisko */ 1354665484d8SDoug Ambrisko 1355665484d8SDoug Ambrisko if (sc->mfi_cmd_list) { 1356665484d8SDoug Ambrisko for (i = 0; i < MRSAS_MAX_MFI_CMDS; i++) { 1357665484d8SDoug Ambrisko free(sc->mfi_cmd_list[i], M_MRSAS); 1358665484d8SDoug Ambrisko } 1359665484d8SDoug Ambrisko free(sc->mfi_cmd_list, M_MRSAS); 1360665484d8SDoug Ambrisko sc->mfi_cmd_list = NULL; 1361665484d8SDoug Ambrisko } 1362665484d8SDoug Ambrisko /* 1363665484d8SDoug Ambrisko * Free request descriptor memory 1364665484d8SDoug Ambrisko */ 1365665484d8SDoug Ambrisko free(sc->req_desc, M_MRSAS); 1366665484d8SDoug Ambrisko sc->req_desc = NULL; 1367665484d8SDoug Ambrisko 1368665484d8SDoug Ambrisko /* 1369665484d8SDoug Ambrisko * Destroy parent tag 1370665484d8SDoug Ambrisko */ 1371665484d8SDoug Ambrisko if (sc->mrsas_parent_tag != NULL) 1372665484d8SDoug Ambrisko bus_dma_tag_destroy(sc->mrsas_parent_tag); 1373af51c29fSKashyap D Desai 1374af51c29fSKashyap D Desai /* 1375af51c29fSKashyap D Desai * Free ctrl_info memory 1376af51c29fSKashyap D Desai */ 1377af51c29fSKashyap D Desai if (sc->ctrl_info != NULL) 1378af51c29fSKashyap D Desai free(sc->ctrl_info, M_MRSAS); 1379665484d8SDoug Ambrisko } 1380665484d8SDoug Ambrisko 13818e727371SKashyap D Desai /* 1382665484d8SDoug Ambrisko * mrsas_teardown_intr: Teardown interrupt 1383665484d8SDoug Ambrisko * input: Adapter instance soft state 1384665484d8SDoug Ambrisko * 13858e727371SKashyap D Desai * This function is called from mrsas_detach() to teardown and release bus 13868e727371SKashyap D Desai * interrupt resourse. 1387665484d8SDoug Ambrisko */ 13888e727371SKashyap D Desai void 13898e727371SKashyap D Desai mrsas_teardown_intr(struct mrsas_softc *sc) 1390665484d8SDoug Ambrisko { 1391d18d1b47SKashyap D Desai int i; 13928e727371SKashyap D Desai 1393d18d1b47SKashyap D Desai if (!sc->msix_enable) { 1394d18d1b47SKashyap D Desai if (sc->intr_handle[0]) 1395d18d1b47SKashyap D Desai bus_teardown_intr(sc->mrsas_dev, sc->mrsas_irq[0], sc->intr_handle[0]); 1396d18d1b47SKashyap D Desai if (sc->mrsas_irq[0] != NULL) 13978e727371SKashyap D Desai bus_release_resource(sc->mrsas_dev, SYS_RES_IRQ, 13988e727371SKashyap D Desai sc->irq_id[0], sc->mrsas_irq[0]); 1399d18d1b47SKashyap D Desai sc->intr_handle[0] = NULL; 1400d18d1b47SKashyap D Desai } else { 1401d18d1b47SKashyap D Desai for (i = 0; i < sc->msix_vectors; i++) { 1402d18d1b47SKashyap D Desai if (sc->intr_handle[i]) 1403d18d1b47SKashyap D Desai bus_teardown_intr(sc->mrsas_dev, sc->mrsas_irq[i], 1404d18d1b47SKashyap D Desai sc->intr_handle[i]); 1405d18d1b47SKashyap D Desai 1406d18d1b47SKashyap D Desai if (sc->mrsas_irq[i] != NULL) 1407d18d1b47SKashyap D Desai bus_release_resource(sc->mrsas_dev, SYS_RES_IRQ, 1408d18d1b47SKashyap D Desai sc->irq_id[i], sc->mrsas_irq[i]); 1409d18d1b47SKashyap D Desai 1410d18d1b47SKashyap D Desai sc->intr_handle[i] = NULL; 1411d18d1b47SKashyap D Desai } 1412d18d1b47SKashyap D Desai pci_release_msi(sc->mrsas_dev); 1413d18d1b47SKashyap D Desai } 1414d18d1b47SKashyap D Desai 1415665484d8SDoug Ambrisko } 1416665484d8SDoug Ambrisko 14178e727371SKashyap D Desai /* 1418665484d8SDoug Ambrisko * mrsas_suspend: Suspend entry point 1419665484d8SDoug Ambrisko * input: Device struct pointer 1420665484d8SDoug Ambrisko * 1421665484d8SDoug Ambrisko * This function is the entry point for system suspend from the OS. 1422665484d8SDoug Ambrisko */ 14238e727371SKashyap D Desai static int 14248e727371SKashyap D Desai mrsas_suspend(device_t dev) 1425665484d8SDoug Ambrisko { 14264bb0a4f0SKashyap D Desai /* This will be filled when the driver will have hibernation support */ 1427665484d8SDoug Ambrisko return (0); 1428665484d8SDoug Ambrisko } 1429665484d8SDoug Ambrisko 14308e727371SKashyap D Desai /* 1431665484d8SDoug Ambrisko * mrsas_resume: Resume entry point 1432665484d8SDoug Ambrisko * input: Device struct pointer 1433665484d8SDoug Ambrisko * 1434665484d8SDoug Ambrisko * This function is the entry point for system resume from the OS. 1435665484d8SDoug Ambrisko */ 14368e727371SKashyap D Desai static int 14378e727371SKashyap D Desai mrsas_resume(device_t dev) 1438665484d8SDoug Ambrisko { 14394bb0a4f0SKashyap D Desai /* This will be filled when the driver will have hibernation support */ 1440665484d8SDoug Ambrisko return (0); 1441665484d8SDoug Ambrisko } 1442665484d8SDoug Ambrisko 14435844115eSKashyap D Desai /** 14445844115eSKashyap D Desai * mrsas_get_softc_instance: Find softc instance based on cmd type 14455844115eSKashyap D Desai * 14465844115eSKashyap D Desai * This function will return softc instance based on cmd type. 14475844115eSKashyap D Desai * In some case, application fire ioctl on required management instance and 14485844115eSKashyap D Desai * do not provide host_no. Use cdev->si_drv1 to get softc instance for those 14495844115eSKashyap D Desai * case, else get the softc instance from host_no provided by application in 14505844115eSKashyap D Desai * user data. 14515844115eSKashyap D Desai */ 14525844115eSKashyap D Desai 14535844115eSKashyap D Desai static struct mrsas_softc * 14545844115eSKashyap D Desai mrsas_get_softc_instance(struct cdev *dev, u_long cmd, caddr_t arg) 14555844115eSKashyap D Desai { 14565844115eSKashyap D Desai struct mrsas_softc *sc = NULL; 14575844115eSKashyap D Desai struct mrsas_iocpacket *user_ioc = (struct mrsas_iocpacket *)arg; 1458dbcc81dfSKashyap D Desai 14595844115eSKashyap D Desai if (cmd == MRSAS_IOC_GET_PCI_INFO) { 14605844115eSKashyap D Desai sc = dev->si_drv1; 14615844115eSKashyap D Desai } else { 1462dbcc81dfSKashyap D Desai /* 1463dbcc81dfSKashyap D Desai * get the Host number & the softc from data sent by the 1464dbcc81dfSKashyap D Desai * Application 1465dbcc81dfSKashyap D Desai */ 14665844115eSKashyap D Desai sc = mrsas_mgmt_info.sc_ptr[user_ioc->host_no]; 14675844115eSKashyap D Desai if (sc == NULL) 14685bae00d6SSteven Hartland printf("There is no Controller number %d\n", 14695bae00d6SSteven Hartland user_ioc->host_no); 14705bae00d6SSteven Hartland else if (user_ioc->host_no >= mrsas_mgmt_info.max_index) 14715844115eSKashyap D Desai mrsas_dprint(sc, MRSAS_FAULT, 14725bae00d6SSteven Hartland "Invalid Controller number %d\n", user_ioc->host_no); 14735844115eSKashyap D Desai } 14745844115eSKashyap D Desai 14755844115eSKashyap D Desai return sc; 14765844115eSKashyap D Desai } 14775844115eSKashyap D Desai 14788e727371SKashyap D Desai /* 1479665484d8SDoug Ambrisko * mrsas_ioctl: IOCtl commands entry point. 1480665484d8SDoug Ambrisko * 1481665484d8SDoug Ambrisko * This function is the entry point for IOCtls from the OS. It calls the 1482665484d8SDoug Ambrisko * appropriate function for processing depending on the command received. 1483665484d8SDoug Ambrisko */ 1484665484d8SDoug Ambrisko static int 14857fc5f329SJohn Baldwin mrsas_ioctl(struct cdev *dev, u_long cmd, caddr_t arg, int flag, 14867fc5f329SJohn Baldwin struct thread *td) 1487665484d8SDoug Ambrisko { 1488665484d8SDoug Ambrisko struct mrsas_softc *sc; 1489665484d8SDoug Ambrisko int ret = 0, i = 0; 14905844115eSKashyap D Desai MRSAS_DRV_PCI_INFORMATION *pciDrvInfo; 1491665484d8SDoug Ambrisko 14925844115eSKashyap D Desai sc = mrsas_get_softc_instance(dev, cmd, arg); 14935844115eSKashyap D Desai if (!sc) 1494536094dcSKashyap D Desai return ENOENT; 14955844115eSKashyap D Desai 1496808517a4SKashyap D Desai if (sc->remove_in_progress || 1497808517a4SKashyap D Desai (sc->adprecovery == MRSAS_HW_CRITICAL_ERROR)) { 1498665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_INFO, 1499808517a4SKashyap D Desai "Either driver remove or shutdown called or " 1500808517a4SKashyap D Desai "HW is in unrecoverable critical error state.\n"); 1501665484d8SDoug Ambrisko return ENOENT; 1502665484d8SDoug Ambrisko } 1503665484d8SDoug Ambrisko mtx_lock_spin(&sc->ioctl_lock); 1504665484d8SDoug Ambrisko if (!sc->reset_in_progress) { 1505665484d8SDoug Ambrisko mtx_unlock_spin(&sc->ioctl_lock); 1506665484d8SDoug Ambrisko goto do_ioctl; 1507665484d8SDoug Ambrisko } 1508665484d8SDoug Ambrisko mtx_unlock_spin(&sc->ioctl_lock); 1509665484d8SDoug Ambrisko while (sc->reset_in_progress) { 1510665484d8SDoug Ambrisko i++; 1511665484d8SDoug Ambrisko if (!(i % MRSAS_RESET_NOTICE_INTERVAL)) { 1512665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_INFO, 1513f0c7594bSKashyap D Desai "[%2d]waiting for OCR to be finished from %s\n", i, __func__); 1514665484d8SDoug Ambrisko } 1515665484d8SDoug Ambrisko pause("mr_ioctl", hz); 1516665484d8SDoug Ambrisko } 1517665484d8SDoug Ambrisko 1518665484d8SDoug Ambrisko do_ioctl: 1519665484d8SDoug Ambrisko switch (cmd) { 1520536094dcSKashyap D Desai case MRSAS_IOC_FIRMWARE_PASS_THROUGH64: 1521536094dcSKashyap D Desai #ifdef COMPAT_FREEBSD32 1522536094dcSKashyap D Desai case MRSAS_IOC_FIRMWARE_PASS_THROUGH32: 1523536094dcSKashyap D Desai #endif 15248e727371SKashyap D Desai /* 15258e727371SKashyap D Desai * Decrement the Ioctl counting Semaphore before getting an 15268e727371SKashyap D Desai * mfi command 15278e727371SKashyap D Desai */ 1528839ee025SKashyap D Desai sema_wait(&sc->ioctl_count_sema); 1529839ee025SKashyap D Desai 1530536094dcSKashyap D Desai ret = mrsas_passthru(sc, (void *)arg, cmd); 1531839ee025SKashyap D Desai 1532839ee025SKashyap D Desai /* Increment the Ioctl counting semaphore value */ 1533839ee025SKashyap D Desai sema_post(&sc->ioctl_count_sema); 1534839ee025SKashyap D Desai 1535665484d8SDoug Ambrisko break; 1536665484d8SDoug Ambrisko case MRSAS_IOC_SCAN_BUS: 1537665484d8SDoug Ambrisko ret = mrsas_bus_scan(sc); 1538665484d8SDoug Ambrisko break; 15395844115eSKashyap D Desai 15405844115eSKashyap D Desai case MRSAS_IOC_GET_PCI_INFO: 15415844115eSKashyap D Desai pciDrvInfo = (MRSAS_DRV_PCI_INFORMATION *) arg; 15425844115eSKashyap D Desai memset(pciDrvInfo, 0, sizeof(MRSAS_DRV_PCI_INFORMATION)); 15435844115eSKashyap D Desai pciDrvInfo->busNumber = pci_get_bus(sc->mrsas_dev); 15445844115eSKashyap D Desai pciDrvInfo->deviceNumber = pci_get_slot(sc->mrsas_dev); 15455844115eSKashyap D Desai pciDrvInfo->functionNumber = pci_get_function(sc->mrsas_dev); 15465844115eSKashyap D Desai pciDrvInfo->domainID = pci_get_domain(sc->mrsas_dev); 15475844115eSKashyap D Desai mrsas_dprint(sc, MRSAS_INFO, "pci bus no: %d," 15485844115eSKashyap D Desai "pci device no: %d, pci function no: %d," 15495844115eSKashyap D Desai "pci domain ID: %d\n", 15505844115eSKashyap D Desai pciDrvInfo->busNumber, pciDrvInfo->deviceNumber, 15515844115eSKashyap D Desai pciDrvInfo->functionNumber, pciDrvInfo->domainID); 15525844115eSKashyap D Desai ret = 0; 15535844115eSKashyap D Desai break; 15545844115eSKashyap D Desai 1555536094dcSKashyap D Desai default: 1556536094dcSKashyap D Desai mrsas_dprint(sc, MRSAS_TRACE, "IOCTL command 0x%lx is not handled\n", cmd); 1557839ee025SKashyap D Desai ret = ENOENT; 1558665484d8SDoug Ambrisko } 1559665484d8SDoug Ambrisko 1560665484d8SDoug Ambrisko return (ret); 1561665484d8SDoug Ambrisko } 1562665484d8SDoug Ambrisko 15638e727371SKashyap D Desai /* 1564da011113SKashyap D Desai * mrsas_poll: poll entry point for mrsas driver fd 1565da011113SKashyap D Desai * 15668e727371SKashyap D Desai * This function is the entry point for poll from the OS. It waits for some AEN 15678e727371SKashyap D Desai * events to be triggered from the controller and notifies back. 1568da011113SKashyap D Desai */ 1569da011113SKashyap D Desai static int 1570da011113SKashyap D Desai mrsas_poll(struct cdev *dev, int poll_events, struct thread *td) 1571da011113SKashyap D Desai { 1572da011113SKashyap D Desai struct mrsas_softc *sc; 1573da011113SKashyap D Desai int revents = 0; 1574da011113SKashyap D Desai 1575da011113SKashyap D Desai sc = dev->si_drv1; 1576da011113SKashyap D Desai 1577da011113SKashyap D Desai if (poll_events & (POLLIN | POLLRDNORM)) { 1578da011113SKashyap D Desai if (sc->mrsas_aen_triggered) { 1579da011113SKashyap D Desai revents |= poll_events & (POLLIN | POLLRDNORM); 1580da011113SKashyap D Desai } 1581da011113SKashyap D Desai } 1582da011113SKashyap D Desai if (revents == 0) { 1583da011113SKashyap D Desai if (poll_events & (POLLIN | POLLRDNORM)) { 1584ecea5be4SKashyap D Desai mtx_lock(&sc->aen_lock); 1585da011113SKashyap D Desai sc->mrsas_poll_waiting = 1; 1586da011113SKashyap D Desai selrecord(td, &sc->mrsas_select); 1587ecea5be4SKashyap D Desai mtx_unlock(&sc->aen_lock); 1588da011113SKashyap D Desai } 1589da011113SKashyap D Desai } 1590da011113SKashyap D Desai return revents; 1591da011113SKashyap D Desai } 1592da011113SKashyap D Desai 15938e727371SKashyap D Desai /* 15948e727371SKashyap D Desai * mrsas_setup_irq: Set up interrupt 1595665484d8SDoug Ambrisko * input: Adapter instance soft state 1596665484d8SDoug Ambrisko * 1597665484d8SDoug Ambrisko * This function sets up interrupts as a bus resource, with flags indicating 1598665484d8SDoug Ambrisko * resource permitting contemporaneous sharing and for resource to activate 1599665484d8SDoug Ambrisko * atomically. 1600665484d8SDoug Ambrisko */ 16018e727371SKashyap D Desai static int 16028e727371SKashyap D Desai mrsas_setup_irq(struct mrsas_softc *sc) 1603665484d8SDoug Ambrisko { 1604d18d1b47SKashyap D Desai if (sc->msix_enable && (mrsas_setup_msix(sc) == SUCCESS)) 1605d18d1b47SKashyap D Desai device_printf(sc->mrsas_dev, "MSI-x interrupts setup success\n"); 1606665484d8SDoug Ambrisko 1607d18d1b47SKashyap D Desai else { 1608d18d1b47SKashyap D Desai device_printf(sc->mrsas_dev, "Fall back to legacy interrupt\n"); 1609d18d1b47SKashyap D Desai sc->irq_context[0].sc = sc; 1610d18d1b47SKashyap D Desai sc->irq_context[0].MSIxIndex = 0; 1611d18d1b47SKashyap D Desai sc->irq_id[0] = 0; 1612d18d1b47SKashyap D Desai sc->mrsas_irq[0] = bus_alloc_resource_any(sc->mrsas_dev, 1613d18d1b47SKashyap D Desai SYS_RES_IRQ, &sc->irq_id[0], RF_SHAREABLE | RF_ACTIVE); 1614d18d1b47SKashyap D Desai if (sc->mrsas_irq[0] == NULL) { 1615d18d1b47SKashyap D Desai device_printf(sc->mrsas_dev, "Cannot allocate legcay" 1616d18d1b47SKashyap D Desai "interrupt\n"); 1617d18d1b47SKashyap D Desai return (FAIL); 1618d18d1b47SKashyap D Desai } 1619d18d1b47SKashyap D Desai if (bus_setup_intr(sc->mrsas_dev, sc->mrsas_irq[0], 1620d18d1b47SKashyap D Desai INTR_MPSAFE | INTR_TYPE_CAM, NULL, mrsas_isr, 1621d18d1b47SKashyap D Desai &sc->irq_context[0], &sc->intr_handle[0])) { 1622d18d1b47SKashyap D Desai device_printf(sc->mrsas_dev, "Cannot set up legacy" 1623d18d1b47SKashyap D Desai "interrupt\n"); 1624d18d1b47SKashyap D Desai return (FAIL); 1625d18d1b47SKashyap D Desai } 1626d18d1b47SKashyap D Desai } 1627665484d8SDoug Ambrisko return (0); 1628665484d8SDoug Ambrisko } 1629665484d8SDoug Ambrisko 1630665484d8SDoug Ambrisko /* 1631665484d8SDoug Ambrisko * mrsas_isr: ISR entry point 1632665484d8SDoug Ambrisko * input: argument pointer 1633665484d8SDoug Ambrisko * 16348e727371SKashyap D Desai * This function is the interrupt service routine entry point. There are two 16358e727371SKashyap D Desai * types of interrupts, state change interrupt and response interrupt. If an 16368e727371SKashyap D Desai * interrupt is not ours, we just return. 1637665484d8SDoug Ambrisko */ 16388e727371SKashyap D Desai void 16398e727371SKashyap D Desai mrsas_isr(void *arg) 1640665484d8SDoug Ambrisko { 1641d18d1b47SKashyap D Desai struct mrsas_irq_context *irq_context = (struct mrsas_irq_context *)arg; 1642d18d1b47SKashyap D Desai struct mrsas_softc *sc = irq_context->sc; 1643d18d1b47SKashyap D Desai int status = 0; 1644665484d8SDoug Ambrisko 16452f863eb8SKashyap D Desai if (sc->mask_interrupts) 16462f863eb8SKashyap D Desai return; 16472f863eb8SKashyap D Desai 1648d18d1b47SKashyap D Desai if (!sc->msix_vectors) { 1649665484d8SDoug Ambrisko status = mrsas_clear_intr(sc); 1650665484d8SDoug Ambrisko if (!status) 1651665484d8SDoug Ambrisko return; 1652d18d1b47SKashyap D Desai } 1653665484d8SDoug Ambrisko /* If we are resetting, bail */ 1654f5fb2237SKashyap D Desai if (mrsas_test_bit(MRSAS_FUSION_IN_RESET, &sc->reset_flags)) { 1655665484d8SDoug Ambrisko printf(" Entered into ISR when OCR is going active. \n"); 1656665484d8SDoug Ambrisko mrsas_clear_intr(sc); 1657665484d8SDoug Ambrisko return; 1658665484d8SDoug Ambrisko } 1659665484d8SDoug Ambrisko /* Process for reply request and clear response interrupt */ 1660d18d1b47SKashyap D Desai if (mrsas_complete_cmd(sc, irq_context->MSIxIndex) != SUCCESS) 1661665484d8SDoug Ambrisko mrsas_clear_intr(sc); 1662665484d8SDoug Ambrisko 1663665484d8SDoug Ambrisko return; 1664665484d8SDoug Ambrisko } 1665665484d8SDoug Ambrisko 1666665484d8SDoug Ambrisko /* 1667665484d8SDoug Ambrisko * mrsas_complete_cmd: Process reply request 1668665484d8SDoug Ambrisko * input: Adapter instance soft state 1669665484d8SDoug Ambrisko * 16708e727371SKashyap D Desai * This function is called from mrsas_isr() to process reply request and clear 16718e727371SKashyap D Desai * response interrupt. Processing of the reply request entails walking 16728e727371SKashyap D Desai * through the reply descriptor array for the command request pended from 16738e727371SKashyap D Desai * Firmware. We look at the Function field to determine the command type and 16748e727371SKashyap D Desai * perform the appropriate action. Before we return, we clear the response 16758e727371SKashyap D Desai * interrupt. 1676665484d8SDoug Ambrisko */ 16774bb0a4f0SKashyap D Desai int 16788e727371SKashyap D Desai mrsas_complete_cmd(struct mrsas_softc *sc, u_int32_t MSIxIndex) 1679665484d8SDoug Ambrisko { 1680665484d8SDoug Ambrisko Mpi2ReplyDescriptorsUnion_t *desc; 1681665484d8SDoug Ambrisko MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR *reply_desc; 1682665484d8SDoug Ambrisko MRSAS_RAID_SCSI_IO_REQUEST *scsi_io_req; 16832a1d3bcdSKashyap D Desai struct mrsas_mpt_cmd *cmd_mpt, *r1_cmd = NULL; 1684665484d8SDoug Ambrisko struct mrsas_mfi_cmd *cmd_mfi; 16852a1d3bcdSKashyap D Desai u_int8_t reply_descript_type, *sense; 1686665484d8SDoug Ambrisko u_int16_t smid, num_completed; 1687665484d8SDoug Ambrisko u_int8_t status, extStatus; 1688665484d8SDoug Ambrisko union desc_value desc_val; 1689665484d8SDoug Ambrisko PLD_LOAD_BALANCE_INFO lbinfo; 16902a1d3bcdSKashyap D Desai u_int32_t device_id, data_length; 1691665484d8SDoug Ambrisko int threshold_reply_count = 0; 16928bb601acSKashyap D Desai #if TM_DEBUG 16938bb601acSKashyap D Desai MR_TASK_MANAGE_REQUEST *mr_tm_req; 16948bb601acSKashyap D Desai MPI2_SCSI_TASK_MANAGE_REQUEST *mpi_tm_req; 16958bb601acSKashyap D Desai #endif 1696665484d8SDoug Ambrisko 1697665484d8SDoug Ambrisko /* If we have a hardware error, not need to continue */ 1698665484d8SDoug Ambrisko if (sc->adprecovery == MRSAS_HW_CRITICAL_ERROR) 1699665484d8SDoug Ambrisko return (DONE); 1700665484d8SDoug Ambrisko 1701665484d8SDoug Ambrisko desc = sc->reply_desc_mem; 1702d18d1b47SKashyap D Desai desc += ((MSIxIndex * sc->reply_alloc_sz) / sizeof(MPI2_REPLY_DESCRIPTORS_UNION)) 1703d18d1b47SKashyap D Desai + sc->last_reply_idx[MSIxIndex]; 1704665484d8SDoug Ambrisko 1705665484d8SDoug Ambrisko reply_desc = (MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR *) desc; 1706665484d8SDoug Ambrisko 1707665484d8SDoug Ambrisko desc_val.word = desc->Words; 1708665484d8SDoug Ambrisko num_completed = 0; 1709665484d8SDoug Ambrisko 1710665484d8SDoug Ambrisko reply_descript_type = reply_desc->ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 1711665484d8SDoug Ambrisko 1712665484d8SDoug Ambrisko /* Find our reply descriptor for the command and process */ 17138e727371SKashyap D Desai while ((desc_val.u.low != 0xFFFFFFFF) && (desc_val.u.high != 0xFFFFFFFF)) { 1714665484d8SDoug Ambrisko smid = reply_desc->SMID; 1715665484d8SDoug Ambrisko cmd_mpt = sc->mpt_cmd_list[smid - 1]; 1716665484d8SDoug Ambrisko scsi_io_req = (MRSAS_RAID_SCSI_IO_REQUEST *) cmd_mpt->io_request; 1717665484d8SDoug Ambrisko 1718503c4f8dSKashyap D Desai status = scsi_io_req->RaidContext.raid_context.status; 1719503c4f8dSKashyap D Desai extStatus = scsi_io_req->RaidContext.raid_context.exStatus; 17202a1d3bcdSKashyap D Desai sense = cmd_mpt->sense; 17212a1d3bcdSKashyap D Desai data_length = scsi_io_req->DataLength; 1722665484d8SDoug Ambrisko 17238e727371SKashyap D Desai switch (scsi_io_req->Function) { 17248bb601acSKashyap D Desai case MPI2_FUNCTION_SCSI_TASK_MGMT: 17258bb601acSKashyap D Desai #if TM_DEBUG 17268bb601acSKashyap D Desai mr_tm_req = (MR_TASK_MANAGE_REQUEST *) cmd_mpt->io_request; 17278bb601acSKashyap D Desai mpi_tm_req = (MPI2_SCSI_TASK_MANAGE_REQUEST *) 17288bb601acSKashyap D Desai &mr_tm_req->TmRequest; 17298bb601acSKashyap D Desai device_printf(sc->mrsas_dev, "TM completion type 0x%X, " 17308bb601acSKashyap D Desai "TaskMID: 0x%X", mpi_tm_req->TaskType, mpi_tm_req->TaskMID); 17318bb601acSKashyap D Desai #endif 17328bb601acSKashyap D Desai wakeup_one((void *)&sc->ocr_chan); 17338bb601acSKashyap D Desai break; 1734665484d8SDoug Ambrisko case MPI2_FUNCTION_SCSI_IO_REQUEST: /* Fast Path IO. */ 1735665484d8SDoug Ambrisko device_id = cmd_mpt->ccb_ptr->ccb_h.target_id; 1736665484d8SDoug Ambrisko lbinfo = &sc->load_balance_info[device_id]; 17372a1d3bcdSKashyap D Desai /* R1 load balancing for READ */ 1738665484d8SDoug Ambrisko if (cmd_mpt->load_balance == MRSAS_LOAD_BALANCE_FLAG) { 173916dc2814SKashyap D Desai mrsas_atomic_dec(&lbinfo->scsi_pending_cmds[cmd_mpt->pd_r1_lb]); 1740665484d8SDoug Ambrisko cmd_mpt->load_balance &= ~MRSAS_LOAD_BALANCE_FLAG; 1741665484d8SDoug Ambrisko } 17428e727371SKashyap D Desai /* Fall thru and complete IO */ 1743665484d8SDoug Ambrisko case MRSAS_MPI2_FUNCTION_LD_IO_REQUEST: 17442a1d3bcdSKashyap D Desai if (cmd_mpt->r1_alt_dev_handle == MR_DEVHANDLE_INVALID) { 17452a1d3bcdSKashyap D Desai mrsas_map_mpt_cmd_status(cmd_mpt, cmd_mpt->ccb_ptr, status, 17462a1d3bcdSKashyap D Desai extStatus, data_length, sense); 1747665484d8SDoug Ambrisko mrsas_cmd_done(sc, cmd_mpt); 17485437c8b8SKashyap D Desai mrsas_atomic_dec(&sc->fw_outstanding); 17492a1d3bcdSKashyap D Desai } else { 17502a1d3bcdSKashyap D Desai /* 17512a1d3bcdSKashyap D Desai * If the peer Raid 1/10 fast path failed, 17522a1d3bcdSKashyap D Desai * mark IO as failed to the scsi layer. 17532a1d3bcdSKashyap D Desai * Overwrite the current status by the failed status 17542a1d3bcdSKashyap D Desai * and make sure that if any command fails, 17552a1d3bcdSKashyap D Desai * driver returns fail status to CAM. 17562a1d3bcdSKashyap D Desai */ 17572a1d3bcdSKashyap D Desai cmd_mpt->cmd_completed = 1; 17582a1d3bcdSKashyap D Desai r1_cmd = cmd_mpt->peer_cmd; 17592a1d3bcdSKashyap D Desai if (r1_cmd->cmd_completed) { 17602a1d3bcdSKashyap D Desai if (r1_cmd->io_request->RaidContext.raid_context.status != MFI_STAT_OK) { 17612a1d3bcdSKashyap D Desai status = r1_cmd->io_request->RaidContext.raid_context.status; 17622a1d3bcdSKashyap D Desai extStatus = r1_cmd->io_request->RaidContext.raid_context.exStatus; 17632a1d3bcdSKashyap D Desai data_length = r1_cmd->io_request->DataLength; 17642a1d3bcdSKashyap D Desai sense = r1_cmd->sense; 17652a1d3bcdSKashyap D Desai } 17662a1d3bcdSKashyap D Desai r1_cmd->ccb_ptr = NULL; 17672a1d3bcdSKashyap D Desai if (r1_cmd->callout_owner) { 17682a1d3bcdSKashyap D Desai callout_stop(&r1_cmd->cm_callout); 17692a1d3bcdSKashyap D Desai r1_cmd->callout_owner = false; 17702a1d3bcdSKashyap D Desai } 17712a1d3bcdSKashyap D Desai mrsas_release_mpt_cmd(r1_cmd); 17725437c8b8SKashyap D Desai mrsas_atomic_dec(&sc->fw_outstanding); 17732a1d3bcdSKashyap D Desai mrsas_map_mpt_cmd_status(cmd_mpt, cmd_mpt->ccb_ptr, status, 17742a1d3bcdSKashyap D Desai extStatus, data_length, sense); 17752a1d3bcdSKashyap D Desai mrsas_cmd_done(sc, cmd_mpt); 1776f5fb2237SKashyap D Desai mrsas_atomic_dec(&sc->fw_outstanding); 17775437c8b8SKashyap D Desai } 17785437c8b8SKashyap D Desai } 1779665484d8SDoug Ambrisko break; 1780665484d8SDoug Ambrisko case MRSAS_MPI2_FUNCTION_PASSTHRU_IO_REQUEST: /* MFI command */ 1781665484d8SDoug Ambrisko cmd_mfi = sc->mfi_cmd_list[cmd_mpt->sync_cmd_idx]; 1782731b7561SKashyap D Desai /* 1783731b7561SKashyap D Desai * Make sure NOT TO release the mfi command from the called 1784731b7561SKashyap D Desai * function's context if it is fired with issue_polled call. 1785731b7561SKashyap D Desai * And also make sure that the issue_polled call should only be 1786731b7561SKashyap D Desai * used if INTERRUPT IS DISABLED. 1787731b7561SKashyap D Desai */ 1788731b7561SKashyap D Desai if (cmd_mfi->frame->hdr.flags & MFI_FRAME_DONT_POST_IN_REPLY_QUEUE) 1789731b7561SKashyap D Desai mrsas_release_mfi_cmd(cmd_mfi); 1790731b7561SKashyap D Desai else 1791665484d8SDoug Ambrisko mrsas_complete_mptmfi_passthru(sc, cmd_mfi, status); 1792665484d8SDoug Ambrisko break; 1793665484d8SDoug Ambrisko } 1794665484d8SDoug Ambrisko 1795d18d1b47SKashyap D Desai sc->last_reply_idx[MSIxIndex]++; 1796d18d1b47SKashyap D Desai if (sc->last_reply_idx[MSIxIndex] >= sc->reply_q_depth) 1797d18d1b47SKashyap D Desai sc->last_reply_idx[MSIxIndex] = 0; 1798665484d8SDoug Ambrisko 17998e727371SKashyap D Desai desc->Words = ~((uint64_t)0x00); /* set it back to all 18008e727371SKashyap D Desai * 0xFFFFFFFFs */ 1801665484d8SDoug Ambrisko num_completed++; 1802665484d8SDoug Ambrisko threshold_reply_count++; 1803665484d8SDoug Ambrisko 1804665484d8SDoug Ambrisko /* Get the next reply descriptor */ 1805d18d1b47SKashyap D Desai if (!sc->last_reply_idx[MSIxIndex]) { 1806665484d8SDoug Ambrisko desc = sc->reply_desc_mem; 1807d18d1b47SKashyap D Desai desc += ((MSIxIndex * sc->reply_alloc_sz) / sizeof(MPI2_REPLY_DESCRIPTORS_UNION)); 1808d18d1b47SKashyap D Desai } else 1809665484d8SDoug Ambrisko desc++; 1810665484d8SDoug Ambrisko 1811665484d8SDoug Ambrisko reply_desc = (MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR *) desc; 1812665484d8SDoug Ambrisko desc_val.word = desc->Words; 1813665484d8SDoug Ambrisko 1814665484d8SDoug Ambrisko reply_descript_type = reply_desc->ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 1815665484d8SDoug Ambrisko 1816665484d8SDoug Ambrisko if (reply_descript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 1817665484d8SDoug Ambrisko break; 1818665484d8SDoug Ambrisko 1819665484d8SDoug Ambrisko /* 18208e727371SKashyap D Desai * Write to reply post index after completing threshold reply 18218e727371SKashyap D Desai * count and still there are more replies in reply queue 18228e727371SKashyap D Desai * pending to be completed. 1823665484d8SDoug Ambrisko */ 1824665484d8SDoug Ambrisko if (threshold_reply_count >= THRESHOLD_REPLY_COUNT) { 1825d18d1b47SKashyap D Desai if (sc->msix_enable) { 18267aade8bfSKashyap D Desai if (sc->msix_combined) 1827d18d1b47SKashyap D Desai mrsas_write_reg(sc, sc->msix_reg_offset[MSIxIndex / 8], 1828d18d1b47SKashyap D Desai ((MSIxIndex & 0x7) << 24) | 1829d18d1b47SKashyap D Desai sc->last_reply_idx[MSIxIndex]); 1830d18d1b47SKashyap D Desai else 1831d18d1b47SKashyap D Desai mrsas_write_reg(sc, sc->msix_reg_offset[0], (MSIxIndex << 24) | 1832d18d1b47SKashyap D Desai sc->last_reply_idx[MSIxIndex]); 1833d18d1b47SKashyap D Desai } else 1834d18d1b47SKashyap D Desai mrsas_write_reg(sc, offsetof(mrsas_reg_set, 1835d18d1b47SKashyap D Desai reply_post_host_index), sc->last_reply_idx[0]); 1836d18d1b47SKashyap D Desai 1837665484d8SDoug Ambrisko threshold_reply_count = 0; 1838665484d8SDoug Ambrisko } 1839665484d8SDoug Ambrisko } 1840665484d8SDoug Ambrisko 1841665484d8SDoug Ambrisko /* No match, just return */ 1842665484d8SDoug Ambrisko if (num_completed == 0) 1843665484d8SDoug Ambrisko return (DONE); 1844665484d8SDoug Ambrisko 1845665484d8SDoug Ambrisko /* Clear response interrupt */ 1846d18d1b47SKashyap D Desai if (sc->msix_enable) { 18477aade8bfSKashyap D Desai if (sc->msix_combined) { 1848d18d1b47SKashyap D Desai mrsas_write_reg(sc, sc->msix_reg_offset[MSIxIndex / 8], 1849d18d1b47SKashyap D Desai ((MSIxIndex & 0x7) << 24) | 1850d18d1b47SKashyap D Desai sc->last_reply_idx[MSIxIndex]); 1851d18d1b47SKashyap D Desai } else 1852d18d1b47SKashyap D Desai mrsas_write_reg(sc, sc->msix_reg_offset[0], (MSIxIndex << 24) | 1853d18d1b47SKashyap D Desai sc->last_reply_idx[MSIxIndex]); 1854d18d1b47SKashyap D Desai } else 1855d18d1b47SKashyap D Desai mrsas_write_reg(sc, offsetof(mrsas_reg_set, 1856d18d1b47SKashyap D Desai reply_post_host_index), sc->last_reply_idx[0]); 1857665484d8SDoug Ambrisko 1858665484d8SDoug Ambrisko return (0); 1859665484d8SDoug Ambrisko } 1860665484d8SDoug Ambrisko 1861665484d8SDoug Ambrisko /* 1862665484d8SDoug Ambrisko * mrsas_map_mpt_cmd_status: Allocate DMAable memory. 1863665484d8SDoug Ambrisko * input: Adapter instance soft state 1864665484d8SDoug Ambrisko * 1865665484d8SDoug Ambrisko * This function is called from mrsas_complete_cmd(), for LD IO and FastPath IO. 18668e727371SKashyap D Desai * It checks the command status and maps the appropriate CAM status for the 18678e727371SKashyap D Desai * CCB. 1868665484d8SDoug Ambrisko */ 18698e727371SKashyap D Desai void 18702a1d3bcdSKashyap D Desai mrsas_map_mpt_cmd_status(struct mrsas_mpt_cmd *cmd, union ccb *ccb_ptr, u_int8_t status, 18712a1d3bcdSKashyap D Desai u_int8_t extStatus, u_int32_t data_length, u_int8_t *sense) 1872665484d8SDoug Ambrisko { 1873665484d8SDoug Ambrisko struct mrsas_softc *sc = cmd->sc; 1874665484d8SDoug Ambrisko u_int8_t *sense_data; 1875665484d8SDoug Ambrisko 1876665484d8SDoug Ambrisko switch (status) { 1877665484d8SDoug Ambrisko case MFI_STAT_OK: 18782a1d3bcdSKashyap D Desai ccb_ptr->ccb_h.status = CAM_REQ_CMP; 1879665484d8SDoug Ambrisko break; 1880665484d8SDoug Ambrisko case MFI_STAT_SCSI_IO_FAILED: 1881665484d8SDoug Ambrisko case MFI_STAT_SCSI_DONE_WITH_ERROR: 18822a1d3bcdSKashyap D Desai ccb_ptr->ccb_h.status = CAM_SCSI_STATUS_ERROR; 18832a1d3bcdSKashyap D Desai sense_data = (u_int8_t *)&ccb_ptr->csio.sense_data; 1884665484d8SDoug Ambrisko if (sense_data) { 1885665484d8SDoug Ambrisko /* For now just copy 18 bytes back */ 18862a1d3bcdSKashyap D Desai memcpy(sense_data, sense, 18); 18872a1d3bcdSKashyap D Desai ccb_ptr->csio.sense_len = 18; 18882a1d3bcdSKashyap D Desai ccb_ptr->ccb_h.status |= CAM_AUTOSNS_VALID; 1889665484d8SDoug Ambrisko } 1890665484d8SDoug Ambrisko break; 1891665484d8SDoug Ambrisko case MFI_STAT_LD_OFFLINE: 1892665484d8SDoug Ambrisko case MFI_STAT_DEVICE_NOT_FOUND: 18932a1d3bcdSKashyap D Desai if (ccb_ptr->ccb_h.target_lun) 18942a1d3bcdSKashyap D Desai ccb_ptr->ccb_h.status |= CAM_LUN_INVALID; 1895665484d8SDoug Ambrisko else 18962a1d3bcdSKashyap D Desai ccb_ptr->ccb_h.status |= CAM_DEV_NOT_THERE; 1897665484d8SDoug Ambrisko break; 1898665484d8SDoug Ambrisko case MFI_STAT_CONFIG_SEQ_MISMATCH: 18992a1d3bcdSKashyap D Desai ccb_ptr->ccb_h.status |= CAM_REQUEUE_REQ; 1900665484d8SDoug Ambrisko break; 1901665484d8SDoug Ambrisko default: 1902665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "FW cmd complete status %x\n", status); 19032a1d3bcdSKashyap D Desai ccb_ptr->ccb_h.status = CAM_REQ_CMP_ERR; 19042a1d3bcdSKashyap D Desai ccb_ptr->csio.scsi_status = status; 1905665484d8SDoug Ambrisko } 1906665484d8SDoug Ambrisko return; 1907665484d8SDoug Ambrisko } 1908665484d8SDoug Ambrisko 1909665484d8SDoug Ambrisko /* 19108e727371SKashyap D Desai * mrsas_alloc_mem: Allocate DMAable memory 1911665484d8SDoug Ambrisko * input: Adapter instance soft state 1912665484d8SDoug Ambrisko * 19138e727371SKashyap D Desai * This function creates the parent DMA tag and allocates DMAable memory. DMA 19148e727371SKashyap D Desai * tag describes constraints of DMA mapping. Memory allocated is mapped into 19158e727371SKashyap D Desai * Kernel virtual address. Callback argument is physical memory address. 1916665484d8SDoug Ambrisko */ 19178e727371SKashyap D Desai static int 19188e727371SKashyap D Desai mrsas_alloc_mem(struct mrsas_softc *sc) 1919665484d8SDoug Ambrisko { 19204ad83576SKashyap D Desai u_int32_t verbuf_size, io_req_size, reply_desc_size, sense_size, chain_frame_size, 192179b4460bSKashyap D Desai evt_detail_size, count, pd_info_size; 1922665484d8SDoug Ambrisko 1923665484d8SDoug Ambrisko /* 1924665484d8SDoug Ambrisko * Allocate parent DMA tag 1925665484d8SDoug Ambrisko */ 1926665484d8SDoug Ambrisko if (bus_dma_tag_create(NULL, /* parent */ 1927665484d8SDoug Ambrisko 1, /* alignment */ 1928665484d8SDoug Ambrisko 0, /* boundary */ 1929665484d8SDoug Ambrisko BUS_SPACE_MAXADDR, /* lowaddr */ 1930665484d8SDoug Ambrisko BUS_SPACE_MAXADDR, /* highaddr */ 1931665484d8SDoug Ambrisko NULL, NULL, /* filter, filterarg */ 19323a3fc6cbSKashyap D Desai MAXPHYS, /* maxsize */ 19333a3fc6cbSKashyap D Desai sc->max_num_sge, /* nsegments */ 19343a3fc6cbSKashyap D Desai MAXPHYS, /* maxsegsize */ 1935665484d8SDoug Ambrisko 0, /* flags */ 1936665484d8SDoug Ambrisko NULL, NULL, /* lockfunc, lockarg */ 1937665484d8SDoug Ambrisko &sc->mrsas_parent_tag /* tag */ 1938665484d8SDoug Ambrisko )) { 1939665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot allocate parent DMA tag\n"); 1940665484d8SDoug Ambrisko return (ENOMEM); 1941665484d8SDoug Ambrisko } 1942665484d8SDoug Ambrisko /* 1943665484d8SDoug Ambrisko * Allocate for version buffer 1944665484d8SDoug Ambrisko */ 1945665484d8SDoug Ambrisko verbuf_size = MRSAS_MAX_NAME_LENGTH * (sizeof(bus_addr_t)); 19468e727371SKashyap D Desai if (bus_dma_tag_create(sc->mrsas_parent_tag, 19478e727371SKashyap D Desai 1, 0, 19488e727371SKashyap D Desai BUS_SPACE_MAXADDR_32BIT, 19498e727371SKashyap D Desai BUS_SPACE_MAXADDR, 19508e727371SKashyap D Desai NULL, NULL, 19518e727371SKashyap D Desai verbuf_size, 19528e727371SKashyap D Desai 1, 19538e727371SKashyap D Desai verbuf_size, 19548e727371SKashyap D Desai BUS_DMA_ALLOCNOW, 19558e727371SKashyap D Desai NULL, NULL, 1956665484d8SDoug Ambrisko &sc->verbuf_tag)) { 1957665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot allocate verbuf DMA tag\n"); 1958665484d8SDoug Ambrisko return (ENOMEM); 1959665484d8SDoug Ambrisko } 1960665484d8SDoug Ambrisko if (bus_dmamem_alloc(sc->verbuf_tag, (void **)&sc->verbuf_mem, 1961665484d8SDoug Ambrisko BUS_DMA_NOWAIT, &sc->verbuf_dmamap)) { 1962665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot allocate verbuf memory\n"); 1963665484d8SDoug Ambrisko return (ENOMEM); 1964665484d8SDoug Ambrisko } 1965665484d8SDoug Ambrisko bzero(sc->verbuf_mem, verbuf_size); 1966665484d8SDoug Ambrisko if (bus_dmamap_load(sc->verbuf_tag, sc->verbuf_dmamap, sc->verbuf_mem, 19678e727371SKashyap D Desai verbuf_size, mrsas_addr_cb, &sc->verbuf_phys_addr, 19688e727371SKashyap D Desai BUS_DMA_NOWAIT)) { 1969665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot load verbuf DMA map\n"); 1970665484d8SDoug Ambrisko return (ENOMEM); 1971665484d8SDoug Ambrisko } 1972665484d8SDoug Ambrisko /* 1973665484d8SDoug Ambrisko * Allocate IO Request Frames 1974665484d8SDoug Ambrisko */ 1975665484d8SDoug Ambrisko io_req_size = sc->io_frames_alloc_sz; 19768e727371SKashyap D Desai if (bus_dma_tag_create(sc->mrsas_parent_tag, 19778e727371SKashyap D Desai 16, 0, 19788e727371SKashyap D Desai BUS_SPACE_MAXADDR_32BIT, 19798e727371SKashyap D Desai BUS_SPACE_MAXADDR, 19808e727371SKashyap D Desai NULL, NULL, 19818e727371SKashyap D Desai io_req_size, 19828e727371SKashyap D Desai 1, 19838e727371SKashyap D Desai io_req_size, 19848e727371SKashyap D Desai BUS_DMA_ALLOCNOW, 19858e727371SKashyap D Desai NULL, NULL, 1986665484d8SDoug Ambrisko &sc->io_request_tag)) { 1987665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot create IO request tag\n"); 1988665484d8SDoug Ambrisko return (ENOMEM); 1989665484d8SDoug Ambrisko } 1990665484d8SDoug Ambrisko if (bus_dmamem_alloc(sc->io_request_tag, (void **)&sc->io_request_mem, 1991665484d8SDoug Ambrisko BUS_DMA_NOWAIT, &sc->io_request_dmamap)) { 1992665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot alloc IO request memory\n"); 1993665484d8SDoug Ambrisko return (ENOMEM); 1994665484d8SDoug Ambrisko } 1995665484d8SDoug Ambrisko bzero(sc->io_request_mem, io_req_size); 1996665484d8SDoug Ambrisko if (bus_dmamap_load(sc->io_request_tag, sc->io_request_dmamap, 1997665484d8SDoug Ambrisko sc->io_request_mem, io_req_size, mrsas_addr_cb, 1998665484d8SDoug Ambrisko &sc->io_request_phys_addr, BUS_DMA_NOWAIT)) { 1999665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot load IO request memory\n"); 2000665484d8SDoug Ambrisko return (ENOMEM); 2001665484d8SDoug Ambrisko } 2002665484d8SDoug Ambrisko /* 2003665484d8SDoug Ambrisko * Allocate Chain Frames 2004665484d8SDoug Ambrisko */ 2005665484d8SDoug Ambrisko chain_frame_size = sc->chain_frames_alloc_sz; 20068e727371SKashyap D Desai if (bus_dma_tag_create(sc->mrsas_parent_tag, 20078e727371SKashyap D Desai 4, 0, 20088e727371SKashyap D Desai BUS_SPACE_MAXADDR_32BIT, 20098e727371SKashyap D Desai BUS_SPACE_MAXADDR, 20108e727371SKashyap D Desai NULL, NULL, 20118e727371SKashyap D Desai chain_frame_size, 20128e727371SKashyap D Desai 1, 20138e727371SKashyap D Desai chain_frame_size, 20148e727371SKashyap D Desai BUS_DMA_ALLOCNOW, 20158e727371SKashyap D Desai NULL, NULL, 2016665484d8SDoug Ambrisko &sc->chain_frame_tag)) { 2017665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot create chain frame tag\n"); 2018665484d8SDoug Ambrisko return (ENOMEM); 2019665484d8SDoug Ambrisko } 2020665484d8SDoug Ambrisko if (bus_dmamem_alloc(sc->chain_frame_tag, (void **)&sc->chain_frame_mem, 2021665484d8SDoug Ambrisko BUS_DMA_NOWAIT, &sc->chain_frame_dmamap)) { 2022665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot alloc chain frame memory\n"); 2023665484d8SDoug Ambrisko return (ENOMEM); 2024665484d8SDoug Ambrisko } 2025665484d8SDoug Ambrisko bzero(sc->chain_frame_mem, chain_frame_size); 2026665484d8SDoug Ambrisko if (bus_dmamap_load(sc->chain_frame_tag, sc->chain_frame_dmamap, 2027665484d8SDoug Ambrisko sc->chain_frame_mem, chain_frame_size, mrsas_addr_cb, 2028665484d8SDoug Ambrisko &sc->chain_frame_phys_addr, BUS_DMA_NOWAIT)) { 2029665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot load chain frame memory\n"); 2030665484d8SDoug Ambrisko return (ENOMEM); 2031665484d8SDoug Ambrisko } 2032d18d1b47SKashyap D Desai count = sc->msix_vectors > 0 ? sc->msix_vectors : 1; 2033665484d8SDoug Ambrisko /* 2034665484d8SDoug Ambrisko * Allocate Reply Descriptor Array 2035665484d8SDoug Ambrisko */ 2036d18d1b47SKashyap D Desai reply_desc_size = sc->reply_alloc_sz * count; 20378e727371SKashyap D Desai if (bus_dma_tag_create(sc->mrsas_parent_tag, 20388e727371SKashyap D Desai 16, 0, 20398e727371SKashyap D Desai BUS_SPACE_MAXADDR_32BIT, 20408e727371SKashyap D Desai BUS_SPACE_MAXADDR, 20418e727371SKashyap D Desai NULL, NULL, 20428e727371SKashyap D Desai reply_desc_size, 20438e727371SKashyap D Desai 1, 20448e727371SKashyap D Desai reply_desc_size, 20458e727371SKashyap D Desai BUS_DMA_ALLOCNOW, 20468e727371SKashyap D Desai NULL, NULL, 2047665484d8SDoug Ambrisko &sc->reply_desc_tag)) { 2048665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot create reply descriptor tag\n"); 2049665484d8SDoug Ambrisko return (ENOMEM); 2050665484d8SDoug Ambrisko } 2051665484d8SDoug Ambrisko if (bus_dmamem_alloc(sc->reply_desc_tag, (void **)&sc->reply_desc_mem, 2052665484d8SDoug Ambrisko BUS_DMA_NOWAIT, &sc->reply_desc_dmamap)) { 2053665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot alloc reply descriptor memory\n"); 2054665484d8SDoug Ambrisko return (ENOMEM); 2055665484d8SDoug Ambrisko } 2056665484d8SDoug Ambrisko if (bus_dmamap_load(sc->reply_desc_tag, sc->reply_desc_dmamap, 2057665484d8SDoug Ambrisko sc->reply_desc_mem, reply_desc_size, mrsas_addr_cb, 2058665484d8SDoug Ambrisko &sc->reply_desc_phys_addr, BUS_DMA_NOWAIT)) { 2059665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot load reply descriptor memory\n"); 2060665484d8SDoug Ambrisko return (ENOMEM); 2061665484d8SDoug Ambrisko } 2062665484d8SDoug Ambrisko /* 2063665484d8SDoug Ambrisko * Allocate Sense Buffer Array. Keep in lower 4GB 2064665484d8SDoug Ambrisko */ 2065665484d8SDoug Ambrisko sense_size = sc->max_fw_cmds * MRSAS_SENSE_LEN; 20668e727371SKashyap D Desai if (bus_dma_tag_create(sc->mrsas_parent_tag, 20678e727371SKashyap D Desai 64, 0, 20688e727371SKashyap D Desai BUS_SPACE_MAXADDR_32BIT, 20698e727371SKashyap D Desai BUS_SPACE_MAXADDR, 20708e727371SKashyap D Desai NULL, NULL, 20718e727371SKashyap D Desai sense_size, 20728e727371SKashyap D Desai 1, 20738e727371SKashyap D Desai sense_size, 20748e727371SKashyap D Desai BUS_DMA_ALLOCNOW, 20758e727371SKashyap D Desai NULL, NULL, 2076665484d8SDoug Ambrisko &sc->sense_tag)) { 2077665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot allocate sense buf tag\n"); 2078665484d8SDoug Ambrisko return (ENOMEM); 2079665484d8SDoug Ambrisko } 2080665484d8SDoug Ambrisko if (bus_dmamem_alloc(sc->sense_tag, (void **)&sc->sense_mem, 2081665484d8SDoug Ambrisko BUS_DMA_NOWAIT, &sc->sense_dmamap)) { 2082665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot allocate sense buf memory\n"); 2083665484d8SDoug Ambrisko return (ENOMEM); 2084665484d8SDoug Ambrisko } 2085665484d8SDoug Ambrisko if (bus_dmamap_load(sc->sense_tag, sc->sense_dmamap, 2086665484d8SDoug Ambrisko sc->sense_mem, sense_size, mrsas_addr_cb, &sc->sense_phys_addr, 2087665484d8SDoug Ambrisko BUS_DMA_NOWAIT)) { 2088665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot load sense buf memory\n"); 2089665484d8SDoug Ambrisko return (ENOMEM); 2090665484d8SDoug Ambrisko } 20912a1d3bcdSKashyap D Desai 2092665484d8SDoug Ambrisko /* 2093665484d8SDoug Ambrisko * Allocate for Event detail structure 2094665484d8SDoug Ambrisko */ 2095665484d8SDoug Ambrisko evt_detail_size = sizeof(struct mrsas_evt_detail); 20968e727371SKashyap D Desai if (bus_dma_tag_create(sc->mrsas_parent_tag, 20978e727371SKashyap D Desai 1, 0, 20988e727371SKashyap D Desai BUS_SPACE_MAXADDR_32BIT, 20998e727371SKashyap D Desai BUS_SPACE_MAXADDR, 21008e727371SKashyap D Desai NULL, NULL, 21018e727371SKashyap D Desai evt_detail_size, 21028e727371SKashyap D Desai 1, 21038e727371SKashyap D Desai evt_detail_size, 21048e727371SKashyap D Desai BUS_DMA_ALLOCNOW, 21058e727371SKashyap D Desai NULL, NULL, 2106665484d8SDoug Ambrisko &sc->evt_detail_tag)) { 2107665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot create Event detail tag\n"); 2108665484d8SDoug Ambrisko return (ENOMEM); 2109665484d8SDoug Ambrisko } 2110665484d8SDoug Ambrisko if (bus_dmamem_alloc(sc->evt_detail_tag, (void **)&sc->evt_detail_mem, 2111665484d8SDoug Ambrisko BUS_DMA_NOWAIT, &sc->evt_detail_dmamap)) { 2112665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot alloc Event detail buffer memory\n"); 2113665484d8SDoug Ambrisko return (ENOMEM); 2114665484d8SDoug Ambrisko } 2115665484d8SDoug Ambrisko bzero(sc->evt_detail_mem, evt_detail_size); 2116665484d8SDoug Ambrisko if (bus_dmamap_load(sc->evt_detail_tag, sc->evt_detail_dmamap, 2117665484d8SDoug Ambrisko sc->evt_detail_mem, evt_detail_size, mrsas_addr_cb, 2118665484d8SDoug Ambrisko &sc->evt_detail_phys_addr, BUS_DMA_NOWAIT)) { 2119665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot load Event detail buffer memory\n"); 2120665484d8SDoug Ambrisko return (ENOMEM); 2121665484d8SDoug Ambrisko } 212279b4460bSKashyap D Desai 212379b4460bSKashyap D Desai /* 212479b4460bSKashyap D Desai * Allocate for PD INFO structure 212579b4460bSKashyap D Desai */ 212679b4460bSKashyap D Desai pd_info_size = sizeof(struct mrsas_pd_info); 212779b4460bSKashyap D Desai if (bus_dma_tag_create(sc->mrsas_parent_tag, 212879b4460bSKashyap D Desai 1, 0, 212979b4460bSKashyap D Desai BUS_SPACE_MAXADDR_32BIT, 213079b4460bSKashyap D Desai BUS_SPACE_MAXADDR, 213179b4460bSKashyap D Desai NULL, NULL, 213279b4460bSKashyap D Desai pd_info_size, 213379b4460bSKashyap D Desai 1, 213479b4460bSKashyap D Desai pd_info_size, 213579b4460bSKashyap D Desai BUS_DMA_ALLOCNOW, 213679b4460bSKashyap D Desai NULL, NULL, 213779b4460bSKashyap D Desai &sc->pd_info_tag)) { 213879b4460bSKashyap D Desai device_printf(sc->mrsas_dev, "Cannot create PD INFO tag\n"); 213979b4460bSKashyap D Desai return (ENOMEM); 214079b4460bSKashyap D Desai } 214179b4460bSKashyap D Desai if (bus_dmamem_alloc(sc->pd_info_tag, (void **)&sc->pd_info_mem, 214279b4460bSKashyap D Desai BUS_DMA_NOWAIT, &sc->pd_info_dmamap)) { 214379b4460bSKashyap D Desai device_printf(sc->mrsas_dev, "Cannot alloc PD INFO buffer memory\n"); 214479b4460bSKashyap D Desai return (ENOMEM); 214579b4460bSKashyap D Desai } 214679b4460bSKashyap D Desai bzero(sc->pd_info_mem, pd_info_size); 214779b4460bSKashyap D Desai if (bus_dmamap_load(sc->pd_info_tag, sc->pd_info_dmamap, 214879b4460bSKashyap D Desai sc->pd_info_mem, pd_info_size, mrsas_addr_cb, 214979b4460bSKashyap D Desai &sc->pd_info_phys_addr, BUS_DMA_NOWAIT)) { 215079b4460bSKashyap D Desai device_printf(sc->mrsas_dev, "Cannot load PD INFO buffer memory\n"); 215179b4460bSKashyap D Desai return (ENOMEM); 215279b4460bSKashyap D Desai } 215379b4460bSKashyap D Desai 2154665484d8SDoug Ambrisko /* 2155665484d8SDoug Ambrisko * Create a dma tag for data buffers; size will be the maximum 2156665484d8SDoug Ambrisko * possible I/O size (280kB). 2157665484d8SDoug Ambrisko */ 21588e727371SKashyap D Desai if (bus_dma_tag_create(sc->mrsas_parent_tag, 21598e727371SKashyap D Desai 1, 21608e727371SKashyap D Desai 0, 21618e727371SKashyap D Desai BUS_SPACE_MAXADDR, 21628e727371SKashyap D Desai BUS_SPACE_MAXADDR, 21638e727371SKashyap D Desai NULL, NULL, 21643a3fc6cbSKashyap D Desai MAXPHYS, 21653a3fc6cbSKashyap D Desai sc->max_num_sge, /* nsegments */ 21663a3fc6cbSKashyap D Desai MAXPHYS, 21678e727371SKashyap D Desai BUS_DMA_ALLOCNOW, 21688e727371SKashyap D Desai busdma_lock_mutex, 21698e727371SKashyap D Desai &sc->io_lock, 2170665484d8SDoug Ambrisko &sc->data_tag)) { 2171665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot create data dma tag\n"); 2172665484d8SDoug Ambrisko return (ENOMEM); 2173665484d8SDoug Ambrisko } 2174665484d8SDoug Ambrisko return (0); 2175665484d8SDoug Ambrisko } 2176665484d8SDoug Ambrisko 2177665484d8SDoug Ambrisko /* 2178665484d8SDoug Ambrisko * mrsas_addr_cb: Callback function of bus_dmamap_load() 21798e727371SKashyap D Desai * input: callback argument, machine dependent type 21808e727371SKashyap D Desai * that describes DMA segments, number of segments, error code 2181665484d8SDoug Ambrisko * 21828e727371SKashyap D Desai * This function is for the driver to receive mapping information resultant of 21838e727371SKashyap D Desai * the bus_dmamap_load(). The information is actually not being used, but the 21848e727371SKashyap D Desai * address is saved anyway. 2185665484d8SDoug Ambrisko */ 2186665484d8SDoug Ambrisko void 2187665484d8SDoug Ambrisko mrsas_addr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 2188665484d8SDoug Ambrisko { 2189665484d8SDoug Ambrisko bus_addr_t *addr; 2190665484d8SDoug Ambrisko 2191665484d8SDoug Ambrisko addr = arg; 2192665484d8SDoug Ambrisko *addr = segs[0].ds_addr; 2193665484d8SDoug Ambrisko } 2194665484d8SDoug Ambrisko 2195665484d8SDoug Ambrisko /* 2196665484d8SDoug Ambrisko * mrsas_setup_raidmap: Set up RAID map. 2197665484d8SDoug Ambrisko * input: Adapter instance soft state 2198665484d8SDoug Ambrisko * 2199665484d8SDoug Ambrisko * Allocate DMA memory for the RAID maps and perform setup. 2200665484d8SDoug Ambrisko */ 22018e727371SKashyap D Desai static int 22028e727371SKashyap D Desai mrsas_setup_raidmap(struct mrsas_softc *sc) 2203665484d8SDoug Ambrisko { 22044799d485SKashyap D Desai int i; 22054799d485SKashyap D Desai 22064799d485SKashyap D Desai for (i = 0; i < 2; i++) { 22074799d485SKashyap D Desai sc->ld_drv_map[i] = 22084799d485SKashyap D Desai (void *)malloc(sc->drv_map_sz, M_MRSAS, M_NOWAIT); 22094799d485SKashyap D Desai /* Do Error handling */ 22104799d485SKashyap D Desai if (!sc->ld_drv_map[i]) { 22114799d485SKashyap D Desai device_printf(sc->mrsas_dev, "Could not allocate memory for local map"); 22124799d485SKashyap D Desai 22134799d485SKashyap D Desai if (i == 1) 22144799d485SKashyap D Desai free(sc->ld_drv_map[0], M_MRSAS); 22158e727371SKashyap D Desai /* ABORT driver initialization */ 22164799d485SKashyap D Desai goto ABORT; 22174799d485SKashyap D Desai } 22184799d485SKashyap D Desai } 22194799d485SKashyap D Desai 22208e727371SKashyap D Desai for (int i = 0; i < 2; i++) { 22218e727371SKashyap D Desai if (bus_dma_tag_create(sc->mrsas_parent_tag, 22228e727371SKashyap D Desai 4, 0, 22238e727371SKashyap D Desai BUS_SPACE_MAXADDR_32BIT, 22248e727371SKashyap D Desai BUS_SPACE_MAXADDR, 22258e727371SKashyap D Desai NULL, NULL, 22268e727371SKashyap D Desai sc->max_map_sz, 22278e727371SKashyap D Desai 1, 22288e727371SKashyap D Desai sc->max_map_sz, 22298e727371SKashyap D Desai BUS_DMA_ALLOCNOW, 22308e727371SKashyap D Desai NULL, NULL, 2231665484d8SDoug Ambrisko &sc->raidmap_tag[i])) { 22324799d485SKashyap D Desai device_printf(sc->mrsas_dev, 22334799d485SKashyap D Desai "Cannot allocate raid map tag.\n"); 2234665484d8SDoug Ambrisko return (ENOMEM); 2235665484d8SDoug Ambrisko } 22364799d485SKashyap D Desai if (bus_dmamem_alloc(sc->raidmap_tag[i], 22374799d485SKashyap D Desai (void **)&sc->raidmap_mem[i], 2238665484d8SDoug Ambrisko BUS_DMA_NOWAIT, &sc->raidmap_dmamap[i])) { 22394799d485SKashyap D Desai device_printf(sc->mrsas_dev, 22404799d485SKashyap D Desai "Cannot allocate raidmap memory.\n"); 2241665484d8SDoug Ambrisko return (ENOMEM); 2242665484d8SDoug Ambrisko } 22434799d485SKashyap D Desai bzero(sc->raidmap_mem[i], sc->max_map_sz); 22444799d485SKashyap D Desai 2245665484d8SDoug Ambrisko if (bus_dmamap_load(sc->raidmap_tag[i], sc->raidmap_dmamap[i], 22464799d485SKashyap D Desai sc->raidmap_mem[i], sc->max_map_sz, 22474799d485SKashyap D Desai mrsas_addr_cb, &sc->raidmap_phys_addr[i], 2248665484d8SDoug Ambrisko BUS_DMA_NOWAIT)) { 2249665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot load raidmap memory.\n"); 2250665484d8SDoug Ambrisko return (ENOMEM); 2251665484d8SDoug Ambrisko } 2252665484d8SDoug Ambrisko if (!sc->raidmap_mem[i]) { 22534799d485SKashyap D Desai device_printf(sc->mrsas_dev, 22544799d485SKashyap D Desai "Cannot allocate memory for raid map.\n"); 2255665484d8SDoug Ambrisko return (ENOMEM); 2256665484d8SDoug Ambrisko } 2257665484d8SDoug Ambrisko } 2258665484d8SDoug Ambrisko 2259665484d8SDoug Ambrisko if (!mrsas_get_map_info(sc)) 2260665484d8SDoug Ambrisko mrsas_sync_map_info(sc); 2261665484d8SDoug Ambrisko 2262665484d8SDoug Ambrisko return (0); 22634799d485SKashyap D Desai 22644799d485SKashyap D Desai ABORT: 22654799d485SKashyap D Desai return (1); 2266665484d8SDoug Ambrisko } 2267665484d8SDoug Ambrisko 2268a688fcd0SKashyap D Desai /** 2269a688fcd0SKashyap D Desai * megasas_setup_jbod_map - setup jbod map for FP seq_number. 2270a688fcd0SKashyap D Desai * @sc: Adapter soft state 2271a688fcd0SKashyap D Desai * 2272a688fcd0SKashyap D Desai * Return 0 on success. 2273a688fcd0SKashyap D Desai */ 2274a688fcd0SKashyap D Desai void 2275a688fcd0SKashyap D Desai megasas_setup_jbod_map(struct mrsas_softc *sc) 2276a688fcd0SKashyap D Desai { 2277a688fcd0SKashyap D Desai int i; 2278a688fcd0SKashyap D Desai uint32_t pd_seq_map_sz; 2279a688fcd0SKashyap D Desai 2280a688fcd0SKashyap D Desai pd_seq_map_sz = sizeof(struct MR_PD_CFG_SEQ_NUM_SYNC) + 2281a688fcd0SKashyap D Desai (sizeof(struct MR_PD_CFG_SEQ) * (MAX_PHYSICAL_DEVICES - 1)); 2282a688fcd0SKashyap D Desai 2283a688fcd0SKashyap D Desai if (!sc->ctrl_info->adapterOperations3.useSeqNumJbodFP) { 2284a688fcd0SKashyap D Desai sc->use_seqnum_jbod_fp = 0; 2285a688fcd0SKashyap D Desai return; 2286a688fcd0SKashyap D Desai } 2287a688fcd0SKashyap D Desai if (sc->jbodmap_mem[0]) 2288a688fcd0SKashyap D Desai goto skip_alloc; 2289a688fcd0SKashyap D Desai 2290a688fcd0SKashyap D Desai for (i = 0; i < 2; i++) { 2291a688fcd0SKashyap D Desai if (bus_dma_tag_create(sc->mrsas_parent_tag, 2292a688fcd0SKashyap D Desai 4, 0, 2293a688fcd0SKashyap D Desai BUS_SPACE_MAXADDR_32BIT, 2294a688fcd0SKashyap D Desai BUS_SPACE_MAXADDR, 2295a688fcd0SKashyap D Desai NULL, NULL, 2296a688fcd0SKashyap D Desai pd_seq_map_sz, 2297a688fcd0SKashyap D Desai 1, 2298a688fcd0SKashyap D Desai pd_seq_map_sz, 2299a688fcd0SKashyap D Desai BUS_DMA_ALLOCNOW, 2300a688fcd0SKashyap D Desai NULL, NULL, 2301a688fcd0SKashyap D Desai &sc->jbodmap_tag[i])) { 2302a688fcd0SKashyap D Desai device_printf(sc->mrsas_dev, 2303a688fcd0SKashyap D Desai "Cannot allocate jbod map tag.\n"); 2304a688fcd0SKashyap D Desai return; 2305a688fcd0SKashyap D Desai } 2306a688fcd0SKashyap D Desai if (bus_dmamem_alloc(sc->jbodmap_tag[i], 2307a688fcd0SKashyap D Desai (void **)&sc->jbodmap_mem[i], 2308a688fcd0SKashyap D Desai BUS_DMA_NOWAIT, &sc->jbodmap_dmamap[i])) { 2309a688fcd0SKashyap D Desai device_printf(sc->mrsas_dev, 2310a688fcd0SKashyap D Desai "Cannot allocate jbod map memory.\n"); 2311a688fcd0SKashyap D Desai return; 2312a688fcd0SKashyap D Desai } 2313a688fcd0SKashyap D Desai bzero(sc->jbodmap_mem[i], pd_seq_map_sz); 2314a688fcd0SKashyap D Desai 2315a688fcd0SKashyap D Desai if (bus_dmamap_load(sc->jbodmap_tag[i], sc->jbodmap_dmamap[i], 2316a688fcd0SKashyap D Desai sc->jbodmap_mem[i], pd_seq_map_sz, 2317a688fcd0SKashyap D Desai mrsas_addr_cb, &sc->jbodmap_phys_addr[i], 2318a688fcd0SKashyap D Desai BUS_DMA_NOWAIT)) { 2319a688fcd0SKashyap D Desai device_printf(sc->mrsas_dev, "Cannot load jbod map memory.\n"); 2320a688fcd0SKashyap D Desai return; 2321a688fcd0SKashyap D Desai } 2322a688fcd0SKashyap D Desai if (!sc->jbodmap_mem[i]) { 2323a688fcd0SKashyap D Desai device_printf(sc->mrsas_dev, 2324a688fcd0SKashyap D Desai "Cannot allocate memory for jbod map.\n"); 2325a688fcd0SKashyap D Desai sc->use_seqnum_jbod_fp = 0; 2326a688fcd0SKashyap D Desai return; 2327a688fcd0SKashyap D Desai } 2328a688fcd0SKashyap D Desai } 2329a688fcd0SKashyap D Desai 2330a688fcd0SKashyap D Desai skip_alloc: 2331a688fcd0SKashyap D Desai if (!megasas_sync_pd_seq_num(sc, false) && 2332a688fcd0SKashyap D Desai !megasas_sync_pd_seq_num(sc, true)) 2333a688fcd0SKashyap D Desai sc->use_seqnum_jbod_fp = 1; 2334a688fcd0SKashyap D Desai else 2335a688fcd0SKashyap D Desai sc->use_seqnum_jbod_fp = 0; 2336a688fcd0SKashyap D Desai 2337a688fcd0SKashyap D Desai device_printf(sc->mrsas_dev, "Jbod map is supported\n"); 2338a688fcd0SKashyap D Desai } 2339a688fcd0SKashyap D Desai 23408e727371SKashyap D Desai /* 2341665484d8SDoug Ambrisko * mrsas_init_fw: Initialize Firmware 2342665484d8SDoug Ambrisko * input: Adapter soft state 2343665484d8SDoug Ambrisko * 23448e727371SKashyap D Desai * Calls transition_to_ready() to make sure Firmware is in operational state and 23458e727371SKashyap D Desai * calls mrsas_init_adapter() to send IOC_INIT command to Firmware. It 23468e727371SKashyap D Desai * issues internal commands to get the controller info after the IOC_INIT 23478e727371SKashyap D Desai * command response is received by Firmware. Note: code relating to 23488e727371SKashyap D Desai * get_pdlist, get_ld_list and max_sectors are currently not being used, it 23498e727371SKashyap D Desai * is left here as placeholder. 2350665484d8SDoug Ambrisko */ 23518e727371SKashyap D Desai static int 23528e727371SKashyap D Desai mrsas_init_fw(struct mrsas_softc *sc) 2353665484d8SDoug Ambrisko { 2354d18d1b47SKashyap D Desai 2355d18d1b47SKashyap D Desai int ret, loop, ocr = 0; 2356665484d8SDoug Ambrisko u_int32_t max_sectors_1; 2357665484d8SDoug Ambrisko u_int32_t max_sectors_2; 2358665484d8SDoug Ambrisko u_int32_t tmp_sectors; 23593d273176SKashyap D Desai u_int32_t scratch_pad_2, scratch_pad_3, scratch_pad_4; 2360d18d1b47SKashyap D Desai int msix_enable = 0; 2361d18d1b47SKashyap D Desai int fw_msix_count = 0; 2362821df4b9SKashyap D Desai int i, j; 2363665484d8SDoug Ambrisko 2364665484d8SDoug Ambrisko /* Make sure Firmware is ready */ 2365665484d8SDoug Ambrisko ret = mrsas_transition_to_ready(sc, ocr); 2366665484d8SDoug Ambrisko if (ret != SUCCESS) { 2367665484d8SDoug Ambrisko return (ret); 2368665484d8SDoug Ambrisko } 23692909aab4SKashyap D Desai if (sc->is_ventura || sc->is_aero) { 2370e315cf4dSKashyap D Desai scratch_pad_3 = mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, outbound_scratch_pad_3)); 23714ad83576SKashyap D Desai #if VD_EXT_DEBUG 23724ad83576SKashyap D Desai device_printf(sc->mrsas_dev, "scratch_pad_3 0x%x\n", scratch_pad_3); 23734ad83576SKashyap D Desai #endif 23744ad83576SKashyap D Desai sc->maxRaidMapSize = ((scratch_pad_3 >> 23754ad83576SKashyap D Desai MR_MAX_RAID_MAP_SIZE_OFFSET_SHIFT) & 23764ad83576SKashyap D Desai MR_MAX_RAID_MAP_SIZE_MASK); 23774ad83576SKashyap D Desai } 2378d18d1b47SKashyap D Desai /* MSI-x index 0- reply post host index register */ 2379d18d1b47SKashyap D Desai sc->msix_reg_offset[0] = MPI2_REPLY_POST_HOST_INDEX_OFFSET; 2380d18d1b47SKashyap D Desai /* Check if MSI-X is supported while in ready state */ 2381e315cf4dSKashyap D Desai msix_enable = (mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, outbound_scratch_pad)) & 0x4000000) >> 0x1a; 2382d18d1b47SKashyap D Desai 2383d18d1b47SKashyap D Desai if (msix_enable) { 2384e315cf4dSKashyap D Desai scratch_pad_2 = mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, 2385d18d1b47SKashyap D Desai outbound_scratch_pad_2)); 2386d18d1b47SKashyap D Desai 2387d18d1b47SKashyap D Desai /* Check max MSI-X vectors */ 2388d18d1b47SKashyap D Desai if (sc->device_id == MRSAS_TBOLT) { 2389d18d1b47SKashyap D Desai sc->msix_vectors = (scratch_pad_2 2390d18d1b47SKashyap D Desai & MR_MAX_REPLY_QUEUES_OFFSET) + 1; 2391d18d1b47SKashyap D Desai fw_msix_count = sc->msix_vectors; 2392d18d1b47SKashyap D Desai } else { 2393d18d1b47SKashyap D Desai /* Invader/Fury supports 96 MSI-X vectors */ 2394d18d1b47SKashyap D Desai sc->msix_vectors = ((scratch_pad_2 2395d18d1b47SKashyap D Desai & MR_MAX_REPLY_QUEUES_EXT_OFFSET) 2396d18d1b47SKashyap D Desai >> MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT) + 1; 2397d18d1b47SKashyap D Desai fw_msix_count = sc->msix_vectors; 2398d18d1b47SKashyap D Desai 23997aade8bfSKashyap D Desai if ((sc->mrsas_gen3_ctrl && (sc->msix_vectors > 8)) || 24002909aab4SKashyap D Desai ((sc->is_ventura || sc->is_aero) && (sc->msix_vectors > 16))) 24017aade8bfSKashyap D Desai sc->msix_combined = true; 24027aade8bfSKashyap D Desai /* 24037aade8bfSKashyap D Desai * Save 1-15 reply post index 24047aade8bfSKashyap D Desai * address to local memory Index 0 24057aade8bfSKashyap D Desai * is already saved from reg offset 24067aade8bfSKashyap D Desai * MPI2_REPLY_POST_HOST_INDEX_OFFSET 24077aade8bfSKashyap D Desai */ 2408d18d1b47SKashyap D Desai for (loop = 1; loop < MR_MAX_MSIX_REG_ARRAY; 2409d18d1b47SKashyap D Desai loop++) { 2410d18d1b47SKashyap D Desai sc->msix_reg_offset[loop] = 2411d18d1b47SKashyap D Desai MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET + 2412d18d1b47SKashyap D Desai (loop * 0x10); 2413d18d1b47SKashyap D Desai } 2414d18d1b47SKashyap D Desai } 2415d18d1b47SKashyap D Desai 2416d18d1b47SKashyap D Desai /* Don't bother allocating more MSI-X vectors than cpus */ 2417d18d1b47SKashyap D Desai sc->msix_vectors = min(sc->msix_vectors, 2418d18d1b47SKashyap D Desai mp_ncpus); 2419d18d1b47SKashyap D Desai 2420d18d1b47SKashyap D Desai /* Allocate MSI-x vectors */ 2421d18d1b47SKashyap D Desai if (mrsas_allocate_msix(sc) == SUCCESS) 2422d18d1b47SKashyap D Desai sc->msix_enable = 1; 2423d18d1b47SKashyap D Desai else 2424d18d1b47SKashyap D Desai sc->msix_enable = 0; 2425d18d1b47SKashyap D Desai 2426d18d1b47SKashyap D Desai device_printf(sc->mrsas_dev, "FW supports <%d> MSIX vector," 2427d18d1b47SKashyap D Desai "Online CPU %d Current MSIX <%d>\n", 2428d18d1b47SKashyap D Desai fw_msix_count, mp_ncpus, sc->msix_vectors); 2429d18d1b47SKashyap D Desai } 24307aade8bfSKashyap D Desai /* 24317aade8bfSKashyap D Desai * MSI-X host index 0 is common for all adapter. 24327aade8bfSKashyap D Desai * It is used for all MPT based Adapters. 24337aade8bfSKashyap D Desai */ 24347aade8bfSKashyap D Desai if (sc->msix_combined) { 24357aade8bfSKashyap D Desai sc->msix_reg_offset[0] = 24367aade8bfSKashyap D Desai MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET; 24377aade8bfSKashyap D Desai } 2438665484d8SDoug Ambrisko if (mrsas_init_adapter(sc) != SUCCESS) { 2439665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Adapter initialize Fail.\n"); 2440665484d8SDoug Ambrisko return (1); 2441665484d8SDoug Ambrisko } 244279b4460bSKashyap D Desai 24432909aab4SKashyap D Desai if (sc->is_ventura || sc->is_aero) { 2444e315cf4dSKashyap D Desai scratch_pad_4 = mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, 24453d273176SKashyap D Desai outbound_scratch_pad_4)); 24463d273176SKashyap D Desai if ((scratch_pad_4 & MR_NVME_PAGE_SIZE_MASK) >= MR_DEFAULT_NVME_PAGE_SHIFT) 24473d273176SKashyap D Desai sc->nvme_page_size = 1 << (scratch_pad_4 & MR_NVME_PAGE_SIZE_MASK); 24483d273176SKashyap D Desai 24493d273176SKashyap D Desai device_printf(sc->mrsas_dev, "NVME page size\t: (%d)\n", sc->nvme_page_size); 24503d273176SKashyap D Desai } 24513d273176SKashyap D Desai 2452665484d8SDoug Ambrisko /* Allocate internal commands for pass-thru */ 2453665484d8SDoug Ambrisko if (mrsas_alloc_mfi_cmds(sc) != SUCCESS) { 2454665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Allocate MFI cmd failed.\n"); 2455665484d8SDoug Ambrisko return (1); 2456665484d8SDoug Ambrisko } 2457af51c29fSKashyap D Desai sc->ctrl_info = malloc(sizeof(struct mrsas_ctrl_info), M_MRSAS, M_NOWAIT); 2458af51c29fSKashyap D Desai if (!sc->ctrl_info) { 2459af51c29fSKashyap D Desai device_printf(sc->mrsas_dev, "Malloc for ctrl_info failed.\n"); 2460af51c29fSKashyap D Desai return (1); 2461af51c29fSKashyap D Desai } 24624799d485SKashyap D Desai /* 24638e727371SKashyap D Desai * Get the controller info from FW, so that the MAX VD support 24648e727371SKashyap D Desai * availability can be decided. 24654799d485SKashyap D Desai */ 2466af51c29fSKashyap D Desai if (mrsas_get_ctrl_info(sc)) { 24674799d485SKashyap D Desai device_printf(sc->mrsas_dev, "Unable to get FW ctrl_info.\n"); 2468af51c29fSKashyap D Desai return (1); 24694799d485SKashyap D Desai } 247077cf7df8SKashyap D Desai sc->secure_jbod_support = 2471af51c29fSKashyap D Desai (u_int8_t)sc->ctrl_info->adapterOperations3.supportSecurityonJBOD; 247277cf7df8SKashyap D Desai 247377cf7df8SKashyap D Desai if (sc->secure_jbod_support) 247477cf7df8SKashyap D Desai device_printf(sc->mrsas_dev, "FW supports SED \n"); 247577cf7df8SKashyap D Desai 2476a688fcd0SKashyap D Desai if (sc->use_seqnum_jbod_fp) 2477a688fcd0SKashyap D Desai device_printf(sc->mrsas_dev, "FW supports JBOD Map \n"); 2478a688fcd0SKashyap D Desai 2479c376f864SKashyap D Desai if (sc->support_morethan256jbod) 2480c376f864SKashyap D Desai device_printf(sc->mrsas_dev, "FW supports JBOD Map Ext \n"); 2481c376f864SKashyap D Desai 2482665484d8SDoug Ambrisko if (mrsas_setup_raidmap(sc) != SUCCESS) { 2483a688fcd0SKashyap D Desai device_printf(sc->mrsas_dev, "Error: RAID map setup FAILED !!! " 2484a688fcd0SKashyap D Desai "There seems to be some problem in the controller\n" 2485a688fcd0SKashyap D Desai "Please contact to the SUPPORT TEAM if the problem persists\n"); 2486665484d8SDoug Ambrisko } 2487a688fcd0SKashyap D Desai megasas_setup_jbod_map(sc); 2488a688fcd0SKashyap D Desai 248979b4460bSKashyap D Desai 249079b4460bSKashyap D Desai memset(sc->target_list, 0, 249179b4460bSKashyap D Desai MRSAS_MAX_TM_TARGETS * sizeof(struct mrsas_target)); 249279b4460bSKashyap D Desai for (i = 0; i < MRSAS_MAX_TM_TARGETS; i++) 249379b4460bSKashyap D Desai sc->target_list[i].target_id = 0xffff; 249479b4460bSKashyap D Desai 2495665484d8SDoug Ambrisko /* For pass-thru, get PD/LD list and controller info */ 24964799d485SKashyap D Desai memset(sc->pd_list, 0, 24974799d485SKashyap D Desai MRSAS_MAX_PD * sizeof(struct mrsas_pd_list)); 2498a688fcd0SKashyap D Desai if (mrsas_get_pd_list(sc) != SUCCESS) { 2499a688fcd0SKashyap D Desai device_printf(sc->mrsas_dev, "Get PD list failed.\n"); 2500a688fcd0SKashyap D Desai return (1); 2501a688fcd0SKashyap D Desai } 25024799d485SKashyap D Desai memset(sc->ld_ids, 0xff, MRSAS_MAX_LD_IDS); 2503a688fcd0SKashyap D Desai if (mrsas_get_ld_list(sc) != SUCCESS) { 2504a688fcd0SKashyap D Desai device_printf(sc->mrsas_dev, "Get LD lsit failed.\n"); 2505a688fcd0SKashyap D Desai return (1); 2506a688fcd0SKashyap D Desai } 2507821df4b9SKashyap D Desai 25082909aab4SKashyap D Desai if ((sc->is_ventura || sc->is_aero) && sc->drv_stream_detection) { 2509821df4b9SKashyap D Desai sc->streamDetectByLD = malloc(sizeof(PTR_LD_STREAM_DETECT) * 2510821df4b9SKashyap D Desai MAX_LOGICAL_DRIVES_EXT, M_MRSAS, M_NOWAIT); 2511821df4b9SKashyap D Desai if (!sc->streamDetectByLD) { 2512821df4b9SKashyap D Desai device_printf(sc->mrsas_dev, 2513821df4b9SKashyap D Desai "unable to allocate stream detection for pool of LDs\n"); 2514821df4b9SKashyap D Desai return (1); 2515821df4b9SKashyap D Desai } 2516821df4b9SKashyap D Desai for (i = 0; i < MAX_LOGICAL_DRIVES_EXT; ++i) { 2517821df4b9SKashyap D Desai sc->streamDetectByLD[i] = malloc(sizeof(LD_STREAM_DETECT), M_MRSAS, M_NOWAIT); 2518821df4b9SKashyap D Desai if (!sc->streamDetectByLD[i]) { 2519821df4b9SKashyap D Desai device_printf(sc->mrsas_dev, "unable to allocate stream detect by LD\n"); 2520821df4b9SKashyap D Desai for (j = 0; j < i; ++j) 2521821df4b9SKashyap D Desai free(sc->streamDetectByLD[j], M_MRSAS); 2522821df4b9SKashyap D Desai free(sc->streamDetectByLD, M_MRSAS); 2523821df4b9SKashyap D Desai sc->streamDetectByLD = NULL; 2524821df4b9SKashyap D Desai return (1); 2525821df4b9SKashyap D Desai } 2526821df4b9SKashyap D Desai memset(sc->streamDetectByLD[i], 0, sizeof(LD_STREAM_DETECT)); 2527821df4b9SKashyap D Desai sc->streamDetectByLD[i]->mruBitMap = MR_STREAM_BITMAP; 2528821df4b9SKashyap D Desai } 2529821df4b9SKashyap D Desai } 2530821df4b9SKashyap D Desai 2531665484d8SDoug Ambrisko /* 25328e727371SKashyap D Desai * Compute the max allowed sectors per IO: The controller info has 25338e727371SKashyap D Desai * two limits on max sectors. Driver should use the minimum of these 25348e727371SKashyap D Desai * two. 2535665484d8SDoug Ambrisko * 2536665484d8SDoug Ambrisko * 1 << stripe_sz_ops.min = max sectors per strip 2537665484d8SDoug Ambrisko * 25388e727371SKashyap D Desai * Note that older firmwares ( < FW ver 30) didn't report information to 25398e727371SKashyap D Desai * calculate max_sectors_1. So the number ended up as zero always. 2540665484d8SDoug Ambrisko */ 2541665484d8SDoug Ambrisko tmp_sectors = 0; 2542af51c29fSKashyap D Desai max_sectors_1 = (1 << sc->ctrl_info->stripe_sz_ops.min) * 2543af51c29fSKashyap D Desai sc->ctrl_info->max_strips_per_io; 2544af51c29fSKashyap D Desai max_sectors_2 = sc->ctrl_info->max_request_size; 2545665484d8SDoug Ambrisko tmp_sectors = min(max_sectors_1, max_sectors_2); 25464799d485SKashyap D Desai sc->max_sectors_per_req = sc->max_num_sge * MRSAS_PAGE_SIZE / 512; 25474799d485SKashyap D Desai 25484799d485SKashyap D Desai if (tmp_sectors && (sc->max_sectors_per_req > tmp_sectors)) 25494799d485SKashyap D Desai sc->max_sectors_per_req = tmp_sectors; 25504799d485SKashyap D Desai 2551665484d8SDoug Ambrisko sc->disableOnlineCtrlReset = 2552af51c29fSKashyap D Desai sc->ctrl_info->properties.OnOffProperties.disableOnlineCtrlReset; 2553665484d8SDoug Ambrisko sc->UnevenSpanSupport = 2554af51c29fSKashyap D Desai sc->ctrl_info->adapterOperations2.supportUnevenSpans; 2555665484d8SDoug Ambrisko if (sc->UnevenSpanSupport) { 25568e727371SKashyap D Desai device_printf(sc->mrsas_dev, "FW supports: UnevenSpanSupport=%x\n\n", 2557665484d8SDoug Ambrisko sc->UnevenSpanSupport); 25584799d485SKashyap D Desai 2559665484d8SDoug Ambrisko if (MR_ValidateMapInfo(sc)) 2560665484d8SDoug Ambrisko sc->fast_path_io = 1; 2561665484d8SDoug Ambrisko else 2562665484d8SDoug Ambrisko sc->fast_path_io = 0; 2563665484d8SDoug Ambrisko } 25645437c8b8SKashyap D Desai 25655437c8b8SKashyap D Desai device_printf(sc->mrsas_dev, "max_fw_cmds: %u max_scsi_cmds: %u\n", 25665437c8b8SKashyap D Desai sc->max_fw_cmds, sc->max_scsi_cmds); 2567665484d8SDoug Ambrisko return (0); 2568665484d8SDoug Ambrisko } 2569665484d8SDoug Ambrisko 25708e727371SKashyap D Desai /* 2571665484d8SDoug Ambrisko * mrsas_init_adapter: Initializes the adapter/controller 2572665484d8SDoug Ambrisko * input: Adapter soft state 2573665484d8SDoug Ambrisko * 2574665484d8SDoug Ambrisko * Prepares for the issuing of the IOC Init cmd to FW for initializing the 2575665484d8SDoug Ambrisko * ROC/controller. The FW register is read to determined the number of 2576665484d8SDoug Ambrisko * commands that is supported. All memory allocations for IO is based on 2577665484d8SDoug Ambrisko * max_cmd. Appropriate calculations are performed in this function. 2578665484d8SDoug Ambrisko */ 25798e727371SKashyap D Desai int 25808e727371SKashyap D Desai mrsas_init_adapter(struct mrsas_softc *sc) 2581665484d8SDoug Ambrisko { 2582665484d8SDoug Ambrisko uint32_t status; 25832a1d3bcdSKashyap D Desai u_int32_t scratch_pad_2; 2584665484d8SDoug Ambrisko int ret; 2585d18d1b47SKashyap D Desai int i = 0; 2586665484d8SDoug Ambrisko 2587665484d8SDoug Ambrisko /* Read FW status register */ 2588e315cf4dSKashyap D Desai status = mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, outbound_scratch_pad)); 2589665484d8SDoug Ambrisko 2590665484d8SDoug Ambrisko sc->max_fw_cmds = status & MRSAS_FWSTATE_MAXCMD_MASK; 2591665484d8SDoug Ambrisko 2592665484d8SDoug Ambrisko /* Decrement the max supported by 1, to correlate with FW */ 2593665484d8SDoug Ambrisko sc->max_fw_cmds = sc->max_fw_cmds - 1; 259454f784f5SKashyap D Desai sc->max_scsi_cmds = sc->max_fw_cmds - MRSAS_MAX_MFI_CMDS; 2595665484d8SDoug Ambrisko 2596665484d8SDoug Ambrisko /* Determine allocation size of command frames */ 25972a1d3bcdSKashyap D Desai sc->reply_q_depth = ((sc->max_fw_cmds + 1 + 15) / 16 * 16) * 2; 25982a1d3bcdSKashyap D Desai sc->request_alloc_sz = sizeof(MRSAS_REQUEST_DESCRIPTOR_UNION) * sc->max_fw_cmds; 2599665484d8SDoug Ambrisko sc->reply_alloc_sz = sizeof(MPI2_REPLY_DESCRIPTORS_UNION) * (sc->reply_q_depth); 26002a1d3bcdSKashyap D Desai sc->io_frames_alloc_sz = MRSAS_MPI2_RAID_DEFAULT_IO_FRAME_SIZE + 26012a1d3bcdSKashyap D Desai (MRSAS_MPI2_RAID_DEFAULT_IO_FRAME_SIZE * (sc->max_fw_cmds + 1)); 2602e315cf4dSKashyap D Desai scratch_pad_2 = mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, 26033a3fc6cbSKashyap D Desai outbound_scratch_pad_2)); 26043a3fc6cbSKashyap D Desai /* 26053a3fc6cbSKashyap D Desai * If scratch_pad_2 & MEGASAS_MAX_CHAIN_SIZE_UNITS_MASK is set, 26063a3fc6cbSKashyap D Desai * Firmware support extended IO chain frame which is 4 time more 26073a3fc6cbSKashyap D Desai * than legacy Firmware. Legacy Firmware - Frame size is (8 * 128) = 26083a3fc6cbSKashyap D Desai * 1K 1M IO Firmware - Frame size is (8 * 128 * 4) = 4K 26093a3fc6cbSKashyap D Desai */ 26103a3fc6cbSKashyap D Desai if (scratch_pad_2 & MEGASAS_MAX_CHAIN_SIZE_UNITS_MASK) 26113a3fc6cbSKashyap D Desai sc->max_chain_frame_sz = 26123a3fc6cbSKashyap D Desai ((scratch_pad_2 & MEGASAS_MAX_CHAIN_SIZE_MASK) >> 5) 26133a3fc6cbSKashyap D Desai * MEGASAS_1MB_IO; 26143a3fc6cbSKashyap D Desai else 26153a3fc6cbSKashyap D Desai sc->max_chain_frame_sz = 26163a3fc6cbSKashyap D Desai ((scratch_pad_2 & MEGASAS_MAX_CHAIN_SIZE_MASK) >> 5) 26173a3fc6cbSKashyap D Desai * MEGASAS_256K_IO; 26183a3fc6cbSKashyap D Desai 26192a1d3bcdSKashyap D Desai sc->chain_frames_alloc_sz = sc->max_chain_frame_sz * sc->max_fw_cmds; 2620665484d8SDoug Ambrisko sc->max_sge_in_main_msg = (MRSAS_MPI2_RAID_DEFAULT_IO_FRAME_SIZE - 2621665484d8SDoug Ambrisko offsetof(MRSAS_RAID_SCSI_IO_REQUEST, SGL)) / 16; 2622665484d8SDoug Ambrisko 26233a3fc6cbSKashyap D Desai sc->max_sge_in_chain = sc->max_chain_frame_sz / sizeof(MPI2_SGE_IO_UNION); 2624665484d8SDoug Ambrisko sc->max_num_sge = sc->max_sge_in_main_msg + sc->max_sge_in_chain - 2; 2625665484d8SDoug Ambrisko 26262a1d3bcdSKashyap D Desai mrsas_dprint(sc, MRSAS_INFO, 26272a1d3bcdSKashyap D Desai "max sge: 0x%x, max chain frame size: 0x%x, " 26282a1d3bcdSKashyap D Desai "max fw cmd: 0x%x\n", sc->max_num_sge, 26292a1d3bcdSKashyap D Desai sc->max_chain_frame_sz, sc->max_fw_cmds); 26303a3fc6cbSKashyap D Desai 2631665484d8SDoug Ambrisko /* Used for pass thru MFI frame (DCMD) */ 2632665484d8SDoug Ambrisko sc->chain_offset_mfi_pthru = offsetof(MRSAS_RAID_SCSI_IO_REQUEST, SGL) / 16; 2633665484d8SDoug Ambrisko 2634665484d8SDoug Ambrisko sc->chain_offset_io_request = (MRSAS_MPI2_RAID_DEFAULT_IO_FRAME_SIZE - 2635665484d8SDoug Ambrisko sizeof(MPI2_SGE_IO_UNION)) / 16; 2636665484d8SDoug Ambrisko 2637d18d1b47SKashyap D Desai int count = sc->msix_vectors > 0 ? sc->msix_vectors : 1; 26388e727371SKashyap D Desai 2639d18d1b47SKashyap D Desai for (i = 0; i < count; i++) 2640d18d1b47SKashyap D Desai sc->last_reply_idx[i] = 0; 2641665484d8SDoug Ambrisko 2642665484d8SDoug Ambrisko ret = mrsas_alloc_mem(sc); 2643665484d8SDoug Ambrisko if (ret != SUCCESS) 2644665484d8SDoug Ambrisko return (ret); 2645665484d8SDoug Ambrisko 2646665484d8SDoug Ambrisko ret = mrsas_alloc_mpt_cmds(sc); 2647665484d8SDoug Ambrisko if (ret != SUCCESS) 2648665484d8SDoug Ambrisko return (ret); 2649665484d8SDoug Ambrisko 2650665484d8SDoug Ambrisko ret = mrsas_ioc_init(sc); 2651665484d8SDoug Ambrisko if (ret != SUCCESS) 2652665484d8SDoug Ambrisko return (ret); 2653665484d8SDoug Ambrisko 2654665484d8SDoug Ambrisko return (0); 2655665484d8SDoug Ambrisko } 2656665484d8SDoug Ambrisko 26578e727371SKashyap D Desai /* 2658665484d8SDoug Ambrisko * mrsas_alloc_ioc_cmd: Allocates memory for IOC Init command 2659665484d8SDoug Ambrisko * input: Adapter soft state 2660665484d8SDoug Ambrisko * 2661665484d8SDoug Ambrisko * Allocates for the IOC Init cmd to FW to initialize the ROC/controller. 2662665484d8SDoug Ambrisko */ 26638e727371SKashyap D Desai int 26648e727371SKashyap D Desai mrsas_alloc_ioc_cmd(struct mrsas_softc *sc) 2665665484d8SDoug Ambrisko { 2666665484d8SDoug Ambrisko int ioc_init_size; 2667665484d8SDoug Ambrisko 2668665484d8SDoug Ambrisko /* Allocate IOC INIT command */ 2669665484d8SDoug Ambrisko ioc_init_size = 1024 + sizeof(MPI2_IOC_INIT_REQUEST); 26708e727371SKashyap D Desai if (bus_dma_tag_create(sc->mrsas_parent_tag, 26718e727371SKashyap D Desai 1, 0, 26728e727371SKashyap D Desai BUS_SPACE_MAXADDR_32BIT, 26738e727371SKashyap D Desai BUS_SPACE_MAXADDR, 26748e727371SKashyap D Desai NULL, NULL, 26758e727371SKashyap D Desai ioc_init_size, 26768e727371SKashyap D Desai 1, 26778e727371SKashyap D Desai ioc_init_size, 26788e727371SKashyap D Desai BUS_DMA_ALLOCNOW, 26798e727371SKashyap D Desai NULL, NULL, 2680665484d8SDoug Ambrisko &sc->ioc_init_tag)) { 2681665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot allocate ioc init tag\n"); 2682665484d8SDoug Ambrisko return (ENOMEM); 2683665484d8SDoug Ambrisko } 2684665484d8SDoug Ambrisko if (bus_dmamem_alloc(sc->ioc_init_tag, (void **)&sc->ioc_init_mem, 2685665484d8SDoug Ambrisko BUS_DMA_NOWAIT, &sc->ioc_init_dmamap)) { 2686665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot allocate ioc init cmd mem\n"); 2687665484d8SDoug Ambrisko return (ENOMEM); 2688665484d8SDoug Ambrisko } 2689665484d8SDoug Ambrisko bzero(sc->ioc_init_mem, ioc_init_size); 2690665484d8SDoug Ambrisko if (bus_dmamap_load(sc->ioc_init_tag, sc->ioc_init_dmamap, 2691665484d8SDoug Ambrisko sc->ioc_init_mem, ioc_init_size, mrsas_addr_cb, 2692665484d8SDoug Ambrisko &sc->ioc_init_phys_mem, BUS_DMA_NOWAIT)) { 2693665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot load ioc init cmd mem\n"); 2694665484d8SDoug Ambrisko return (ENOMEM); 2695665484d8SDoug Ambrisko } 2696665484d8SDoug Ambrisko return (0); 2697665484d8SDoug Ambrisko } 2698665484d8SDoug Ambrisko 26998e727371SKashyap D Desai /* 2700665484d8SDoug Ambrisko * mrsas_free_ioc_cmd: Allocates memory for IOC Init command 2701665484d8SDoug Ambrisko * input: Adapter soft state 2702665484d8SDoug Ambrisko * 2703665484d8SDoug Ambrisko * Deallocates memory of the IOC Init cmd. 2704665484d8SDoug Ambrisko */ 27058e727371SKashyap D Desai void 27068e727371SKashyap D Desai mrsas_free_ioc_cmd(struct mrsas_softc *sc) 2707665484d8SDoug Ambrisko { 2708665484d8SDoug Ambrisko if (sc->ioc_init_phys_mem) 2709665484d8SDoug Ambrisko bus_dmamap_unload(sc->ioc_init_tag, sc->ioc_init_dmamap); 2710665484d8SDoug Ambrisko if (sc->ioc_init_mem != NULL) 2711665484d8SDoug Ambrisko bus_dmamem_free(sc->ioc_init_tag, sc->ioc_init_mem, sc->ioc_init_dmamap); 2712665484d8SDoug Ambrisko if (sc->ioc_init_tag != NULL) 2713665484d8SDoug Ambrisko bus_dma_tag_destroy(sc->ioc_init_tag); 2714665484d8SDoug Ambrisko } 2715665484d8SDoug Ambrisko 27168e727371SKashyap D Desai /* 2717665484d8SDoug Ambrisko * mrsas_ioc_init: Sends IOC Init command to FW 2718665484d8SDoug Ambrisko * input: Adapter soft state 2719665484d8SDoug Ambrisko * 2720665484d8SDoug Ambrisko * Issues the IOC Init cmd to FW to initialize the ROC/controller. 2721665484d8SDoug Ambrisko */ 27228e727371SKashyap D Desai int 27238e727371SKashyap D Desai mrsas_ioc_init(struct mrsas_softc *sc) 2724665484d8SDoug Ambrisko { 2725665484d8SDoug Ambrisko struct mrsas_init_frame *init_frame; 2726665484d8SDoug Ambrisko pMpi2IOCInitRequest_t IOCInitMsg; 2727665484d8SDoug Ambrisko MRSAS_REQUEST_DESCRIPTOR_UNION req_desc; 2728e80341d5SKashyap D Desai u_int8_t max_wait = MRSAS_INTERNAL_CMD_WAIT_TIME; 2729665484d8SDoug Ambrisko bus_addr_t phys_addr; 2730665484d8SDoug Ambrisko int i, retcode = 0; 2731d993dd83SKashyap D Desai u_int32_t scratch_pad_2; 2732665484d8SDoug Ambrisko 2733665484d8SDoug Ambrisko /* Allocate memory for the IOC INIT command */ 2734665484d8SDoug Ambrisko if (mrsas_alloc_ioc_cmd(sc)) { 2735665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot allocate IOC command.\n"); 2736665484d8SDoug Ambrisko return (1); 2737665484d8SDoug Ambrisko } 2738d993dd83SKashyap D Desai 2739d993dd83SKashyap D Desai if (!sc->block_sync_cache) { 2740e315cf4dSKashyap D Desai scratch_pad_2 = mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, 2741d993dd83SKashyap D Desai outbound_scratch_pad_2)); 2742d993dd83SKashyap D Desai sc->fw_sync_cache_support = (scratch_pad_2 & 2743d993dd83SKashyap D Desai MR_CAN_HANDLE_SYNC_CACHE_OFFSET) ? 1 : 0; 2744d993dd83SKashyap D Desai } 2745d993dd83SKashyap D Desai 2746665484d8SDoug Ambrisko IOCInitMsg = (pMpi2IOCInitRequest_t)(((char *)sc->ioc_init_mem) + 1024); 2747665484d8SDoug Ambrisko IOCInitMsg->Function = MPI2_FUNCTION_IOC_INIT; 2748665484d8SDoug Ambrisko IOCInitMsg->WhoInit = MPI2_WHOINIT_HOST_DRIVER; 2749665484d8SDoug Ambrisko IOCInitMsg->MsgVersion = MPI2_VERSION; 2750665484d8SDoug Ambrisko IOCInitMsg->HeaderVersion = MPI2_HEADER_VERSION; 2751665484d8SDoug Ambrisko IOCInitMsg->SystemRequestFrameSize = MRSAS_MPI2_RAID_DEFAULT_IO_FRAME_SIZE / 4; 2752665484d8SDoug Ambrisko IOCInitMsg->ReplyDescriptorPostQueueDepth = sc->reply_q_depth; 2753665484d8SDoug Ambrisko IOCInitMsg->ReplyDescriptorPostQueueAddress = sc->reply_desc_phys_addr; 2754665484d8SDoug Ambrisko IOCInitMsg->SystemRequestFrameBaseAddress = sc->io_request_phys_addr; 2755d18d1b47SKashyap D Desai IOCInitMsg->HostMSIxVectors = (sc->msix_vectors > 0 ? sc->msix_vectors : 0); 27563d273176SKashyap D Desai IOCInitMsg->HostPageSize = MR_DEFAULT_NVME_PAGE_SHIFT; 2757665484d8SDoug Ambrisko 2758665484d8SDoug Ambrisko init_frame = (struct mrsas_init_frame *)sc->ioc_init_mem; 2759665484d8SDoug Ambrisko init_frame->cmd = MFI_CMD_INIT; 2760665484d8SDoug Ambrisko init_frame->cmd_status = 0xFF; 2761665484d8SDoug Ambrisko init_frame->flags |= MFI_FRAME_DONT_POST_IN_REPLY_QUEUE; 2762665484d8SDoug Ambrisko 2763d18d1b47SKashyap D Desai /* driver support Extended MSIX */ 27642909aab4SKashyap D Desai if (sc->mrsas_gen3_ctrl || sc->is_ventura || sc->is_aero) { 2765d18d1b47SKashyap D Desai init_frame->driver_operations. 2766d18d1b47SKashyap D Desai mfi_capabilities.support_additional_msix = 1; 2767d18d1b47SKashyap D Desai } 2768665484d8SDoug Ambrisko if (sc->verbuf_mem) { 2769665484d8SDoug Ambrisko snprintf((char *)sc->verbuf_mem, strlen(MRSAS_VERSION) + 2, "%s\n", 2770665484d8SDoug Ambrisko MRSAS_VERSION); 2771665484d8SDoug Ambrisko init_frame->driver_ver_lo = (bus_addr_t)sc->verbuf_phys_addr; 2772665484d8SDoug Ambrisko init_frame->driver_ver_hi = 0; 2773665484d8SDoug Ambrisko } 277416dc2814SKashyap D Desai init_frame->driver_operations.mfi_capabilities.support_ndrive_r1_lb = 1; 27754799d485SKashyap D Desai init_frame->driver_operations.mfi_capabilities.support_max_255lds = 1; 277677cf7df8SKashyap D Desai init_frame->driver_operations.mfi_capabilities.security_protocol_cmds_fw = 1; 27773a3fc6cbSKashyap D Desai if (sc->max_chain_frame_sz > MEGASAS_CHAIN_FRAME_SZ_MIN) 27783a3fc6cbSKashyap D Desai init_frame->driver_operations.mfi_capabilities.support_ext_io_size = 1; 2779665484d8SDoug Ambrisko phys_addr = (bus_addr_t)sc->ioc_init_phys_mem + 1024; 2780665484d8SDoug Ambrisko init_frame->queue_info_new_phys_addr_lo = phys_addr; 2781665484d8SDoug Ambrisko init_frame->data_xfer_len = sizeof(Mpi2IOCInitRequest_t); 2782665484d8SDoug Ambrisko 2783665484d8SDoug Ambrisko req_desc.addr.Words = (bus_addr_t)sc->ioc_init_phys_mem; 2784665484d8SDoug Ambrisko req_desc.MFAIo.RequestFlags = 2785665484d8SDoug Ambrisko (MRSAS_REQ_DESCRIPT_FLAGS_MFA << MRSAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT); 2786665484d8SDoug Ambrisko 2787665484d8SDoug Ambrisko mrsas_disable_intr(sc); 2788665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_OCR, "Issuing IOC INIT command to FW.\n"); 2789b518670cSKashyap D Desai mrsas_write_64bit_req_desc(sc, req_desc.addr.u.low, req_desc.addr.u.high); 2790665484d8SDoug Ambrisko 2791665484d8SDoug Ambrisko /* 2792665484d8SDoug Ambrisko * Poll response timer to wait for Firmware response. While this 2793665484d8SDoug Ambrisko * timer with the DELAY call could block CPU, the time interval for 2794665484d8SDoug Ambrisko * this is only 1 millisecond. 2795665484d8SDoug Ambrisko */ 2796665484d8SDoug Ambrisko if (init_frame->cmd_status == 0xFF) { 2797665484d8SDoug Ambrisko for (i = 0; i < (max_wait * 1000); i++) { 2798665484d8SDoug Ambrisko if (init_frame->cmd_status == 0xFF) 2799665484d8SDoug Ambrisko DELAY(1000); 2800665484d8SDoug Ambrisko else 2801665484d8SDoug Ambrisko break; 2802665484d8SDoug Ambrisko } 2803665484d8SDoug Ambrisko } 2804665484d8SDoug Ambrisko if (init_frame->cmd_status == 0) 2805665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_OCR, 2806665484d8SDoug Ambrisko "IOC INIT response received from FW.\n"); 28078e727371SKashyap D Desai else { 2808665484d8SDoug Ambrisko if (init_frame->cmd_status == 0xFF) 2809665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "IOC Init timed out after %d seconds.\n", max_wait); 2810665484d8SDoug Ambrisko else 2811665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "IOC Init failed, status = 0x%x\n", init_frame->cmd_status); 2812665484d8SDoug Ambrisko retcode = 1; 2813665484d8SDoug Ambrisko } 2814665484d8SDoug Ambrisko 2815b518670cSKashyap D Desai if (sc->is_aero) { 2816e315cf4dSKashyap D Desai scratch_pad_2 = mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, 2817b518670cSKashyap D Desai outbound_scratch_pad_2)); 2818b518670cSKashyap D Desai sc->atomic_desc_support = (scratch_pad_2 & 2819b518670cSKashyap D Desai MR_ATOMIC_DESCRIPTOR_SUPPORT_OFFSET) ? 1 : 0; 2820b518670cSKashyap D Desai device_printf(sc->mrsas_dev, "FW supports atomic descriptor: %s\n", 2821b518670cSKashyap D Desai sc->atomic_desc_support ? "Yes" : "No"); 2822b518670cSKashyap D Desai } 2823b518670cSKashyap D Desai 2824665484d8SDoug Ambrisko mrsas_free_ioc_cmd(sc); 2825665484d8SDoug Ambrisko return (retcode); 2826665484d8SDoug Ambrisko } 2827665484d8SDoug Ambrisko 28288e727371SKashyap D Desai /* 2829665484d8SDoug Ambrisko * mrsas_alloc_mpt_cmds: Allocates the command packets 2830665484d8SDoug Ambrisko * input: Adapter instance soft state 2831665484d8SDoug Ambrisko * 2832665484d8SDoug Ambrisko * This function allocates the internal commands for IOs. Each command that is 28338e727371SKashyap D Desai * issued to FW is wrapped in a local data structure called mrsas_mpt_cmd. An 28348e727371SKashyap D Desai * array is allocated with mrsas_mpt_cmd context. The free commands are 2835665484d8SDoug Ambrisko * maintained in a linked list (cmd pool). SMID value range is from 1 to 2836665484d8SDoug Ambrisko * max_fw_cmds. 2837665484d8SDoug Ambrisko */ 28388e727371SKashyap D Desai int 28398e727371SKashyap D Desai mrsas_alloc_mpt_cmds(struct mrsas_softc *sc) 2840665484d8SDoug Ambrisko { 2841665484d8SDoug Ambrisko int i, j; 28422a1d3bcdSKashyap D Desai u_int32_t max_fw_cmds, count; 2843665484d8SDoug Ambrisko struct mrsas_mpt_cmd *cmd; 2844665484d8SDoug Ambrisko pMpi2ReplyDescriptorsUnion_t reply_desc; 2845665484d8SDoug Ambrisko u_int32_t offset, chain_offset, sense_offset; 2846665484d8SDoug Ambrisko bus_addr_t io_req_base_phys, chain_frame_base_phys, sense_base_phys; 2847665484d8SDoug Ambrisko u_int8_t *io_req_base, *chain_frame_base, *sense_base; 2848665484d8SDoug Ambrisko 28492a1d3bcdSKashyap D Desai max_fw_cmds = sc->max_fw_cmds; 2850665484d8SDoug Ambrisko 2851665484d8SDoug Ambrisko sc->req_desc = malloc(sc->request_alloc_sz, M_MRSAS, M_NOWAIT); 2852665484d8SDoug Ambrisko if (!sc->req_desc) { 2853665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Out of memory, cannot alloc req desc\n"); 2854665484d8SDoug Ambrisko return (ENOMEM); 2855665484d8SDoug Ambrisko } 2856665484d8SDoug Ambrisko memset(sc->req_desc, 0, sc->request_alloc_sz); 2857665484d8SDoug Ambrisko 2858665484d8SDoug Ambrisko /* 28598e727371SKashyap D Desai * sc->mpt_cmd_list is an array of struct mrsas_mpt_cmd pointers. 28608e727371SKashyap D Desai * Allocate the dynamic array first and then allocate individual 28618e727371SKashyap D Desai * commands. 2862665484d8SDoug Ambrisko */ 28632a1d3bcdSKashyap D Desai sc->mpt_cmd_list = malloc(sizeof(struct mrsas_mpt_cmd *) * max_fw_cmds, 28642a1d3bcdSKashyap D Desai M_MRSAS, M_NOWAIT); 2865665484d8SDoug Ambrisko if (!sc->mpt_cmd_list) { 2866665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot alloc memory for mpt_cmd_list.\n"); 2867665484d8SDoug Ambrisko return (ENOMEM); 2868665484d8SDoug Ambrisko } 28692a1d3bcdSKashyap D Desai memset(sc->mpt_cmd_list, 0, sizeof(struct mrsas_mpt_cmd *) * max_fw_cmds); 28702a1d3bcdSKashyap D Desai for (i = 0; i < max_fw_cmds; i++) { 2871665484d8SDoug Ambrisko sc->mpt_cmd_list[i] = malloc(sizeof(struct mrsas_mpt_cmd), 2872665484d8SDoug Ambrisko M_MRSAS, M_NOWAIT); 2873665484d8SDoug Ambrisko if (!sc->mpt_cmd_list[i]) { 2874665484d8SDoug Ambrisko for (j = 0; j < i; j++) 2875665484d8SDoug Ambrisko free(sc->mpt_cmd_list[j], M_MRSAS); 2876665484d8SDoug Ambrisko free(sc->mpt_cmd_list, M_MRSAS); 2877665484d8SDoug Ambrisko sc->mpt_cmd_list = NULL; 2878665484d8SDoug Ambrisko return (ENOMEM); 2879665484d8SDoug Ambrisko } 2880665484d8SDoug Ambrisko } 2881665484d8SDoug Ambrisko 2882665484d8SDoug Ambrisko io_req_base = (u_int8_t *)sc->io_request_mem + MRSAS_MPI2_RAID_DEFAULT_IO_FRAME_SIZE; 2883665484d8SDoug Ambrisko io_req_base_phys = (bus_addr_t)sc->io_request_phys_addr + MRSAS_MPI2_RAID_DEFAULT_IO_FRAME_SIZE; 2884665484d8SDoug Ambrisko chain_frame_base = (u_int8_t *)sc->chain_frame_mem; 2885665484d8SDoug Ambrisko chain_frame_base_phys = (bus_addr_t)sc->chain_frame_phys_addr; 2886665484d8SDoug Ambrisko sense_base = (u_int8_t *)sc->sense_mem; 2887665484d8SDoug Ambrisko sense_base_phys = (bus_addr_t)sc->sense_phys_addr; 28882a1d3bcdSKashyap D Desai for (i = 0; i < max_fw_cmds; i++) { 2889665484d8SDoug Ambrisko cmd = sc->mpt_cmd_list[i]; 2890665484d8SDoug Ambrisko offset = MRSAS_MPI2_RAID_DEFAULT_IO_FRAME_SIZE * i; 28913a3fc6cbSKashyap D Desai chain_offset = sc->max_chain_frame_sz * i; 2892665484d8SDoug Ambrisko sense_offset = MRSAS_SENSE_LEN * i; 2893665484d8SDoug Ambrisko memset(cmd, 0, sizeof(struct mrsas_mpt_cmd)); 2894665484d8SDoug Ambrisko cmd->index = i + 1; 2895665484d8SDoug Ambrisko cmd->ccb_ptr = NULL; 28962a1d3bcdSKashyap D Desai cmd->r1_alt_dev_handle = MR_DEVHANDLE_INVALID; 28978bb601acSKashyap D Desai callout_init_mtx(&cmd->cm_callout, &sc->sim_lock, 0); 2898665484d8SDoug Ambrisko cmd->sync_cmd_idx = (u_int32_t)MRSAS_ULONG_MAX; 2899665484d8SDoug Ambrisko cmd->sc = sc; 2900665484d8SDoug Ambrisko cmd->io_request = (MRSAS_RAID_SCSI_IO_REQUEST *) (io_req_base + offset); 2901665484d8SDoug Ambrisko memset(cmd->io_request, 0, sizeof(MRSAS_RAID_SCSI_IO_REQUEST)); 2902665484d8SDoug Ambrisko cmd->io_request_phys_addr = io_req_base_phys + offset; 2903665484d8SDoug Ambrisko cmd->chain_frame = (MPI2_SGE_IO_UNION *) (chain_frame_base + chain_offset); 2904665484d8SDoug Ambrisko cmd->chain_frame_phys_addr = chain_frame_base_phys + chain_offset; 2905665484d8SDoug Ambrisko cmd->sense = sense_base + sense_offset; 2906665484d8SDoug Ambrisko cmd->sense_phys_addr = sense_base_phys + sense_offset; 2907665484d8SDoug Ambrisko if (bus_dmamap_create(sc->data_tag, 0, &cmd->data_dmamap)) { 2908665484d8SDoug Ambrisko return (FAIL); 2909665484d8SDoug Ambrisko } 2910665484d8SDoug Ambrisko TAILQ_INSERT_TAIL(&(sc->mrsas_mpt_cmd_list_head), cmd, next); 2911665484d8SDoug Ambrisko } 2912665484d8SDoug Ambrisko 2913665484d8SDoug Ambrisko /* Initialize reply descriptor array to 0xFFFFFFFF */ 2914665484d8SDoug Ambrisko reply_desc = sc->reply_desc_mem; 2915d18d1b47SKashyap D Desai count = sc->msix_vectors > 0 ? sc->msix_vectors : 1; 2916d18d1b47SKashyap D Desai for (i = 0; i < sc->reply_q_depth * count; i++, reply_desc++) { 2917665484d8SDoug Ambrisko reply_desc->Words = MRSAS_ULONG_MAX; 2918665484d8SDoug Ambrisko } 2919665484d8SDoug Ambrisko return (0); 2920665484d8SDoug Ambrisko } 2921665484d8SDoug Ambrisko 29228e727371SKashyap D Desai /* 2923b518670cSKashyap D Desai * mrsas_write_64bit_req_dsc: Writes 64 bit request descriptor to FW 2924b518670cSKashyap D Desai * input: Adapter softstate 2925b518670cSKashyap D Desai * request descriptor address low 2926b518670cSKashyap D Desai * request descriptor address high 2927b518670cSKashyap D Desai */ 2928b518670cSKashyap D Desai void 2929b518670cSKashyap D Desai mrsas_write_64bit_req_desc(struct mrsas_softc *sc, u_int32_t req_desc_lo, 2930b518670cSKashyap D Desai u_int32_t req_desc_hi) 2931b518670cSKashyap D Desai { 2932b518670cSKashyap D Desai mtx_lock(&sc->pci_lock); 2933b518670cSKashyap D Desai mrsas_write_reg(sc, offsetof(mrsas_reg_set, inbound_low_queue_port), 2934b518670cSKashyap D Desai req_desc_lo); 2935b518670cSKashyap D Desai mrsas_write_reg(sc, offsetof(mrsas_reg_set, inbound_high_queue_port), 2936b518670cSKashyap D Desai req_desc_hi); 2937b518670cSKashyap D Desai mtx_unlock(&sc->pci_lock); 2938b518670cSKashyap D Desai } 2939b518670cSKashyap D Desai 2940b518670cSKashyap D Desai /* 2941665484d8SDoug Ambrisko * mrsas_fire_cmd: Sends command to FW 2942665484d8SDoug Ambrisko * input: Adapter softstate 2943665484d8SDoug Ambrisko * request descriptor address low 2944665484d8SDoug Ambrisko * request descriptor address high 2945665484d8SDoug Ambrisko * 2946665484d8SDoug Ambrisko * This functions fires the command to Firmware by writing to the 2947665484d8SDoug Ambrisko * inbound_low_queue_port and inbound_high_queue_port. 2948665484d8SDoug Ambrisko */ 29498e727371SKashyap D Desai void 29508e727371SKashyap D Desai mrsas_fire_cmd(struct mrsas_softc *sc, u_int32_t req_desc_lo, 2951665484d8SDoug Ambrisko u_int32_t req_desc_hi) 2952665484d8SDoug Ambrisko { 2953b518670cSKashyap D Desai if (sc->atomic_desc_support) 2954b518670cSKashyap D Desai mrsas_write_reg(sc, offsetof(mrsas_reg_set, inbound_single_queue_port), 2955665484d8SDoug Ambrisko req_desc_lo); 2956b518670cSKashyap D Desai else 2957b518670cSKashyap D Desai mrsas_write_64bit_req_desc(sc, req_desc_lo, req_desc_hi); 2958665484d8SDoug Ambrisko } 2959665484d8SDoug Ambrisko 29608e727371SKashyap D Desai /* 29618e727371SKashyap D Desai * mrsas_transition_to_ready: Move FW to Ready state input: 29628e727371SKashyap D Desai * Adapter instance soft state 2963665484d8SDoug Ambrisko * 29648e727371SKashyap D Desai * During the initialization, FW passes can potentially be in any one of several 29658e727371SKashyap D Desai * possible states. If the FW in operational, waiting-for-handshake states, 29668e727371SKashyap D Desai * driver must take steps to bring it to ready state. Otherwise, it has to 29678e727371SKashyap D Desai * wait for the ready state. 2968665484d8SDoug Ambrisko */ 29698e727371SKashyap D Desai int 29708e727371SKashyap D Desai mrsas_transition_to_ready(struct mrsas_softc *sc, int ocr) 2971665484d8SDoug Ambrisko { 2972665484d8SDoug Ambrisko int i; 2973665484d8SDoug Ambrisko u_int8_t max_wait; 2974665484d8SDoug Ambrisko u_int32_t val, fw_state; 2975665484d8SDoug Ambrisko u_int32_t cur_state; 2976665484d8SDoug Ambrisko u_int32_t abs_state, curr_abs_state; 2977665484d8SDoug Ambrisko 2978e315cf4dSKashyap D Desai val = mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, outbound_scratch_pad)); 2979665484d8SDoug Ambrisko fw_state = val & MFI_STATE_MASK; 2980665484d8SDoug Ambrisko max_wait = MRSAS_RESET_WAIT_TIME; 2981665484d8SDoug Ambrisko 2982665484d8SDoug Ambrisko if (fw_state != MFI_STATE_READY) 2983665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Waiting for FW to come to ready state\n"); 2984665484d8SDoug Ambrisko 2985665484d8SDoug Ambrisko while (fw_state != MFI_STATE_READY) { 2986e315cf4dSKashyap D Desai abs_state = mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, outbound_scratch_pad)); 2987665484d8SDoug Ambrisko switch (fw_state) { 2988665484d8SDoug Ambrisko case MFI_STATE_FAULT: 2989665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "FW is in FAULT state!!\n"); 2990665484d8SDoug Ambrisko if (ocr) { 2991665484d8SDoug Ambrisko cur_state = MFI_STATE_FAULT; 2992665484d8SDoug Ambrisko break; 29938e727371SKashyap D Desai } else 2994665484d8SDoug Ambrisko return -ENODEV; 2995665484d8SDoug Ambrisko case MFI_STATE_WAIT_HANDSHAKE: 2996665484d8SDoug Ambrisko /* Set the CLR bit in inbound doorbell */ 2997665484d8SDoug Ambrisko mrsas_write_reg(sc, offsetof(mrsas_reg_set, doorbell), 2998665484d8SDoug Ambrisko MFI_INIT_CLEAR_HANDSHAKE | MFI_INIT_HOTPLUG); 2999665484d8SDoug Ambrisko cur_state = MFI_STATE_WAIT_HANDSHAKE; 3000665484d8SDoug Ambrisko break; 3001665484d8SDoug Ambrisko case MFI_STATE_BOOT_MESSAGE_PENDING: 3002665484d8SDoug Ambrisko mrsas_write_reg(sc, offsetof(mrsas_reg_set, doorbell), 3003665484d8SDoug Ambrisko MFI_INIT_HOTPLUG); 3004665484d8SDoug Ambrisko cur_state = MFI_STATE_BOOT_MESSAGE_PENDING; 3005665484d8SDoug Ambrisko break; 3006665484d8SDoug Ambrisko case MFI_STATE_OPERATIONAL: 30078e727371SKashyap D Desai /* 30088e727371SKashyap D Desai * Bring it to READY state; assuming max wait 10 30098e727371SKashyap D Desai * secs 30108e727371SKashyap D Desai */ 3011665484d8SDoug Ambrisko mrsas_disable_intr(sc); 3012665484d8SDoug Ambrisko mrsas_write_reg(sc, offsetof(mrsas_reg_set, doorbell), MFI_RESET_FLAGS); 3013665484d8SDoug Ambrisko for (i = 0; i < max_wait * 1000; i++) { 3014e315cf4dSKashyap D Desai if (mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, doorbell)) & 1) 3015665484d8SDoug Ambrisko DELAY(1000); 3016665484d8SDoug Ambrisko else 3017665484d8SDoug Ambrisko break; 3018665484d8SDoug Ambrisko } 3019665484d8SDoug Ambrisko cur_state = MFI_STATE_OPERATIONAL; 3020665484d8SDoug Ambrisko break; 3021665484d8SDoug Ambrisko case MFI_STATE_UNDEFINED: 30228e727371SKashyap D Desai /* 30238e727371SKashyap D Desai * This state should not last for more than 2 30248e727371SKashyap D Desai * seconds 30258e727371SKashyap D Desai */ 3026665484d8SDoug Ambrisko cur_state = MFI_STATE_UNDEFINED; 3027665484d8SDoug Ambrisko break; 3028665484d8SDoug Ambrisko case MFI_STATE_BB_INIT: 3029665484d8SDoug Ambrisko cur_state = MFI_STATE_BB_INIT; 3030665484d8SDoug Ambrisko break; 3031665484d8SDoug Ambrisko case MFI_STATE_FW_INIT: 3032665484d8SDoug Ambrisko cur_state = MFI_STATE_FW_INIT; 3033665484d8SDoug Ambrisko break; 3034665484d8SDoug Ambrisko case MFI_STATE_FW_INIT_2: 3035665484d8SDoug Ambrisko cur_state = MFI_STATE_FW_INIT_2; 3036665484d8SDoug Ambrisko break; 3037665484d8SDoug Ambrisko case MFI_STATE_DEVICE_SCAN: 3038665484d8SDoug Ambrisko cur_state = MFI_STATE_DEVICE_SCAN; 3039665484d8SDoug Ambrisko break; 3040665484d8SDoug Ambrisko case MFI_STATE_FLUSH_CACHE: 3041665484d8SDoug Ambrisko cur_state = MFI_STATE_FLUSH_CACHE; 3042665484d8SDoug Ambrisko break; 3043665484d8SDoug Ambrisko default: 3044665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Unknown state 0x%x\n", fw_state); 3045665484d8SDoug Ambrisko return -ENODEV; 3046665484d8SDoug Ambrisko } 3047665484d8SDoug Ambrisko 3048665484d8SDoug Ambrisko /* 3049665484d8SDoug Ambrisko * The cur_state should not last for more than max_wait secs 3050665484d8SDoug Ambrisko */ 3051665484d8SDoug Ambrisko for (i = 0; i < (max_wait * 1000); i++) { 3052e315cf4dSKashyap D Desai fw_state = (mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, 3053665484d8SDoug Ambrisko outbound_scratch_pad)) & MFI_STATE_MASK); 3054e315cf4dSKashyap D Desai curr_abs_state = mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, 3055665484d8SDoug Ambrisko outbound_scratch_pad)); 3056665484d8SDoug Ambrisko if (abs_state == curr_abs_state) 3057665484d8SDoug Ambrisko DELAY(1000); 3058665484d8SDoug Ambrisko else 3059665484d8SDoug Ambrisko break; 3060665484d8SDoug Ambrisko } 3061665484d8SDoug Ambrisko 3062665484d8SDoug Ambrisko /* 3063665484d8SDoug Ambrisko * Return error if fw_state hasn't changed after max_wait 3064665484d8SDoug Ambrisko */ 3065665484d8SDoug Ambrisko if (curr_abs_state == abs_state) { 3066665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "FW state [%d] hasn't changed " 3067665484d8SDoug Ambrisko "in %d secs\n", fw_state, max_wait); 3068665484d8SDoug Ambrisko return -ENODEV; 3069665484d8SDoug Ambrisko } 3070665484d8SDoug Ambrisko } 3071665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_OCR, "FW now in Ready state\n"); 3072665484d8SDoug Ambrisko return 0; 3073665484d8SDoug Ambrisko } 3074665484d8SDoug Ambrisko 30758e727371SKashyap D Desai /* 3076665484d8SDoug Ambrisko * mrsas_get_mfi_cmd: Get a cmd from free command pool 3077665484d8SDoug Ambrisko * input: Adapter soft state 3078665484d8SDoug Ambrisko * 3079665484d8SDoug Ambrisko * This function removes an MFI command from the command list. 3080665484d8SDoug Ambrisko */ 30818e727371SKashyap D Desai struct mrsas_mfi_cmd * 30828e727371SKashyap D Desai mrsas_get_mfi_cmd(struct mrsas_softc *sc) 3083665484d8SDoug Ambrisko { 3084665484d8SDoug Ambrisko struct mrsas_mfi_cmd *cmd = NULL; 3085665484d8SDoug Ambrisko 3086665484d8SDoug Ambrisko mtx_lock(&sc->mfi_cmd_pool_lock); 3087665484d8SDoug Ambrisko if (!TAILQ_EMPTY(&sc->mrsas_mfi_cmd_list_head)) { 3088665484d8SDoug Ambrisko cmd = TAILQ_FIRST(&sc->mrsas_mfi_cmd_list_head); 3089665484d8SDoug Ambrisko TAILQ_REMOVE(&sc->mrsas_mfi_cmd_list_head, cmd, next); 3090665484d8SDoug Ambrisko } 3091665484d8SDoug Ambrisko mtx_unlock(&sc->mfi_cmd_pool_lock); 3092665484d8SDoug Ambrisko 3093665484d8SDoug Ambrisko return cmd; 3094665484d8SDoug Ambrisko } 3095665484d8SDoug Ambrisko 30968e727371SKashyap D Desai /* 30978e727371SKashyap D Desai * mrsas_ocr_thread: Thread to handle OCR/Kill Adapter. 3098665484d8SDoug Ambrisko * input: Adapter Context. 3099665484d8SDoug Ambrisko * 31008e727371SKashyap D Desai * This function will check FW status register and flag do_timeout_reset flag. 31018e727371SKashyap D Desai * It will do OCR/Kill adapter if FW is in fault state or IO timed out has 31028e727371SKashyap D Desai * trigger reset. 3103665484d8SDoug Ambrisko */ 3104665484d8SDoug Ambrisko static void 3105665484d8SDoug Ambrisko mrsas_ocr_thread(void *arg) 3106665484d8SDoug Ambrisko { 3107665484d8SDoug Ambrisko struct mrsas_softc *sc; 3108665484d8SDoug Ambrisko u_int32_t fw_status, fw_state; 31098bb601acSKashyap D Desai u_int8_t tm_target_reset_failed = 0; 3110665484d8SDoug Ambrisko 3111665484d8SDoug Ambrisko sc = (struct mrsas_softc *)arg; 3112665484d8SDoug Ambrisko 3113665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_TRACE, "%s\n", __func__); 3114665484d8SDoug Ambrisko 3115665484d8SDoug Ambrisko sc->ocr_thread_active = 1; 3116665484d8SDoug Ambrisko mtx_lock(&sc->sim_lock); 3117665484d8SDoug Ambrisko for (;;) { 3118665484d8SDoug Ambrisko /* Sleep for 1 second and check the queue status */ 3119665484d8SDoug Ambrisko msleep(&sc->ocr_chan, &sc->sim_lock, PRIBIO, 3120665484d8SDoug Ambrisko "mrsas_ocr", sc->mrsas_fw_fault_check_delay * hz); 3121f0c7594bSKashyap D Desai if (sc->remove_in_progress || 3122f0c7594bSKashyap D Desai sc->adprecovery == MRSAS_HW_CRITICAL_ERROR) { 3123665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_OCR, 3124f0c7594bSKashyap D Desai "Exit due to %s from %s\n", 3125f0c7594bSKashyap D Desai sc->remove_in_progress ? "Shutdown" : 3126f0c7594bSKashyap D Desai "Hardware critical error", __func__); 3127665484d8SDoug Ambrisko break; 3128665484d8SDoug Ambrisko } 3129e315cf4dSKashyap D Desai fw_status = mrsas_read_reg_with_retries(sc, 3130665484d8SDoug Ambrisko offsetof(mrsas_reg_set, outbound_scratch_pad)); 3131665484d8SDoug Ambrisko fw_state = fw_status & MFI_STATE_MASK; 31328bb601acSKashyap D Desai if (fw_state == MFI_STATE_FAULT || sc->do_timedout_reset || 31338bb601acSKashyap D Desai mrsas_atomic_read(&sc->target_reset_outstanding)) { 31348bb601acSKashyap D Desai 31358bb601acSKashyap D Desai /* First, freeze further IOs to come to the SIM */ 31368bb601acSKashyap D Desai mrsas_xpt_freeze(sc); 31378bb601acSKashyap D Desai 31388bb601acSKashyap D Desai /* If this is an IO timeout then go for target reset */ 31398bb601acSKashyap D Desai if (mrsas_atomic_read(&sc->target_reset_outstanding)) { 31408bb601acSKashyap D Desai device_printf(sc->mrsas_dev, "Initiating Target RESET " 31418bb601acSKashyap D Desai "because of SCSI IO timeout!\n"); 31428bb601acSKashyap D Desai 31438bb601acSKashyap D Desai /* Let the remaining IOs to complete */ 31448bb601acSKashyap D Desai msleep(&sc->ocr_chan, &sc->sim_lock, PRIBIO, 31458bb601acSKashyap D Desai "mrsas_reset_targets", 5 * hz); 31468bb601acSKashyap D Desai 31478bb601acSKashyap D Desai /* Try to reset the target device */ 31488bb601acSKashyap D Desai if (mrsas_reset_targets(sc) == FAIL) 31498bb601acSKashyap D Desai tm_target_reset_failed = 1; 31508bb601acSKashyap D Desai } 31518bb601acSKashyap D Desai 31528bb601acSKashyap D Desai /* If this is a DCMD timeout or FW fault, 31538bb601acSKashyap D Desai * then go for controller reset 31548bb601acSKashyap D Desai */ 31558bb601acSKashyap D Desai if (fw_state == MFI_STATE_FAULT || tm_target_reset_failed || 31568bb601acSKashyap D Desai (sc->do_timedout_reset == MFI_DCMD_TIMEOUT_OCR)) { 31578bb601acSKashyap D Desai if (tm_target_reset_failed) 31588bb601acSKashyap D Desai device_printf(sc->mrsas_dev, "Initiaiting OCR because of " 31598bb601acSKashyap D Desai "TM FAILURE!\n"); 31608bb601acSKashyap D Desai else 31618bb601acSKashyap D Desai device_printf(sc->mrsas_dev, "Initiaiting OCR " 31628bb601acSKashyap D Desai "because of %s!\n", sc->do_timedout_reset ? 31638bb601acSKashyap D Desai "DCMD IO Timeout" : "FW fault"); 31648bb601acSKashyap D Desai 3165665484d8SDoug Ambrisko mtx_lock_spin(&sc->ioctl_lock); 3166665484d8SDoug Ambrisko sc->reset_in_progress = 1; 3167665484d8SDoug Ambrisko mtx_unlock_spin(&sc->ioctl_lock); 31688bb601acSKashyap D Desai sc->reset_count++; 31698bb601acSKashyap D Desai 317085c0a961SKashyap D Desai /* 317185c0a961SKashyap D Desai * Wait for the AEN task to be completed if it is running. 317285c0a961SKashyap D Desai */ 317385c0a961SKashyap D Desai mtx_unlock(&sc->sim_lock); 317485c0a961SKashyap D Desai taskqueue_drain(sc->ev_tq, &sc->ev_task); 317585c0a961SKashyap D Desai mtx_lock(&sc->sim_lock); 317685c0a961SKashyap D Desai 317785c0a961SKashyap D Desai taskqueue_block(sc->ev_tq); 31788bb601acSKashyap D Desai /* Try to reset the controller */ 3179f0c7594bSKashyap D Desai mrsas_reset_ctrl(sc, sc->do_timedout_reset); 31808bb601acSKashyap D Desai 3181665484d8SDoug Ambrisko sc->do_timedout_reset = 0; 31828bb601acSKashyap D Desai sc->reset_in_progress = 0; 31838bb601acSKashyap D Desai tm_target_reset_failed = 0; 31848bb601acSKashyap D Desai mrsas_atomic_set(&sc->target_reset_outstanding, 0); 31858bb601acSKashyap D Desai memset(sc->target_reset_pool, 0, 31868bb601acSKashyap D Desai sizeof(sc->target_reset_pool)); 318785c0a961SKashyap D Desai taskqueue_unblock(sc->ev_tq); 31888bb601acSKashyap D Desai } 31898bb601acSKashyap D Desai 31908bb601acSKashyap D Desai /* Now allow IOs to come to the SIM */ 31918bb601acSKashyap D Desai mrsas_xpt_release(sc); 3192665484d8SDoug Ambrisko } 3193665484d8SDoug Ambrisko } 3194665484d8SDoug Ambrisko mtx_unlock(&sc->sim_lock); 3195665484d8SDoug Ambrisko sc->ocr_thread_active = 0; 3196665484d8SDoug Ambrisko mrsas_kproc_exit(0); 3197665484d8SDoug Ambrisko } 3198665484d8SDoug Ambrisko 31998e727371SKashyap D Desai /* 32008e727371SKashyap D Desai * mrsas_reset_reply_desc: Reset Reply descriptor as part of OCR. 3201665484d8SDoug Ambrisko * input: Adapter Context. 3202665484d8SDoug Ambrisko * 32038e727371SKashyap D Desai * This function will clear reply descriptor so that post OCR driver and FW will 32048e727371SKashyap D Desai * lost old history. 3205665484d8SDoug Ambrisko */ 32068e727371SKashyap D Desai void 32078e727371SKashyap D Desai mrsas_reset_reply_desc(struct mrsas_softc *sc) 3208665484d8SDoug Ambrisko { 3209d18d1b47SKashyap D Desai int i, count; 3210665484d8SDoug Ambrisko pMpi2ReplyDescriptorsUnion_t reply_desc; 3211665484d8SDoug Ambrisko 3212d18d1b47SKashyap D Desai count = sc->msix_vectors > 0 ? sc->msix_vectors : 1; 3213d18d1b47SKashyap D Desai for (i = 0; i < count; i++) 3214d18d1b47SKashyap D Desai sc->last_reply_idx[i] = 0; 3215d18d1b47SKashyap D Desai 3216665484d8SDoug Ambrisko reply_desc = sc->reply_desc_mem; 3217665484d8SDoug Ambrisko for (i = 0; i < sc->reply_q_depth; i++, reply_desc++) { 3218665484d8SDoug Ambrisko reply_desc->Words = MRSAS_ULONG_MAX; 3219665484d8SDoug Ambrisko } 3220665484d8SDoug Ambrisko } 3221665484d8SDoug Ambrisko 32228e727371SKashyap D Desai /* 32238e727371SKashyap D Desai * mrsas_reset_ctrl: Core function to OCR/Kill adapter. 3224665484d8SDoug Ambrisko * input: Adapter Context. 3225665484d8SDoug Ambrisko * 32268e727371SKashyap D Desai * This function will run from thread context so that it can sleep. 1. Do not 32278e727371SKashyap D Desai * handle OCR if FW is in HW critical error. 2. Wait for outstanding command 32288e727371SKashyap D Desai * to complete for 180 seconds. 3. If #2 does not find any outstanding 32298e727371SKashyap D Desai * command Controller is in working state, so skip OCR. Otherwise, do 32308e727371SKashyap D Desai * OCR/kill Adapter based on flag disableOnlineCtrlReset. 4. Start of the 32318e727371SKashyap D Desai * OCR, return all SCSI command back to CAM layer which has ccb_ptr. 5. Post 3232453130d9SPedro F. Giffuni * OCR, Re-fire Management command and move Controller to Operation state. 3233665484d8SDoug Ambrisko */ 32348e727371SKashyap D Desai int 3235f0c7594bSKashyap D Desai mrsas_reset_ctrl(struct mrsas_softc *sc, u_int8_t reset_reason) 3236665484d8SDoug Ambrisko { 3237665484d8SDoug Ambrisko int retval = SUCCESS, i, j, retry = 0; 3238665484d8SDoug Ambrisko u_int32_t host_diag, abs_state, status_reg, reset_adapter; 3239665484d8SDoug Ambrisko union ccb *ccb; 3240665484d8SDoug Ambrisko struct mrsas_mfi_cmd *mfi_cmd; 3241665484d8SDoug Ambrisko struct mrsas_mpt_cmd *mpt_cmd; 3242f0c7594bSKashyap D Desai union mrsas_evt_class_locale class_locale; 32432d53b485SKashyap D Desai MRSAS_REQUEST_DESCRIPTOR_UNION *req_desc; 3244665484d8SDoug Ambrisko 3245665484d8SDoug Ambrisko if (sc->adprecovery == MRSAS_HW_CRITICAL_ERROR) { 3246665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, 3247665484d8SDoug Ambrisko "mrsas: Hardware critical error, returning FAIL.\n"); 3248665484d8SDoug Ambrisko return FAIL; 3249665484d8SDoug Ambrisko } 3250f5fb2237SKashyap D Desai mrsas_set_bit(MRSAS_FUSION_IN_RESET, &sc->reset_flags); 3251665484d8SDoug Ambrisko sc->adprecovery = MRSAS_ADPRESET_SM_INFAULT; 3252665484d8SDoug Ambrisko mrsas_disable_intr(sc); 3253f0c7594bSKashyap D Desai msleep(&sc->ocr_chan, &sc->sim_lock, PRIBIO, "mrsas_ocr", 3254f0c7594bSKashyap D Desai sc->mrsas_fw_fault_check_delay * hz); 3255665484d8SDoug Ambrisko 3256665484d8SDoug Ambrisko /* First try waiting for commands to complete */ 3257f0c7594bSKashyap D Desai if (mrsas_wait_for_outstanding(sc, reset_reason)) { 3258665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_OCR, 3259665484d8SDoug Ambrisko "resetting adapter from %s.\n", 3260665484d8SDoug Ambrisko __func__); 3261665484d8SDoug Ambrisko /* Now return commands back to the CAM layer */ 32625b2490f8SKashyap D Desai mtx_unlock(&sc->sim_lock); 3263665484d8SDoug Ambrisko for (i = 0; i < sc->max_fw_cmds; i++) { 3264665484d8SDoug Ambrisko mpt_cmd = sc->mpt_cmd_list[i]; 32652a1d3bcdSKashyap D Desai 32662a1d3bcdSKashyap D Desai if (mpt_cmd->peer_cmd) { 32672a1d3bcdSKashyap D Desai mrsas_dprint(sc, MRSAS_OCR, 32682a1d3bcdSKashyap D Desai "R1 FP command [%d] - (mpt_cmd) %p, (peer_cmd) %p\n", 32692a1d3bcdSKashyap D Desai i, mpt_cmd, mpt_cmd->peer_cmd); 32702a1d3bcdSKashyap D Desai } 32712a1d3bcdSKashyap D Desai 3272665484d8SDoug Ambrisko if (mpt_cmd->ccb_ptr) { 32732a1d3bcdSKashyap D Desai if (mpt_cmd->callout_owner) { 3274665484d8SDoug Ambrisko ccb = (union ccb *)(mpt_cmd->ccb_ptr); 3275665484d8SDoug Ambrisko ccb->ccb_h.status = CAM_SCSI_BUS_RESET; 3276665484d8SDoug Ambrisko mrsas_cmd_done(sc, mpt_cmd); 32772a1d3bcdSKashyap D Desai } else { 32782a1d3bcdSKashyap D Desai mpt_cmd->ccb_ptr = NULL; 32792a1d3bcdSKashyap D Desai mrsas_release_mpt_cmd(mpt_cmd); 3280665484d8SDoug Ambrisko } 3281665484d8SDoug Ambrisko } 32822a1d3bcdSKashyap D Desai } 32832a1d3bcdSKashyap D Desai 32842a1d3bcdSKashyap D Desai mrsas_atomic_set(&sc->fw_outstanding, 0); 32852a1d3bcdSKashyap D Desai 32865b2490f8SKashyap D Desai mtx_lock(&sc->sim_lock); 3287665484d8SDoug Ambrisko 3288e315cf4dSKashyap D Desai status_reg = mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, 3289665484d8SDoug Ambrisko outbound_scratch_pad)); 3290665484d8SDoug Ambrisko abs_state = status_reg & MFI_STATE_MASK; 3291665484d8SDoug Ambrisko reset_adapter = status_reg & MFI_RESET_ADAPTER; 3292665484d8SDoug Ambrisko if (sc->disableOnlineCtrlReset || 3293665484d8SDoug Ambrisko (abs_state == MFI_STATE_FAULT && !reset_adapter)) { 3294665484d8SDoug Ambrisko /* Reset not supported, kill adapter */ 3295665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_OCR, "Reset not supported, killing adapter.\n"); 3296665484d8SDoug Ambrisko mrsas_kill_hba(sc); 3297665484d8SDoug Ambrisko retval = FAIL; 3298665484d8SDoug Ambrisko goto out; 3299665484d8SDoug Ambrisko } 3300665484d8SDoug Ambrisko /* Now try to reset the chip */ 3301665484d8SDoug Ambrisko for (i = 0; i < MRSAS_FUSION_MAX_RESET_TRIES; i++) { 3302665484d8SDoug Ambrisko mrsas_write_reg(sc, offsetof(mrsas_reg_set, fusion_seq_offset), 3303665484d8SDoug Ambrisko MPI2_WRSEQ_FLUSH_KEY_VALUE); 3304665484d8SDoug Ambrisko mrsas_write_reg(sc, offsetof(mrsas_reg_set, fusion_seq_offset), 3305665484d8SDoug Ambrisko MPI2_WRSEQ_1ST_KEY_VALUE); 3306665484d8SDoug Ambrisko mrsas_write_reg(sc, offsetof(mrsas_reg_set, fusion_seq_offset), 3307665484d8SDoug Ambrisko MPI2_WRSEQ_2ND_KEY_VALUE); 3308665484d8SDoug Ambrisko mrsas_write_reg(sc, offsetof(mrsas_reg_set, fusion_seq_offset), 3309665484d8SDoug Ambrisko MPI2_WRSEQ_3RD_KEY_VALUE); 3310665484d8SDoug Ambrisko mrsas_write_reg(sc, offsetof(mrsas_reg_set, fusion_seq_offset), 3311665484d8SDoug Ambrisko MPI2_WRSEQ_4TH_KEY_VALUE); 3312665484d8SDoug Ambrisko mrsas_write_reg(sc, offsetof(mrsas_reg_set, fusion_seq_offset), 3313665484d8SDoug Ambrisko MPI2_WRSEQ_5TH_KEY_VALUE); 3314665484d8SDoug Ambrisko mrsas_write_reg(sc, offsetof(mrsas_reg_set, fusion_seq_offset), 3315665484d8SDoug Ambrisko MPI2_WRSEQ_6TH_KEY_VALUE); 3316665484d8SDoug Ambrisko 3317665484d8SDoug Ambrisko /* Check that the diag write enable (DRWE) bit is on */ 3318e315cf4dSKashyap D Desai host_diag = mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, 3319665484d8SDoug Ambrisko fusion_host_diag)); 3320665484d8SDoug Ambrisko retry = 0; 3321665484d8SDoug Ambrisko while (!(host_diag & HOST_DIAG_WRITE_ENABLE)) { 3322665484d8SDoug Ambrisko DELAY(100 * 1000); 3323e315cf4dSKashyap D Desai host_diag = mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, 3324665484d8SDoug Ambrisko fusion_host_diag)); 3325665484d8SDoug Ambrisko if (retry++ == 100) { 3326665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_OCR, 3327665484d8SDoug Ambrisko "Host diag unlock failed!\n"); 3328665484d8SDoug Ambrisko break; 3329665484d8SDoug Ambrisko } 3330665484d8SDoug Ambrisko } 3331665484d8SDoug Ambrisko if (!(host_diag & HOST_DIAG_WRITE_ENABLE)) 3332665484d8SDoug Ambrisko continue; 3333665484d8SDoug Ambrisko 3334665484d8SDoug Ambrisko /* Send chip reset command */ 3335665484d8SDoug Ambrisko mrsas_write_reg(sc, offsetof(mrsas_reg_set, fusion_host_diag), 3336665484d8SDoug Ambrisko host_diag | HOST_DIAG_RESET_ADAPTER); 3337665484d8SDoug Ambrisko DELAY(3000 * 1000); 3338665484d8SDoug Ambrisko 3339665484d8SDoug Ambrisko /* Make sure reset adapter bit is cleared */ 3340e315cf4dSKashyap D Desai host_diag = mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, 3341665484d8SDoug Ambrisko fusion_host_diag)); 3342665484d8SDoug Ambrisko retry = 0; 3343665484d8SDoug Ambrisko while (host_diag & HOST_DIAG_RESET_ADAPTER) { 3344665484d8SDoug Ambrisko DELAY(100 * 1000); 3345e315cf4dSKashyap D Desai host_diag = mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, 3346665484d8SDoug Ambrisko fusion_host_diag)); 3347665484d8SDoug Ambrisko if (retry++ == 1000) { 3348665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_OCR, 3349665484d8SDoug Ambrisko "Diag reset adapter never cleared!\n"); 3350665484d8SDoug Ambrisko break; 3351665484d8SDoug Ambrisko } 3352665484d8SDoug Ambrisko } 3353665484d8SDoug Ambrisko if (host_diag & HOST_DIAG_RESET_ADAPTER) 3354665484d8SDoug Ambrisko continue; 3355665484d8SDoug Ambrisko 3356e315cf4dSKashyap D Desai abs_state = mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, 3357665484d8SDoug Ambrisko outbound_scratch_pad)) & MFI_STATE_MASK; 3358665484d8SDoug Ambrisko retry = 0; 3359665484d8SDoug Ambrisko 3360665484d8SDoug Ambrisko while ((abs_state <= MFI_STATE_FW_INIT) && (retry++ < 1000)) { 3361665484d8SDoug Ambrisko DELAY(100 * 1000); 3362e315cf4dSKashyap D Desai abs_state = mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, 3363665484d8SDoug Ambrisko outbound_scratch_pad)) & MFI_STATE_MASK; 3364665484d8SDoug Ambrisko } 3365665484d8SDoug Ambrisko if (abs_state <= MFI_STATE_FW_INIT) { 3366665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_OCR, "firmware state < MFI_STATE_FW_INIT," 3367665484d8SDoug Ambrisko " state = 0x%x\n", abs_state); 3368665484d8SDoug Ambrisko continue; 3369665484d8SDoug Ambrisko } 3370665484d8SDoug Ambrisko /* Wait for FW to become ready */ 3371665484d8SDoug Ambrisko if (mrsas_transition_to_ready(sc, 1)) { 3372665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_OCR, 3373665484d8SDoug Ambrisko "mrsas: Failed to transition controller to ready.\n"); 3374665484d8SDoug Ambrisko continue; 3375665484d8SDoug Ambrisko } 3376665484d8SDoug Ambrisko mrsas_reset_reply_desc(sc); 3377665484d8SDoug Ambrisko if (mrsas_ioc_init(sc)) { 3378665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_OCR, "mrsas_ioc_init() failed!\n"); 3379665484d8SDoug Ambrisko continue; 3380665484d8SDoug Ambrisko } 3381665484d8SDoug Ambrisko for (j = 0; j < sc->max_fw_cmds; j++) { 3382665484d8SDoug Ambrisko mpt_cmd = sc->mpt_cmd_list[j]; 3383665484d8SDoug Ambrisko if (mpt_cmd->sync_cmd_idx != (u_int32_t)MRSAS_ULONG_MAX) { 3384665484d8SDoug Ambrisko mfi_cmd = sc->mfi_cmd_list[mpt_cmd->sync_cmd_idx]; 33852d53b485SKashyap D Desai /* If not an IOCTL then release the command else re-fire */ 33862d53b485SKashyap D Desai if (!mfi_cmd->sync_cmd) { 3387665484d8SDoug Ambrisko mrsas_release_mfi_cmd(mfi_cmd); 33882d53b485SKashyap D Desai } else { 33892d53b485SKashyap D Desai req_desc = mrsas_get_request_desc(sc, 33902d53b485SKashyap D Desai mfi_cmd->cmd_id.context.smid - 1); 33912d53b485SKashyap D Desai mrsas_dprint(sc, MRSAS_OCR, 33922d53b485SKashyap D Desai "Re-fire command DCMD opcode 0x%x index %d\n ", 33932d53b485SKashyap D Desai mfi_cmd->frame->dcmd.opcode, j); 33942d53b485SKashyap D Desai if (!req_desc) 33952d53b485SKashyap D Desai device_printf(sc->mrsas_dev, 33962d53b485SKashyap D Desai "Cannot build MPT cmd.\n"); 33972d53b485SKashyap D Desai else 33982d53b485SKashyap D Desai mrsas_fire_cmd(sc, req_desc->addr.u.low, 33992d53b485SKashyap D Desai req_desc->addr.u.high); 34002d53b485SKashyap D Desai } 3401665484d8SDoug Ambrisko } 3402665484d8SDoug Ambrisko } 3403f0c7594bSKashyap D Desai 3404665484d8SDoug Ambrisko /* Reset load balance info */ 3405665484d8SDoug Ambrisko memset(sc->load_balance_info, 0, 34064799d485SKashyap D Desai sizeof(LD_LOAD_BALANCE_INFO) * MAX_LOGICAL_DRIVES_EXT); 3407665484d8SDoug Ambrisko 3408af51c29fSKashyap D Desai if (mrsas_get_ctrl_info(sc)) { 3409af51c29fSKashyap D Desai mrsas_kill_hba(sc); 34102f863eb8SKashyap D Desai retval = FAIL; 34112f863eb8SKashyap D Desai goto out; 3412af51c29fSKashyap D Desai } 3413665484d8SDoug Ambrisko if (!mrsas_get_map_info(sc)) 3414665484d8SDoug Ambrisko mrsas_sync_map_info(sc); 3415665484d8SDoug Ambrisko 3416a688fcd0SKashyap D Desai megasas_setup_jbod_map(sc); 3417a688fcd0SKashyap D Desai 34182909aab4SKashyap D Desai if ((sc->is_ventura || sc->is_aero) && sc->streamDetectByLD) { 3419821df4b9SKashyap D Desai for (j = 0; j < MAX_LOGICAL_DRIVES_EXT; ++j) { 3420821df4b9SKashyap D Desai memset(sc->streamDetectByLD[i], 0, sizeof(LD_STREAM_DETECT)); 3421821df4b9SKashyap D Desai sc->streamDetectByLD[i]->mruBitMap = MR_STREAM_BITMAP; 3422821df4b9SKashyap D Desai } 3423821df4b9SKashyap D Desai } 3424821df4b9SKashyap D Desai 34252f863eb8SKashyap D Desai mrsas_clear_bit(MRSAS_FUSION_IN_RESET, &sc->reset_flags); 34262f863eb8SKashyap D Desai mrsas_enable_intr(sc); 34272f863eb8SKashyap D Desai sc->adprecovery = MRSAS_HBA_OPERATIONAL; 34282f863eb8SKashyap D Desai 3429f0c7594bSKashyap D Desai /* Register AEN with FW for last sequence number */ 3430f0c7594bSKashyap D Desai class_locale.members.reserved = 0; 3431f0c7594bSKashyap D Desai class_locale.members.locale = MR_EVT_LOCALE_ALL; 3432f0c7594bSKashyap D Desai class_locale.members.class = MR_EVT_CLASS_DEBUG; 3433f0c7594bSKashyap D Desai 34342d53b485SKashyap D Desai mtx_unlock(&sc->sim_lock); 3435f0c7594bSKashyap D Desai if (mrsas_register_aen(sc, sc->last_seq_num, 3436f0c7594bSKashyap D Desai class_locale.word)) { 3437f0c7594bSKashyap D Desai device_printf(sc->mrsas_dev, 3438f0c7594bSKashyap D Desai "ERROR: AEN registration FAILED from OCR !!! " 3439f0c7594bSKashyap D Desai "Further events from the controller cannot be notified." 3440f0c7594bSKashyap D Desai "Either there is some problem in the controller" 3441f0c7594bSKashyap D Desai "or the controller does not support AEN.\n" 3442f0c7594bSKashyap D Desai "Please contact to the SUPPORT TEAM if the problem persists\n"); 3443f0c7594bSKashyap D Desai } 34442d53b485SKashyap D Desai mtx_lock(&sc->sim_lock); 34452d53b485SKashyap D Desai 3446665484d8SDoug Ambrisko /* Adapter reset completed successfully */ 3447665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Reset successful\n"); 3448665484d8SDoug Ambrisko retval = SUCCESS; 3449665484d8SDoug Ambrisko goto out; 3450665484d8SDoug Ambrisko } 3451665484d8SDoug Ambrisko /* Reset failed, kill the adapter */ 3452665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Reset failed, killing adapter.\n"); 3453665484d8SDoug Ambrisko mrsas_kill_hba(sc); 3454665484d8SDoug Ambrisko retval = FAIL; 3455665484d8SDoug Ambrisko } else { 3456f5fb2237SKashyap D Desai mrsas_clear_bit(MRSAS_FUSION_IN_RESET, &sc->reset_flags); 3457665484d8SDoug Ambrisko mrsas_enable_intr(sc); 3458665484d8SDoug Ambrisko sc->adprecovery = MRSAS_HBA_OPERATIONAL; 3459665484d8SDoug Ambrisko } 3460665484d8SDoug Ambrisko out: 3461f5fb2237SKashyap D Desai mrsas_clear_bit(MRSAS_FUSION_IN_RESET, &sc->reset_flags); 3462665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_OCR, 3463665484d8SDoug Ambrisko "Reset Exit with %d.\n", retval); 3464665484d8SDoug Ambrisko return retval; 3465665484d8SDoug Ambrisko } 3466665484d8SDoug Ambrisko 34678e727371SKashyap D Desai /* 34688e727371SKashyap D Desai * mrsas_kill_hba: Kill HBA when OCR is not supported 3469665484d8SDoug Ambrisko * input: Adapter Context. 3470665484d8SDoug Ambrisko * 3471665484d8SDoug Ambrisko * This function will kill HBA when OCR is not supported. 3472665484d8SDoug Ambrisko */ 34738e727371SKashyap D Desai void 34748e727371SKashyap D Desai mrsas_kill_hba(struct mrsas_softc *sc) 3475665484d8SDoug Ambrisko { 3476daeed973SKashyap D Desai sc->adprecovery = MRSAS_HW_CRITICAL_ERROR; 3477f0c7594bSKashyap D Desai DELAY(1000 * 1000); 3478665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_OCR, "%s\n", __func__); 3479665484d8SDoug Ambrisko mrsas_write_reg(sc, offsetof(mrsas_reg_set, doorbell), 3480665484d8SDoug Ambrisko MFI_STOP_ADP); 3481665484d8SDoug Ambrisko /* Flush */ 3482665484d8SDoug Ambrisko mrsas_read_reg(sc, offsetof(mrsas_reg_set, doorbell)); 3483daeed973SKashyap D Desai mrsas_complete_outstanding_ioctls(sc); 3484daeed973SKashyap D Desai } 3485daeed973SKashyap D Desai 3486daeed973SKashyap D Desai /** 3487daeed973SKashyap D Desai * mrsas_complete_outstanding_ioctls Complete pending IOCTLS after kill_hba 3488daeed973SKashyap D Desai * input: Controller softc 3489daeed973SKashyap D Desai * 3490daeed973SKashyap D Desai * Returns void 3491daeed973SKashyap D Desai */ 3492dbcc81dfSKashyap D Desai void 3493dbcc81dfSKashyap D Desai mrsas_complete_outstanding_ioctls(struct mrsas_softc *sc) 3494dbcc81dfSKashyap D Desai { 3495daeed973SKashyap D Desai int i; 3496daeed973SKashyap D Desai struct mrsas_mpt_cmd *cmd_mpt; 3497daeed973SKashyap D Desai struct mrsas_mfi_cmd *cmd_mfi; 3498daeed973SKashyap D Desai u_int32_t count, MSIxIndex; 3499daeed973SKashyap D Desai 3500daeed973SKashyap D Desai count = sc->msix_vectors > 0 ? sc->msix_vectors : 1; 3501daeed973SKashyap D Desai for (i = 0; i < sc->max_fw_cmds; i++) { 3502daeed973SKashyap D Desai cmd_mpt = sc->mpt_cmd_list[i]; 3503daeed973SKashyap D Desai 3504daeed973SKashyap D Desai if (cmd_mpt->sync_cmd_idx != (u_int32_t)MRSAS_ULONG_MAX) { 3505daeed973SKashyap D Desai cmd_mfi = sc->mfi_cmd_list[cmd_mpt->sync_cmd_idx]; 3506daeed973SKashyap D Desai if (cmd_mfi->sync_cmd && cmd_mfi->frame->hdr.cmd != MFI_CMD_ABORT) { 3507daeed973SKashyap D Desai for (MSIxIndex = 0; MSIxIndex < count; MSIxIndex++) 3508daeed973SKashyap D Desai mrsas_complete_mptmfi_passthru(sc, cmd_mfi, 3509503c4f8dSKashyap D Desai cmd_mpt->io_request->RaidContext.raid_context.status); 3510daeed973SKashyap D Desai } 3511daeed973SKashyap D Desai } 3512daeed973SKashyap D Desai } 3513665484d8SDoug Ambrisko } 3514665484d8SDoug Ambrisko 35158e727371SKashyap D Desai /* 35168e727371SKashyap D Desai * mrsas_wait_for_outstanding: Wait for outstanding commands 3517665484d8SDoug Ambrisko * input: Adapter Context. 3518665484d8SDoug Ambrisko * 35198e727371SKashyap D Desai * This function will wait for 180 seconds for outstanding commands to be 35208e727371SKashyap D Desai * completed. 3521665484d8SDoug Ambrisko */ 35228e727371SKashyap D Desai int 3523f0c7594bSKashyap D Desai mrsas_wait_for_outstanding(struct mrsas_softc *sc, u_int8_t check_reason) 3524665484d8SDoug Ambrisko { 3525665484d8SDoug Ambrisko int i, outstanding, retval = 0; 3526d18d1b47SKashyap D Desai u_int32_t fw_state, count, MSIxIndex; 3527d18d1b47SKashyap D Desai 3528665484d8SDoug Ambrisko 3529665484d8SDoug Ambrisko for (i = 0; i < MRSAS_RESET_WAIT_TIME; i++) { 3530665484d8SDoug Ambrisko if (sc->remove_in_progress) { 3531665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_OCR, 3532665484d8SDoug Ambrisko "Driver remove or shutdown called.\n"); 3533665484d8SDoug Ambrisko retval = 1; 3534665484d8SDoug Ambrisko goto out; 3535665484d8SDoug Ambrisko } 3536665484d8SDoug Ambrisko /* Check if firmware is in fault state */ 3537e315cf4dSKashyap D Desai fw_state = mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, 3538665484d8SDoug Ambrisko outbound_scratch_pad)) & MFI_STATE_MASK; 3539665484d8SDoug Ambrisko if (fw_state == MFI_STATE_FAULT) { 3540665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_OCR, 3541665484d8SDoug Ambrisko "Found FW in FAULT state, will reset adapter.\n"); 3542e2e8afb1SKashyap D Desai count = sc->msix_vectors > 0 ? sc->msix_vectors : 1; 3543e2e8afb1SKashyap D Desai mtx_unlock(&sc->sim_lock); 3544e2e8afb1SKashyap D Desai for (MSIxIndex = 0; MSIxIndex < count; MSIxIndex++) 3545e2e8afb1SKashyap D Desai mrsas_complete_cmd(sc, MSIxIndex); 3546e2e8afb1SKashyap D Desai mtx_lock(&sc->sim_lock); 3547665484d8SDoug Ambrisko retval = 1; 3548665484d8SDoug Ambrisko goto out; 3549665484d8SDoug Ambrisko } 3550f0c7594bSKashyap D Desai if (check_reason == MFI_DCMD_TIMEOUT_OCR) { 3551f0c7594bSKashyap D Desai mrsas_dprint(sc, MRSAS_OCR, 3552f0c7594bSKashyap D Desai "DCMD IO TIMEOUT detected, will reset adapter.\n"); 3553f0c7594bSKashyap D Desai retval = 1; 3554f0c7594bSKashyap D Desai goto out; 3555f0c7594bSKashyap D Desai } 3556f5fb2237SKashyap D Desai outstanding = mrsas_atomic_read(&sc->fw_outstanding); 3557665484d8SDoug Ambrisko if (!outstanding) 3558665484d8SDoug Ambrisko goto out; 3559665484d8SDoug Ambrisko 3560665484d8SDoug Ambrisko if (!(i % MRSAS_RESET_NOTICE_INTERVAL)) { 3561665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_OCR, "[%2d]waiting for %d " 3562665484d8SDoug Ambrisko "commands to complete\n", i, outstanding); 3563d18d1b47SKashyap D Desai count = sc->msix_vectors > 0 ? sc->msix_vectors : 1; 35642d53b485SKashyap D Desai mtx_unlock(&sc->sim_lock); 3565d18d1b47SKashyap D Desai for (MSIxIndex = 0; MSIxIndex < count; MSIxIndex++) 3566d18d1b47SKashyap D Desai mrsas_complete_cmd(sc, MSIxIndex); 35672d53b485SKashyap D Desai mtx_lock(&sc->sim_lock); 3568665484d8SDoug Ambrisko } 3569665484d8SDoug Ambrisko DELAY(1000 * 1000); 3570665484d8SDoug Ambrisko } 3571665484d8SDoug Ambrisko 3572f5fb2237SKashyap D Desai if (mrsas_atomic_read(&sc->fw_outstanding)) { 3573665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_OCR, 3574665484d8SDoug Ambrisko " pending commands remain after waiting," 3575665484d8SDoug Ambrisko " will reset adapter.\n"); 3576665484d8SDoug Ambrisko retval = 1; 3577665484d8SDoug Ambrisko } 3578665484d8SDoug Ambrisko out: 3579665484d8SDoug Ambrisko return retval; 3580665484d8SDoug Ambrisko } 3581665484d8SDoug Ambrisko 35828e727371SKashyap D Desai /* 3583665484d8SDoug Ambrisko * mrsas_release_mfi_cmd: Return a cmd to free command pool 3584665484d8SDoug Ambrisko * input: Command packet for return to free cmd pool 3585665484d8SDoug Ambrisko * 3586731b7561SKashyap D Desai * This function returns the MFI & MPT command to the command list. 3587665484d8SDoug Ambrisko */ 35888e727371SKashyap D Desai void 3589731b7561SKashyap D Desai mrsas_release_mfi_cmd(struct mrsas_mfi_cmd *cmd_mfi) 3590665484d8SDoug Ambrisko { 3591731b7561SKashyap D Desai struct mrsas_softc *sc = cmd_mfi->sc; 3592731b7561SKashyap D Desai struct mrsas_mpt_cmd *cmd_mpt; 3593731b7561SKashyap D Desai 3594665484d8SDoug Ambrisko 3595665484d8SDoug Ambrisko mtx_lock(&sc->mfi_cmd_pool_lock); 3596731b7561SKashyap D Desai /* 3597731b7561SKashyap D Desai * Release the mpt command (if at all it is allocated 3598731b7561SKashyap D Desai * associated with the mfi command 3599731b7561SKashyap D Desai */ 3600731b7561SKashyap D Desai if (cmd_mfi->cmd_id.context.smid) { 3601731b7561SKashyap D Desai mtx_lock(&sc->mpt_cmd_pool_lock); 3602731b7561SKashyap D Desai /* Get the mpt cmd from mfi cmd frame's smid value */ 3603731b7561SKashyap D Desai cmd_mpt = sc->mpt_cmd_list[cmd_mfi->cmd_id.context.smid-1]; 3604731b7561SKashyap D Desai cmd_mpt->flags = 0; 3605731b7561SKashyap D Desai cmd_mpt->sync_cmd_idx = (u_int32_t)MRSAS_ULONG_MAX; 3606731b7561SKashyap D Desai TAILQ_INSERT_HEAD(&(sc->mrsas_mpt_cmd_list_head), cmd_mpt, next); 3607731b7561SKashyap D Desai mtx_unlock(&sc->mpt_cmd_pool_lock); 3608731b7561SKashyap D Desai } 3609731b7561SKashyap D Desai /* Release the mfi command */ 3610731b7561SKashyap D Desai cmd_mfi->ccb_ptr = NULL; 3611731b7561SKashyap D Desai cmd_mfi->cmd_id.frame_count = 0; 3612731b7561SKashyap D Desai TAILQ_INSERT_HEAD(&(sc->mrsas_mfi_cmd_list_head), cmd_mfi, next); 3613665484d8SDoug Ambrisko mtx_unlock(&sc->mfi_cmd_pool_lock); 3614665484d8SDoug Ambrisko 3615665484d8SDoug Ambrisko return; 3616665484d8SDoug Ambrisko } 3617665484d8SDoug Ambrisko 36188e727371SKashyap D Desai /* 36198e727371SKashyap D Desai * mrsas_get_controller_info: Returns FW's controller structure 3620665484d8SDoug Ambrisko * input: Adapter soft state 3621665484d8SDoug Ambrisko * Controller information structure 3622665484d8SDoug Ambrisko * 36238e727371SKashyap D Desai * Issues an internal command (DCMD) to get the FW's controller structure. This 36248e727371SKashyap D Desai * information is mainly used to find out the maximum IO transfer per command 36258e727371SKashyap D Desai * supported by the FW. 3626665484d8SDoug Ambrisko */ 36278e727371SKashyap D Desai static int 3628af51c29fSKashyap D Desai mrsas_get_ctrl_info(struct mrsas_softc *sc) 3629665484d8SDoug Ambrisko { 3630665484d8SDoug Ambrisko int retcode = 0; 3631f0c7594bSKashyap D Desai u_int8_t do_ocr = 1; 3632665484d8SDoug Ambrisko struct mrsas_mfi_cmd *cmd; 3633665484d8SDoug Ambrisko struct mrsas_dcmd_frame *dcmd; 3634665484d8SDoug Ambrisko 3635665484d8SDoug Ambrisko cmd = mrsas_get_mfi_cmd(sc); 3636665484d8SDoug Ambrisko 3637665484d8SDoug Ambrisko if (!cmd) { 3638665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Failed to get a free cmd\n"); 3639665484d8SDoug Ambrisko return -ENOMEM; 3640665484d8SDoug Ambrisko } 3641665484d8SDoug Ambrisko dcmd = &cmd->frame->dcmd; 3642665484d8SDoug Ambrisko 3643665484d8SDoug Ambrisko if (mrsas_alloc_ctlr_info_cmd(sc) != SUCCESS) { 3644665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot allocate get ctlr info cmd\n"); 3645665484d8SDoug Ambrisko mrsas_release_mfi_cmd(cmd); 3646665484d8SDoug Ambrisko return -ENOMEM; 3647665484d8SDoug Ambrisko } 3648665484d8SDoug Ambrisko memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); 3649665484d8SDoug Ambrisko 3650665484d8SDoug Ambrisko dcmd->cmd = MFI_CMD_DCMD; 3651665484d8SDoug Ambrisko dcmd->cmd_status = 0xFF; 3652665484d8SDoug Ambrisko dcmd->sge_count = 1; 3653665484d8SDoug Ambrisko dcmd->flags = MFI_FRAME_DIR_READ; 3654665484d8SDoug Ambrisko dcmd->timeout = 0; 3655665484d8SDoug Ambrisko dcmd->pad_0 = 0; 3656665484d8SDoug Ambrisko dcmd->data_xfer_len = sizeof(struct mrsas_ctrl_info); 3657665484d8SDoug Ambrisko dcmd->opcode = MR_DCMD_CTRL_GET_INFO; 3658665484d8SDoug Ambrisko dcmd->sgl.sge32[0].phys_addr = sc->ctlr_info_phys_addr; 3659665484d8SDoug Ambrisko dcmd->sgl.sge32[0].length = sizeof(struct mrsas_ctrl_info); 3660665484d8SDoug Ambrisko 36618bc320adSKashyap D Desai if (!sc->mask_interrupts) 36628bc320adSKashyap D Desai retcode = mrsas_issue_blocked_cmd(sc, cmd); 36638bc320adSKashyap D Desai else 3664f0c7594bSKashyap D Desai retcode = mrsas_issue_polled(sc, cmd); 36658bc320adSKashyap D Desai 3666f0c7594bSKashyap D Desai if (retcode == ETIMEDOUT) 3667f0c7594bSKashyap D Desai goto dcmd_timeout; 3668665484d8SDoug Ambrisko else 3669f0c7594bSKashyap D Desai memcpy(sc->ctrl_info, sc->ctlr_info_mem, sizeof(struct mrsas_ctrl_info)); 3670665484d8SDoug Ambrisko 3671f0c7594bSKashyap D Desai do_ocr = 0; 3672af51c29fSKashyap D Desai mrsas_update_ext_vd_details(sc); 3673af51c29fSKashyap D Desai 3674a688fcd0SKashyap D Desai sc->use_seqnum_jbod_fp = 3675a688fcd0SKashyap D Desai sc->ctrl_info->adapterOperations3.useSeqNumJbodFP; 3676c376f864SKashyap D Desai sc->support_morethan256jbod = 3677c376f864SKashyap D Desai sc->ctrl_info->adapterOperations4.supportPdMapTargetId; 3678c376f864SKashyap D Desai 36798bc320adSKashyap D Desai sc->disableOnlineCtrlReset = 36808bc320adSKashyap D Desai sc->ctrl_info->properties.OnOffProperties.disableOnlineCtrlReset; 3681a688fcd0SKashyap D Desai 3682f0c7594bSKashyap D Desai dcmd_timeout: 3683665484d8SDoug Ambrisko mrsas_free_ctlr_info_cmd(sc); 3684f0c7594bSKashyap D Desai 3685f0c7594bSKashyap D Desai if (do_ocr) 3686f0c7594bSKashyap D Desai sc->do_timedout_reset = MFI_DCMD_TIMEOUT_OCR; 3687f0c7594bSKashyap D Desai 36888bc320adSKashyap D Desai if (!sc->mask_interrupts) 36898bc320adSKashyap D Desai mrsas_release_mfi_cmd(cmd); 36908bc320adSKashyap D Desai 3691665484d8SDoug Ambrisko return (retcode); 3692665484d8SDoug Ambrisko } 3693665484d8SDoug Ambrisko 36948e727371SKashyap D Desai /* 3695af51c29fSKashyap D Desai * mrsas_update_ext_vd_details : Update details w.r.t Extended VD 3696af51c29fSKashyap D Desai * input: 3697af51c29fSKashyap D Desai * sc - Controller's softc 3698af51c29fSKashyap D Desai */ 3699dbcc81dfSKashyap D Desai static void 3700dbcc81dfSKashyap D Desai mrsas_update_ext_vd_details(struct mrsas_softc *sc) 3701af51c29fSKashyap D Desai { 37024ad83576SKashyap D Desai u_int32_t ventura_map_sz = 0; 3703af51c29fSKashyap D Desai sc->max256vdSupport = 3704af51c29fSKashyap D Desai sc->ctrl_info->adapterOperations3.supportMaxExtLDs; 37054ad83576SKashyap D Desai 3706af51c29fSKashyap D Desai /* Below is additional check to address future FW enhancement */ 3707af51c29fSKashyap D Desai if (sc->ctrl_info->max_lds > 64) 3708af51c29fSKashyap D Desai sc->max256vdSupport = 1; 3709af51c29fSKashyap D Desai 3710af51c29fSKashyap D Desai sc->drv_supported_vd_count = MRSAS_MAX_LD_CHANNELS 3711af51c29fSKashyap D Desai * MRSAS_MAX_DEV_PER_CHANNEL; 3712af51c29fSKashyap D Desai sc->drv_supported_pd_count = MRSAS_MAX_PD_CHANNELS 3713af51c29fSKashyap D Desai * MRSAS_MAX_DEV_PER_CHANNEL; 3714af51c29fSKashyap D Desai if (sc->max256vdSupport) { 3715af51c29fSKashyap D Desai sc->fw_supported_vd_count = MAX_LOGICAL_DRIVES_EXT; 3716af51c29fSKashyap D Desai sc->fw_supported_pd_count = MAX_PHYSICAL_DEVICES; 3717af51c29fSKashyap D Desai } else { 3718af51c29fSKashyap D Desai sc->fw_supported_vd_count = MAX_LOGICAL_DRIVES; 3719af51c29fSKashyap D Desai sc->fw_supported_pd_count = MAX_PHYSICAL_DEVICES; 3720af51c29fSKashyap D Desai } 3721af51c29fSKashyap D Desai 37224ad83576SKashyap D Desai if (sc->maxRaidMapSize) { 37234ad83576SKashyap D Desai ventura_map_sz = sc->maxRaidMapSize * 37244ad83576SKashyap D Desai MR_MIN_MAP_SIZE; 37254ad83576SKashyap D Desai sc->current_map_sz = ventura_map_sz; 37264ad83576SKashyap D Desai sc->max_map_sz = ventura_map_sz; 37274ad83576SKashyap D Desai } else { 3728af51c29fSKashyap D Desai sc->old_map_sz = sizeof(MR_FW_RAID_MAP) + 37294ad83576SKashyap D Desai (sizeof(MR_LD_SPAN_MAP) * (sc->fw_supported_vd_count - 1)); 3730af51c29fSKashyap D Desai sc->new_map_sz = sizeof(MR_FW_RAID_MAP_EXT); 3731af51c29fSKashyap D Desai sc->max_map_sz = max(sc->old_map_sz, sc->new_map_sz); 3732af51c29fSKashyap D Desai if (sc->max256vdSupport) 3733af51c29fSKashyap D Desai sc->current_map_sz = sc->new_map_sz; 3734af51c29fSKashyap D Desai else 3735af51c29fSKashyap D Desai sc->current_map_sz = sc->old_map_sz; 3736af51c29fSKashyap D Desai } 3737af51c29fSKashyap D Desai 37384ad83576SKashyap D Desai sc->drv_map_sz = sizeof(MR_DRV_RAID_MAP_ALL); 37394ad83576SKashyap D Desai #if VD_EXT_DEBUG 37404ad83576SKashyap D Desai device_printf(sc->mrsas_dev, "sc->maxRaidMapSize 0x%x \n", 37414ad83576SKashyap D Desai sc->maxRaidMapSize); 37424ad83576SKashyap D Desai device_printf(sc->mrsas_dev, 37434ad83576SKashyap D Desai "new_map_sz = 0x%x, old_map_sz = 0x%x, " 37444ad83576SKashyap D Desai "ventura_map_sz = 0x%x, current_map_sz = 0x%x " 37454ad83576SKashyap D Desai "fusion->drv_map_sz =0x%x, size of driver raid map 0x%lx \n", 37464ad83576SKashyap D Desai sc->new_map_sz, sc->old_map_sz, ventura_map_sz, 37474ad83576SKashyap D Desai sc->current_map_sz, sc->drv_map_sz, sizeof(MR_DRV_RAID_MAP_ALL)); 37484ad83576SKashyap D Desai #endif 37494ad83576SKashyap D Desai } 37504ad83576SKashyap D Desai 3751af51c29fSKashyap D Desai /* 3752665484d8SDoug Ambrisko * mrsas_alloc_ctlr_info_cmd: Allocates memory for controller info command 3753665484d8SDoug Ambrisko * input: Adapter soft state 3754665484d8SDoug Ambrisko * 3755665484d8SDoug Ambrisko * Allocates DMAable memory for the controller info internal command. 3756665484d8SDoug Ambrisko */ 37578e727371SKashyap D Desai int 37588e727371SKashyap D Desai mrsas_alloc_ctlr_info_cmd(struct mrsas_softc *sc) 3759665484d8SDoug Ambrisko { 3760665484d8SDoug Ambrisko int ctlr_info_size; 3761665484d8SDoug Ambrisko 3762665484d8SDoug Ambrisko /* Allocate get controller info command */ 3763665484d8SDoug Ambrisko ctlr_info_size = sizeof(struct mrsas_ctrl_info); 37648e727371SKashyap D Desai if (bus_dma_tag_create(sc->mrsas_parent_tag, 37658e727371SKashyap D Desai 1, 0, 37668e727371SKashyap D Desai BUS_SPACE_MAXADDR_32BIT, 37678e727371SKashyap D Desai BUS_SPACE_MAXADDR, 37688e727371SKashyap D Desai NULL, NULL, 37698e727371SKashyap D Desai ctlr_info_size, 37708e727371SKashyap D Desai 1, 37718e727371SKashyap D Desai ctlr_info_size, 37728e727371SKashyap D Desai BUS_DMA_ALLOCNOW, 37738e727371SKashyap D Desai NULL, NULL, 3774665484d8SDoug Ambrisko &sc->ctlr_info_tag)) { 3775665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot allocate ctlr info tag\n"); 3776665484d8SDoug Ambrisko return (ENOMEM); 3777665484d8SDoug Ambrisko } 3778665484d8SDoug Ambrisko if (bus_dmamem_alloc(sc->ctlr_info_tag, (void **)&sc->ctlr_info_mem, 3779665484d8SDoug Ambrisko BUS_DMA_NOWAIT, &sc->ctlr_info_dmamap)) { 3780665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot allocate ctlr info cmd mem\n"); 3781665484d8SDoug Ambrisko return (ENOMEM); 3782665484d8SDoug Ambrisko } 3783665484d8SDoug Ambrisko if (bus_dmamap_load(sc->ctlr_info_tag, sc->ctlr_info_dmamap, 3784665484d8SDoug Ambrisko sc->ctlr_info_mem, ctlr_info_size, mrsas_addr_cb, 3785665484d8SDoug Ambrisko &sc->ctlr_info_phys_addr, BUS_DMA_NOWAIT)) { 3786665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot load ctlr info cmd mem\n"); 3787665484d8SDoug Ambrisko return (ENOMEM); 3788665484d8SDoug Ambrisko } 3789665484d8SDoug Ambrisko memset(sc->ctlr_info_mem, 0, ctlr_info_size); 3790665484d8SDoug Ambrisko return (0); 3791665484d8SDoug Ambrisko } 3792665484d8SDoug Ambrisko 37938e727371SKashyap D Desai /* 3794665484d8SDoug Ambrisko * mrsas_free_ctlr_info_cmd: Free memory for controller info command 3795665484d8SDoug Ambrisko * input: Adapter soft state 3796665484d8SDoug Ambrisko * 3797665484d8SDoug Ambrisko * Deallocates memory of the get controller info cmd. 3798665484d8SDoug Ambrisko */ 37998e727371SKashyap D Desai void 38008e727371SKashyap D Desai mrsas_free_ctlr_info_cmd(struct mrsas_softc *sc) 3801665484d8SDoug Ambrisko { 3802665484d8SDoug Ambrisko if (sc->ctlr_info_phys_addr) 3803665484d8SDoug Ambrisko bus_dmamap_unload(sc->ctlr_info_tag, sc->ctlr_info_dmamap); 3804665484d8SDoug Ambrisko if (sc->ctlr_info_mem != NULL) 3805665484d8SDoug Ambrisko bus_dmamem_free(sc->ctlr_info_tag, sc->ctlr_info_mem, sc->ctlr_info_dmamap); 3806665484d8SDoug Ambrisko if (sc->ctlr_info_tag != NULL) 3807665484d8SDoug Ambrisko bus_dma_tag_destroy(sc->ctlr_info_tag); 3808665484d8SDoug Ambrisko } 3809665484d8SDoug Ambrisko 38108e727371SKashyap D Desai /* 3811665484d8SDoug Ambrisko * mrsas_issue_polled: Issues a polling command 3812665484d8SDoug Ambrisko * inputs: Adapter soft state 3813665484d8SDoug Ambrisko * Command packet to be issued 3814665484d8SDoug Ambrisko * 38158e727371SKashyap D Desai * This function is for posting of internal commands to Firmware. MFI requires 38168e727371SKashyap D Desai * the cmd_status to be set to 0xFF before posting. The maximun wait time of 38178e727371SKashyap D Desai * the poll response timer is 180 seconds. 3818665484d8SDoug Ambrisko */ 38198e727371SKashyap D Desai int 38208e727371SKashyap D Desai mrsas_issue_polled(struct mrsas_softc *sc, struct mrsas_mfi_cmd *cmd) 3821665484d8SDoug Ambrisko { 3822665484d8SDoug Ambrisko struct mrsas_header *frame_hdr = &cmd->frame->hdr; 3823665484d8SDoug Ambrisko u_int8_t max_wait = MRSAS_INTERNAL_CMD_WAIT_TIME; 3824f0c7594bSKashyap D Desai int i, retcode = SUCCESS; 3825665484d8SDoug Ambrisko 3826665484d8SDoug Ambrisko frame_hdr->cmd_status = 0xFF; 3827665484d8SDoug Ambrisko frame_hdr->flags |= MFI_FRAME_DONT_POST_IN_REPLY_QUEUE; 3828665484d8SDoug Ambrisko 3829665484d8SDoug Ambrisko /* Issue the frame using inbound queue port */ 3830665484d8SDoug Ambrisko if (mrsas_issue_dcmd(sc, cmd)) { 3831665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot issue DCMD internal command.\n"); 3832665484d8SDoug Ambrisko return (1); 3833665484d8SDoug Ambrisko } 3834665484d8SDoug Ambrisko /* 3835665484d8SDoug Ambrisko * Poll response timer to wait for Firmware response. While this 3836665484d8SDoug Ambrisko * timer with the DELAY call could block CPU, the time interval for 3837665484d8SDoug Ambrisko * this is only 1 millisecond. 3838665484d8SDoug Ambrisko */ 3839665484d8SDoug Ambrisko if (frame_hdr->cmd_status == 0xFF) { 3840665484d8SDoug Ambrisko for (i = 0; i < (max_wait * 1000); i++) { 3841665484d8SDoug Ambrisko if (frame_hdr->cmd_status == 0xFF) 3842665484d8SDoug Ambrisko DELAY(1000); 3843665484d8SDoug Ambrisko else 3844665484d8SDoug Ambrisko break; 3845665484d8SDoug Ambrisko } 3846665484d8SDoug Ambrisko } 3847f0c7594bSKashyap D Desai if (frame_hdr->cmd_status == 0xFF) { 3848f0c7594bSKashyap D Desai device_printf(sc->mrsas_dev, "DCMD timed out after %d " 3849f0c7594bSKashyap D Desai "seconds from %s\n", max_wait, __func__); 3850f0c7594bSKashyap D Desai device_printf(sc->mrsas_dev, "DCMD opcode 0x%X\n", 3851f0c7594bSKashyap D Desai cmd->frame->dcmd.opcode); 3852f0c7594bSKashyap D Desai retcode = ETIMEDOUT; 3853665484d8SDoug Ambrisko } 3854665484d8SDoug Ambrisko return (retcode); 3855665484d8SDoug Ambrisko } 3856665484d8SDoug Ambrisko 38578e727371SKashyap D Desai /* 38588e727371SKashyap D Desai * mrsas_issue_dcmd: Issues a MFI Pass thru cmd 38598e727371SKashyap D Desai * input: Adapter soft state mfi cmd pointer 3860665484d8SDoug Ambrisko * 3861665484d8SDoug Ambrisko * This function is called by mrsas_issued_blocked_cmd() and 38628e727371SKashyap D Desai * mrsas_issued_polled(), to build the MPT command and then fire the command 38638e727371SKashyap D Desai * to Firmware. 3864665484d8SDoug Ambrisko */ 3865665484d8SDoug Ambrisko int 3866665484d8SDoug Ambrisko mrsas_issue_dcmd(struct mrsas_softc *sc, struct mrsas_mfi_cmd *cmd) 3867665484d8SDoug Ambrisko { 3868665484d8SDoug Ambrisko MRSAS_REQUEST_DESCRIPTOR_UNION *req_desc; 3869665484d8SDoug Ambrisko 3870665484d8SDoug Ambrisko req_desc = mrsas_build_mpt_cmd(sc, cmd); 3871665484d8SDoug Ambrisko if (!req_desc) { 3872665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot build MPT cmd.\n"); 3873665484d8SDoug Ambrisko return (1); 3874665484d8SDoug Ambrisko } 3875665484d8SDoug Ambrisko mrsas_fire_cmd(sc, req_desc->addr.u.low, req_desc->addr.u.high); 3876665484d8SDoug Ambrisko 3877665484d8SDoug Ambrisko return (0); 3878665484d8SDoug Ambrisko } 3879665484d8SDoug Ambrisko 38808e727371SKashyap D Desai /* 38818e727371SKashyap D Desai * mrsas_build_mpt_cmd: Calls helper function to build Passthru cmd 38828e727371SKashyap D Desai * input: Adapter soft state mfi cmd to build 3883665484d8SDoug Ambrisko * 38848e727371SKashyap D Desai * This function is called by mrsas_issue_cmd() to build the MPT-MFI passthru 38858e727371SKashyap D Desai * command and prepares the MPT command to send to Firmware. 3886665484d8SDoug Ambrisko */ 3887665484d8SDoug Ambrisko MRSAS_REQUEST_DESCRIPTOR_UNION * 3888665484d8SDoug Ambrisko mrsas_build_mpt_cmd(struct mrsas_softc *sc, struct mrsas_mfi_cmd *cmd) 3889665484d8SDoug Ambrisko { 3890665484d8SDoug Ambrisko MRSAS_REQUEST_DESCRIPTOR_UNION *req_desc; 3891665484d8SDoug Ambrisko u_int16_t index; 3892665484d8SDoug Ambrisko 3893665484d8SDoug Ambrisko if (mrsas_build_mptmfi_passthru(sc, cmd)) { 3894665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot build MPT-MFI passthru cmd.\n"); 3895665484d8SDoug Ambrisko return NULL; 3896665484d8SDoug Ambrisko } 3897665484d8SDoug Ambrisko index = cmd->cmd_id.context.smid; 3898665484d8SDoug Ambrisko 3899665484d8SDoug Ambrisko req_desc = mrsas_get_request_desc(sc, index - 1); 3900665484d8SDoug Ambrisko if (!req_desc) 3901665484d8SDoug Ambrisko return NULL; 3902665484d8SDoug Ambrisko 3903665484d8SDoug Ambrisko req_desc->addr.Words = 0; 3904665484d8SDoug Ambrisko req_desc->SCSIIO.RequestFlags = (MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO << MRSAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT); 3905665484d8SDoug Ambrisko 3906665484d8SDoug Ambrisko req_desc->SCSIIO.SMID = index; 3907665484d8SDoug Ambrisko 3908665484d8SDoug Ambrisko return (req_desc); 3909665484d8SDoug Ambrisko } 3910665484d8SDoug Ambrisko 39118e727371SKashyap D Desai /* 39128e727371SKashyap D Desai * mrsas_build_mptmfi_passthru: Builds a MPT MFI Passthru command 39138e727371SKashyap D Desai * input: Adapter soft state mfi cmd pointer 3914665484d8SDoug Ambrisko * 39158e727371SKashyap D Desai * The MPT command and the io_request are setup as a passthru command. The SGE 39168e727371SKashyap D Desai * chain address is set to frame_phys_addr of the MFI command. 3917665484d8SDoug Ambrisko */ 3918665484d8SDoug Ambrisko u_int8_t 3919665484d8SDoug Ambrisko mrsas_build_mptmfi_passthru(struct mrsas_softc *sc, struct mrsas_mfi_cmd *mfi_cmd) 3920665484d8SDoug Ambrisko { 3921665484d8SDoug Ambrisko MPI25_IEEE_SGE_CHAIN64 *mpi25_ieee_chain; 3922665484d8SDoug Ambrisko PTR_MRSAS_RAID_SCSI_IO_REQUEST io_req; 3923665484d8SDoug Ambrisko struct mrsas_mpt_cmd *mpt_cmd; 3924665484d8SDoug Ambrisko struct mrsas_header *frame_hdr = &mfi_cmd->frame->hdr; 3925665484d8SDoug Ambrisko 3926665484d8SDoug Ambrisko mpt_cmd = mrsas_get_mpt_cmd(sc); 3927665484d8SDoug Ambrisko if (!mpt_cmd) 3928665484d8SDoug Ambrisko return (1); 3929665484d8SDoug Ambrisko 3930665484d8SDoug Ambrisko /* Save the smid. To be used for returning the cmd */ 3931665484d8SDoug Ambrisko mfi_cmd->cmd_id.context.smid = mpt_cmd->index; 3932665484d8SDoug Ambrisko 3933665484d8SDoug Ambrisko mpt_cmd->sync_cmd_idx = mfi_cmd->index; 3934665484d8SDoug Ambrisko 3935665484d8SDoug Ambrisko /* 39368e727371SKashyap D Desai * For cmds where the flag is set, store the flag and check on 39378e727371SKashyap D Desai * completion. For cmds with this flag, don't call 3938665484d8SDoug Ambrisko * mrsas_complete_cmd. 3939665484d8SDoug Ambrisko */ 3940665484d8SDoug Ambrisko 3941665484d8SDoug Ambrisko if (frame_hdr->flags & MFI_FRAME_DONT_POST_IN_REPLY_QUEUE) 3942665484d8SDoug Ambrisko mpt_cmd->flags = MFI_FRAME_DONT_POST_IN_REPLY_QUEUE; 3943665484d8SDoug Ambrisko 3944665484d8SDoug Ambrisko io_req = mpt_cmd->io_request; 3945665484d8SDoug Ambrisko 39462909aab4SKashyap D Desai if (sc->mrsas_gen3_ctrl || sc->is_ventura || sc->is_aero) { 3947665484d8SDoug Ambrisko pMpi25IeeeSgeChain64_t sgl_ptr_end = (pMpi25IeeeSgeChain64_t)&io_req->SGL; 39488e727371SKashyap D Desai 3949665484d8SDoug Ambrisko sgl_ptr_end += sc->max_sge_in_main_msg - 1; 3950665484d8SDoug Ambrisko sgl_ptr_end->Flags = 0; 3951665484d8SDoug Ambrisko } 3952665484d8SDoug Ambrisko mpi25_ieee_chain = (MPI25_IEEE_SGE_CHAIN64 *) & io_req->SGL.IeeeChain; 3953665484d8SDoug Ambrisko 3954665484d8SDoug Ambrisko io_req->Function = MRSAS_MPI2_FUNCTION_PASSTHRU_IO_REQUEST; 3955665484d8SDoug Ambrisko io_req->SGLOffset0 = offsetof(MRSAS_RAID_SCSI_IO_REQUEST, SGL) / 4; 3956665484d8SDoug Ambrisko io_req->ChainOffset = sc->chain_offset_mfi_pthru; 3957665484d8SDoug Ambrisko 3958665484d8SDoug Ambrisko mpi25_ieee_chain->Address = mfi_cmd->frame_phys_addr; 3959665484d8SDoug Ambrisko 3960665484d8SDoug Ambrisko mpi25_ieee_chain->Flags = IEEE_SGE_FLAGS_CHAIN_ELEMENT | 3961665484d8SDoug Ambrisko MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR; 3962665484d8SDoug Ambrisko 39633a3fc6cbSKashyap D Desai mpi25_ieee_chain->Length = sc->max_chain_frame_sz; 3964665484d8SDoug Ambrisko 3965665484d8SDoug Ambrisko return (0); 3966665484d8SDoug Ambrisko } 3967665484d8SDoug Ambrisko 39688e727371SKashyap D Desai /* 39698e727371SKashyap D Desai * mrsas_issue_blocked_cmd: Synchronous wrapper around regular FW cmds 39708e727371SKashyap D Desai * input: Adapter soft state Command to be issued 3971665484d8SDoug Ambrisko * 39728e727371SKashyap D Desai * This function waits on an event for the command to be returned from the ISR. 39738e727371SKashyap D Desai * Max wait time is MRSAS_INTERNAL_CMD_WAIT_TIME secs. Used for issuing 39748e727371SKashyap D Desai * internal and ioctl commands. 3975665484d8SDoug Ambrisko */ 39768e727371SKashyap D Desai int 39778e727371SKashyap D Desai mrsas_issue_blocked_cmd(struct mrsas_softc *sc, struct mrsas_mfi_cmd *cmd) 3978665484d8SDoug Ambrisko { 3979665484d8SDoug Ambrisko u_int8_t max_wait = MRSAS_INTERNAL_CMD_WAIT_TIME; 3980665484d8SDoug Ambrisko unsigned long total_time = 0; 3981f0c7594bSKashyap D Desai int retcode = SUCCESS; 3982665484d8SDoug Ambrisko 3983665484d8SDoug Ambrisko /* Initialize cmd_status */ 3984f0c7594bSKashyap D Desai cmd->cmd_status = 0xFF; 3985665484d8SDoug Ambrisko 3986665484d8SDoug Ambrisko /* Build MPT-MFI command for issue to FW */ 3987665484d8SDoug Ambrisko if (mrsas_issue_dcmd(sc, cmd)) { 3988665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot issue DCMD internal command.\n"); 3989665484d8SDoug Ambrisko return (1); 3990665484d8SDoug Ambrisko } 3991665484d8SDoug Ambrisko sc->chan = (void *)&cmd; 3992665484d8SDoug Ambrisko 3993665484d8SDoug Ambrisko while (1) { 3994f0c7594bSKashyap D Desai if (cmd->cmd_status == 0xFF) { 3995665484d8SDoug Ambrisko tsleep((void *)&sc->chan, 0, "mrsas_sleep", hz); 39968e727371SKashyap D Desai } else 3997665484d8SDoug Ambrisko break; 3998f0c7594bSKashyap D Desai 3999f0c7594bSKashyap D Desai if (!cmd->sync_cmd) { /* cmd->sync will be set for an IOCTL 4000f0c7594bSKashyap D Desai * command */ 4001665484d8SDoug Ambrisko total_time++; 4002665484d8SDoug Ambrisko if (total_time >= max_wait) { 40038e727371SKashyap D Desai device_printf(sc->mrsas_dev, 40048e727371SKashyap D Desai "Internal command timed out after %d seconds.\n", max_wait); 4005665484d8SDoug Ambrisko retcode = 1; 4006665484d8SDoug Ambrisko break; 4007665484d8SDoug Ambrisko } 4008665484d8SDoug Ambrisko } 4009f0c7594bSKashyap D Desai } 4010f0c7594bSKashyap D Desai 4011f0c7594bSKashyap D Desai if (cmd->cmd_status == 0xFF) { 4012f0c7594bSKashyap D Desai device_printf(sc->mrsas_dev, "DCMD timed out after %d " 4013f0c7594bSKashyap D Desai "seconds from %s\n", max_wait, __func__); 4014f0c7594bSKashyap D Desai device_printf(sc->mrsas_dev, "DCMD opcode 0x%X\n", 4015f0c7594bSKashyap D Desai cmd->frame->dcmd.opcode); 4016f0c7594bSKashyap D Desai retcode = ETIMEDOUT; 4017f0c7594bSKashyap D Desai } 4018665484d8SDoug Ambrisko return (retcode); 4019665484d8SDoug Ambrisko } 4020665484d8SDoug Ambrisko 40218e727371SKashyap D Desai /* 40228e727371SKashyap D Desai * mrsas_complete_mptmfi_passthru: Completes a command 40238e727371SKashyap D Desai * input: @sc: Adapter soft state 40248e727371SKashyap D Desai * @cmd: Command to be completed 40258e727371SKashyap D Desai * @status: cmd completion status 4026665484d8SDoug Ambrisko * 40278e727371SKashyap D Desai * This function is called from mrsas_complete_cmd() after an interrupt is 40288e727371SKashyap D Desai * received from Firmware, and io_request->Function is 4029665484d8SDoug Ambrisko * MRSAS_MPI2_FUNCTION_PASSTHRU_IO_REQUEST. 4030665484d8SDoug Ambrisko */ 4031665484d8SDoug Ambrisko void 4032665484d8SDoug Ambrisko mrsas_complete_mptmfi_passthru(struct mrsas_softc *sc, struct mrsas_mfi_cmd *cmd, 4033665484d8SDoug Ambrisko u_int8_t status) 4034665484d8SDoug Ambrisko { 4035665484d8SDoug Ambrisko struct mrsas_header *hdr = &cmd->frame->hdr; 4036665484d8SDoug Ambrisko u_int8_t cmd_status = cmd->frame->hdr.cmd_status; 4037665484d8SDoug Ambrisko 4038665484d8SDoug Ambrisko /* Reset the retry counter for future re-tries */ 4039665484d8SDoug Ambrisko cmd->retry_for_fw_reset = 0; 4040665484d8SDoug Ambrisko 4041665484d8SDoug Ambrisko if (cmd->ccb_ptr) 4042665484d8SDoug Ambrisko cmd->ccb_ptr = NULL; 4043665484d8SDoug Ambrisko 4044665484d8SDoug Ambrisko switch (hdr->cmd) { 4045665484d8SDoug Ambrisko case MFI_CMD_INVALID: 4046665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "MFI_CMD_INVALID command.\n"); 4047665484d8SDoug Ambrisko break; 4048665484d8SDoug Ambrisko case MFI_CMD_PD_SCSI_IO: 4049665484d8SDoug Ambrisko case MFI_CMD_LD_SCSI_IO: 4050665484d8SDoug Ambrisko /* 4051665484d8SDoug Ambrisko * MFI_CMD_PD_SCSI_IO and MFI_CMD_LD_SCSI_IO could have been 4052665484d8SDoug Ambrisko * issued either through an IO path or an IOCTL path. If it 4053665484d8SDoug Ambrisko * was via IOCTL, we will send it to internal completion. 4054665484d8SDoug Ambrisko */ 4055665484d8SDoug Ambrisko if (cmd->sync_cmd) { 4056665484d8SDoug Ambrisko cmd->sync_cmd = 0; 4057665484d8SDoug Ambrisko mrsas_wakeup(sc, cmd); 4058665484d8SDoug Ambrisko break; 4059665484d8SDoug Ambrisko } 4060665484d8SDoug Ambrisko case MFI_CMD_SMP: 4061665484d8SDoug Ambrisko case MFI_CMD_STP: 4062665484d8SDoug Ambrisko case MFI_CMD_DCMD: 4063665484d8SDoug Ambrisko /* Check for LD map update */ 4064665484d8SDoug Ambrisko if ((cmd->frame->dcmd.opcode == MR_DCMD_LD_MAP_GET_INFO) && 4065665484d8SDoug Ambrisko (cmd->frame->dcmd.mbox.b[1] == 1)) { 4066665484d8SDoug Ambrisko sc->fast_path_io = 0; 4067665484d8SDoug Ambrisko mtx_lock(&sc->raidmap_lock); 4068f0c7594bSKashyap D Desai sc->map_update_cmd = NULL; 4069665484d8SDoug Ambrisko if (cmd_status != 0) { 4070665484d8SDoug Ambrisko if (cmd_status != MFI_STAT_NOT_FOUND) 4071665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "map sync failed, status=%x\n", cmd_status); 4072665484d8SDoug Ambrisko else { 4073665484d8SDoug Ambrisko mrsas_release_mfi_cmd(cmd); 4074665484d8SDoug Ambrisko mtx_unlock(&sc->raidmap_lock); 4075665484d8SDoug Ambrisko break; 4076665484d8SDoug Ambrisko } 40778e727371SKashyap D Desai } else 4078665484d8SDoug Ambrisko sc->map_id++; 4079665484d8SDoug Ambrisko mrsas_release_mfi_cmd(cmd); 4080665484d8SDoug Ambrisko if (MR_ValidateMapInfo(sc)) 4081665484d8SDoug Ambrisko sc->fast_path_io = 0; 4082665484d8SDoug Ambrisko else 4083665484d8SDoug Ambrisko sc->fast_path_io = 1; 4084665484d8SDoug Ambrisko mrsas_sync_map_info(sc); 4085665484d8SDoug Ambrisko mtx_unlock(&sc->raidmap_lock); 4086665484d8SDoug Ambrisko break; 4087665484d8SDoug Ambrisko } 4088665484d8SDoug Ambrisko if (cmd->frame->dcmd.opcode == MR_DCMD_CTRL_EVENT_GET_INFO || 4089665484d8SDoug Ambrisko cmd->frame->dcmd.opcode == MR_DCMD_CTRL_EVENT_GET) { 4090da011113SKashyap D Desai sc->mrsas_aen_triggered = 0; 4091665484d8SDoug Ambrisko } 4092a688fcd0SKashyap D Desai /* FW has an updated PD sequence */ 4093a688fcd0SKashyap D Desai if ((cmd->frame->dcmd.opcode == 4094a688fcd0SKashyap D Desai MR_DCMD_SYSTEM_PD_MAP_GET_INFO) && 4095a688fcd0SKashyap D Desai (cmd->frame->dcmd.mbox.b[0] == 1)) { 4096a688fcd0SKashyap D Desai 4097a688fcd0SKashyap D Desai mtx_lock(&sc->raidmap_lock); 4098a688fcd0SKashyap D Desai sc->jbod_seq_cmd = NULL; 4099a688fcd0SKashyap D Desai mrsas_release_mfi_cmd(cmd); 4100a688fcd0SKashyap D Desai 4101a688fcd0SKashyap D Desai if (cmd_status == MFI_STAT_OK) { 4102a688fcd0SKashyap D Desai sc->pd_seq_map_id++; 4103a688fcd0SKashyap D Desai /* Re-register a pd sync seq num cmd */ 4104a688fcd0SKashyap D Desai if (megasas_sync_pd_seq_num(sc, true)) 4105a688fcd0SKashyap D Desai sc->use_seqnum_jbod_fp = 0; 4106a688fcd0SKashyap D Desai } else { 4107a688fcd0SKashyap D Desai sc->use_seqnum_jbod_fp = 0; 4108a688fcd0SKashyap D Desai device_printf(sc->mrsas_dev, 4109a688fcd0SKashyap D Desai "Jbod map sync failed, status=%x\n", cmd_status); 4110a688fcd0SKashyap D Desai } 4111a688fcd0SKashyap D Desai mtx_unlock(&sc->raidmap_lock); 4112a688fcd0SKashyap D Desai break; 4113a688fcd0SKashyap D Desai } 4114665484d8SDoug Ambrisko /* See if got an event notification */ 4115665484d8SDoug Ambrisko if (cmd->frame->dcmd.opcode == MR_DCMD_CTRL_EVENT_WAIT) 4116665484d8SDoug Ambrisko mrsas_complete_aen(sc, cmd); 4117665484d8SDoug Ambrisko else 4118665484d8SDoug Ambrisko mrsas_wakeup(sc, cmd); 4119665484d8SDoug Ambrisko break; 4120665484d8SDoug Ambrisko case MFI_CMD_ABORT: 4121665484d8SDoug Ambrisko /* Command issued to abort another cmd return */ 4122665484d8SDoug Ambrisko mrsas_complete_abort(sc, cmd); 4123665484d8SDoug Ambrisko break; 4124665484d8SDoug Ambrisko default: 4125665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Unknown command completed! [0x%X]\n", hdr->cmd); 4126665484d8SDoug Ambrisko break; 4127665484d8SDoug Ambrisko } 4128665484d8SDoug Ambrisko } 4129665484d8SDoug Ambrisko 41308e727371SKashyap D Desai /* 41318e727371SKashyap D Desai * mrsas_wakeup: Completes an internal command 4132665484d8SDoug Ambrisko * input: Adapter soft state 4133665484d8SDoug Ambrisko * Command to be completed 4134665484d8SDoug Ambrisko * 41358e727371SKashyap D Desai * In mrsas_issue_blocked_cmd(), after a command is issued to Firmware, a wait 41368e727371SKashyap D Desai * timer is started. This function is called from 41378e727371SKashyap D Desai * mrsas_complete_mptmfi_passthru() as it completes the command, to wake up 41388e727371SKashyap D Desai * from the command wait. 4139665484d8SDoug Ambrisko */ 41408e727371SKashyap D Desai void 41418e727371SKashyap D Desai mrsas_wakeup(struct mrsas_softc *sc, struct mrsas_mfi_cmd *cmd) 4142665484d8SDoug Ambrisko { 4143665484d8SDoug Ambrisko cmd->cmd_status = cmd->frame->io.cmd_status; 4144665484d8SDoug Ambrisko 4145f0c7594bSKashyap D Desai if (cmd->cmd_status == 0xFF) 4146665484d8SDoug Ambrisko cmd->cmd_status = 0; 4147665484d8SDoug Ambrisko 4148665484d8SDoug Ambrisko sc->chan = (void *)&cmd; 4149665484d8SDoug Ambrisko wakeup_one((void *)&sc->chan); 4150665484d8SDoug Ambrisko return; 4151665484d8SDoug Ambrisko } 4152665484d8SDoug Ambrisko 41538e727371SKashyap D Desai /* 41548e727371SKashyap D Desai * mrsas_shutdown_ctlr: Instructs FW to shutdown the controller input: 41558e727371SKashyap D Desai * Adapter soft state Shutdown/Hibernate 4156665484d8SDoug Ambrisko * 41578e727371SKashyap D Desai * This function issues a DCMD internal command to Firmware to initiate shutdown 41588e727371SKashyap D Desai * of the controller. 4159665484d8SDoug Ambrisko */ 41608e727371SKashyap D Desai static void 41618e727371SKashyap D Desai mrsas_shutdown_ctlr(struct mrsas_softc *sc, u_int32_t opcode) 4162665484d8SDoug Ambrisko { 4163665484d8SDoug Ambrisko struct mrsas_mfi_cmd *cmd; 4164665484d8SDoug Ambrisko struct mrsas_dcmd_frame *dcmd; 4165665484d8SDoug Ambrisko 4166665484d8SDoug Ambrisko if (sc->adprecovery == MRSAS_HW_CRITICAL_ERROR) 4167665484d8SDoug Ambrisko return; 4168665484d8SDoug Ambrisko 4169665484d8SDoug Ambrisko cmd = mrsas_get_mfi_cmd(sc); 4170665484d8SDoug Ambrisko if (!cmd) { 4171665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot allocate for shutdown cmd.\n"); 4172665484d8SDoug Ambrisko return; 4173665484d8SDoug Ambrisko } 4174665484d8SDoug Ambrisko if (sc->aen_cmd) 4175665484d8SDoug Ambrisko mrsas_issue_blocked_abort_cmd(sc, sc->aen_cmd); 4176665484d8SDoug Ambrisko if (sc->map_update_cmd) 4177665484d8SDoug Ambrisko mrsas_issue_blocked_abort_cmd(sc, sc->map_update_cmd); 4178a688fcd0SKashyap D Desai if (sc->jbod_seq_cmd) 4179a688fcd0SKashyap D Desai mrsas_issue_blocked_abort_cmd(sc, sc->jbod_seq_cmd); 4180665484d8SDoug Ambrisko 4181665484d8SDoug Ambrisko dcmd = &cmd->frame->dcmd; 4182665484d8SDoug Ambrisko memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); 4183665484d8SDoug Ambrisko 4184665484d8SDoug Ambrisko dcmd->cmd = MFI_CMD_DCMD; 4185665484d8SDoug Ambrisko dcmd->cmd_status = 0x0; 4186665484d8SDoug Ambrisko dcmd->sge_count = 0; 4187665484d8SDoug Ambrisko dcmd->flags = MFI_FRAME_DIR_NONE; 4188665484d8SDoug Ambrisko dcmd->timeout = 0; 4189665484d8SDoug Ambrisko dcmd->pad_0 = 0; 4190665484d8SDoug Ambrisko dcmd->data_xfer_len = 0; 4191665484d8SDoug Ambrisko dcmd->opcode = opcode; 4192665484d8SDoug Ambrisko 4193665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Preparing to shut down controller.\n"); 4194665484d8SDoug Ambrisko 4195665484d8SDoug Ambrisko mrsas_issue_blocked_cmd(sc, cmd); 4196665484d8SDoug Ambrisko mrsas_release_mfi_cmd(cmd); 4197665484d8SDoug Ambrisko 4198665484d8SDoug Ambrisko return; 4199665484d8SDoug Ambrisko } 4200665484d8SDoug Ambrisko 42018e727371SKashyap D Desai /* 42028e727371SKashyap D Desai * mrsas_flush_cache: Requests FW to flush all its caches input: 42038e727371SKashyap D Desai * Adapter soft state 4204665484d8SDoug Ambrisko * 4205665484d8SDoug Ambrisko * This function is issues a DCMD internal command to Firmware to initiate 4206665484d8SDoug Ambrisko * flushing of all caches. 4207665484d8SDoug Ambrisko */ 42088e727371SKashyap D Desai static void 42098e727371SKashyap D Desai mrsas_flush_cache(struct mrsas_softc *sc) 4210665484d8SDoug Ambrisko { 4211665484d8SDoug Ambrisko struct mrsas_mfi_cmd *cmd; 4212665484d8SDoug Ambrisko struct mrsas_dcmd_frame *dcmd; 4213665484d8SDoug Ambrisko 4214665484d8SDoug Ambrisko if (sc->adprecovery == MRSAS_HW_CRITICAL_ERROR) 4215665484d8SDoug Ambrisko return; 4216665484d8SDoug Ambrisko 4217665484d8SDoug Ambrisko cmd = mrsas_get_mfi_cmd(sc); 4218665484d8SDoug Ambrisko if (!cmd) { 4219665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot allocate for flush cache cmd.\n"); 4220665484d8SDoug Ambrisko return; 4221665484d8SDoug Ambrisko } 4222665484d8SDoug Ambrisko dcmd = &cmd->frame->dcmd; 4223665484d8SDoug Ambrisko memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); 4224665484d8SDoug Ambrisko 4225665484d8SDoug Ambrisko dcmd->cmd = MFI_CMD_DCMD; 4226665484d8SDoug Ambrisko dcmd->cmd_status = 0x0; 4227665484d8SDoug Ambrisko dcmd->sge_count = 0; 4228665484d8SDoug Ambrisko dcmd->flags = MFI_FRAME_DIR_NONE; 4229665484d8SDoug Ambrisko dcmd->timeout = 0; 4230665484d8SDoug Ambrisko dcmd->pad_0 = 0; 4231665484d8SDoug Ambrisko dcmd->data_xfer_len = 0; 4232665484d8SDoug Ambrisko dcmd->opcode = MR_DCMD_CTRL_CACHE_FLUSH; 4233665484d8SDoug Ambrisko dcmd->mbox.b[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE; 4234665484d8SDoug Ambrisko 4235665484d8SDoug Ambrisko mrsas_issue_blocked_cmd(sc, cmd); 4236665484d8SDoug Ambrisko mrsas_release_mfi_cmd(cmd); 4237665484d8SDoug Ambrisko 4238665484d8SDoug Ambrisko return; 4239665484d8SDoug Ambrisko } 4240665484d8SDoug Ambrisko 4241a688fcd0SKashyap D Desai int 4242a688fcd0SKashyap D Desai megasas_sync_pd_seq_num(struct mrsas_softc *sc, boolean_t pend) 4243a688fcd0SKashyap D Desai { 4244a688fcd0SKashyap D Desai int retcode = 0; 4245a688fcd0SKashyap D Desai u_int8_t do_ocr = 1; 4246a688fcd0SKashyap D Desai struct mrsas_mfi_cmd *cmd; 4247a688fcd0SKashyap D Desai struct mrsas_dcmd_frame *dcmd; 4248a688fcd0SKashyap D Desai uint32_t pd_seq_map_sz; 4249a688fcd0SKashyap D Desai struct MR_PD_CFG_SEQ_NUM_SYNC *pd_sync; 4250a688fcd0SKashyap D Desai bus_addr_t pd_seq_h; 4251a688fcd0SKashyap D Desai 4252a688fcd0SKashyap D Desai pd_seq_map_sz = sizeof(struct MR_PD_CFG_SEQ_NUM_SYNC) + 4253a688fcd0SKashyap D Desai (sizeof(struct MR_PD_CFG_SEQ) * 4254a688fcd0SKashyap D Desai (MAX_PHYSICAL_DEVICES - 1)); 4255a688fcd0SKashyap D Desai 4256a688fcd0SKashyap D Desai cmd = mrsas_get_mfi_cmd(sc); 4257a688fcd0SKashyap D Desai if (!cmd) { 4258a688fcd0SKashyap D Desai device_printf(sc->mrsas_dev, 4259a688fcd0SKashyap D Desai "Cannot alloc for ld map info cmd.\n"); 4260a688fcd0SKashyap D Desai return 1; 4261a688fcd0SKashyap D Desai } 4262a688fcd0SKashyap D Desai dcmd = &cmd->frame->dcmd; 4263a688fcd0SKashyap D Desai 4264a688fcd0SKashyap D Desai pd_sync = (void *)sc->jbodmap_mem[(sc->pd_seq_map_id & 1)]; 4265a688fcd0SKashyap D Desai pd_seq_h = sc->jbodmap_phys_addr[(sc->pd_seq_map_id & 1)]; 4266a688fcd0SKashyap D Desai if (!pd_sync) { 4267a688fcd0SKashyap D Desai device_printf(sc->mrsas_dev, 4268a688fcd0SKashyap D Desai "Failed to alloc mem for jbod map info.\n"); 4269a688fcd0SKashyap D Desai mrsas_release_mfi_cmd(cmd); 4270a688fcd0SKashyap D Desai return (ENOMEM); 4271a688fcd0SKashyap D Desai } 4272a688fcd0SKashyap D Desai memset(pd_sync, 0, pd_seq_map_sz); 4273a688fcd0SKashyap D Desai memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); 4274a688fcd0SKashyap D Desai dcmd->cmd = MFI_CMD_DCMD; 4275a688fcd0SKashyap D Desai dcmd->cmd_status = 0xFF; 4276a688fcd0SKashyap D Desai dcmd->sge_count = 1; 4277a688fcd0SKashyap D Desai dcmd->timeout = 0; 4278a688fcd0SKashyap D Desai dcmd->pad_0 = 0; 4279a688fcd0SKashyap D Desai dcmd->data_xfer_len = (pd_seq_map_sz); 4280a688fcd0SKashyap D Desai dcmd->opcode = (MR_DCMD_SYSTEM_PD_MAP_GET_INFO); 4281a688fcd0SKashyap D Desai dcmd->sgl.sge32[0].phys_addr = (pd_seq_h); 4282a688fcd0SKashyap D Desai dcmd->sgl.sge32[0].length = (pd_seq_map_sz); 4283a688fcd0SKashyap D Desai 4284a688fcd0SKashyap D Desai if (pend) { 4285a688fcd0SKashyap D Desai dcmd->mbox.b[0] = MRSAS_DCMD_MBOX_PEND_FLAG; 4286a688fcd0SKashyap D Desai dcmd->flags = (MFI_FRAME_DIR_WRITE); 4287a688fcd0SKashyap D Desai sc->jbod_seq_cmd = cmd; 4288a688fcd0SKashyap D Desai if (mrsas_issue_dcmd(sc, cmd)) { 4289a688fcd0SKashyap D Desai device_printf(sc->mrsas_dev, 4290a688fcd0SKashyap D Desai "Fail to send sync map info command.\n"); 4291a688fcd0SKashyap D Desai return 1; 4292a688fcd0SKashyap D Desai } else 4293a688fcd0SKashyap D Desai return 0; 4294a688fcd0SKashyap D Desai } else 4295a688fcd0SKashyap D Desai dcmd->flags = MFI_FRAME_DIR_READ; 4296a688fcd0SKashyap D Desai 4297a688fcd0SKashyap D Desai retcode = mrsas_issue_polled(sc, cmd); 4298a688fcd0SKashyap D Desai if (retcode == ETIMEDOUT) 4299a688fcd0SKashyap D Desai goto dcmd_timeout; 4300a688fcd0SKashyap D Desai 4301a688fcd0SKashyap D Desai if (pd_sync->count > MAX_PHYSICAL_DEVICES) { 4302a688fcd0SKashyap D Desai device_printf(sc->mrsas_dev, 4303a688fcd0SKashyap D Desai "driver supports max %d JBOD, but FW reports %d\n", 4304a688fcd0SKashyap D Desai MAX_PHYSICAL_DEVICES, pd_sync->count); 4305a688fcd0SKashyap D Desai retcode = -EINVAL; 4306a688fcd0SKashyap D Desai } 4307a688fcd0SKashyap D Desai if (!retcode) 4308a688fcd0SKashyap D Desai sc->pd_seq_map_id++; 4309a688fcd0SKashyap D Desai do_ocr = 0; 4310a688fcd0SKashyap D Desai 4311a688fcd0SKashyap D Desai dcmd_timeout: 4312a688fcd0SKashyap D Desai if (do_ocr) 4313a688fcd0SKashyap D Desai sc->do_timedout_reset = MFI_DCMD_TIMEOUT_OCR; 4314a688fcd0SKashyap D Desai 4315a688fcd0SKashyap D Desai return (retcode); 4316a688fcd0SKashyap D Desai } 4317a688fcd0SKashyap D Desai 43188e727371SKashyap D Desai /* 43198e727371SKashyap D Desai * mrsas_get_map_info: Load and validate RAID map input: 43208e727371SKashyap D Desai * Adapter instance soft state 4321665484d8SDoug Ambrisko * 43228e727371SKashyap D Desai * This function calls mrsas_get_ld_map_info() and MR_ValidateMapInfo() to load 43238e727371SKashyap D Desai * and validate RAID map. It returns 0 if successful, 1 other- wise. 4324665484d8SDoug Ambrisko */ 43258e727371SKashyap D Desai static int 43268e727371SKashyap D Desai mrsas_get_map_info(struct mrsas_softc *sc) 4327665484d8SDoug Ambrisko { 4328665484d8SDoug Ambrisko uint8_t retcode = 0; 4329665484d8SDoug Ambrisko 4330665484d8SDoug Ambrisko sc->fast_path_io = 0; 4331665484d8SDoug Ambrisko if (!mrsas_get_ld_map_info(sc)) { 4332665484d8SDoug Ambrisko retcode = MR_ValidateMapInfo(sc); 4333665484d8SDoug Ambrisko if (retcode == 0) { 4334665484d8SDoug Ambrisko sc->fast_path_io = 1; 4335665484d8SDoug Ambrisko return 0; 4336665484d8SDoug Ambrisko } 4337665484d8SDoug Ambrisko } 4338665484d8SDoug Ambrisko return 1; 4339665484d8SDoug Ambrisko } 4340665484d8SDoug Ambrisko 43418e727371SKashyap D Desai /* 43428e727371SKashyap D Desai * mrsas_get_ld_map_info: Get FW's ld_map structure input: 43438e727371SKashyap D Desai * Adapter instance soft state 4344665484d8SDoug Ambrisko * 43458e727371SKashyap D Desai * Issues an internal command (DCMD) to get the FW's controller PD list 43468e727371SKashyap D Desai * structure. 4347665484d8SDoug Ambrisko */ 43488e727371SKashyap D Desai static int 43498e727371SKashyap D Desai mrsas_get_ld_map_info(struct mrsas_softc *sc) 4350665484d8SDoug Ambrisko { 4351665484d8SDoug Ambrisko int retcode = 0; 4352665484d8SDoug Ambrisko struct mrsas_mfi_cmd *cmd; 4353665484d8SDoug Ambrisko struct mrsas_dcmd_frame *dcmd; 43544799d485SKashyap D Desai void *map; 4355665484d8SDoug Ambrisko bus_addr_t map_phys_addr = 0; 4356665484d8SDoug Ambrisko 4357665484d8SDoug Ambrisko cmd = mrsas_get_mfi_cmd(sc); 4358665484d8SDoug Ambrisko if (!cmd) { 43594799d485SKashyap D Desai device_printf(sc->mrsas_dev, 43604799d485SKashyap D Desai "Cannot alloc for ld map info cmd.\n"); 4361665484d8SDoug Ambrisko return 1; 4362665484d8SDoug Ambrisko } 4363665484d8SDoug Ambrisko dcmd = &cmd->frame->dcmd; 4364665484d8SDoug Ambrisko 43654799d485SKashyap D Desai map = (void *)sc->raidmap_mem[(sc->map_id & 1)]; 4366665484d8SDoug Ambrisko map_phys_addr = sc->raidmap_phys_addr[(sc->map_id & 1)]; 4367665484d8SDoug Ambrisko if (!map) { 43684799d485SKashyap D Desai device_printf(sc->mrsas_dev, 43694799d485SKashyap D Desai "Failed to alloc mem for ld map info.\n"); 4370665484d8SDoug Ambrisko mrsas_release_mfi_cmd(cmd); 4371665484d8SDoug Ambrisko return (ENOMEM); 4372665484d8SDoug Ambrisko } 43734799d485SKashyap D Desai memset(map, 0, sizeof(sc->max_map_sz)); 4374665484d8SDoug Ambrisko memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); 4375665484d8SDoug Ambrisko 4376665484d8SDoug Ambrisko dcmd->cmd = MFI_CMD_DCMD; 4377665484d8SDoug Ambrisko dcmd->cmd_status = 0xFF; 4378665484d8SDoug Ambrisko dcmd->sge_count = 1; 4379665484d8SDoug Ambrisko dcmd->flags = MFI_FRAME_DIR_READ; 4380665484d8SDoug Ambrisko dcmd->timeout = 0; 4381665484d8SDoug Ambrisko dcmd->pad_0 = 0; 43824799d485SKashyap D Desai dcmd->data_xfer_len = sc->current_map_sz; 4383665484d8SDoug Ambrisko dcmd->opcode = MR_DCMD_LD_MAP_GET_INFO; 4384665484d8SDoug Ambrisko dcmd->sgl.sge32[0].phys_addr = map_phys_addr; 43854799d485SKashyap D Desai dcmd->sgl.sge32[0].length = sc->current_map_sz; 43864799d485SKashyap D Desai 4387f0c7594bSKashyap D Desai retcode = mrsas_issue_polled(sc, cmd); 4388f0c7594bSKashyap D Desai if (retcode == ETIMEDOUT) 4389f0c7594bSKashyap D Desai sc->do_timedout_reset = MFI_DCMD_TIMEOUT_OCR; 43904799d485SKashyap D Desai 4391665484d8SDoug Ambrisko return (retcode); 4392665484d8SDoug Ambrisko } 4393665484d8SDoug Ambrisko 43948e727371SKashyap D Desai /* 43958e727371SKashyap D Desai * mrsas_sync_map_info: Get FW's ld_map structure input: 43968e727371SKashyap D Desai * Adapter instance soft state 4397665484d8SDoug Ambrisko * 43988e727371SKashyap D Desai * Issues an internal command (DCMD) to get the FW's controller PD list 43998e727371SKashyap D Desai * structure. 4400665484d8SDoug Ambrisko */ 44018e727371SKashyap D Desai static int 44028e727371SKashyap D Desai mrsas_sync_map_info(struct mrsas_softc *sc) 4403665484d8SDoug Ambrisko { 4404665484d8SDoug Ambrisko int retcode = 0, i; 4405665484d8SDoug Ambrisko struct mrsas_mfi_cmd *cmd; 4406665484d8SDoug Ambrisko struct mrsas_dcmd_frame *dcmd; 4407665484d8SDoug Ambrisko uint32_t size_sync_info, num_lds; 4408665484d8SDoug Ambrisko MR_LD_TARGET_SYNC *target_map = NULL; 44094799d485SKashyap D Desai MR_DRV_RAID_MAP_ALL *map; 4410665484d8SDoug Ambrisko MR_LD_RAID *raid; 4411665484d8SDoug Ambrisko MR_LD_TARGET_SYNC *ld_sync; 4412665484d8SDoug Ambrisko bus_addr_t map_phys_addr = 0; 4413665484d8SDoug Ambrisko 4414665484d8SDoug Ambrisko cmd = mrsas_get_mfi_cmd(sc); 4415665484d8SDoug Ambrisko if (!cmd) { 4416731b7561SKashyap D Desai device_printf(sc->mrsas_dev, "Cannot alloc for sync map info cmd\n"); 4417731b7561SKashyap D Desai return ENOMEM; 4418665484d8SDoug Ambrisko } 44194799d485SKashyap D Desai map = sc->ld_drv_map[sc->map_id & 1]; 4420665484d8SDoug Ambrisko num_lds = map->raidMap.ldCount; 4421665484d8SDoug Ambrisko 4422665484d8SDoug Ambrisko dcmd = &cmd->frame->dcmd; 4423665484d8SDoug Ambrisko size_sync_info = sizeof(MR_LD_TARGET_SYNC) * num_lds; 4424665484d8SDoug Ambrisko memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); 4425665484d8SDoug Ambrisko 44268e727371SKashyap D Desai target_map = (MR_LD_TARGET_SYNC *) sc->raidmap_mem[(sc->map_id - 1) & 1]; 44274799d485SKashyap D Desai memset(target_map, 0, sc->max_map_sz); 4428665484d8SDoug Ambrisko 4429665484d8SDoug Ambrisko map_phys_addr = sc->raidmap_phys_addr[(sc->map_id - 1) & 1]; 4430665484d8SDoug Ambrisko 4431665484d8SDoug Ambrisko ld_sync = (MR_LD_TARGET_SYNC *) target_map; 4432665484d8SDoug Ambrisko 4433665484d8SDoug Ambrisko for (i = 0; i < num_lds; i++, ld_sync++) { 4434665484d8SDoug Ambrisko raid = MR_LdRaidGet(i, map); 4435665484d8SDoug Ambrisko ld_sync->targetId = MR_GetLDTgtId(i, map); 4436665484d8SDoug Ambrisko ld_sync->seqNum = raid->seqNum; 4437665484d8SDoug Ambrisko } 4438665484d8SDoug Ambrisko 4439665484d8SDoug Ambrisko dcmd->cmd = MFI_CMD_DCMD; 4440665484d8SDoug Ambrisko dcmd->cmd_status = 0xFF; 4441665484d8SDoug Ambrisko dcmd->sge_count = 1; 4442665484d8SDoug Ambrisko dcmd->flags = MFI_FRAME_DIR_WRITE; 4443665484d8SDoug Ambrisko dcmd->timeout = 0; 4444665484d8SDoug Ambrisko dcmd->pad_0 = 0; 44454799d485SKashyap D Desai dcmd->data_xfer_len = sc->current_map_sz; 4446665484d8SDoug Ambrisko dcmd->mbox.b[0] = num_lds; 4447665484d8SDoug Ambrisko dcmd->mbox.b[1] = MRSAS_DCMD_MBOX_PEND_FLAG; 4448665484d8SDoug Ambrisko dcmd->opcode = MR_DCMD_LD_MAP_GET_INFO; 4449665484d8SDoug Ambrisko dcmd->sgl.sge32[0].phys_addr = map_phys_addr; 44504799d485SKashyap D Desai dcmd->sgl.sge32[0].length = sc->current_map_sz; 4451665484d8SDoug Ambrisko 4452665484d8SDoug Ambrisko sc->map_update_cmd = cmd; 4453665484d8SDoug Ambrisko if (mrsas_issue_dcmd(sc, cmd)) { 44544799d485SKashyap D Desai device_printf(sc->mrsas_dev, 44554799d485SKashyap D Desai "Fail to send sync map info command.\n"); 4456665484d8SDoug Ambrisko return (1); 4457665484d8SDoug Ambrisko } 4458665484d8SDoug Ambrisko return (retcode); 4459665484d8SDoug Ambrisko } 4460665484d8SDoug Ambrisko 446179b4460bSKashyap D Desai /* Input: dcmd.opcode - MR_DCMD_PD_GET_INFO 446279b4460bSKashyap D Desai * dcmd.mbox.s[0] - deviceId for this physical drive 446379b4460bSKashyap D Desai * dcmd.sge IN - ptr to returned MR_PD_INFO structure 446479b4460bSKashyap D Desai * Desc: Firmware return the physical drive info structure 446579b4460bSKashyap D Desai * 446679b4460bSKashyap D Desai */ 446779b4460bSKashyap D Desai static void 446879b4460bSKashyap D Desai mrsas_get_pd_info(struct mrsas_softc *sc, u_int16_t device_id) 446979b4460bSKashyap D Desai { 447079b4460bSKashyap D Desai int retcode; 447179b4460bSKashyap D Desai u_int8_t do_ocr = 1; 447279b4460bSKashyap D Desai struct mrsas_mfi_cmd *cmd; 447379b4460bSKashyap D Desai struct mrsas_dcmd_frame *dcmd; 447479b4460bSKashyap D Desai 447579b4460bSKashyap D Desai cmd = mrsas_get_mfi_cmd(sc); 447679b4460bSKashyap D Desai 447779b4460bSKashyap D Desai if (!cmd) { 447879b4460bSKashyap D Desai device_printf(sc->mrsas_dev, 447979b4460bSKashyap D Desai "Cannot alloc for get PD info cmd\n"); 448079b4460bSKashyap D Desai return; 448179b4460bSKashyap D Desai } 448279b4460bSKashyap D Desai dcmd = &cmd->frame->dcmd; 448379b4460bSKashyap D Desai 448479b4460bSKashyap D Desai memset(sc->pd_info_mem, 0, sizeof(struct mrsas_pd_info)); 448579b4460bSKashyap D Desai memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); 448679b4460bSKashyap D Desai 448779b4460bSKashyap D Desai dcmd->mbox.s[0] = device_id; 448879b4460bSKashyap D Desai dcmd->cmd = MFI_CMD_DCMD; 448979b4460bSKashyap D Desai dcmd->cmd_status = 0xFF; 449079b4460bSKashyap D Desai dcmd->sge_count = 1; 449179b4460bSKashyap D Desai dcmd->flags = MFI_FRAME_DIR_READ; 449279b4460bSKashyap D Desai dcmd->timeout = 0; 449379b4460bSKashyap D Desai dcmd->pad_0 = 0; 449479b4460bSKashyap D Desai dcmd->data_xfer_len = sizeof(struct mrsas_pd_info); 449579b4460bSKashyap D Desai dcmd->opcode = MR_DCMD_PD_GET_INFO; 449679b4460bSKashyap D Desai dcmd->sgl.sge32[0].phys_addr = (u_int32_t)sc->pd_info_phys_addr; 449779b4460bSKashyap D Desai dcmd->sgl.sge32[0].length = sizeof(struct mrsas_pd_info); 449879b4460bSKashyap D Desai 449979b4460bSKashyap D Desai if (!sc->mask_interrupts) 450079b4460bSKashyap D Desai retcode = mrsas_issue_blocked_cmd(sc, cmd); 450179b4460bSKashyap D Desai else 450279b4460bSKashyap D Desai retcode = mrsas_issue_polled(sc, cmd); 450379b4460bSKashyap D Desai 450479b4460bSKashyap D Desai if (retcode == ETIMEDOUT) 450579b4460bSKashyap D Desai goto dcmd_timeout; 450679b4460bSKashyap D Desai 450779b4460bSKashyap D Desai sc->target_list[device_id].interface_type = 450879b4460bSKashyap D Desai sc->pd_info_mem->state.ddf.pdType.intf; 450979b4460bSKashyap D Desai 451079b4460bSKashyap D Desai do_ocr = 0; 451179b4460bSKashyap D Desai 451279b4460bSKashyap D Desai dcmd_timeout: 451379b4460bSKashyap D Desai 451479b4460bSKashyap D Desai if (do_ocr) 451579b4460bSKashyap D Desai sc->do_timedout_reset = MFI_DCMD_TIMEOUT_OCR; 451679b4460bSKashyap D Desai 451779b4460bSKashyap D Desai if (!sc->mask_interrupts) 451879b4460bSKashyap D Desai mrsas_release_mfi_cmd(cmd); 451979b4460bSKashyap D Desai } 452079b4460bSKashyap D Desai 452179b4460bSKashyap D Desai /* 452279b4460bSKashyap D Desai * mrsas_add_target: Add target ID of system PD/VD to driver's data structure. 452379b4460bSKashyap D Desai * sc: Adapter's soft state 452479b4460bSKashyap D Desai * target_id: Unique target id per controller(managed by driver) 452579b4460bSKashyap D Desai * for system PDs- target ID ranges from 0 to (MRSAS_MAX_PD - 1) 452679b4460bSKashyap D Desai * for VDs- target ID ranges from MRSAS_MAX_PD to MRSAS_MAX_TM_TARGETS 452779b4460bSKashyap D Desai * return: void 452879b4460bSKashyap D Desai * Descripton: This function will be called whenever system PD or VD is created. 452979b4460bSKashyap D Desai */ 453079b4460bSKashyap D Desai static void mrsas_add_target(struct mrsas_softc *sc, 453179b4460bSKashyap D Desai u_int16_t target_id) 453279b4460bSKashyap D Desai { 453379b4460bSKashyap D Desai sc->target_list[target_id].target_id = target_id; 453479b4460bSKashyap D Desai 453579b4460bSKashyap D Desai device_printf(sc->mrsas_dev, 453679b4460bSKashyap D Desai "%s created target ID: 0x%x\n", 453779b4460bSKashyap D Desai (target_id < MRSAS_MAX_PD ? "System PD" : "VD"), 453879b4460bSKashyap D Desai (target_id < MRSAS_MAX_PD ? target_id : (target_id - MRSAS_MAX_PD))); 453979b4460bSKashyap D Desai /* 454079b4460bSKashyap D Desai * If interrupts are enabled, then only fire DCMD to get pd_info 454179b4460bSKashyap D Desai * for system PDs 454279b4460bSKashyap D Desai */ 454379b4460bSKashyap D Desai if (!sc->mask_interrupts && sc->pd_info_mem && 454479b4460bSKashyap D Desai (target_id < MRSAS_MAX_PD)) 454579b4460bSKashyap D Desai mrsas_get_pd_info(sc, target_id); 454679b4460bSKashyap D Desai 454779b4460bSKashyap D Desai } 454879b4460bSKashyap D Desai 454979b4460bSKashyap D Desai /* 455079b4460bSKashyap D Desai * mrsas_remove_target: Remove target ID of system PD/VD from driver's data structure. 455179b4460bSKashyap D Desai * sc: Adapter's soft state 455279b4460bSKashyap D Desai * target_id: Unique target id per controller(managed by driver) 455379b4460bSKashyap D Desai * for system PDs- target ID ranges from 0 to (MRSAS_MAX_PD - 1) 455479b4460bSKashyap D Desai * for VDs- target ID ranges from MRSAS_MAX_PD to MRSAS_MAX_TM_TARGETS 455579b4460bSKashyap D Desai * return: void 455679b4460bSKashyap D Desai * Descripton: This function will be called whenever system PD or VD is deleted 455779b4460bSKashyap D Desai */ 455879b4460bSKashyap D Desai static void mrsas_remove_target(struct mrsas_softc *sc, 455979b4460bSKashyap D Desai u_int16_t target_id) 456079b4460bSKashyap D Desai { 456179b4460bSKashyap D Desai sc->target_list[target_id].target_id = 0xffff; 456279b4460bSKashyap D Desai device_printf(sc->mrsas_dev, 456379b4460bSKashyap D Desai "%s deleted target ID: 0x%x\n", 456479b4460bSKashyap D Desai (target_id < MRSAS_MAX_PD ? "System PD" : "VD"), 456579b4460bSKashyap D Desai (target_id < MRSAS_MAX_PD ? target_id : (target_id - MRSAS_MAX_PD))); 456679b4460bSKashyap D Desai } 456779b4460bSKashyap D Desai 45688e727371SKashyap D Desai /* 45698e727371SKashyap D Desai * mrsas_get_pd_list: Returns FW's PD list structure input: 45708e727371SKashyap D Desai * Adapter soft state 4571665484d8SDoug Ambrisko * 45728e727371SKashyap D Desai * Issues an internal command (DCMD) to get the FW's controller PD list 45738e727371SKashyap D Desai * structure. This information is mainly used to find out about system 45748e727371SKashyap D Desai * supported by Firmware. 4575665484d8SDoug Ambrisko */ 45768e727371SKashyap D Desai static int 45778e727371SKashyap D Desai mrsas_get_pd_list(struct mrsas_softc *sc) 4578665484d8SDoug Ambrisko { 4579665484d8SDoug Ambrisko int retcode = 0, pd_index = 0, pd_count = 0, pd_list_size; 4580f0c7594bSKashyap D Desai u_int8_t do_ocr = 1; 4581665484d8SDoug Ambrisko struct mrsas_mfi_cmd *cmd; 4582665484d8SDoug Ambrisko struct mrsas_dcmd_frame *dcmd; 4583665484d8SDoug Ambrisko struct MR_PD_LIST *pd_list_mem; 4584665484d8SDoug Ambrisko struct MR_PD_ADDRESS *pd_addr; 4585665484d8SDoug Ambrisko bus_addr_t pd_list_phys_addr = 0; 4586665484d8SDoug Ambrisko struct mrsas_tmp_dcmd *tcmd; 4587665484d8SDoug Ambrisko 4588665484d8SDoug Ambrisko cmd = mrsas_get_mfi_cmd(sc); 4589665484d8SDoug Ambrisko if (!cmd) { 45904799d485SKashyap D Desai device_printf(sc->mrsas_dev, 45914799d485SKashyap D Desai "Cannot alloc for get PD list cmd\n"); 4592665484d8SDoug Ambrisko return 1; 4593665484d8SDoug Ambrisko } 4594665484d8SDoug Ambrisko dcmd = &cmd->frame->dcmd; 4595665484d8SDoug Ambrisko 4596665484d8SDoug Ambrisko tcmd = malloc(sizeof(struct mrsas_tmp_dcmd), M_MRSAS, M_NOWAIT); 4597665484d8SDoug Ambrisko pd_list_size = MRSAS_MAX_PD * sizeof(struct MR_PD_LIST); 4598665484d8SDoug Ambrisko if (mrsas_alloc_tmp_dcmd(sc, tcmd, pd_list_size) != SUCCESS) { 45994799d485SKashyap D Desai device_printf(sc->mrsas_dev, 46004799d485SKashyap D Desai "Cannot alloc dmamap for get PD list cmd\n"); 4601665484d8SDoug Ambrisko mrsas_release_mfi_cmd(cmd); 4602f0c7594bSKashyap D Desai mrsas_free_tmp_dcmd(tcmd); 4603f0c7594bSKashyap D Desai free(tcmd, M_MRSAS); 4604665484d8SDoug Ambrisko return (ENOMEM); 46058e727371SKashyap D Desai } else { 4606665484d8SDoug Ambrisko pd_list_mem = tcmd->tmp_dcmd_mem; 4607665484d8SDoug Ambrisko pd_list_phys_addr = tcmd->tmp_dcmd_phys_addr; 4608665484d8SDoug Ambrisko } 4609665484d8SDoug Ambrisko memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); 4610665484d8SDoug Ambrisko 4611665484d8SDoug Ambrisko dcmd->mbox.b[0] = MR_PD_QUERY_TYPE_EXPOSED_TO_HOST; 4612665484d8SDoug Ambrisko dcmd->mbox.b[1] = 0; 4613665484d8SDoug Ambrisko dcmd->cmd = MFI_CMD_DCMD; 4614665484d8SDoug Ambrisko dcmd->cmd_status = 0xFF; 4615665484d8SDoug Ambrisko dcmd->sge_count = 1; 4616665484d8SDoug Ambrisko dcmd->flags = MFI_FRAME_DIR_READ; 4617665484d8SDoug Ambrisko dcmd->timeout = 0; 4618665484d8SDoug Ambrisko dcmd->pad_0 = 0; 4619665484d8SDoug Ambrisko dcmd->data_xfer_len = MRSAS_MAX_PD * sizeof(struct MR_PD_LIST); 4620665484d8SDoug Ambrisko dcmd->opcode = MR_DCMD_PD_LIST_QUERY; 4621665484d8SDoug Ambrisko dcmd->sgl.sge32[0].phys_addr = pd_list_phys_addr; 4622665484d8SDoug Ambrisko dcmd->sgl.sge32[0].length = MRSAS_MAX_PD * sizeof(struct MR_PD_LIST); 4623665484d8SDoug Ambrisko 4624731b7561SKashyap D Desai if (!sc->mask_interrupts) 4625731b7561SKashyap D Desai retcode = mrsas_issue_blocked_cmd(sc, cmd); 4626731b7561SKashyap D Desai else 4627f0c7594bSKashyap D Desai retcode = mrsas_issue_polled(sc, cmd); 4628731b7561SKashyap D Desai 4629f0c7594bSKashyap D Desai if (retcode == ETIMEDOUT) 4630f0c7594bSKashyap D Desai goto dcmd_timeout; 4631665484d8SDoug Ambrisko 4632665484d8SDoug Ambrisko /* Get the instance PD list */ 4633665484d8SDoug Ambrisko pd_count = MRSAS_MAX_PD; 4634665484d8SDoug Ambrisko pd_addr = pd_list_mem->addr; 4635f0c7594bSKashyap D Desai if (pd_list_mem->count < pd_count) { 46364799d485SKashyap D Desai memset(sc->local_pd_list, 0, 46374799d485SKashyap D Desai MRSAS_MAX_PD * sizeof(struct mrsas_pd_list)); 4638665484d8SDoug Ambrisko for (pd_index = 0; pd_index < pd_list_mem->count; pd_index++) { 4639665484d8SDoug Ambrisko sc->local_pd_list[pd_addr->deviceId].tid = pd_addr->deviceId; 46404799d485SKashyap D Desai sc->local_pd_list[pd_addr->deviceId].driveType = 46414799d485SKashyap D Desai pd_addr->scsiDevType; 46424799d485SKashyap D Desai sc->local_pd_list[pd_addr->deviceId].driveState = 46434799d485SKashyap D Desai MR_PD_STATE_SYSTEM; 464479b4460bSKashyap D Desai if (sc->target_list[pd_addr->deviceId].target_id == 0xffff) 464579b4460bSKashyap D Desai mrsas_add_target(sc, pd_addr->deviceId); 4646665484d8SDoug Ambrisko pd_addr++; 4647665484d8SDoug Ambrisko } 464879b4460bSKashyap D Desai for (pd_index = 0; pd_index < MRSAS_MAX_PD; pd_index++) { 464979b4460bSKashyap D Desai if ((sc->local_pd_list[pd_index].driveState != 465079b4460bSKashyap D Desai MR_PD_STATE_SYSTEM) && 465179b4460bSKashyap D Desai (sc->target_list[pd_index].target_id != 465279b4460bSKashyap D Desai 0xffff)) { 465379b4460bSKashyap D Desai mrsas_remove_target(sc, pd_index); 465479b4460bSKashyap D Desai } 465579b4460bSKashyap D Desai } 46568e727371SKashyap D Desai /* 46578e727371SKashyap D Desai * Use mutext/spinlock if pd_list component size increase more than 46588e727371SKashyap D Desai * 32 bit. 46598e727371SKashyap D Desai */ 4660665484d8SDoug Ambrisko memcpy(sc->pd_list, sc->local_pd_list, sizeof(sc->local_pd_list)); 4661f0c7594bSKashyap D Desai do_ocr = 0; 4662f0c7594bSKashyap D Desai } 4663f0c7594bSKashyap D Desai dcmd_timeout: 4664665484d8SDoug Ambrisko mrsas_free_tmp_dcmd(tcmd); 4665665484d8SDoug Ambrisko free(tcmd, M_MRSAS); 4666f0c7594bSKashyap D Desai 4667f0c7594bSKashyap D Desai if (do_ocr) 4668f0c7594bSKashyap D Desai sc->do_timedout_reset = MFI_DCMD_TIMEOUT_OCR; 4669731b7561SKashyap D Desai 4670731b7561SKashyap D Desai if (!sc->mask_interrupts) 4671f0c7594bSKashyap D Desai mrsas_release_mfi_cmd(cmd); 4672f0c7594bSKashyap D Desai 4673665484d8SDoug Ambrisko return (retcode); 4674665484d8SDoug Ambrisko } 4675665484d8SDoug Ambrisko 46768e727371SKashyap D Desai /* 46778e727371SKashyap D Desai * mrsas_get_ld_list: Returns FW's LD list structure input: 46788e727371SKashyap D Desai * Adapter soft state 4679665484d8SDoug Ambrisko * 46808e727371SKashyap D Desai * Issues an internal command (DCMD) to get the FW's controller PD list 46818e727371SKashyap D Desai * structure. This information is mainly used to find out about supported by 46828e727371SKashyap D Desai * the FW. 4683665484d8SDoug Ambrisko */ 46848e727371SKashyap D Desai static int 46858e727371SKashyap D Desai mrsas_get_ld_list(struct mrsas_softc *sc) 4686665484d8SDoug Ambrisko { 468779b4460bSKashyap D Desai int ld_list_size, retcode = 0, ld_index = 0, ids = 0, drv_tgt_id; 4688f0c7594bSKashyap D Desai u_int8_t do_ocr = 1; 4689665484d8SDoug Ambrisko struct mrsas_mfi_cmd *cmd; 4690665484d8SDoug Ambrisko struct mrsas_dcmd_frame *dcmd; 4691665484d8SDoug Ambrisko struct MR_LD_LIST *ld_list_mem; 4692665484d8SDoug Ambrisko bus_addr_t ld_list_phys_addr = 0; 4693665484d8SDoug Ambrisko struct mrsas_tmp_dcmd *tcmd; 4694665484d8SDoug Ambrisko 4695665484d8SDoug Ambrisko cmd = mrsas_get_mfi_cmd(sc); 4696665484d8SDoug Ambrisko if (!cmd) { 46974799d485SKashyap D Desai device_printf(sc->mrsas_dev, 46984799d485SKashyap D Desai "Cannot alloc for get LD list cmd\n"); 4699665484d8SDoug Ambrisko return 1; 4700665484d8SDoug Ambrisko } 4701665484d8SDoug Ambrisko dcmd = &cmd->frame->dcmd; 4702665484d8SDoug Ambrisko 4703665484d8SDoug Ambrisko tcmd = malloc(sizeof(struct mrsas_tmp_dcmd), M_MRSAS, M_NOWAIT); 4704665484d8SDoug Ambrisko ld_list_size = sizeof(struct MR_LD_LIST); 4705665484d8SDoug Ambrisko if (mrsas_alloc_tmp_dcmd(sc, tcmd, ld_list_size) != SUCCESS) { 47064799d485SKashyap D Desai device_printf(sc->mrsas_dev, 47074799d485SKashyap D Desai "Cannot alloc dmamap for get LD list cmd\n"); 4708665484d8SDoug Ambrisko mrsas_release_mfi_cmd(cmd); 4709f0c7594bSKashyap D Desai mrsas_free_tmp_dcmd(tcmd); 4710f0c7594bSKashyap D Desai free(tcmd, M_MRSAS); 4711665484d8SDoug Ambrisko return (ENOMEM); 47128e727371SKashyap D Desai } else { 4713665484d8SDoug Ambrisko ld_list_mem = tcmd->tmp_dcmd_mem; 4714665484d8SDoug Ambrisko ld_list_phys_addr = tcmd->tmp_dcmd_phys_addr; 4715665484d8SDoug Ambrisko } 4716665484d8SDoug Ambrisko memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); 4717665484d8SDoug Ambrisko 47184799d485SKashyap D Desai if (sc->max256vdSupport) 47194799d485SKashyap D Desai dcmd->mbox.b[0] = 1; 47204799d485SKashyap D Desai 4721665484d8SDoug Ambrisko dcmd->cmd = MFI_CMD_DCMD; 4722665484d8SDoug Ambrisko dcmd->cmd_status = 0xFF; 4723665484d8SDoug Ambrisko dcmd->sge_count = 1; 4724665484d8SDoug Ambrisko dcmd->flags = MFI_FRAME_DIR_READ; 4725665484d8SDoug Ambrisko dcmd->timeout = 0; 4726665484d8SDoug Ambrisko dcmd->data_xfer_len = sizeof(struct MR_LD_LIST); 4727665484d8SDoug Ambrisko dcmd->opcode = MR_DCMD_LD_GET_LIST; 4728665484d8SDoug Ambrisko dcmd->sgl.sge32[0].phys_addr = ld_list_phys_addr; 4729665484d8SDoug Ambrisko dcmd->sgl.sge32[0].length = sizeof(struct MR_LD_LIST); 4730665484d8SDoug Ambrisko dcmd->pad_0 = 0; 4731665484d8SDoug Ambrisko 4732731b7561SKashyap D Desai if (!sc->mask_interrupts) 4733731b7561SKashyap D Desai retcode = mrsas_issue_blocked_cmd(sc, cmd); 4734731b7561SKashyap D Desai else 4735f0c7594bSKashyap D Desai retcode = mrsas_issue_polled(sc, cmd); 4736731b7561SKashyap D Desai 4737f0c7594bSKashyap D Desai if (retcode == ETIMEDOUT) 4738f0c7594bSKashyap D Desai goto dcmd_timeout; 4739665484d8SDoug Ambrisko 47404799d485SKashyap D Desai #if VD_EXT_DEBUG 47414799d485SKashyap D Desai printf("Number of LDs %d\n", ld_list_mem->ldCount); 47424799d485SKashyap D Desai #endif 47434799d485SKashyap D Desai 4744665484d8SDoug Ambrisko /* Get the instance LD list */ 4745f0c7594bSKashyap D Desai if (ld_list_mem->ldCount <= sc->fw_supported_vd_count) { 4746665484d8SDoug Ambrisko sc->CurLdCount = ld_list_mem->ldCount; 47474799d485SKashyap D Desai memset(sc->ld_ids, 0xff, MAX_LOGICAL_DRIVES_EXT); 4748665484d8SDoug Ambrisko for (ld_index = 0; ld_index < ld_list_mem->ldCount; ld_index++) { 4749665484d8SDoug Ambrisko ids = ld_list_mem->ldList[ld_index].ref.ld_context.targetId; 475079b4460bSKashyap D Desai drv_tgt_id = ids + MRSAS_MAX_PD; 475179b4460bSKashyap D Desai if (ld_list_mem->ldList[ld_index].state != 0) { 4752665484d8SDoug Ambrisko sc->ld_ids[ids] = ld_list_mem->ldList[ld_index].ref.ld_context.targetId; 475379b4460bSKashyap D Desai if (sc->target_list[drv_tgt_id].target_id == 475479b4460bSKashyap D Desai 0xffff) 475579b4460bSKashyap D Desai mrsas_add_target(sc, drv_tgt_id); 475679b4460bSKashyap D Desai } else { 475779b4460bSKashyap D Desai if (sc->target_list[drv_tgt_id].target_id != 475879b4460bSKashyap D Desai 0xffff) 475979b4460bSKashyap D Desai mrsas_remove_target(sc, 476079b4460bSKashyap D Desai drv_tgt_id); 4761665484d8SDoug Ambrisko } 4762665484d8SDoug Ambrisko } 476379b4460bSKashyap D Desai 4764f0c7594bSKashyap D Desai do_ocr = 0; 4765665484d8SDoug Ambrisko } 4766f0c7594bSKashyap D Desai dcmd_timeout: 4767665484d8SDoug Ambrisko mrsas_free_tmp_dcmd(tcmd); 4768665484d8SDoug Ambrisko free(tcmd, M_MRSAS); 4769f0c7594bSKashyap D Desai 4770f0c7594bSKashyap D Desai if (do_ocr) 4771f0c7594bSKashyap D Desai sc->do_timedout_reset = MFI_DCMD_TIMEOUT_OCR; 4772731b7561SKashyap D Desai if (!sc->mask_interrupts) 4773f0c7594bSKashyap D Desai mrsas_release_mfi_cmd(cmd); 4774f0c7594bSKashyap D Desai 4775665484d8SDoug Ambrisko return (retcode); 4776665484d8SDoug Ambrisko } 4777665484d8SDoug Ambrisko 47788e727371SKashyap D Desai /* 47798e727371SKashyap D Desai * mrsas_alloc_tmp_dcmd: Allocates memory for temporary command input: 47808e727371SKashyap D Desai * Adapter soft state Temp command Size of alloction 4781665484d8SDoug Ambrisko * 4782665484d8SDoug Ambrisko * Allocates DMAable memory for a temporary internal command. The allocated 4783665484d8SDoug Ambrisko * memory is initialized to all zeros upon successful loading of the dma 4784665484d8SDoug Ambrisko * mapped memory. 4785665484d8SDoug Ambrisko */ 47868e727371SKashyap D Desai int 47878e727371SKashyap D Desai mrsas_alloc_tmp_dcmd(struct mrsas_softc *sc, 47888e727371SKashyap D Desai struct mrsas_tmp_dcmd *tcmd, int size) 4789665484d8SDoug Ambrisko { 47908e727371SKashyap D Desai if (bus_dma_tag_create(sc->mrsas_parent_tag, 47918e727371SKashyap D Desai 1, 0, 47928e727371SKashyap D Desai BUS_SPACE_MAXADDR_32BIT, 47938e727371SKashyap D Desai BUS_SPACE_MAXADDR, 47948e727371SKashyap D Desai NULL, NULL, 47958e727371SKashyap D Desai size, 47968e727371SKashyap D Desai 1, 47978e727371SKashyap D Desai size, 47988e727371SKashyap D Desai BUS_DMA_ALLOCNOW, 47998e727371SKashyap D Desai NULL, NULL, 4800665484d8SDoug Ambrisko &tcmd->tmp_dcmd_tag)) { 4801665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot allocate tmp dcmd tag\n"); 4802665484d8SDoug Ambrisko return (ENOMEM); 4803665484d8SDoug Ambrisko } 4804665484d8SDoug Ambrisko if (bus_dmamem_alloc(tcmd->tmp_dcmd_tag, (void **)&tcmd->tmp_dcmd_mem, 4805665484d8SDoug Ambrisko BUS_DMA_NOWAIT, &tcmd->tmp_dcmd_dmamap)) { 4806665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot allocate tmp dcmd mem\n"); 4807665484d8SDoug Ambrisko return (ENOMEM); 4808665484d8SDoug Ambrisko } 4809665484d8SDoug Ambrisko if (bus_dmamap_load(tcmd->tmp_dcmd_tag, tcmd->tmp_dcmd_dmamap, 4810665484d8SDoug Ambrisko tcmd->tmp_dcmd_mem, size, mrsas_addr_cb, 4811665484d8SDoug Ambrisko &tcmd->tmp_dcmd_phys_addr, BUS_DMA_NOWAIT)) { 4812665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot load tmp dcmd mem\n"); 4813665484d8SDoug Ambrisko return (ENOMEM); 4814665484d8SDoug Ambrisko } 4815665484d8SDoug Ambrisko memset(tcmd->tmp_dcmd_mem, 0, size); 4816665484d8SDoug Ambrisko return (0); 4817665484d8SDoug Ambrisko } 4818665484d8SDoug Ambrisko 48198e727371SKashyap D Desai /* 48208e727371SKashyap D Desai * mrsas_free_tmp_dcmd: Free memory for temporary command input: 48218e727371SKashyap D Desai * temporary dcmd pointer 4822665484d8SDoug Ambrisko * 48238e727371SKashyap D Desai * Deallocates memory of the temporary command for use in the construction of 48248e727371SKashyap D Desai * the internal DCMD. 4825665484d8SDoug Ambrisko */ 48268e727371SKashyap D Desai void 48278e727371SKashyap D Desai mrsas_free_tmp_dcmd(struct mrsas_tmp_dcmd *tmp) 4828665484d8SDoug Ambrisko { 4829665484d8SDoug Ambrisko if (tmp->tmp_dcmd_phys_addr) 4830665484d8SDoug Ambrisko bus_dmamap_unload(tmp->tmp_dcmd_tag, tmp->tmp_dcmd_dmamap); 4831665484d8SDoug Ambrisko if (tmp->tmp_dcmd_mem != NULL) 4832665484d8SDoug Ambrisko bus_dmamem_free(tmp->tmp_dcmd_tag, tmp->tmp_dcmd_mem, tmp->tmp_dcmd_dmamap); 4833665484d8SDoug Ambrisko if (tmp->tmp_dcmd_tag != NULL) 4834665484d8SDoug Ambrisko bus_dma_tag_destroy(tmp->tmp_dcmd_tag); 4835665484d8SDoug Ambrisko } 4836665484d8SDoug Ambrisko 48378e727371SKashyap D Desai /* 48388e727371SKashyap D Desai * mrsas_issue_blocked_abort_cmd: Aborts previously issued cmd input: 48398e727371SKashyap D Desai * Adapter soft state Previously issued cmd to be aborted 4840665484d8SDoug Ambrisko * 4841665484d8SDoug Ambrisko * This function is used to abort previously issued commands, such as AEN and 4842665484d8SDoug Ambrisko * RAID map sync map commands. The abort command is sent as a DCMD internal 4843665484d8SDoug Ambrisko * command and subsequently the driver will wait for a return status. The 4844665484d8SDoug Ambrisko * max wait time is MRSAS_INTERNAL_CMD_WAIT_TIME seconds. 4845665484d8SDoug Ambrisko */ 48468e727371SKashyap D Desai static int 48478e727371SKashyap D Desai mrsas_issue_blocked_abort_cmd(struct mrsas_softc *sc, 4848665484d8SDoug Ambrisko struct mrsas_mfi_cmd *cmd_to_abort) 4849665484d8SDoug Ambrisko { 4850665484d8SDoug Ambrisko struct mrsas_mfi_cmd *cmd; 4851665484d8SDoug Ambrisko struct mrsas_abort_frame *abort_fr; 4852665484d8SDoug Ambrisko u_int8_t retcode = 0; 4853665484d8SDoug Ambrisko unsigned long total_time = 0; 4854665484d8SDoug Ambrisko u_int8_t max_wait = MRSAS_INTERNAL_CMD_WAIT_TIME; 4855665484d8SDoug Ambrisko 4856665484d8SDoug Ambrisko cmd = mrsas_get_mfi_cmd(sc); 4857665484d8SDoug Ambrisko if (!cmd) { 4858665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Cannot alloc for abort cmd\n"); 4859665484d8SDoug Ambrisko return (1); 4860665484d8SDoug Ambrisko } 4861665484d8SDoug Ambrisko abort_fr = &cmd->frame->abort; 4862665484d8SDoug Ambrisko 4863665484d8SDoug Ambrisko /* Prepare and issue the abort frame */ 4864665484d8SDoug Ambrisko abort_fr->cmd = MFI_CMD_ABORT; 4865665484d8SDoug Ambrisko abort_fr->cmd_status = 0xFF; 4866665484d8SDoug Ambrisko abort_fr->flags = 0; 4867665484d8SDoug Ambrisko abort_fr->abort_context = cmd_to_abort->index; 4868665484d8SDoug Ambrisko abort_fr->abort_mfi_phys_addr_lo = cmd_to_abort->frame_phys_addr; 4869665484d8SDoug Ambrisko abort_fr->abort_mfi_phys_addr_hi = 0; 4870665484d8SDoug Ambrisko 4871665484d8SDoug Ambrisko cmd->sync_cmd = 1; 4872665484d8SDoug Ambrisko cmd->cmd_status = 0xFF; 4873665484d8SDoug Ambrisko 4874665484d8SDoug Ambrisko if (mrsas_issue_dcmd(sc, cmd)) { 4875665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Fail to send abort command.\n"); 4876665484d8SDoug Ambrisko return (1); 4877665484d8SDoug Ambrisko } 4878665484d8SDoug Ambrisko /* Wait for this cmd to complete */ 4879665484d8SDoug Ambrisko sc->chan = (void *)&cmd; 4880665484d8SDoug Ambrisko while (1) { 4881665484d8SDoug Ambrisko if (cmd->cmd_status == 0xFF) { 4882665484d8SDoug Ambrisko tsleep((void *)&sc->chan, 0, "mrsas_sleep", hz); 48838e727371SKashyap D Desai } else 4884665484d8SDoug Ambrisko break; 4885665484d8SDoug Ambrisko total_time++; 4886665484d8SDoug Ambrisko if (total_time >= max_wait) { 4887665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "Abort cmd timed out after %d sec.\n", max_wait); 4888665484d8SDoug Ambrisko retcode = 1; 4889665484d8SDoug Ambrisko break; 4890665484d8SDoug Ambrisko } 4891665484d8SDoug Ambrisko } 4892665484d8SDoug Ambrisko 4893665484d8SDoug Ambrisko cmd->sync_cmd = 0; 4894665484d8SDoug Ambrisko mrsas_release_mfi_cmd(cmd); 4895665484d8SDoug Ambrisko return (retcode); 4896665484d8SDoug Ambrisko } 4897665484d8SDoug Ambrisko 48988e727371SKashyap D Desai /* 48998e727371SKashyap D Desai * mrsas_complete_abort: Completes aborting a command input: 49008e727371SKashyap D Desai * Adapter soft state Cmd that was issued to abort another cmd 4901665484d8SDoug Ambrisko * 49028e727371SKashyap D Desai * The mrsas_issue_blocked_abort_cmd() function waits for the command status to 49038e727371SKashyap D Desai * change after sending the command. This function is called from 4904665484d8SDoug Ambrisko * mrsas_complete_mptmfi_passthru() to wake up the sleep thread associated. 4905665484d8SDoug Ambrisko */ 49068e727371SKashyap D Desai void 49078e727371SKashyap D Desai mrsas_complete_abort(struct mrsas_softc *sc, struct mrsas_mfi_cmd *cmd) 4908665484d8SDoug Ambrisko { 4909665484d8SDoug Ambrisko if (cmd->sync_cmd) { 4910665484d8SDoug Ambrisko cmd->sync_cmd = 0; 4911665484d8SDoug Ambrisko cmd->cmd_status = 0; 4912665484d8SDoug Ambrisko sc->chan = (void *)&cmd; 4913665484d8SDoug Ambrisko wakeup_one((void *)&sc->chan); 4914665484d8SDoug Ambrisko } 4915665484d8SDoug Ambrisko return; 4916665484d8SDoug Ambrisko } 4917665484d8SDoug Ambrisko 49188e727371SKashyap D Desai /* 49198e727371SKashyap D Desai * mrsas_aen_handler: AEN processing callback function from thread context 4920665484d8SDoug Ambrisko * input: Adapter soft state 4921665484d8SDoug Ambrisko * 49228e727371SKashyap D Desai * Asynchronous event handler 4923665484d8SDoug Ambrisko */ 49248e727371SKashyap D Desai void 49258e727371SKashyap D Desai mrsas_aen_handler(struct mrsas_softc *sc) 4926665484d8SDoug Ambrisko { 4927665484d8SDoug Ambrisko union mrsas_evt_class_locale class_locale; 4928665484d8SDoug Ambrisko int doscan = 0; 4929665484d8SDoug Ambrisko u_int32_t seq_num; 4930f0c7594bSKashyap D Desai int error, fail_aen = 0; 4931665484d8SDoug Ambrisko 49325bae00d6SSteven Hartland if (sc == NULL) { 49335bae00d6SSteven Hartland printf("invalid instance!\n"); 4934665484d8SDoug Ambrisko return; 4935665484d8SDoug Ambrisko } 493685c0a961SKashyap D Desai if (sc->remove_in_progress || sc->reset_in_progress) { 493785c0a961SKashyap D Desai device_printf(sc->mrsas_dev, "Returning from %s, line no %d\n", 493885c0a961SKashyap D Desai __func__, __LINE__); 493985c0a961SKashyap D Desai return; 494085c0a961SKashyap D Desai } 4941665484d8SDoug Ambrisko if (sc->evt_detail_mem) { 4942665484d8SDoug Ambrisko switch (sc->evt_detail_mem->code) { 4943665484d8SDoug Ambrisko case MR_EVT_PD_INSERTED: 4944f0c7594bSKashyap D Desai fail_aen = mrsas_get_pd_list(sc); 4945f0c7594bSKashyap D Desai if (!fail_aen) 4946665484d8SDoug Ambrisko mrsas_bus_scan_sim(sc, sc->sim_1); 4947f0c7594bSKashyap D Desai else 4948f0c7594bSKashyap D Desai goto skip_register_aen; 4949665484d8SDoug Ambrisko break; 4950665484d8SDoug Ambrisko case MR_EVT_PD_REMOVED: 4951f0c7594bSKashyap D Desai fail_aen = mrsas_get_pd_list(sc); 4952f0c7594bSKashyap D Desai if (!fail_aen) 4953665484d8SDoug Ambrisko mrsas_bus_scan_sim(sc, sc->sim_1); 4954f0c7594bSKashyap D Desai else 4955f0c7594bSKashyap D Desai goto skip_register_aen; 4956665484d8SDoug Ambrisko break; 4957665484d8SDoug Ambrisko case MR_EVT_LD_OFFLINE: 4958665484d8SDoug Ambrisko case MR_EVT_CFG_CLEARED: 4959665484d8SDoug Ambrisko case MR_EVT_LD_DELETED: 4960665484d8SDoug Ambrisko mrsas_bus_scan_sim(sc, sc->sim_0); 4961665484d8SDoug Ambrisko break; 4962665484d8SDoug Ambrisko case MR_EVT_LD_CREATED: 4963f0c7594bSKashyap D Desai fail_aen = mrsas_get_ld_list(sc); 4964f0c7594bSKashyap D Desai if (!fail_aen) 4965665484d8SDoug Ambrisko mrsas_bus_scan_sim(sc, sc->sim_0); 4966f0c7594bSKashyap D Desai else 4967f0c7594bSKashyap D Desai goto skip_register_aen; 4968665484d8SDoug Ambrisko break; 4969665484d8SDoug Ambrisko case MR_EVT_CTRL_HOST_BUS_SCAN_REQUESTED: 4970665484d8SDoug Ambrisko case MR_EVT_FOREIGN_CFG_IMPORTED: 4971665484d8SDoug Ambrisko case MR_EVT_LD_STATE_CHANGE: 4972665484d8SDoug Ambrisko doscan = 1; 4973665484d8SDoug Ambrisko break; 49748bc320adSKashyap D Desai case MR_EVT_CTRL_PROP_CHANGED: 49758bc320adSKashyap D Desai fail_aen = mrsas_get_ctrl_info(sc); 49768bc320adSKashyap D Desai if (fail_aen) 49778bc320adSKashyap D Desai goto skip_register_aen; 49788bc320adSKashyap D Desai break; 4979665484d8SDoug Ambrisko default: 4980665484d8SDoug Ambrisko break; 4981665484d8SDoug Ambrisko } 4982665484d8SDoug Ambrisko } else { 4983665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "invalid evt_detail\n"); 4984665484d8SDoug Ambrisko return; 4985665484d8SDoug Ambrisko } 4986665484d8SDoug Ambrisko if (doscan) { 4987f0c7594bSKashyap D Desai fail_aen = mrsas_get_pd_list(sc); 4988f0c7594bSKashyap D Desai if (!fail_aen) { 4989665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_AEN, "scanning ...sim 1\n"); 4990665484d8SDoug Ambrisko mrsas_bus_scan_sim(sc, sc->sim_1); 4991f0c7594bSKashyap D Desai } else 4992f0c7594bSKashyap D Desai goto skip_register_aen; 4993f0c7594bSKashyap D Desai 4994f0c7594bSKashyap D Desai fail_aen = mrsas_get_ld_list(sc); 4995f0c7594bSKashyap D Desai if (!fail_aen) { 4996665484d8SDoug Ambrisko mrsas_dprint(sc, MRSAS_AEN, "scanning ...sim 0\n"); 4997665484d8SDoug Ambrisko mrsas_bus_scan_sim(sc, sc->sim_0); 4998f0c7594bSKashyap D Desai } else 4999f0c7594bSKashyap D Desai goto skip_register_aen; 5000665484d8SDoug Ambrisko } 5001665484d8SDoug Ambrisko seq_num = sc->evt_detail_mem->seq_num + 1; 5002665484d8SDoug Ambrisko 50038e727371SKashyap D Desai /* Register AEN with FW for latest sequence number plus 1 */ 5004665484d8SDoug Ambrisko class_locale.members.reserved = 0; 5005665484d8SDoug Ambrisko class_locale.members.locale = MR_EVT_LOCALE_ALL; 5006665484d8SDoug Ambrisko class_locale.members.class = MR_EVT_CLASS_DEBUG; 5007665484d8SDoug Ambrisko 5008665484d8SDoug Ambrisko if (sc->aen_cmd != NULL) 5009665484d8SDoug Ambrisko return; 5010665484d8SDoug Ambrisko 5011665484d8SDoug Ambrisko mtx_lock(&sc->aen_lock); 5012665484d8SDoug Ambrisko error = mrsas_register_aen(sc, seq_num, 5013665484d8SDoug Ambrisko class_locale.word); 5014665484d8SDoug Ambrisko mtx_unlock(&sc->aen_lock); 5015665484d8SDoug Ambrisko 5016665484d8SDoug Ambrisko if (error) 5017665484d8SDoug Ambrisko device_printf(sc->mrsas_dev, "register aen failed error %x\n", error); 5018665484d8SDoug Ambrisko 5019f0c7594bSKashyap D Desai skip_register_aen: 5020f0c7594bSKashyap D Desai return; 5021f0c7594bSKashyap D Desai 5022665484d8SDoug Ambrisko } 5023665484d8SDoug Ambrisko 5024665484d8SDoug Ambrisko 50258e727371SKashyap D Desai /* 5026665484d8SDoug Ambrisko * mrsas_complete_aen: Completes AEN command 5027665484d8SDoug Ambrisko * input: Adapter soft state 5028665484d8SDoug Ambrisko * Cmd that was issued to abort another cmd 5029665484d8SDoug Ambrisko * 50308e727371SKashyap D Desai * This function will be called from ISR and will continue event processing from 50318e727371SKashyap D Desai * thread context by enqueuing task in ev_tq (callback function 50328e727371SKashyap D Desai * "mrsas_aen_handler"). 5033665484d8SDoug Ambrisko */ 50348e727371SKashyap D Desai void 50358e727371SKashyap D Desai mrsas_complete_aen(struct mrsas_softc *sc, struct mrsas_mfi_cmd *cmd) 5036665484d8SDoug Ambrisko { 5037665484d8SDoug Ambrisko /* 50388e727371SKashyap D Desai * Don't signal app if it is just an aborted previously registered 50398e727371SKashyap D Desai * aen 5040665484d8SDoug Ambrisko */ 5041665484d8SDoug Ambrisko if ((!cmd->abort_aen) && (sc->remove_in_progress == 0)) { 5042da011113SKashyap D Desai sc->mrsas_aen_triggered = 1; 5043ecea5be4SKashyap D Desai mtx_lock(&sc->aen_lock); 5044da011113SKashyap D Desai if (sc->mrsas_poll_waiting) { 5045da011113SKashyap D Desai sc->mrsas_poll_waiting = 0; 5046da011113SKashyap D Desai selwakeup(&sc->mrsas_select); 5047da011113SKashyap D Desai } 5048ecea5be4SKashyap D Desai mtx_unlock(&sc->aen_lock); 50498e727371SKashyap D Desai } else 5050665484d8SDoug Ambrisko cmd->abort_aen = 0; 5051665484d8SDoug Ambrisko 5052665484d8SDoug Ambrisko sc->aen_cmd = NULL; 5053665484d8SDoug Ambrisko mrsas_release_mfi_cmd(cmd); 5054665484d8SDoug Ambrisko 5055665484d8SDoug Ambrisko taskqueue_enqueue(sc->ev_tq, &sc->ev_task); 5056665484d8SDoug Ambrisko 5057665484d8SDoug Ambrisko return; 5058665484d8SDoug Ambrisko } 5059665484d8SDoug Ambrisko 5060665484d8SDoug Ambrisko static device_method_t mrsas_methods[] = { 5061665484d8SDoug Ambrisko DEVMETHOD(device_probe, mrsas_probe), 5062665484d8SDoug Ambrisko DEVMETHOD(device_attach, mrsas_attach), 5063665484d8SDoug Ambrisko DEVMETHOD(device_detach, mrsas_detach), 5064f28ecf2bSAndriy Gapon DEVMETHOD(device_shutdown, mrsas_shutdown), 5065665484d8SDoug Ambrisko DEVMETHOD(device_suspend, mrsas_suspend), 5066665484d8SDoug Ambrisko DEVMETHOD(device_resume, mrsas_resume), 5067665484d8SDoug Ambrisko DEVMETHOD(bus_print_child, bus_generic_print_child), 5068665484d8SDoug Ambrisko DEVMETHOD(bus_driver_added, bus_generic_driver_added), 5069665484d8SDoug Ambrisko {0, 0} 5070665484d8SDoug Ambrisko }; 5071665484d8SDoug Ambrisko 5072665484d8SDoug Ambrisko static driver_t mrsas_driver = { 5073665484d8SDoug Ambrisko "mrsas", 5074665484d8SDoug Ambrisko mrsas_methods, 5075665484d8SDoug Ambrisko sizeof(struct mrsas_softc) 5076665484d8SDoug Ambrisko }; 5077665484d8SDoug Ambrisko 5078665484d8SDoug Ambrisko static devclass_t mrsas_devclass; 50798e727371SKashyap D Desai 5080665484d8SDoug Ambrisko DRIVER_MODULE(mrsas, pci, mrsas_driver, mrsas_devclass, 0, 0); 5081665484d8SDoug Ambrisko MODULE_DEPEND(mrsas, cam, 1, 1, 1); 5082