1 /*- 2 * PCI specific probe and attach routines for LSI Fusion Adapters 3 * FreeBSD Version. 4 * 5 * Copyright (c) 2000, 2001 by Greg Ansley 6 * Partially derived from Matt Jacob's ISP driver. 7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob 8 * Feral Software 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice immediately at the beginning of the file, without modification, 16 * this list of conditions, and the following disclaimer. 17 * 2. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 /*- 33 * Copyright (c) 2002, 2006 by Matthew Jacob 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions are 38 * met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 42 * substantially similar to the "NO WARRANTY" disclaimer below 43 * ("Disclaimer") and any redistribution must be conditioned upon including 44 * a substantially similar Disclaimer requirement for further binary 45 * redistribution. 46 * 3. Neither the names of the above listed copyright holders nor the names 47 * of any contributors may be used to endorse or promote products derived 48 * from this software without specific prior written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 * 62 * Support from Chris Ellsworth in order to make SAS adapters work 63 * is gratefully acknowledged. 64 */ 65 /* 66 * Copyright (c) 2004, Avid Technology, Inc. and its contributors. 67 * Copyright (c) 2005, WHEEL Sp. z o.o. 68 * Copyright (c) 2004, 2005 Justin T. Gibbs 69 * All rights reserved. 70 * 71 * Redistribution and use in source and binary forms, with or without 72 * modification, are permitted provided that the following conditions are 73 * met: 74 * 1. Redistributions of source code must retain the above copyright 75 * notice, this list of conditions and the following disclaimer. 76 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 77 * substantially similar to the "NO WARRANTY" disclaimer below 78 * ("Disclaimer") and any redistribution must be conditioned upon including 79 * a substantially similar Disclaimer requirement for further binary 80 * redistribution. 81 * 3. Neither the names of the above listed copyright holders nor the names 82 * of any contributors may be used to endorse or promote products derived 83 * from this software without specific prior written permission. 84 * 85 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 86 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 88 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 89 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 90 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 91 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 92 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 93 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 94 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 95 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 96 */ 97 98 #include <sys/cdefs.h> 99 __FBSDID("$FreeBSD$"); 100 101 #include <dev/mpt/mpt.h> 102 #include <dev/mpt/mpt_cam.h> 103 #include <dev/mpt/mpt_raid.h> 104 105 106 #ifndef PCI_VENDOR_LSI 107 #define PCI_VENDOR_LSI 0x1000 108 #endif 109 110 #ifndef PCI_PRODUCT_LSI_FC909 111 #define PCI_PRODUCT_LSI_FC909 0x0620 112 #endif 113 114 #ifndef PCI_PRODUCT_LSI_FC909A 115 #define PCI_PRODUCT_LSI_FC909A 0x0621 116 #endif 117 118 #ifndef PCI_PRODUCT_LSI_FC919 119 #define PCI_PRODUCT_LSI_FC919 0x0624 120 #endif 121 122 #ifndef PCI_PRODUCT_LSI_FC929 123 #define PCI_PRODUCT_LSI_FC929 0x0622 124 #endif 125 126 #ifndef PCI_PRODUCT_LSI_FC929X 127 #define PCI_PRODUCT_LSI_FC929X 0x0626 128 #endif 129 130 #ifndef PCI_PRODUCT_LSI_1030 131 #define PCI_PRODUCT_LSI_1030 0x0030 132 #endif 133 134 #ifndef PCI_PRODUCT_LSI_SAS1064 135 #define PCI_PRODUCT_LSI_SAS1064 0x0050 136 #endif 137 138 #ifndef PCI_PRODUCT_LSI_SAS1064A 139 #define PCI_PRODUCT_LSI_SAS1064A 0x005C 140 #endif 141 142 #ifndef PCI_PRODUCT_LSI_SAS1064E 143 #define PCI_PRODUCT_LSI_SAS1064E 0x0056 144 #endif 145 146 #ifndef PCI_PRODUCT_LSI_SAS1066 147 #define PCI_PRODUCT_LSI_SAS1066 0x005E 148 #endif 149 150 #ifndef PCI_PRODUCT_LSI_SAS1066E 151 #define PCI_PRODUCT_LSI_SAS1066E 0x005A 152 #endif 153 154 #ifndef PCI_PRODUCT_LSI_SAS1068 155 #define PCI_PRODUCT_LSI_SAS1068 0x0054 156 #endif 157 158 #ifndef PCI_PRODUCT_LSI_SAS1068E 159 #define PCI_PRODUCT_LSI_SAS1068E 0x0058 160 #endif 161 162 #ifndef PCI_PRODUCT_LSI_SAS1078 163 #define PCI_PRODUCT_LSI_SAS1078 0x0060 164 #endif 165 166 #ifndef PCIM_CMD_SERRESPEN 167 #define PCIM_CMD_SERRESPEN 0x0100 168 #endif 169 170 171 #define MPT_IO_BAR 0 172 #define MPT_MEM_BAR 1 173 174 static int mpt_pci_probe(device_t); 175 static int mpt_pci_attach(device_t); 176 static void mpt_free_bus_resources(struct mpt_softc *mpt); 177 static int mpt_pci_detach(device_t); 178 static int mpt_pci_shutdown(device_t); 179 static int mpt_dma_mem_alloc(struct mpt_softc *mpt); 180 static void mpt_dma_mem_free(struct mpt_softc *mpt); 181 static void mpt_read_config_regs(struct mpt_softc *mpt); 182 static void mpt_pci_intr(void *); 183 184 static device_method_t mpt_methods[] = { 185 /* Device interface */ 186 DEVMETHOD(device_probe, mpt_pci_probe), 187 DEVMETHOD(device_attach, mpt_pci_attach), 188 DEVMETHOD(device_detach, mpt_pci_detach), 189 DEVMETHOD(device_shutdown, mpt_pci_shutdown), 190 { 0, 0 } 191 }; 192 193 static driver_t mpt_driver = { 194 "mpt", mpt_methods, sizeof(struct mpt_softc) 195 }; 196 static devclass_t mpt_devclass; 197 DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0); 198 MODULE_VERSION(mpt, 1); 199 200 static int 201 mpt_pci_probe(device_t dev) 202 { 203 char *desc; 204 205 if (pci_get_vendor(dev) != PCI_VENDOR_LSI) 206 return (ENXIO); 207 208 switch ((pci_get_device(dev) & ~1)) { 209 case PCI_PRODUCT_LSI_FC909: 210 desc = "LSILogic FC909 FC Adapter"; 211 break; 212 case PCI_PRODUCT_LSI_FC909A: 213 desc = "LSILogic FC909A FC Adapter"; 214 break; 215 case PCI_PRODUCT_LSI_FC919: 216 desc = "LSILogic FC919 FC Adapter"; 217 break; 218 case PCI_PRODUCT_LSI_FC929: 219 desc = "LSILogic FC929 FC Adapter"; 220 break; 221 case PCI_PRODUCT_LSI_FC929X: 222 desc = "LSILogic FC929X FC Adapter"; 223 break; 224 case PCI_PRODUCT_LSI_1030: 225 desc = "LSILogic 1030 Ultra4 Adapter"; 226 break; 227 case PCI_PRODUCT_LSI_SAS1064: 228 case PCI_PRODUCT_LSI_SAS1064A: 229 case PCI_PRODUCT_LSI_SAS1064E: 230 case PCI_PRODUCT_LSI_SAS1066: 231 case PCI_PRODUCT_LSI_SAS1066E: 232 case PCI_PRODUCT_LSI_SAS1068: 233 case PCI_PRODUCT_LSI_SAS1068E: 234 case PCI_PRODUCT_LSI_SAS1078: 235 desc = "LSILogic SAS Adapter"; 236 break; 237 default: 238 return (ENXIO); 239 } 240 241 device_set_desc(dev, desc); 242 return (0); 243 } 244 245 #ifdef RELENG_4 246 static void 247 mpt_set_options(struct mpt_softc *mpt) 248 { 249 int bitmap; 250 251 bitmap = 0; 252 if (getenv_int("mpt_disable", &bitmap)) { 253 if (bitmap & (1 << mpt->unit)) { 254 mpt->disabled = 1; 255 } 256 } 257 258 bitmap = 0; 259 if (getenv_int("mpt_debug", &bitmap)) { 260 if (bitmap & (1 << mpt->unit)) { 261 mpt->verbose = MPT_PRT_DEBUG; 262 } 263 } 264 265 } 266 #else 267 static void 268 mpt_set_options(struct mpt_softc *mpt) 269 { 270 int tval; 271 272 tval = 0; 273 if (resource_int_value(device_get_name(mpt->dev), 274 device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) { 275 mpt->disabled = 1; 276 } 277 tval = 0; 278 if (resource_int_value(device_get_name(mpt->dev), 279 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) { 280 mpt->verbose += tval; 281 } 282 } 283 #endif 284 285 286 static void 287 mpt_link_peer(struct mpt_softc *mpt) 288 { 289 struct mpt_softc *mpt2; 290 291 if (mpt->unit == 0) 292 return; 293 294 /* 295 * XXX: depends on probe order 296 */ 297 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1); 298 299 if (mpt2 == NULL) { 300 return; 301 } 302 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) { 303 return; 304 } 305 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) { 306 return; 307 } 308 mpt->mpt2 = mpt2; 309 mpt2->mpt2 = mpt; 310 if (mpt->verbose >= MPT_PRT_DEBUG) { 311 mpt_prt(mpt, "linking with peer (mpt%d)\n", 312 device_get_unit(mpt2->dev)); 313 } 314 } 315 316 317 static int 318 mpt_pci_attach(device_t dev) 319 { 320 struct mpt_softc *mpt; 321 int iqd; 322 uint32_t data, cmd; 323 324 /* Allocate the softc structure */ 325 mpt = (struct mpt_softc*)device_get_softc(dev); 326 if (mpt == NULL) { 327 device_printf(dev, "cannot allocate softc\n"); 328 return (ENOMEM); 329 } 330 bzero(mpt, sizeof(struct mpt_softc)); 331 switch ((pci_get_device(dev) & ~1)) { 332 case PCI_PRODUCT_LSI_FC909: 333 case PCI_PRODUCT_LSI_FC909A: 334 case PCI_PRODUCT_LSI_FC919: 335 case PCI_PRODUCT_LSI_FC929: 336 mpt->is_fc = 1; 337 break; 338 case PCI_PRODUCT_LSI_SAS1064: 339 case PCI_PRODUCT_LSI_SAS1064A: 340 case PCI_PRODUCT_LSI_SAS1064E: 341 case PCI_PRODUCT_LSI_SAS1066: 342 case PCI_PRODUCT_LSI_SAS1066E: 343 case PCI_PRODUCT_LSI_SAS1068: 344 case PCI_PRODUCT_LSI_SAS1068E: 345 case PCI_PRODUCT_LSI_SAS1078: 346 mpt->is_sas = 1; 347 break; 348 default: 349 break; 350 } 351 mpt->dev = dev; 352 mpt->unit = device_get_unit(dev); 353 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT; 354 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT; 355 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT; 356 mpt->verbose = MPT_PRT_NONE; 357 mpt_set_options(mpt); 358 if (mpt->verbose == MPT_PRT_NONE) { 359 mpt->verbose = MPT_PRT_WARN; 360 /* Print INFO level (if any) if bootverbose is set */ 361 mpt->verbose += (bootverbose != 0)? 1 : 0; 362 } 363 /* Make sure memory access decoders are enabled */ 364 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 365 if ((cmd & PCIM_CMD_MEMEN) == 0) { 366 device_printf(dev, "Memory accesses disabled"); 367 goto bad; 368 } 369 370 /* 371 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set. 372 */ 373 cmd |= 374 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN | 375 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN; 376 pci_write_config(dev, PCIR_COMMAND, cmd, 2); 377 378 /* 379 * Make sure we've disabled the ROM. 380 */ 381 data = pci_read_config(dev, PCIR_BIOS, 4); 382 data &= ~1; 383 pci_write_config(dev, PCIR_BIOS, data, 4); 384 385 /* 386 * Is this part a dual? 387 * If so, link with our partner (around yet) 388 */ 389 if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 || 390 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) { 391 mpt_link_peer(mpt); 392 } 393 394 /* 395 * Set up register access. PIO mode is required for 396 * certain reset operations (but must be disabled for 397 * some cards otherwise). 398 */ 399 mpt->pci_pio_rid = PCIR_BAR(MPT_IO_BAR); 400 mpt->pci_pio_reg = bus_alloc_resource(dev, SYS_RES_IOPORT, 401 &mpt->pci_pio_rid, 0, ~0, 0, RF_ACTIVE); 402 if (mpt->pci_pio_reg == NULL) { 403 device_printf(dev, "unable to map registers in PIO mode\n"); 404 goto bad; 405 } 406 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg); 407 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg); 408 409 /* Allocate kernel virtual memory for the 9x9's Mem0 region */ 410 mpt->pci_mem_rid = PCIR_BAR(MPT_MEM_BAR); 411 mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY, 412 &mpt->pci_mem_rid, 0, ~0, 0, RF_ACTIVE); 413 if (mpt->pci_reg == NULL) { 414 device_printf(dev, "Unable to memory map registers.\n"); 415 if (mpt->is_sas) { 416 device_printf(dev, "Giving Up.\n"); 417 goto bad; 418 } 419 device_printf(dev, "Falling back to PIO mode.\n"); 420 mpt->pci_st = mpt->pci_pio_st; 421 mpt->pci_sh = mpt->pci_pio_sh; 422 } else { 423 mpt->pci_st = rman_get_bustag(mpt->pci_reg); 424 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg); 425 } 426 427 /* Get a handle to the interrupt */ 428 iqd = 0; 429 #if __FreeBSD_version < 500000 430 mpt->pci_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &iqd, 0, ~0, 1, 431 RF_ACTIVE | RF_SHAREABLE); 432 #else 433 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd, 434 RF_ACTIVE | RF_SHAREABLE); 435 #endif 436 if (mpt->pci_irq == NULL) { 437 device_printf(dev, "could not allocate interrupt\n"); 438 goto bad; 439 } 440 441 MPT_LOCK_SETUP(mpt); 442 443 /* Disable interrupts at the part */ 444 mpt_disable_ints(mpt); 445 446 /* Register the interrupt handler */ 447 if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr, 448 mpt, &mpt->ih)) { 449 device_printf(dev, "could not setup interrupt\n"); 450 goto bad; 451 } 452 453 /* Allocate dma memory */ 454 /* XXX JGibbs -Should really be done based on IOCFacts. */ 455 if (mpt_dma_mem_alloc(mpt)) { 456 device_printf(dev, "Could not allocate DMA memory\n"); 457 goto bad; 458 } 459 460 /* 461 * Save the PCI config register values 462 * 463 * Hard resets are known to screw up the BAR for diagnostic 464 * memory accesses (Mem1). 465 * 466 * Using Mem1 is known to make the chip stop responding to 467 * configuration space transfers, so we need to save it now 468 */ 469 470 mpt_read_config_regs(mpt); 471 472 /* 473 * Disable PIO until we need it 474 */ 475 pci_disable_io(dev, SYS_RES_IOPORT); 476 477 /* Initialize the hardware */ 478 if (mpt->disabled == 0) { 479 480 MPT_LOCK(mpt); 481 if (mpt_attach(mpt) != 0) { 482 MPT_UNLOCK(mpt); 483 goto bad; 484 } 485 } 486 487 return (0); 488 489 bad: 490 mpt_dma_mem_free(mpt); 491 mpt_free_bus_resources(mpt); 492 493 /* 494 * but return zero to preserve unit numbering 495 */ 496 return (0); 497 } 498 499 /* 500 * Free bus resources 501 */ 502 static void 503 mpt_free_bus_resources(struct mpt_softc *mpt) 504 { 505 if (mpt->ih) { 506 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih); 507 mpt->ih = 0; 508 } 509 510 if (mpt->pci_irq) { 511 bus_release_resource(mpt->dev, SYS_RES_IRQ, 0, mpt->pci_irq); 512 mpt->pci_irq = 0; 513 } 514 515 if (mpt->pci_pio_reg) { 516 bus_release_resource(mpt->dev, SYS_RES_IOPORT, mpt->pci_pio_rid, 517 mpt->pci_pio_reg); 518 mpt->pci_pio_reg = 0; 519 } 520 if (mpt->pci_reg) { 521 bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_mem_rid, 522 mpt->pci_reg); 523 mpt->pci_reg = 0; 524 } 525 MPT_LOCK_DESTROY(mpt); 526 } 527 528 529 /* 530 * Disconnect ourselves from the system. 531 */ 532 static int 533 mpt_pci_detach(device_t dev) 534 { 535 struct mpt_softc *mpt; 536 537 mpt = (struct mpt_softc*)device_get_softc(dev); 538 mpt_prt(mpt, "mpt_detach\n"); 539 540 if (mpt) { 541 mpt_disable_ints(mpt); 542 mpt_detach(mpt); 543 mpt_reset(mpt, /*reinit*/FALSE); 544 mpt_dma_mem_free(mpt); 545 mpt_free_bus_resources(mpt); 546 if (mpt->raid_volumes != NULL 547 && mpt->ioc_page2 != NULL) { 548 int i; 549 550 for (i = 0; i < mpt->ioc_page2->MaxVolumes; i++) { 551 struct mpt_raid_volume *mpt_vol; 552 553 mpt_vol = &mpt->raid_volumes[i]; 554 if (mpt_vol->config_page) 555 free(mpt_vol->config_page, M_DEVBUF); 556 } 557 } 558 if (mpt->ioc_page2 != NULL) 559 free(mpt->ioc_page2, M_DEVBUF); 560 if (mpt->ioc_page3 != NULL) 561 free(mpt->ioc_page3, M_DEVBUF); 562 if (mpt->raid_volumes != NULL) 563 free(mpt->raid_volumes, M_DEVBUF); 564 if (mpt->raid_disks != NULL) 565 free(mpt->raid_disks, M_DEVBUF); 566 if (mpt->eh != NULL) 567 EVENTHANDLER_DEREGISTER(shutdown_final, mpt->eh); 568 } 569 return(0); 570 } 571 572 573 /* 574 * Disable the hardware 575 * XXX - Called too early by New Bus!!! ??? 576 */ 577 static int 578 mpt_pci_shutdown(device_t dev) 579 { 580 struct mpt_softc *mpt; 581 582 mpt = (struct mpt_softc *)device_get_softc(dev); 583 if (mpt) 584 return (mpt_shutdown(mpt)); 585 return(0); 586 } 587 588 static int 589 mpt_dma_mem_alloc(struct mpt_softc *mpt) 590 { 591 int i, error, nsegs; 592 uint8_t *vptr; 593 uint32_t pptr, end; 594 size_t len; 595 struct mpt_map_info mi; 596 device_t dev = mpt->dev; 597 598 /* Check if we alreay have allocated the reply memory */ 599 if (mpt->reply_phys != 0) { 600 return 0; 601 } 602 603 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt); 604 #ifdef RELENG_4 605 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK); 606 if (mpt->request_pool == NULL) { 607 device_printf(dev, "cannot allocate request pool\n"); 608 return (1); 609 } 610 bzero(mpt->request_pool, len); 611 #else 612 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO); 613 if (mpt->request_pool == NULL) { 614 device_printf(dev, "cannot allocate request pool\n"); 615 return (1); 616 } 617 #endif 618 619 /* 620 * Create a parent dma tag for this device. 621 * 622 * Align at byte boundaries, limit to 32-bit addressing for 623 * request/reply queues. 624 */ 625 if (mpt_dma_tag_create(mpt, /*parent*/NULL, /*alignment*/1, 626 /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR, 627 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL, 628 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT, 629 /*nsegments*/BUS_SPACE_MAXSIZE_32BIT, 630 /*maxsegsz*/BUS_SPACE_UNRESTRICTED, /*flags*/0, 631 &mpt->parent_dmat) != 0) { 632 device_printf(dev, "cannot create parent dma tag\n"); 633 return (1); 634 } 635 636 /* Create a child tag for reply buffers */ 637 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, 2 * PAGE_SIZE, 638 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 639 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0, 640 &mpt->reply_dmat) != 0) { 641 device_printf(dev, "cannot create a dma tag for replies\n"); 642 return (1); 643 } 644 645 /* Allocate some DMA accessable memory for replies */ 646 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply, 647 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) { 648 device_printf(dev, 649 "cannot allocate %lu bytes of reply memory\n", 650 (u_long) (2 * PAGE_SIZE)); 651 return (1); 652 } 653 654 mi.mpt = mpt; 655 mi.error = 0; 656 657 /* Load and lock it into "bus space" */ 658 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply, 659 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0); 660 661 if (mi.error) { 662 device_printf(dev, 663 "error %d loading dma map for DMA reply queue\n", mi.error); 664 return (1); 665 } 666 mpt->reply_phys = mi.phys; 667 668 /* Create a child tag for data buffers */ 669 670 /* 671 * XXX: we should say that nsegs is 'unrestricted, but that 672 * XXX: tickles a horrible bug in the busdma code. Instead, 673 * XXX: we'll derive a reasonable segment limit from MAXPHYS 674 */ 675 nsegs = (MAXPHYS / PAGE_SIZE) + 1; 676 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, 1, 677 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 678 NULL, NULL, MAXBSIZE, nsegs, BUS_SPACE_MAXSIZE_32BIT, 0, 679 &mpt->buffer_dmat) != 0) { 680 device_printf(dev, 681 "cannot create a dma tag for data buffers\n"); 682 return (1); 683 } 684 685 /* Create a child tag for request buffers */ 686 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 687 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 688 NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0, 689 &mpt->request_dmat) != 0) { 690 device_printf(dev, "cannot create a dma tag for requests\n"); 691 return (1); 692 } 693 694 /* Allocate some DMA accessable memory for requests */ 695 if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request, 696 BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) { 697 device_printf(dev, 698 "cannot allocate %d bytes of request memory\n", 699 MPT_REQ_MEM_SIZE(mpt)); 700 return (1); 701 } 702 703 mi.mpt = mpt; 704 mi.error = 0; 705 706 /* Load and lock it into "bus space" */ 707 bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request, 708 MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &mi, 0); 709 710 if (mi.error) { 711 device_printf(dev, 712 "error %d loading dma map for DMA request queue\n", 713 mi.error); 714 return (1); 715 } 716 mpt->request_phys = mi.phys; 717 718 i = 0; 719 pptr = mpt->request_phys; 720 vptr = mpt->request; 721 end = pptr + MPT_REQ_MEM_SIZE(mpt); 722 while(pptr < end) { 723 request_t *req = &mpt->request_pool[i]; 724 req->index = i++; 725 726 /* Store location of Request Data */ 727 req->req_pbuf = pptr; 728 req->req_vbuf = vptr; 729 730 pptr += MPT_REQUEST_AREA; 731 vptr += MPT_REQUEST_AREA; 732 733 req->sense_pbuf = (pptr - MPT_SENSE_SIZE); 734 req->sense_vbuf = (vptr - MPT_SENSE_SIZE); 735 736 error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap); 737 if (error) { 738 device_printf(dev, 739 "error %d creating per-cmd DMA maps\n", error); 740 return (1); 741 } 742 } 743 return (0); 744 } 745 746 747 748 /* Deallocate memory that was allocated by mpt_dma_mem_alloc 749 */ 750 static void 751 mpt_dma_mem_free(struct mpt_softc *mpt) 752 { 753 int i; 754 755 /* Make sure we aren't double destroying */ 756 if (mpt->reply_dmat == 0) { 757 if (mpt->verbose >= MPT_PRT_DEBUG) 758 device_printf(mpt->dev,"Already released dma memory\n"); 759 return; 760 } 761 762 for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) { 763 bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap); 764 } 765 bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap); 766 bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap); 767 bus_dma_tag_destroy(mpt->request_dmat); 768 bus_dma_tag_destroy(mpt->buffer_dmat); 769 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap); 770 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap); 771 bus_dma_tag_destroy(mpt->reply_dmat); 772 bus_dma_tag_destroy(mpt->parent_dmat); 773 mpt->reply_dmat = 0; 774 free(mpt->request_pool, M_DEVBUF); 775 mpt->request_pool = 0; 776 777 } 778 779 780 781 /* Reads modifiable (via PCI transactions) config registers */ 782 static void 783 mpt_read_config_regs(struct mpt_softc *mpt) 784 { 785 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2); 786 mpt->pci_cfg.LatencyTimer_LineSize = 787 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2); 788 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4); 789 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4); 790 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4); 791 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4); 792 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4); 793 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4); 794 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1); 795 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4); 796 } 797 798 /* Sets modifiable config registers */ 799 void 800 mpt_set_config_regs(struct mpt_softc *mpt) 801 { 802 uint32_t val; 803 804 #define MPT_CHECK(reg, offset, size) \ 805 val = pci_read_config(mpt->dev, offset, size); \ 806 if (mpt->pci_cfg.reg != val) { \ 807 mpt_prt(mpt, \ 808 "Restoring " #reg " to 0x%X from 0x%X\n", \ 809 mpt->pci_cfg.reg, val); \ 810 } 811 812 if (mpt->verbose >= MPT_PRT_DEBUG) { 813 MPT_CHECK(Command, PCIR_COMMAND, 2); 814 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2); 815 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4); 816 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4); 817 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4); 818 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4); 819 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4); 820 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4); 821 MPT_CHECK(IntLine, PCIR_INTLINE, 1); 822 MPT_CHECK(PMCSR, 0x44, 4); 823 } 824 #undef MPT_CHECK 825 826 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2); 827 pci_write_config(mpt->dev, PCIR_CACHELNSZ, 828 mpt->pci_cfg.LatencyTimer_LineSize, 2); 829 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4); 830 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4); 831 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4); 832 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4); 833 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4); 834 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4); 835 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1); 836 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4); 837 } 838 839 static void 840 mpt_pci_intr(void *arg) 841 { 842 struct mpt_softc *mpt; 843 844 mpt = (struct mpt_softc *)arg; 845 MPT_LOCK(mpt); 846 mpt_intr(mpt); 847 MPT_UNLOCK(mpt); 848 } 849