1 /*- 2 * PCI specific probe and attach routines for LSI Fusion Adapters 3 * FreeBSD Version. 4 * 5 * Copyright (c) 2000, 2001 by Greg Ansley 6 * Partially derived from Matt Jacob's ISP driver. 7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob 8 * Feral Software 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice immediately at the beginning of the file, without modification, 16 * this list of conditions, and the following disclaimer. 17 * 2. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/kernel.h> 39 #include <sys/module.h> 40 #include <sys/bus.h> 41 42 #include <dev/pci/pcireg.h> 43 #include <dev/pci/pcivar.h> 44 45 #include <machine/bus.h> 46 #include <machine/resource.h> 47 #include <sys/rman.h> 48 #include <sys/malloc.h> 49 50 #include <dev/mpt/mpt_freebsd.h> 51 52 #ifndef PCI_VENDOR_LSI 53 #define PCI_VENDOR_LSI 0x1000 54 #endif 55 56 #ifndef PCI_PRODUCT_LSI_FC909 57 #define PCI_PRODUCT_LSI_FC909 0x0620 58 #endif 59 60 #ifndef PCI_PRODUCT_LSI_FC909A 61 #define PCI_PRODUCT_LSI_FC909A 0x0621 62 #endif 63 64 #ifndef PCI_PRODUCT_LSI_FC919 65 #define PCI_PRODUCT_LSI_FC919 0x0624 66 #endif 67 68 #ifndef PCI_PRODUCT_LSI_FC929 69 #define PCI_PRODUCT_LSI_FC929 0x0622 70 #endif 71 72 #ifndef PCI_PRODUCT_LSI_FC929X 73 #define PCI_PRODUCT_LSI_FC929X 0x0626 74 #endif 75 76 #ifndef PCI_PRODUCT_LSI_1030 77 #define PCI_PRODUCT_LSI_1030 0x0030 78 #endif 79 80 #ifndef PCIM_CMD_SERRESPEN 81 #define PCIM_CMD_SERRESPEN 0x0100 82 #endif 83 84 85 86 #define MEM_MAP_REG 0x14 87 #define MEM_MAP_SRAM 0x1C 88 89 static int mpt_probe(device_t); 90 static int mpt_attach(device_t); 91 static void mpt_free_bus_resources(mpt_softc_t *mpt); 92 static int mpt_detach(device_t); 93 static int mpt_shutdown(device_t); 94 static int mpt_dma_mem_alloc(mpt_softc_t *mpt); 95 static void mpt_dma_mem_free(mpt_softc_t *mpt); 96 static void mpt_read_config_regs(mpt_softc_t *mpt); 97 static void mpt_pci_intr(void *); 98 99 static device_method_t mpt_methods[] = { 100 /* Device interface */ 101 DEVMETHOD(device_probe, mpt_probe), 102 DEVMETHOD(device_attach, mpt_attach), 103 DEVMETHOD(device_detach, mpt_detach), 104 DEVMETHOD(device_shutdown, mpt_shutdown), 105 { 0, 0 } 106 }; 107 108 static driver_t mpt_driver = { 109 "mpt", mpt_methods, sizeof (mpt_softc_t) 110 }; 111 static devclass_t mpt_devclass; 112 DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0); 113 MODULE_VERSION(mpt, 1); 114 115 int 116 mpt_intr(void *dummy) 117 { 118 int nrepl = 0; 119 u_int32_t reply; 120 mpt_softc_t *mpt = (mpt_softc_t *)dummy; 121 122 if ((mpt_read(mpt, MPT_OFFSET_INTR_STATUS) & MPT_INTR_REPLY_READY) == 0) 123 return (0); 124 reply = mpt_pop_reply_queue(mpt); 125 while (reply != MPT_REPLY_EMPTY) { 126 nrepl++; 127 if (mpt->verbose > 1) { 128 if ((reply & MPT_CONTEXT_REPLY) != 0) { 129 /* Address reply; IOC has something to say */ 130 mpt_print_reply(MPT_REPLY_PTOV(mpt, reply)); 131 } else { 132 /* Context reply ; all went well */ 133 mpt_prt(mpt, "context %u reply OK", reply); 134 } 135 } 136 mpt_done(mpt, reply); 137 reply = mpt_pop_reply_queue(mpt); 138 } 139 return (nrepl != 0); 140 } 141 142 static int 143 mpt_probe(device_t dev) 144 { 145 char *desc; 146 147 if (pci_get_vendor(dev) != PCI_VENDOR_LSI) 148 return (ENXIO); 149 150 switch ((pci_get_device(dev) & ~1)) { 151 case PCI_PRODUCT_LSI_FC909: 152 desc = "LSILogic FC909 FC Adapter"; 153 break; 154 case PCI_PRODUCT_LSI_FC909A: 155 desc = "LSILogic FC909A FC Adapter"; 156 break; 157 case PCI_PRODUCT_LSI_FC919: 158 desc = "LSILogic FC919 FC Adapter"; 159 break; 160 case PCI_PRODUCT_LSI_FC929: 161 desc = "LSILogic FC929 FC Adapter"; 162 break; 163 case PCI_PRODUCT_LSI_FC929X: 164 desc = "LSILogic FC929X FC Adapter"; 165 break; 166 case PCI_PRODUCT_LSI_1030: 167 desc = "LSILogic 1030 Ultra4 Adapter"; 168 break; 169 default: 170 return (ENXIO); 171 } 172 173 device_set_desc(dev, desc); 174 return (BUS_PROBE_DEFAULT); 175 } 176 177 #ifdef RELENG_4 178 static void 179 mpt_set_options(mpt_softc_t *mpt) 180 { 181 int bitmap; 182 183 bitmap = 0; 184 if (getenv_int("mpt_disable", &bitmap)) { 185 if (bitmap & (1 << mpt->unit)) { 186 mpt->disabled = 1; 187 } 188 } 189 190 bitmap = 0; 191 if (getenv_int("mpt_debug", &bitmap)) { 192 if (bitmap & (1 << mpt->unit)) { 193 mpt->verbose = 2; 194 } 195 } 196 197 } 198 #else 199 static void 200 mpt_set_options(mpt_softc_t *mpt) 201 { 202 int tval; 203 204 tval = 0; 205 if (resource_int_value(device_get_name(mpt->dev), 206 device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) { 207 mpt->disabled = 1; 208 } 209 tval = 0; 210 if (resource_int_value(device_get_name(mpt->dev), 211 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) { 212 mpt->verbose += tval; 213 } 214 } 215 #endif 216 217 218 static void 219 mpt_link_peer(mpt_softc_t *mpt) 220 { 221 mpt_softc_t *mpt2; 222 223 if (mpt->unit == 0) { 224 return; 225 } 226 227 /* 228 * XXX: depends on probe order 229 */ 230 mpt2 = (mpt_softc_t *) devclass_get_softc(mpt_devclass, mpt->unit-1); 231 232 if (mpt2 == NULL) { 233 return; 234 } 235 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) { 236 return; 237 } 238 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) { 239 return; 240 } 241 mpt->mpt2 = mpt2; 242 mpt2->mpt2 = mpt; 243 if (mpt->verbose) { 244 mpt_prt(mpt, "linking with peer (mpt%d)", 245 device_get_unit(mpt2->dev)); 246 } 247 } 248 249 250 static int 251 mpt_attach(device_t dev) 252 { 253 int iqd; 254 u_int32_t data, cmd; 255 mpt_softc_t *mpt; 256 257 /* Allocate the softc structure */ 258 mpt = (mpt_softc_t*) device_get_softc(dev); 259 if (mpt == NULL) { 260 device_printf(dev, "cannot allocate softc\n"); 261 return (ENOMEM); 262 } 263 bzero(mpt, sizeof (mpt_softc_t)); 264 switch ((pci_get_device(dev) & ~1)) { 265 case PCI_PRODUCT_LSI_FC909: 266 case PCI_PRODUCT_LSI_FC909A: 267 case PCI_PRODUCT_LSI_FC919: 268 case PCI_PRODUCT_LSI_FC929: 269 mpt->is_fc = 1; 270 break; 271 default: 272 break; 273 } 274 mpt->dev = dev; 275 mpt->unit = device_get_unit(dev); 276 mpt_set_options(mpt); 277 mpt->verbose += (bootverbose != 0)? 1 : 0; 278 279 /* Make sure memory access decoders are enabled */ 280 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 281 if ((cmd & PCIM_CMD_MEMEN) == 0) { 282 device_printf(dev, "Memory accesses disabled"); 283 goto bad; 284 } 285 286 /* 287 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set. 288 */ 289 cmd |= 290 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN | 291 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN; 292 pci_write_config(dev, PCIR_COMMAND, cmd, 2); 293 294 /* 295 * Make sure we've disabled the ROM. 296 */ 297 data = pci_read_config(dev, PCIR_BIOS, 4); 298 data &= ~1; 299 pci_write_config(dev, PCIR_BIOS, data, 4); 300 301 302 /* 303 * Is this part a dual? 304 * If so, link with our partner (around yet) 305 */ 306 if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 || 307 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) { 308 mpt_link_peer(mpt); 309 } 310 311 /* Set up the memory regions */ 312 /* Allocate kernel virtual memory for the 9x9's Mem0 region */ 313 mpt->pci_reg_id = MEM_MAP_REG; 314 mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY, 315 &mpt->pci_reg_id, 0, ~0, 0, RF_ACTIVE); 316 if (mpt->pci_reg == NULL) { 317 device_printf(dev, "unable to map any ports\n"); 318 goto bad; 319 } 320 mpt->pci_st = rman_get_bustag(mpt->pci_reg); 321 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg); 322 /* Get the Physical Address */ 323 mpt->pci_pa = rman_get_start(mpt->pci_reg); 324 325 /* Get a handle to the interrupt */ 326 iqd = 0; 327 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd, 328 RF_ACTIVE | RF_SHAREABLE); 329 if (mpt->pci_irq == NULL) { 330 device_printf(dev, "could not allocate interrupt\n"); 331 goto bad; 332 } 333 334 /* Register the interrupt handler */ 335 if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr, 336 mpt, &mpt->ih)) { 337 device_printf(dev, "could not setup interrupt\n"); 338 goto bad; 339 } 340 341 MPT_LOCK_SETUP(mpt); 342 343 /* Disable interrupts at the part */ 344 mpt_disable_ints(mpt); 345 346 /* Allocate dma memory */ 347 if (mpt_dma_mem_alloc(mpt)) { 348 device_printf(dev, "Could not allocate DMA memory\n"); 349 goto bad; 350 } 351 352 /* 353 * Save the PCI config register values 354 * 355 * Hard resets are known to screw up the BAR for diagnostic 356 * memory accesses (Mem1). 357 * 358 * Using Mem1 is known to make the chip stop responding to 359 * configuration space transfers, so we need to save it now 360 */ 361 362 mpt_read_config_regs(mpt); 363 364 /* Initialize the hardware */ 365 if (mpt->disabled == 0) { 366 MPT_LOCK(mpt); 367 if (mpt_init(mpt, MPT_DB_INIT_HOST) != 0) { 368 MPT_UNLOCK(mpt); 369 goto bad; 370 } 371 372 /* 373 * Attach to CAM 374 */ 375 MPTLOCK_2_CAMLOCK(mpt); 376 mpt_cam_attach(mpt); 377 CAMLOCK_2_MPTLOCK(mpt); 378 MPT_UNLOCK(mpt); 379 } 380 381 return (0); 382 383 bad: 384 mpt_dma_mem_free(mpt); 385 mpt_free_bus_resources(mpt); 386 387 /* 388 * but return zero to preserve unit numbering 389 */ 390 return (0); 391 } 392 393 /* 394 * Free bus resources 395 */ 396 static void 397 mpt_free_bus_resources(mpt_softc_t *mpt) 398 { 399 if (mpt->ih) { 400 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih); 401 mpt->ih = 0; 402 } 403 404 if (mpt->pci_irq) { 405 bus_release_resource(mpt->dev, SYS_RES_IRQ, 0, mpt->pci_irq); 406 mpt->pci_irq = 0; 407 } 408 409 if (mpt->pci_reg) { 410 bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_reg_id, 411 mpt->pci_reg); 412 mpt->pci_reg = 0; 413 } 414 MPT_LOCK_DESTROY(mpt); 415 } 416 417 418 /* 419 * Disconnect ourselves from the system. 420 */ 421 static int 422 mpt_detach(device_t dev) 423 { 424 mpt_softc_t *mpt; 425 mpt = (mpt_softc_t*) device_get_softc(dev); 426 427 mpt_prt(mpt, "mpt_detach"); 428 429 if (mpt) { 430 mpt_disable_ints(mpt); 431 mpt_cam_detach(mpt); 432 mpt_reset(mpt); 433 mpt_dma_mem_free(mpt); 434 mpt_free_bus_resources(mpt); 435 } 436 return(0); 437 } 438 439 440 /* 441 * Disable the hardware 442 */ 443 static int 444 mpt_shutdown(device_t dev) 445 { 446 mpt_softc_t *mpt; 447 mpt = (mpt_softc_t*) device_get_softc(dev); 448 449 if (mpt) { 450 mpt_reset(mpt); 451 } 452 return(0); 453 } 454 455 456 struct imush { 457 mpt_softc_t *mpt; 458 int error; 459 u_int32_t phys; 460 }; 461 462 static void 463 mpt_map_rquest(void *arg, bus_dma_segment_t *segs, int nseg, int error) 464 { 465 struct imush *imushp = (struct imush *) arg; 466 imushp->error = error; 467 imushp->phys = segs->ds_addr; 468 } 469 470 471 static int 472 mpt_dma_mem_alloc(mpt_softc_t *mpt) 473 { 474 int i, error; 475 u_char *vptr; 476 u_int32_t pptr, end; 477 size_t len; 478 struct imush im; 479 device_t dev = mpt->dev; 480 481 /* Check if we alreay have allocated the reply memory */ 482 if (mpt->reply_phys != 0) { 483 return 0; 484 } 485 486 len = sizeof (request_t *) * MPT_REQ_MEM_SIZE(mpt); 487 #ifdef RELENG_4 488 mpt->request_pool = (request_t *) malloc(len, M_DEVBUF, M_WAITOK); 489 if (mpt->request_pool == NULL) { 490 device_printf(dev, "cannot allocate request pool\n"); 491 return (1); 492 } 493 bzero(mpt->request_pool, len); 494 #else 495 mpt->request_pool = (request_t *) 496 malloc(len, M_DEVBUF, M_WAITOK | M_ZERO); 497 if (mpt->request_pool == NULL) { 498 device_printf(dev, "cannot allocate request pool\n"); 499 return (1); 500 } 501 #endif 502 503 /* 504 * Create a dma tag for this device 505 * 506 * Align at page boundaries, limit to 32-bit addressing 507 * (The chip supports 64-bit addressing, but this driver doesn't) 508 */ 509 if (bus_dma_tag_create(NULL, PAGE_SIZE, 0, BUS_SPACE_MAXADDR_32BIT, 510 BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE_32BIT, 511 BUS_SPACE_MAXSIZE_32BIT, BUS_SPACE_UNRESTRICTED, 0, 512 busdma_lock_mutex, &Giant, &mpt->parent_dmat) != 0) { 513 device_printf(dev, "cannot create parent dma tag\n"); 514 return (1); 515 } 516 517 /* Create a child tag for reply buffers */ 518 if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE, 519 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 520 NULL, NULL, PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0, 521 busdma_lock_mutex, &Giant, &mpt->reply_dmat) != 0) { 522 device_printf(dev, "cannot create a dma tag for replies\n"); 523 return (1); 524 } 525 526 /* Allocate some DMA accessable memory for replies */ 527 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply, 528 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) { 529 device_printf(dev, "cannot allocate %lu bytes of reply memory\n", 530 (u_long)PAGE_SIZE); 531 return (1); 532 } 533 534 im.mpt = mpt; 535 im.error = 0; 536 537 /* Load and lock it into "bus space" */ 538 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply, 539 PAGE_SIZE, mpt_map_rquest, &im, 0); 540 541 if (im.error) { 542 device_printf(dev, 543 "error %d loading dma map for DMA reply queue\n", im.error); 544 return (1); 545 } 546 mpt->reply_phys = im.phys; 547 548 /* Create a child tag for data buffers */ 549 if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE, 550 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 551 NULL, NULL, MAXBSIZE, MPT_SGL_MAX, BUS_SPACE_MAXSIZE_32BIT, 0, 552 busdma_lock_mutex, &Giant, &mpt->buffer_dmat) != 0) { 553 device_printf(dev, 554 "cannot create a dma tag for data buffers\n"); 555 return (1); 556 } 557 558 /* Create a child tag for request buffers */ 559 if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE, 560 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 561 NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0, 562 busdma_lock_mutex, &Giant, &mpt->request_dmat) != 0) { 563 device_printf(dev, "cannot create a dma tag for requests\n"); 564 return (1); 565 } 566 567 /* Allocate some DMA accessable memory for requests */ 568 if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request, 569 BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) { 570 device_printf(dev, 571 "cannot allocate %d bytes of request memory\n", 572 MPT_REQ_MEM_SIZE(mpt)); 573 return (1); 574 } 575 576 im.mpt = mpt; 577 im.error = 0; 578 579 /* Load and lock it into "bus space" */ 580 bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request, 581 MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &im, 0); 582 583 if (im.error) { 584 device_printf(dev, 585 "error %d loading dma map for DMA request queue\n", 586 im.error); 587 return (1); 588 } 589 mpt->request_phys = im.phys; 590 591 i = 0; 592 pptr = mpt->request_phys; 593 vptr = mpt->request; 594 end = pptr + MPT_REQ_MEM_SIZE(mpt); 595 while(pptr < end) { 596 request_t *req = &mpt->request_pool[i]; 597 req->index = i++; 598 599 /* Store location of Request Data */ 600 req->req_pbuf = pptr; 601 req->req_vbuf = vptr; 602 603 pptr += MPT_REQUEST_AREA; 604 vptr += MPT_REQUEST_AREA; 605 606 req->sense_pbuf = (pptr - MPT_SENSE_SIZE); 607 req->sense_vbuf = (vptr - MPT_SENSE_SIZE); 608 609 error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap); 610 if (error) { 611 device_printf(dev, 612 "error %d creating per-cmd DMA maps\n", error); 613 return (1); 614 } 615 } 616 return (0); 617 } 618 619 620 621 /* Deallocate memory that was allocated by mpt_dma_mem_alloc 622 */ 623 static void 624 mpt_dma_mem_free(mpt_softc_t *mpt) 625 { 626 int i; 627 628 /* Make sure we aren't double destroying */ 629 if (mpt->reply_dmat == 0) { 630 if (mpt->verbose) 631 device_printf(mpt->dev,"Already released dma memory\n"); 632 return; 633 } 634 635 for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) { 636 bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap); 637 } 638 bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap); 639 bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap); 640 bus_dma_tag_destroy(mpt->request_dmat); 641 bus_dma_tag_destroy(mpt->buffer_dmat); 642 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap); 643 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap); 644 bus_dma_tag_destroy(mpt->reply_dmat); 645 bus_dma_tag_destroy(mpt->parent_dmat); 646 mpt->reply_dmat = 0; 647 free(mpt->request_pool, M_DEVBUF); 648 mpt->request_pool = 0; 649 650 } 651 652 653 654 /* Reads modifiable (via PCI transactions) config registers */ 655 static void 656 mpt_read_config_regs(mpt_softc_t *mpt) 657 { 658 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2); 659 mpt->pci_cfg.LatencyTimer_LineSize = 660 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2); 661 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4); 662 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4); 663 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4); 664 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4); 665 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4); 666 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4); 667 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1); 668 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4); 669 } 670 671 /* Sets modifiable config registers */ 672 void 673 mpt_set_config_regs(mpt_softc_t *mpt) 674 { 675 u_int32_t val; 676 677 #define MPT_CHECK(reg, offset, size) \ 678 val = pci_read_config(mpt->dev, offset, size); \ 679 if (mpt->pci_cfg.reg != val) { \ 680 mpt_prt(mpt, \ 681 "Restoring " #reg " to 0x%X from 0x%X\n", \ 682 mpt->pci_cfg.reg, val); \ 683 } 684 685 if (mpt->verbose) { 686 MPT_CHECK(Command, PCIR_COMMAND, 2); 687 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2); 688 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4); 689 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4); 690 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4); 691 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4); 692 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4); 693 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4); 694 MPT_CHECK(IntLine, PCIR_INTLINE, 1); 695 MPT_CHECK(PMCSR, 0x44, 4); 696 } 697 #undef MPT_CHECK 698 699 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2); 700 pci_write_config(mpt->dev, PCIR_CACHELNSZ, 701 mpt->pci_cfg.LatencyTimer_LineSize, 2); 702 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4); 703 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4); 704 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4); 705 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4); 706 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4); 707 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4); 708 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1); 709 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4); 710 } 711 712 static void 713 mpt_pci_intr(void *arg) 714 { 715 mpt_softc_t *mpt = arg; 716 MPT_LOCK(mpt); 717 (void) mpt_intr(mpt); 718 MPT_UNLOCK(mpt); 719 } 720