1 /*- 2 * PCI specific probe and attach routines for LSI Fusion Adapters 3 * FreeBSD Version. 4 * 5 * SPDX-License-Identifier: BSD-2-Clause AND BSD-3-Clause 6 * 7 * Copyright (c) 2000, 2001 by Greg Ansley 8 * Partially derived from Matt Jacob's ISP driver. 9 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob 10 * Feral Software 11 * All rights reserved. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice immediately at the beginning of the file, without modification, 18 * this list of conditions, and the following disclaimer. 19 * 2. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 /*- 35 * Copyright (c) 2002, 2006 by Matthew Jacob 36 * All rights reserved. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions are 40 * met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 44 * substantially similar to the "NO WARRANTY" disclaimer below 45 * ("Disclaimer") and any redistribution must be conditioned upon including 46 * a substantially similar Disclaimer requirement for further binary 47 * redistribution. 48 * 3. Neither the names of the above listed copyright holders nor the names 49 * of any contributors may be used to endorse or promote products derived 50 * from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 53 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 55 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 56 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 57 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 58 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 59 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 60 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 62 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 63 * 64 * Support from Chris Ellsworth in order to make SAS adapters work 65 * is gratefully acknowledged. 66 * 67 * Support from LSI-Logic has also gone a great deal toward making this a 68 * workable subsystem and is gratefully acknowledged. 69 */ 70 /* 71 * Copyright (c) 2004, Avid Technology, Inc. and its contributors. 72 * Copyright (c) 2005, WHEEL Sp. z o.o. 73 * Copyright (c) 2004, 2005 Justin T. Gibbs 74 * All rights reserved. 75 * 76 * Redistribution and use in source and binary forms, with or without 77 * modification, are permitted provided that the following conditions are 78 * met: 79 * 1. Redistributions of source code must retain the above copyright 80 * notice, this list of conditions and the following disclaimer. 81 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 82 * substantially similar to the "NO WARRANTY" disclaimer below 83 * ("Disclaimer") and any redistribution must be conditioned upon including 84 * a substantially similar Disclaimer requirement for further binary 85 * redistribution. 86 * 3. Neither the names of the above listed copyright holders nor the names 87 * of any contributors may be used to endorse or promote products derived 88 * from this software without specific prior written permission. 89 * 90 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 91 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 92 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 93 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 94 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 95 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 96 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 97 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 98 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 99 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 100 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 101 */ 102 103 #include <sys/cdefs.h> 104 __FBSDID("$FreeBSD$"); 105 106 #include <dev/mpt/mpt.h> 107 #include <dev/mpt/mpt_cam.h> 108 #include <dev/mpt/mpt_raid.h> 109 110 /* 111 * XXX it seems no other MPT driver knows about the following chips. 112 */ 113 114 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC909_FB 115 #define MPI_MANUFACTPAGE_DEVICEID_FC909_FB 0x0620 116 #endif 117 118 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB 119 #define MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB 0x0625 120 #endif 121 122 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB 123 #define MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB 0x0623 124 #endif 125 126 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB 127 #define MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB 0x0627 128 #endif 129 130 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB 131 #define MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB 0x0629 132 #endif 133 134 #ifndef MPI_MANUFACTPAGE_DEVID_SAS1068A_FB 135 #define MPI_MANUFACTPAGE_DEVID_SAS1068A_FB 0x0055 136 #endif 137 138 #ifndef MPI_MANUFACTPAGE_DEVID_SAS1068E_FB 139 #define MPI_MANUFACTPAGE_DEVID_SAS1068E_FB 0x0059 140 #endif 141 142 #ifndef MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB 143 #define MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB 0x007C 144 #endif 145 146 static int mpt_pci_probe(device_t); 147 static int mpt_pci_attach(device_t); 148 static void mpt_free_bus_resources(struct mpt_softc *mpt); 149 static int mpt_pci_detach(device_t); 150 static int mpt_pci_shutdown(device_t); 151 static int mpt_dma_mem_alloc(struct mpt_softc *mpt); 152 static void mpt_dma_mem_free(struct mpt_softc *mpt); 153 #if 0 154 static void mpt_read_config_regs(struct mpt_softc *mpt); 155 static void mpt_set_config_regs(struct mpt_softc *mpt); 156 #endif 157 static void mpt_pci_intr(void *); 158 159 static device_method_t mpt_methods[] = { 160 /* Device interface */ 161 DEVMETHOD(device_probe, mpt_pci_probe), 162 DEVMETHOD(device_attach, mpt_pci_attach), 163 DEVMETHOD(device_detach, mpt_pci_detach), 164 DEVMETHOD(device_shutdown, mpt_pci_shutdown), 165 DEVMETHOD_END 166 }; 167 168 static driver_t mpt_driver = { 169 "mpt", mpt_methods, sizeof(struct mpt_softc) 170 }; 171 172 DRIVER_MODULE(mpt, pci, mpt_driver, NULL, NULL); 173 MODULE_DEPEND(mpt, pci, 1, 1, 1); 174 MODULE_VERSION(mpt, 1); 175 176 static int 177 mpt_pci_probe(device_t dev) 178 { 179 const char *desc; 180 int rval; 181 182 if (pci_get_vendor(dev) != MPI_MANUFACTPAGE_VENDORID_LSILOGIC) 183 return (ENXIO); 184 185 rval = BUS_PROBE_DEFAULT; 186 switch (pci_get_device(dev)) { 187 case MPI_MANUFACTPAGE_DEVICEID_FC909_FB: 188 desc = "LSILogic FC909 FC Adapter"; 189 break; 190 case MPI_MANUFACTPAGE_DEVICEID_FC909: 191 desc = "LSILogic FC909A FC Adapter"; 192 break; 193 case MPI_MANUFACTPAGE_DEVICEID_FC919: 194 desc = "LSILogic FC919 FC Adapter"; 195 break; 196 case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB: 197 desc = "LSILogic FC919 LAN Adapter"; 198 break; 199 case MPI_MANUFACTPAGE_DEVICEID_FC929: 200 desc = "Dual LSILogic FC929 FC Adapter"; 201 break; 202 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB: 203 desc = "Dual LSILogic FC929 LAN Adapter"; 204 break; 205 case MPI_MANUFACTPAGE_DEVICEID_FC919X: 206 desc = "LSILogic FC919 FC PCI-X Adapter"; 207 break; 208 case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB: 209 desc = "LSILogic FC919 LAN PCI-X Adapter"; 210 break; 211 case MPI_MANUFACTPAGE_DEVICEID_FC929X: 212 desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter"; 213 break; 214 case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB: 215 desc = "Dual LSILogic FC929X LAN PCI-X Adapter"; 216 break; 217 case MPI_MANUFACTPAGE_DEVICEID_FC949E: 218 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter"; 219 break; 220 case MPI_MANUFACTPAGE_DEVICEID_FC949X: 221 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter"; 222 break; 223 case MPI_MANUFACTPAGE_DEVID_53C1030: 224 case MPI_MANUFACTPAGE_DEVID_53C1030ZC: 225 desc = "LSILogic 1030 Ultra4 Adapter"; 226 break; 227 case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB: 228 /* 229 * Allow mfi(4) to claim this device in case it's in MegaRAID 230 * mode. 231 */ 232 rval = BUS_PROBE_LOW_PRIORITY; 233 /* FALLTHROUGH */ 234 case MPI_MANUFACTPAGE_DEVID_SAS1064: 235 case MPI_MANUFACTPAGE_DEVID_SAS1064A: 236 case MPI_MANUFACTPAGE_DEVID_SAS1064E: 237 case MPI_MANUFACTPAGE_DEVID_SAS1066: 238 case MPI_MANUFACTPAGE_DEVID_SAS1066E: 239 case MPI_MANUFACTPAGE_DEVID_SAS1068: 240 case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB: 241 case MPI_MANUFACTPAGE_DEVID_SAS1068E: 242 case MPI_MANUFACTPAGE_DEVID_SAS1078: 243 case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB: 244 desc = "LSILogic SAS/SATA Adapter"; 245 break; 246 default: 247 return (ENXIO); 248 } 249 250 device_set_desc(dev, desc); 251 return (rval); 252 } 253 254 static void 255 mpt_set_options(struct mpt_softc *mpt) 256 { 257 int tval; 258 259 tval = 0; 260 if (resource_int_value(device_get_name(mpt->dev), 261 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) { 262 mpt->verbose = tval; 263 } 264 tval = -1; 265 if (resource_int_value(device_get_name(mpt->dev), 266 device_get_unit(mpt->dev), "role", &tval) == 0 && tval >= 0 && 267 tval <= 3) { 268 mpt->cfg_role = tval; 269 mpt->do_cfg_role = 1; 270 } 271 tval = 0; 272 mpt->msi_enable = 0; 273 if (mpt->is_sas) 274 mpt->msi_enable = 1; 275 if (resource_int_value(device_get_name(mpt->dev), 276 device_get_unit(mpt->dev), "msi_enable", &tval) == 0) { 277 mpt->msi_enable = tval; 278 } 279 } 280 281 #if 0 282 static void 283 mpt_link_peer(struct mpt_softc *mpt) 284 { 285 struct mpt_softc *mpt2; 286 287 if (mpt->unit == 0) { 288 return; 289 } 290 /* 291 * XXX: depends on probe order 292 */ 293 mpt2 = devclass_get_softc(device_get_devclass(mpt->dev), mpt->unit - 1); 294 295 if (mpt2 == NULL) { 296 return; 297 } 298 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) { 299 return; 300 } 301 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) { 302 return; 303 } 304 mpt->mpt2 = mpt2; 305 mpt2->mpt2 = mpt; 306 if (mpt->verbose >= MPT_PRT_DEBUG) { 307 mpt_prt(mpt, "linking with peer (mpt%d)\n", 308 device_get_unit(mpt2->dev)); 309 } 310 } 311 312 static void 313 mpt_unlink_peer(struct mpt_softc *mpt) 314 { 315 316 if (mpt->mpt2) { 317 mpt->mpt2->mpt2 = NULL; 318 } 319 } 320 #endif 321 322 static int 323 mpt_pci_attach(device_t dev) 324 { 325 struct mpt_softc *mpt; 326 int iqd; 327 uint32_t val; 328 int mpt_io_bar, mpt_mem_bar; 329 330 mpt = (struct mpt_softc*)device_get_softc(dev); 331 332 switch (pci_get_device(dev)) { 333 case MPI_MANUFACTPAGE_DEVICEID_FC909_FB: 334 case MPI_MANUFACTPAGE_DEVICEID_FC909: 335 case MPI_MANUFACTPAGE_DEVICEID_FC919: 336 case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB: 337 case MPI_MANUFACTPAGE_DEVICEID_FC929: 338 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB: 339 case MPI_MANUFACTPAGE_DEVICEID_FC929X: 340 case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB: 341 case MPI_MANUFACTPAGE_DEVICEID_FC919X: 342 case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB: 343 case MPI_MANUFACTPAGE_DEVICEID_FC949E: 344 case MPI_MANUFACTPAGE_DEVICEID_FC949X: 345 mpt->is_fc = 1; 346 break; 347 case MPI_MANUFACTPAGE_DEVID_SAS1078: 348 case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB: 349 mpt->is_1078 = 1; 350 /* FALLTHROUGH */ 351 case MPI_MANUFACTPAGE_DEVID_SAS1064: 352 case MPI_MANUFACTPAGE_DEVID_SAS1064A: 353 case MPI_MANUFACTPAGE_DEVID_SAS1064E: 354 case MPI_MANUFACTPAGE_DEVID_SAS1066: 355 case MPI_MANUFACTPAGE_DEVID_SAS1066E: 356 case MPI_MANUFACTPAGE_DEVID_SAS1068: 357 case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB: 358 case MPI_MANUFACTPAGE_DEVID_SAS1068E: 359 case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB: 360 mpt->is_sas = 1; 361 break; 362 default: 363 mpt->is_spi = 1; 364 break; 365 } 366 mpt->dev = dev; 367 mpt->unit = device_get_unit(dev); 368 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT; 369 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT; 370 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT; 371 mpt->verbose = MPT_PRT_NONE; 372 mpt->role = MPT_ROLE_NONE; 373 mpt->mpt_ini_id = MPT_INI_ID_NONE; 374 mpt_set_options(mpt); 375 if (mpt->verbose == MPT_PRT_NONE) { 376 mpt->verbose = MPT_PRT_WARN; 377 /* Print INFO level (if any) if bootverbose is set */ 378 mpt->verbose += (bootverbose != 0)? 1 : 0; 379 } 380 381 /* 382 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set. 383 */ 384 val = pci_read_config(dev, PCIR_COMMAND, 2); 385 val |= PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN | 386 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN; 387 pci_write_config(dev, PCIR_COMMAND, val, 2); 388 389 /* 390 * Make sure we've disabled the ROM. 391 */ 392 val = pci_read_config(dev, PCIR_BIOS, 4); 393 val &= ~PCIM_BIOS_ENABLE; 394 pci_write_config(dev, PCIR_BIOS, val, 4); 395 396 #if 0 397 /* 398 * Is this part a dual? 399 * If so, link with our partner (around yet) 400 */ 401 switch (pci_get_device(dev)) { 402 case MPI_MANUFACTPAGE_DEVICEID_FC929: 403 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB: 404 case MPI_MANUFACTPAGE_DEVICEID_FC949E: 405 case MPI_MANUFACTPAGE_DEVICEID_FC949X: 406 case MPI_MANUFACTPAGE_DEVID_53C1030: 407 case MPI_MANUFACTPAGE_DEVID_53C1030ZC: 408 mpt_link_peer(mpt); 409 break; 410 default: 411 break; 412 } 413 #endif 414 415 /* 416 * Figure out which are the I/O and MEM Bars 417 */ 418 val = pci_read_config(dev, PCIR_BAR(0), 4); 419 if (PCI_BAR_IO(val)) { 420 /* BAR0 is IO, BAR1 is memory */ 421 mpt_io_bar = 0; 422 mpt_mem_bar = 1; 423 } else { 424 /* BAR0 is memory, BAR1 is IO */ 425 mpt_mem_bar = 0; 426 mpt_io_bar = 1; 427 } 428 429 /* 430 * Set up register access. PIO mode is required for 431 * certain reset operations (but must be disabled for 432 * some cards otherwise). 433 */ 434 mpt_io_bar = PCIR_BAR(mpt_io_bar); 435 mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, 436 &mpt_io_bar, RF_ACTIVE); 437 if (mpt->pci_pio_reg == NULL) { 438 if (bootverbose) { 439 device_printf(dev, 440 "unable to map registers in PIO mode\n"); 441 } 442 } else { 443 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg); 444 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg); 445 } 446 447 mpt_mem_bar = PCIR_BAR(mpt_mem_bar); 448 mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 449 &mpt_mem_bar, RF_ACTIVE); 450 if (mpt->pci_reg == NULL) { 451 if (bootverbose || mpt->is_sas || mpt->pci_pio_reg == NULL) { 452 device_printf(dev, 453 "Unable to memory map registers.\n"); 454 } 455 if (mpt->is_sas || mpt->pci_pio_reg == NULL) { 456 device_printf(dev, "Giving Up.\n"); 457 goto bad; 458 } 459 if (bootverbose) { 460 device_printf(dev, "Falling back to PIO mode.\n"); 461 } 462 mpt->pci_st = mpt->pci_pio_st; 463 mpt->pci_sh = mpt->pci_pio_sh; 464 } else { 465 mpt->pci_st = rman_get_bustag(mpt->pci_reg); 466 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg); 467 } 468 469 /* Get a handle to the interrupt */ 470 iqd = 0; 471 if (mpt->msi_enable) { 472 /* 473 * First try to alloc an MSI-X message. If that 474 * fails, then try to alloc an MSI message instead. 475 */ 476 val = 1; 477 if (pci_alloc_msix(dev, &val) == 0) 478 iqd = 1; 479 val = 1; 480 if (iqd == 0 && pci_alloc_msi(dev, &val) == 0) 481 iqd = 1; 482 } 483 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd, 484 RF_ACTIVE | (iqd != 0 ? 0 : RF_SHAREABLE)); 485 if (mpt->pci_irq == NULL) { 486 device_printf(dev, "could not allocate interrupt\n"); 487 goto bad; 488 } 489 490 MPT_LOCK_SETUP(mpt); 491 492 /* Disable interrupts at the part */ 493 mpt_disable_ints(mpt); 494 495 /* Register the interrupt handler */ 496 if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, NULL, mpt_pci_intr, 497 mpt, &mpt->ih)) { 498 device_printf(dev, "could not setup interrupt\n"); 499 goto bad; 500 } 501 502 /* Allocate dma memory */ 503 if (mpt_dma_mem_alloc(mpt)) { 504 mpt_prt(mpt, "Could not allocate DMA memory\n"); 505 goto bad; 506 } 507 508 #if 0 509 /* 510 * Save the PCI config register values 511 * 512 * Hard resets are known to screw up the BAR for diagnostic 513 * memory accesses (Mem1). 514 * 515 * Using Mem1 is known to make the chip stop responding to 516 * configuration space transfers, so we need to save it now 517 */ 518 519 mpt_read_config_regs(mpt); 520 #endif 521 522 /* 523 * Disable PIO until we need it 524 */ 525 if (mpt->is_sas) { 526 pci_disable_io(dev, SYS_RES_IOPORT); 527 } 528 529 /* Initialize the hardware */ 530 if (mpt->disabled == 0) { 531 if (mpt_attach(mpt) != 0) { 532 goto bad; 533 } 534 } else { 535 mpt_prt(mpt, "device disabled at user request\n"); 536 goto bad; 537 } 538 539 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown, 540 dev, SHUTDOWN_PRI_LAST); 541 542 if (mpt->eh == NULL) { 543 mpt_prt(mpt, "shutdown event registration failed\n"); 544 mpt_disable_ints(mpt); 545 (void) mpt_detach(mpt); 546 mpt_reset(mpt, /*reinit*/FALSE); 547 mpt_raid_free_mem(mpt); 548 goto bad; 549 } 550 return (0); 551 552 bad: 553 mpt_dma_mem_free(mpt); 554 mpt_free_bus_resources(mpt); 555 #if 0 556 mpt_unlink_peer(mpt); 557 #endif 558 559 MPT_LOCK_DESTROY(mpt); 560 561 /* 562 * but return zero to preserve unit numbering 563 */ 564 return (0); 565 } 566 567 /* 568 * Free bus resources 569 */ 570 static void 571 mpt_free_bus_resources(struct mpt_softc *mpt) 572 { 573 574 if (mpt->ih) { 575 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih); 576 mpt->ih = NULL; 577 } 578 579 if (mpt->pci_irq) { 580 bus_release_resource(mpt->dev, SYS_RES_IRQ, 581 rman_get_rid(mpt->pci_irq), mpt->pci_irq); 582 pci_release_msi(mpt->dev); 583 mpt->pci_irq = NULL; 584 } 585 586 if (mpt->pci_pio_reg) { 587 bus_release_resource(mpt->dev, SYS_RES_IOPORT, 588 rman_get_rid(mpt->pci_pio_reg), mpt->pci_pio_reg); 589 mpt->pci_pio_reg = NULL; 590 } 591 592 if (mpt->pci_reg) { 593 bus_release_resource(mpt->dev, SYS_RES_MEMORY, 594 rman_get_rid(mpt->pci_reg), mpt->pci_reg); 595 mpt->pci_reg = NULL; 596 } 597 } 598 599 /* 600 * Disconnect ourselves from the system. 601 */ 602 static int 603 mpt_pci_detach(device_t dev) 604 { 605 struct mpt_softc *mpt; 606 607 mpt = (struct mpt_softc*)device_get_softc(dev); 608 609 if (mpt) { 610 mpt_disable_ints(mpt); 611 mpt_detach(mpt); 612 mpt_reset(mpt, /*reinit*/FALSE); 613 mpt_raid_free_mem(mpt); 614 mpt_dma_mem_free(mpt); 615 mpt_free_bus_resources(mpt); 616 #if 0 617 mpt_unlink_peer(mpt); 618 #endif 619 if (mpt->eh != NULL) { 620 EVENTHANDLER_DEREGISTER(shutdown_post_sync, mpt->eh); 621 } 622 MPT_LOCK_DESTROY(mpt); 623 } 624 return(0); 625 } 626 627 /* 628 * Disable the hardware 629 */ 630 static int 631 mpt_pci_shutdown(device_t dev) 632 { 633 struct mpt_softc *mpt; 634 635 mpt = (struct mpt_softc *)device_get_softc(dev); 636 if (mpt) 637 return (mpt_shutdown(mpt)); 638 return(0); 639 } 640 641 static int 642 mpt_dma_mem_alloc(struct mpt_softc *mpt) 643 { 644 size_t len; 645 struct mpt_map_info mi; 646 647 /* Check if we alreay have allocated the reply memory */ 648 if (mpt->reply_phys != 0) { 649 return 0; 650 } 651 652 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt); 653 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO); 654 655 /* 656 * Create a parent dma tag for this device. 657 * 658 * Align at byte boundaries, 659 * Limit to 32-bit addressing for request/reply queues. 660 */ 661 if (mpt_dma_tag_create(mpt, /*parent*/bus_get_dma_tag(mpt->dev), 662 /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR, 663 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL, 664 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT, 665 /*nsegments*/BUS_SPACE_UNRESTRICTED, 666 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0, 667 &mpt->parent_dmat) != 0) { 668 mpt_prt(mpt, "cannot create parent dma tag\n"); 669 return (1); 670 } 671 672 /* Create a child tag for reply buffers */ 673 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0, 674 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 675 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0, 676 &mpt->reply_dmat) != 0) { 677 mpt_prt(mpt, "cannot create a dma tag for replies\n"); 678 return (1); 679 } 680 681 /* Allocate some DMA accessible memory for replies */ 682 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply, 683 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) { 684 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n", 685 (u_long) (2 * PAGE_SIZE)); 686 return (1); 687 } 688 689 mi.mpt = mpt; 690 mi.error = 0; 691 692 /* Load and lock it into "bus space" */ 693 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply, 694 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0); 695 696 if (mi.error) { 697 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n", 698 mi.error); 699 return (1); 700 } 701 mpt->reply_phys = mi.phys; 702 703 return (0); 704 } 705 706 /* Deallocate memory that was allocated by mpt_dma_mem_alloc 707 */ 708 static void 709 mpt_dma_mem_free(struct mpt_softc *mpt) 710 { 711 712 /* Make sure we aren't double destroying */ 713 if (mpt->reply_dmat == 0) { 714 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n"); 715 return; 716 } 717 718 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap); 719 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap); 720 bus_dma_tag_destroy(mpt->reply_dmat); 721 bus_dma_tag_destroy(mpt->parent_dmat); 722 mpt->reply_dmat = NULL; 723 free(mpt->request_pool, M_DEVBUF); 724 mpt->request_pool = NULL; 725 } 726 727 #if 0 728 /* Reads modifiable (via PCI transactions) config registers */ 729 static void 730 mpt_read_config_regs(struct mpt_softc *mpt) 731 { 732 733 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2); 734 mpt->pci_cfg.LatencyTimer_LineSize = 735 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2); 736 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4); 737 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4); 738 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4); 739 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4); 740 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4); 741 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4); 742 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1); 743 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4); 744 } 745 746 /* Sets modifiable config registers */ 747 static void 748 mpt_set_config_regs(struct mpt_softc *mpt) 749 { 750 uint32_t val; 751 752 #define MPT_CHECK(reg, offset, size) \ 753 val = pci_read_config(mpt->dev, offset, size); \ 754 if (mpt->pci_cfg.reg != val) { \ 755 mpt_prt(mpt, \ 756 "Restoring " #reg " to 0x%X from 0x%X\n", \ 757 mpt->pci_cfg.reg, val); \ 758 } 759 760 if (mpt->verbose >= MPT_PRT_DEBUG) { 761 MPT_CHECK(Command, PCIR_COMMAND, 2); 762 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2); 763 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4); 764 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4); 765 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4); 766 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4); 767 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4); 768 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4); 769 MPT_CHECK(IntLine, PCIR_INTLINE, 1); 770 MPT_CHECK(PMCSR, 0x44, 4); 771 } 772 #undef MPT_CHECK 773 774 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2); 775 pci_write_config(mpt->dev, PCIR_CACHELNSZ, 776 mpt->pci_cfg.LatencyTimer_LineSize, 2); 777 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4); 778 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4); 779 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4); 780 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4); 781 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4); 782 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4); 783 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1); 784 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4); 785 } 786 #endif 787 788 static void 789 mpt_pci_intr(void *arg) 790 { 791 struct mpt_softc *mpt; 792 793 mpt = (struct mpt_softc *)arg; 794 MPT_LOCK(mpt); 795 mpt_intr(mpt); 796 MPT_UNLOCK(mpt); 797 } 798