xref: /freebsd/sys/dev/mpt/mpt_pci.c (revision ae83180158c4c937f170e31eff311b18c0286a93)
1 /* $FreeBSD$ */
2 /*
3  * PCI specific probe and attach routines for LSI '909 FC  adapters.
4  * FreeBSD Version.
5  *
6  * Copyright (c)  2000, 2001 by Greg Ansley
7  * Partially derived from Matt Jacob's ISP driver.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice immediately at the beginning of the file, without modification,
14  *    this list of conditions, and the following disclaimer.
15  * 2. The name of the author may not be used to endorse or promote products
16  *    derived from this software without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
22  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  */
30 /*
31  * Additional Copyright (c) 2002 by Matthew Jacob under same license.
32  */
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/bus.h>
38 #include <sys/conf.h>
39 #include <sys/malloc.h>
40 #include <sys/mbuf.h>
41 #include <sys/module.h>
42 #include <pci/pcireg.h>
43 #include <pci/pcivar.h>
44 
45 #include <machine/bus_memio.h>
46 #include <machine/bus_pio.h>
47 #include <machine/bus.h>
48 #include <machine/resource.h>
49 #include <sys/rman.h>
50 
51 #include <dev/mpt/mpt.h>
52 #include <dev/mpt/mpt_freebsd.h>
53 
54 #ifndef	PCI_VENDOR_LSI
55 #define	PCI_VENDOR_LSI			0x1000
56 #endif
57 
58 #ifndef	PCI_PRODUCT_LSI_FC909
59 #define	PCI_PRODUCT_LSI_FC909		0x0620
60 #endif
61 
62 #ifndef	PCI_PRODUCT_LSI_FC929
63 #define	PCI_PRODUCT_LSI_FC929		0x0622
64 #endif
65 
66 #ifndef	PCI_PRODUCT_LSI_1030
67 #define	PCI_PRODUCT_LSI_1030		0x0030
68 #endif
69 
70 
71 
72 #define	MEM_MAP_REG	0x14
73 #define	MEM_MAP_SRAM	0x1C
74 
75 static int mpt_probe(device_t);
76 static int mpt_attach(device_t);
77 static void mpt_free_bus_resources(struct mpt_softc *mpt);
78 static int mpt_detach(device_t);
79 static int mpt_shutdown(device_t);
80 static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
81 static void mpt_dma_mem_free(struct mpt_softc *mpt);
82 static void mpt_read_config_regs(struct mpt_softc *mpt);
83 
84 static device_method_t mpt_methods[] = {
85 	/* Device interface */
86 	DEVMETHOD(device_probe,		mpt_probe),
87 	DEVMETHOD(device_attach,	mpt_attach),
88 	DEVMETHOD(device_detach,	mpt_detach),
89 	DEVMETHOD(device_shutdown,	mpt_shutdown),
90 	{ 0, 0 }
91 };
92 
93 static driver_t mpt_driver = {
94 	"mpt", mpt_methods, sizeof (struct mpt_softc)
95 };
96 static devclass_t mpt_devclass;
97 DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0);
98 MODULE_VERSION(mpt, 1);
99 
100 int
101 mpt_intr(void *dummy)
102 {
103 	u_int32_t reply;
104 	struct mpt_softc *mpt = (struct mpt_softc *)dummy;
105 
106 	reply = mpt_pop_reply_queue(mpt);
107 	while (reply != MPT_REPLY_EMPTY) {
108 		if (mpt->verbose > 1) {
109 			if ((reply & MPT_CONTEXT_REPLY) != 0)  {
110 				/* Address reply; IOC has something to say */
111 				mpt_print_reply(MPT_REPLY_PTOV(mpt, reply));
112 			} else {
113 				/* Context reply ; all went well */
114 				device_printf(mpt->dev,
115 				    "context %u reply OK\n", reply);
116 			}
117 		}
118 		mpt_done(mpt, reply);
119 		reply = mpt_pop_reply_queue(mpt);
120 	}
121 	return 0;
122 }
123 
124 static int
125 mpt_probe(device_t dev)
126 {
127 	char *desc;
128 
129 	if (pci_get_vendor(dev) != PCI_VENDOR_LSI)
130 		return (ENXIO);
131 
132 	switch ((pci_get_device(dev) & ~1)) {
133 	case PCI_PRODUCT_LSI_FC909:
134 		desc = "LSILogic FC909 FC Adapter";
135 		break;
136 	case PCI_PRODUCT_LSI_FC929:
137 		desc = "LSILogic FC929 FC Adapter";
138 		break;
139 	case PCI_PRODUCT_LSI_1030:
140 		desc = "LSILogic 1030 Ultra4 Adapter";
141 		break;
142 	default:
143 		return (ENXIO);
144 	}
145 
146 	device_set_desc(dev, desc);
147 	return (0);
148 }
149 
150 #ifdef	RELENG_4
151 static void
152 mpt_set_options(struct mpt_softc *mpt)
153 {
154 	int bitmap;
155 
156 	bitmap = 0;
157 	if (getenv_int("mpt_disable", &bitmap)) {
158 		if (bitmap & (1 << mpt->unit)) {
159 			mpt->disabled = 1;
160 		}
161 	}
162 
163 	bitmap = 0;
164 	if (getenv_int("mpt_debug", &bitmap)) {
165 		if (bitmap & (1 << mpt->unit)) {
166 			mpt->verbose = 2;
167 		}
168 	}
169 
170 	cmd = pci_read_config(dev, PCIR_COMMAND, 2);
171 }
172 #else
173 static void
174 mpt_set_options(struct mpt_softc *mpt)
175 {
176 	int tval;
177 
178 	tval = 0;
179 	if (resource_int_value(device_get_name(mpt->dev),
180 	    device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
181 		mpt->disabled = 1;
182 	}
183 	tval = 0;
184 	if (resource_int_value(device_get_name(mpt->dev),
185 	    device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
186 		mpt->verbose += tval;
187 	}
188 }
189 #endif
190 
191 
192 static int
193 mpt_attach(device_t dev)
194 {
195 	int iqd;
196 	u_int32_t data, cmd;
197 	struct mpt_softc *mpt;
198 
199 	/* Allocate the softc structure */
200 	mpt  = (struct mpt_softc*) device_get_softc(dev);
201 	if (mpt == NULL) {
202 		device_printf(dev, "cannot allocate softc\n");
203 		return (ENOMEM);
204 	}
205 	bzero(mpt, sizeof (struct mpt_softc));
206 	switch ((pci_get_device(dev) & ~1)) {
207 	case PCI_PRODUCT_LSI_FC909:
208 	case PCI_PRODUCT_LSI_FC929:
209 		mpt->is_fc = 1;
210 		break;
211 	default:
212 		break;
213 	}
214 	mpt->dev = dev;
215 	mpt->unit = device_get_unit(dev);
216 	mpt_set_options(mpt);
217 	mpt->verbose += (bootverbose != 0)? 1 : 0;
218 
219 	/* Make sure memory access decoders are enabled */
220 	cmd = pci_read_config(dev, PCIR_COMMAND, 2);
221 	if ((cmd & PCIM_CMD_MEMEN) == 0) {
222 		device_printf(dev, "Memory accesses disabled");
223 		goto bad;
224 	}
225 
226 	/*
227 	 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
228 	 */
229 	cmd |=
230 	    PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
231 	    PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
232 	pci_write_config(dev, PCIR_COMMAND, cmd, 2);
233 
234 	/*
235 	 * Make sure we've disabled the ROM.
236 	 */
237 	data = pci_read_config(dev, PCIR_BIOS, 4);
238 	data &= ~1;
239 	pci_write_config(dev, PCIR_BIOS, data, 4);
240 
241 
242 	/* Is this part a dual? */
243 	if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929) {
244 		/* Yes; is the previous device the counterpart? */
245 		if (mpt->unit) {
246 			mpt->mpt2 = (struct mpt_softc *)
247 				devclass_get_softc(mpt_devclass, mpt->unit-1);
248 
249 			if ((mpt->mpt2->mpt2 == NULL)
250 			  && (pci_get_vendor(mpt->mpt2->dev) == PCI_VENDOR_LSI)
251 			  && ((pci_get_device(mpt->mpt2->dev) & ~1) == PCI_PRODUCT_LSI_FC929) ) {
252 				/* Yes */
253 				mpt->mpt2->mpt2 = mpt;
254 				if (mpt->verbose) {
255 					device_printf(dev, "Detected dual\n");
256 				}
257 			} else {
258 				/* Nope */
259 				mpt->mpt2 = NULL;
260 			}
261 		}
262 	}
263 
264 	/* Set up the memory regions */
265 	/* Allocate kernel virtual memory for the 9x9's Mem0 region */
266 	mpt->pci_reg_id = MEM_MAP_REG;
267 	mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY,
268 			&mpt->pci_reg_id, 0, ~0, 0, RF_ACTIVE);
269 	if (mpt->pci_reg == NULL) {
270 		device_printf(dev, "unable to map any ports\n");
271 		goto bad;
272 	}
273 	mpt->pci_st = rman_get_bustag(mpt->pci_reg);
274 	mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
275 	/*   Get the Physical Address */
276 	mpt->pci_pa = rman_get_start(mpt->pci_reg);
277 
278 	/* Get a handle to the interrupt */
279 	iqd = 0;
280 	mpt->pci_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &iqd, 0, ~0,
281 	    1, RF_ACTIVE | RF_SHAREABLE);
282 	if (mpt->pci_irq == NULL) {
283 		device_printf(dev, "could not allocate interrupt\n");
284 		goto bad;
285 	}
286 
287 	/* Register the interrupt handler */
288 	if (bus_setup_intr(dev, mpt->pci_irq,
289 	    INTR_TYPE_CAM, (void (*)(void *))mpt_intr,
290 	    mpt, &mpt->ih)) {
291 		device_printf(dev, "could not setup interrupt\n");
292 		goto bad;
293 	}
294 
295 	/* Disable interrupts at the part */
296 	mpt_disable_ints(mpt);
297 
298 	/* Allocate dma memory */
299 	if (mpt_dma_mem_alloc(mpt)) {
300 		device_printf(dev, "Could not allocate DMA memory\n");
301 		goto bad;
302 	}
303 
304 	/* Initialize character device */
305 	/*   currently closed */
306 	mpt->open = 0;
307 
308 	/* Save the PCI config register values */
309 	/*   Hard resets are known to screw up the BAR for diagnostic
310 	     memory accesses (Mem1). */
311 	/*   Using Mem1 is known to make the chip stop responding to
312 	     configuration space transfers, so we need to save it now */
313 	mpt_read_config_regs(mpt);
314 
315 	/* Initialize the hardware */
316 	if (mpt->disabled == 0) {
317 		if (mpt_init(mpt, MPT_DB_INIT_HOST) != 0)
318 			goto bad;
319 
320 		/* Attach to CAM */
321 		mpt_cam_attach(mpt);
322 	}
323 
324 	/* Done */
325 	return (0);
326 
327 bad:
328 	mpt_dma_mem_free(mpt);
329 	mpt_free_bus_resources(mpt);
330 
331 	/*
332 	 * but return zero to preserve unit numbering
333 	 */
334 	return (0);
335 }
336 
337 /******************************************************************************
338  * Free bus resources
339  */
340 static void
341 mpt_free_bus_resources(struct mpt_softc *mpt)
342 {
343 	if (mpt->ih) {
344 		bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
345 		mpt->ih = 0;
346 	}
347 
348 	if (mpt->pci_irq) {
349 		bus_release_resource(mpt->dev, SYS_RES_IRQ, 0, mpt->pci_irq);
350 		mpt->pci_irq = 0;
351 	}
352 
353 	if (mpt->pci_reg) {
354 		bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_reg_id,
355 			mpt->pci_reg);
356 		mpt->pci_reg = 0;
357 	}
358 	if (mpt->pci_mem) {
359 		bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_mem_id,
360 			mpt->pci_mem);
361 		mpt->pci_mem = 0;
362 	}
363 
364 }
365 
366 
367 /******************************************************************************
368  * Disconnect ourselves from the system.
369  */
370 static int
371 mpt_detach(device_t dev)
372 {
373 	struct mpt_softc *mpt;
374 	mpt  = (struct mpt_softc*) device_get_softc(dev);
375 
376 	device_printf(mpt->dev,"mpt_detach!\n");
377 
378 	if (mpt) {
379 		mpt_disable_ints(mpt);
380 		mpt_cam_detach(mpt);
381 		mpt_reset(mpt);
382 		mpt_dma_mem_free(mpt);
383 		mpt_free_bus_resources(mpt);
384 	}
385 	return(0);
386 }
387 
388 
389 /******************************************************************************
390  * Disable the hardware
391  */
392 static int
393 mpt_shutdown(device_t dev)
394 {
395 	struct mpt_softc *mpt;
396 	mpt  = (struct mpt_softc*) device_get_softc(dev);
397 
398 	if (mpt) {
399 		mpt_reset(mpt);
400 	}
401 	return(0);
402 }
403 
404 
405 struct imush {
406 	struct mpt_softc *mpt;
407 	int error;
408 	u_int32_t phys;
409 };
410 
411 static void
412 mpt_map_rquest(void *arg, bus_dma_segment_t *segs, int nseg, int error)
413 {
414 	struct imush *imushp = (struct imush *) arg;
415 	imushp->error = error;
416 	imushp->phys = segs->ds_addr;
417 }
418 
419 
420 static int
421 mpt_dma_mem_alloc(struct mpt_softc *mpt)
422 {
423 	int i, error;
424 	u_char *vptr;
425 	u_int32_t pptr, end;
426 	struct imush im;
427 	device_t dev = mpt->dev;
428 
429 	/* Check if we alreay have allocated the reply memory */
430 	if (mpt->reply_phys != NULL)
431 		return 0;
432 
433 	/*
434 	 * Create a dma tag for this device
435 	 *
436 	 * Align at page boundaries, limit to 32-bit addressing
437 	 * (The chip supports 64-bit addressing, but this driver doesn't)
438 	 */
439 	if (bus_dma_tag_create(NULL, PAGE_SIZE, 0, BUS_SPACE_MAXADDR_32BIT,
440 	    BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE_32BIT,
441 	    BUS_SPACE_MAXSIZE_32BIT, BUS_SPACE_UNRESTRICTED, 0,
442 	    &mpt->parent_dmat) != 0) {
443 		device_printf(dev, "cannot create parent dma tag\n");
444 		return (1);
445 	}
446 
447 	/* Create a child tag for reply buffers */
448 	if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
449 	    0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
450 	    NULL, NULL, PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
451 	    &mpt->reply_dmat) != 0) {
452 		device_printf(dev, "cannot create a dma tag for replies\n");
453 		return (1);
454 	}
455 
456 	/* Allocate some DMA accessable memory for replies */
457 	if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
458 	    BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
459 		device_printf(dev, "cannot allocate %d bytes of reply memory\n",
460 		     PAGE_SIZE);
461 		return (1);
462 	}
463 
464 	im.mpt = mpt;
465 	im.error = 0;
466 
467 	/* Load and lock it into "bus space" */
468 	bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
469 	    PAGE_SIZE, mpt_map_rquest, &im, 0);
470 
471 	if (im.error) {
472 		device_printf(dev,
473 		    "error %d loading dma map for DMA reply queue\n", im.error);
474 		return (1);
475 	}
476 	mpt->reply_phys = im.phys;
477 
478 	/* Create a child tag for data buffers */
479 	if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
480 	    0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
481 	    NULL, NULL, MAXBSIZE, MPT_SGL_MAX, BUS_SPACE_MAXSIZE_32BIT, 0,
482 	    &mpt->buffer_dmat) != 0) {
483 		device_printf(dev,
484 		    "cannot create a dma tag for data buffers\n");
485 		return (1);
486 	}
487 
488 	/* Create a child tag for request buffers */
489 	if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
490 	    0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
491 	    NULL, NULL, MPT_REQ_MEM_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
492 	    &mpt->request_dmat) != 0) {
493 		device_printf(dev, "cannot create a dma tag for requests\n");
494 		return (1);
495 	}
496 
497 	/* Allocate some DMA accessable memory for requests */
498 	if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request,
499 	    BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) {
500 		device_printf(dev,
501 		    "cannot allocate %d bytes of request memory\n",
502 		    MPT_REQ_MEM_SIZE);
503 		return (1);
504 	}
505 
506 	im.mpt = mpt;
507 	im.error = 0;
508 
509 	/* Load and lock it into "bus space" */
510         bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request,
511 	    MPT_REQ_MEM_SIZE, mpt_map_rquest, &im, 0);
512 
513 	if (im.error) {
514 		device_printf(dev,
515 		    "error %d loading dma map for DMA request queue\n",
516 		    im.error);
517 		return (1);
518 	}
519 	mpt->request_phys = im.phys;
520 
521 	i = 0;
522 	pptr =  mpt->request_phys;
523 	vptr =  mpt->request;
524 	end = pptr + MPT_REQ_MEM_SIZE;
525 	while(pptr < end) {
526 		request_t *req = &mpt->requests[i];
527 		req->index = i++;
528 
529 		/* Store location of Request Data */
530 		req->req_pbuf = pptr;
531 		req->req_vbuf = vptr;
532 
533 		pptr += MPT_REQUEST_AREA;
534 		vptr += MPT_REQUEST_AREA;
535 
536 		req->sense_pbuf = (pptr - MPT_SENSE_SIZE);
537 		req->sense_vbuf = (vptr - MPT_SENSE_SIZE);
538 
539 		error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap);
540 		if (error) {
541 			device_printf(dev,
542 			     "error %d creating per-cmd DMA maps\n", error);
543 			return (1);
544 		}
545 	}
546 	return (0);
547 }
548 
549 
550 
551 /* Deallocate memory that was allocated by mpt_dma_mem_alloc
552  */
553 static void
554 mpt_dma_mem_free(struct mpt_softc *mpt)
555 {
556 	int i;
557 
558         /* Make sure we aren't double destroying */
559         if (mpt->reply_dmat == 0) {
560 		if (mpt->verbose)
561 			device_printf(mpt->dev,"Already released dma memory\n");
562 		return;
563         }
564 
565 	for (i = 0; i < MPT_MAX_REQUESTS; i++) {
566 		bus_dmamap_destroy(mpt->buffer_dmat, mpt->requests[i].dmap);
567 	}
568 	bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap);
569 	bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap);
570 	bus_dma_tag_destroy(mpt->request_dmat);
571 	bus_dma_tag_destroy(mpt->buffer_dmat);
572 	bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
573 	bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
574 	bus_dma_tag_destroy(mpt->reply_dmat);
575 	bus_dma_tag_destroy(mpt->parent_dmat);
576 	mpt->reply_dmat = 0;
577 
578 }
579 
580 
581 
582 /* Reads modifiable (via PCI transactions) config registers */
583 static void
584 mpt_read_config_regs(struct mpt_softc *mpt)
585 {
586 	mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
587 	mpt->pci_cfg.LatencyTimer_LineSize =
588 	    pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
589 	mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_MAPS, 4);
590 	mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_MAPS+0x4, 4);
591 	mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_MAPS+0x8, 4);
592 	mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_MAPS+0xC, 4);
593 	mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_MAPS+0x10, 4);
594 	mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
595 	mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
596 	mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
597 }
598 
599 /* Sets modifiable config registers */
600 void
601 mpt_set_config_regs(struct mpt_softc *mpt)
602 {
603 	u_int32_t val;
604 
605 #define MPT_CHECK(reg, offset, size)					\
606 	val = pci_read_config(mpt->dev, offset, size);			\
607 	if (mpt->pci_cfg.reg != val) {					\
608 		device_printf(mpt->dev,					\
609 		    "Restoring " #reg " to 0x%X from 0x%X\n",		\
610 		    mpt->pci_cfg.reg, val);				\
611 	}
612 
613 	if (mpt->verbose) {
614 		MPT_CHECK(Command, PCIR_COMMAND, 2);
615 		MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
616 		MPT_CHECK(IO_BAR, PCIR_MAPS, 4);
617 		MPT_CHECK(Mem0_BAR[0], PCIR_MAPS+0x4, 4);
618 		MPT_CHECK(Mem0_BAR[1], PCIR_MAPS+0x8, 4);
619 		MPT_CHECK(Mem1_BAR[0], PCIR_MAPS+0xC, 4);
620 		MPT_CHECK(Mem1_BAR[1], PCIR_MAPS+0x10, 4);
621 		MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
622 		MPT_CHECK(IntLine, PCIR_INTLINE, 1);
623 		MPT_CHECK(PMCSR, 0x44, 4);
624 	}
625 #undef MPT_CHECK
626 
627 	pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
628 	pci_write_config(mpt->dev, PCIR_CACHELNSZ,
629 	    mpt->pci_cfg.LatencyTimer_LineSize, 2);
630 	pci_write_config(mpt->dev, PCIR_MAPS, mpt->pci_cfg.IO_BAR, 4);
631 	pci_write_config(mpt->dev, PCIR_MAPS+0x4, mpt->pci_cfg.Mem0_BAR[0], 4);
632 	pci_write_config(mpt->dev, PCIR_MAPS+0x8, mpt->pci_cfg.Mem0_BAR[1], 4);
633 	pci_write_config(mpt->dev, PCIR_MAPS+0xC, mpt->pci_cfg.Mem1_BAR[0], 4);
634 	pci_write_config(mpt->dev, PCIR_MAPS+0x10, mpt->pci_cfg.Mem1_BAR[1], 4);
635 	pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
636 	pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
637 	pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
638 }
639