xref: /freebsd/sys/dev/mpt/mpt_pci.c (revision 0efd6615cd5f39b67cec82a7034e655f3b5801e3)
1 /*-
2  * PCI specific probe and attach routines for LSI Fusion Adapters
3  * FreeBSD Version.
4  *
5  * Copyright (c) 2000, 2001 by Greg Ansley
6  * Partially derived from Matt Jacob's ISP driver.
7  * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
8  * Feral Software
9  * All rights reserved.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice immediately at the beginning of the file, without modification,
16  *    this list of conditions, and the following disclaimer.
17  * 2. The name of the author may not be used to endorse or promote products
18  *    derived from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30  * SUCH DAMAGE.
31  */
32 /*-
33  * Copyright (c) 2002, 2006 by Matthew Jacob
34  * All rights reserved.
35  *
36  * Redistribution and use in source and binary forms, with or without
37  * modification, are permitted provided that the following conditions are
38  * met:
39  * 1. Redistributions of source code must retain the above copyright
40  *    notice, this list of conditions and the following disclaimer.
41  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
42  *    substantially similar to the "NO WARRANTY" disclaimer below
43  *    ("Disclaimer") and any redistribution must be conditioned upon including
44  *    a substantially similar Disclaimer requirement for further binary
45  *    redistribution.
46  * 3. Neither the names of the above listed copyright holders nor the names
47  *    of any contributors may be used to endorse or promote products derived
48  *    from this software without specific prior written permission.
49  *
50  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
54  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
60  * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61  *
62  * Support from Chris Ellsworth in order to make SAS adapters work
63  * is gratefully acknowledged.
64  *
65  * Support from LSI-Logic has also gone a great deal toward making this a
66  * workable subsystem and is gratefully acknowledged.
67  */
68 /*
69  * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
70  * Copyright (c) 2005, WHEEL Sp. z o.o.
71  * Copyright (c) 2004, 2005 Justin T. Gibbs
72  * All rights reserved.
73  *
74  * Redistribution and use in source and binary forms, with or without
75  * modification, are permitted provided that the following conditions are
76  * met:
77  * 1. Redistributions of source code must retain the above copyright
78  *    notice, this list of conditions and the following disclaimer.
79  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
80  *    substantially similar to the "NO WARRANTY" disclaimer below
81  *    ("Disclaimer") and any redistribution must be conditioned upon including
82  *    a substantially similar Disclaimer requirement for further binary
83  *    redistribution.
84  * 3. Neither the names of the above listed copyright holders nor the names
85  *    of any contributors may be used to endorse or promote products derived
86  *    from this software without specific prior written permission.
87  *
88  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
89  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
90  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
91  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
92  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
93  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
94  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
95  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
96  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
97  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
98  * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
99  */
100 
101 #include <sys/cdefs.h>
102 __FBSDID("$FreeBSD$");
103 
104 #include <dev/mpt/mpt.h>
105 #include <dev/mpt/mpt_cam.h>
106 #include <dev/mpt/mpt_raid.h>
107 
108 
109 #ifndef	PCI_VENDOR_LSI
110 #define	PCI_VENDOR_LSI			0x1000
111 #endif
112 
113 #ifndef	PCI_PRODUCT_LSI_FC909
114 #define	PCI_PRODUCT_LSI_FC909		0x0620
115 #endif
116 
117 #ifndef	PCI_PRODUCT_LSI_FC909A
118 #define	PCI_PRODUCT_LSI_FC909A		0x0621
119 #endif
120 
121 #ifndef	PCI_PRODUCT_LSI_FC919
122 #define	PCI_PRODUCT_LSI_FC919		0x0624
123 #endif
124 
125 #ifndef	PCI_PRODUCT_LSI_FC929
126 #define	PCI_PRODUCT_LSI_FC929		0x0622
127 #endif
128 
129 #ifndef	PCI_PRODUCT_LSI_FC929X
130 #define	PCI_PRODUCT_LSI_FC929X		0x0626
131 #endif
132 
133 #ifndef	PCI_PRODUCT_LSI_FC919X
134 #define	PCI_PRODUCT_LSI_FC919X		0x0628
135 #endif
136 
137 #ifndef	PCI_PRODUCT_LSI_FC7X04X
138 #define	PCI_PRODUCT_LSI_FC7X04X		0x0640
139 #endif
140 
141 #ifndef	PCI_PRODUCT_LSI_FC646
142 #define	PCI_PRODUCT_LSI_FC646		0x0646
143 #endif
144 
145 #ifndef	PCI_PRODUCT_LSI_1030
146 #define	PCI_PRODUCT_LSI_1030		0x0030
147 #endif
148 
149 #ifndef	PCI_PRODUCT_LSI_SAS1064
150 #define PCI_PRODUCT_LSI_SAS1064		0x0050
151 #endif
152 
153 #ifndef PCI_PRODUCT_LSI_SAS1064A
154 #define PCI_PRODUCT_LSI_SAS1064A	0x005C
155 #endif
156 
157 #ifndef PCI_PRODUCT_LSI_SAS1064E
158 #define PCI_PRODUCT_LSI_SAS1064E	0x0056
159 #endif
160 
161 #ifndef PCI_PRODUCT_LSI_SAS1066
162 #define PCI_PRODUCT_LSI_SAS1066		0x005E
163 #endif
164 
165 #ifndef PCI_PRODUCT_LSI_SAS1066E
166 #define PCI_PRODUCT_LSI_SAS1066E	0x005A
167 #endif
168 
169 #ifndef PCI_PRODUCT_LSI_SAS1068
170 #define PCI_PRODUCT_LSI_SAS1068		0x0054
171 #endif
172 
173 #ifndef PCI_PRODUCT_LSI_SAS1068E
174 #define PCI_PRODUCT_LSI_SAS1068E	0x0058
175 #endif
176 
177 #ifndef PCI_PRODUCT_LSI_SAS1078
178 #define PCI_PRODUCT_LSI_SAS1078		0x0060
179 #endif
180 
181 #ifndef	PCIM_CMD_SERRESPEN
182 #define	PCIM_CMD_SERRESPEN	0x0100
183 #endif
184 
185 
186 #define	MPT_IO_BAR	0
187 #define	MPT_MEM_BAR	1
188 
189 static int mpt_pci_probe(device_t);
190 static int mpt_pci_attach(device_t);
191 static void mpt_free_bus_resources(struct mpt_softc *mpt);
192 static int mpt_pci_detach(device_t);
193 static int mpt_pci_shutdown(device_t);
194 static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
195 static void mpt_dma_mem_free(struct mpt_softc *mpt);
196 static void mpt_read_config_regs(struct mpt_softc *mpt);
197 static void mpt_pci_intr(void *);
198 
199 static device_method_t mpt_methods[] = {
200 	/* Device interface */
201 	DEVMETHOD(device_probe,		mpt_pci_probe),
202 	DEVMETHOD(device_attach,	mpt_pci_attach),
203 	DEVMETHOD(device_detach,	mpt_pci_detach),
204 	DEVMETHOD(device_shutdown,	mpt_pci_shutdown),
205 	{ 0, 0 }
206 };
207 
208 static driver_t mpt_driver = {
209 	"mpt", mpt_methods, sizeof(struct mpt_softc)
210 };
211 static devclass_t mpt_devclass;
212 DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0);
213 MODULE_DEPEND(mpt, pci, 1, 1, 1);
214 MODULE_VERSION(mpt, 1);
215 
216 static int
217 mpt_pci_probe(device_t dev)
218 {
219 	char *desc;
220 
221 	if (pci_get_vendor(dev) != PCI_VENDOR_LSI) {
222 		return (ENXIO);
223 	}
224 
225 	switch ((pci_get_device(dev) & ~1)) {
226 	case PCI_PRODUCT_LSI_FC909:
227 		desc = "LSILogic FC909 FC Adapter";
228 		break;
229 	case PCI_PRODUCT_LSI_FC909A:
230 		desc = "LSILogic FC909A FC Adapter";
231 		break;
232 	case PCI_PRODUCT_LSI_FC919:
233 		desc = "LSILogic FC919 FC Adapter";
234 		break;
235 	case PCI_PRODUCT_LSI_FC929:
236 		desc = "Dual LSILogic FC929 FC Adapter";
237 		break;
238 	case PCI_PRODUCT_LSI_FC919X:
239 		desc = "LSILogic FC919 FC PCI-X Adapter";
240 		break;
241 	case PCI_PRODUCT_LSI_FC929X:
242 		desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter";
243 		break;
244 	case PCI_PRODUCT_LSI_FC646:
245 		desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter";
246 		break;
247 	case PCI_PRODUCT_LSI_FC7X04X:
248 		desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter";
249 		break;
250 	case PCI_PRODUCT_LSI_1030:
251 		desc = "LSILogic 1030 Ultra4 Adapter";
252 		break;
253 	case PCI_PRODUCT_LSI_SAS1064:
254 	case PCI_PRODUCT_LSI_SAS1064A:
255 	case PCI_PRODUCT_LSI_SAS1064E:
256 	case PCI_PRODUCT_LSI_SAS1066:
257 	case PCI_PRODUCT_LSI_SAS1066E:
258 	case PCI_PRODUCT_LSI_SAS1068:
259 	case PCI_PRODUCT_LSI_SAS1068E:
260 	case PCI_PRODUCT_LSI_SAS1078:
261 		desc = "LSILogic SAS/SATA Adapter";
262 		break;
263 	default:
264 		return (ENXIO);
265 	}
266 
267 	device_set_desc(dev, desc);
268 	return (0);
269 }
270 
271 #if	__FreeBSD_version < 500000
272 static void
273 mpt_set_options(struct mpt_softc *mpt)
274 {
275 	int bitmap;
276 
277 	bitmap = 0;
278 	if (getenv_int("mpt_disable", &bitmap)) {
279 		if (bitmap & (1 << mpt->unit)) {
280 			mpt->disabled = 1;
281 		}
282 	}
283 	bitmap = 0;
284 	if (getenv_int("mpt_debug", &bitmap)) {
285 		if (bitmap & (1 << mpt->unit)) {
286 			mpt->verbose = MPT_PRT_DEBUG;
287 		}
288 	}
289 	bitmap = 0;
290 	if (getenv_int("mpt_debug1", &bitmap)) {
291 		if (bitmap & (1 << mpt->unit)) {
292 			mpt->verbose = MPT_PRT_DEBUG1;
293 		}
294 	}
295 	bitmap = 0;
296 	if (getenv_int("mpt_debug2", &bitmap)) {
297 		if (bitmap & (1 << mpt->unit)) {
298 			mpt->verbose = MPT_PRT_DEBUG2;
299 		}
300 	}
301 	bitmap = 0;
302 	if (getenv_int("mpt_debug3", &bitmap)) {
303 		if (bitmap & (1 << mpt->unit)) {
304 			mpt->verbose = MPT_PRT_DEBUG3;
305 		}
306 	}
307 
308 	mpt->cfg_role = MPT_ROLE_DEFAULT;
309 	bitmap = 0;
310 	if (getenv_int("mpt_nil_role", &bitmap)) {
311 		if (bitmap & (1 << mpt->unit)) {
312 			mpt->cfg_role = 0;
313 		}
314 		mpt->do_cfg_role = 1;
315 	}
316 	bitmap = 0;
317 	if (getenv_int("mpt_tgt_role", &bitmap)) {
318 		if (bitmap & (1 << mpt->unit)) {
319 			mpt->cfg_role |= MPT_ROLE_TARGET;
320 		}
321 		mpt->do_cfg_role = 1;
322 	}
323 	bitmap = 0;
324 	if (getenv_int("mpt_ini_role", &bitmap)) {
325 		if (bitmap & (1 << mpt->unit)) {
326 			mpt->cfg_role |= MPT_ROLE_INITIATOR;
327 		}
328 		mpt->do_cfg_role = 1;
329 	}
330 
331 	mpt->msi_enable = 0;
332 }
333 #else
334 static void
335 mpt_set_options(struct mpt_softc *mpt)
336 {
337 	int tval;
338 
339 	tval = 0;
340 	if (resource_int_value(device_get_name(mpt->dev),
341 	    device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
342 		mpt->disabled = 1;
343 	}
344 	tval = 0;
345 	if (resource_int_value(device_get_name(mpt->dev),
346 	    device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
347 		mpt->verbose = tval;
348 	}
349 	tval = -1;
350 	if (resource_int_value(device_get_name(mpt->dev),
351 	    device_get_unit(mpt->dev), "role", &tval) == 0 && tval >= 0 &&
352 	    tval <= 3) {
353 		mpt->cfg_role = tval;
354 		mpt->do_cfg_role = 1;
355 	}
356 
357 	tval = 0;
358 	mpt->msi_enable = 0;
359 	if (resource_int_value(device_get_name(mpt->dev),
360 	    device_get_unit(mpt->dev), "msi_enable", &tval) == 0 && tval == 1) {
361 		mpt->msi_enable = 1;
362 	}
363 }
364 #endif
365 
366 
367 static void
368 mpt_link_peer(struct mpt_softc *mpt)
369 {
370 	struct mpt_softc *mpt2;
371 
372 	if (mpt->unit == 0) {
373 		return;
374 	}
375 	/*
376 	 * XXX: depends on probe order
377 	 */
378 	mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
379 
380 	if (mpt2 == NULL) {
381 		return;
382 	}
383 	if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
384 		return;
385 	}
386 	if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
387 		return;
388 	}
389 	mpt->mpt2 = mpt2;
390 	mpt2->mpt2 = mpt;
391 	if (mpt->verbose >= MPT_PRT_DEBUG) {
392 		mpt_prt(mpt, "linking with peer (mpt%d)\n",
393 		    device_get_unit(mpt2->dev));
394 	}
395 }
396 
397 static void
398 mpt_unlink_peer(struct mpt_softc *mpt)
399 {
400 	if (mpt->mpt2) {
401 		mpt->mpt2->mpt2 = NULL;
402 	}
403 }
404 
405 
406 static int
407 mpt_pci_attach(device_t dev)
408 {
409 	struct mpt_softc *mpt;
410 	int		  iqd;
411 	uint32_t	  data, cmd;
412 
413 	/* Allocate the softc structure */
414 	mpt  = (struct mpt_softc*)device_get_softc(dev);
415 	if (mpt == NULL) {
416 		device_printf(dev, "cannot allocate softc\n");
417 		return (ENOMEM);
418 	}
419 	memset(mpt, 0, sizeof(struct mpt_softc));
420 	switch ((pci_get_device(dev) & ~1)) {
421 	case PCI_PRODUCT_LSI_FC909:
422 	case PCI_PRODUCT_LSI_FC909A:
423 	case PCI_PRODUCT_LSI_FC919:
424 	case PCI_PRODUCT_LSI_FC929:
425 	case PCI_PRODUCT_LSI_FC919X:
426 	case PCI_PRODUCT_LSI_FC646:
427 	case PCI_PRODUCT_LSI_FC7X04X:
428 		mpt->is_fc = 1;
429 		break;
430 	case PCI_PRODUCT_LSI_SAS1064:
431 	case PCI_PRODUCT_LSI_SAS1064A:
432 	case PCI_PRODUCT_LSI_SAS1064E:
433 	case PCI_PRODUCT_LSI_SAS1066:
434 	case PCI_PRODUCT_LSI_SAS1066E:
435 	case PCI_PRODUCT_LSI_SAS1068:
436 	case PCI_PRODUCT_LSI_SAS1068E:
437 	case PCI_PRODUCT_LSI_SAS1078:
438 		mpt->is_sas = 1;
439 		break;
440 	default:
441 		mpt->is_spi = 1;
442 		break;
443 	}
444 	mpt->dev = dev;
445 	mpt->unit = device_get_unit(dev);
446 	mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
447 	mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
448 	mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
449 	mpt->verbose = MPT_PRT_NONE;
450 	mpt->role = MPT_ROLE_NONE;
451 	mpt_set_options(mpt);
452 	if (mpt->verbose == MPT_PRT_NONE) {
453 		mpt->verbose = MPT_PRT_WARN;
454 		/* Print INFO level (if any) if bootverbose is set */
455 		mpt->verbose += (bootverbose != 0)? 1 : 0;
456 	}
457 	/* Make sure memory access decoders are enabled */
458 	cmd = pci_read_config(dev, PCIR_COMMAND, 2);
459 	if ((cmd & PCIM_CMD_MEMEN) == 0) {
460 		device_printf(dev, "Memory accesses disabled");
461 		return (ENXIO);
462 	}
463 
464 	/*
465 	 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
466 	 */
467 	cmd |=
468 	    PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
469 	    PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
470 	pci_write_config(dev, PCIR_COMMAND, cmd, 2);
471 
472 	/*
473 	 * Make sure we've disabled the ROM.
474 	 */
475 	data = pci_read_config(dev, PCIR_BIOS, 4);
476 	data &= ~1;
477 	pci_write_config(dev, PCIR_BIOS, data, 4);
478 
479 	/*
480 	 * Is this part a dual?
481 	 * If so, link with our partner (around yet)
482 	 */
483 	if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 ||
484 	    (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC646 ||
485 	    (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC7X04X ||
486 	    (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) {
487 		mpt_link_peer(mpt);
488 	}
489 
490 	/*
491 	 * Set up register access.  PIO mode is required for
492 	 * certain reset operations (but must be disabled for
493 	 * some cards otherwise).
494 	 */
495 	mpt->pci_pio_rid = PCIR_BAR(MPT_IO_BAR);
496 	mpt->pci_pio_reg = bus_alloc_resource(dev, SYS_RES_IOPORT,
497 			    &mpt->pci_pio_rid, 0, ~0, 0, RF_ACTIVE);
498 	if (mpt->pci_pio_reg == NULL) {
499 		device_printf(dev, "unable to map registers in PIO mode\n");
500 		goto bad;
501 	}
502 	mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
503 	mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
504 
505 	/* Allocate kernel virtual memory for the 9x9's Mem0 region */
506 	mpt->pci_mem_rid = PCIR_BAR(MPT_MEM_BAR);
507 	mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY,
508 			&mpt->pci_mem_rid, 0, ~0, 0, RF_ACTIVE);
509 	if (mpt->pci_reg == NULL) {
510 		device_printf(dev, "Unable to memory map registers.\n");
511 		if (mpt->is_sas) {
512 			device_printf(dev, "Giving Up.\n");
513 			goto bad;
514 		}
515 		device_printf(dev, "Falling back to PIO mode.\n");
516 		mpt->pci_st = mpt->pci_pio_st;
517 		mpt->pci_sh = mpt->pci_pio_sh;
518 	} else {
519 		mpt->pci_st = rman_get_bustag(mpt->pci_reg);
520 		mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
521 	}
522 
523 	/* Get a handle to the interrupt */
524 	iqd = 0;
525 	if (mpt->msi_enable && pci_msi_count(dev) == 1) {
526 		mpt->pci_msi_count = 1;
527 		if (pci_alloc_msi(dev, &mpt->pci_msi_count) == 0) {
528 			iqd = 1;
529 		} else {
530 			mpt->pci_msi_count = 0;
531 		}
532 	}
533 	mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
534 	    RF_ACTIVE | RF_SHAREABLE);
535 	if (mpt->pci_irq == NULL) {
536 		device_printf(dev, "could not allocate interrupt\n");
537 		goto bad;
538 	}
539 
540 	MPT_LOCK_SETUP(mpt);
541 
542 	/* Disable interrupts at the part */
543 	mpt_disable_ints(mpt);
544 
545 	/* Register the interrupt handler */
546 	if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr,
547 	    mpt, &mpt->ih)) {
548 		device_printf(dev, "could not setup interrupt\n");
549 		goto bad;
550 	}
551 
552 	/* Allocate dma memory */
553 /* XXX JGibbs -Should really be done based on IOCFacts. */
554 	if (mpt_dma_mem_alloc(mpt)) {
555 		mpt_prt(mpt, "Could not allocate DMA memory\n");
556 		goto bad;
557 	}
558 
559 	/*
560 	 * Save the PCI config register values
561  	 *
562 	 * Hard resets are known to screw up the BAR for diagnostic
563 	 * memory accesses (Mem1).
564 	 *
565 	 * Using Mem1 is known to make the chip stop responding to
566 	 * configuration space transfers, so we need to save it now
567 	 */
568 
569 	mpt_read_config_regs(mpt);
570 
571 	/*
572 	 * Disable PIO until we need it
573 	 */
574 	if (mpt->is_sas) {
575 		pci_disable_io(dev, SYS_RES_IOPORT);
576 	}
577 
578 	/* Initialize the hardware */
579 	if (mpt->disabled == 0) {
580 		MPT_LOCK(mpt);
581 		if (mpt_attach(mpt) != 0) {
582 			MPT_UNLOCK(mpt);
583 			goto bad;
584 		}
585 		MPT_UNLOCK(mpt);
586 	} else {
587 		mpt_prt(mpt, "device disabled at user request\n");
588 		goto bad;
589 	}
590 
591 	mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown,
592 	    dev, SHUTDOWN_PRI_DEFAULT);
593 
594 	if (mpt->eh == NULL) {
595 		mpt_prt(mpt, "shutdown event registration failed\n");
596 		MPT_LOCK(mpt);
597 		(void) mpt_detach(mpt);
598 		MPT_UNLOCK(mpt);
599 		goto bad;
600 	}
601 	KASSERT(MPT_OWNED(mpt) == 0, ("leaving attach with device locked"));
602 	return (0);
603 
604 bad:
605 	mpt_dma_mem_free(mpt);
606 	mpt_free_bus_resources(mpt);
607 	mpt_unlink_peer(mpt);
608 
609 	MPT_LOCK_DESTROY(mpt);
610 
611 	/*
612 	 * but return zero to preserve unit numbering
613 	 */
614 	return (0);
615 }
616 
617 /*
618  * Free bus resources
619  */
620 static void
621 mpt_free_bus_resources(struct mpt_softc *mpt)
622 {
623 	if (mpt->ih) {
624 		bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
625 		mpt->ih = 0;
626 	}
627 
628 	if (mpt->pci_irq) {
629 		bus_release_resource(mpt->dev, SYS_RES_IRQ,
630 		    mpt->pci_msi_count ? 1 : 0, mpt->pci_irq);
631 		mpt->pci_irq = 0;
632 	}
633 
634 	if (mpt->pci_msi_count) {
635 		pci_release_msi(mpt->dev);
636 		mpt->pci_msi_count = 0;
637 	}
638 
639 	if (mpt->pci_pio_reg) {
640 		bus_release_resource(mpt->dev, SYS_RES_IOPORT, mpt->pci_pio_rid,
641 			mpt->pci_pio_reg);
642 		mpt->pci_pio_reg = 0;
643 	}
644 	if (mpt->pci_reg) {
645 		bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_mem_rid,
646 			mpt->pci_reg);
647 		mpt->pci_reg = 0;
648 	}
649 	MPT_LOCK_DESTROY(mpt);
650 }
651 
652 
653 /*
654  * Disconnect ourselves from the system.
655  */
656 static int
657 mpt_pci_detach(device_t dev)
658 {
659 	struct mpt_softc *mpt;
660 
661 	mpt  = (struct mpt_softc*)device_get_softc(dev);
662 
663 	if (mpt) {
664 		MPT_LOCK(mpt);
665 		mpt_disable_ints(mpt);
666 		mpt_detach(mpt);
667 		mpt_reset(mpt, /*reinit*/FALSE);
668 		mpt_dma_mem_free(mpt);
669 		mpt_free_bus_resources(mpt);
670 		mpt_raid_free_mem(mpt);
671 		if (mpt->eh != NULL) {
672                         EVENTHANDLER_DEREGISTER(shutdown_final, mpt->eh);
673 		}
674 		MPT_UNLOCK(mpt);
675 	}
676 	return(0);
677 }
678 
679 
680 /*
681  * Disable the hardware
682  */
683 static int
684 mpt_pci_shutdown(device_t dev)
685 {
686 	struct mpt_softc *mpt;
687 
688 	mpt = (struct mpt_softc *)device_get_softc(dev);
689 	if (mpt) {
690 		int r;
691 		MPT_LOCK(mpt);
692 		r = mpt_shutdown(mpt);
693 		MPT_UNLOCK(mpt);
694 		return (r);
695 	}
696 	return(0);
697 }
698 
699 static int
700 mpt_dma_mem_alloc(struct mpt_softc *mpt)
701 {
702 	int i, error, nsegs;
703 	uint8_t *vptr;
704 	uint32_t pptr, end;
705 	size_t len;
706 	struct mpt_map_info mi;
707 
708 	/* Check if we alreay have allocated the reply memory */
709 	if (mpt->reply_phys != 0) {
710 		return 0;
711 	}
712 
713 	len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
714 #ifdef	RELENG_4
715 	mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK);
716 	if (mpt->request_pool == NULL) {
717 		mpt_prt(mpt, "cannot allocate request pool\n");
718 		return (1);
719 	}
720 	memset(mpt->request_pool, 0, len);
721 #else
722 	mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
723 	if (mpt->request_pool == NULL) {
724 		mpt_prt(mpt, "cannot allocate request pool\n");
725 		return (1);
726 	}
727 #endif
728 
729 	/*
730 	 * Create a parent dma tag for this device.
731 	 *
732 	 * Align at byte boundaries,
733 	 * Limit to 32-bit addressing for request/reply queues.
734 	 */
735 	if (mpt_dma_tag_create(mpt, /*parent*/bus_get_dma_tag(mpt->dev),
736 	    /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
737 	    /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
738 	    /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
739 	    /*nsegments*/BUS_SPACE_MAXSIZE_32BIT,
740 	    /*maxsegsz*/BUS_SPACE_UNRESTRICTED, /*flags*/0,
741 	    &mpt->parent_dmat) != 0) {
742 		mpt_prt(mpt, "cannot create parent dma tag\n");
743 		return (1);
744 	}
745 
746 	/* Create a child tag for reply buffers */
747 	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
748 	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
749 	    NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
750 	    &mpt->reply_dmat) != 0) {
751 		mpt_prt(mpt, "cannot create a dma tag for replies\n");
752 		return (1);
753 	}
754 
755 	/* Allocate some DMA accessable memory for replies */
756 	if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
757 	    BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
758 		mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n",
759 		    (u_long) (2 * PAGE_SIZE));
760 		return (1);
761 	}
762 
763 	mi.mpt = mpt;
764 	mi.error = 0;
765 
766 	/* Load and lock it into "bus space" */
767 	bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
768 	    2 * PAGE_SIZE, mpt_map_rquest, &mi, 0);
769 
770 	if (mi.error) {
771 		mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n",
772 		    mi.error);
773 		return (1);
774 	}
775 	mpt->reply_phys = mi.phys;
776 
777 	/* Create a child tag for data buffers */
778 
779 	/*
780 	 * XXX: we should say that nsegs is 'unrestricted, but that
781 	 * XXX: tickles a horrible bug in the busdma code. Instead,
782 	 * XXX: we'll derive a reasonable segment limit from MAXPHYS
783 	 */
784 	nsegs = (MAXPHYS / PAGE_SIZE) + 1;
785 	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, 1,
786 	    0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
787 	    NULL, NULL, MAXBSIZE, nsegs, BUS_SPACE_MAXSIZE_32BIT, 0,
788 	    &mpt->buffer_dmat) != 0) {
789 		mpt_prt(mpt, "cannot create a dma tag for data buffers\n");
790 		return (1);
791 	}
792 
793 	/* Create a child tag for request buffers */
794 	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
795 	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
796 	    NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0,
797 	    &mpt->request_dmat) != 0) {
798 		mpt_prt(mpt, "cannot create a dma tag for requests\n");
799 		return (1);
800 	}
801 
802 	/* Allocate some DMA accessable memory for requests */
803 	if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request,
804 	    BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) {
805 		mpt_prt(mpt, "cannot allocate %d bytes of request memory\n",
806 		    MPT_REQ_MEM_SIZE(mpt));
807 		return (1);
808 	}
809 
810 	mi.mpt = mpt;
811 	mi.error = 0;
812 
813 	/* Load and lock it into "bus space" */
814         bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request,
815 	    MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &mi, 0);
816 
817 	if (mi.error) {
818 		mpt_prt(mpt, "error %d loading dma map for DMA request queue\n",
819 		    mi.error);
820 		return (1);
821 	}
822 	mpt->request_phys = mi.phys;
823 
824 	/*
825 	 * Now create per-request dma maps
826 	 */
827 	i = 0;
828 	pptr =  mpt->request_phys;
829 	vptr =  mpt->request;
830 	end = pptr + MPT_REQ_MEM_SIZE(mpt);
831 	while(pptr < end) {
832 		request_t *req = &mpt->request_pool[i];
833 		req->index = i++;
834 
835 		/* Store location of Request Data */
836 		req->req_pbuf = pptr;
837 		req->req_vbuf = vptr;
838 
839 		pptr += MPT_REQUEST_AREA;
840 		vptr += MPT_REQUEST_AREA;
841 
842 		req->sense_pbuf = (pptr - MPT_SENSE_SIZE);
843 		req->sense_vbuf = (vptr - MPT_SENSE_SIZE);
844 
845 		error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap);
846 		if (error) {
847 			mpt_prt(mpt, "error %d creating per-cmd DMA maps\n",
848 			    error);
849 			return (1);
850 		}
851 	}
852 
853 	return (0);
854 }
855 
856 
857 
858 /* Deallocate memory that was allocated by mpt_dma_mem_alloc
859  */
860 static void
861 mpt_dma_mem_free(struct mpt_softc *mpt)
862 {
863 	int i;
864 
865         /* Make sure we aren't double destroying */
866         if (mpt->reply_dmat == 0) {
867 		mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n");
868 		return;
869         }
870 
871 	for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) {
872 		bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap);
873 	}
874 	bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap);
875 	bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap);
876 	bus_dma_tag_destroy(mpt->request_dmat);
877 	bus_dma_tag_destroy(mpt->buffer_dmat);
878 	bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
879 	bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
880 	bus_dma_tag_destroy(mpt->reply_dmat);
881 	bus_dma_tag_destroy(mpt->parent_dmat);
882 	mpt->reply_dmat = 0;
883 	free(mpt->request_pool, M_DEVBUF);
884 	mpt->request_pool = 0;
885 
886 }
887 
888 
889 
890 /* Reads modifiable (via PCI transactions) config registers */
891 static void
892 mpt_read_config_regs(struct mpt_softc *mpt)
893 {
894 	mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
895 	mpt->pci_cfg.LatencyTimer_LineSize =
896 	    pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
897 	mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
898 	mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
899 	mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
900 	mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
901 	mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
902 	mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
903 	mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
904 	mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
905 }
906 
907 /* Sets modifiable config registers */
908 void
909 mpt_set_config_regs(struct mpt_softc *mpt)
910 {
911 	uint32_t val;
912 
913 #define MPT_CHECK(reg, offset, size)					\
914 	val = pci_read_config(mpt->dev, offset, size);			\
915 	if (mpt->pci_cfg.reg != val) {					\
916 		mpt_prt(mpt,						\
917 		    "Restoring " #reg " to 0x%X from 0x%X\n",		\
918 		    mpt->pci_cfg.reg, val);				\
919 	}
920 
921 	if (mpt->verbose >= MPT_PRT_DEBUG) {
922 		MPT_CHECK(Command, PCIR_COMMAND, 2);
923 		MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
924 		MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
925 		MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
926 		MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
927 		MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
928 		MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
929 		MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
930 		MPT_CHECK(IntLine, PCIR_INTLINE, 1);
931 		MPT_CHECK(PMCSR, 0x44, 4);
932 	}
933 #undef MPT_CHECK
934 
935 	pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
936 	pci_write_config(mpt->dev, PCIR_CACHELNSZ,
937 	    mpt->pci_cfg.LatencyTimer_LineSize, 2);
938 	pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
939 	pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
940 	pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
941 	pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
942 	pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
943 	pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
944 	pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
945 	pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
946 }
947 
948 static void
949 mpt_pci_intr(void *arg)
950 {
951 	struct mpt_softc *mpt;
952 
953 	mpt = (struct mpt_softc *)arg;
954 	MPT_LOCK(mpt);
955 	mpt_intr(mpt);
956 	MPT_UNLOCK(mpt);
957 }
958