1 /*- 2 * PCI specific probe and attach routines for LSI Fusion Adapters 3 * FreeBSD Version. 4 * 5 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD AND BSD-3-Clause 6 * 7 * Copyright (c) 2000, 2001 by Greg Ansley 8 * Partially derived from Matt Jacob's ISP driver. 9 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob 10 * Feral Software 11 * All rights reserved. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice immediately at the beginning of the file, without modification, 18 * this list of conditions, and the following disclaimer. 19 * 2. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 /*- 35 * Copyright (c) 2002, 2006 by Matthew Jacob 36 * All rights reserved. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions are 40 * met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 44 * substantially similar to the "NO WARRANTY" disclaimer below 45 * ("Disclaimer") and any redistribution must be conditioned upon including 46 * a substantially similar Disclaimer requirement for further binary 47 * redistribution. 48 * 3. Neither the names of the above listed copyright holders nor the names 49 * of any contributors may be used to endorse or promote products derived 50 * from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 53 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 55 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 56 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 57 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 58 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 59 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 60 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 62 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 63 * 64 * Support from Chris Ellsworth in order to make SAS adapters work 65 * is gratefully acknowledged. 66 * 67 * Support from LSI-Logic has also gone a great deal toward making this a 68 * workable subsystem and is gratefully acknowledged. 69 */ 70 /* 71 * Copyright (c) 2004, Avid Technology, Inc. and its contributors. 72 * Copyright (c) 2005, WHEEL Sp. z o.o. 73 * Copyright (c) 2004, 2005 Justin T. Gibbs 74 * All rights reserved. 75 * 76 * Redistribution and use in source and binary forms, with or without 77 * modification, are permitted provided that the following conditions are 78 * met: 79 * 1. Redistributions of source code must retain the above copyright 80 * notice, this list of conditions and the following disclaimer. 81 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 82 * substantially similar to the "NO WARRANTY" disclaimer below 83 * ("Disclaimer") and any redistribution must be conditioned upon including 84 * a substantially similar Disclaimer requirement for further binary 85 * redistribution. 86 * 3. Neither the names of the above listed copyright holders nor the names 87 * of any contributors may be used to endorse or promote products derived 88 * from this software without specific prior written permission. 89 * 90 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 91 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 92 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 93 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 94 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 95 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 96 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 97 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 98 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 99 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 100 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 101 */ 102 103 #include <sys/cdefs.h> 104 __FBSDID("$FreeBSD$"); 105 106 #include <dev/mpt/mpt.h> 107 #include <dev/mpt/mpt_cam.h> 108 #include <dev/mpt/mpt_raid.h> 109 110 /* 111 * XXX it seems no other MPT driver knows about the following chips. 112 */ 113 114 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC909_FB 115 #define MPI_MANUFACTPAGE_DEVICEID_FC909_FB 0x0620 116 #endif 117 118 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB 119 #define MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB 0x0625 120 #endif 121 122 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB 123 #define MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB 0x0623 124 #endif 125 126 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB 127 #define MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB 0x0627 128 #endif 129 130 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB 131 #define MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB 0x0629 132 #endif 133 134 #ifndef MPI_MANUFACTPAGE_DEVID_SAS1068A_FB 135 #define MPI_MANUFACTPAGE_DEVID_SAS1068A_FB 0x0055 136 #endif 137 138 #ifndef MPI_MANUFACTPAGE_DEVID_SAS1068E_FB 139 #define MPI_MANUFACTPAGE_DEVID_SAS1068E_FB 0x0059 140 #endif 141 142 #ifndef MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB 143 #define MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB 0x007C 144 #endif 145 146 static int mpt_pci_probe(device_t); 147 static int mpt_pci_attach(device_t); 148 static void mpt_free_bus_resources(struct mpt_softc *mpt); 149 static int mpt_pci_detach(device_t); 150 static int mpt_pci_shutdown(device_t); 151 static int mpt_dma_mem_alloc(struct mpt_softc *mpt); 152 static void mpt_dma_mem_free(struct mpt_softc *mpt); 153 #if 0 154 static void mpt_read_config_regs(struct mpt_softc *mpt); 155 static void mpt_set_config_regs(struct mpt_softc *mpt); 156 #endif 157 static void mpt_pci_intr(void *); 158 159 static device_method_t mpt_methods[] = { 160 /* Device interface */ 161 DEVMETHOD(device_probe, mpt_pci_probe), 162 DEVMETHOD(device_attach, mpt_pci_attach), 163 DEVMETHOD(device_detach, mpt_pci_detach), 164 DEVMETHOD(device_shutdown, mpt_pci_shutdown), 165 DEVMETHOD_END 166 }; 167 168 static driver_t mpt_driver = { 169 "mpt", mpt_methods, sizeof(struct mpt_softc) 170 }; 171 172 static devclass_t mpt_devclass; 173 DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, NULL, NULL); 174 MODULE_DEPEND(mpt, pci, 1, 1, 1); 175 MODULE_VERSION(mpt, 1); 176 177 static int 178 mpt_pci_probe(device_t dev) 179 { 180 const char *desc; 181 int rval; 182 183 if (pci_get_vendor(dev) != MPI_MANUFACTPAGE_VENDORID_LSILOGIC) 184 return (ENXIO); 185 186 rval = BUS_PROBE_DEFAULT; 187 switch (pci_get_device(dev)) { 188 case MPI_MANUFACTPAGE_DEVICEID_FC909_FB: 189 desc = "LSILogic FC909 FC Adapter"; 190 break; 191 case MPI_MANUFACTPAGE_DEVICEID_FC909: 192 desc = "LSILogic FC909A FC Adapter"; 193 break; 194 case MPI_MANUFACTPAGE_DEVICEID_FC919: 195 desc = "LSILogic FC919 FC Adapter"; 196 break; 197 case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB: 198 desc = "LSILogic FC919 LAN Adapter"; 199 break; 200 case MPI_MANUFACTPAGE_DEVICEID_FC929: 201 desc = "Dual LSILogic FC929 FC Adapter"; 202 break; 203 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB: 204 desc = "Dual LSILogic FC929 LAN Adapter"; 205 break; 206 case MPI_MANUFACTPAGE_DEVICEID_FC919X: 207 desc = "LSILogic FC919 FC PCI-X Adapter"; 208 break; 209 case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB: 210 desc = "LSILogic FC919 LAN PCI-X Adapter"; 211 break; 212 case MPI_MANUFACTPAGE_DEVICEID_FC929X: 213 desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter"; 214 break; 215 case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB: 216 desc = "Dual LSILogic FC929X LAN PCI-X Adapter"; 217 break; 218 case MPI_MANUFACTPAGE_DEVICEID_FC949E: 219 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter"; 220 break; 221 case MPI_MANUFACTPAGE_DEVICEID_FC949X: 222 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter"; 223 break; 224 case MPI_MANUFACTPAGE_DEVID_53C1030: 225 case MPI_MANUFACTPAGE_DEVID_53C1030ZC: 226 desc = "LSILogic 1030 Ultra4 Adapter"; 227 break; 228 case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB: 229 /* 230 * Allow mfi(4) to claim this device in case it's in MegaRAID 231 * mode. 232 */ 233 rval = BUS_PROBE_LOW_PRIORITY; 234 /* FALLTHROUGH */ 235 case MPI_MANUFACTPAGE_DEVID_SAS1064: 236 case MPI_MANUFACTPAGE_DEVID_SAS1064A: 237 case MPI_MANUFACTPAGE_DEVID_SAS1064E: 238 case MPI_MANUFACTPAGE_DEVID_SAS1066: 239 case MPI_MANUFACTPAGE_DEVID_SAS1066E: 240 case MPI_MANUFACTPAGE_DEVID_SAS1068: 241 case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB: 242 case MPI_MANUFACTPAGE_DEVID_SAS1068E: 243 case MPI_MANUFACTPAGE_DEVID_SAS1078: 244 case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB: 245 desc = "LSILogic SAS/SATA Adapter"; 246 break; 247 default: 248 return (ENXIO); 249 } 250 251 device_set_desc(dev, desc); 252 return (rval); 253 } 254 255 static void 256 mpt_set_options(struct mpt_softc *mpt) 257 { 258 int tval; 259 260 tval = 0; 261 if (resource_int_value(device_get_name(mpt->dev), 262 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) { 263 mpt->verbose = tval; 264 } 265 tval = -1; 266 if (resource_int_value(device_get_name(mpt->dev), 267 device_get_unit(mpt->dev), "role", &tval) == 0 && tval >= 0 && 268 tval <= 3) { 269 mpt->cfg_role = tval; 270 mpt->do_cfg_role = 1; 271 } 272 tval = 0; 273 mpt->msi_enable = 0; 274 if (mpt->is_sas) 275 mpt->msi_enable = 1; 276 if (resource_int_value(device_get_name(mpt->dev), 277 device_get_unit(mpt->dev), "msi_enable", &tval) == 0) { 278 mpt->msi_enable = tval; 279 } 280 } 281 282 #if 0 283 static void 284 mpt_link_peer(struct mpt_softc *mpt) 285 { 286 struct mpt_softc *mpt2; 287 288 if (mpt->unit == 0) { 289 return; 290 } 291 /* 292 * XXX: depends on probe order 293 */ 294 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1); 295 296 if (mpt2 == NULL) { 297 return; 298 } 299 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) { 300 return; 301 } 302 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) { 303 return; 304 } 305 mpt->mpt2 = mpt2; 306 mpt2->mpt2 = mpt; 307 if (mpt->verbose >= MPT_PRT_DEBUG) { 308 mpt_prt(mpt, "linking with peer (mpt%d)\n", 309 device_get_unit(mpt2->dev)); 310 } 311 } 312 313 static void 314 mpt_unlink_peer(struct mpt_softc *mpt) 315 { 316 317 if (mpt->mpt2) { 318 mpt->mpt2->mpt2 = NULL; 319 } 320 } 321 #endif 322 323 static int 324 mpt_pci_attach(device_t dev) 325 { 326 struct mpt_softc *mpt; 327 int iqd; 328 uint32_t val; 329 int mpt_io_bar, mpt_mem_bar; 330 331 mpt = (struct mpt_softc*)device_get_softc(dev); 332 333 switch (pci_get_device(dev)) { 334 case MPI_MANUFACTPAGE_DEVICEID_FC909_FB: 335 case MPI_MANUFACTPAGE_DEVICEID_FC909: 336 case MPI_MANUFACTPAGE_DEVICEID_FC919: 337 case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB: 338 case MPI_MANUFACTPAGE_DEVICEID_FC929: 339 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB: 340 case MPI_MANUFACTPAGE_DEVICEID_FC929X: 341 case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB: 342 case MPI_MANUFACTPAGE_DEVICEID_FC919X: 343 case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB: 344 case MPI_MANUFACTPAGE_DEVICEID_FC949E: 345 case MPI_MANUFACTPAGE_DEVICEID_FC949X: 346 mpt->is_fc = 1; 347 break; 348 case MPI_MANUFACTPAGE_DEVID_SAS1078: 349 case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB: 350 mpt->is_1078 = 1; 351 /* FALLTHROUGH */ 352 case MPI_MANUFACTPAGE_DEVID_SAS1064: 353 case MPI_MANUFACTPAGE_DEVID_SAS1064A: 354 case MPI_MANUFACTPAGE_DEVID_SAS1064E: 355 case MPI_MANUFACTPAGE_DEVID_SAS1066: 356 case MPI_MANUFACTPAGE_DEVID_SAS1066E: 357 case MPI_MANUFACTPAGE_DEVID_SAS1068: 358 case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB: 359 case MPI_MANUFACTPAGE_DEVID_SAS1068E: 360 case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB: 361 mpt->is_sas = 1; 362 break; 363 default: 364 mpt->is_spi = 1; 365 break; 366 } 367 mpt->dev = dev; 368 mpt->unit = device_get_unit(dev); 369 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT; 370 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT; 371 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT; 372 mpt->verbose = MPT_PRT_NONE; 373 mpt->role = MPT_ROLE_NONE; 374 mpt->mpt_ini_id = MPT_INI_ID_NONE; 375 #ifdef __sparc64__ 376 if (mpt->is_spi) 377 mpt->mpt_ini_id = OF_getscsinitid(dev); 378 #endif 379 mpt_set_options(mpt); 380 if (mpt->verbose == MPT_PRT_NONE) { 381 mpt->verbose = MPT_PRT_WARN; 382 /* Print INFO level (if any) if bootverbose is set */ 383 mpt->verbose += (bootverbose != 0)? 1 : 0; 384 } 385 386 /* 387 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set. 388 */ 389 val = pci_read_config(dev, PCIR_COMMAND, 2); 390 val |= PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN | 391 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN; 392 pci_write_config(dev, PCIR_COMMAND, val, 2); 393 394 /* 395 * Make sure we've disabled the ROM. 396 */ 397 val = pci_read_config(dev, PCIR_BIOS, 4); 398 val &= ~PCIM_BIOS_ENABLE; 399 pci_write_config(dev, PCIR_BIOS, val, 4); 400 401 #if 0 402 /* 403 * Is this part a dual? 404 * If so, link with our partner (around yet) 405 */ 406 switch (pci_get_device(dev)) { 407 case MPI_MANUFACTPAGE_DEVICEID_FC929: 408 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB: 409 case MPI_MANUFACTPAGE_DEVICEID_FC949E: 410 case MPI_MANUFACTPAGE_DEVICEID_FC949X: 411 case MPI_MANUFACTPAGE_DEVID_53C1030: 412 case MPI_MANUFACTPAGE_DEVID_53C1030ZC: 413 mpt_link_peer(mpt); 414 break; 415 default: 416 break; 417 } 418 #endif 419 420 /* 421 * Figure out which are the I/O and MEM Bars 422 */ 423 val = pci_read_config(dev, PCIR_BAR(0), 4); 424 if (PCI_BAR_IO(val)) { 425 /* BAR0 is IO, BAR1 is memory */ 426 mpt_io_bar = 0; 427 mpt_mem_bar = 1; 428 } else { 429 /* BAR0 is memory, BAR1 is IO */ 430 mpt_mem_bar = 0; 431 mpt_io_bar = 1; 432 } 433 434 /* 435 * Set up register access. PIO mode is required for 436 * certain reset operations (but must be disabled for 437 * some cards otherwise). 438 */ 439 mpt_io_bar = PCIR_BAR(mpt_io_bar); 440 mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, 441 &mpt_io_bar, RF_ACTIVE); 442 if (mpt->pci_pio_reg == NULL) { 443 if (bootverbose) { 444 device_printf(dev, 445 "unable to map registers in PIO mode\n"); 446 } 447 } else { 448 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg); 449 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg); 450 } 451 452 mpt_mem_bar = PCIR_BAR(mpt_mem_bar); 453 mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 454 &mpt_mem_bar, RF_ACTIVE); 455 if (mpt->pci_reg == NULL) { 456 if (bootverbose || mpt->is_sas || mpt->pci_pio_reg == NULL) { 457 device_printf(dev, 458 "Unable to memory map registers.\n"); 459 } 460 if (mpt->is_sas || mpt->pci_pio_reg == NULL) { 461 device_printf(dev, "Giving Up.\n"); 462 goto bad; 463 } 464 if (bootverbose) { 465 device_printf(dev, "Falling back to PIO mode.\n"); 466 } 467 mpt->pci_st = mpt->pci_pio_st; 468 mpt->pci_sh = mpt->pci_pio_sh; 469 } else { 470 mpt->pci_st = rman_get_bustag(mpt->pci_reg); 471 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg); 472 } 473 474 /* Get a handle to the interrupt */ 475 iqd = 0; 476 if (mpt->msi_enable) { 477 /* 478 * First try to alloc an MSI-X message. If that 479 * fails, then try to alloc an MSI message instead. 480 */ 481 val = 1; 482 if (pci_alloc_msix(dev, &val) == 0) 483 iqd = 1; 484 val = 1; 485 if (iqd == 0 && pci_alloc_msi(dev, &val) == 0) 486 iqd = 1; 487 } 488 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd, 489 RF_ACTIVE | (iqd != 0 ? 0 : RF_SHAREABLE)); 490 if (mpt->pci_irq == NULL) { 491 device_printf(dev, "could not allocate interrupt\n"); 492 goto bad; 493 } 494 495 MPT_LOCK_SETUP(mpt); 496 497 /* Disable interrupts at the part */ 498 mpt_disable_ints(mpt); 499 500 /* Register the interrupt handler */ 501 if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, NULL, mpt_pci_intr, 502 mpt, &mpt->ih)) { 503 device_printf(dev, "could not setup interrupt\n"); 504 goto bad; 505 } 506 507 /* Allocate dma memory */ 508 if (mpt_dma_mem_alloc(mpt)) { 509 mpt_prt(mpt, "Could not allocate DMA memory\n"); 510 goto bad; 511 } 512 513 #if 0 514 /* 515 * Save the PCI config register values 516 * 517 * Hard resets are known to screw up the BAR for diagnostic 518 * memory accesses (Mem1). 519 * 520 * Using Mem1 is known to make the chip stop responding to 521 * configuration space transfers, so we need to save it now 522 */ 523 524 mpt_read_config_regs(mpt); 525 #endif 526 527 /* 528 * Disable PIO until we need it 529 */ 530 if (mpt->is_sas) { 531 pci_disable_io(dev, SYS_RES_IOPORT); 532 } 533 534 /* Initialize the hardware */ 535 if (mpt->disabled == 0) { 536 if (mpt_attach(mpt) != 0) { 537 goto bad; 538 } 539 } else { 540 mpt_prt(mpt, "device disabled at user request\n"); 541 goto bad; 542 } 543 544 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown, 545 dev, SHUTDOWN_PRI_LAST); 546 547 if (mpt->eh == NULL) { 548 mpt_prt(mpt, "shutdown event registration failed\n"); 549 mpt_disable_ints(mpt); 550 (void) mpt_detach(mpt); 551 mpt_reset(mpt, /*reinit*/FALSE); 552 mpt_raid_free_mem(mpt); 553 goto bad; 554 } 555 return (0); 556 557 bad: 558 mpt_dma_mem_free(mpt); 559 mpt_free_bus_resources(mpt); 560 #if 0 561 mpt_unlink_peer(mpt); 562 #endif 563 564 MPT_LOCK_DESTROY(mpt); 565 566 /* 567 * but return zero to preserve unit numbering 568 */ 569 return (0); 570 } 571 572 /* 573 * Free bus resources 574 */ 575 static void 576 mpt_free_bus_resources(struct mpt_softc *mpt) 577 { 578 579 if (mpt->ih) { 580 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih); 581 mpt->ih = NULL; 582 } 583 584 if (mpt->pci_irq) { 585 bus_release_resource(mpt->dev, SYS_RES_IRQ, 586 rman_get_rid(mpt->pci_irq), mpt->pci_irq); 587 pci_release_msi(mpt->dev); 588 mpt->pci_irq = NULL; 589 } 590 591 if (mpt->pci_pio_reg) { 592 bus_release_resource(mpt->dev, SYS_RES_IOPORT, 593 rman_get_rid(mpt->pci_pio_reg), mpt->pci_pio_reg); 594 mpt->pci_pio_reg = NULL; 595 } 596 597 if (mpt->pci_reg) { 598 bus_release_resource(mpt->dev, SYS_RES_MEMORY, 599 rman_get_rid(mpt->pci_reg), mpt->pci_reg); 600 mpt->pci_reg = NULL; 601 } 602 } 603 604 /* 605 * Disconnect ourselves from the system. 606 */ 607 static int 608 mpt_pci_detach(device_t dev) 609 { 610 struct mpt_softc *mpt; 611 612 mpt = (struct mpt_softc*)device_get_softc(dev); 613 614 if (mpt) { 615 mpt_disable_ints(mpt); 616 mpt_detach(mpt); 617 mpt_reset(mpt, /*reinit*/FALSE); 618 mpt_raid_free_mem(mpt); 619 mpt_dma_mem_free(mpt); 620 mpt_free_bus_resources(mpt); 621 #if 0 622 mpt_unlink_peer(mpt); 623 #endif 624 if (mpt->eh != NULL) { 625 EVENTHANDLER_DEREGISTER(shutdown_post_sync, mpt->eh); 626 } 627 MPT_LOCK_DESTROY(mpt); 628 } 629 return(0); 630 } 631 632 /* 633 * Disable the hardware 634 */ 635 static int 636 mpt_pci_shutdown(device_t dev) 637 { 638 struct mpt_softc *mpt; 639 640 mpt = (struct mpt_softc *)device_get_softc(dev); 641 if (mpt) 642 return (mpt_shutdown(mpt)); 643 return(0); 644 } 645 646 static int 647 mpt_dma_mem_alloc(struct mpt_softc *mpt) 648 { 649 size_t len; 650 struct mpt_map_info mi; 651 652 /* Check if we alreay have allocated the reply memory */ 653 if (mpt->reply_phys != 0) { 654 return 0; 655 } 656 657 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt); 658 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO); 659 660 /* 661 * Create a parent dma tag for this device. 662 * 663 * Align at byte boundaries, 664 * Limit to 32-bit addressing for request/reply queues. 665 */ 666 if (mpt_dma_tag_create(mpt, /*parent*/bus_get_dma_tag(mpt->dev), 667 /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR, 668 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL, 669 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT, 670 /*nsegments*/BUS_SPACE_UNRESTRICTED, 671 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0, 672 &mpt->parent_dmat) != 0) { 673 mpt_prt(mpt, "cannot create parent dma tag\n"); 674 return (1); 675 } 676 677 /* Create a child tag for reply buffers */ 678 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0, 679 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 680 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0, 681 &mpt->reply_dmat) != 0) { 682 mpt_prt(mpt, "cannot create a dma tag for replies\n"); 683 return (1); 684 } 685 686 /* Allocate some DMA accessible memory for replies */ 687 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply, 688 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) { 689 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n", 690 (u_long) (2 * PAGE_SIZE)); 691 return (1); 692 } 693 694 mi.mpt = mpt; 695 mi.error = 0; 696 697 /* Load and lock it into "bus space" */ 698 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply, 699 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0); 700 701 if (mi.error) { 702 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n", 703 mi.error); 704 return (1); 705 } 706 mpt->reply_phys = mi.phys; 707 708 return (0); 709 } 710 711 /* Deallocate memory that was allocated by mpt_dma_mem_alloc 712 */ 713 static void 714 mpt_dma_mem_free(struct mpt_softc *mpt) 715 { 716 717 /* Make sure we aren't double destroying */ 718 if (mpt->reply_dmat == 0) { 719 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n"); 720 return; 721 } 722 723 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap); 724 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap); 725 bus_dma_tag_destroy(mpt->reply_dmat); 726 bus_dma_tag_destroy(mpt->parent_dmat); 727 mpt->reply_dmat = NULL; 728 free(mpt->request_pool, M_DEVBUF); 729 mpt->request_pool = NULL; 730 } 731 732 #if 0 733 /* Reads modifiable (via PCI transactions) config registers */ 734 static void 735 mpt_read_config_regs(struct mpt_softc *mpt) 736 { 737 738 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2); 739 mpt->pci_cfg.LatencyTimer_LineSize = 740 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2); 741 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4); 742 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4); 743 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4); 744 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4); 745 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4); 746 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4); 747 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1); 748 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4); 749 } 750 751 /* Sets modifiable config registers */ 752 static void 753 mpt_set_config_regs(struct mpt_softc *mpt) 754 { 755 uint32_t val; 756 757 #define MPT_CHECK(reg, offset, size) \ 758 val = pci_read_config(mpt->dev, offset, size); \ 759 if (mpt->pci_cfg.reg != val) { \ 760 mpt_prt(mpt, \ 761 "Restoring " #reg " to 0x%X from 0x%X\n", \ 762 mpt->pci_cfg.reg, val); \ 763 } 764 765 if (mpt->verbose >= MPT_PRT_DEBUG) { 766 MPT_CHECK(Command, PCIR_COMMAND, 2); 767 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2); 768 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4); 769 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4); 770 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4); 771 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4); 772 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4); 773 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4); 774 MPT_CHECK(IntLine, PCIR_INTLINE, 1); 775 MPT_CHECK(PMCSR, 0x44, 4); 776 } 777 #undef MPT_CHECK 778 779 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2); 780 pci_write_config(mpt->dev, PCIR_CACHELNSZ, 781 mpt->pci_cfg.LatencyTimer_LineSize, 2); 782 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4); 783 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4); 784 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4); 785 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4); 786 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4); 787 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4); 788 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1); 789 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4); 790 } 791 #endif 792 793 static void 794 mpt_pci_intr(void *arg) 795 { 796 struct mpt_softc *mpt; 797 798 mpt = (struct mpt_softc *)arg; 799 MPT_LOCK(mpt); 800 mpt_intr(mpt); 801 MPT_UNLOCK(mpt); 802 } 803