1098ca2bdSWarner Losh /*- 29b631363SMatt Jacob * Generic routines for LSI '909 FC adapters. 39b631363SMatt Jacob * FreeBSD Version. 49b631363SMatt Jacob * 59b631363SMatt Jacob * Copyright (c) 2000, 2001 by Greg Ansley 69b631363SMatt Jacob * 79b631363SMatt Jacob * Redistribution and use in source and binary forms, with or without 89b631363SMatt Jacob * modification, are permitted provided that the following conditions 99b631363SMatt Jacob * are met: 109b631363SMatt Jacob * 1. Redistributions of source code must retain the above copyright 119b631363SMatt Jacob * notice immediately at the beginning of the file, without modification, 129b631363SMatt Jacob * this list of conditions, and the following disclaimer. 139b631363SMatt Jacob * 2. The name of the author may not be used to endorse or promote products 149b631363SMatt Jacob * derived from this software without specific prior written permission. 159b631363SMatt Jacob * 169b631363SMatt Jacob * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 179b631363SMatt Jacob * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 189b631363SMatt Jacob * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 199b631363SMatt Jacob * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 209b631363SMatt Jacob * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 219b631363SMatt Jacob * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 229b631363SMatt Jacob * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 239b631363SMatt Jacob * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 249b631363SMatt Jacob * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 259b631363SMatt Jacob * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 269b631363SMatt Jacob * SUCH DAMAGE. 27b0a2fdeeSScott Long * 28b0a2fdeeSScott Long * Additional Copyright (c) 2002 by Matthew Jacob under same license. 299b631363SMatt Jacob */ 309b631363SMatt Jacob /* 31b0a2fdeeSScott Long * Copyright (c) 2004, Avid Technology, Inc. and its contributors. 32b0a2fdeeSScott Long * Copyright (c) 2005, WHEEL Sp. z o.o. 33b0a2fdeeSScott Long * Copyright (c) 2004, 2005 Justin T. Gibbs 34b0a2fdeeSScott Long * All rights reserved. 35b0a2fdeeSScott Long * 36b0a2fdeeSScott Long * Redistribution and use in source and binary forms, with or without 37b0a2fdeeSScott Long * modification, are permitted provided that the following conditions are 38b0a2fdeeSScott Long * met: 39b0a2fdeeSScott Long * 1. Redistributions of source code must retain the above copyright 40b0a2fdeeSScott Long * notice, this list of conditions and the following disclaimer. 41b0a2fdeeSScott Long * 2. Redistributions in binary form must reproduce at minimum a disclaimer 42b0a2fdeeSScott Long * substantially similar to the "NO WARRANTY" disclaimer below 43b0a2fdeeSScott Long * ("Disclaimer") and any redistribution must be conditioned upon including 44b0a2fdeeSScott Long * a substantially similar Disclaimer requirement for further binary 45b0a2fdeeSScott Long * redistribution. 46286e947fSJustin T. Gibbs * 3. Neither the names of the above listed copyright holders nor the names 47286e947fSJustin T. Gibbs * of any contributors may be used to endorse or promote products derived 48286e947fSJustin T. Gibbs * from this software without specific prior written permission. 49b0a2fdeeSScott Long * 50b0a2fdeeSScott Long * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 51b0a2fdeeSScott Long * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52b0a2fdeeSScott Long * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53b0a2fdeeSScott Long * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 54b0a2fdeeSScott Long * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55b0a2fdeeSScott Long * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56b0a2fdeeSScott Long * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57b0a2fdeeSScott Long * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58b0a2fdeeSScott Long * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59b0a2fdeeSScott Long * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 60b0a2fdeeSScott Long * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 619b631363SMatt Jacob */ 629b631363SMatt Jacob 639295c6c5SDavid E. O'Brien #include <sys/cdefs.h> 649295c6c5SDavid E. O'Brien __FBSDID("$FreeBSD$"); 659295c6c5SDavid E. O'Brien 66b0a2fdeeSScott Long #include <dev/mpt/mpt.h> 67b0a2fdeeSScott Long #include <dev/mpt/mpt_cam.h> /* XXX For static handler registration */ 68b0a2fdeeSScott Long #include <dev/mpt/mpt_raid.h> /* XXX For static handler registration */ 69b0a2fdeeSScott Long 70b0a2fdeeSScott Long #include <dev/mpt/mpilib/mpi.h> 71b0a2fdeeSScott Long #include <dev/mpt/mpilib/mpi_ioc.h> 72b0a2fdeeSScott Long 73b0a2fdeeSScott Long #include <sys/sysctl.h> 747104aeefSMatt Jacob 759b631363SMatt Jacob #define MPT_MAX_TRYS 3 769b631363SMatt Jacob #define MPT_MAX_WAIT 300000 779b631363SMatt Jacob 789b631363SMatt Jacob static int maxwait_ack = 0; 799b631363SMatt Jacob static int maxwait_int = 0; 809b631363SMatt Jacob static int maxwait_state = 0; 819b631363SMatt Jacob 82b0a2fdeeSScott Long TAILQ_HEAD(, mpt_softc) mpt_tailq = TAILQ_HEAD_INITIALIZER(mpt_tailq); 83b0a2fdeeSScott Long mpt_reply_handler_t *mpt_reply_handlers[MPT_NUM_REPLY_HANDLERS]; 849b631363SMatt Jacob 85b0a2fdeeSScott Long static mpt_reply_handler_t mpt_default_reply_handler; 86b0a2fdeeSScott Long static mpt_reply_handler_t mpt_config_reply_handler; 87b0a2fdeeSScott Long static mpt_reply_handler_t mpt_handshake_reply_handler; 88b0a2fdeeSScott Long static mpt_reply_handler_t mpt_event_reply_handler; 89b0a2fdeeSScott Long static void mpt_send_event_ack(struct mpt_softc *mpt, request_t *ack_req, 90b0a2fdeeSScott Long MSG_EVENT_NOTIFY_REPLY *msg, uint32_t context); 91b0a2fdeeSScott Long static int mpt_soft_reset(struct mpt_softc *mpt); 92b0a2fdeeSScott Long static void mpt_hard_reset(struct mpt_softc *mpt); 93b0a2fdeeSScott Long static int mpt_configure_ioc(struct mpt_softc *mpt); 94b0a2fdeeSScott Long static int mpt_enable_ioc(struct mpt_softc *mpt); 95b0a2fdeeSScott Long 96b0a2fdeeSScott Long /************************* Personality Module Support *************************/ 97b0a2fdeeSScott Long /* 98b0a2fdeeSScott Long * We include one extra entry that is guaranteed to be NULL 99b0a2fdeeSScott Long * to simplify our itterator. 100b0a2fdeeSScott Long */ 101b0a2fdeeSScott Long static struct mpt_personality *mpt_personalities[MPT_MAX_PERSONALITIES + 1]; 102b0a2fdeeSScott Long static __inline struct mpt_personality* 103b0a2fdeeSScott Long mpt_pers_find(struct mpt_softc *, u_int); 104b0a2fdeeSScott Long static __inline struct mpt_personality* 105b0a2fdeeSScott Long mpt_pers_find_reverse(struct mpt_softc *, u_int); 106b0a2fdeeSScott Long 107b0a2fdeeSScott Long static __inline struct mpt_personality * 108b0a2fdeeSScott Long mpt_pers_find(struct mpt_softc *mpt, u_int start_at) 109b0a2fdeeSScott Long { 110b0a2fdeeSScott Long KASSERT(start_at <= MPT_MAX_PERSONALITIES, 111b0a2fdeeSScott Long ("mpt_pers_find: starting position out of range\n")); 112b0a2fdeeSScott Long 113b0a2fdeeSScott Long while (start_at < MPT_MAX_PERSONALITIES 114b0a2fdeeSScott Long && (mpt->mpt_pers_mask & (0x1 << start_at)) == 0) { 115b0a2fdeeSScott Long start_at++; 116b0a2fdeeSScott Long } 117b0a2fdeeSScott Long return (mpt_personalities[start_at]); 118b0a2fdeeSScott Long } 119b0a2fdeeSScott Long 120b0a2fdeeSScott Long /* 121b0a2fdeeSScott Long * Used infrequenstly, so no need to optimize like a forward 122b0a2fdeeSScott Long * traversal where we use the MAX+1 is guaranteed to be NULL 123b0a2fdeeSScott Long * trick. 124b0a2fdeeSScott Long */ 125b0a2fdeeSScott Long static __inline struct mpt_personality * 126b0a2fdeeSScott Long mpt_pers_find_reverse(struct mpt_softc *mpt, u_int start_at) 127b0a2fdeeSScott Long { 128b0a2fdeeSScott Long while (start_at < MPT_MAX_PERSONALITIES 129b0a2fdeeSScott Long && (mpt->mpt_pers_mask & (0x1 << start_at)) == 0) { 130b0a2fdeeSScott Long start_at--; 131b0a2fdeeSScott Long } 132b0a2fdeeSScott Long if (start_at < MPT_MAX_PERSONALITIES) 133b0a2fdeeSScott Long return (mpt_personalities[start_at]); 134b0a2fdeeSScott Long return (NULL); 135b0a2fdeeSScott Long } 136b0a2fdeeSScott Long 137b0a2fdeeSScott Long #define MPT_PERS_FOREACH(mpt, pers) \ 138b0a2fdeeSScott Long for (pers = mpt_pers_find(mpt, /*start_at*/0); \ 139b0a2fdeeSScott Long pers != NULL; \ 140b0a2fdeeSScott Long pers = mpt_pers_find(mpt, /*start_at*/pers->id+1)) 141b0a2fdeeSScott Long 142b0a2fdeeSScott Long #define MPT_PERS_FOREACH_REVERSE(mpt, pers) \ 143b0a2fdeeSScott Long for (pers = mpt_pers_find_reverse(mpt, MPT_MAX_PERSONALITIES-1);\ 144b0a2fdeeSScott Long pers != NULL; \ 145b0a2fdeeSScott Long pers = mpt_pers_find_reverse(mpt, /*start_at*/pers->id-1)) 146b0a2fdeeSScott Long 147b0a2fdeeSScott Long static mpt_load_handler_t mpt_stdload; 148b0a2fdeeSScott Long static mpt_probe_handler_t mpt_stdprobe; 149b0a2fdeeSScott Long static mpt_attach_handler_t mpt_stdattach; 150b0a2fdeeSScott Long static mpt_event_handler_t mpt_stdevent; 151b0a2fdeeSScott Long static mpt_reset_handler_t mpt_stdreset; 152b0a2fdeeSScott Long static mpt_shutdown_handler_t mpt_stdshutdown; 153b0a2fdeeSScott Long static mpt_detach_handler_t mpt_stddetach; 154b0a2fdeeSScott Long static mpt_unload_handler_t mpt_stdunload; 155b0a2fdeeSScott Long static struct mpt_personality mpt_default_personality = 156b0a2fdeeSScott Long { 157b0a2fdeeSScott Long .load = mpt_stdload, 158b0a2fdeeSScott Long .probe = mpt_stdprobe, 159b0a2fdeeSScott Long .attach = mpt_stdattach, 160b0a2fdeeSScott Long .event = mpt_stdevent, 161b0a2fdeeSScott Long .reset = mpt_stdreset, 162b0a2fdeeSScott Long .shutdown = mpt_stdshutdown, 163b0a2fdeeSScott Long .detach = mpt_stddetach, 164b0a2fdeeSScott Long .unload = mpt_stdunload 165b0a2fdeeSScott Long }; 166b0a2fdeeSScott Long 167b0a2fdeeSScott Long static mpt_load_handler_t mpt_core_load; 168b0a2fdeeSScott Long static mpt_attach_handler_t mpt_core_attach; 169b0a2fdeeSScott Long static mpt_reset_handler_t mpt_core_ioc_reset; 170b0a2fdeeSScott Long static mpt_event_handler_t mpt_core_event; 171b0a2fdeeSScott Long static mpt_shutdown_handler_t mpt_core_shutdown; 172b0a2fdeeSScott Long static mpt_shutdown_handler_t mpt_core_detach; 173b0a2fdeeSScott Long static mpt_unload_handler_t mpt_core_unload; 174b0a2fdeeSScott Long static struct mpt_personality mpt_core_personality = 175b0a2fdeeSScott Long { 176b0a2fdeeSScott Long .name = "mpt_core", 177b0a2fdeeSScott Long .load = mpt_core_load, 178b0a2fdeeSScott Long .attach = mpt_core_attach, 179b0a2fdeeSScott Long .event = mpt_core_event, 180b0a2fdeeSScott Long .reset = mpt_core_ioc_reset, 181b0a2fdeeSScott Long .shutdown = mpt_core_shutdown, 182b0a2fdeeSScott Long .detach = mpt_core_detach, 183b0a2fdeeSScott Long .unload = mpt_core_unload, 184b0a2fdeeSScott Long }; 185b0a2fdeeSScott Long 186b0a2fdeeSScott Long /* 187b0a2fdeeSScott Long * Manual declaration so that DECLARE_MPT_PERSONALITY doesn't need 188b0a2fdeeSScott Long * ordering information. We want the core to always register FIRST. 189b0a2fdeeSScott Long * other modules are set to SI_ORDER_SECOND. 190b0a2fdeeSScott Long */ 191b0a2fdeeSScott Long static moduledata_t mpt_core_mod = { 192b0a2fdeeSScott Long "mpt_core", mpt_modevent, &mpt_core_personality 193b0a2fdeeSScott Long }; 194b0a2fdeeSScott Long DECLARE_MODULE(mpt_core, mpt_core_mod, SI_SUB_DRIVERS, SI_ORDER_FIRST); 195b0a2fdeeSScott Long MODULE_VERSION(mpt_core, 1); 196b0a2fdeeSScott Long 197b0a2fdeeSScott Long #define MPT_PERS_ATACHED(pers, mpt) \ 198b0a2fdeeSScott Long ((mpt)->pers_mask & (0x1 << pers->id)) 199b0a2fdeeSScott Long 200b0a2fdeeSScott Long 201b0a2fdeeSScott Long int 202b0a2fdeeSScott Long mpt_modevent(module_t mod, int type, void *data) 203b0a2fdeeSScott Long { 204b0a2fdeeSScott Long struct mpt_personality *pers; 205b0a2fdeeSScott Long int error; 206b0a2fdeeSScott Long 207b0a2fdeeSScott Long pers = (struct mpt_personality *)data; 208b0a2fdeeSScott Long 209b0a2fdeeSScott Long error = 0; 210b0a2fdeeSScott Long switch (type) { 211b0a2fdeeSScott Long case MOD_LOAD: 212b0a2fdeeSScott Long { 213b0a2fdeeSScott Long mpt_load_handler_t **def_handler; 214b0a2fdeeSScott Long mpt_load_handler_t **pers_handler; 215b0a2fdeeSScott Long int i; 216b0a2fdeeSScott Long 217b0a2fdeeSScott Long for (i = 0; i < MPT_MAX_PERSONALITIES; i++) { 218b0a2fdeeSScott Long if (mpt_personalities[i] == NULL) 219b0a2fdeeSScott Long break; 220b0a2fdeeSScott Long } 221b0a2fdeeSScott Long if (i >= MPT_MAX_PERSONALITIES) { 222b0a2fdeeSScott Long error = ENOMEM; 223b0a2fdeeSScott Long break; 224b0a2fdeeSScott Long } 225b0a2fdeeSScott Long pers->id = i; 226b0a2fdeeSScott Long mpt_personalities[i] = pers; 227b0a2fdeeSScott Long 228b0a2fdeeSScott Long /* Install standard/noop handlers for any NULL entries. */ 229b0a2fdeeSScott Long def_handler = MPT_PERS_FIRST_HANDLER(&mpt_default_personality); 230b0a2fdeeSScott Long pers_handler = MPT_PERS_FIRST_HANDLER(pers); 231b0a2fdeeSScott Long while (pers_handler <= MPT_PERS_LAST_HANDLER(pers)) { 232b0a2fdeeSScott Long if (*pers_handler == NULL) 233b0a2fdeeSScott Long *pers_handler = *def_handler; 234b0a2fdeeSScott Long pers_handler++; 235b0a2fdeeSScott Long def_handler++; 236b0a2fdeeSScott Long } 237b0a2fdeeSScott Long 238b0a2fdeeSScott Long error = (pers->load(pers)); 239b0a2fdeeSScott Long if (error != 0) 240b0a2fdeeSScott Long mpt_personalities[i] = NULL; 241b0a2fdeeSScott Long break; 242b0a2fdeeSScott Long } 243b0a2fdeeSScott Long case MOD_SHUTDOWN: 244b0a2fdeeSScott Long break; 245b0a2fdeeSScott Long case MOD_QUIESCE: 246b0a2fdeeSScott Long break; 247b0a2fdeeSScott Long case MOD_UNLOAD: 248b0a2fdeeSScott Long error = pers->unload(pers); 249b0a2fdeeSScott Long mpt_personalities[pers->id] = NULL; 250b0a2fdeeSScott Long break; 251b0a2fdeeSScott Long default: 252b0a2fdeeSScott Long error = EINVAL; 253b0a2fdeeSScott Long break; 254b0a2fdeeSScott Long } 255b0a2fdeeSScott Long return (error); 256b0a2fdeeSScott Long } 257b0a2fdeeSScott Long 258b0a2fdeeSScott Long int 259b0a2fdeeSScott Long mpt_stdload(struct mpt_personality *pers) 260b0a2fdeeSScott Long { 261b0a2fdeeSScott Long /* Load is always successfull. */ 262b0a2fdeeSScott Long return (0); 263b0a2fdeeSScott Long } 264b0a2fdeeSScott Long 265b0a2fdeeSScott Long int 266b0a2fdeeSScott Long mpt_stdprobe(struct mpt_softc *mpt) 267b0a2fdeeSScott Long { 268b0a2fdeeSScott Long /* Probe is always successfull. */ 269b0a2fdeeSScott Long return (0); 270b0a2fdeeSScott Long } 271b0a2fdeeSScott Long 272b0a2fdeeSScott Long int 273b0a2fdeeSScott Long mpt_stdattach(struct mpt_softc *mpt) 274b0a2fdeeSScott Long { 275b0a2fdeeSScott Long /* Attach is always successfull. */ 276b0a2fdeeSScott Long return (0); 277b0a2fdeeSScott Long } 278b0a2fdeeSScott Long 279b0a2fdeeSScott Long int 280b0a2fdeeSScott Long mpt_stdevent(struct mpt_softc *mpt, request_t *req, MSG_EVENT_NOTIFY_REPLY *rep) 281b0a2fdeeSScott Long { 282b0a2fdeeSScott Long /* Event was not for us. */ 283b0a2fdeeSScott Long return (0); 284b0a2fdeeSScott Long } 285b0a2fdeeSScott Long 286b0a2fdeeSScott Long void 287b0a2fdeeSScott Long mpt_stdreset(struct mpt_softc *mpt, int type) 288b0a2fdeeSScott Long { 289b0a2fdeeSScott Long } 290b0a2fdeeSScott Long 291b0a2fdeeSScott Long void 292b0a2fdeeSScott Long mpt_stdshutdown(struct mpt_softc *mpt) 293b0a2fdeeSScott Long { 294b0a2fdeeSScott Long } 295b0a2fdeeSScott Long 296b0a2fdeeSScott Long void 297b0a2fdeeSScott Long mpt_stddetach(struct mpt_softc *mpt) 298b0a2fdeeSScott Long { 299b0a2fdeeSScott Long } 300b0a2fdeeSScott Long 301b0a2fdeeSScott Long int 302b0a2fdeeSScott Long mpt_stdunload(struct mpt_personality *pers) 303b0a2fdeeSScott Long { 304b0a2fdeeSScott Long /* Unload is always successfull. */ 305b0a2fdeeSScott Long return (0); 306b0a2fdeeSScott Long } 307b0a2fdeeSScott Long 308b0a2fdeeSScott Long /******************************* Bus DMA Support ******************************/ 309b0a2fdeeSScott Long void 310b0a2fdeeSScott Long mpt_map_rquest(void *arg, bus_dma_segment_t *segs, int nseg, int error) 311b0a2fdeeSScott Long { 312b0a2fdeeSScott Long struct mpt_map_info *map_info; 313b0a2fdeeSScott Long 314b0a2fdeeSScott Long map_info = (struct mpt_map_info *)arg; 315b0a2fdeeSScott Long map_info->error = error; 316b0a2fdeeSScott Long map_info->phys = segs->ds_addr; 317b0a2fdeeSScott Long } 318b0a2fdeeSScott Long 319b0a2fdeeSScott Long /**************************** Reply/Event Handling ****************************/ 320b0a2fdeeSScott Long int 321b0a2fdeeSScott Long mpt_register_handler(struct mpt_softc *mpt, mpt_handler_type type, 322b0a2fdeeSScott Long mpt_handler_t handler, uint32_t *phandler_id) 323b0a2fdeeSScott Long { 324b0a2fdeeSScott Long 325b0a2fdeeSScott Long switch (type) { 326b0a2fdeeSScott Long case MPT_HANDLER_REPLY: 327b0a2fdeeSScott Long { 328b0a2fdeeSScott Long u_int cbi; 329b0a2fdeeSScott Long u_int free_cbi; 330b0a2fdeeSScott Long 331b0a2fdeeSScott Long if (phandler_id == NULL) 332b0a2fdeeSScott Long return (EINVAL); 333b0a2fdeeSScott Long 334b0a2fdeeSScott Long free_cbi = MPT_HANDLER_ID_NONE; 335b0a2fdeeSScott Long for (cbi = 0; cbi < MPT_NUM_REPLY_HANDLERS; cbi++) { 336b0a2fdeeSScott Long /* 337b0a2fdeeSScott Long * If the same handler is registered multiple 338b0a2fdeeSScott Long * times, don't error out. Just return the 339b0a2fdeeSScott Long * index of the original registration. 340b0a2fdeeSScott Long */ 341b0a2fdeeSScott Long if (mpt_reply_handlers[cbi] == handler.reply_handler) { 342b0a2fdeeSScott Long *phandler_id = MPT_CBI_TO_HID(cbi); 343b0a2fdeeSScott Long return (0); 344b0a2fdeeSScott Long } 345b0a2fdeeSScott Long 346b0a2fdeeSScott Long /* 347b0a2fdeeSScott Long * Fill from the front in the hope that 348b0a2fdeeSScott Long * all registered handlers consume only a 349b0a2fdeeSScott Long * single cache line. 350b0a2fdeeSScott Long * 351b0a2fdeeSScott Long * We don't break on the first empty slot so 352b0a2fdeeSScott Long * that the full table is checked to see if 353b0a2fdeeSScott Long * this handler was previously registered. 354b0a2fdeeSScott Long */ 355b0a2fdeeSScott Long if (free_cbi == MPT_HANDLER_ID_NONE 356b0a2fdeeSScott Long && (mpt_reply_handlers[cbi] 357b0a2fdeeSScott Long == mpt_default_reply_handler)) 358b0a2fdeeSScott Long free_cbi = cbi; 359b0a2fdeeSScott Long } 360b0a2fdeeSScott Long if (free_cbi == MPT_HANDLER_ID_NONE) 361b0a2fdeeSScott Long return (ENOMEM); 362b0a2fdeeSScott Long mpt_reply_handlers[free_cbi] = handler.reply_handler; 363b0a2fdeeSScott Long *phandler_id = MPT_CBI_TO_HID(free_cbi); 364b0a2fdeeSScott Long break; 365b0a2fdeeSScott Long } 366b0a2fdeeSScott Long default: 367b0a2fdeeSScott Long mpt_prt(mpt, "mpt_register_handler unknown type %d\n", type); 368b0a2fdeeSScott Long return (EINVAL); 369b0a2fdeeSScott Long } 370b0a2fdeeSScott Long return (0); 371b0a2fdeeSScott Long } 372b0a2fdeeSScott Long 373b0a2fdeeSScott Long int 374b0a2fdeeSScott Long mpt_deregister_handler(struct mpt_softc *mpt, mpt_handler_type type, 375b0a2fdeeSScott Long mpt_handler_t handler, uint32_t handler_id) 376b0a2fdeeSScott Long { 377b0a2fdeeSScott Long 378b0a2fdeeSScott Long switch (type) { 379b0a2fdeeSScott Long case MPT_HANDLER_REPLY: 380b0a2fdeeSScott Long { 381b0a2fdeeSScott Long u_int cbi; 382b0a2fdeeSScott Long 383b0a2fdeeSScott Long cbi = MPT_CBI(handler_id); 384b0a2fdeeSScott Long if (cbi >= MPT_NUM_REPLY_HANDLERS 385b0a2fdeeSScott Long || mpt_reply_handlers[cbi] != handler.reply_handler) 386b0a2fdeeSScott Long return (ENOENT); 387b0a2fdeeSScott Long mpt_reply_handlers[cbi] = mpt_default_reply_handler; 388b0a2fdeeSScott Long break; 389b0a2fdeeSScott Long } 390b0a2fdeeSScott Long default: 391b0a2fdeeSScott Long mpt_prt(mpt, "mpt_deregister_handler unknown type %d\n", type); 392b0a2fdeeSScott Long return (EINVAL); 393b0a2fdeeSScott Long } 394b0a2fdeeSScott Long return (0); 395b0a2fdeeSScott Long } 396b0a2fdeeSScott Long 397b0a2fdeeSScott Long static int 398b0a2fdeeSScott Long mpt_default_reply_handler(struct mpt_softc *mpt, request_t *req, 399b0a2fdeeSScott Long MSG_DEFAULT_REPLY *reply_frame) 400b0a2fdeeSScott Long { 401b0a2fdeeSScott Long mpt_prt(mpt, "XXXX Default Handler Called. Req %p, Frame %p\n", 402b0a2fdeeSScott Long req, reply_frame); 403b0a2fdeeSScott Long 404b0a2fdeeSScott Long if (reply_frame != NULL) 405b0a2fdeeSScott Long mpt_dump_reply_frame(mpt, reply_frame); 406b0a2fdeeSScott Long 407b0a2fdeeSScott Long mpt_prt(mpt, "XXXX Reply Frame Ignored\n"); 408b0a2fdeeSScott Long 409b0a2fdeeSScott Long return (/*free_reply*/TRUE); 410b0a2fdeeSScott Long } 411b0a2fdeeSScott Long 412b0a2fdeeSScott Long static int 413b0a2fdeeSScott Long mpt_config_reply_handler(struct mpt_softc *mpt, request_t *req, 414b0a2fdeeSScott Long MSG_DEFAULT_REPLY *reply_frame) 415b0a2fdeeSScott Long { 416b0a2fdeeSScott Long if (req != NULL) { 417b0a2fdeeSScott Long 418b0a2fdeeSScott Long if (reply_frame != NULL) { 419b0a2fdeeSScott Long MSG_CONFIG *cfgp; 420b0a2fdeeSScott Long MSG_CONFIG_REPLY *reply; 421b0a2fdeeSScott Long 422b0a2fdeeSScott Long cfgp = (MSG_CONFIG *)req->req_vbuf; 423b0a2fdeeSScott Long reply = (MSG_CONFIG_REPLY *)reply_frame; 424b0a2fdeeSScott Long req->IOCStatus = le16toh(reply_frame->IOCStatus); 425b0a2fdeeSScott Long bcopy(&reply->Header, &cfgp->Header, 426b0a2fdeeSScott Long sizeof(cfgp->Header)); 427b0a2fdeeSScott Long } 428b0a2fdeeSScott Long req->state &= ~REQ_STATE_QUEUED; 429b0a2fdeeSScott Long req->state |= REQ_STATE_DONE; 430b0a2fdeeSScott Long TAILQ_REMOVE(&mpt->request_pending_list, req, links); 431b0a2fdeeSScott Long 432b0a2fdeeSScott Long if ((req->state & REQ_STATE_NEED_WAKEUP) != 0) 433b0a2fdeeSScott Long wakeup(req); 434b0a2fdeeSScott Long } 435b0a2fdeeSScott Long 436b0a2fdeeSScott Long return (/*free_reply*/TRUE); 437b0a2fdeeSScott Long } 438b0a2fdeeSScott Long 439b0a2fdeeSScott Long static int 440b0a2fdeeSScott Long mpt_handshake_reply_handler(struct mpt_softc *mpt, request_t *req, 441b0a2fdeeSScott Long MSG_DEFAULT_REPLY *reply_frame) 442b0a2fdeeSScott Long { 443b0a2fdeeSScott Long /* Nothing to be done. */ 444b0a2fdeeSScott Long return (/*free_reply*/TRUE); 445b0a2fdeeSScott Long } 446b0a2fdeeSScott Long 447b0a2fdeeSScott Long static int 448b0a2fdeeSScott Long mpt_event_reply_handler(struct mpt_softc *mpt, request_t *req, 449b0a2fdeeSScott Long MSG_DEFAULT_REPLY *reply_frame) 450b0a2fdeeSScott Long { 451b0a2fdeeSScott Long int free_reply; 452b0a2fdeeSScott Long 453b0a2fdeeSScott Long if (reply_frame == NULL) { 454b0a2fdeeSScott Long mpt_prt(mpt, "Event Handler: req %p - Unexpected NULL reply\n"); 455b0a2fdeeSScott Long return (/*free_reply*/TRUE); 456b0a2fdeeSScott Long } 457b0a2fdeeSScott Long 458b0a2fdeeSScott Long free_reply = TRUE; 459b0a2fdeeSScott Long switch (reply_frame->Function) { 460b0a2fdeeSScott Long case MPI_FUNCTION_EVENT_NOTIFICATION: 461b0a2fdeeSScott Long { 462b0a2fdeeSScott Long MSG_EVENT_NOTIFY_REPLY *msg; 463b0a2fdeeSScott Long struct mpt_personality *pers; 464b0a2fdeeSScott Long u_int handled; 465b0a2fdeeSScott Long 466b0a2fdeeSScott Long handled = 0; 467b0a2fdeeSScott Long msg = (MSG_EVENT_NOTIFY_REPLY *)reply_frame; 468b0a2fdeeSScott Long MPT_PERS_FOREACH(mpt, pers) 469b0a2fdeeSScott Long handled += pers->event(mpt, req, msg); 470b0a2fdeeSScott Long 471b0a2fdeeSScott Long if (handled == 0) 472b0a2fdeeSScott Long mpt_prt(mpt, 473b0a2fdeeSScott Long "Unhandled Event Notify Frame. Event %#x.\n", 474b0a2fdeeSScott Long msg->Event); 475b0a2fdeeSScott Long 476b0a2fdeeSScott Long if (msg->AckRequired) { 477b0a2fdeeSScott Long request_t *ack_req; 478b0a2fdeeSScott Long uint32_t context; 479b0a2fdeeSScott Long 480b0a2fdeeSScott Long context = htole32(req->index|MPT_REPLY_HANDLER_EVENTS); 481b0a2fdeeSScott Long ack_req = mpt_get_request(mpt, /*sleep_ok*/FALSE); 482b0a2fdeeSScott Long if (ack_req == NULL) { 483b0a2fdeeSScott Long struct mpt_evtf_record *evtf; 484b0a2fdeeSScott Long 485b0a2fdeeSScott Long evtf = (struct mpt_evtf_record *)reply_frame; 486b0a2fdeeSScott Long evtf->context = context; 487b0a2fdeeSScott Long LIST_INSERT_HEAD(&mpt->ack_frames, evtf, links); 488b0a2fdeeSScott Long free_reply = FALSE; 489b0a2fdeeSScott Long break; 490b0a2fdeeSScott Long } 491b0a2fdeeSScott Long mpt_send_event_ack(mpt, ack_req, msg, context); 492b0a2fdeeSScott Long } 493b0a2fdeeSScott Long break; 494b0a2fdeeSScott Long } 495b0a2fdeeSScott Long case MPI_FUNCTION_PORT_ENABLE: 496b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "enable port reply\n"); 497b0a2fdeeSScott Long break; 498b0a2fdeeSScott Long case MPI_FUNCTION_EVENT_ACK: 499b0a2fdeeSScott Long break; 500b0a2fdeeSScott Long default: 501b0a2fdeeSScott Long mpt_prt(mpt, "Unknown Event Function: %x\n", 502b0a2fdeeSScott Long reply_frame->Function); 503b0a2fdeeSScott Long break; 504b0a2fdeeSScott Long } 505b0a2fdeeSScott Long 506b0a2fdeeSScott Long if (req != NULL 507b0a2fdeeSScott Long && (reply_frame->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY) == 0) { 508b0a2fdeeSScott Long 509b0a2fdeeSScott Long req->state &= ~REQ_STATE_QUEUED; 510b0a2fdeeSScott Long req->state |= REQ_STATE_DONE; 511b0a2fdeeSScott Long TAILQ_REMOVE(&mpt->request_pending_list, req, links); 512b0a2fdeeSScott Long 513b0a2fdeeSScott Long if ((req->state & REQ_STATE_NEED_WAKEUP) != 0) 514b0a2fdeeSScott Long wakeup(req); 515b0a2fdeeSScott Long else 516b0a2fdeeSScott Long mpt_free_request(mpt, req); 517b0a2fdeeSScott Long } 518b0a2fdeeSScott Long return (free_reply); 519b0a2fdeeSScott Long } 520b0a2fdeeSScott Long 521b0a2fdeeSScott Long /* 522b0a2fdeeSScott Long * Process an asynchronous event from the IOC. 523b0a2fdeeSScott Long */ 524b0a2fdeeSScott Long static int 525b0a2fdeeSScott Long mpt_core_event(struct mpt_softc *mpt, request_t *req, 526b0a2fdeeSScott Long MSG_EVENT_NOTIFY_REPLY *msg) 527b0a2fdeeSScott Long { 528b0a2fdeeSScott Long switch(msg->Event & 0xFF) { 529b0a2fdeeSScott Long case MPI_EVENT_NONE: 530b0a2fdeeSScott Long break; 531b0a2fdeeSScott Long case MPI_EVENT_LOG_DATA: 532b0a2fdeeSScott Long { 533b0a2fdeeSScott Long int i; 534b0a2fdeeSScott Long 535b0a2fdeeSScott Long /* Some error occured that LSI wants logged */ 536b0a2fdeeSScott Long mpt_prt(mpt, "EvtLogData: IOCLogInfo: 0x%08x\n", 537b0a2fdeeSScott Long msg->IOCLogInfo); 538b0a2fdeeSScott Long mpt_prt(mpt, "\tEvtLogData: Event Data:"); 539b0a2fdeeSScott Long for (i = 0; i < msg->EventDataLength; i++) 540b0a2fdeeSScott Long mpt_prtc(mpt, " %08x", msg->Data[i]); 541b0a2fdeeSScott Long mpt_prtc(mpt, "\n"); 542b0a2fdeeSScott Long break; 543b0a2fdeeSScott Long } 544b0a2fdeeSScott Long case MPI_EVENT_EVENT_CHANGE: 545b0a2fdeeSScott Long /* 546b0a2fdeeSScott Long * This is just an acknowledgement 547b0a2fdeeSScott Long * of our mpt_send_event_request. 548b0a2fdeeSScott Long */ 549b0a2fdeeSScott Long break; 550b0a2fdeeSScott Long default: 551b0a2fdeeSScott Long return (/*handled*/0); 552b0a2fdeeSScott Long break; 553b0a2fdeeSScott Long } 554b0a2fdeeSScott Long return (/*handled*/1); 555b0a2fdeeSScott Long } 556b0a2fdeeSScott Long 557b0a2fdeeSScott Long static void 558b0a2fdeeSScott Long mpt_send_event_ack(struct mpt_softc *mpt, request_t *ack_req, 559b0a2fdeeSScott Long MSG_EVENT_NOTIFY_REPLY *msg, uint32_t context) 560b0a2fdeeSScott Long { 561b0a2fdeeSScott Long MSG_EVENT_ACK *ackp; 562b0a2fdeeSScott Long 563b0a2fdeeSScott Long ackp = (MSG_EVENT_ACK *)ack_req->req_vbuf; 564b0a2fdeeSScott Long bzero(ackp, sizeof *ackp); 565b0a2fdeeSScott Long ackp->Function = MPI_FUNCTION_EVENT_ACK; 566b0a2fdeeSScott Long ackp->Event = msg->Event; 567b0a2fdeeSScott Long ackp->EventContext = msg->EventContext; 568b0a2fdeeSScott Long ackp->MsgContext = context; 569b0a2fdeeSScott Long mpt_check_doorbell(mpt); 570b0a2fdeeSScott Long mpt_send_cmd(mpt, ack_req); 571b0a2fdeeSScott Long } 572b0a2fdeeSScott Long 573b0a2fdeeSScott Long /***************************** Interrupt Handling *****************************/ 574b0a2fdeeSScott Long void 575b0a2fdeeSScott Long mpt_intr(void *arg) 576b0a2fdeeSScott Long { 577b0a2fdeeSScott Long struct mpt_softc *mpt; 578b0a2fdeeSScott Long uint32_t reply_desc; 579b0a2fdeeSScott Long 580b0a2fdeeSScott Long mpt = (struct mpt_softc *)arg; 581b0a2fdeeSScott Long while ((reply_desc = mpt_pop_reply_queue(mpt)) != MPT_REPLY_EMPTY) { 582b0a2fdeeSScott Long request_t *req; 583b0a2fdeeSScott Long MSG_DEFAULT_REPLY *reply_frame; 584b0a2fdeeSScott Long uint32_t reply_baddr; 585b0a2fdeeSScott Long u_int cb_index; 586b0a2fdeeSScott Long u_int req_index; 587b0a2fdeeSScott Long int free_rf; 588b0a2fdeeSScott Long 589b0a2fdeeSScott Long req = NULL; 590b0a2fdeeSScott Long reply_frame = NULL; 591b0a2fdeeSScott Long reply_baddr = 0; 592b0a2fdeeSScott Long if ((reply_desc & MPI_ADDRESS_REPLY_A_BIT) != 0) { 593b0a2fdeeSScott Long u_int offset; 594b0a2fdeeSScott Long 595b0a2fdeeSScott Long /* 596b0a2fdeeSScott Long * Insure that the reply frame is coherent. 597b0a2fdeeSScott Long */ 598b0a2fdeeSScott Long reply_baddr = (reply_desc << 1); 599b0a2fdeeSScott Long offset = reply_baddr - (mpt->reply_phys & 0xFFFFFFFF); 600b0a2fdeeSScott Long bus_dmamap_sync_range(mpt->reply_dmat, mpt->reply_dmap, 601b0a2fdeeSScott Long offset, MPT_REPLY_SIZE, 602b0a2fdeeSScott Long BUS_DMASYNC_POSTREAD); 603b0a2fdeeSScott Long reply_frame = MPT_REPLY_OTOV(mpt, offset); 604b0a2fdeeSScott Long reply_desc = le32toh(reply_frame->MsgContext); 605b0a2fdeeSScott Long } 606b0a2fdeeSScott Long cb_index = MPT_CONTEXT_TO_CBI(reply_desc); 607b0a2fdeeSScott Long req_index = MPT_CONTEXT_TO_REQI(reply_desc); 608b0a2fdeeSScott Long if (req_index < MPT_MAX_REQUESTS(mpt)) 609b0a2fdeeSScott Long req = &mpt->request_pool[req_index]; 610b0a2fdeeSScott Long 611b0a2fdeeSScott Long free_rf = mpt_reply_handlers[cb_index](mpt, req, reply_frame); 612b0a2fdeeSScott Long 613b0a2fdeeSScott Long if (reply_frame != NULL && free_rf) 614b0a2fdeeSScott Long mpt_free_reply(mpt, reply_baddr); 615b0a2fdeeSScott Long } 616b0a2fdeeSScott Long } 617b0a2fdeeSScott Long 618b0a2fdeeSScott Long /******************************* Error Recovery *******************************/ 619b0a2fdeeSScott Long void 620b0a2fdeeSScott Long mpt_complete_request_chain(struct mpt_softc *mpt, struct req_queue *chain, 621b0a2fdeeSScott Long u_int iocstatus) 622b0a2fdeeSScott Long { 623b0a2fdeeSScott Long MSG_DEFAULT_REPLY ioc_status_frame; 624b0a2fdeeSScott Long request_t *req; 625b0a2fdeeSScott Long 626b0a2fdeeSScott Long bzero(&ioc_status_frame, sizeof(ioc_status_frame)); 627b0a2fdeeSScott Long ioc_status_frame.MsgLength = roundup2(sizeof(ioc_status_frame), 4); 628b0a2fdeeSScott Long ioc_status_frame.IOCStatus = iocstatus; 629b0a2fdeeSScott Long while((req = TAILQ_FIRST(chain)) != NULL) { 630b0a2fdeeSScott Long MSG_REQUEST_HEADER *msg_hdr; 631b0a2fdeeSScott Long u_int cb_index; 632b0a2fdeeSScott Long 633b0a2fdeeSScott Long msg_hdr = (MSG_REQUEST_HEADER *)req->req_vbuf; 634b0a2fdeeSScott Long ioc_status_frame.Function = msg_hdr->Function; 635b0a2fdeeSScott Long ioc_status_frame.MsgContext = msg_hdr->MsgContext; 636b0a2fdeeSScott Long cb_index = MPT_CONTEXT_TO_CBI(le32toh(msg_hdr->MsgContext)); 637b0a2fdeeSScott Long mpt_reply_handlers[cb_index](mpt, req, &ioc_status_frame); 638b0a2fdeeSScott Long } 639b0a2fdeeSScott Long } 640b0a2fdeeSScott Long 641b0a2fdeeSScott Long /********************************* Diagnostics ********************************/ 642b0a2fdeeSScott Long /* 643b0a2fdeeSScott Long * Perform a diagnostic dump of a reply frame. 644b0a2fdeeSScott Long */ 645b0a2fdeeSScott Long void 646b0a2fdeeSScott Long mpt_dump_reply_frame(struct mpt_softc *mpt, MSG_DEFAULT_REPLY *reply_frame) 647b0a2fdeeSScott Long { 648b0a2fdeeSScott Long 649b0a2fdeeSScott Long mpt_prt(mpt, "Address Reply:\n"); 650b0a2fdeeSScott Long mpt_print_reply(reply_frame); 651b0a2fdeeSScott Long } 652b0a2fdeeSScott Long 653b0a2fdeeSScott Long /******************************* Doorbell Access ******************************/ 654b0a2fdeeSScott Long static __inline uint32_t mpt_rd_db(struct mpt_softc *mpt); 655b0a2fdeeSScott Long static __inline uint32_t mpt_rd_intr(struct mpt_softc *mpt); 656b0a2fdeeSScott Long 657b0a2fdeeSScott Long static __inline uint32_t 658b0a2fdeeSScott Long mpt_rd_db(struct mpt_softc *mpt) 6599b631363SMatt Jacob { 6609b631363SMatt Jacob return mpt_read(mpt, MPT_OFFSET_DOORBELL); 6619b631363SMatt Jacob } 6629b631363SMatt Jacob 663b0a2fdeeSScott Long static __inline uint32_t 664b0a2fdeeSScott Long mpt_rd_intr(struct mpt_softc *mpt) 6659b631363SMatt Jacob { 6669b631363SMatt Jacob return mpt_read(mpt, MPT_OFFSET_INTR_STATUS); 6679b631363SMatt Jacob } 6689b631363SMatt Jacob 6699b631363SMatt Jacob /* Busy wait for a door bell to be read by IOC */ 6709b631363SMatt Jacob static int 671b0a2fdeeSScott Long mpt_wait_db_ack(struct mpt_softc *mpt) 6729b631363SMatt Jacob { 6739b631363SMatt Jacob int i; 6749b631363SMatt Jacob for (i=0; i < MPT_MAX_WAIT; i++) { 6759b631363SMatt Jacob if (!MPT_DB_IS_BUSY(mpt_rd_intr(mpt))) { 6769b631363SMatt Jacob maxwait_ack = i > maxwait_ack ? i : maxwait_ack; 6779b631363SMatt Jacob return MPT_OK; 6789b631363SMatt Jacob } 6799b631363SMatt Jacob 680b0a2fdeeSScott Long DELAY(1000); 6819b631363SMatt Jacob } 6829b631363SMatt Jacob return MPT_FAIL; 6839b631363SMatt Jacob } 6849b631363SMatt Jacob 6859b631363SMatt Jacob /* Busy wait for a door bell interrupt */ 6869b631363SMatt Jacob static int 687b0a2fdeeSScott Long mpt_wait_db_int(struct mpt_softc *mpt) 6889b631363SMatt Jacob { 6899b631363SMatt Jacob int i; 6909b631363SMatt Jacob for (i=0; i < MPT_MAX_WAIT; i++) { 6919b631363SMatt Jacob if (MPT_DB_INTR(mpt_rd_intr(mpt))) { 6929b631363SMatt Jacob maxwait_int = i > maxwait_int ? i : maxwait_int; 6939b631363SMatt Jacob return MPT_OK; 6949b631363SMatt Jacob } 6959b631363SMatt Jacob DELAY(100); 6969b631363SMatt Jacob } 6979b631363SMatt Jacob return MPT_FAIL; 6989b631363SMatt Jacob } 6999b631363SMatt Jacob 7009b631363SMatt Jacob /* Wait for IOC to transition to a give state */ 7019b631363SMatt Jacob void 702b0a2fdeeSScott Long mpt_check_doorbell(struct mpt_softc *mpt) 7039b631363SMatt Jacob { 704b0a2fdeeSScott Long uint32_t db = mpt_rd_db(mpt); 7059b631363SMatt Jacob if (MPT_STATE(db) != MPT_DB_STATE_RUNNING) { 706b0a2fdeeSScott Long mpt_prt(mpt, "Device not running\n"); 7079b631363SMatt Jacob mpt_print_db(db); 7089b631363SMatt Jacob } 7099b631363SMatt Jacob } 7109b631363SMatt Jacob 7119b631363SMatt Jacob /* Wait for IOC to transition to a give state */ 7129b631363SMatt Jacob static int 713b0a2fdeeSScott Long mpt_wait_state(struct mpt_softc *mpt, enum DB_STATE_BITS state) 7149b631363SMatt Jacob { 7159b631363SMatt Jacob int i; 7169b631363SMatt Jacob 7179b631363SMatt Jacob for (i = 0; i < MPT_MAX_WAIT; i++) { 718b0a2fdeeSScott Long uint32_t db = mpt_rd_db(mpt); 7199b631363SMatt Jacob if (MPT_STATE(db) == state) { 7209b631363SMatt Jacob maxwait_state = i > maxwait_state ? i : maxwait_state; 7219b631363SMatt Jacob return (MPT_OK); 7229b631363SMatt Jacob } 7239b631363SMatt Jacob DELAY(100); 7249b631363SMatt Jacob } 7259b631363SMatt Jacob return (MPT_FAIL); 7269b631363SMatt Jacob } 7279b631363SMatt Jacob 7289b631363SMatt Jacob 729b0a2fdeeSScott Long /************************* Intialization/Configuration ************************/ 730b0a2fdeeSScott Long static int mpt_download_fw(struct mpt_softc *mpt); 731b0a2fdeeSScott Long 7329b631363SMatt Jacob /* Issue the reset COMMAND to the IOC */ 733b0a2fdeeSScott Long static int 734b0a2fdeeSScott Long mpt_soft_reset(struct mpt_softc *mpt) 7359b631363SMatt Jacob { 736b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "soft reset\n"); 7379b631363SMatt Jacob 7389b631363SMatt Jacob /* Have to use hard reset if we are not in Running state */ 7399b631363SMatt Jacob if (MPT_STATE(mpt_rd_db(mpt)) != MPT_DB_STATE_RUNNING) { 740b0a2fdeeSScott Long mpt_prt(mpt, "soft reset failed: device not running\n"); 7419b631363SMatt Jacob return MPT_FAIL; 7429b631363SMatt Jacob } 7439b631363SMatt Jacob 7449b631363SMatt Jacob /* If door bell is in use we don't have a chance of getting 7459b631363SMatt Jacob * a word in since the IOC probably crashed in message 7469b631363SMatt Jacob * processing. So don't waste our time. 7479b631363SMatt Jacob */ 7489b631363SMatt Jacob if (MPT_DB_IS_IN_USE(mpt_rd_db(mpt))) { 749b0a2fdeeSScott Long mpt_prt(mpt, "soft reset failed: doorbell wedged\n"); 7509b631363SMatt Jacob return MPT_FAIL; 7519b631363SMatt Jacob } 7529b631363SMatt Jacob 7539b631363SMatt Jacob /* Send the reset request to the IOC */ 7549b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_DOORBELL, 7559b631363SMatt Jacob MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET << MPI_DOORBELL_FUNCTION_SHIFT); 7569b631363SMatt Jacob if (mpt_wait_db_ack(mpt) != MPT_OK) { 757b0a2fdeeSScott Long mpt_prt(mpt, "soft reset failed: ack timeout\n"); 7589b631363SMatt Jacob return MPT_FAIL; 7599b631363SMatt Jacob } 7609b631363SMatt Jacob 7619b631363SMatt Jacob /* Wait for the IOC to reload and come out of reset state */ 7629b631363SMatt Jacob if (mpt_wait_state(mpt, MPT_DB_STATE_READY) != MPT_OK) { 763b0a2fdeeSScott Long mpt_prt(mpt, "soft reset failed: device did not restart\n"); 7649b631363SMatt Jacob return MPT_FAIL; 7659b631363SMatt Jacob } 7669b631363SMatt Jacob 7679b631363SMatt Jacob return MPT_OK; 7689b631363SMatt Jacob } 7699b631363SMatt Jacob 770b0a2fdeeSScott Long static int 771b0a2fdeeSScott Long mpt_enable_diag_mode(struct mpt_softc *mpt) 772b0a2fdeeSScott Long { 773b0a2fdeeSScott Long int try; 774b0a2fdeeSScott Long 775b0a2fdeeSScott Long try = 20; 776b0a2fdeeSScott Long while (--try) { 777b0a2fdeeSScott Long 778b0a2fdeeSScott Long if ((mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC) & MPI_DIAG_DRWE) != 0) 779b0a2fdeeSScott Long break; 780b0a2fdeeSScott Long 781b0a2fdeeSScott Long /* Enable diagnostic registers */ 782b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, 0xFF); 783b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_1ST_KEY_VALUE); 784b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_2ND_KEY_VALUE); 785b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_3RD_KEY_VALUE); 786b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_4TH_KEY_VALUE); 787b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_5TH_KEY_VALUE); 788b0a2fdeeSScott Long 789b0a2fdeeSScott Long DELAY(100000); 790b0a2fdeeSScott Long } 791b0a2fdeeSScott Long if (try == 0) 792b0a2fdeeSScott Long return (EIO); 793b0a2fdeeSScott Long return (0); 794b0a2fdeeSScott Long } 795b0a2fdeeSScott Long 796b0a2fdeeSScott Long static void 797b0a2fdeeSScott Long mpt_disable_diag_mode(struct mpt_softc *mpt) 798b0a2fdeeSScott Long { 799b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, 0xFFFFFFFF); 800b0a2fdeeSScott Long } 801b0a2fdeeSScott Long 8029b631363SMatt Jacob /* This is a magic diagnostic reset that resets all the ARM 8039b631363SMatt Jacob * processors in the chip. 8049b631363SMatt Jacob */ 805b0a2fdeeSScott Long static void 806b0a2fdeeSScott Long mpt_hard_reset(struct mpt_softc *mpt) 8079b631363SMatt Jacob { 808b0a2fdeeSScott Long int error; 809b0a2fdeeSScott Long int wait; 810b0a2fdeeSScott Long uint32_t diagreg; 8119b631363SMatt Jacob 812b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "hard reset\n"); 813b0a2fdeeSScott Long 814b0a2fdeeSScott Long error = mpt_enable_diag_mode(mpt); 815b0a2fdeeSScott Long if (error) { 816b0a2fdeeSScott Long mpt_prt(mpt, "WARNING - Could not enter diagnostic mode !\n"); 817b0a2fdeeSScott Long mpt_prt(mpt, "Trying to reset anyway.\n"); 818b0a2fdeeSScott Long } 819b0a2fdeeSScott Long 820b0a2fdeeSScott Long diagreg = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 821b0a2fdeeSScott Long 822b0a2fdeeSScott Long /* 823b0a2fdeeSScott Long * This appears to be a workaround required for some 824b0a2fdeeSScott Long * firmware or hardware revs. 825b0a2fdeeSScott Long */ 826b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, diagreg | MPI_DIAG_DISABLE_ARM); 827b0a2fdeeSScott Long DELAY(1000); 8289b631363SMatt Jacob 8299b631363SMatt Jacob /* Diag. port is now active so we can now hit the reset bit */ 830b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, diagreg | MPI_DIAG_RESET_ADAPTER); 8319b631363SMatt Jacob 832b0a2fdeeSScott Long /* 833b0a2fdeeSScott Long * Ensure that the reset has finished. We delay 1ms 834b0a2fdeeSScott Long * prior to reading the register to make sure the chip 835b0a2fdeeSScott Long * has sufficiently completed its reset to handle register 836b0a2fdeeSScott Long * accesses. 837b0a2fdeeSScott Long */ 838b0a2fdeeSScott Long wait = 5000; 839b0a2fdeeSScott Long do { 840b0a2fdeeSScott Long DELAY(1000); 841b0a2fdeeSScott Long diagreg = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 842b0a2fdeeSScott Long } while (--wait && (diagreg & MPI_DIAG_RESET_ADAPTER) == 0); 8439b631363SMatt Jacob 844b0a2fdeeSScott Long if (wait == 0) { 845b0a2fdeeSScott Long mpt_prt(mpt, "WARNING - Failed hard reset! " 846b0a2fdeeSScott Long "Trying to initialize anyway.\n"); 8479b631363SMatt Jacob } 8489b631363SMatt Jacob 849b0a2fdeeSScott Long /* 850b0a2fdeeSScott Long * If we have firmware to download, it must be loaded before 851b0a2fdeeSScott Long * the controller will become operational. Do so now. 852b0a2fdeeSScott Long */ 853b0a2fdeeSScott Long if (mpt->fw_image != NULL) { 854b0a2fdeeSScott Long 855b0a2fdeeSScott Long error = mpt_download_fw(mpt); 856b0a2fdeeSScott Long 857b0a2fdeeSScott Long if (error) { 858b0a2fdeeSScott Long mpt_prt(mpt, "WARNING - Firmware Download Failed!\n"); 859b0a2fdeeSScott Long mpt_prt(mpt, "Trying to initialize anyway.\n"); 8609b631363SMatt Jacob } 861b0a2fdeeSScott Long } 862b0a2fdeeSScott Long 863b0a2fdeeSScott Long /* 864b0a2fdeeSScott Long * Reseting the controller should have disabled write 865b0a2fdeeSScott Long * access to the diagnostic registers, but disable 866b0a2fdeeSScott Long * manually to be sure. 867b0a2fdeeSScott Long */ 868b0a2fdeeSScott Long mpt_disable_diag_mode(mpt); 869b0a2fdeeSScott Long } 870b0a2fdeeSScott Long 871b0a2fdeeSScott Long static void 872b0a2fdeeSScott Long mpt_core_ioc_reset(struct mpt_softc *mpt, int type) 873b0a2fdeeSScott Long { 874b0a2fdeeSScott Long /* 875b0a2fdeeSScott Long * Complete all pending requests with a status 876b0a2fdeeSScott Long * appropriate for an IOC reset. 877b0a2fdeeSScott Long */ 878b0a2fdeeSScott Long mpt_complete_request_chain(mpt, &mpt->request_pending_list, 879b0a2fdeeSScott Long MPI_IOCSTATUS_INVALID_STATE); 880b0a2fdeeSScott Long } 881b0a2fdeeSScott Long 8829b631363SMatt Jacob 8839b631363SMatt Jacob /* 8849b631363SMatt Jacob * Reset the IOC when needed. Try software command first then if needed 8859b631363SMatt Jacob * poke at the magic diagnostic reset. Note that a hard reset resets 8869b631363SMatt Jacob * *both* IOCs on dual function chips (FC929 && LSI1030) as well as 8879b631363SMatt Jacob * fouls up the PCI configuration registers. 8889b631363SMatt Jacob */ 8899b631363SMatt Jacob int 890b0a2fdeeSScott Long mpt_reset(struct mpt_softc *mpt, int reinit) 8919b631363SMatt Jacob { 892b0a2fdeeSScott Long struct mpt_personality *pers; 8939b631363SMatt Jacob int ret; 8949b631363SMatt Jacob 8959b631363SMatt Jacob /* Try a soft reset */ 8969b631363SMatt Jacob if ((ret = mpt_soft_reset(mpt)) != MPT_OK) { 8979b631363SMatt Jacob /* Failed; do a hard reset */ 8989b631363SMatt Jacob mpt_hard_reset(mpt); 8999b631363SMatt Jacob 9009b631363SMatt Jacob /* Wait for the IOC to reload and come out of reset state */ 9019b631363SMatt Jacob ret = mpt_wait_state(mpt, MPT_DB_STATE_READY); 902b0a2fdeeSScott Long if (ret != MPT_OK) 903b0a2fdeeSScott Long mpt_prt(mpt, "failed to reset device\n"); 9049b631363SMatt Jacob } 905b0a2fdeeSScott Long 906b0a2fdeeSScott Long /* 907b0a2fdeeSScott Long * Invoke reset handlers. We bump the reset count so 908b0a2fdeeSScott Long * that mpt_wait_req() understands that regardless of 909b0a2fdeeSScott Long * the specified wait condition, it should stop its wait. 910b0a2fdeeSScott Long */ 911b0a2fdeeSScott Long mpt->reset_cnt++; 912b0a2fdeeSScott Long MPT_PERS_FOREACH(mpt, pers) 913b0a2fdeeSScott Long pers->reset(mpt, ret); 914b0a2fdeeSScott Long 915b0a2fdeeSScott Long if (reinit != 0) 916b0a2fdeeSScott Long mpt_enable_ioc(mpt); 9179b631363SMatt Jacob 9189b631363SMatt Jacob return ret; 9199b631363SMatt Jacob } 9209b631363SMatt Jacob 9219b631363SMatt Jacob /* Return a command buffer to the free queue */ 9229b631363SMatt Jacob void 923b0a2fdeeSScott Long mpt_free_request(struct mpt_softc *mpt, request_t *req) 9249b631363SMatt Jacob { 925b0a2fdeeSScott Long struct mpt_evtf_record *record; 926b0a2fdeeSScott Long uint32_t reply_baddr; 927b0a2fdeeSScott Long 9287dec90bcSMatt Jacob if (req == NULL || req != &mpt->request_pool[req->index]) { 9299b631363SMatt Jacob panic("mpt_free_request bad req ptr\n"); 9309b631363SMatt Jacob return; 9319b631363SMatt Jacob } 9329b631363SMatt Jacob req->ccb = NULL; 933b0a2fdeeSScott Long req->state = REQ_STATE_FREE; 934b0a2fdeeSScott Long if (LIST_EMPTY(&mpt->ack_frames)) { 935b0a2fdeeSScott Long TAILQ_INSERT_HEAD(&mpt->request_free_list, req, links); 936b0a2fdeeSScott Long if (mpt->getreqwaiter != 0) { 937b0a2fdeeSScott Long mpt->getreqwaiter = 0; 938b0a2fdeeSScott Long wakeup(&mpt->request_free_list); 939b0a2fdeeSScott Long } 940b0a2fdeeSScott Long return; 941b0a2fdeeSScott Long } 942b0a2fdeeSScott Long 943b0a2fdeeSScott Long /* 944b0a2fdeeSScott Long * Process an ack frame deferred due to resource shortage. 945b0a2fdeeSScott Long */ 946b0a2fdeeSScott Long record = LIST_FIRST(&mpt->ack_frames); 947b0a2fdeeSScott Long LIST_REMOVE(record, links); 948b0a2fdeeSScott Long mpt_send_event_ack(mpt, req, &record->reply, record->context); 949b0a2fdeeSScott Long reply_baddr = (uint32_t)((uint8_t *)record - mpt->reply) 950b0a2fdeeSScott Long + (mpt->reply_phys & 0xFFFFFFFF); 951b0a2fdeeSScott Long mpt_free_reply(mpt, reply_baddr); 9529b631363SMatt Jacob } 9539b631363SMatt Jacob 9549b631363SMatt Jacob /* Get a command buffer from the free queue */ 9559b631363SMatt Jacob request_t * 956b0a2fdeeSScott Long mpt_get_request(struct mpt_softc *mpt, int sleep_ok) 9579b631363SMatt Jacob { 9589b631363SMatt Jacob request_t *req; 959b0a2fdeeSScott Long 960b0a2fdeeSScott Long retry: 961b0a2fdeeSScott Long req = TAILQ_FIRST(&mpt->request_free_list); 9629b631363SMatt Jacob if (req != NULL) { 963b0a2fdeeSScott Long KASSERT(req == &mpt->request_pool[req->index], 964b0a2fdeeSScott Long ("mpt_get_request: corrupted request free list\n")); 965b0a2fdeeSScott Long TAILQ_REMOVE(&mpt->request_free_list, req, links); 966b0a2fdeeSScott Long req->state = REQ_STATE_ALLOCATED; 967b0a2fdeeSScott Long } else if (sleep_ok != 0) { 968b0a2fdeeSScott Long mpt->getreqwaiter = 1; 969b0a2fdeeSScott Long mpt_sleep(mpt, &mpt->request_free_list, PUSER, "mptgreq", 0); 970b0a2fdeeSScott Long goto retry; 9719b631363SMatt Jacob } 9729b631363SMatt Jacob return req; 9739b631363SMatt Jacob } 9749b631363SMatt Jacob 9759b631363SMatt Jacob /* Pass the command to the IOC */ 9769b631363SMatt Jacob void 977b0a2fdeeSScott Long mpt_send_cmd(struct mpt_softc *mpt, request_t *req) 9789b631363SMatt Jacob { 979b0a2fdeeSScott Long uint32_t *pReq; 980b0a2fdeeSScott Long 9819b631363SMatt Jacob pReq = req->req_vbuf; 982b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_TRACE, "Send Request %d (0x%x):\n", 983301472c2SMatt Jacob req->index, req->req_pbuf); 984b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_TRACE, "%08x %08x %08x %08x\n", 9859b631363SMatt Jacob pReq[0], pReq[1], pReq[2], pReq[3]); 986b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_TRACE, "%08x %08x %08x %08x\n", 9879b631363SMatt Jacob pReq[4], pReq[5], pReq[6], pReq[7]); 988b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_TRACE, "%08x %08x %08x %08x\n", 9899b631363SMatt Jacob pReq[8], pReq[9], pReq[10], pReq[11]); 990b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_TRACE, "%08x %08x %08x %08x\n", 9919b631363SMatt Jacob pReq[12], pReq[13], pReq[14], pReq[15]); 992b0a2fdeeSScott Long 9939b631363SMatt Jacob bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap, 9949b631363SMatt Jacob BUS_DMASYNC_PREWRITE); 995b0a2fdeeSScott Long req->state |= REQ_STATE_QUEUED; 996b0a2fdeeSScott Long TAILQ_INSERT_HEAD(&mpt->request_pending_list, req, links); 997b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_REQUEST_Q, (uint32_t) req->req_pbuf); 9989b631363SMatt Jacob } 9999b631363SMatt Jacob 10009b631363SMatt Jacob /* 1001b0a2fdeeSScott Long * Wait for a request to complete. 1002b0a2fdeeSScott Long * 1003b0a2fdeeSScott Long * Inputs: 1004b0a2fdeeSScott Long * mpt softc of controller executing request 1005b0a2fdeeSScott Long * req request to wait for 1006b0a2fdeeSScott Long * sleep_ok nonzero implies may sleep in this context 1007b0a2fdeeSScott Long * time_ms timeout in ms. 0 implies no timeout. 1008b0a2fdeeSScott Long * 1009b0a2fdeeSScott Long * Return Values: 1010b0a2fdeeSScott Long * 0 Request completed 1011b0a2fdeeSScott Long * non-0 Timeout fired before request completion. 10129b631363SMatt Jacob */ 1013b0a2fdeeSScott Long int 1014b0a2fdeeSScott Long mpt_wait_req(struct mpt_softc *mpt, request_t *req, 1015b0a2fdeeSScott Long mpt_req_state_t state, mpt_req_state_t mask, 1016b0a2fdeeSScott Long int sleep_ok, int time_ms) 10179b631363SMatt Jacob { 1018b0a2fdeeSScott Long int error; 1019b0a2fdeeSScott Long int timeout; 1020b0a2fdeeSScott Long u_int saved_cnt; 10219b631363SMatt Jacob 1022b0a2fdeeSScott Long /* 1023b0a2fdeeSScott Long * timeout is in ms. 0 indicates infinite wait. 1024b0a2fdeeSScott Long * Convert to ticks or 500us units depending on 1025b0a2fdeeSScott Long * our sleep mode. 1026b0a2fdeeSScott Long */ 1027b0a2fdeeSScott Long if (sleep_ok != 0) 1028b0a2fdeeSScott Long timeout = (time_ms * hz) / 1000; 1029b0a2fdeeSScott Long else 1030b0a2fdeeSScott Long timeout = time_ms * 2; 1031b0a2fdeeSScott Long saved_cnt = mpt->reset_cnt; 1032b0a2fdeeSScott Long req->state |= REQ_STATE_NEED_WAKEUP; 1033b0a2fdeeSScott Long mask &= ~REQ_STATE_NEED_WAKEUP; 1034b0a2fdeeSScott Long while ((req->state & mask) != state 1035b0a2fdeeSScott Long && mpt->reset_cnt == saved_cnt) { 1036b0a2fdeeSScott Long 1037b0a2fdeeSScott Long if (sleep_ok != 0) { 1038b0a2fdeeSScott Long error = mpt_sleep(mpt, req, PUSER, "mptreq", timeout); 1039b0a2fdeeSScott Long if (error == EWOULDBLOCK) { 1040b0a2fdeeSScott Long timeout = 0; 1041b0a2fdeeSScott Long break; 1042b0a2fdeeSScott Long } 1043b0a2fdeeSScott Long } else { 1044b0a2fdeeSScott Long if (time_ms != 0 && --timeout == 0) { 1045b0a2fdeeSScott Long mpt_prt(mpt, "mpt_wait_req timed out\n"); 1046b0a2fdeeSScott Long break; 1047b0a2fdeeSScott Long } 1048b0a2fdeeSScott Long DELAY(500); 1049b0a2fdeeSScott Long mpt_intr(mpt); 1050b0a2fdeeSScott Long } 1051b0a2fdeeSScott Long } 1052b0a2fdeeSScott Long req->state &= ~REQ_STATE_NEED_WAKEUP; 1053b0a2fdeeSScott Long if (mpt->reset_cnt != saved_cnt) 1054b0a2fdeeSScott Long return (EIO); 1055b0a2fdeeSScott Long if (time_ms && timeout == 0) 1056b0a2fdeeSScott Long return (ETIMEDOUT); 1057b0a2fdeeSScott Long return (0); 10589b631363SMatt Jacob } 10599b631363SMatt Jacob 10609b631363SMatt Jacob /* 10619b631363SMatt Jacob * Send a command to the IOC via the handshake register. 10629b631363SMatt Jacob * 10639b631363SMatt Jacob * Only done at initialization time and for certain unusual 10649b631363SMatt Jacob * commands such as device/bus reset as specified by LSI. 10659b631363SMatt Jacob */ 10669b631363SMatt Jacob int 1067b0a2fdeeSScott Long mpt_send_handshake_cmd(struct mpt_softc *mpt, size_t len, void *cmd) 10689b631363SMatt Jacob { 10699b631363SMatt Jacob int i; 1070b0a2fdeeSScott Long uint32_t data, *data32; 10719b631363SMatt Jacob 10729b631363SMatt Jacob /* Check condition of the IOC */ 10739b631363SMatt Jacob data = mpt_rd_db(mpt); 1074b0a2fdeeSScott Long if ((MPT_STATE(data) != MPT_DB_STATE_READY 1075b0a2fdeeSScott Long && MPT_STATE(data) != MPT_DB_STATE_RUNNING 1076b0a2fdeeSScott Long && MPT_STATE(data) != MPT_DB_STATE_FAULT) 1077b0a2fdeeSScott Long || MPT_DB_IS_IN_USE(data)) { 1078b0a2fdeeSScott Long mpt_prt(mpt, "handshake aborted - invalid doorbell state\n"); 10799b631363SMatt Jacob mpt_print_db(data); 10809b631363SMatt Jacob return (EBUSY); 10819b631363SMatt Jacob } 10829b631363SMatt Jacob 10839b631363SMatt Jacob /* We move things in 32 bit chunks */ 10849b631363SMatt Jacob len = (len + 3) >> 2; 10859b631363SMatt Jacob data32 = cmd; 10869b631363SMatt Jacob 10879b631363SMatt Jacob /* Clear any left over pending doorbell interupts */ 10889b631363SMatt Jacob if (MPT_DB_INTR(mpt_rd_intr(mpt))) 10899b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 10909b631363SMatt Jacob 10919b631363SMatt Jacob /* 10929b631363SMatt Jacob * Tell the handshake reg. we are going to send a command 10939b631363SMatt Jacob * and how long it is going to be. 10949b631363SMatt Jacob */ 10959b631363SMatt Jacob data = (MPI_FUNCTION_HANDSHAKE << MPI_DOORBELL_FUNCTION_SHIFT) | 10969b631363SMatt Jacob (len << MPI_DOORBELL_ADD_DWORDS_SHIFT); 10979b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_DOORBELL, data); 10989b631363SMatt Jacob 10999b631363SMatt Jacob /* Wait for the chip to notice */ 11009b631363SMatt Jacob if (mpt_wait_db_int(mpt) != MPT_OK) { 1101b0a2fdeeSScott Long mpt_prt(mpt, "mpt_send_handshake_cmd timeout1\n"); 1102b0a2fdeeSScott Long return (ETIMEDOUT); 11039b631363SMatt Jacob } 11049b631363SMatt Jacob 11059b631363SMatt Jacob /* Clear the interrupt */ 11069b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 11079b631363SMatt Jacob 11089b631363SMatt Jacob if (mpt_wait_db_ack(mpt) != MPT_OK) { 1109b0a2fdeeSScott Long mpt_prt(mpt, "mpt_send_handshake_cmd timeout2\n"); 1110b0a2fdeeSScott Long return (ETIMEDOUT); 11119b631363SMatt Jacob } 11129b631363SMatt Jacob 11139b631363SMatt Jacob /* Send the command */ 11149b631363SMatt Jacob for (i = 0; i < len; i++) { 11159b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_DOORBELL, *data32++); 11169b631363SMatt Jacob if (mpt_wait_db_ack(mpt) != MPT_OK) { 1117301472c2SMatt Jacob mpt_prt(mpt, 1118b0a2fdeeSScott Long "mpt_send_handshake_cmd timeout! index = %d\n", 1119b0a2fdeeSScott Long i); 1120b0a2fdeeSScott Long return (ETIMEDOUT); 11219b631363SMatt Jacob } 11229b631363SMatt Jacob } 11239b631363SMatt Jacob return MPT_OK; 11249b631363SMatt Jacob } 11259b631363SMatt Jacob 11269b631363SMatt Jacob /* Get the response from the handshake register */ 11279b631363SMatt Jacob int 1128b0a2fdeeSScott Long mpt_recv_handshake_reply(struct mpt_softc *mpt, size_t reply_len, void *reply) 11299b631363SMatt Jacob { 11309b631363SMatt Jacob int left, reply_left; 11319b631363SMatt Jacob u_int16_t *data16; 11329b631363SMatt Jacob MSG_DEFAULT_REPLY *hdr; 11339b631363SMatt Jacob 11349b631363SMatt Jacob /* We move things out in 16 bit chunks */ 11359b631363SMatt Jacob reply_len >>= 1; 11369b631363SMatt Jacob data16 = (u_int16_t *)reply; 11379b631363SMatt Jacob 11389b631363SMatt Jacob hdr = (MSG_DEFAULT_REPLY *)reply; 11399b631363SMatt Jacob 11409b631363SMatt Jacob /* Get first word */ 11419b631363SMatt Jacob if (mpt_wait_db_int(mpt) != MPT_OK) { 1142b0a2fdeeSScott Long mpt_prt(mpt, "mpt_recv_handshake_cmd timeout1\n"); 11439b631363SMatt Jacob return ETIMEDOUT; 11449b631363SMatt Jacob } 11459b631363SMatt Jacob *data16++ = mpt_read(mpt, MPT_OFFSET_DOORBELL) & MPT_DB_DATA_MASK; 11469b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 11479b631363SMatt Jacob 11489b631363SMatt Jacob /* Get Second Word */ 11499b631363SMatt Jacob if (mpt_wait_db_int(mpt) != MPT_OK) { 1150b0a2fdeeSScott Long mpt_prt(mpt, "mpt_recv_handshake_cmd timeout2\n"); 11519b631363SMatt Jacob return ETIMEDOUT; 11529b631363SMatt Jacob } 11539b631363SMatt Jacob *data16++ = mpt_read(mpt, MPT_OFFSET_DOORBELL) & MPT_DB_DATA_MASK; 11549b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 11559b631363SMatt Jacob 11569b631363SMatt Jacob /* With the second word, we can now look at the length */ 1157b0a2fdeeSScott Long if (((reply_len >> 1) != hdr->MsgLength)) { 1158301472c2SMatt Jacob mpt_prt(mpt, "reply length does not match message length: " 1159b0a2fdeeSScott Long "got 0x%02x, expected 0x%02x\n", 1160301472c2SMatt Jacob hdr->MsgLength << 2, reply_len << 1); 11619b631363SMatt Jacob } 11629b631363SMatt Jacob 11639b631363SMatt Jacob /* Get rest of the reply; but don't overflow the provided buffer */ 11649b631363SMatt Jacob left = (hdr->MsgLength << 1) - 2; 11659b631363SMatt Jacob reply_left = reply_len - 2; 11669b631363SMatt Jacob while (left--) { 11679b631363SMatt Jacob u_int16_t datum; 11689b631363SMatt Jacob 11699b631363SMatt Jacob if (mpt_wait_db_int(mpt) != MPT_OK) { 1170b0a2fdeeSScott Long mpt_prt(mpt, "mpt_recv_handshake_cmd timeout3\n"); 11719b631363SMatt Jacob return ETIMEDOUT; 11729b631363SMatt Jacob } 11739b631363SMatt Jacob datum = mpt_read(mpt, MPT_OFFSET_DOORBELL); 11749b631363SMatt Jacob 11759b631363SMatt Jacob if (reply_left-- > 0) 11769b631363SMatt Jacob *data16++ = datum & MPT_DB_DATA_MASK; 11779b631363SMatt Jacob 11789b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 11799b631363SMatt Jacob } 11809b631363SMatt Jacob 11819b631363SMatt Jacob /* One more wait & clear at the end */ 11829b631363SMatt Jacob if (mpt_wait_db_int(mpt) != MPT_OK) { 1183b0a2fdeeSScott Long mpt_prt(mpt, "mpt_recv_handshake_cmd timeout4\n"); 11849b631363SMatt Jacob return ETIMEDOUT; 11859b631363SMatt Jacob } 11869b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 11879b631363SMatt Jacob 11889b631363SMatt Jacob if ((hdr->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1189b0a2fdeeSScott Long if (mpt->verbose >= MPT_PRT_TRACE) 11909b631363SMatt Jacob mpt_print_reply(hdr); 11919b631363SMatt Jacob return (MPT_FAIL | hdr->IOCStatus); 11929b631363SMatt Jacob } 11939b631363SMatt Jacob 11949b631363SMatt Jacob return (0); 11959b631363SMatt Jacob } 11969b631363SMatt Jacob 11979b631363SMatt Jacob static int 1198b0a2fdeeSScott Long mpt_get_iocfacts(struct mpt_softc *mpt, MSG_IOC_FACTS_REPLY *freplp) 11999b631363SMatt Jacob { 12009b631363SMatt Jacob MSG_IOC_FACTS f_req; 12019b631363SMatt Jacob int error; 12029b631363SMatt Jacob 12039b631363SMatt Jacob bzero(&f_req, sizeof f_req); 12049b631363SMatt Jacob f_req.Function = MPI_FUNCTION_IOC_FACTS; 1205b0a2fdeeSScott Long f_req.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 12069b631363SMatt Jacob error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req); 12079b631363SMatt Jacob if (error) 12089b631363SMatt Jacob return(error); 12099b631363SMatt Jacob error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp); 12109b631363SMatt Jacob return (error); 12119b631363SMatt Jacob } 12129b631363SMatt Jacob 12137104aeefSMatt Jacob static int 1214b0a2fdeeSScott Long mpt_get_portfacts(struct mpt_softc *mpt, MSG_PORT_FACTS_REPLY *freplp) 12157104aeefSMatt Jacob { 12167104aeefSMatt Jacob MSG_PORT_FACTS f_req; 12177104aeefSMatt Jacob int error; 12187104aeefSMatt Jacob 12197104aeefSMatt Jacob /* XXX: Only getting PORT FACTS for Port 0 */ 1220b0a2fdeeSScott Long memset(&f_req, 0, sizeof f_req); 12217104aeefSMatt Jacob f_req.Function = MPI_FUNCTION_PORT_FACTS; 1222b0a2fdeeSScott Long f_req.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 12237104aeefSMatt Jacob error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req); 12247104aeefSMatt Jacob if (error) 12257104aeefSMatt Jacob return(error); 12267104aeefSMatt Jacob error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp); 12277104aeefSMatt Jacob return (error); 12287104aeefSMatt Jacob } 12297104aeefSMatt Jacob 12309b631363SMatt Jacob /* 12319b631363SMatt Jacob * Send the initialization request. This is where we specify how many 12329b631363SMatt Jacob * SCSI busses and how many devices per bus we wish to emulate. 12339b631363SMatt Jacob * This is also the command that specifies the max size of the reply 12349b631363SMatt Jacob * frames from the IOC that we will be allocating. 12359b631363SMatt Jacob */ 12369b631363SMatt Jacob static int 1237b0a2fdeeSScott Long mpt_send_ioc_init(struct mpt_softc *mpt, uint32_t who) 12389b631363SMatt Jacob { 12399b631363SMatt Jacob int error = 0; 12409b631363SMatt Jacob MSG_IOC_INIT init; 12419b631363SMatt Jacob MSG_IOC_INIT_REPLY reply; 12429b631363SMatt Jacob 12439b631363SMatt Jacob bzero(&init, sizeof init); 12449b631363SMatt Jacob init.WhoInit = who; 12459b631363SMatt Jacob init.Function = MPI_FUNCTION_IOC_INIT; 12469b631363SMatt Jacob if (mpt->is_fc) { 12479b631363SMatt Jacob init.MaxDevices = 255; 12489b631363SMatt Jacob } else { 12499b631363SMatt Jacob init.MaxDevices = 16; 12509b631363SMatt Jacob } 12519b631363SMatt Jacob init.MaxBuses = 1; 12529b631363SMatt Jacob init.ReplyFrameSize = MPT_REPLY_SIZE; 1253b0a2fdeeSScott Long init.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 12549b631363SMatt Jacob 12559b631363SMatt Jacob if ((error = mpt_send_handshake_cmd(mpt, sizeof init, &init)) != 0) { 12569b631363SMatt Jacob return(error); 12579b631363SMatt Jacob } 12589b631363SMatt Jacob 12599b631363SMatt Jacob error = mpt_recv_handshake_reply(mpt, sizeof reply, &reply); 12609b631363SMatt Jacob return (error); 12619b631363SMatt Jacob } 12629b631363SMatt Jacob 12637104aeefSMatt Jacob 12647104aeefSMatt Jacob /* 12657104aeefSMatt Jacob * Utiltity routine to read configuration headers and pages 12667104aeefSMatt Jacob */ 1267b0a2fdeeSScott Long int 1268b0a2fdeeSScott Long mpt_issue_cfg_req(struct mpt_softc *mpt, request_t *req, u_int Action, 1269b0a2fdeeSScott Long u_int PageVersion, u_int PageLength, u_int PageNumber, 1270b0a2fdeeSScott Long u_int PageType, uint32_t PageAddress, bus_addr_t addr, 1271b0a2fdeeSScott Long bus_size_t len, int sleep_ok, int timeout_ms) 12727104aeefSMatt Jacob { 12737104aeefSMatt Jacob MSG_CONFIG *cfgp; 1274b0a2fdeeSScott Long SGE_SIMPLE32 *se; 12757104aeefSMatt Jacob 12767104aeefSMatt Jacob cfgp = req->req_vbuf; 1277b0a2fdeeSScott Long memset(cfgp, 0, sizeof *cfgp); 1278b0a2fdeeSScott Long cfgp->Action = Action; 12797104aeefSMatt Jacob cfgp->Function = MPI_FUNCTION_CONFIG; 1280b0a2fdeeSScott Long cfgp->Header.PageVersion = PageVersion; 1281b0a2fdeeSScott Long cfgp->Header.PageLength = PageLength; 1282b0a2fdeeSScott Long cfgp->Header.PageNumber = PageNumber; 1283b0a2fdeeSScott Long cfgp->Header.PageType = PageType; 12847104aeefSMatt Jacob cfgp->PageAddress = PageAddress; 1285b0a2fdeeSScott Long se = (SGE_SIMPLE32 *)&cfgp->PageBufferSGE; 1286b0a2fdeeSScott Long se->Address = addr; 1287b0a2fdeeSScott Long MPI_pSGE_SET_LENGTH(se, len); 1288b0a2fdeeSScott Long MPI_pSGE_SET_FLAGS(se, (MPI_SGE_FLAGS_SIMPLE_ELEMENT | 1289b0a2fdeeSScott Long MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER | 1290b0a2fdeeSScott Long MPI_SGE_FLAGS_END_OF_LIST | 1291b0a2fdeeSScott Long ((Action == MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT 1292b0a2fdeeSScott Long || Action == MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM) 1293b0a2fdeeSScott Long ? MPI_SGE_FLAGS_HOST_TO_IOC : MPI_SGE_FLAGS_IOC_TO_HOST))); 1294b0a2fdeeSScott Long cfgp->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_CONFIG); 12957104aeefSMatt Jacob 12967104aeefSMatt Jacob mpt_check_doorbell(mpt); 12977104aeefSMatt Jacob mpt_send_cmd(mpt, req); 1298b0a2fdeeSScott Long return (mpt_wait_req(mpt, req, REQ_STATE_DONE, REQ_STATE_DONE, 1299b0a2fdeeSScott Long sleep_ok, timeout_ms)); 13007104aeefSMatt Jacob } 13017104aeefSMatt Jacob 1302b0a2fdeeSScott Long 1303b0a2fdeeSScott Long int 1304b0a2fdeeSScott Long mpt_read_cfg_header(struct mpt_softc *mpt, int PageType, int PageNumber, 1305b0a2fdeeSScott Long uint32_t PageAddress, CONFIG_PAGE_HEADER *rslt, 1306b0a2fdeeSScott Long int sleep_ok, int timeout_ms) 1307b0a2fdeeSScott Long { 1308b0a2fdeeSScott Long request_t *req; 1309b0a2fdeeSScott Long int error; 1310b0a2fdeeSScott Long 1311b0a2fdeeSScott Long req = mpt_get_request(mpt, sleep_ok); 1312b0a2fdeeSScott Long if (req == NULL) { 1313b0a2fdeeSScott Long mpt_prt(mpt, "mpt_read_cfg_header: Get request failed!\n"); 13147104aeefSMatt Jacob return (-1); 13157104aeefSMatt Jacob } 1316b0a2fdeeSScott Long 1317b0a2fdeeSScott Long error = mpt_issue_cfg_req(mpt, req, MPI_CONFIG_ACTION_PAGE_HEADER, 1318b0a2fdeeSScott Long /*PageVersion*/0, /*PageLength*/0, PageNumber, 1319b0a2fdeeSScott Long PageType, PageAddress, /*addr*/0, /*len*/0, 1320b0a2fdeeSScott Long sleep_ok, timeout_ms); 1321b0a2fdeeSScott Long if (error != 0) { 1322b0a2fdeeSScott Long mpt_prt(mpt, "read_cfg_header timed out\n"); 1323b0a2fdeeSScott Long return (-1); 1324b0a2fdeeSScott Long } 1325b0a2fdeeSScott Long 1326b0a2fdeeSScott Long if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1327b0a2fdeeSScott Long mpt_prt(mpt, "mpt_read_cfg_header: Config Info Status %x\n", 1328b0a2fdeeSScott Long req->IOCStatus); 1329b0a2fdeeSScott Long error = -1; 1330b0a2fdeeSScott Long } else { 1331b0a2fdeeSScott Long MSG_CONFIG *cfgp; 1332b0a2fdeeSScott Long 1333b0a2fdeeSScott Long cfgp = req->req_vbuf; 1334b0a2fdeeSScott Long bcopy(&cfgp->Header, rslt, sizeof(*rslt)); 1335b0a2fdeeSScott Long error = 0; 1336b0a2fdeeSScott Long } 13377104aeefSMatt Jacob mpt_free_request(mpt, req); 1338b0a2fdeeSScott Long return (error); 13397104aeefSMatt Jacob } 13407104aeefSMatt Jacob 13410424fb53SMatt Jacob #define CFG_DATA_OFF 128 13427104aeefSMatt Jacob 1343ce68dae5SMatt Jacob int 1344b0a2fdeeSScott Long mpt_read_cfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress, 1345b0a2fdeeSScott Long CONFIG_PAGE_HEADER *hdr, size_t len, int sleep_ok, 1346b0a2fdeeSScott Long int timeout_ms) 13477104aeefSMatt Jacob { 13487104aeefSMatt Jacob request_t *req; 1349b0a2fdeeSScott Long int error; 13507104aeefSMatt Jacob 1351b0a2fdeeSScott Long req = mpt_get_request(mpt, sleep_ok); 1352b0a2fdeeSScott Long if (req == NULL) { 1353b0a2fdeeSScott Long mpt_prt(mpt, "mpt_read_cfg_page: Get request failed!\n"); 13547104aeefSMatt Jacob return (-1); 13557104aeefSMatt Jacob } 13567104aeefSMatt Jacob 1357b0a2fdeeSScott Long error = mpt_issue_cfg_req(mpt, req, Action, hdr->PageVersion, 1358b0a2fdeeSScott Long hdr->PageLength, hdr->PageNumber, 1359b0a2fdeeSScott Long hdr->PageType & MPI_CONFIG_PAGETYPE_MASK, 1360b0a2fdeeSScott Long PageAddress, req->req_pbuf + CFG_DATA_OFF, 1361b0a2fdeeSScott Long len, sleep_ok, timeout_ms); 1362b0a2fdeeSScott Long if (error != 0) { 1363b0a2fdeeSScott Long mpt_prt(mpt, "read_cfg_page(%d) timed out\n", Action); 13647104aeefSMatt Jacob return (-1); 13657104aeefSMatt Jacob } 1366b0a2fdeeSScott Long 1367b0a2fdeeSScott Long if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1368b0a2fdeeSScott Long mpt_prt(mpt, "mpt_read_cfg_page: Config Info Status %x\n", 1369b0a2fdeeSScott Long req->IOCStatus); 1370b0a2fdeeSScott Long mpt_free_request(mpt, req); 1371b0a2fdeeSScott Long return (-1); 1372b0a2fdeeSScott Long } 13737104aeefSMatt Jacob bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap, 13747104aeefSMatt Jacob BUS_DMASYNC_POSTREAD); 1375b0a2fdeeSScott Long memcpy(hdr, ((uint8_t *)req->req_vbuf)+CFG_DATA_OFF, len); 13767104aeefSMatt Jacob mpt_free_request(mpt, req); 13777104aeefSMatt Jacob return (0); 13787104aeefSMatt Jacob } 13797104aeefSMatt Jacob 1380ce68dae5SMatt Jacob int 1381b0a2fdeeSScott Long mpt_write_cfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress, 1382b0a2fdeeSScott Long CONFIG_PAGE_HEADER *hdr, size_t len, int sleep_ok, 1383b0a2fdeeSScott Long int timeout_ms) 13847104aeefSMatt Jacob { 13857104aeefSMatt Jacob request_t *req; 1386b0a2fdeeSScott Long u_int hdr_attr; 1387b0a2fdeeSScott Long int error; 13887104aeefSMatt Jacob 13897104aeefSMatt Jacob hdr_attr = hdr->PageType & MPI_CONFIG_PAGEATTR_MASK; 13907104aeefSMatt Jacob if (hdr_attr != MPI_CONFIG_PAGEATTR_CHANGEABLE && 13917104aeefSMatt Jacob hdr_attr != MPI_CONFIG_PAGEATTR_PERSISTENT) { 1392b0a2fdeeSScott Long mpt_prt(mpt, "page type 0x%x not changeable\n", 13937104aeefSMatt Jacob hdr->PageType & MPI_CONFIG_PAGETYPE_MASK); 13947104aeefSMatt Jacob return (-1); 13957104aeefSMatt Jacob } 1396b0a2fdeeSScott Long hdr->PageType &= MPI_CONFIG_PAGETYPE_MASK, 13977104aeefSMatt Jacob 1398b0a2fdeeSScott Long req = mpt_get_request(mpt, sleep_ok); 1399b0a2fdeeSScott Long if (req == NULL) 1400b0a2fdeeSScott Long return (-1); 14017104aeefSMatt Jacob 1402b0a2fdeeSScott Long memcpy(((caddr_t)req->req_vbuf)+CFG_DATA_OFF, hdr, len); 1403301472c2SMatt Jacob /* Restore stripped out attributes */ 1404301472c2SMatt Jacob hdr->PageType |= hdr_attr; 14057104aeefSMatt Jacob 1406b0a2fdeeSScott Long error = mpt_issue_cfg_req(mpt, req, Action, hdr->PageVersion, 1407b0a2fdeeSScott Long hdr->PageLength, hdr->PageNumber, 1408b0a2fdeeSScott Long hdr->PageType & MPI_CONFIG_PAGETYPE_MASK, 1409b0a2fdeeSScott Long PageAddress, req->req_pbuf + CFG_DATA_OFF, 1410b0a2fdeeSScott Long len, sleep_ok, timeout_ms); 1411b0a2fdeeSScott Long if (error != 0) { 1412b0a2fdeeSScott Long mpt_prt(mpt, "mpt_write_cfg_page timed out\n"); 14137104aeefSMatt Jacob return (-1); 14147104aeefSMatt Jacob } 14157104aeefSMatt Jacob 1416b0a2fdeeSScott Long if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1417b0a2fdeeSScott Long mpt_prt(mpt, "mpt_write_cfg_page: Config Info Status %x\n", 1418b0a2fdeeSScott Long req->IOCStatus); 14197104aeefSMatt Jacob mpt_free_request(mpt, req); 1420b0a2fdeeSScott Long return (-1); 1421b0a2fdeeSScott Long } 1422b0a2fdeeSScott Long mpt_free_request(mpt, req); 1423b0a2fdeeSScott Long return (0); 1424b0a2fdeeSScott Long } 1425b0a2fdeeSScott Long 1426b0a2fdeeSScott Long /* 1427b0a2fdeeSScott Long * Read IOC configuration information 1428b0a2fdeeSScott Long */ 1429b0a2fdeeSScott Long static int 1430b0a2fdeeSScott Long mpt_read_config_info_ioc(struct mpt_softc *mpt) 1431b0a2fdeeSScott Long { 1432b0a2fdeeSScott Long CONFIG_PAGE_HEADER hdr; 1433b0a2fdeeSScott Long struct mpt_raid_volume *mpt_raid; 1434b0a2fdeeSScott Long int rv; 1435b0a2fdeeSScott Long int i; 1436b0a2fdeeSScott Long size_t len; 1437b0a2fdeeSScott Long 1438b0a2fdeeSScott Long rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_IOC, 1439b0a2fdeeSScott Long /*PageNumber*/2, /*PageAddress*/0, &hdr, 1440b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1441b0a2fdeeSScott Long if (rv) 1442b0a2fdeeSScott Long return (EIO); 1443b0a2fdeeSScott Long 1444b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC Page 2 Header: ver %x, len %x, " 1445b0a2fdeeSScott Long "num %x, type %x\n", hdr.PageVersion, 1446b0a2fdeeSScott Long hdr.PageLength * sizeof(uint32_t), 1447b0a2fdeeSScott Long hdr.PageNumber, hdr.PageType); 1448b0a2fdeeSScott Long 1449b0a2fdeeSScott Long len = hdr.PageLength * sizeof(uint32_t); 1450a3699bcaSScott Long mpt->ioc_page2 = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 1451b0a2fdeeSScott Long if (mpt->ioc_page2 == NULL) 1452b0a2fdeeSScott Long return (ENOMEM); 1453b0a2fdeeSScott Long memcpy(&mpt->ioc_page2->Header, &hdr, sizeof(hdr)); 1454b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0, 1455b0a2fdeeSScott Long &mpt->ioc_page2->Header, len, 1456b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1457b0a2fdeeSScott Long if (rv) { 1458b0a2fdeeSScott Long mpt_prt(mpt, "failed to read IOC Page 2\n"); 1459b0a2fdeeSScott Long } else if (mpt->ioc_page2->CapabilitiesFlags != 0) { 1460b0a2fdeeSScott Long uint32_t mask; 1461b0a2fdeeSScott Long 1462b0a2fdeeSScott Long mpt_prt(mpt, "Capabilities: ("); 1463b0a2fdeeSScott Long for (mask = 1; mask != 0; mask <<= 1) { 1464b0a2fdeeSScott Long if ((mpt->ioc_page2->CapabilitiesFlags & mask) == 0) 1465b0a2fdeeSScott Long continue; 1466b0a2fdeeSScott Long 1467b0a2fdeeSScott Long switch (mask) { 1468b0a2fdeeSScott Long case MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT: 1469b0a2fdeeSScott Long mpt_prtc(mpt, " RAID-0"); 1470b0a2fdeeSScott Long break; 1471b0a2fdeeSScott Long case MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT: 1472b0a2fdeeSScott Long mpt_prtc(mpt, " RAID-1E"); 1473b0a2fdeeSScott Long break; 1474b0a2fdeeSScott Long case MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT: 1475b0a2fdeeSScott Long mpt_prtc(mpt, " RAID-1"); 1476b0a2fdeeSScott Long break; 1477b0a2fdeeSScott Long case MPI_IOCPAGE2_CAP_FLAGS_SES_SUPPORT: 1478b0a2fdeeSScott Long mpt_prtc(mpt, " SES"); 1479b0a2fdeeSScott Long break; 1480b0a2fdeeSScott Long case MPI_IOCPAGE2_CAP_FLAGS_SAFTE_SUPPORT: 1481b0a2fdeeSScott Long mpt_prtc(mpt, " SAFTE"); 1482b0a2fdeeSScott Long break; 1483b0a2fdeeSScott Long case MPI_IOCPAGE2_CAP_FLAGS_CROSS_CHANNEL_SUPPORT: 1484b0a2fdeeSScott Long mpt_prtc(mpt, " Multi-Channel-Arrays"); 1485b0a2fdeeSScott Long default: 1486b0a2fdeeSScott Long break; 1487b0a2fdeeSScott Long } 1488b0a2fdeeSScott Long } 1489b0a2fdeeSScott Long mpt_prtc(mpt, " )\n"); 1490b0a2fdeeSScott Long if ((mpt->ioc_page2->CapabilitiesFlags 1491b0a2fdeeSScott Long & (MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT 1492b0a2fdeeSScott Long | MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT 1493b0a2fdeeSScott Long | MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT)) != 0) { 1494b0a2fdeeSScott Long mpt_prt(mpt, "%d Active Volume%s(%d Max)\n", 1495b0a2fdeeSScott Long mpt->ioc_page2->NumActiveVolumes, 1496b0a2fdeeSScott Long mpt->ioc_page2->NumActiveVolumes != 1 1497b0a2fdeeSScott Long ? "s " : " ", 1498b0a2fdeeSScott Long mpt->ioc_page2->MaxVolumes); 1499b0a2fdeeSScott Long mpt_prt(mpt, "%d Hidden Drive Member%s(%d Max)\n", 1500b0a2fdeeSScott Long mpt->ioc_page2->NumActivePhysDisks, 1501b0a2fdeeSScott Long mpt->ioc_page2->NumActivePhysDisks != 1 1502b0a2fdeeSScott Long ? "s " : " ", 1503b0a2fdeeSScott Long mpt->ioc_page2->MaxPhysDisks); 1504b0a2fdeeSScott Long } 1505b0a2fdeeSScott Long } 1506b0a2fdeeSScott Long 1507b0a2fdeeSScott Long len = mpt->ioc_page2->MaxVolumes * sizeof(struct mpt_raid_volume); 1508b0a2fdeeSScott Long mpt->raid_volumes = malloc(len, M_DEVBUF, M_NOWAIT); 1509b0a2fdeeSScott Long if (mpt->raid_volumes == NULL) { 1510b0a2fdeeSScott Long mpt_prt(mpt, "Could not allocate RAID volume data\n"); 1511b0a2fdeeSScott Long } else { 1512b0a2fdeeSScott Long memset(mpt->raid_volumes, 0, len); 1513b0a2fdeeSScott Long } 1514b0a2fdeeSScott Long 1515b0a2fdeeSScott Long /* 1516b0a2fdeeSScott Long * Copy critical data out of ioc_page2 so that we can 1517b0a2fdeeSScott Long * safely refresh the page without windows of unreliable 1518b0a2fdeeSScott Long * data. 1519b0a2fdeeSScott Long */ 1520b0a2fdeeSScott Long mpt->raid_max_volumes = mpt->ioc_page2->MaxVolumes; 1521b0a2fdeeSScott Long 1522b0a2fdeeSScott Long len = sizeof(*mpt->raid_volumes->config_page) 1523b0a2fdeeSScott Long + (sizeof(RAID_VOL0_PHYS_DISK)*(mpt->ioc_page2->MaxPhysDisks - 1)); 1524b0a2fdeeSScott Long for (i = 0; i < mpt->ioc_page2->MaxVolumes; i++) { 1525b0a2fdeeSScott Long mpt_raid = &mpt->raid_volumes[i]; 1526b0a2fdeeSScott Long mpt_raid->config_page = malloc(len, M_DEVBUF, M_NOWAIT); 1527b0a2fdeeSScott Long if (mpt_raid->config_page == NULL) { 1528b0a2fdeeSScott Long mpt_prt(mpt, "Could not allocate RAID page data\n"); 1529b0a2fdeeSScott Long break; 1530b0a2fdeeSScott Long } 1531b0a2fdeeSScott Long memset(mpt_raid->config_page, 0, len); 1532b0a2fdeeSScott Long } 1533b0a2fdeeSScott Long mpt->raid_page0_len = len; 1534b0a2fdeeSScott Long 1535b0a2fdeeSScott Long len = mpt->ioc_page2->MaxPhysDisks * sizeof(struct mpt_raid_disk); 1536b0a2fdeeSScott Long mpt->raid_disks = malloc(len, M_DEVBUF, M_NOWAIT); 1537b0a2fdeeSScott Long if (mpt->raid_disks == NULL) { 1538b0a2fdeeSScott Long mpt_prt(mpt, "Could not allocate RAID disk data\n"); 1539b0a2fdeeSScott Long } else { 1540b0a2fdeeSScott Long memset(mpt->raid_disks, 0, len); 1541b0a2fdeeSScott Long } 1542b0a2fdeeSScott Long 1543b0a2fdeeSScott Long mpt->raid_max_disks = mpt->ioc_page2->MaxPhysDisks; 1544b0a2fdeeSScott Long 1545b0a2fdeeSScott Long rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_IOC, 1546b0a2fdeeSScott Long /*PageNumber*/3, /*PageAddress*/0, &hdr, 1547b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1548b0a2fdeeSScott Long if (rv) 1549b0a2fdeeSScott Long return (EIO); 1550b0a2fdeeSScott Long 1551b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC Page 3 Header: %x %x %x %x\n", 1552b0a2fdeeSScott Long hdr.PageVersion, hdr.PageLength, hdr.PageNumber, hdr.PageType); 1553b0a2fdeeSScott Long 1554b0a2fdeeSScott Long if (mpt->ioc_page3 != NULL) 1555b0a2fdeeSScott Long free(mpt->ioc_page3, M_DEVBUF); 1556b0a2fdeeSScott Long len = hdr.PageLength * sizeof(uint32_t); 1557a3699bcaSScott Long mpt->ioc_page3 = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 1558b0a2fdeeSScott Long if (mpt->ioc_page3 == NULL) 1559b0a2fdeeSScott Long return (-1); 1560b0a2fdeeSScott Long memcpy(&mpt->ioc_page3->Header, &hdr, sizeof(hdr)); 1561b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0, 1562b0a2fdeeSScott Long &mpt->ioc_page3->Header, len, 1563b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1564b0a2fdeeSScott Long if (rv) { 1565b0a2fdeeSScott Long mpt_prt(mpt, "failed to read IOC Page 3\n"); 1566b0a2fdeeSScott Long } 1567b0a2fdeeSScott Long 1568b0a2fdeeSScott Long mpt_raid_wakeup(mpt); 1569b0a2fdeeSScott Long 15707104aeefSMatt Jacob return (0); 15717104aeefSMatt Jacob } 15727104aeefSMatt Jacob 15737104aeefSMatt Jacob /* 15747104aeefSMatt Jacob * Read SCSI configuration information 15757104aeefSMatt Jacob */ 15767104aeefSMatt Jacob static int 1577b0a2fdeeSScott Long mpt_read_config_info_spi(struct mpt_softc *mpt) 15787104aeefSMatt Jacob { 15797104aeefSMatt Jacob int rv, i; 15807104aeefSMatt Jacob 15817104aeefSMatt Jacob rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_PORT, 0, 1582b0a2fdeeSScott Long 0, &mpt->mpt_port_page0.Header, 1583b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1584b0a2fdeeSScott Long if (rv) 15857104aeefSMatt Jacob return (-1); 1586b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1587b0a2fdeeSScott Long "SPI Port Page 0 Header: %x %x %x %x\n", 15887104aeefSMatt Jacob mpt->mpt_port_page0.Header.PageVersion, 15897104aeefSMatt Jacob mpt->mpt_port_page0.Header.PageLength, 15907104aeefSMatt Jacob mpt->mpt_port_page0.Header.PageNumber, 15917104aeefSMatt Jacob mpt->mpt_port_page0.Header.PageType); 15927104aeefSMatt Jacob 15937104aeefSMatt Jacob rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_PORT, 1, 1594b0a2fdeeSScott Long 0, &mpt->mpt_port_page1.Header, 1595b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1596b0a2fdeeSScott Long if (rv) 15977104aeefSMatt Jacob return (-1); 1598b0a2fdeeSScott Long 1599b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "SPI Port Page 1 Header: %x %x %x %x\n", 16007104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageVersion, 16017104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageLength, 16027104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageNumber, 16037104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageType); 16047104aeefSMatt Jacob 16057104aeefSMatt Jacob rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_PORT, 2, 1606b0a2fdeeSScott Long /*PageAddress*/0, &mpt->mpt_port_page2.Header, 1607b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1608b0a2fdeeSScott Long if (rv) 16097104aeefSMatt Jacob return (-1); 16107104aeefSMatt Jacob 1611b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1612b0a2fdeeSScott Long "SPI Port Page 2 Header: %x %x %x %x\n", 16137104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageVersion, 16147104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageLength, 16157104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageNumber, 16167104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageType); 16177104aeefSMatt Jacob 16187104aeefSMatt Jacob for (i = 0; i < 16; i++) { 16197104aeefSMatt Jacob rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_DEVICE, 1620b0a2fdeeSScott Long 0, i, &mpt->mpt_dev_page0[i].Header, 1621b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1622b0a2fdeeSScott Long if (rv) 16237104aeefSMatt Jacob return (-1); 1624b0a2fdeeSScott Long 1625b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1626b0a2fdeeSScott Long "SPI Target %d Device Page 0 Header: %x %x %x %x\n", 16277104aeefSMatt Jacob i, mpt->mpt_dev_page0[i].Header.PageVersion, 16287104aeefSMatt Jacob mpt->mpt_dev_page0[i].Header.PageLength, 16297104aeefSMatt Jacob mpt->mpt_dev_page0[i].Header.PageNumber, 16307104aeefSMatt Jacob mpt->mpt_dev_page0[i].Header.PageType); 16317104aeefSMatt Jacob 16327104aeefSMatt Jacob rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_DEVICE, 1633b0a2fdeeSScott Long 1, i, &mpt->mpt_dev_page1[i].Header, 1634b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1635b0a2fdeeSScott Long if (rv) 16367104aeefSMatt Jacob return (-1); 1637b0a2fdeeSScott Long 1638b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1639b0a2fdeeSScott Long "SPI Target %d Device Page 1 Header: %x %x %x %x\n", 16407104aeefSMatt Jacob i, mpt->mpt_dev_page1[i].Header.PageVersion, 16417104aeefSMatt Jacob mpt->mpt_dev_page1[i].Header.PageLength, 16427104aeefSMatt Jacob mpt->mpt_dev_page1[i].Header.PageNumber, 16437104aeefSMatt Jacob mpt->mpt_dev_page1[i].Header.PageType); 16447104aeefSMatt Jacob } 16457104aeefSMatt Jacob 16467104aeefSMatt Jacob /* 16477104aeefSMatt Jacob * At this point, we don't *have* to fail. As long as we have 16487104aeefSMatt Jacob * valid config header information, we can (barely) lurch 16497104aeefSMatt Jacob * along. 16507104aeefSMatt Jacob */ 16517104aeefSMatt Jacob 1652b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0, 1653b0a2fdeeSScott Long &mpt->mpt_port_page0.Header, 1654b0a2fdeeSScott Long sizeof(mpt->mpt_port_page0), 1655b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 16567104aeefSMatt Jacob if (rv) { 1657b0a2fdeeSScott Long mpt_prt(mpt, "failed to read SPI Port Page 0\n"); 1658b0a2fdeeSScott Long } else { 1659b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1660b0a2fdeeSScott Long "SPI Port Page 0: Capabilities %x PhysicalInterface %x\n", 16617104aeefSMatt Jacob mpt->mpt_port_page0.Capabilities, 16627104aeefSMatt Jacob mpt->mpt_port_page0.PhysicalInterface); 16637104aeefSMatt Jacob } 16647104aeefSMatt Jacob 1665b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0, 1666b0a2fdeeSScott Long &mpt->mpt_port_page1.Header, 1667b0a2fdeeSScott Long sizeof(mpt->mpt_port_page1), 1668b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 16697104aeefSMatt Jacob if (rv) { 1670b0a2fdeeSScott Long mpt_prt(mpt, "failed to read SPI Port Page 1\n"); 1671b0a2fdeeSScott Long } else { 1672b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1673b0a2fdeeSScott Long "SPI Port Page 1: Configuration %x OnBusTimerValue %x\n", 16747104aeefSMatt Jacob mpt->mpt_port_page1.Configuration, 16757104aeefSMatt Jacob mpt->mpt_port_page1.OnBusTimerValue); 16767104aeefSMatt Jacob } 16777104aeefSMatt Jacob 1678b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0, 1679b0a2fdeeSScott Long &mpt->mpt_port_page2.Header, 1680b0a2fdeeSScott Long sizeof(mpt->mpt_port_page2), 1681b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 16827104aeefSMatt Jacob if (rv) { 1683b0a2fdeeSScott Long mpt_prt(mpt, "failed to read SPI Port Page 2\n"); 1684b0a2fdeeSScott Long } else { 1685b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1686b0a2fdeeSScott Long "SPI Port Page 2: Flags %x Settings %x\n", 16877104aeefSMatt Jacob mpt->mpt_port_page2.PortFlags, 16887104aeefSMatt Jacob mpt->mpt_port_page2.PortSettings); 16897104aeefSMatt Jacob for (i = 0; i < 16; i++) { 1690b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1691b0a2fdeeSScott Long "SPI Port Page 2 Tgt %d: timo %x SF %x Flags %x\n", 16927104aeefSMatt Jacob i, mpt->mpt_port_page2.DeviceSettings[i].Timeout, 16937104aeefSMatt Jacob mpt->mpt_port_page2.DeviceSettings[i].SyncFactor, 16947104aeefSMatt Jacob mpt->mpt_port_page2.DeviceSettings[i].DeviceFlags); 16957104aeefSMatt Jacob } 16967104aeefSMatt Jacob } 16977104aeefSMatt Jacob 16987104aeefSMatt Jacob for (i = 0; i < 16; i++) { 1699b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/i, 1700b0a2fdeeSScott Long &mpt->mpt_dev_page0[i].Header, 1701b0a2fdeeSScott Long sizeof(*mpt->mpt_dev_page0), 1702b0a2fdeeSScott Long /*sleep_ok*/FALSE, 1703b0a2fdeeSScott Long /*timeout_ms*/5000); 17047104aeefSMatt Jacob if (rv) { 1705b0a2fdeeSScott Long mpt_prt(mpt, 1706b0a2fdeeSScott Long "cannot read SPI Tgt %d Device Page 0\n", i); 17077104aeefSMatt Jacob continue; 17087104aeefSMatt Jacob } 1709b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1710301472c2SMatt Jacob "SPI Tgt %d Page 0: NParms %x Information %x", 17117104aeefSMatt Jacob i, mpt->mpt_dev_page0[i].NegotiatedParameters, 17127104aeefSMatt Jacob mpt->mpt_dev_page0[i].Information); 1713b0a2fdeeSScott Long 1714b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/i, 1715b0a2fdeeSScott Long &mpt->mpt_dev_page1[i].Header, 1716b0a2fdeeSScott Long sizeof(*mpt->mpt_dev_page1), 1717b0a2fdeeSScott Long /*sleep_ok*/FALSE, 1718b0a2fdeeSScott Long /*timeout_ms*/5000); 17197104aeefSMatt Jacob if (rv) { 1720b0a2fdeeSScott Long mpt_prt(mpt, 1721b0a2fdeeSScott Long "cannot read SPI Tgt %d Device Page 1\n", i); 17227104aeefSMatt Jacob continue; 17237104aeefSMatt Jacob } 1724b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1725b0a2fdeeSScott Long "SPI Tgt %d Page 1: RParms %x Configuration %x\n", 17267104aeefSMatt Jacob i, mpt->mpt_dev_page1[i].RequestedParameters, 17277104aeefSMatt Jacob mpt->mpt_dev_page1[i].Configuration); 17287104aeefSMatt Jacob } 17297104aeefSMatt Jacob return (0); 17307104aeefSMatt Jacob } 17317104aeefSMatt Jacob 17327104aeefSMatt Jacob /* 17337104aeefSMatt Jacob * Validate SPI configuration information. 17347104aeefSMatt Jacob * 17357104aeefSMatt Jacob * In particular, validate SPI Port Page 1. 17367104aeefSMatt Jacob */ 17377104aeefSMatt Jacob static int 1738b0a2fdeeSScott Long mpt_set_initial_config_spi(struct mpt_softc *mpt) 17397104aeefSMatt Jacob { 17407104aeefSMatt Jacob int i, pp1val = ((1 << mpt->mpt_ini_id) << 16) | mpt->mpt_ini_id; 1741b0a2fdeeSScott Long int error; 17427104aeefSMatt Jacob 1743ce68dae5SMatt Jacob mpt->mpt_disc_enable = 0xff; 1744ce68dae5SMatt Jacob mpt->mpt_tag_enable = 0; 1745ce68dae5SMatt Jacob 17467104aeefSMatt Jacob if (mpt->mpt_port_page1.Configuration != pp1val) { 17477fed69eeSMatt Jacob CONFIG_PAGE_SCSI_PORT_1 tmp; 1748b0a2fdeeSScott Long 1749301472c2SMatt Jacob mpt_prt(mpt, 1750b0a2fdeeSScott Long "SPI Port Page 1 Config value bad (%x)- should be %x\n", 17517104aeefSMatt Jacob mpt->mpt_port_page1.Configuration, pp1val); 17527104aeefSMatt Jacob tmp = mpt->mpt_port_page1; 17537104aeefSMatt Jacob tmp.Configuration = pp1val; 1754b0a2fdeeSScott Long error = mpt_write_cur_cfg_page(mpt, /*PageAddress*/0, 1755b0a2fdeeSScott Long &tmp.Header, sizeof(tmp), 1756b0a2fdeeSScott Long /*sleep_ok*/FALSE, 1757b0a2fdeeSScott Long /*timeout_ms*/5000); 1758b0a2fdeeSScott Long if (error) 17597104aeefSMatt Jacob return (-1); 1760b0a2fdeeSScott Long error = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0, 1761b0a2fdeeSScott Long &tmp.Header, sizeof(tmp), 1762b0a2fdeeSScott Long /*sleep_ok*/FALSE, 1763b0a2fdeeSScott Long /*timeout_ms*/5000); 1764b0a2fdeeSScott Long if (error) 17657104aeefSMatt Jacob return (-1); 17667104aeefSMatt Jacob if (tmp.Configuration != pp1val) { 1767301472c2SMatt Jacob mpt_prt(mpt, 1768b0a2fdeeSScott Long "failed to reset SPI Port Page 1 Config value\n"); 17697104aeefSMatt Jacob return (-1); 17707104aeefSMatt Jacob } 17717104aeefSMatt Jacob mpt->mpt_port_page1 = tmp; 17727104aeefSMatt Jacob } 17737104aeefSMatt Jacob 17747104aeefSMatt Jacob for (i = 0; i < 16; i++) { 17757fed69eeSMatt Jacob CONFIG_PAGE_SCSI_DEVICE_1 tmp; 17767104aeefSMatt Jacob tmp = mpt->mpt_dev_page1[i]; 17777104aeefSMatt Jacob tmp.RequestedParameters = 0; 17787104aeefSMatt Jacob tmp.Configuration = 0; 1779b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1780b0a2fdeeSScott Long "Set Tgt %d SPI DevicePage 1 values to %x 0 %x\n", 17817104aeefSMatt Jacob i, tmp.RequestedParameters, tmp.Configuration); 1782b0a2fdeeSScott Long error = mpt_write_cur_cfg_page(mpt, /*PageAddress*/i, 1783b0a2fdeeSScott Long &tmp.Header, sizeof(tmp), 1784b0a2fdeeSScott Long /*sleep_ok*/FALSE, 1785b0a2fdeeSScott Long /*timeout_ms*/5000); 1786b0a2fdeeSScott Long if (error) 17877104aeefSMatt Jacob return (-1); 1788b0a2fdeeSScott Long error = mpt_read_cur_cfg_page(mpt, /*PageAddress*/i, 1789b0a2fdeeSScott Long &tmp.Header, sizeof(tmp), 1790b0a2fdeeSScott Long /*sleep_ok*/FALSE, 1791b0a2fdeeSScott Long /*timeout_ms*/5000); 1792b0a2fdeeSScott Long if (error) 17937104aeefSMatt Jacob return (-1); 17947104aeefSMatt Jacob mpt->mpt_dev_page1[i] = tmp; 1795b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1796b0a2fdeeSScott Long "SPI Tgt %d Page 1: RParm %x Configuration %x\n", i, 17977104aeefSMatt Jacob mpt->mpt_dev_page1[i].RequestedParameters, 17987104aeefSMatt Jacob mpt->mpt_dev_page1[i].Configuration); 17997104aeefSMatt Jacob } 18007104aeefSMatt Jacob return (0); 18017104aeefSMatt Jacob } 18027104aeefSMatt Jacob 18037104aeefSMatt Jacob /* 18047104aeefSMatt Jacob * Enable IOC port 18057104aeefSMatt Jacob */ 18067104aeefSMatt Jacob static int 1807b0a2fdeeSScott Long mpt_send_port_enable(struct mpt_softc *mpt, int port) 18089b631363SMatt Jacob { 18099b631363SMatt Jacob request_t *req; 18109b631363SMatt Jacob MSG_PORT_ENABLE *enable_req; 1811b0a2fdeeSScott Long int error; 18129b631363SMatt Jacob 1813b0a2fdeeSScott Long req = mpt_get_request(mpt, /*sleep_ok*/FALSE); 1814b0a2fdeeSScott Long if (req == NULL) 1815b0a2fdeeSScott Long return (-1); 18169b631363SMatt Jacob 18179b631363SMatt Jacob enable_req = req->req_vbuf; 18189b631363SMatt Jacob bzero(enable_req, sizeof *enable_req); 18199b631363SMatt Jacob 18209b631363SMatt Jacob enable_req->Function = MPI_FUNCTION_PORT_ENABLE; 1821b0a2fdeeSScott Long enable_req->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_CONFIG); 18229b631363SMatt Jacob enable_req->PortNumber = port; 18239b631363SMatt Jacob 18249b631363SMatt Jacob mpt_check_doorbell(mpt); 1825b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "enabling port %d\n", port); 18269b631363SMatt Jacob 1827b0a2fdeeSScott Long mpt_send_cmd(mpt, req); 1828b0a2fdeeSScott Long error = mpt_wait_req(mpt, req, REQ_STATE_DONE, REQ_STATE_DONE, 1829b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*time_ms*/500); 1830b0a2fdeeSScott Long if (error != 0) { 1831301472c2SMatt Jacob mpt_prt(mpt, "port enable timed out"); 18329b631363SMatt Jacob return (-1); 18339b631363SMatt Jacob } 18349b631363SMatt Jacob mpt_free_request(mpt, req); 18359b631363SMatt Jacob return (0); 18369b631363SMatt Jacob } 18379b631363SMatt Jacob 18389b631363SMatt Jacob /* 18399b631363SMatt Jacob * Enable/Disable asynchronous event reporting. 18409b631363SMatt Jacob * 18419b631363SMatt Jacob * NB: this is the first command we send via shared memory 18429b631363SMatt Jacob * instead of the handshake register. 18439b631363SMatt Jacob */ 18449b631363SMatt Jacob static int 1845b0a2fdeeSScott Long mpt_send_event_request(struct mpt_softc *mpt, int onoff) 18469b631363SMatt Jacob { 18479b631363SMatt Jacob request_t *req; 18489b631363SMatt Jacob MSG_EVENT_NOTIFY *enable_req; 18499b631363SMatt Jacob 1850b0a2fdeeSScott Long req = mpt_get_request(mpt, /*sleep_ok*/FALSE); 18519b631363SMatt Jacob 18529b631363SMatt Jacob enable_req = req->req_vbuf; 18539b631363SMatt Jacob bzero(enable_req, sizeof *enable_req); 18549b631363SMatt Jacob 18559b631363SMatt Jacob enable_req->Function = MPI_FUNCTION_EVENT_NOTIFICATION; 1856b0a2fdeeSScott Long enable_req->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_EVENTS); 18579b631363SMatt Jacob enable_req->Switch = onoff; 18589b631363SMatt Jacob 18599b631363SMatt Jacob mpt_check_doorbell(mpt); 1860b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1861b0a2fdeeSScott Long "%sabling async events\n", onoff ? "en" : "dis"); 18629b631363SMatt Jacob mpt_send_cmd(mpt, req); 18639b631363SMatt Jacob 18649b631363SMatt Jacob return (0); 18659b631363SMatt Jacob } 18669b631363SMatt Jacob 18679b631363SMatt Jacob /* 18689b631363SMatt Jacob * Un-mask the interupts on the chip. 18699b631363SMatt Jacob */ 18709b631363SMatt Jacob void 1871b0a2fdeeSScott Long mpt_enable_ints(struct mpt_softc *mpt) 18729b631363SMatt Jacob { 18739b631363SMatt Jacob /* Unmask every thing except door bell int */ 18749b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_MASK, MPT_INTR_DB_MASK); 18759b631363SMatt Jacob } 18769b631363SMatt Jacob 18779b631363SMatt Jacob /* 18789b631363SMatt Jacob * Mask the interupts on the chip. 18799b631363SMatt Jacob */ 18809b631363SMatt Jacob void 1881b0a2fdeeSScott Long mpt_disable_ints(struct mpt_softc *mpt) 18829b631363SMatt Jacob { 18839b631363SMatt Jacob /* Mask all interrupts */ 18849b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_MASK, 18859b631363SMatt Jacob MPT_INTR_REPLY_MASK | MPT_INTR_DB_MASK); 18869b631363SMatt Jacob } 18879b631363SMatt Jacob 1888b0a2fdeeSScott Long static void 1889b0a2fdeeSScott Long mpt_sysctl_attach(struct mpt_softc *mpt) 18909b631363SMatt Jacob { 1891b0a2fdeeSScott Long struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(mpt->dev); 1892b0a2fdeeSScott Long struct sysctl_oid *tree = device_get_sysctl_tree(mpt->dev); 18939b631363SMatt Jacob 1894b0a2fdeeSScott Long SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1895b0a2fdeeSScott Long "debug", CTLFLAG_RW, &mpt->verbose, 0, 1896b0a2fdeeSScott Long "Debugging/Verbose level"); 18979b631363SMatt Jacob } 18989b631363SMatt Jacob 1899b0a2fdeeSScott Long int 1900b0a2fdeeSScott Long mpt_attach(struct mpt_softc *mpt) 1901b0a2fdeeSScott Long { 1902b0a2fdeeSScott Long int i; 1903b0a2fdeeSScott Long 1904b0a2fdeeSScott Long for (i = 0; i < MPT_MAX_PERSONALITIES; i++) { 1905b0a2fdeeSScott Long struct mpt_personality *pers; 1906b0a2fdeeSScott Long int error; 1907b0a2fdeeSScott Long 1908b0a2fdeeSScott Long pers = mpt_personalities[i]; 1909b0a2fdeeSScott Long if (pers == NULL) 1910b0a2fdeeSScott Long continue; 1911b0a2fdeeSScott Long 1912b0a2fdeeSScott Long if (pers->probe(mpt) == 0) { 1913b0a2fdeeSScott Long error = pers->attach(mpt); 1914b0a2fdeeSScott Long if (error != 0) { 1915b0a2fdeeSScott Long mpt_detach(mpt); 1916b0a2fdeeSScott Long return (error); 1917b0a2fdeeSScott Long } 1918b0a2fdeeSScott Long mpt->mpt_pers_mask |= (0x1 << pers->id); 1919b0a2fdeeSScott Long pers->use_count++; 1920b0a2fdeeSScott Long } 1921b0a2fdeeSScott Long } 1922b0a2fdeeSScott Long return (0); 1923b0a2fdeeSScott Long } 1924b0a2fdeeSScott Long 1925b0a2fdeeSScott Long int 1926b0a2fdeeSScott Long mpt_shutdown(struct mpt_softc *mpt) 1927b0a2fdeeSScott Long { 1928b0a2fdeeSScott Long struct mpt_personality *pers; 1929b0a2fdeeSScott Long 1930b0a2fdeeSScott Long MPT_PERS_FOREACH_REVERSE(mpt, pers) 1931b0a2fdeeSScott Long pers->shutdown(mpt); 1932b0a2fdeeSScott Long 1933b0a2fdeeSScott Long mpt_reset(mpt, /*reinit*/FALSE); 1934b0a2fdeeSScott Long return (0); 1935b0a2fdeeSScott Long } 1936b0a2fdeeSScott Long 1937b0a2fdeeSScott Long int 1938b0a2fdeeSScott Long mpt_detach(struct mpt_softc *mpt) 1939b0a2fdeeSScott Long { 1940b0a2fdeeSScott Long struct mpt_personality *pers; 1941b0a2fdeeSScott Long 1942b0a2fdeeSScott Long MPT_PERS_FOREACH_REVERSE(mpt, pers) { 1943b0a2fdeeSScott Long pers->detach(mpt); 1944b0a2fdeeSScott Long mpt->mpt_pers_mask &= ~(0x1 << pers->id); 1945b0a2fdeeSScott Long pers->use_count--; 1946b0a2fdeeSScott Long } 1947b0a2fdeeSScott Long 1948b0a2fdeeSScott Long return (0); 1949b0a2fdeeSScott Long } 1950b0a2fdeeSScott Long 1951b0a2fdeeSScott Long int 1952b0a2fdeeSScott Long mpt_core_load(struct mpt_personality *pers) 1953b0a2fdeeSScott Long { 1954b0a2fdeeSScott Long int i; 1955b0a2fdeeSScott Long 1956b0a2fdeeSScott Long /* 1957b0a2fdeeSScott Long * Setup core handlers and insert the default handler 1958b0a2fdeeSScott Long * into all "empty slots". 1959b0a2fdeeSScott Long */ 1960b0a2fdeeSScott Long for (i = 0; i < MPT_NUM_REPLY_HANDLERS; i++) 1961b0a2fdeeSScott Long mpt_reply_handlers[i] = mpt_default_reply_handler; 1962b0a2fdeeSScott Long 1963b0a2fdeeSScott Long mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_EVENTS)] = 1964b0a2fdeeSScott Long mpt_event_reply_handler; 1965b0a2fdeeSScott Long mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_CONFIG)] = 1966b0a2fdeeSScott Long mpt_config_reply_handler; 1967b0a2fdeeSScott Long mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_HANDSHAKE)] = 1968b0a2fdeeSScott Long mpt_handshake_reply_handler; 1969b0a2fdeeSScott Long 1970b0a2fdeeSScott Long return (0); 19719b631363SMatt Jacob } 19729b631363SMatt Jacob 19739b631363SMatt Jacob /* 1974b0a2fdeeSScott Long * Initialize per-instance driver data and perform 1975b0a2fdeeSScott Long * initial controller configuration. 19769b631363SMatt Jacob */ 1977b0a2fdeeSScott Long int 1978b0a2fdeeSScott Long mpt_core_attach(struct mpt_softc *mpt) 1979b0a2fdeeSScott Long { 1980b0a2fdeeSScott Long int val; 1981b0a2fdeeSScott Long int error; 1982b0a2fdeeSScott Long 1983b0a2fdeeSScott Long LIST_INIT(&mpt->ack_frames); 1984b0a2fdeeSScott Long 1985b0a2fdeeSScott Long /* Put all request buffers on the free list */ 1986b0a2fdeeSScott Long TAILQ_INIT(&mpt->request_pending_list); 1987b0a2fdeeSScott Long TAILQ_INIT(&mpt->request_free_list); 1988b0a2fdeeSScott Long for (val = 0; val < MPT_MAX_REQUESTS(mpt); val++) 1989b0a2fdeeSScott Long mpt_free_request(mpt, &mpt->request_pool[val]); 1990b0a2fdeeSScott Long 1991b0a2fdeeSScott Long mpt_sysctl_attach(mpt); 1992b0a2fdeeSScott Long 1993b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "doorbell req = %s\n", 1994b0a2fdeeSScott Long mpt_ioc_diag(mpt_read(mpt, MPT_OFFSET_DOORBELL))); 1995b0a2fdeeSScott Long 1996b0a2fdeeSScott Long error = mpt_configure_ioc(mpt); 1997b0a2fdeeSScott Long 1998b0a2fdeeSScott Long return (error); 19999b631363SMatt Jacob } 20009b631363SMatt Jacob 2001b0a2fdeeSScott Long void 2002b0a2fdeeSScott Long mpt_core_shutdown(struct mpt_softc *mpt) 2003b0a2fdeeSScott Long { 2004b0a2fdeeSScott Long } 2005b0a2fdeeSScott Long 2006b0a2fdeeSScott Long void 2007b0a2fdeeSScott Long mpt_core_detach(struct mpt_softc *mpt) 2008b0a2fdeeSScott Long { 2009b0a2fdeeSScott Long } 2010b0a2fdeeSScott Long 2011b0a2fdeeSScott Long int 2012b0a2fdeeSScott Long mpt_core_unload(struct mpt_personality *pers) 2013b0a2fdeeSScott Long { 2014b0a2fdeeSScott Long /* Unload is always successfull. */ 2015b0a2fdeeSScott Long return (0); 2016b0a2fdeeSScott Long } 2017b0a2fdeeSScott Long 2018b0a2fdeeSScott Long #define FW_UPLOAD_REQ_SIZE \ 2019b0a2fdeeSScott Long (sizeof(MSG_FW_UPLOAD) - sizeof(SGE_MPI_UNION) \ 2020b0a2fdeeSScott Long + sizeof(FW_UPLOAD_TCSGE) + sizeof(SGE_SIMPLE32)) 2021b0a2fdeeSScott Long 2022b0a2fdeeSScott Long static int 2023b0a2fdeeSScott Long mpt_upload_fw(struct mpt_softc *mpt) 2024b0a2fdeeSScott Long { 2025b0a2fdeeSScott Long uint8_t fw_req_buf[FW_UPLOAD_REQ_SIZE]; 2026b0a2fdeeSScott Long MSG_FW_UPLOAD_REPLY fw_reply; 2027b0a2fdeeSScott Long MSG_FW_UPLOAD *fw_req; 2028b0a2fdeeSScott Long FW_UPLOAD_TCSGE *tsge; 2029b0a2fdeeSScott Long SGE_SIMPLE32 *sge; 2030b0a2fdeeSScott Long uint32_t flags; 2031b0a2fdeeSScott Long int error; 2032b0a2fdeeSScott Long 2033b0a2fdeeSScott Long memset(&fw_req_buf, 0, sizeof(fw_req_buf)); 2034b0a2fdeeSScott Long fw_req = (MSG_FW_UPLOAD *)fw_req_buf; 2035b0a2fdeeSScott Long fw_req->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM; 2036b0a2fdeeSScott Long fw_req->Function = MPI_FUNCTION_FW_UPLOAD; 2037b0a2fdeeSScott Long fw_req->MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 2038b0a2fdeeSScott Long tsge = (FW_UPLOAD_TCSGE *)&fw_req->SGL; 2039b0a2fdeeSScott Long tsge->DetailsLength = 12; 2040b0a2fdeeSScott Long tsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT; 2041b0a2fdeeSScott Long tsge->ImageSize = htole32(mpt->fw_image_size); 2042b0a2fdeeSScott Long sge = (SGE_SIMPLE32 *)(tsge + 1); 2043b0a2fdeeSScott Long flags = (MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER 2044b0a2fdeeSScott Long | MPI_SGE_FLAGS_END_OF_LIST | MPI_SGE_FLAGS_SIMPLE_ELEMENT 2045b0a2fdeeSScott Long | MPI_SGE_FLAGS_32_BIT_ADDRESSING | MPI_SGE_FLAGS_IOC_TO_HOST); 2046b0a2fdeeSScott Long flags <<= MPI_SGE_FLAGS_SHIFT; 2047b0a2fdeeSScott Long sge->FlagsLength = htole32(flags | mpt->fw_image_size); 2048b0a2fdeeSScott Long sge->Address = htole32(mpt->fw_phys); 2049b0a2fdeeSScott Long error = mpt_send_handshake_cmd(mpt, sizeof(fw_req_buf), &fw_req_buf); 2050b0a2fdeeSScott Long if (error) 2051b0a2fdeeSScott Long return(error); 2052b0a2fdeeSScott Long error = mpt_recv_handshake_reply(mpt, sizeof(fw_reply), &fw_reply); 2053b0a2fdeeSScott Long return (error); 2054b0a2fdeeSScott Long } 2055b0a2fdeeSScott Long 2056b0a2fdeeSScott Long static void 2057b0a2fdeeSScott Long mpt_diag_outsl(struct mpt_softc *mpt, uint32_t addr, 2058b0a2fdeeSScott Long uint32_t *data, bus_size_t len) 2059b0a2fdeeSScott Long { 2060b0a2fdeeSScott Long uint32_t *data_end; 2061b0a2fdeeSScott Long 2062b0a2fdeeSScott Long data_end = data + (roundup2(len, sizeof(uint32_t)) / 4); 2063b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, addr); 2064b0a2fdeeSScott Long while (data != data_end) { 2065b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, *data); 2066b0a2fdeeSScott Long data++; 2067b0a2fdeeSScott Long } 2068b0a2fdeeSScott Long } 2069b0a2fdeeSScott Long 2070b0a2fdeeSScott Long static int 2071b0a2fdeeSScott Long mpt_download_fw(struct mpt_softc *mpt) 2072b0a2fdeeSScott Long { 2073b0a2fdeeSScott Long MpiFwHeader_t *fw_hdr; 2074b0a2fdeeSScott Long int error; 2075b0a2fdeeSScott Long uint32_t ext_offset; 2076b0a2fdeeSScott Long uint32_t data; 2077b0a2fdeeSScott Long 2078b0a2fdeeSScott Long mpt_prt(mpt, "Downloading Firmware - Image Size %d\n", 2079b0a2fdeeSScott Long mpt->fw_image_size); 2080b0a2fdeeSScott Long 2081b0a2fdeeSScott Long error = mpt_enable_diag_mode(mpt); 2082b0a2fdeeSScott Long if (error != 0) { 2083b0a2fdeeSScott Long mpt_prt(mpt, "Could not enter diagnostic mode!\n"); 2084b0a2fdeeSScott Long return (EIO); 2085b0a2fdeeSScott Long } 2086b0a2fdeeSScott Long 2087b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, 2088b0a2fdeeSScott Long MPI_DIAG_RW_ENABLE|MPI_DIAG_DISABLE_ARM); 2089b0a2fdeeSScott Long 2090b0a2fdeeSScott Long fw_hdr = (MpiFwHeader_t *)mpt->fw_image; 2091b0a2fdeeSScott Long mpt_diag_outsl(mpt, fw_hdr->LoadStartAddress, (uint32_t*)fw_hdr, 2092b0a2fdeeSScott Long fw_hdr->ImageSize); 2093b0a2fdeeSScott Long 2094b0a2fdeeSScott Long ext_offset = fw_hdr->NextImageHeaderOffset; 2095b0a2fdeeSScott Long while (ext_offset != 0) { 2096b0a2fdeeSScott Long MpiExtImageHeader_t *ext; 2097b0a2fdeeSScott Long 2098b0a2fdeeSScott Long ext = (MpiExtImageHeader_t *)((uintptr_t)fw_hdr + ext_offset); 2099b0a2fdeeSScott Long ext_offset = ext->NextImageHeaderOffset; 2100b0a2fdeeSScott Long 2101b0a2fdeeSScott Long mpt_diag_outsl(mpt, ext->LoadStartAddress, (uint32_t*)ext, 2102b0a2fdeeSScott Long ext->ImageSize); 2103b0a2fdeeSScott Long } 2104b0a2fdeeSScott Long 2105b0a2fdeeSScott Long /* Setup the address to jump to on reset. */ 2106b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, fw_hdr->IopResetRegAddr); 2107b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, fw_hdr->IopResetVectorValue); 2108b0a2fdeeSScott Long 2109b0a2fdeeSScott Long /* 2110b0a2fdeeSScott Long * The controller sets the "flash bad" status after attempting 2111b0a2fdeeSScott Long * to auto-boot from flash. Clear the status so that the controller 2112b0a2fdeeSScott Long * will continue the boot process with our newly installed firmware. 2113b0a2fdeeSScott Long */ 2114b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, MPT_DIAG_MEM_CFG_BASE); 2115b0a2fdeeSScott Long data = mpt_pio_read(mpt, MPT_OFFSET_DIAG_DATA) | MPT_DIAG_MEM_CFG_BADFL; 2116b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, MPT_DIAG_MEM_CFG_BASE); 2117b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, data); 2118b0a2fdeeSScott Long 2119b0a2fdeeSScott Long /* 2120b0a2fdeeSScott Long * Re-enable the processor and clear the boot halt flag. 2121b0a2fdeeSScott Long */ 2122b0a2fdeeSScott Long data = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 2123b0a2fdeeSScott Long data &= ~(MPI_DIAG_PREVENT_IOC_BOOT|MPI_DIAG_DISABLE_ARM); 2124b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, data); 2125b0a2fdeeSScott Long 2126b0a2fdeeSScott Long mpt_disable_diag_mode(mpt); 2127b0a2fdeeSScott Long return (0); 2128b0a2fdeeSScott Long } 2129b0a2fdeeSScott Long 2130b0a2fdeeSScott Long /* 2131b0a2fdeeSScott Long * Allocate/Initialize data structures for the controller. Called 2132b0a2fdeeSScott Long * once at instance startup. 2133b0a2fdeeSScott Long */ 2134b0a2fdeeSScott Long static int 2135b0a2fdeeSScott Long mpt_configure_ioc(struct mpt_softc *mpt) 2136b0a2fdeeSScott Long { 2137b0a2fdeeSScott Long MSG_PORT_FACTS_REPLY pfp; 2138b0a2fdeeSScott Long MSG_IOC_FACTS_REPLY facts; 2139b0a2fdeeSScott Long int try; 2140b0a2fdeeSScott Long int needreset; 2141b0a2fdeeSScott Long 2142b0a2fdeeSScott Long needreset = 0; 21439b631363SMatt Jacob for (try = 0; try < MPT_MAX_TRYS; try++) { 2144b0a2fdeeSScott Long 21459b631363SMatt Jacob /* 21469b631363SMatt Jacob * No need to reset if the IOC is already in the READY state. 21479b631363SMatt Jacob * 21489b631363SMatt Jacob * Force reset if initialization failed previously. 21499b631363SMatt Jacob * Note that a hard_reset of the second channel of a '929 21509b631363SMatt Jacob * will stop operation of the first channel. Hopefully, if the 21519b631363SMatt Jacob * first channel is ok, the second will not require a hard 21529b631363SMatt Jacob * reset. 21539b631363SMatt Jacob */ 2154b0a2fdeeSScott Long if (needreset || (mpt_rd_db(mpt) & MPT_DB_STATE_MASK) != 21559b631363SMatt Jacob MPT_DB_STATE_READY) { 2156b0a2fdeeSScott Long if (mpt_reset(mpt, /*reinit*/FALSE) != MPT_OK) 21579b631363SMatt Jacob continue; 21589b631363SMatt Jacob } 2159b0a2fdeeSScott Long needreset = 0; 21609b631363SMatt Jacob 21619b631363SMatt Jacob if (mpt_get_iocfacts(mpt, &facts) != MPT_OK) { 2162b0a2fdeeSScott Long mpt_prt(mpt, "mpt_get_iocfacts failed\n"); 2163b0a2fdeeSScott Long needreset = 1; 21649b631363SMatt Jacob continue; 21657104aeefSMatt Jacob } 21667104aeefSMatt Jacob 2167b0a2fdeeSScott Long mpt->mpt_global_credits = le16toh(facts.GlobalCredits); 2168b0a2fdeeSScott Long mpt->request_frame_size = le16toh(facts.RequestFrameSize); 2169b0a2fdeeSScott Long mpt_prt(mpt, "MPI Version=%d.%d.%d.%d\n", 2170b0a2fdeeSScott Long le16toh(facts.MsgVersion) >> 8, 2171b0a2fdeeSScott Long le16toh(facts.MsgVersion) & 0xFF, 2172b0a2fdeeSScott Long le16toh(facts.HeaderVersion) >> 8, 2173b0a2fdeeSScott Long le16toh(facts.HeaderVersion) & 0xFF); 2174b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 2175b0a2fdeeSScott Long "MsgLength=%u IOCNumber = %d\n", 2176b0a2fdeeSScott Long facts.MsgLength, facts.IOCNumber); 2177b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 21787dec90bcSMatt Jacob "IOCFACTS: GlobalCredits=%d BlockSize=%u " 2179b0a2fdeeSScott Long "Request Frame Size %u\n", mpt->mpt_global_credits, 2180b0a2fdeeSScott Long facts.BlockSize * 8, mpt->request_frame_size * 8); 2181b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 2182b0a2fdeeSScott Long "IOCFACTS: Num Ports %d, FWImageSize %d, " 2183b0a2fdeeSScott Long "Flags=%#x\n", facts.NumberOfPorts, 2184b0a2fdeeSScott Long le32toh(facts.FWImageSize), facts.Flags); 2185b0a2fdeeSScott Long 2186b0a2fdeeSScott Long if ((facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT) != 0) { 2187b0a2fdeeSScott Long struct mpt_map_info mi; 2188b0a2fdeeSScott Long int error; 2189b0a2fdeeSScott Long 2190b0a2fdeeSScott Long /* 2191b0a2fdeeSScott Long * In some configurations, the IOC's firmware is 2192b0a2fdeeSScott Long * stored in a shared piece of system NVRAM that 2193b0a2fdeeSScott Long * is only accessable via the BIOS. In this 2194b0a2fdeeSScott Long * case, the firmware keeps a copy of firmware in 2195b0a2fdeeSScott Long * RAM until the OS driver retrieves it. Once 2196b0a2fdeeSScott Long * retrieved, we are responsible for re-downloading 2197b0a2fdeeSScott Long * the firmware after any hard-reset. 2198b0a2fdeeSScott Long */ 2199b0a2fdeeSScott Long mpt->fw_image_size = le32toh(facts.FWImageSize); 2200b0a2fdeeSScott Long error = mpt_dma_tag_create(mpt, mpt->parent_dmat, 2201b0a2fdeeSScott Long /*alignment*/1, /*boundary*/0, 2202b0a2fdeeSScott Long /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 2203b0a2fdeeSScott Long /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, 2204b0a2fdeeSScott Long /*filterarg*/NULL, mpt->fw_image_size, 2205b0a2fdeeSScott Long /*nsegments*/1, /*maxsegsz*/mpt->fw_image_size, 2206b0a2fdeeSScott Long /*flags*/0, &mpt->fw_dmat); 2207b0a2fdeeSScott Long if (error != 0) { 2208b0a2fdeeSScott Long mpt_prt(mpt, "cannot create fw dma tag\n"); 2209b0a2fdeeSScott Long return (ENOMEM); 22109b631363SMatt Jacob } 2211b0a2fdeeSScott Long error = bus_dmamem_alloc(mpt->fw_dmat, 2212b0a2fdeeSScott Long (void **)&mpt->fw_image, BUS_DMA_NOWAIT, 2213b0a2fdeeSScott Long &mpt->fw_dmap); 2214b0a2fdeeSScott Long if (error != 0) { 2215b0a2fdeeSScott Long mpt_prt(mpt, "cannot allocate fw mem.\n"); 2216b0a2fdeeSScott Long bus_dma_tag_destroy(mpt->fw_dmat); 2217b0a2fdeeSScott Long return (ENOMEM); 2218b0a2fdeeSScott Long } 2219b0a2fdeeSScott Long mi.mpt = mpt; 2220b0a2fdeeSScott Long mi.error = 0; 2221b0a2fdeeSScott Long bus_dmamap_load(mpt->fw_dmat, mpt->fw_dmap, 2222b0a2fdeeSScott Long mpt->fw_image, mpt->fw_image_size, mpt_map_rquest, 2223b0a2fdeeSScott Long &mi, 0); 2224b0a2fdeeSScott Long mpt->fw_phys = mi.phys; 2225b0a2fdeeSScott Long 2226b0a2fdeeSScott Long error = mpt_upload_fw(mpt); 2227b0a2fdeeSScott Long if (error != 0) { 2228b0a2fdeeSScott Long mpt_prt(mpt, "fw upload failed.\n"); 2229b0a2fdeeSScott Long bus_dmamap_unload(mpt->fw_dmat, mpt->fw_dmap); 2230b0a2fdeeSScott Long bus_dmamem_free(mpt->fw_dmat, mpt->fw_image, 2231b0a2fdeeSScott Long mpt->fw_dmap); 2232b0a2fdeeSScott Long bus_dma_tag_destroy(mpt->fw_dmat); 2233b0a2fdeeSScott Long mpt->fw_image = NULL; 2234b0a2fdeeSScott Long return (EIO); 2235b0a2fdeeSScott Long } 2236b0a2fdeeSScott Long } 22379b631363SMatt Jacob 22387104aeefSMatt Jacob if (mpt_get_portfacts(mpt, &pfp) != MPT_OK) { 2239b0a2fdeeSScott Long mpt_prt(mpt, "mpt_get_portfacts failed\n"); 2240b0a2fdeeSScott Long needreset = 1; 22417104aeefSMatt Jacob continue; 22427104aeefSMatt Jacob } 22437104aeefSMatt Jacob 2244b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 22457dec90bcSMatt Jacob "PORTFACTS: Type %x PFlags %x IID %d MaxDev %d\n", 22467dec90bcSMatt Jacob pfp.PortType, pfp.ProtocolFlags, pfp.PortSCSIID, 22477dec90bcSMatt Jacob pfp.MaxDevices); 22487104aeefSMatt Jacob 2249b0a2fdeeSScott Long mpt->mpt_port_type = pfp.PortType; 2250b0a2fdeeSScott Long mpt->mpt_proto_flags = pfp.ProtocolFlags; 22517104aeefSMatt Jacob if (pfp.PortType != MPI_PORTFACTS_PORTTYPE_SCSI && 22527104aeefSMatt Jacob pfp.PortType != MPI_PORTFACTS_PORTTYPE_FC) { 2253b0a2fdeeSScott Long mpt_prt(mpt, "Unsupported Port Type (%x)\n", 22547104aeefSMatt Jacob pfp.PortType); 22557104aeefSMatt Jacob return (ENXIO); 22567104aeefSMatt Jacob } 22577104aeefSMatt Jacob if (!(pfp.ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR)) { 2258b0a2fdeeSScott Long mpt_prt(mpt, "initiator role unsupported\n"); 22597104aeefSMatt Jacob return (ENXIO); 22607104aeefSMatt Jacob } 22617104aeefSMatt Jacob if (pfp.PortType == MPI_PORTFACTS_PORTTYPE_FC) { 22627104aeefSMatt Jacob mpt->is_fc = 1; 22637104aeefSMatt Jacob } else { 22647104aeefSMatt Jacob mpt->is_fc = 0; 22657104aeefSMatt Jacob } 22667104aeefSMatt Jacob mpt->mpt_ini_id = pfp.PortSCSIID; 22677104aeefSMatt Jacob 2268b0a2fdeeSScott Long if (mpt_enable_ioc(mpt) != 0) { 2269b0a2fdeeSScott Long mpt_prt(mpt, "Unable to initialize IOC\n"); 2270b0a2fdeeSScott Long return (ENXIO); 22717104aeefSMatt Jacob } 22727104aeefSMatt Jacob 2273b0a2fdeeSScott Long /* 2274b0a2fdeeSScott Long * Read and set up initial configuration information 2275b0a2fdeeSScott Long * (IOC and SPI only for now) 2276b0a2fdeeSScott Long * 2277b0a2fdeeSScott Long * XXX Should figure out what "personalities" are 2278b0a2fdeeSScott Long * available and defer all initialization junk to 2279b0a2fdeeSScott Long * them. 2280b0a2fdeeSScott Long */ 2281b0a2fdeeSScott Long mpt_read_config_info_ioc(mpt); 2282b0a2fdeeSScott Long 2283b0a2fdeeSScott Long if (mpt->is_fc == 0) { 2284b0a2fdeeSScott Long if (mpt_read_config_info_spi(mpt)) { 2285b0a2fdeeSScott Long return (EIO); 22869b631363SMatt Jacob } 2287b0a2fdeeSScott Long if (mpt_set_initial_config_spi(mpt)) { 2288b0a2fdeeSScott Long return (EIO); 2289b0a2fdeeSScott Long } 2290b0a2fdeeSScott Long } 2291b0a2fdeeSScott Long 2292b0a2fdeeSScott Long /* Everything worked */ 2293b0a2fdeeSScott Long break; 2294b0a2fdeeSScott Long } 2295b0a2fdeeSScott Long 2296b0a2fdeeSScott Long if (try >= MPT_MAX_TRYS) { 2297b0a2fdeeSScott Long mpt_prt(mpt, "failed to initialize IOC"); 2298b0a2fdeeSScott Long return (EIO); 2299b0a2fdeeSScott Long } 2300b0a2fdeeSScott Long 2301b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "enabling interrupts\n"); 2302b0a2fdeeSScott Long 2303b0a2fdeeSScott Long mpt_enable_ints(mpt); 2304b0a2fdeeSScott Long return (0); 2305b0a2fdeeSScott Long } 2306b0a2fdeeSScott Long 2307b0a2fdeeSScott Long static int 2308b0a2fdeeSScott Long mpt_enable_ioc(struct mpt_softc *mpt) 2309b0a2fdeeSScott Long { 2310b0a2fdeeSScott Long uint32_t pptr; 2311b0a2fdeeSScott Long int val; 2312b0a2fdeeSScott Long 2313b0a2fdeeSScott Long if (mpt_send_ioc_init(mpt, MPT_DB_INIT_HOST) != MPT_OK) { 2314b0a2fdeeSScott Long mpt_prt(mpt, "mpt_send_ioc_init failed\n"); 2315b0a2fdeeSScott Long return (EIO); 2316b0a2fdeeSScott Long } 2317b0a2fdeeSScott Long 2318b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_send_ioc_init ok\n"); 23199b631363SMatt Jacob 23209b631363SMatt Jacob if (mpt_wait_state(mpt, MPT_DB_STATE_RUNNING) != MPT_OK) { 2321b0a2fdeeSScott Long mpt_prt(mpt, "IOC failed to go to run state\n"); 2322b0a2fdeeSScott Long return (ENXIO); 23237104aeefSMatt Jacob } 2324b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC now at RUNSTATE"); 23259b631363SMatt Jacob 23269b631363SMatt Jacob /* 23279b631363SMatt Jacob * Give it reply buffers 23289b631363SMatt Jacob * 2329b0a2fdeeSScott Long * Do *not* exceed global credits. 23309b631363SMatt Jacob */ 23319b631363SMatt Jacob for (val = 0, pptr = mpt->reply_phys; 23329b631363SMatt Jacob (pptr + MPT_REPLY_SIZE) < (mpt->reply_phys + PAGE_SIZE); 23339b631363SMatt Jacob pptr += MPT_REPLY_SIZE) { 23349b631363SMatt Jacob mpt_free_reply(mpt, pptr); 23359b631363SMatt Jacob if (++val == mpt->mpt_global_credits - 1) 23369b631363SMatt Jacob break; 23379b631363SMatt Jacob } 23389b631363SMatt Jacob 23397104aeefSMatt Jacob /* 23407104aeefSMatt Jacob * Enable asynchronous event reporting 23417104aeefSMatt Jacob */ 23429b631363SMatt Jacob mpt_send_event_request(mpt, 1); 23439b631363SMatt Jacob 23447104aeefSMatt Jacob /* 23457104aeefSMatt Jacob * Now enable the port 23467104aeefSMatt Jacob */ 23479b631363SMatt Jacob if (mpt_send_port_enable(mpt, 0) != MPT_OK) { 2348b0a2fdeeSScott Long mpt_prt(mpt, "failed to enable port 0\n"); 2349b0a2fdeeSScott Long return (ENXIO); 23507104aeefSMatt Jacob } 23517104aeefSMatt Jacob 2352b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "enabled port 0\n"); 23539b631363SMatt Jacob 23549b631363SMatt Jacob return (0); 23559b631363SMatt Jacob } 2356