1098ca2bdSWarner Losh /*- 29b631363SMatt Jacob * Generic routines for LSI '909 FC adapters. 39b631363SMatt Jacob * FreeBSD Version. 49b631363SMatt Jacob * 59b631363SMatt Jacob * Copyright (c) 2000, 2001 by Greg Ansley 69b631363SMatt Jacob * 79b631363SMatt Jacob * Redistribution and use in source and binary forms, with or without 89b631363SMatt Jacob * modification, are permitted provided that the following conditions 99b631363SMatt Jacob * are met: 109b631363SMatt Jacob * 1. Redistributions of source code must retain the above copyright 119b631363SMatt Jacob * notice immediately at the beginning of the file, without modification, 129b631363SMatt Jacob * this list of conditions, and the following disclaimer. 139b631363SMatt Jacob * 2. The name of the author may not be used to endorse or promote products 149b631363SMatt Jacob * derived from this software without specific prior written permission. 159b631363SMatt Jacob * 169b631363SMatt Jacob * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 179b631363SMatt Jacob * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 189b631363SMatt Jacob * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 199b631363SMatt Jacob * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 209b631363SMatt Jacob * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 219b631363SMatt Jacob * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 229b631363SMatt Jacob * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 239b631363SMatt Jacob * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 249b631363SMatt Jacob * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 259b631363SMatt Jacob * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 269b631363SMatt Jacob * SUCH DAMAGE. 27b0a2fdeeSScott Long * 28b0a2fdeeSScott Long * Additional Copyright (c) 2002 by Matthew Jacob under same license. 299b631363SMatt Jacob */ 309b631363SMatt Jacob /* 31b0a2fdeeSScott Long * Copyright (c) 2004, Avid Technology, Inc. and its contributors. 32b0a2fdeeSScott Long * Copyright (c) 2005, WHEEL Sp. z o.o. 33b0a2fdeeSScott Long * Copyright (c) 2004, 2005 Justin T. Gibbs 34b0a2fdeeSScott Long * All rights reserved. 35b0a2fdeeSScott Long * 36b0a2fdeeSScott Long * Redistribution and use in source and binary forms, with or without 37b0a2fdeeSScott Long * modification, are permitted provided that the following conditions are 38b0a2fdeeSScott Long * met: 39b0a2fdeeSScott Long * 1. Redistributions of source code must retain the above copyright 40b0a2fdeeSScott Long * notice, this list of conditions and the following disclaimer. 41b0a2fdeeSScott Long * 2. Redistributions in binary form must reproduce at minimum a disclaimer 42b0a2fdeeSScott Long * substantially similar to the "NO WARRANTY" disclaimer below 43b0a2fdeeSScott Long * ("Disclaimer") and any redistribution must be conditioned upon including 44b0a2fdeeSScott Long * a substantially similar Disclaimer requirement for further binary 45b0a2fdeeSScott Long * redistribution. 46286e947fSJustin T. Gibbs * 3. Neither the names of the above listed copyright holders nor the names 47286e947fSJustin T. Gibbs * of any contributors may be used to endorse or promote products derived 48286e947fSJustin T. Gibbs * from this software without specific prior written permission. 49b0a2fdeeSScott Long * 50b0a2fdeeSScott Long * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 51b0a2fdeeSScott Long * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52b0a2fdeeSScott Long * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53b0a2fdeeSScott Long * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 54b0a2fdeeSScott Long * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55b0a2fdeeSScott Long * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56b0a2fdeeSScott Long * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57b0a2fdeeSScott Long * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58b0a2fdeeSScott Long * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59b0a2fdeeSScott Long * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 60b0a2fdeeSScott Long * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 619b631363SMatt Jacob */ 629b631363SMatt Jacob 639295c6c5SDavid E. O'Brien #include <sys/cdefs.h> 649295c6c5SDavid E. O'Brien __FBSDID("$FreeBSD$"); 659295c6c5SDavid E. O'Brien 66b0a2fdeeSScott Long #include <dev/mpt/mpt.h> 67b0a2fdeeSScott Long #include <dev/mpt/mpt_cam.h> /* XXX For static handler registration */ 68b0a2fdeeSScott Long #include <dev/mpt/mpt_raid.h> /* XXX For static handler registration */ 69b0a2fdeeSScott Long 70b0a2fdeeSScott Long #include <dev/mpt/mpilib/mpi.h> 71b0a2fdeeSScott Long #include <dev/mpt/mpilib/mpi_ioc.h> 72b0a2fdeeSScott Long 73b0a2fdeeSScott Long #include <sys/sysctl.h> 747104aeefSMatt Jacob 759b631363SMatt Jacob #define MPT_MAX_TRYS 3 769b631363SMatt Jacob #define MPT_MAX_WAIT 300000 779b631363SMatt Jacob 789b631363SMatt Jacob static int maxwait_ack = 0; 799b631363SMatt Jacob static int maxwait_int = 0; 809b631363SMatt Jacob static int maxwait_state = 0; 819b631363SMatt Jacob 82b0a2fdeeSScott Long TAILQ_HEAD(, mpt_softc) mpt_tailq = TAILQ_HEAD_INITIALIZER(mpt_tailq); 83b0a2fdeeSScott Long mpt_reply_handler_t *mpt_reply_handlers[MPT_NUM_REPLY_HANDLERS]; 849b631363SMatt Jacob 85b0a2fdeeSScott Long static mpt_reply_handler_t mpt_default_reply_handler; 86b0a2fdeeSScott Long static mpt_reply_handler_t mpt_config_reply_handler; 87b0a2fdeeSScott Long static mpt_reply_handler_t mpt_handshake_reply_handler; 88b0a2fdeeSScott Long static mpt_reply_handler_t mpt_event_reply_handler; 89b0a2fdeeSScott Long static void mpt_send_event_ack(struct mpt_softc *mpt, request_t *ack_req, 90b0a2fdeeSScott Long MSG_EVENT_NOTIFY_REPLY *msg, uint32_t context); 91444dd2b6SMatt Jacob static int mpt_send_event_request(struct mpt_softc *mpt, int onoff); 92b0a2fdeeSScott Long static int mpt_soft_reset(struct mpt_softc *mpt); 93b0a2fdeeSScott Long static void mpt_hard_reset(struct mpt_softc *mpt); 94b0a2fdeeSScott Long static int mpt_configure_ioc(struct mpt_softc *mpt); 95b0a2fdeeSScott Long static int mpt_enable_ioc(struct mpt_softc *mpt); 96b0a2fdeeSScott Long 97b0a2fdeeSScott Long /************************* Personality Module Support *************************/ 98b0a2fdeeSScott Long /* 99b0a2fdeeSScott Long * We include one extra entry that is guaranteed to be NULL 100b0a2fdeeSScott Long * to simplify our itterator. 101b0a2fdeeSScott Long */ 102b0a2fdeeSScott Long static struct mpt_personality *mpt_personalities[MPT_MAX_PERSONALITIES + 1]; 103b0a2fdeeSScott Long static __inline struct mpt_personality* 104b0a2fdeeSScott Long mpt_pers_find(struct mpt_softc *, u_int); 105b0a2fdeeSScott Long static __inline struct mpt_personality* 106b0a2fdeeSScott Long mpt_pers_find_reverse(struct mpt_softc *, u_int); 107b0a2fdeeSScott Long 108b0a2fdeeSScott Long static __inline struct mpt_personality * 109b0a2fdeeSScott Long mpt_pers_find(struct mpt_softc *mpt, u_int start_at) 110b0a2fdeeSScott Long { 111b0a2fdeeSScott Long KASSERT(start_at <= MPT_MAX_PERSONALITIES, 112b0a2fdeeSScott Long ("mpt_pers_find: starting position out of range\n")); 113b0a2fdeeSScott Long 114b0a2fdeeSScott Long while (start_at < MPT_MAX_PERSONALITIES 115b0a2fdeeSScott Long && (mpt->mpt_pers_mask & (0x1 << start_at)) == 0) { 116b0a2fdeeSScott Long start_at++; 117b0a2fdeeSScott Long } 118b0a2fdeeSScott Long return (mpt_personalities[start_at]); 119b0a2fdeeSScott Long } 120b0a2fdeeSScott Long 121b0a2fdeeSScott Long /* 122b0a2fdeeSScott Long * Used infrequenstly, so no need to optimize like a forward 123b0a2fdeeSScott Long * traversal where we use the MAX+1 is guaranteed to be NULL 124b0a2fdeeSScott Long * trick. 125b0a2fdeeSScott Long */ 126b0a2fdeeSScott Long static __inline struct mpt_personality * 127b0a2fdeeSScott Long mpt_pers_find_reverse(struct mpt_softc *mpt, u_int start_at) 128b0a2fdeeSScott Long { 129b0a2fdeeSScott Long while (start_at < MPT_MAX_PERSONALITIES 130b0a2fdeeSScott Long && (mpt->mpt_pers_mask & (0x1 << start_at)) == 0) { 131b0a2fdeeSScott Long start_at--; 132b0a2fdeeSScott Long } 133b0a2fdeeSScott Long if (start_at < MPT_MAX_PERSONALITIES) 134b0a2fdeeSScott Long return (mpt_personalities[start_at]); 135b0a2fdeeSScott Long return (NULL); 136b0a2fdeeSScott Long } 137b0a2fdeeSScott Long 138b0a2fdeeSScott Long #define MPT_PERS_FOREACH(mpt, pers) \ 139b0a2fdeeSScott Long for (pers = mpt_pers_find(mpt, /*start_at*/0); \ 140b0a2fdeeSScott Long pers != NULL; \ 141b0a2fdeeSScott Long pers = mpt_pers_find(mpt, /*start_at*/pers->id+1)) 142b0a2fdeeSScott Long 143b0a2fdeeSScott Long #define MPT_PERS_FOREACH_REVERSE(mpt, pers) \ 144b0a2fdeeSScott Long for (pers = mpt_pers_find_reverse(mpt, MPT_MAX_PERSONALITIES-1);\ 145b0a2fdeeSScott Long pers != NULL; \ 146b0a2fdeeSScott Long pers = mpt_pers_find_reverse(mpt, /*start_at*/pers->id-1)) 147b0a2fdeeSScott Long 148b0a2fdeeSScott Long static mpt_load_handler_t mpt_stdload; 149b0a2fdeeSScott Long static mpt_probe_handler_t mpt_stdprobe; 150b0a2fdeeSScott Long static mpt_attach_handler_t mpt_stdattach; 151b0a2fdeeSScott Long static mpt_event_handler_t mpt_stdevent; 152b0a2fdeeSScott Long static mpt_reset_handler_t mpt_stdreset; 153b0a2fdeeSScott Long static mpt_shutdown_handler_t mpt_stdshutdown; 154b0a2fdeeSScott Long static mpt_detach_handler_t mpt_stddetach; 155b0a2fdeeSScott Long static mpt_unload_handler_t mpt_stdunload; 156b0a2fdeeSScott Long static struct mpt_personality mpt_default_personality = 157b0a2fdeeSScott Long { 158b0a2fdeeSScott Long .load = mpt_stdload, 159b0a2fdeeSScott Long .probe = mpt_stdprobe, 160b0a2fdeeSScott Long .attach = mpt_stdattach, 161b0a2fdeeSScott Long .event = mpt_stdevent, 162b0a2fdeeSScott Long .reset = mpt_stdreset, 163b0a2fdeeSScott Long .shutdown = mpt_stdshutdown, 164b0a2fdeeSScott Long .detach = mpt_stddetach, 165b0a2fdeeSScott Long .unload = mpt_stdunload 166b0a2fdeeSScott Long }; 167b0a2fdeeSScott Long 168b0a2fdeeSScott Long static mpt_load_handler_t mpt_core_load; 169b0a2fdeeSScott Long static mpt_attach_handler_t mpt_core_attach; 170b0a2fdeeSScott Long static mpt_reset_handler_t mpt_core_ioc_reset; 171b0a2fdeeSScott Long static mpt_event_handler_t mpt_core_event; 172b0a2fdeeSScott Long static mpt_shutdown_handler_t mpt_core_shutdown; 173b0a2fdeeSScott Long static mpt_shutdown_handler_t mpt_core_detach; 174b0a2fdeeSScott Long static mpt_unload_handler_t mpt_core_unload; 175b0a2fdeeSScott Long static struct mpt_personality mpt_core_personality = 176b0a2fdeeSScott Long { 177b0a2fdeeSScott Long .name = "mpt_core", 178b0a2fdeeSScott Long .load = mpt_core_load, 179b0a2fdeeSScott Long .attach = mpt_core_attach, 180b0a2fdeeSScott Long .event = mpt_core_event, 181b0a2fdeeSScott Long .reset = mpt_core_ioc_reset, 182b0a2fdeeSScott Long .shutdown = mpt_core_shutdown, 183b0a2fdeeSScott Long .detach = mpt_core_detach, 184b0a2fdeeSScott Long .unload = mpt_core_unload, 185b0a2fdeeSScott Long }; 186b0a2fdeeSScott Long 187b0a2fdeeSScott Long /* 188b0a2fdeeSScott Long * Manual declaration so that DECLARE_MPT_PERSONALITY doesn't need 189b0a2fdeeSScott Long * ordering information. We want the core to always register FIRST. 190b0a2fdeeSScott Long * other modules are set to SI_ORDER_SECOND. 191b0a2fdeeSScott Long */ 192b0a2fdeeSScott Long static moduledata_t mpt_core_mod = { 193b0a2fdeeSScott Long "mpt_core", mpt_modevent, &mpt_core_personality 194b0a2fdeeSScott Long }; 195b0a2fdeeSScott Long DECLARE_MODULE(mpt_core, mpt_core_mod, SI_SUB_DRIVERS, SI_ORDER_FIRST); 196b0a2fdeeSScott Long MODULE_VERSION(mpt_core, 1); 197b0a2fdeeSScott Long 198b0a2fdeeSScott Long #define MPT_PERS_ATACHED(pers, mpt) \ 199b0a2fdeeSScott Long ((mpt)->pers_mask & (0x1 << pers->id)) 200b0a2fdeeSScott Long 201b0a2fdeeSScott Long 202b0a2fdeeSScott Long int 203b0a2fdeeSScott Long mpt_modevent(module_t mod, int type, void *data) 204b0a2fdeeSScott Long { 205b0a2fdeeSScott Long struct mpt_personality *pers; 206b0a2fdeeSScott Long int error; 207b0a2fdeeSScott Long 208b0a2fdeeSScott Long pers = (struct mpt_personality *)data; 209b0a2fdeeSScott Long 210b0a2fdeeSScott Long error = 0; 211b0a2fdeeSScott Long switch (type) { 212b0a2fdeeSScott Long case MOD_LOAD: 213b0a2fdeeSScott Long { 214b0a2fdeeSScott Long mpt_load_handler_t **def_handler; 215b0a2fdeeSScott Long mpt_load_handler_t **pers_handler; 216b0a2fdeeSScott Long int i; 217b0a2fdeeSScott Long 218b0a2fdeeSScott Long for (i = 0; i < MPT_MAX_PERSONALITIES; i++) { 219b0a2fdeeSScott Long if (mpt_personalities[i] == NULL) 220b0a2fdeeSScott Long break; 221b0a2fdeeSScott Long } 222b0a2fdeeSScott Long if (i >= MPT_MAX_PERSONALITIES) { 223b0a2fdeeSScott Long error = ENOMEM; 224b0a2fdeeSScott Long break; 225b0a2fdeeSScott Long } 226b0a2fdeeSScott Long pers->id = i; 227b0a2fdeeSScott Long mpt_personalities[i] = pers; 228b0a2fdeeSScott Long 229b0a2fdeeSScott Long /* Install standard/noop handlers for any NULL entries. */ 230b0a2fdeeSScott Long def_handler = MPT_PERS_FIRST_HANDLER(&mpt_default_personality); 231b0a2fdeeSScott Long pers_handler = MPT_PERS_FIRST_HANDLER(pers); 232b0a2fdeeSScott Long while (pers_handler <= MPT_PERS_LAST_HANDLER(pers)) { 233b0a2fdeeSScott Long if (*pers_handler == NULL) 234b0a2fdeeSScott Long *pers_handler = *def_handler; 235b0a2fdeeSScott Long pers_handler++; 236b0a2fdeeSScott Long def_handler++; 237b0a2fdeeSScott Long } 238b0a2fdeeSScott Long 239b0a2fdeeSScott Long error = (pers->load(pers)); 240b0a2fdeeSScott Long if (error != 0) 241b0a2fdeeSScott Long mpt_personalities[i] = NULL; 242b0a2fdeeSScott Long break; 243b0a2fdeeSScott Long } 244b0a2fdeeSScott Long case MOD_SHUTDOWN: 245b0a2fdeeSScott Long break; 246b0a2fdeeSScott Long case MOD_QUIESCE: 247b0a2fdeeSScott Long break; 248b0a2fdeeSScott Long case MOD_UNLOAD: 249b0a2fdeeSScott Long error = pers->unload(pers); 250b0a2fdeeSScott Long mpt_personalities[pers->id] = NULL; 251b0a2fdeeSScott Long break; 252b0a2fdeeSScott Long default: 253b0a2fdeeSScott Long error = EINVAL; 254b0a2fdeeSScott Long break; 255b0a2fdeeSScott Long } 256b0a2fdeeSScott Long return (error); 257b0a2fdeeSScott Long } 258b0a2fdeeSScott Long 259b0a2fdeeSScott Long int 260b0a2fdeeSScott Long mpt_stdload(struct mpt_personality *pers) 261b0a2fdeeSScott Long { 262b0a2fdeeSScott Long /* Load is always successfull. */ 263b0a2fdeeSScott Long return (0); 264b0a2fdeeSScott Long } 265b0a2fdeeSScott Long 266b0a2fdeeSScott Long int 267b0a2fdeeSScott Long mpt_stdprobe(struct mpt_softc *mpt) 268b0a2fdeeSScott Long { 269b0a2fdeeSScott Long /* Probe is always successfull. */ 270b0a2fdeeSScott Long return (0); 271b0a2fdeeSScott Long } 272b0a2fdeeSScott Long 273b0a2fdeeSScott Long int 274b0a2fdeeSScott Long mpt_stdattach(struct mpt_softc *mpt) 275b0a2fdeeSScott Long { 276b0a2fdeeSScott Long /* Attach is always successfull. */ 277b0a2fdeeSScott Long return (0); 278b0a2fdeeSScott Long } 279b0a2fdeeSScott Long 280b0a2fdeeSScott Long int 281444dd2b6SMatt Jacob mpt_stdevent(struct mpt_softc *mpt, request_t *req, MSG_EVENT_NOTIFY_REPLY *msg) 282b0a2fdeeSScott Long { 283444dd2b6SMatt Jacob mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_stdevent: 0x%x\n", msg->Event & 0xFF); 284b0a2fdeeSScott Long /* Event was not for us. */ 285b0a2fdeeSScott Long return (0); 286b0a2fdeeSScott Long } 287b0a2fdeeSScott Long 288b0a2fdeeSScott Long void 289b0a2fdeeSScott Long mpt_stdreset(struct mpt_softc *mpt, int type) 290b0a2fdeeSScott Long { 291b0a2fdeeSScott Long } 292b0a2fdeeSScott Long 293b0a2fdeeSScott Long void 294b0a2fdeeSScott Long mpt_stdshutdown(struct mpt_softc *mpt) 295b0a2fdeeSScott Long { 296b0a2fdeeSScott Long } 297b0a2fdeeSScott Long 298b0a2fdeeSScott Long void 299b0a2fdeeSScott Long mpt_stddetach(struct mpt_softc *mpt) 300b0a2fdeeSScott Long { 301b0a2fdeeSScott Long } 302b0a2fdeeSScott Long 303b0a2fdeeSScott Long int 304b0a2fdeeSScott Long mpt_stdunload(struct mpt_personality *pers) 305b0a2fdeeSScott Long { 306b0a2fdeeSScott Long /* Unload is always successfull. */ 307b0a2fdeeSScott Long return (0); 308b0a2fdeeSScott Long } 309b0a2fdeeSScott Long 310b0a2fdeeSScott Long /******************************* Bus DMA Support ******************************/ 311b0a2fdeeSScott Long void 312b0a2fdeeSScott Long mpt_map_rquest(void *arg, bus_dma_segment_t *segs, int nseg, int error) 313b0a2fdeeSScott Long { 314b0a2fdeeSScott Long struct mpt_map_info *map_info; 315b0a2fdeeSScott Long 316b0a2fdeeSScott Long map_info = (struct mpt_map_info *)arg; 317b0a2fdeeSScott Long map_info->error = error; 318b0a2fdeeSScott Long map_info->phys = segs->ds_addr; 319b0a2fdeeSScott Long } 320b0a2fdeeSScott Long 321b0a2fdeeSScott Long /**************************** Reply/Event Handling ****************************/ 322b0a2fdeeSScott Long int 323b0a2fdeeSScott Long mpt_register_handler(struct mpt_softc *mpt, mpt_handler_type type, 324b0a2fdeeSScott Long mpt_handler_t handler, uint32_t *phandler_id) 325b0a2fdeeSScott Long { 326b0a2fdeeSScott Long 327b0a2fdeeSScott Long switch (type) { 328b0a2fdeeSScott Long case MPT_HANDLER_REPLY: 329b0a2fdeeSScott Long { 330b0a2fdeeSScott Long u_int cbi; 331b0a2fdeeSScott Long u_int free_cbi; 332b0a2fdeeSScott Long 333b0a2fdeeSScott Long if (phandler_id == NULL) 334b0a2fdeeSScott Long return (EINVAL); 335b0a2fdeeSScott Long 336b0a2fdeeSScott Long free_cbi = MPT_HANDLER_ID_NONE; 337b0a2fdeeSScott Long for (cbi = 0; cbi < MPT_NUM_REPLY_HANDLERS; cbi++) { 338b0a2fdeeSScott Long /* 339b0a2fdeeSScott Long * If the same handler is registered multiple 340b0a2fdeeSScott Long * times, don't error out. Just return the 341b0a2fdeeSScott Long * index of the original registration. 342b0a2fdeeSScott Long */ 343b0a2fdeeSScott Long if (mpt_reply_handlers[cbi] == handler.reply_handler) { 344b0a2fdeeSScott Long *phandler_id = MPT_CBI_TO_HID(cbi); 345b0a2fdeeSScott Long return (0); 346b0a2fdeeSScott Long } 347b0a2fdeeSScott Long 348b0a2fdeeSScott Long /* 349b0a2fdeeSScott Long * Fill from the front in the hope that 350b0a2fdeeSScott Long * all registered handlers consume only a 351b0a2fdeeSScott Long * single cache line. 352b0a2fdeeSScott Long * 353b0a2fdeeSScott Long * We don't break on the first empty slot so 354b0a2fdeeSScott Long * that the full table is checked to see if 355b0a2fdeeSScott Long * this handler was previously registered. 356b0a2fdeeSScott Long */ 357b0a2fdeeSScott Long if (free_cbi == MPT_HANDLER_ID_NONE 358b0a2fdeeSScott Long && (mpt_reply_handlers[cbi] 359b0a2fdeeSScott Long == mpt_default_reply_handler)) 360b0a2fdeeSScott Long free_cbi = cbi; 361b0a2fdeeSScott Long } 362b0a2fdeeSScott Long if (free_cbi == MPT_HANDLER_ID_NONE) 363b0a2fdeeSScott Long return (ENOMEM); 364b0a2fdeeSScott Long mpt_reply_handlers[free_cbi] = handler.reply_handler; 365b0a2fdeeSScott Long *phandler_id = MPT_CBI_TO_HID(free_cbi); 366b0a2fdeeSScott Long break; 367b0a2fdeeSScott Long } 368b0a2fdeeSScott Long default: 369b0a2fdeeSScott Long mpt_prt(mpt, "mpt_register_handler unknown type %d\n", type); 370b0a2fdeeSScott Long return (EINVAL); 371b0a2fdeeSScott Long } 372b0a2fdeeSScott Long return (0); 373b0a2fdeeSScott Long } 374b0a2fdeeSScott Long 375b0a2fdeeSScott Long int 376b0a2fdeeSScott Long mpt_deregister_handler(struct mpt_softc *mpt, mpt_handler_type type, 377b0a2fdeeSScott Long mpt_handler_t handler, uint32_t handler_id) 378b0a2fdeeSScott Long { 379b0a2fdeeSScott Long 380b0a2fdeeSScott Long switch (type) { 381b0a2fdeeSScott Long case MPT_HANDLER_REPLY: 382b0a2fdeeSScott Long { 383b0a2fdeeSScott Long u_int cbi; 384b0a2fdeeSScott Long 385b0a2fdeeSScott Long cbi = MPT_CBI(handler_id); 386b0a2fdeeSScott Long if (cbi >= MPT_NUM_REPLY_HANDLERS 387b0a2fdeeSScott Long || mpt_reply_handlers[cbi] != handler.reply_handler) 388b0a2fdeeSScott Long return (ENOENT); 389b0a2fdeeSScott Long mpt_reply_handlers[cbi] = mpt_default_reply_handler; 390b0a2fdeeSScott Long break; 391b0a2fdeeSScott Long } 392b0a2fdeeSScott Long default: 393b0a2fdeeSScott Long mpt_prt(mpt, "mpt_deregister_handler unknown type %d\n", type); 394b0a2fdeeSScott Long return (EINVAL); 395b0a2fdeeSScott Long } 396b0a2fdeeSScott Long return (0); 397b0a2fdeeSScott Long } 398b0a2fdeeSScott Long 399b0a2fdeeSScott Long static int 400b0a2fdeeSScott Long mpt_default_reply_handler(struct mpt_softc *mpt, request_t *req, 401b0a2fdeeSScott Long MSG_DEFAULT_REPLY *reply_frame) 402b0a2fdeeSScott Long { 403b0a2fdeeSScott Long mpt_prt(mpt, "XXXX Default Handler Called. Req %p, Frame %p\n", 404b0a2fdeeSScott Long req, reply_frame); 405b0a2fdeeSScott Long 406b0a2fdeeSScott Long if (reply_frame != NULL) 407b0a2fdeeSScott Long mpt_dump_reply_frame(mpt, reply_frame); 408b0a2fdeeSScott Long 409b0a2fdeeSScott Long mpt_prt(mpt, "XXXX Reply Frame Ignored\n"); 410b0a2fdeeSScott Long 411b0a2fdeeSScott Long return (/*free_reply*/TRUE); 412b0a2fdeeSScott Long } 413b0a2fdeeSScott Long 414b0a2fdeeSScott Long static int 415b0a2fdeeSScott Long mpt_config_reply_handler(struct mpt_softc *mpt, request_t *req, 416b0a2fdeeSScott Long MSG_DEFAULT_REPLY *reply_frame) 417b0a2fdeeSScott Long { 418b0a2fdeeSScott Long if (req != NULL) { 419b0a2fdeeSScott Long 420b0a2fdeeSScott Long if (reply_frame != NULL) { 421b0a2fdeeSScott Long MSG_CONFIG *cfgp; 422b0a2fdeeSScott Long MSG_CONFIG_REPLY *reply; 423b0a2fdeeSScott Long 424b0a2fdeeSScott Long cfgp = (MSG_CONFIG *)req->req_vbuf; 425b0a2fdeeSScott Long reply = (MSG_CONFIG_REPLY *)reply_frame; 426b0a2fdeeSScott Long req->IOCStatus = le16toh(reply_frame->IOCStatus); 427b0a2fdeeSScott Long bcopy(&reply->Header, &cfgp->Header, 428b0a2fdeeSScott Long sizeof(cfgp->Header)); 429b0a2fdeeSScott Long } 430b0a2fdeeSScott Long req->state &= ~REQ_STATE_QUEUED; 431b0a2fdeeSScott Long req->state |= REQ_STATE_DONE; 432b0a2fdeeSScott Long TAILQ_REMOVE(&mpt->request_pending_list, req, links); 433b0a2fdeeSScott Long 434b0a2fdeeSScott Long if ((req->state & REQ_STATE_NEED_WAKEUP) != 0) 435b0a2fdeeSScott Long wakeup(req); 436b0a2fdeeSScott Long } 437b0a2fdeeSScott Long 438b0a2fdeeSScott Long return (/*free_reply*/TRUE); 439b0a2fdeeSScott Long } 440b0a2fdeeSScott Long 441b0a2fdeeSScott Long static int 442b0a2fdeeSScott Long mpt_handshake_reply_handler(struct mpt_softc *mpt, request_t *req, 443b0a2fdeeSScott Long MSG_DEFAULT_REPLY *reply_frame) 444b0a2fdeeSScott Long { 445b0a2fdeeSScott Long /* Nothing to be done. */ 446b0a2fdeeSScott Long return (/*free_reply*/TRUE); 447b0a2fdeeSScott Long } 448b0a2fdeeSScott Long 449b0a2fdeeSScott Long static int 450b0a2fdeeSScott Long mpt_event_reply_handler(struct mpt_softc *mpt, request_t *req, 451b0a2fdeeSScott Long MSG_DEFAULT_REPLY *reply_frame) 452b0a2fdeeSScott Long { 453b0a2fdeeSScott Long int free_reply; 454b0a2fdeeSScott Long 455b0a2fdeeSScott Long if (reply_frame == NULL) { 456b0a2fdeeSScott Long mpt_prt(mpt, "Event Handler: req %p - Unexpected NULL reply\n"); 457b0a2fdeeSScott Long return (/*free_reply*/TRUE); 458b0a2fdeeSScott Long } 459b0a2fdeeSScott Long 460b0a2fdeeSScott Long free_reply = TRUE; 461b0a2fdeeSScott Long switch (reply_frame->Function) { 462b0a2fdeeSScott Long case MPI_FUNCTION_EVENT_NOTIFICATION: 463b0a2fdeeSScott Long { 464b0a2fdeeSScott Long MSG_EVENT_NOTIFY_REPLY *msg; 465b0a2fdeeSScott Long struct mpt_personality *pers; 466b0a2fdeeSScott Long u_int handled; 467b0a2fdeeSScott Long 468b0a2fdeeSScott Long handled = 0; 469b0a2fdeeSScott Long msg = (MSG_EVENT_NOTIFY_REPLY *)reply_frame; 470b0a2fdeeSScott Long MPT_PERS_FOREACH(mpt, pers) 471b0a2fdeeSScott Long handled += pers->event(mpt, req, msg); 472b0a2fdeeSScott Long 473444dd2b6SMatt Jacob if (handled == 0 && mpt->mpt_pers_mask == 0) { 474444dd2b6SMatt Jacob mpt_lprt(mpt, MPT_PRT_WARN, 475444dd2b6SMatt Jacob "No Handlers For Any Event Notify Frames. " 476444dd2b6SMatt Jacob "Event %#x (ACK %sequired).\n", 477444dd2b6SMatt Jacob msg->Event, msg->AckRequired? "r" : "not r"); 478444dd2b6SMatt Jacob } else if (handled == 0) { 479b0a2fdeeSScott Long mpt_prt(mpt, 480444dd2b6SMatt Jacob "Unhandled Event Notify Frame. Event %#x " 481444dd2b6SMatt Jacob "(ACK %sequired).\n", 482444dd2b6SMatt Jacob msg->Event, msg->AckRequired? "r" : "not r"); 483444dd2b6SMatt Jacob } 484b0a2fdeeSScott Long 485b0a2fdeeSScott Long if (msg->AckRequired) { 486b0a2fdeeSScott Long request_t *ack_req; 487b0a2fdeeSScott Long uint32_t context; 488b0a2fdeeSScott Long 489b0a2fdeeSScott Long context = htole32(req->index|MPT_REPLY_HANDLER_EVENTS); 490b0a2fdeeSScott Long ack_req = mpt_get_request(mpt, /*sleep_ok*/FALSE); 491b0a2fdeeSScott Long if (ack_req == NULL) { 492b0a2fdeeSScott Long struct mpt_evtf_record *evtf; 493b0a2fdeeSScott Long 494b0a2fdeeSScott Long evtf = (struct mpt_evtf_record *)reply_frame; 495b0a2fdeeSScott Long evtf->context = context; 496b0a2fdeeSScott Long LIST_INSERT_HEAD(&mpt->ack_frames, evtf, links); 497b0a2fdeeSScott Long free_reply = FALSE; 498b0a2fdeeSScott Long break; 499b0a2fdeeSScott Long } 500b0a2fdeeSScott Long mpt_send_event_ack(mpt, ack_req, msg, context); 501b0a2fdeeSScott Long } 502b0a2fdeeSScott Long break; 503b0a2fdeeSScott Long } 504b0a2fdeeSScott Long case MPI_FUNCTION_PORT_ENABLE: 505b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "enable port reply\n"); 506b0a2fdeeSScott Long break; 507b0a2fdeeSScott Long case MPI_FUNCTION_EVENT_ACK: 508b0a2fdeeSScott Long break; 509b0a2fdeeSScott Long default: 510b0a2fdeeSScott Long mpt_prt(mpt, "Unknown Event Function: %x\n", 511b0a2fdeeSScott Long reply_frame->Function); 512b0a2fdeeSScott Long break; 513b0a2fdeeSScott Long } 514b0a2fdeeSScott Long 515b0a2fdeeSScott Long if (req != NULL 516b0a2fdeeSScott Long && (reply_frame->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY) == 0) { 517b0a2fdeeSScott Long 518b0a2fdeeSScott Long req->state &= ~REQ_STATE_QUEUED; 519b0a2fdeeSScott Long req->state |= REQ_STATE_DONE; 520b0a2fdeeSScott Long TAILQ_REMOVE(&mpt->request_pending_list, req, links); 521b0a2fdeeSScott Long 522b0a2fdeeSScott Long if ((req->state & REQ_STATE_NEED_WAKEUP) != 0) 523b0a2fdeeSScott Long wakeup(req); 524b0a2fdeeSScott Long else 525b0a2fdeeSScott Long mpt_free_request(mpt, req); 526b0a2fdeeSScott Long } 527b0a2fdeeSScott Long return (free_reply); 528b0a2fdeeSScott Long } 529b0a2fdeeSScott Long 530b0a2fdeeSScott Long /* 531b0a2fdeeSScott Long * Process an asynchronous event from the IOC. 532b0a2fdeeSScott Long */ 533b0a2fdeeSScott Long static int 534b0a2fdeeSScott Long mpt_core_event(struct mpt_softc *mpt, request_t *req, 535b0a2fdeeSScott Long MSG_EVENT_NOTIFY_REPLY *msg) 536b0a2fdeeSScott Long { 537444dd2b6SMatt Jacob mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_core_event: 0x%x\n", 538444dd2b6SMatt Jacob msg->Event & 0xFF); 539b0a2fdeeSScott Long switch(msg->Event & 0xFF) { 540b0a2fdeeSScott Long case MPI_EVENT_NONE: 541b0a2fdeeSScott Long break; 542b0a2fdeeSScott Long case MPI_EVENT_LOG_DATA: 543b0a2fdeeSScott Long { 544b0a2fdeeSScott Long int i; 545b0a2fdeeSScott Long 546b0a2fdeeSScott Long /* Some error occured that LSI wants logged */ 547b0a2fdeeSScott Long mpt_prt(mpt, "EvtLogData: IOCLogInfo: 0x%08x\n", 548b0a2fdeeSScott Long msg->IOCLogInfo); 549b0a2fdeeSScott Long mpt_prt(mpt, "\tEvtLogData: Event Data:"); 550b0a2fdeeSScott Long for (i = 0; i < msg->EventDataLength; i++) 551b0a2fdeeSScott Long mpt_prtc(mpt, " %08x", msg->Data[i]); 552b0a2fdeeSScott Long mpt_prtc(mpt, "\n"); 553b0a2fdeeSScott Long break; 554b0a2fdeeSScott Long } 555b0a2fdeeSScott Long case MPI_EVENT_EVENT_CHANGE: 556b0a2fdeeSScott Long /* 557b0a2fdeeSScott Long * This is just an acknowledgement 558b0a2fdeeSScott Long * of our mpt_send_event_request. 559b0a2fdeeSScott Long */ 560b0a2fdeeSScott Long break; 561444dd2b6SMatt Jacob case MPI_EVENT_SAS_DEVICE_STATUS_CHANGE: 562444dd2b6SMatt Jacob break; 563b0a2fdeeSScott Long default: 564b0a2fdeeSScott Long return (/*handled*/0); 565b0a2fdeeSScott Long break; 566b0a2fdeeSScott Long } 567b0a2fdeeSScott Long return (/*handled*/1); 568b0a2fdeeSScott Long } 569b0a2fdeeSScott Long 570b0a2fdeeSScott Long static void 571b0a2fdeeSScott Long mpt_send_event_ack(struct mpt_softc *mpt, request_t *ack_req, 572b0a2fdeeSScott Long MSG_EVENT_NOTIFY_REPLY *msg, uint32_t context) 573b0a2fdeeSScott Long { 574b0a2fdeeSScott Long MSG_EVENT_ACK *ackp; 575b0a2fdeeSScott Long 576b0a2fdeeSScott Long ackp = (MSG_EVENT_ACK *)ack_req->req_vbuf; 577b0a2fdeeSScott Long bzero(ackp, sizeof *ackp); 578b0a2fdeeSScott Long ackp->Function = MPI_FUNCTION_EVENT_ACK; 579b0a2fdeeSScott Long ackp->Event = msg->Event; 580b0a2fdeeSScott Long ackp->EventContext = msg->EventContext; 581b0a2fdeeSScott Long ackp->MsgContext = context; 582b0a2fdeeSScott Long mpt_check_doorbell(mpt); 583b0a2fdeeSScott Long mpt_send_cmd(mpt, ack_req); 584b0a2fdeeSScott Long } 585b0a2fdeeSScott Long 586b0a2fdeeSScott Long /***************************** Interrupt Handling *****************************/ 587b0a2fdeeSScott Long void 588b0a2fdeeSScott Long mpt_intr(void *arg) 589b0a2fdeeSScott Long { 590b0a2fdeeSScott Long struct mpt_softc *mpt; 591b0a2fdeeSScott Long uint32_t reply_desc; 592b0a2fdeeSScott Long 593b0a2fdeeSScott Long mpt = (struct mpt_softc *)arg; 594b0a2fdeeSScott Long while ((reply_desc = mpt_pop_reply_queue(mpt)) != MPT_REPLY_EMPTY) { 595b0a2fdeeSScott Long request_t *req; 596b0a2fdeeSScott Long MSG_DEFAULT_REPLY *reply_frame; 597b0a2fdeeSScott Long uint32_t reply_baddr; 598b0a2fdeeSScott Long u_int cb_index; 599b0a2fdeeSScott Long u_int req_index; 600b0a2fdeeSScott Long int free_rf; 601b0a2fdeeSScott Long 602b0a2fdeeSScott Long req = NULL; 603b0a2fdeeSScott Long reply_frame = NULL; 604b0a2fdeeSScott Long reply_baddr = 0; 605b0a2fdeeSScott Long if ((reply_desc & MPI_ADDRESS_REPLY_A_BIT) != 0) { 606b0a2fdeeSScott Long u_int offset; 607b0a2fdeeSScott Long 608b0a2fdeeSScott Long /* 609b0a2fdeeSScott Long * Insure that the reply frame is coherent. 610b0a2fdeeSScott Long */ 611b0a2fdeeSScott Long reply_baddr = (reply_desc << 1); 612b0a2fdeeSScott Long offset = reply_baddr - (mpt->reply_phys & 0xFFFFFFFF); 613b0a2fdeeSScott Long bus_dmamap_sync_range(mpt->reply_dmat, mpt->reply_dmap, 614b0a2fdeeSScott Long offset, MPT_REPLY_SIZE, 615b0a2fdeeSScott Long BUS_DMASYNC_POSTREAD); 616b0a2fdeeSScott Long reply_frame = MPT_REPLY_OTOV(mpt, offset); 617b0a2fdeeSScott Long reply_desc = le32toh(reply_frame->MsgContext); 618b0a2fdeeSScott Long } 619b0a2fdeeSScott Long cb_index = MPT_CONTEXT_TO_CBI(reply_desc); 620b0a2fdeeSScott Long req_index = MPT_CONTEXT_TO_REQI(reply_desc); 621b0a2fdeeSScott Long if (req_index < MPT_MAX_REQUESTS(mpt)) 622b0a2fdeeSScott Long req = &mpt->request_pool[req_index]; 623b0a2fdeeSScott Long 624b0a2fdeeSScott Long free_rf = mpt_reply_handlers[cb_index](mpt, req, reply_frame); 625b0a2fdeeSScott Long 626b0a2fdeeSScott Long if (reply_frame != NULL && free_rf) 627b0a2fdeeSScott Long mpt_free_reply(mpt, reply_baddr); 628b0a2fdeeSScott Long } 629b0a2fdeeSScott Long } 630b0a2fdeeSScott Long 631b0a2fdeeSScott Long /******************************* Error Recovery *******************************/ 632b0a2fdeeSScott Long void 633b0a2fdeeSScott Long mpt_complete_request_chain(struct mpt_softc *mpt, struct req_queue *chain, 634b0a2fdeeSScott Long u_int iocstatus) 635b0a2fdeeSScott Long { 636b0a2fdeeSScott Long MSG_DEFAULT_REPLY ioc_status_frame; 637b0a2fdeeSScott Long request_t *req; 638b0a2fdeeSScott Long 639b0a2fdeeSScott Long bzero(&ioc_status_frame, sizeof(ioc_status_frame)); 640b0a2fdeeSScott Long ioc_status_frame.MsgLength = roundup2(sizeof(ioc_status_frame), 4); 641b0a2fdeeSScott Long ioc_status_frame.IOCStatus = iocstatus; 642b0a2fdeeSScott Long while((req = TAILQ_FIRST(chain)) != NULL) { 643b0a2fdeeSScott Long MSG_REQUEST_HEADER *msg_hdr; 644b0a2fdeeSScott Long u_int cb_index; 645b0a2fdeeSScott Long 646b0a2fdeeSScott Long msg_hdr = (MSG_REQUEST_HEADER *)req->req_vbuf; 647b0a2fdeeSScott Long ioc_status_frame.Function = msg_hdr->Function; 648b0a2fdeeSScott Long ioc_status_frame.MsgContext = msg_hdr->MsgContext; 649b0a2fdeeSScott Long cb_index = MPT_CONTEXT_TO_CBI(le32toh(msg_hdr->MsgContext)); 650b0a2fdeeSScott Long mpt_reply_handlers[cb_index](mpt, req, &ioc_status_frame); 651b0a2fdeeSScott Long } 652b0a2fdeeSScott Long } 653b0a2fdeeSScott Long 654b0a2fdeeSScott Long /********************************* Diagnostics ********************************/ 655b0a2fdeeSScott Long /* 656b0a2fdeeSScott Long * Perform a diagnostic dump of a reply frame. 657b0a2fdeeSScott Long */ 658b0a2fdeeSScott Long void 659b0a2fdeeSScott Long mpt_dump_reply_frame(struct mpt_softc *mpt, MSG_DEFAULT_REPLY *reply_frame) 660b0a2fdeeSScott Long { 661b0a2fdeeSScott Long 662b0a2fdeeSScott Long mpt_prt(mpt, "Address Reply:\n"); 663b0a2fdeeSScott Long mpt_print_reply(reply_frame); 664b0a2fdeeSScott Long } 665b0a2fdeeSScott Long 666b0a2fdeeSScott Long /******************************* Doorbell Access ******************************/ 667b0a2fdeeSScott Long static __inline uint32_t mpt_rd_db(struct mpt_softc *mpt); 668b0a2fdeeSScott Long static __inline uint32_t mpt_rd_intr(struct mpt_softc *mpt); 669b0a2fdeeSScott Long 670b0a2fdeeSScott Long static __inline uint32_t 671b0a2fdeeSScott Long mpt_rd_db(struct mpt_softc *mpt) 6729b631363SMatt Jacob { 6739b631363SMatt Jacob return mpt_read(mpt, MPT_OFFSET_DOORBELL); 6749b631363SMatt Jacob } 6759b631363SMatt Jacob 676b0a2fdeeSScott Long static __inline uint32_t 677b0a2fdeeSScott Long mpt_rd_intr(struct mpt_softc *mpt) 6789b631363SMatt Jacob { 6799b631363SMatt Jacob return mpt_read(mpt, MPT_OFFSET_INTR_STATUS); 6809b631363SMatt Jacob } 6819b631363SMatt Jacob 6829b631363SMatt Jacob /* Busy wait for a door bell to be read by IOC */ 6839b631363SMatt Jacob static int 684b0a2fdeeSScott Long mpt_wait_db_ack(struct mpt_softc *mpt) 6859b631363SMatt Jacob { 6869b631363SMatt Jacob int i; 6879b631363SMatt Jacob for (i=0; i < MPT_MAX_WAIT; i++) { 6889b631363SMatt Jacob if (!MPT_DB_IS_BUSY(mpt_rd_intr(mpt))) { 6899b631363SMatt Jacob maxwait_ack = i > maxwait_ack ? i : maxwait_ack; 6909b631363SMatt Jacob return MPT_OK; 6919b631363SMatt Jacob } 6929b631363SMatt Jacob 693b0a2fdeeSScott Long DELAY(1000); 6949b631363SMatt Jacob } 6959b631363SMatt Jacob return MPT_FAIL; 6969b631363SMatt Jacob } 6979b631363SMatt Jacob 6989b631363SMatt Jacob /* Busy wait for a door bell interrupt */ 6999b631363SMatt Jacob static int 700b0a2fdeeSScott Long mpt_wait_db_int(struct mpt_softc *mpt) 7019b631363SMatt Jacob { 7029b631363SMatt Jacob int i; 7039b631363SMatt Jacob for (i=0; i < MPT_MAX_WAIT; i++) { 7049b631363SMatt Jacob if (MPT_DB_INTR(mpt_rd_intr(mpt))) { 7059b631363SMatt Jacob maxwait_int = i > maxwait_int ? i : maxwait_int; 7069b631363SMatt Jacob return MPT_OK; 7079b631363SMatt Jacob } 7089b631363SMatt Jacob DELAY(100); 7099b631363SMatt Jacob } 7109b631363SMatt Jacob return MPT_FAIL; 7119b631363SMatt Jacob } 7129b631363SMatt Jacob 7139b631363SMatt Jacob /* Wait for IOC to transition to a give state */ 7149b631363SMatt Jacob void 715b0a2fdeeSScott Long mpt_check_doorbell(struct mpt_softc *mpt) 7169b631363SMatt Jacob { 717b0a2fdeeSScott Long uint32_t db = mpt_rd_db(mpt); 7189b631363SMatt Jacob if (MPT_STATE(db) != MPT_DB_STATE_RUNNING) { 719b0a2fdeeSScott Long mpt_prt(mpt, "Device not running\n"); 7209b631363SMatt Jacob mpt_print_db(db); 7219b631363SMatt Jacob } 7229b631363SMatt Jacob } 7239b631363SMatt Jacob 7249b631363SMatt Jacob /* Wait for IOC to transition to a give state */ 7259b631363SMatt Jacob static int 726b0a2fdeeSScott Long mpt_wait_state(struct mpt_softc *mpt, enum DB_STATE_BITS state) 7279b631363SMatt Jacob { 7289b631363SMatt Jacob int i; 7299b631363SMatt Jacob 7309b631363SMatt Jacob for (i = 0; i < MPT_MAX_WAIT; i++) { 731b0a2fdeeSScott Long uint32_t db = mpt_rd_db(mpt); 7329b631363SMatt Jacob if (MPT_STATE(db) == state) { 7339b631363SMatt Jacob maxwait_state = i > maxwait_state ? i : maxwait_state; 7349b631363SMatt Jacob return (MPT_OK); 7359b631363SMatt Jacob } 7369b631363SMatt Jacob DELAY(100); 7379b631363SMatt Jacob } 7389b631363SMatt Jacob return (MPT_FAIL); 7399b631363SMatt Jacob } 7409b631363SMatt Jacob 7419b631363SMatt Jacob 742b0a2fdeeSScott Long /************************* Intialization/Configuration ************************/ 743b0a2fdeeSScott Long static int mpt_download_fw(struct mpt_softc *mpt); 744b0a2fdeeSScott Long 7459b631363SMatt Jacob /* Issue the reset COMMAND to the IOC */ 746b0a2fdeeSScott Long static int 747b0a2fdeeSScott Long mpt_soft_reset(struct mpt_softc *mpt) 7489b631363SMatt Jacob { 749b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "soft reset\n"); 7509b631363SMatt Jacob 7519b631363SMatt Jacob /* Have to use hard reset if we are not in Running state */ 7529b631363SMatt Jacob if (MPT_STATE(mpt_rd_db(mpt)) != MPT_DB_STATE_RUNNING) { 753b0a2fdeeSScott Long mpt_prt(mpt, "soft reset failed: device not running\n"); 7549b631363SMatt Jacob return MPT_FAIL; 7559b631363SMatt Jacob } 7569b631363SMatt Jacob 7579b631363SMatt Jacob /* If door bell is in use we don't have a chance of getting 7589b631363SMatt Jacob * a word in since the IOC probably crashed in message 7599b631363SMatt Jacob * processing. So don't waste our time. 7609b631363SMatt Jacob */ 7619b631363SMatt Jacob if (MPT_DB_IS_IN_USE(mpt_rd_db(mpt))) { 762b0a2fdeeSScott Long mpt_prt(mpt, "soft reset failed: doorbell wedged\n"); 7639b631363SMatt Jacob return MPT_FAIL; 7649b631363SMatt Jacob } 7659b631363SMatt Jacob 7669b631363SMatt Jacob /* Send the reset request to the IOC */ 7679b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_DOORBELL, 7689b631363SMatt Jacob MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET << MPI_DOORBELL_FUNCTION_SHIFT); 7699b631363SMatt Jacob if (mpt_wait_db_ack(mpt) != MPT_OK) { 770b0a2fdeeSScott Long mpt_prt(mpt, "soft reset failed: ack timeout\n"); 7719b631363SMatt Jacob return MPT_FAIL; 7729b631363SMatt Jacob } 7739b631363SMatt Jacob 7749b631363SMatt Jacob /* Wait for the IOC to reload and come out of reset state */ 7759b631363SMatt Jacob if (mpt_wait_state(mpt, MPT_DB_STATE_READY) != MPT_OK) { 776b0a2fdeeSScott Long mpt_prt(mpt, "soft reset failed: device did not restart\n"); 7779b631363SMatt Jacob return MPT_FAIL; 7789b631363SMatt Jacob } 7799b631363SMatt Jacob 7809b631363SMatt Jacob return MPT_OK; 7819b631363SMatt Jacob } 7829b631363SMatt Jacob 783b0a2fdeeSScott Long static int 784b0a2fdeeSScott Long mpt_enable_diag_mode(struct mpt_softc *mpt) 785b0a2fdeeSScott Long { 786b0a2fdeeSScott Long int try; 787b0a2fdeeSScott Long 788b0a2fdeeSScott Long try = 20; 789b0a2fdeeSScott Long while (--try) { 790b0a2fdeeSScott Long 791b0a2fdeeSScott Long if ((mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC) & MPI_DIAG_DRWE) != 0) 792b0a2fdeeSScott Long break; 793b0a2fdeeSScott Long 794b0a2fdeeSScott Long /* Enable diagnostic registers */ 795b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, 0xFF); 796b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_1ST_KEY_VALUE); 797b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_2ND_KEY_VALUE); 798b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_3RD_KEY_VALUE); 799b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_4TH_KEY_VALUE); 800b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_5TH_KEY_VALUE); 801b0a2fdeeSScott Long 802b0a2fdeeSScott Long DELAY(100000); 803b0a2fdeeSScott Long } 804b0a2fdeeSScott Long if (try == 0) 805b0a2fdeeSScott Long return (EIO); 806b0a2fdeeSScott Long return (0); 807b0a2fdeeSScott Long } 808b0a2fdeeSScott Long 809b0a2fdeeSScott Long static void 810b0a2fdeeSScott Long mpt_disable_diag_mode(struct mpt_softc *mpt) 811b0a2fdeeSScott Long { 812b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, 0xFFFFFFFF); 813b0a2fdeeSScott Long } 814b0a2fdeeSScott Long 8159b631363SMatt Jacob /* This is a magic diagnostic reset that resets all the ARM 8169b631363SMatt Jacob * processors in the chip. 8179b631363SMatt Jacob */ 818b0a2fdeeSScott Long static void 819b0a2fdeeSScott Long mpt_hard_reset(struct mpt_softc *mpt) 8209b631363SMatt Jacob { 821b0a2fdeeSScott Long int error; 822b0a2fdeeSScott Long int wait; 823b0a2fdeeSScott Long uint32_t diagreg; 8249b631363SMatt Jacob 825b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "hard reset\n"); 826b0a2fdeeSScott Long 827b0a2fdeeSScott Long error = mpt_enable_diag_mode(mpt); 828b0a2fdeeSScott Long if (error) { 829b0a2fdeeSScott Long mpt_prt(mpt, "WARNING - Could not enter diagnostic mode !\n"); 830b0a2fdeeSScott Long mpt_prt(mpt, "Trying to reset anyway.\n"); 831b0a2fdeeSScott Long } 832b0a2fdeeSScott Long 833b0a2fdeeSScott Long diagreg = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 834b0a2fdeeSScott Long 835b0a2fdeeSScott Long /* 836b0a2fdeeSScott Long * This appears to be a workaround required for some 837b0a2fdeeSScott Long * firmware or hardware revs. 838b0a2fdeeSScott Long */ 839b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, diagreg | MPI_DIAG_DISABLE_ARM); 840b0a2fdeeSScott Long DELAY(1000); 8419b631363SMatt Jacob 8429b631363SMatt Jacob /* Diag. port is now active so we can now hit the reset bit */ 843b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, diagreg | MPI_DIAG_RESET_ADAPTER); 8449b631363SMatt Jacob 845b0a2fdeeSScott Long /* 846b0a2fdeeSScott Long * Ensure that the reset has finished. We delay 1ms 847b0a2fdeeSScott Long * prior to reading the register to make sure the chip 848b0a2fdeeSScott Long * has sufficiently completed its reset to handle register 849b0a2fdeeSScott Long * accesses. 850b0a2fdeeSScott Long */ 851b0a2fdeeSScott Long wait = 5000; 852b0a2fdeeSScott Long do { 853b0a2fdeeSScott Long DELAY(1000); 854b0a2fdeeSScott Long diagreg = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 855b0a2fdeeSScott Long } while (--wait && (diagreg & MPI_DIAG_RESET_ADAPTER) == 0); 8569b631363SMatt Jacob 857b0a2fdeeSScott Long if (wait == 0) { 858b0a2fdeeSScott Long mpt_prt(mpt, "WARNING - Failed hard reset! " 859b0a2fdeeSScott Long "Trying to initialize anyway.\n"); 8609b631363SMatt Jacob } 8619b631363SMatt Jacob 862b0a2fdeeSScott Long /* 863b0a2fdeeSScott Long * If we have firmware to download, it must be loaded before 864b0a2fdeeSScott Long * the controller will become operational. Do so now. 865b0a2fdeeSScott Long */ 866b0a2fdeeSScott Long if (mpt->fw_image != NULL) { 867b0a2fdeeSScott Long 868b0a2fdeeSScott Long error = mpt_download_fw(mpt); 869b0a2fdeeSScott Long 870b0a2fdeeSScott Long if (error) { 871b0a2fdeeSScott Long mpt_prt(mpt, "WARNING - Firmware Download Failed!\n"); 872b0a2fdeeSScott Long mpt_prt(mpt, "Trying to initialize anyway.\n"); 8739b631363SMatt Jacob } 874b0a2fdeeSScott Long } 875b0a2fdeeSScott Long 876b0a2fdeeSScott Long /* 877b0a2fdeeSScott Long * Reseting the controller should have disabled write 878b0a2fdeeSScott Long * access to the diagnostic registers, but disable 879b0a2fdeeSScott Long * manually to be sure. 880b0a2fdeeSScott Long */ 881b0a2fdeeSScott Long mpt_disable_diag_mode(mpt); 882b0a2fdeeSScott Long } 883b0a2fdeeSScott Long 884b0a2fdeeSScott Long static void 885b0a2fdeeSScott Long mpt_core_ioc_reset(struct mpt_softc *mpt, int type) 886b0a2fdeeSScott Long { 887b0a2fdeeSScott Long /* 888b0a2fdeeSScott Long * Complete all pending requests with a status 889b0a2fdeeSScott Long * appropriate for an IOC reset. 890b0a2fdeeSScott Long */ 891b0a2fdeeSScott Long mpt_complete_request_chain(mpt, &mpt->request_pending_list, 892b0a2fdeeSScott Long MPI_IOCSTATUS_INVALID_STATE); 893b0a2fdeeSScott Long } 894b0a2fdeeSScott Long 8959b631363SMatt Jacob 8969b631363SMatt Jacob /* 8979b631363SMatt Jacob * Reset the IOC when needed. Try software command first then if needed 8989b631363SMatt Jacob * poke at the magic diagnostic reset. Note that a hard reset resets 8999b631363SMatt Jacob * *both* IOCs on dual function chips (FC929 && LSI1030) as well as 9009b631363SMatt Jacob * fouls up the PCI configuration registers. 9019b631363SMatt Jacob */ 9029b631363SMatt Jacob int 903b0a2fdeeSScott Long mpt_reset(struct mpt_softc *mpt, int reinit) 9049b631363SMatt Jacob { 905b0a2fdeeSScott Long struct mpt_personality *pers; 9069b631363SMatt Jacob int ret; 9079b631363SMatt Jacob 9089b631363SMatt Jacob /* Try a soft reset */ 9099b631363SMatt Jacob if ((ret = mpt_soft_reset(mpt)) != MPT_OK) { 9109b631363SMatt Jacob /* Failed; do a hard reset */ 9119b631363SMatt Jacob mpt_hard_reset(mpt); 9129b631363SMatt Jacob 9139b631363SMatt Jacob /* Wait for the IOC to reload and come out of reset state */ 9149b631363SMatt Jacob ret = mpt_wait_state(mpt, MPT_DB_STATE_READY); 915b0a2fdeeSScott Long if (ret != MPT_OK) 916b0a2fdeeSScott Long mpt_prt(mpt, "failed to reset device\n"); 9179b631363SMatt Jacob } 918b0a2fdeeSScott Long 919b0a2fdeeSScott Long /* 920b0a2fdeeSScott Long * Invoke reset handlers. We bump the reset count so 921b0a2fdeeSScott Long * that mpt_wait_req() understands that regardless of 922b0a2fdeeSScott Long * the specified wait condition, it should stop its wait. 923b0a2fdeeSScott Long */ 924b0a2fdeeSScott Long mpt->reset_cnt++; 925b0a2fdeeSScott Long MPT_PERS_FOREACH(mpt, pers) 926b0a2fdeeSScott Long pers->reset(mpt, ret); 927b0a2fdeeSScott Long 928b0a2fdeeSScott Long if (reinit != 0) 929b0a2fdeeSScott Long mpt_enable_ioc(mpt); 9309b631363SMatt Jacob 9319b631363SMatt Jacob return ret; 9329b631363SMatt Jacob } 9339b631363SMatt Jacob 9349b631363SMatt Jacob /* Return a command buffer to the free queue */ 9359b631363SMatt Jacob void 936b0a2fdeeSScott Long mpt_free_request(struct mpt_softc *mpt, request_t *req) 9379b631363SMatt Jacob { 938444dd2b6SMatt Jacob request_t *nxt; 939b0a2fdeeSScott Long struct mpt_evtf_record *record; 940b0a2fdeeSScott Long uint32_t reply_baddr; 941b0a2fdeeSScott Long 9427dec90bcSMatt Jacob if (req == NULL || req != &mpt->request_pool[req->index]) { 9439b631363SMatt Jacob panic("mpt_free_request bad req ptr\n"); 9449b631363SMatt Jacob return; 9459b631363SMatt Jacob } 946444dd2b6SMatt Jacob if ((nxt = req->chain) != NULL) { 947444dd2b6SMatt Jacob req->chain = NULL; 948444dd2b6SMatt Jacob mpt_free_request(mpt, nxt); /* NB: recursion */ 949444dd2b6SMatt Jacob } 9509b631363SMatt Jacob req->ccb = NULL; 951b0a2fdeeSScott Long req->state = REQ_STATE_FREE; 952b0a2fdeeSScott Long if (LIST_EMPTY(&mpt->ack_frames)) { 953b0a2fdeeSScott Long TAILQ_INSERT_HEAD(&mpt->request_free_list, req, links); 954b0a2fdeeSScott Long if (mpt->getreqwaiter != 0) { 955b0a2fdeeSScott Long mpt->getreqwaiter = 0; 956b0a2fdeeSScott Long wakeup(&mpt->request_free_list); 957b0a2fdeeSScott Long } 958b0a2fdeeSScott Long return; 959b0a2fdeeSScott Long } 960b0a2fdeeSScott Long 961b0a2fdeeSScott Long /* 962b0a2fdeeSScott Long * Process an ack frame deferred due to resource shortage. 963b0a2fdeeSScott Long */ 964b0a2fdeeSScott Long record = LIST_FIRST(&mpt->ack_frames); 965b0a2fdeeSScott Long LIST_REMOVE(record, links); 966b0a2fdeeSScott Long mpt_send_event_ack(mpt, req, &record->reply, record->context); 967b0a2fdeeSScott Long reply_baddr = (uint32_t)((uint8_t *)record - mpt->reply) 968b0a2fdeeSScott Long + (mpt->reply_phys & 0xFFFFFFFF); 969b0a2fdeeSScott Long mpt_free_reply(mpt, reply_baddr); 9709b631363SMatt Jacob } 9719b631363SMatt Jacob 9729b631363SMatt Jacob /* Get a command buffer from the free queue */ 9739b631363SMatt Jacob request_t * 974b0a2fdeeSScott Long mpt_get_request(struct mpt_softc *mpt, int sleep_ok) 9759b631363SMatt Jacob { 9769b631363SMatt Jacob request_t *req; 977b0a2fdeeSScott Long 978b0a2fdeeSScott Long retry: 979b0a2fdeeSScott Long req = TAILQ_FIRST(&mpt->request_free_list); 9809b631363SMatt Jacob if (req != NULL) { 981b0a2fdeeSScott Long KASSERT(req == &mpt->request_pool[req->index], 982b0a2fdeeSScott Long ("mpt_get_request: corrupted request free list\n")); 983b0a2fdeeSScott Long TAILQ_REMOVE(&mpt->request_free_list, req, links); 984b0a2fdeeSScott Long req->state = REQ_STATE_ALLOCATED; 985444dd2b6SMatt Jacob req->chain = NULL; 986b0a2fdeeSScott Long } else if (sleep_ok != 0) { 987b0a2fdeeSScott Long mpt->getreqwaiter = 1; 988b0a2fdeeSScott Long mpt_sleep(mpt, &mpt->request_free_list, PUSER, "mptgreq", 0); 989b0a2fdeeSScott Long goto retry; 9909b631363SMatt Jacob } 9919b631363SMatt Jacob return req; 9929b631363SMatt Jacob } 9939b631363SMatt Jacob 9949b631363SMatt Jacob /* Pass the command to the IOC */ 9959b631363SMatt Jacob void 996b0a2fdeeSScott Long mpt_send_cmd(struct mpt_softc *mpt, request_t *req) 9979b631363SMatt Jacob { 998b0a2fdeeSScott Long uint32_t *pReq; 999b0a2fdeeSScott Long 10009b631363SMatt Jacob pReq = req->req_vbuf; 1001444dd2b6SMatt Jacob if (mpt->verbose > MPT_PRT_TRACE) { 1002444dd2b6SMatt Jacob int offset; 1003444dd2b6SMatt Jacob mpt_prt(mpt, "Send Request %d (0x%x):", 1004301472c2SMatt Jacob req->index, req->req_pbuf); 1005444dd2b6SMatt Jacob for (offset = 0; offset < mpt->request_frame_size; offset++) { 1006444dd2b6SMatt Jacob if ((offset & 0x7) == 0) { 1007444dd2b6SMatt Jacob mpt_prtc(mpt, "\n"); 1008444dd2b6SMatt Jacob mpt_prt(mpt, " "); 1009444dd2b6SMatt Jacob } 1010444dd2b6SMatt Jacob mpt_prtc(mpt, " %08x", pReq[offset]); 1011444dd2b6SMatt Jacob } 1012444dd2b6SMatt Jacob mpt_prtc(mpt, "\n"); 1013444dd2b6SMatt Jacob } 10149b631363SMatt Jacob bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap, 10159b631363SMatt Jacob BUS_DMASYNC_PREWRITE); 1016b0a2fdeeSScott Long req->state |= REQ_STATE_QUEUED; 1017b0a2fdeeSScott Long TAILQ_INSERT_HEAD(&mpt->request_pending_list, req, links); 1018b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_REQUEST_Q, (uint32_t) req->req_pbuf); 10199b631363SMatt Jacob } 10209b631363SMatt Jacob 10219b631363SMatt Jacob /* 1022b0a2fdeeSScott Long * Wait for a request to complete. 1023b0a2fdeeSScott Long * 1024b0a2fdeeSScott Long * Inputs: 1025b0a2fdeeSScott Long * mpt softc of controller executing request 1026b0a2fdeeSScott Long * req request to wait for 1027b0a2fdeeSScott Long * sleep_ok nonzero implies may sleep in this context 1028b0a2fdeeSScott Long * time_ms timeout in ms. 0 implies no timeout. 1029b0a2fdeeSScott Long * 1030b0a2fdeeSScott Long * Return Values: 1031b0a2fdeeSScott Long * 0 Request completed 1032b0a2fdeeSScott Long * non-0 Timeout fired before request completion. 10339b631363SMatt Jacob */ 1034b0a2fdeeSScott Long int 1035b0a2fdeeSScott Long mpt_wait_req(struct mpt_softc *mpt, request_t *req, 1036b0a2fdeeSScott Long mpt_req_state_t state, mpt_req_state_t mask, 1037b0a2fdeeSScott Long int sleep_ok, int time_ms) 10389b631363SMatt Jacob { 1039b0a2fdeeSScott Long int error; 1040b0a2fdeeSScott Long int timeout; 1041b0a2fdeeSScott Long u_int saved_cnt; 10429b631363SMatt Jacob 1043b0a2fdeeSScott Long /* 1044b0a2fdeeSScott Long * timeout is in ms. 0 indicates infinite wait. 1045b0a2fdeeSScott Long * Convert to ticks or 500us units depending on 1046b0a2fdeeSScott Long * our sleep mode. 1047b0a2fdeeSScott Long */ 1048b0a2fdeeSScott Long if (sleep_ok != 0) 1049b0a2fdeeSScott Long timeout = (time_ms * hz) / 1000; 1050b0a2fdeeSScott Long else 1051b0a2fdeeSScott Long timeout = time_ms * 2; 1052b0a2fdeeSScott Long req->state |= REQ_STATE_NEED_WAKEUP; 1053b0a2fdeeSScott Long mask &= ~REQ_STATE_NEED_WAKEUP; 1054444dd2b6SMatt Jacob saved_cnt = mpt->reset_cnt; 1055b0a2fdeeSScott Long while ((req->state & mask) != state 1056b0a2fdeeSScott Long && mpt->reset_cnt == saved_cnt) { 1057b0a2fdeeSScott Long 1058b0a2fdeeSScott Long if (sleep_ok != 0) { 1059b0a2fdeeSScott Long error = mpt_sleep(mpt, req, PUSER, "mptreq", timeout); 1060b0a2fdeeSScott Long if (error == EWOULDBLOCK) { 1061b0a2fdeeSScott Long timeout = 0; 1062b0a2fdeeSScott Long break; 1063b0a2fdeeSScott Long } 1064b0a2fdeeSScott Long } else { 1065b0a2fdeeSScott Long if (time_ms != 0 && --timeout == 0) { 1066b0a2fdeeSScott Long mpt_prt(mpt, "mpt_wait_req timed out\n"); 1067b0a2fdeeSScott Long break; 1068b0a2fdeeSScott Long } 1069b0a2fdeeSScott Long DELAY(500); 1070b0a2fdeeSScott Long mpt_intr(mpt); 1071b0a2fdeeSScott Long } 1072b0a2fdeeSScott Long } 1073b0a2fdeeSScott Long req->state &= ~REQ_STATE_NEED_WAKEUP; 1074b0a2fdeeSScott Long if (mpt->reset_cnt != saved_cnt) 1075b0a2fdeeSScott Long return (EIO); 1076444dd2b6SMatt Jacob if (time_ms && timeout <= 0) 1077b0a2fdeeSScott Long return (ETIMEDOUT); 1078b0a2fdeeSScott Long return (0); 10799b631363SMatt Jacob } 10809b631363SMatt Jacob 10819b631363SMatt Jacob /* 10829b631363SMatt Jacob * Send a command to the IOC via the handshake register. 10839b631363SMatt Jacob * 10849b631363SMatt Jacob * Only done at initialization time and for certain unusual 10859b631363SMatt Jacob * commands such as device/bus reset as specified by LSI. 10869b631363SMatt Jacob */ 10879b631363SMatt Jacob int 1088b0a2fdeeSScott Long mpt_send_handshake_cmd(struct mpt_softc *mpt, size_t len, void *cmd) 10899b631363SMatt Jacob { 10909b631363SMatt Jacob int i; 1091b0a2fdeeSScott Long uint32_t data, *data32; 10929b631363SMatt Jacob 10939b631363SMatt Jacob /* Check condition of the IOC */ 10949b631363SMatt Jacob data = mpt_rd_db(mpt); 1095b0a2fdeeSScott Long if ((MPT_STATE(data) != MPT_DB_STATE_READY 1096b0a2fdeeSScott Long && MPT_STATE(data) != MPT_DB_STATE_RUNNING 1097b0a2fdeeSScott Long && MPT_STATE(data) != MPT_DB_STATE_FAULT) 1098b0a2fdeeSScott Long || MPT_DB_IS_IN_USE(data)) { 1099b0a2fdeeSScott Long mpt_prt(mpt, "handshake aborted - invalid doorbell state\n"); 11009b631363SMatt Jacob mpt_print_db(data); 11019b631363SMatt Jacob return (EBUSY); 11029b631363SMatt Jacob } 11039b631363SMatt Jacob 11049b631363SMatt Jacob /* We move things in 32 bit chunks */ 11059b631363SMatt Jacob len = (len + 3) >> 2; 11069b631363SMatt Jacob data32 = cmd; 11079b631363SMatt Jacob 11089b631363SMatt Jacob /* Clear any left over pending doorbell interupts */ 11099b631363SMatt Jacob if (MPT_DB_INTR(mpt_rd_intr(mpt))) 11109b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 11119b631363SMatt Jacob 11129b631363SMatt Jacob /* 11139b631363SMatt Jacob * Tell the handshake reg. we are going to send a command 11149b631363SMatt Jacob * and how long it is going to be. 11159b631363SMatt Jacob */ 11169b631363SMatt Jacob data = (MPI_FUNCTION_HANDSHAKE << MPI_DOORBELL_FUNCTION_SHIFT) | 11179b631363SMatt Jacob (len << MPI_DOORBELL_ADD_DWORDS_SHIFT); 11189b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_DOORBELL, data); 11199b631363SMatt Jacob 11209b631363SMatt Jacob /* Wait for the chip to notice */ 11219b631363SMatt Jacob if (mpt_wait_db_int(mpt) != MPT_OK) { 1122b0a2fdeeSScott Long mpt_prt(mpt, "mpt_send_handshake_cmd timeout1\n"); 1123b0a2fdeeSScott Long return (ETIMEDOUT); 11249b631363SMatt Jacob } 11259b631363SMatt Jacob 11269b631363SMatt Jacob /* Clear the interrupt */ 11279b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 11289b631363SMatt Jacob 11299b631363SMatt Jacob if (mpt_wait_db_ack(mpt) != MPT_OK) { 1130b0a2fdeeSScott Long mpt_prt(mpt, "mpt_send_handshake_cmd timeout2\n"); 1131b0a2fdeeSScott Long return (ETIMEDOUT); 11329b631363SMatt Jacob } 11339b631363SMatt Jacob 11349b631363SMatt Jacob /* Send the command */ 11359b631363SMatt Jacob for (i = 0; i < len; i++) { 11369b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_DOORBELL, *data32++); 11379b631363SMatt Jacob if (mpt_wait_db_ack(mpt) != MPT_OK) { 1138301472c2SMatt Jacob mpt_prt(mpt, 1139b0a2fdeeSScott Long "mpt_send_handshake_cmd timeout! index = %d\n", 1140b0a2fdeeSScott Long i); 1141b0a2fdeeSScott Long return (ETIMEDOUT); 11429b631363SMatt Jacob } 11439b631363SMatt Jacob } 11449b631363SMatt Jacob return MPT_OK; 11459b631363SMatt Jacob } 11469b631363SMatt Jacob 11479b631363SMatt Jacob /* Get the response from the handshake register */ 11489b631363SMatt Jacob int 1149b0a2fdeeSScott Long mpt_recv_handshake_reply(struct mpt_softc *mpt, size_t reply_len, void *reply) 11509b631363SMatt Jacob { 11519b631363SMatt Jacob int left, reply_left; 11529b631363SMatt Jacob u_int16_t *data16; 11539b631363SMatt Jacob MSG_DEFAULT_REPLY *hdr; 11549b631363SMatt Jacob 11559b631363SMatt Jacob /* We move things out in 16 bit chunks */ 11569b631363SMatt Jacob reply_len >>= 1; 11579b631363SMatt Jacob data16 = (u_int16_t *)reply; 11589b631363SMatt Jacob 11599b631363SMatt Jacob hdr = (MSG_DEFAULT_REPLY *)reply; 11609b631363SMatt Jacob 11619b631363SMatt Jacob /* Get first word */ 11629b631363SMatt Jacob if (mpt_wait_db_int(mpt) != MPT_OK) { 1163b0a2fdeeSScott Long mpt_prt(mpt, "mpt_recv_handshake_cmd timeout1\n"); 11649b631363SMatt Jacob return ETIMEDOUT; 11659b631363SMatt Jacob } 11669b631363SMatt Jacob *data16++ = mpt_read(mpt, MPT_OFFSET_DOORBELL) & MPT_DB_DATA_MASK; 11679b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 11689b631363SMatt Jacob 11699b631363SMatt Jacob /* Get Second Word */ 11709b631363SMatt Jacob if (mpt_wait_db_int(mpt) != MPT_OK) { 1171b0a2fdeeSScott Long mpt_prt(mpt, "mpt_recv_handshake_cmd timeout2\n"); 11729b631363SMatt Jacob return ETIMEDOUT; 11739b631363SMatt Jacob } 11749b631363SMatt Jacob *data16++ = mpt_read(mpt, MPT_OFFSET_DOORBELL) & MPT_DB_DATA_MASK; 11759b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 11769b631363SMatt Jacob 11779b631363SMatt Jacob /* With the second word, we can now look at the length */ 1178b0a2fdeeSScott Long if (((reply_len >> 1) != hdr->MsgLength)) { 1179301472c2SMatt Jacob mpt_prt(mpt, "reply length does not match message length: " 1180b0a2fdeeSScott Long "got 0x%02x, expected 0x%02x\n", 1181301472c2SMatt Jacob hdr->MsgLength << 2, reply_len << 1); 11829b631363SMatt Jacob } 11839b631363SMatt Jacob 11849b631363SMatt Jacob /* Get rest of the reply; but don't overflow the provided buffer */ 11859b631363SMatt Jacob left = (hdr->MsgLength << 1) - 2; 11869b631363SMatt Jacob reply_left = reply_len - 2; 11879b631363SMatt Jacob while (left--) { 11889b631363SMatt Jacob u_int16_t datum; 11899b631363SMatt Jacob 11909b631363SMatt Jacob if (mpt_wait_db_int(mpt) != MPT_OK) { 1191b0a2fdeeSScott Long mpt_prt(mpt, "mpt_recv_handshake_cmd timeout3\n"); 11929b631363SMatt Jacob return ETIMEDOUT; 11939b631363SMatt Jacob } 11949b631363SMatt Jacob datum = mpt_read(mpt, MPT_OFFSET_DOORBELL); 11959b631363SMatt Jacob 11969b631363SMatt Jacob if (reply_left-- > 0) 11979b631363SMatt Jacob *data16++ = datum & MPT_DB_DATA_MASK; 11989b631363SMatt Jacob 11999b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 12009b631363SMatt Jacob } 12019b631363SMatt Jacob 12029b631363SMatt Jacob /* One more wait & clear at the end */ 12039b631363SMatt Jacob if (mpt_wait_db_int(mpt) != MPT_OK) { 1204b0a2fdeeSScott Long mpt_prt(mpt, "mpt_recv_handshake_cmd timeout4\n"); 12059b631363SMatt Jacob return ETIMEDOUT; 12069b631363SMatt Jacob } 12079b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 12089b631363SMatt Jacob 12099b631363SMatt Jacob if ((hdr->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1210b0a2fdeeSScott Long if (mpt->verbose >= MPT_PRT_TRACE) 12119b631363SMatt Jacob mpt_print_reply(hdr); 12129b631363SMatt Jacob return (MPT_FAIL | hdr->IOCStatus); 12139b631363SMatt Jacob } 12149b631363SMatt Jacob 12159b631363SMatt Jacob return (0); 12169b631363SMatt Jacob } 12179b631363SMatt Jacob 12189b631363SMatt Jacob static int 1219b0a2fdeeSScott Long mpt_get_iocfacts(struct mpt_softc *mpt, MSG_IOC_FACTS_REPLY *freplp) 12209b631363SMatt Jacob { 12219b631363SMatt Jacob MSG_IOC_FACTS f_req; 12229b631363SMatt Jacob int error; 12239b631363SMatt Jacob 12249b631363SMatt Jacob bzero(&f_req, sizeof f_req); 12259b631363SMatt Jacob f_req.Function = MPI_FUNCTION_IOC_FACTS; 1226b0a2fdeeSScott Long f_req.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 12279b631363SMatt Jacob error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req); 12289b631363SMatt Jacob if (error) 12299b631363SMatt Jacob return(error); 12309b631363SMatt Jacob error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp); 12319b631363SMatt Jacob return (error); 12329b631363SMatt Jacob } 12339b631363SMatt Jacob 12347104aeefSMatt Jacob static int 1235b0a2fdeeSScott Long mpt_get_portfacts(struct mpt_softc *mpt, MSG_PORT_FACTS_REPLY *freplp) 12367104aeefSMatt Jacob { 12377104aeefSMatt Jacob MSG_PORT_FACTS f_req; 12387104aeefSMatt Jacob int error; 12397104aeefSMatt Jacob 12407104aeefSMatt Jacob /* XXX: Only getting PORT FACTS for Port 0 */ 1241b0a2fdeeSScott Long memset(&f_req, 0, sizeof f_req); 12427104aeefSMatt Jacob f_req.Function = MPI_FUNCTION_PORT_FACTS; 1243b0a2fdeeSScott Long f_req.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 12447104aeefSMatt Jacob error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req); 12457104aeefSMatt Jacob if (error) 12467104aeefSMatt Jacob return(error); 12477104aeefSMatt Jacob error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp); 12487104aeefSMatt Jacob return (error); 12497104aeefSMatt Jacob } 12507104aeefSMatt Jacob 12519b631363SMatt Jacob /* 12529b631363SMatt Jacob * Send the initialization request. This is where we specify how many 12539b631363SMatt Jacob * SCSI busses and how many devices per bus we wish to emulate. 12549b631363SMatt Jacob * This is also the command that specifies the max size of the reply 12559b631363SMatt Jacob * frames from the IOC that we will be allocating. 12569b631363SMatt Jacob */ 12579b631363SMatt Jacob static int 1258b0a2fdeeSScott Long mpt_send_ioc_init(struct mpt_softc *mpt, uint32_t who) 12599b631363SMatt Jacob { 12609b631363SMatt Jacob int error = 0; 12619b631363SMatt Jacob MSG_IOC_INIT init; 12629b631363SMatt Jacob MSG_IOC_INIT_REPLY reply; 12639b631363SMatt Jacob 12649b631363SMatt Jacob bzero(&init, sizeof init); 12659b631363SMatt Jacob init.WhoInit = who; 12669b631363SMatt Jacob init.Function = MPI_FUNCTION_IOC_INIT; 12679b631363SMatt Jacob if (mpt->is_fc) { 12689b631363SMatt Jacob init.MaxDevices = 255; 1269444dd2b6SMatt Jacob } else if (mpt->is_sas) { 1270444dd2b6SMatt Jacob init.MaxDevices = mpt->mpt_max_devices; 12719b631363SMatt Jacob } else { 12729b631363SMatt Jacob init.MaxDevices = 16; 12739b631363SMatt Jacob } 12749b631363SMatt Jacob init.MaxBuses = 1; 1275444dd2b6SMatt Jacob 1276444dd2b6SMatt Jacob init.MsgVersion = htole16(MPI_VERSION); 1277444dd2b6SMatt Jacob init.HeaderVersion = htole16(MPI_HEADER_VERSION); 1278444dd2b6SMatt Jacob init.ReplyFrameSize = htole16(MPT_REPLY_SIZE); 1279b0a2fdeeSScott Long init.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 1280444dd2b6SMatt Jacob if (mpt->ioc_facts_flags & MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL) { 1281444dd2b6SMatt Jacob init.Flags |= MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL; 1282444dd2b6SMatt Jacob } 12839b631363SMatt Jacob 12849b631363SMatt Jacob if ((error = mpt_send_handshake_cmd(mpt, sizeof init, &init)) != 0) { 12859b631363SMatt Jacob return(error); 12869b631363SMatt Jacob } 12879b631363SMatt Jacob 12889b631363SMatt Jacob error = mpt_recv_handshake_reply(mpt, sizeof reply, &reply); 12899b631363SMatt Jacob return (error); 12909b631363SMatt Jacob } 12919b631363SMatt Jacob 12927104aeefSMatt Jacob 12937104aeefSMatt Jacob /* 12947104aeefSMatt Jacob * Utiltity routine to read configuration headers and pages 12957104aeefSMatt Jacob */ 1296b0a2fdeeSScott Long int 1297b0a2fdeeSScott Long mpt_issue_cfg_req(struct mpt_softc *mpt, request_t *req, u_int Action, 1298b0a2fdeeSScott Long u_int PageVersion, u_int PageLength, u_int PageNumber, 1299b0a2fdeeSScott Long u_int PageType, uint32_t PageAddress, bus_addr_t addr, 1300b0a2fdeeSScott Long bus_size_t len, int sleep_ok, int timeout_ms) 13017104aeefSMatt Jacob { 13027104aeefSMatt Jacob MSG_CONFIG *cfgp; 1303b0a2fdeeSScott Long SGE_SIMPLE32 *se; 13047104aeefSMatt Jacob 13057104aeefSMatt Jacob cfgp = req->req_vbuf; 1306b0a2fdeeSScott Long memset(cfgp, 0, sizeof *cfgp); 1307b0a2fdeeSScott Long cfgp->Action = Action; 13087104aeefSMatt Jacob cfgp->Function = MPI_FUNCTION_CONFIG; 1309b0a2fdeeSScott Long cfgp->Header.PageVersion = PageVersion; 1310b0a2fdeeSScott Long cfgp->Header.PageLength = PageLength; 1311b0a2fdeeSScott Long cfgp->Header.PageNumber = PageNumber; 1312b0a2fdeeSScott Long cfgp->Header.PageType = PageType; 13137104aeefSMatt Jacob cfgp->PageAddress = PageAddress; 1314b0a2fdeeSScott Long se = (SGE_SIMPLE32 *)&cfgp->PageBufferSGE; 1315b0a2fdeeSScott Long se->Address = addr; 1316b0a2fdeeSScott Long MPI_pSGE_SET_LENGTH(se, len); 1317b0a2fdeeSScott Long MPI_pSGE_SET_FLAGS(se, (MPI_SGE_FLAGS_SIMPLE_ELEMENT | 1318b0a2fdeeSScott Long MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER | 1319b0a2fdeeSScott Long MPI_SGE_FLAGS_END_OF_LIST | 1320b0a2fdeeSScott Long ((Action == MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT 1321b0a2fdeeSScott Long || Action == MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM) 1322b0a2fdeeSScott Long ? MPI_SGE_FLAGS_HOST_TO_IOC : MPI_SGE_FLAGS_IOC_TO_HOST))); 1323b0a2fdeeSScott Long cfgp->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_CONFIG); 13247104aeefSMatt Jacob 13257104aeefSMatt Jacob mpt_check_doorbell(mpt); 13267104aeefSMatt Jacob mpt_send_cmd(mpt, req); 1327b0a2fdeeSScott Long return (mpt_wait_req(mpt, req, REQ_STATE_DONE, REQ_STATE_DONE, 1328b0a2fdeeSScott Long sleep_ok, timeout_ms)); 13297104aeefSMatt Jacob } 13307104aeefSMatt Jacob 1331b0a2fdeeSScott Long 1332b0a2fdeeSScott Long int 1333b0a2fdeeSScott Long mpt_read_cfg_header(struct mpt_softc *mpt, int PageType, int PageNumber, 1334b0a2fdeeSScott Long uint32_t PageAddress, CONFIG_PAGE_HEADER *rslt, 1335b0a2fdeeSScott Long int sleep_ok, int timeout_ms) 1336b0a2fdeeSScott Long { 1337b0a2fdeeSScott Long request_t *req; 1338b0a2fdeeSScott Long int error; 1339b0a2fdeeSScott Long 1340b0a2fdeeSScott Long req = mpt_get_request(mpt, sleep_ok); 1341b0a2fdeeSScott Long if (req == NULL) { 1342b0a2fdeeSScott Long mpt_prt(mpt, "mpt_read_cfg_header: Get request failed!\n"); 13437104aeefSMatt Jacob return (-1); 13447104aeefSMatt Jacob } 1345b0a2fdeeSScott Long 1346b0a2fdeeSScott Long error = mpt_issue_cfg_req(mpt, req, MPI_CONFIG_ACTION_PAGE_HEADER, 1347b0a2fdeeSScott Long /*PageVersion*/0, /*PageLength*/0, PageNumber, 1348b0a2fdeeSScott Long PageType, PageAddress, /*addr*/0, /*len*/0, 1349b0a2fdeeSScott Long sleep_ok, timeout_ms); 1350b0a2fdeeSScott Long if (error != 0) { 1351b0a2fdeeSScott Long mpt_prt(mpt, "read_cfg_header timed out\n"); 1352b0a2fdeeSScott Long return (-1); 1353b0a2fdeeSScott Long } 1354b0a2fdeeSScott Long 1355b0a2fdeeSScott Long if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1356b0a2fdeeSScott Long mpt_prt(mpt, "mpt_read_cfg_header: Config Info Status %x\n", 1357b0a2fdeeSScott Long req->IOCStatus); 1358b0a2fdeeSScott Long error = -1; 1359b0a2fdeeSScott Long } else { 1360b0a2fdeeSScott Long MSG_CONFIG *cfgp; 1361b0a2fdeeSScott Long 1362b0a2fdeeSScott Long cfgp = req->req_vbuf; 1363b0a2fdeeSScott Long bcopy(&cfgp->Header, rslt, sizeof(*rslt)); 1364b0a2fdeeSScott Long error = 0; 1365b0a2fdeeSScott Long } 13667104aeefSMatt Jacob mpt_free_request(mpt, req); 1367b0a2fdeeSScott Long return (error); 13687104aeefSMatt Jacob } 13697104aeefSMatt Jacob 13700424fb53SMatt Jacob #define CFG_DATA_OFF 128 13717104aeefSMatt Jacob 1372ce68dae5SMatt Jacob int 1373b0a2fdeeSScott Long mpt_read_cfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress, 1374b0a2fdeeSScott Long CONFIG_PAGE_HEADER *hdr, size_t len, int sleep_ok, 1375b0a2fdeeSScott Long int timeout_ms) 13767104aeefSMatt Jacob { 13777104aeefSMatt Jacob request_t *req; 1378b0a2fdeeSScott Long int error; 13797104aeefSMatt Jacob 1380b0a2fdeeSScott Long req = mpt_get_request(mpt, sleep_ok); 1381b0a2fdeeSScott Long if (req == NULL) { 1382b0a2fdeeSScott Long mpt_prt(mpt, "mpt_read_cfg_page: Get request failed!\n"); 13837104aeefSMatt Jacob return (-1); 13847104aeefSMatt Jacob } 13857104aeefSMatt Jacob 1386b0a2fdeeSScott Long error = mpt_issue_cfg_req(mpt, req, Action, hdr->PageVersion, 1387b0a2fdeeSScott Long hdr->PageLength, hdr->PageNumber, 1388b0a2fdeeSScott Long hdr->PageType & MPI_CONFIG_PAGETYPE_MASK, 1389b0a2fdeeSScott Long PageAddress, req->req_pbuf + CFG_DATA_OFF, 1390b0a2fdeeSScott Long len, sleep_ok, timeout_ms); 1391b0a2fdeeSScott Long if (error != 0) { 1392b0a2fdeeSScott Long mpt_prt(mpt, "read_cfg_page(%d) timed out\n", Action); 13937104aeefSMatt Jacob return (-1); 13947104aeefSMatt Jacob } 1395b0a2fdeeSScott Long 1396b0a2fdeeSScott Long if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1397b0a2fdeeSScott Long mpt_prt(mpt, "mpt_read_cfg_page: Config Info Status %x\n", 1398b0a2fdeeSScott Long req->IOCStatus); 1399b0a2fdeeSScott Long mpt_free_request(mpt, req); 1400b0a2fdeeSScott Long return (-1); 1401b0a2fdeeSScott Long } 14027104aeefSMatt Jacob bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap, 14037104aeefSMatt Jacob BUS_DMASYNC_POSTREAD); 1404b0a2fdeeSScott Long memcpy(hdr, ((uint8_t *)req->req_vbuf)+CFG_DATA_OFF, len); 14057104aeefSMatt Jacob mpt_free_request(mpt, req); 14067104aeefSMatt Jacob return (0); 14077104aeefSMatt Jacob } 14087104aeefSMatt Jacob 1409ce68dae5SMatt Jacob int 1410b0a2fdeeSScott Long mpt_write_cfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress, 1411b0a2fdeeSScott Long CONFIG_PAGE_HEADER *hdr, size_t len, int sleep_ok, 1412b0a2fdeeSScott Long int timeout_ms) 14137104aeefSMatt Jacob { 14147104aeefSMatt Jacob request_t *req; 1415b0a2fdeeSScott Long u_int hdr_attr; 1416b0a2fdeeSScott Long int error; 14177104aeefSMatt Jacob 14187104aeefSMatt Jacob hdr_attr = hdr->PageType & MPI_CONFIG_PAGEATTR_MASK; 14197104aeefSMatt Jacob if (hdr_attr != MPI_CONFIG_PAGEATTR_CHANGEABLE && 14207104aeefSMatt Jacob hdr_attr != MPI_CONFIG_PAGEATTR_PERSISTENT) { 1421b0a2fdeeSScott Long mpt_prt(mpt, "page type 0x%x not changeable\n", 14227104aeefSMatt Jacob hdr->PageType & MPI_CONFIG_PAGETYPE_MASK); 14237104aeefSMatt Jacob return (-1); 14247104aeefSMatt Jacob } 1425b0a2fdeeSScott Long hdr->PageType &= MPI_CONFIG_PAGETYPE_MASK, 14267104aeefSMatt Jacob 1427b0a2fdeeSScott Long req = mpt_get_request(mpt, sleep_ok); 1428b0a2fdeeSScott Long if (req == NULL) 1429b0a2fdeeSScott Long return (-1); 14307104aeefSMatt Jacob 1431b0a2fdeeSScott Long memcpy(((caddr_t)req->req_vbuf)+CFG_DATA_OFF, hdr, len); 1432301472c2SMatt Jacob /* Restore stripped out attributes */ 1433301472c2SMatt Jacob hdr->PageType |= hdr_attr; 14347104aeefSMatt Jacob 1435b0a2fdeeSScott Long error = mpt_issue_cfg_req(mpt, req, Action, hdr->PageVersion, 1436b0a2fdeeSScott Long hdr->PageLength, hdr->PageNumber, 1437b0a2fdeeSScott Long hdr->PageType & MPI_CONFIG_PAGETYPE_MASK, 1438b0a2fdeeSScott Long PageAddress, req->req_pbuf + CFG_DATA_OFF, 1439b0a2fdeeSScott Long len, sleep_ok, timeout_ms); 1440b0a2fdeeSScott Long if (error != 0) { 1441b0a2fdeeSScott Long mpt_prt(mpt, "mpt_write_cfg_page timed out\n"); 14427104aeefSMatt Jacob return (-1); 14437104aeefSMatt Jacob } 14447104aeefSMatt Jacob 1445b0a2fdeeSScott Long if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1446b0a2fdeeSScott Long mpt_prt(mpt, "mpt_write_cfg_page: Config Info Status %x\n", 1447b0a2fdeeSScott Long req->IOCStatus); 14487104aeefSMatt Jacob mpt_free_request(mpt, req); 1449b0a2fdeeSScott Long return (-1); 1450b0a2fdeeSScott Long } 1451b0a2fdeeSScott Long mpt_free_request(mpt, req); 1452b0a2fdeeSScott Long return (0); 1453b0a2fdeeSScott Long } 1454b0a2fdeeSScott Long 1455b0a2fdeeSScott Long /* 1456b0a2fdeeSScott Long * Read IOC configuration information 1457b0a2fdeeSScott Long */ 1458b0a2fdeeSScott Long static int 1459b0a2fdeeSScott Long mpt_read_config_info_ioc(struct mpt_softc *mpt) 1460b0a2fdeeSScott Long { 1461b0a2fdeeSScott Long CONFIG_PAGE_HEADER hdr; 1462b0a2fdeeSScott Long struct mpt_raid_volume *mpt_raid; 1463b0a2fdeeSScott Long int rv; 1464b0a2fdeeSScott Long int i; 1465b0a2fdeeSScott Long size_t len; 1466b0a2fdeeSScott Long 1467b0a2fdeeSScott Long rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_IOC, 1468b0a2fdeeSScott Long /*PageNumber*/2, /*PageAddress*/0, &hdr, 1469b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1470b0a2fdeeSScott Long if (rv) 1471b0a2fdeeSScott Long return (EIO); 1472b0a2fdeeSScott Long 1473b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC Page 2 Header: ver %x, len %x, " 1474b0a2fdeeSScott Long "num %x, type %x\n", hdr.PageVersion, 1475b0a2fdeeSScott Long hdr.PageLength * sizeof(uint32_t), 1476b0a2fdeeSScott Long hdr.PageNumber, hdr.PageType); 1477b0a2fdeeSScott Long 1478b0a2fdeeSScott Long len = hdr.PageLength * sizeof(uint32_t); 1479a3699bcaSScott Long mpt->ioc_page2 = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 1480b0a2fdeeSScott Long if (mpt->ioc_page2 == NULL) 1481b0a2fdeeSScott Long return (ENOMEM); 1482b0a2fdeeSScott Long memcpy(&mpt->ioc_page2->Header, &hdr, sizeof(hdr)); 1483b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0, 1484b0a2fdeeSScott Long &mpt->ioc_page2->Header, len, 1485b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1486b0a2fdeeSScott Long if (rv) { 1487b0a2fdeeSScott Long mpt_prt(mpt, "failed to read IOC Page 2\n"); 1488b0a2fdeeSScott Long } else if (mpt->ioc_page2->CapabilitiesFlags != 0) { 1489b0a2fdeeSScott Long uint32_t mask; 1490b0a2fdeeSScott Long 1491b0a2fdeeSScott Long mpt_prt(mpt, "Capabilities: ("); 1492b0a2fdeeSScott Long for (mask = 1; mask != 0; mask <<= 1) { 1493b0a2fdeeSScott Long if ((mpt->ioc_page2->CapabilitiesFlags & mask) == 0) 1494b0a2fdeeSScott Long continue; 1495b0a2fdeeSScott Long 1496b0a2fdeeSScott Long switch (mask) { 1497b0a2fdeeSScott Long case MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT: 1498b0a2fdeeSScott Long mpt_prtc(mpt, " RAID-0"); 1499b0a2fdeeSScott Long break; 1500b0a2fdeeSScott Long case MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT: 1501b0a2fdeeSScott Long mpt_prtc(mpt, " RAID-1E"); 1502b0a2fdeeSScott Long break; 1503b0a2fdeeSScott Long case MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT: 1504b0a2fdeeSScott Long mpt_prtc(mpt, " RAID-1"); 1505b0a2fdeeSScott Long break; 1506b0a2fdeeSScott Long case MPI_IOCPAGE2_CAP_FLAGS_SES_SUPPORT: 1507b0a2fdeeSScott Long mpt_prtc(mpt, " SES"); 1508b0a2fdeeSScott Long break; 1509b0a2fdeeSScott Long case MPI_IOCPAGE2_CAP_FLAGS_SAFTE_SUPPORT: 1510b0a2fdeeSScott Long mpt_prtc(mpt, " SAFTE"); 1511b0a2fdeeSScott Long break; 1512b0a2fdeeSScott Long case MPI_IOCPAGE2_CAP_FLAGS_CROSS_CHANNEL_SUPPORT: 1513b0a2fdeeSScott Long mpt_prtc(mpt, " Multi-Channel-Arrays"); 1514b0a2fdeeSScott Long default: 1515b0a2fdeeSScott Long break; 1516b0a2fdeeSScott Long } 1517b0a2fdeeSScott Long } 1518b0a2fdeeSScott Long mpt_prtc(mpt, " )\n"); 1519b0a2fdeeSScott Long if ((mpt->ioc_page2->CapabilitiesFlags 1520b0a2fdeeSScott Long & (MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT 1521b0a2fdeeSScott Long | MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT 1522b0a2fdeeSScott Long | MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT)) != 0) { 1523b0a2fdeeSScott Long mpt_prt(mpt, "%d Active Volume%s(%d Max)\n", 1524b0a2fdeeSScott Long mpt->ioc_page2->NumActiveVolumes, 1525b0a2fdeeSScott Long mpt->ioc_page2->NumActiveVolumes != 1 1526b0a2fdeeSScott Long ? "s " : " ", 1527b0a2fdeeSScott Long mpt->ioc_page2->MaxVolumes); 1528b0a2fdeeSScott Long mpt_prt(mpt, "%d Hidden Drive Member%s(%d Max)\n", 1529b0a2fdeeSScott Long mpt->ioc_page2->NumActivePhysDisks, 1530b0a2fdeeSScott Long mpt->ioc_page2->NumActivePhysDisks != 1 1531b0a2fdeeSScott Long ? "s " : " ", 1532b0a2fdeeSScott Long mpt->ioc_page2->MaxPhysDisks); 1533b0a2fdeeSScott Long } 1534b0a2fdeeSScott Long } 1535b0a2fdeeSScott Long 1536b0a2fdeeSScott Long len = mpt->ioc_page2->MaxVolumes * sizeof(struct mpt_raid_volume); 1537b0a2fdeeSScott Long mpt->raid_volumes = malloc(len, M_DEVBUF, M_NOWAIT); 1538b0a2fdeeSScott Long if (mpt->raid_volumes == NULL) { 1539b0a2fdeeSScott Long mpt_prt(mpt, "Could not allocate RAID volume data\n"); 1540b0a2fdeeSScott Long } else { 1541b0a2fdeeSScott Long memset(mpt->raid_volumes, 0, len); 1542b0a2fdeeSScott Long } 1543b0a2fdeeSScott Long 1544b0a2fdeeSScott Long /* 1545b0a2fdeeSScott Long * Copy critical data out of ioc_page2 so that we can 1546b0a2fdeeSScott Long * safely refresh the page without windows of unreliable 1547b0a2fdeeSScott Long * data. 1548b0a2fdeeSScott Long */ 1549b0a2fdeeSScott Long mpt->raid_max_volumes = mpt->ioc_page2->MaxVolumes; 1550b0a2fdeeSScott Long 1551b0a2fdeeSScott Long len = sizeof(*mpt->raid_volumes->config_page) 1552b0a2fdeeSScott Long + (sizeof(RAID_VOL0_PHYS_DISK)*(mpt->ioc_page2->MaxPhysDisks - 1)); 1553b0a2fdeeSScott Long for (i = 0; i < mpt->ioc_page2->MaxVolumes; i++) { 1554b0a2fdeeSScott Long mpt_raid = &mpt->raid_volumes[i]; 1555b0a2fdeeSScott Long mpt_raid->config_page = malloc(len, M_DEVBUF, M_NOWAIT); 1556b0a2fdeeSScott Long if (mpt_raid->config_page == NULL) { 1557b0a2fdeeSScott Long mpt_prt(mpt, "Could not allocate RAID page data\n"); 1558b0a2fdeeSScott Long break; 1559b0a2fdeeSScott Long } 1560b0a2fdeeSScott Long memset(mpt_raid->config_page, 0, len); 1561b0a2fdeeSScott Long } 1562b0a2fdeeSScott Long mpt->raid_page0_len = len; 1563b0a2fdeeSScott Long 1564b0a2fdeeSScott Long len = mpt->ioc_page2->MaxPhysDisks * sizeof(struct mpt_raid_disk); 1565b0a2fdeeSScott Long mpt->raid_disks = malloc(len, M_DEVBUF, M_NOWAIT); 1566b0a2fdeeSScott Long if (mpt->raid_disks == NULL) { 1567b0a2fdeeSScott Long mpt_prt(mpt, "Could not allocate RAID disk data\n"); 1568b0a2fdeeSScott Long } else { 1569b0a2fdeeSScott Long memset(mpt->raid_disks, 0, len); 1570b0a2fdeeSScott Long } 1571b0a2fdeeSScott Long 1572b0a2fdeeSScott Long mpt->raid_max_disks = mpt->ioc_page2->MaxPhysDisks; 1573b0a2fdeeSScott Long 1574b0a2fdeeSScott Long rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_IOC, 1575b0a2fdeeSScott Long /*PageNumber*/3, /*PageAddress*/0, &hdr, 1576b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1577b0a2fdeeSScott Long if (rv) 1578b0a2fdeeSScott Long return (EIO); 1579b0a2fdeeSScott Long 1580b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC Page 3 Header: %x %x %x %x\n", 1581b0a2fdeeSScott Long hdr.PageVersion, hdr.PageLength, hdr.PageNumber, hdr.PageType); 1582b0a2fdeeSScott Long 1583b0a2fdeeSScott Long if (mpt->ioc_page3 != NULL) 1584b0a2fdeeSScott Long free(mpt->ioc_page3, M_DEVBUF); 1585b0a2fdeeSScott Long len = hdr.PageLength * sizeof(uint32_t); 1586a3699bcaSScott Long mpt->ioc_page3 = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 1587b0a2fdeeSScott Long if (mpt->ioc_page3 == NULL) 1588b0a2fdeeSScott Long return (-1); 1589b0a2fdeeSScott Long memcpy(&mpt->ioc_page3->Header, &hdr, sizeof(hdr)); 1590b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0, 1591b0a2fdeeSScott Long &mpt->ioc_page3->Header, len, 1592b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1593b0a2fdeeSScott Long if (rv) { 1594b0a2fdeeSScott Long mpt_prt(mpt, "failed to read IOC Page 3\n"); 1595b0a2fdeeSScott Long } 1596b0a2fdeeSScott Long 1597b0a2fdeeSScott Long mpt_raid_wakeup(mpt); 1598b0a2fdeeSScott Long 15997104aeefSMatt Jacob return (0); 16007104aeefSMatt Jacob } 16017104aeefSMatt Jacob 16027104aeefSMatt Jacob /* 16037104aeefSMatt Jacob * Read SCSI configuration information 16047104aeefSMatt Jacob */ 16057104aeefSMatt Jacob static int 1606b0a2fdeeSScott Long mpt_read_config_info_spi(struct mpt_softc *mpt) 16077104aeefSMatt Jacob { 16087104aeefSMatt Jacob int rv, i; 16097104aeefSMatt Jacob 16107104aeefSMatt Jacob rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_PORT, 0, 1611b0a2fdeeSScott Long 0, &mpt->mpt_port_page0.Header, 1612b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1613b0a2fdeeSScott Long if (rv) 16147104aeefSMatt Jacob return (-1); 1615b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1616b0a2fdeeSScott Long "SPI Port Page 0 Header: %x %x %x %x\n", 16177104aeefSMatt Jacob mpt->mpt_port_page0.Header.PageVersion, 16187104aeefSMatt Jacob mpt->mpt_port_page0.Header.PageLength, 16197104aeefSMatt Jacob mpt->mpt_port_page0.Header.PageNumber, 16207104aeefSMatt Jacob mpt->mpt_port_page0.Header.PageType); 16217104aeefSMatt Jacob 16227104aeefSMatt Jacob rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_PORT, 1, 1623b0a2fdeeSScott Long 0, &mpt->mpt_port_page1.Header, 1624b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1625b0a2fdeeSScott Long if (rv) 16267104aeefSMatt Jacob return (-1); 1627b0a2fdeeSScott Long 1628b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "SPI Port Page 1 Header: %x %x %x %x\n", 16297104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageVersion, 16307104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageLength, 16317104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageNumber, 16327104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageType); 16337104aeefSMatt Jacob 16347104aeefSMatt Jacob rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_PORT, 2, 1635b0a2fdeeSScott Long /*PageAddress*/0, &mpt->mpt_port_page2.Header, 1636b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1637b0a2fdeeSScott Long if (rv) 16387104aeefSMatt Jacob return (-1); 16397104aeefSMatt Jacob 1640b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1641b0a2fdeeSScott Long "SPI Port Page 2 Header: %x %x %x %x\n", 16427104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageVersion, 16437104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageLength, 16447104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageNumber, 16457104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageType); 16467104aeefSMatt Jacob 16477104aeefSMatt Jacob for (i = 0; i < 16; i++) { 16487104aeefSMatt Jacob rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_DEVICE, 1649b0a2fdeeSScott Long 0, i, &mpt->mpt_dev_page0[i].Header, 1650b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1651b0a2fdeeSScott Long if (rv) 16527104aeefSMatt Jacob return (-1); 1653b0a2fdeeSScott Long 1654b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1655b0a2fdeeSScott Long "SPI Target %d Device Page 0 Header: %x %x %x %x\n", 16567104aeefSMatt Jacob i, mpt->mpt_dev_page0[i].Header.PageVersion, 16577104aeefSMatt Jacob mpt->mpt_dev_page0[i].Header.PageLength, 16587104aeefSMatt Jacob mpt->mpt_dev_page0[i].Header.PageNumber, 16597104aeefSMatt Jacob mpt->mpt_dev_page0[i].Header.PageType); 16607104aeefSMatt Jacob 16617104aeefSMatt Jacob rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_DEVICE, 1662b0a2fdeeSScott Long 1, i, &mpt->mpt_dev_page1[i].Header, 1663b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1664b0a2fdeeSScott Long if (rv) 16657104aeefSMatt Jacob return (-1); 1666b0a2fdeeSScott Long 1667b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1668b0a2fdeeSScott Long "SPI Target %d Device Page 1 Header: %x %x %x %x\n", 16697104aeefSMatt Jacob i, mpt->mpt_dev_page1[i].Header.PageVersion, 16707104aeefSMatt Jacob mpt->mpt_dev_page1[i].Header.PageLength, 16717104aeefSMatt Jacob mpt->mpt_dev_page1[i].Header.PageNumber, 16727104aeefSMatt Jacob mpt->mpt_dev_page1[i].Header.PageType); 16737104aeefSMatt Jacob } 16747104aeefSMatt Jacob 16757104aeefSMatt Jacob /* 16767104aeefSMatt Jacob * At this point, we don't *have* to fail. As long as we have 16777104aeefSMatt Jacob * valid config header information, we can (barely) lurch 16787104aeefSMatt Jacob * along. 16797104aeefSMatt Jacob */ 16807104aeefSMatt Jacob 1681b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0, 1682b0a2fdeeSScott Long &mpt->mpt_port_page0.Header, 1683b0a2fdeeSScott Long sizeof(mpt->mpt_port_page0), 1684b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 16857104aeefSMatt Jacob if (rv) { 1686b0a2fdeeSScott Long mpt_prt(mpt, "failed to read SPI Port Page 0\n"); 1687b0a2fdeeSScott Long } else { 1688b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1689b0a2fdeeSScott Long "SPI Port Page 0: Capabilities %x PhysicalInterface %x\n", 16907104aeefSMatt Jacob mpt->mpt_port_page0.Capabilities, 16917104aeefSMatt Jacob mpt->mpt_port_page0.PhysicalInterface); 16927104aeefSMatt Jacob } 16937104aeefSMatt Jacob 1694b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0, 1695b0a2fdeeSScott Long &mpt->mpt_port_page1.Header, 1696b0a2fdeeSScott Long sizeof(mpt->mpt_port_page1), 1697b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 16987104aeefSMatt Jacob if (rv) { 1699b0a2fdeeSScott Long mpt_prt(mpt, "failed to read SPI Port Page 1\n"); 1700b0a2fdeeSScott Long } else { 1701b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1702b0a2fdeeSScott Long "SPI Port Page 1: Configuration %x OnBusTimerValue %x\n", 17037104aeefSMatt Jacob mpt->mpt_port_page1.Configuration, 17047104aeefSMatt Jacob mpt->mpt_port_page1.OnBusTimerValue); 17057104aeefSMatt Jacob } 17067104aeefSMatt Jacob 1707b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0, 1708b0a2fdeeSScott Long &mpt->mpt_port_page2.Header, 1709b0a2fdeeSScott Long sizeof(mpt->mpt_port_page2), 1710b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 17117104aeefSMatt Jacob if (rv) { 1712b0a2fdeeSScott Long mpt_prt(mpt, "failed to read SPI Port Page 2\n"); 1713b0a2fdeeSScott Long } else { 1714b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1715b0a2fdeeSScott Long "SPI Port Page 2: Flags %x Settings %x\n", 17167104aeefSMatt Jacob mpt->mpt_port_page2.PortFlags, 17177104aeefSMatt Jacob mpt->mpt_port_page2.PortSettings); 17187104aeefSMatt Jacob for (i = 0; i < 16; i++) { 1719b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1720b0a2fdeeSScott Long "SPI Port Page 2 Tgt %d: timo %x SF %x Flags %x\n", 17217104aeefSMatt Jacob i, mpt->mpt_port_page2.DeviceSettings[i].Timeout, 17227104aeefSMatt Jacob mpt->mpt_port_page2.DeviceSettings[i].SyncFactor, 17237104aeefSMatt Jacob mpt->mpt_port_page2.DeviceSettings[i].DeviceFlags); 17247104aeefSMatt Jacob } 17257104aeefSMatt Jacob } 17267104aeefSMatt Jacob 17277104aeefSMatt Jacob for (i = 0; i < 16; i++) { 1728b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/i, 1729b0a2fdeeSScott Long &mpt->mpt_dev_page0[i].Header, 1730b0a2fdeeSScott Long sizeof(*mpt->mpt_dev_page0), 1731b0a2fdeeSScott Long /*sleep_ok*/FALSE, 1732b0a2fdeeSScott Long /*timeout_ms*/5000); 17337104aeefSMatt Jacob if (rv) { 1734b0a2fdeeSScott Long mpt_prt(mpt, 1735b0a2fdeeSScott Long "cannot read SPI Tgt %d Device Page 0\n", i); 17367104aeefSMatt Jacob continue; 17377104aeefSMatt Jacob } 1738b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1739301472c2SMatt Jacob "SPI Tgt %d Page 0: NParms %x Information %x", 17407104aeefSMatt Jacob i, mpt->mpt_dev_page0[i].NegotiatedParameters, 17417104aeefSMatt Jacob mpt->mpt_dev_page0[i].Information); 1742b0a2fdeeSScott Long 1743b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/i, 1744b0a2fdeeSScott Long &mpt->mpt_dev_page1[i].Header, 1745b0a2fdeeSScott Long sizeof(*mpt->mpt_dev_page1), 1746b0a2fdeeSScott Long /*sleep_ok*/FALSE, 1747b0a2fdeeSScott Long /*timeout_ms*/5000); 17487104aeefSMatt Jacob if (rv) { 1749b0a2fdeeSScott Long mpt_prt(mpt, 1750b0a2fdeeSScott Long "cannot read SPI Tgt %d Device Page 1\n", i); 17517104aeefSMatt Jacob continue; 17527104aeefSMatt Jacob } 1753b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1754b0a2fdeeSScott Long "SPI Tgt %d Page 1: RParms %x Configuration %x\n", 17557104aeefSMatt Jacob i, mpt->mpt_dev_page1[i].RequestedParameters, 17567104aeefSMatt Jacob mpt->mpt_dev_page1[i].Configuration); 17577104aeefSMatt Jacob } 17587104aeefSMatt Jacob return (0); 17597104aeefSMatt Jacob } 17607104aeefSMatt Jacob 17617104aeefSMatt Jacob /* 17627104aeefSMatt Jacob * Validate SPI configuration information. 17637104aeefSMatt Jacob * 17647104aeefSMatt Jacob * In particular, validate SPI Port Page 1. 17657104aeefSMatt Jacob */ 17667104aeefSMatt Jacob static int 1767b0a2fdeeSScott Long mpt_set_initial_config_spi(struct mpt_softc *mpt) 17687104aeefSMatt Jacob { 17697104aeefSMatt Jacob int i, pp1val = ((1 << mpt->mpt_ini_id) << 16) | mpt->mpt_ini_id; 1770b0a2fdeeSScott Long int error; 17717104aeefSMatt Jacob 1772ce68dae5SMatt Jacob mpt->mpt_disc_enable = 0xff; 1773ce68dae5SMatt Jacob mpt->mpt_tag_enable = 0; 1774ce68dae5SMatt Jacob 17757104aeefSMatt Jacob if (mpt->mpt_port_page1.Configuration != pp1val) { 17767fed69eeSMatt Jacob CONFIG_PAGE_SCSI_PORT_1 tmp; 1777b0a2fdeeSScott Long 1778301472c2SMatt Jacob mpt_prt(mpt, 1779b0a2fdeeSScott Long "SPI Port Page 1 Config value bad (%x)- should be %x\n", 17807104aeefSMatt Jacob mpt->mpt_port_page1.Configuration, pp1val); 17817104aeefSMatt Jacob tmp = mpt->mpt_port_page1; 17827104aeefSMatt Jacob tmp.Configuration = pp1val; 1783b0a2fdeeSScott Long error = mpt_write_cur_cfg_page(mpt, /*PageAddress*/0, 1784b0a2fdeeSScott Long &tmp.Header, sizeof(tmp), 1785b0a2fdeeSScott Long /*sleep_ok*/FALSE, 1786b0a2fdeeSScott Long /*timeout_ms*/5000); 1787b0a2fdeeSScott Long if (error) 17887104aeefSMatt Jacob return (-1); 1789b0a2fdeeSScott Long error = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0, 1790b0a2fdeeSScott Long &tmp.Header, sizeof(tmp), 1791b0a2fdeeSScott Long /*sleep_ok*/FALSE, 1792b0a2fdeeSScott Long /*timeout_ms*/5000); 1793b0a2fdeeSScott Long if (error) 17947104aeefSMatt Jacob return (-1); 17957104aeefSMatt Jacob if (tmp.Configuration != pp1val) { 1796301472c2SMatt Jacob mpt_prt(mpt, 1797b0a2fdeeSScott Long "failed to reset SPI Port Page 1 Config value\n"); 17987104aeefSMatt Jacob return (-1); 17997104aeefSMatt Jacob } 18007104aeefSMatt Jacob mpt->mpt_port_page1 = tmp; 18017104aeefSMatt Jacob } 18027104aeefSMatt Jacob 18037104aeefSMatt Jacob for (i = 0; i < 16; i++) { 18047fed69eeSMatt Jacob CONFIG_PAGE_SCSI_DEVICE_1 tmp; 18057104aeefSMatt Jacob tmp = mpt->mpt_dev_page1[i]; 18067104aeefSMatt Jacob tmp.RequestedParameters = 0; 18077104aeefSMatt Jacob tmp.Configuration = 0; 1808b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1809b0a2fdeeSScott Long "Set Tgt %d SPI DevicePage 1 values to %x 0 %x\n", 18107104aeefSMatt Jacob i, tmp.RequestedParameters, tmp.Configuration); 1811b0a2fdeeSScott Long error = mpt_write_cur_cfg_page(mpt, /*PageAddress*/i, 1812b0a2fdeeSScott Long &tmp.Header, sizeof(tmp), 1813b0a2fdeeSScott Long /*sleep_ok*/FALSE, 1814b0a2fdeeSScott Long /*timeout_ms*/5000); 1815b0a2fdeeSScott Long if (error) 18167104aeefSMatt Jacob return (-1); 1817b0a2fdeeSScott Long error = mpt_read_cur_cfg_page(mpt, /*PageAddress*/i, 1818b0a2fdeeSScott Long &tmp.Header, sizeof(tmp), 1819b0a2fdeeSScott Long /*sleep_ok*/FALSE, 1820b0a2fdeeSScott Long /*timeout_ms*/5000); 1821b0a2fdeeSScott Long if (error) 18227104aeefSMatt Jacob return (-1); 18237104aeefSMatt Jacob mpt->mpt_dev_page1[i] = tmp; 1824b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1825b0a2fdeeSScott Long "SPI Tgt %d Page 1: RParm %x Configuration %x\n", i, 18267104aeefSMatt Jacob mpt->mpt_dev_page1[i].RequestedParameters, 18277104aeefSMatt Jacob mpt->mpt_dev_page1[i].Configuration); 18287104aeefSMatt Jacob } 18297104aeefSMatt Jacob return (0); 18307104aeefSMatt Jacob } 18317104aeefSMatt Jacob 18327104aeefSMatt Jacob /* 18337104aeefSMatt Jacob * Enable IOC port 18347104aeefSMatt Jacob */ 18357104aeefSMatt Jacob static int 1836b0a2fdeeSScott Long mpt_send_port_enable(struct mpt_softc *mpt, int port) 18379b631363SMatt Jacob { 18389b631363SMatt Jacob request_t *req; 18399b631363SMatt Jacob MSG_PORT_ENABLE *enable_req; 1840b0a2fdeeSScott Long int error; 18419b631363SMatt Jacob 1842b0a2fdeeSScott Long req = mpt_get_request(mpt, /*sleep_ok*/FALSE); 1843b0a2fdeeSScott Long if (req == NULL) 1844b0a2fdeeSScott Long return (-1); 18459b631363SMatt Jacob 18469b631363SMatt Jacob enable_req = req->req_vbuf; 18479b631363SMatt Jacob bzero(enable_req, sizeof *enable_req); 18489b631363SMatt Jacob 18499b631363SMatt Jacob enable_req->Function = MPI_FUNCTION_PORT_ENABLE; 1850b0a2fdeeSScott Long enable_req->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_CONFIG); 18519b631363SMatt Jacob enable_req->PortNumber = port; 18529b631363SMatt Jacob 18539b631363SMatt Jacob mpt_check_doorbell(mpt); 1854b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "enabling port %d\n", port); 18559b631363SMatt Jacob 1856b0a2fdeeSScott Long mpt_send_cmd(mpt, req); 1857b0a2fdeeSScott Long error = mpt_wait_req(mpt, req, REQ_STATE_DONE, REQ_STATE_DONE, 1858444dd2b6SMatt Jacob /*sleep_ok*/FALSE, /*time_ms*/mpt->is_sas? 30000 : 3000); 1859b0a2fdeeSScott Long if (error != 0) { 1860444dd2b6SMatt Jacob mpt_prt(mpt, "port enable timed out\n"); 18619b631363SMatt Jacob return (-1); 18629b631363SMatt Jacob } 18639b631363SMatt Jacob mpt_free_request(mpt, req); 18649b631363SMatt Jacob return (0); 18659b631363SMatt Jacob } 18669b631363SMatt Jacob 18679b631363SMatt Jacob /* 18689b631363SMatt Jacob * Enable/Disable asynchronous event reporting. 18699b631363SMatt Jacob * 18709b631363SMatt Jacob * NB: this is the first command we send via shared memory 18719b631363SMatt Jacob * instead of the handshake register. 18729b631363SMatt Jacob */ 18739b631363SMatt Jacob static int 1874b0a2fdeeSScott Long mpt_send_event_request(struct mpt_softc *mpt, int onoff) 18759b631363SMatt Jacob { 18769b631363SMatt Jacob request_t *req; 18779b631363SMatt Jacob MSG_EVENT_NOTIFY *enable_req; 18789b631363SMatt Jacob 1879b0a2fdeeSScott Long req = mpt_get_request(mpt, /*sleep_ok*/FALSE); 18809b631363SMatt Jacob 18819b631363SMatt Jacob enable_req = req->req_vbuf; 18829b631363SMatt Jacob bzero(enable_req, sizeof *enable_req); 18839b631363SMatt Jacob 18849b631363SMatt Jacob enable_req->Function = MPI_FUNCTION_EVENT_NOTIFICATION; 1885b0a2fdeeSScott Long enable_req->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_EVENTS); 18869b631363SMatt Jacob enable_req->Switch = onoff; 18879b631363SMatt Jacob 18889b631363SMatt Jacob mpt_check_doorbell(mpt); 1889b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1890b0a2fdeeSScott Long "%sabling async events\n", onoff ? "en" : "dis"); 18919b631363SMatt Jacob mpt_send_cmd(mpt, req); 18929b631363SMatt Jacob 18939b631363SMatt Jacob return (0); 18949b631363SMatt Jacob } 18959b631363SMatt Jacob 18969b631363SMatt Jacob /* 18979b631363SMatt Jacob * Un-mask the interupts on the chip. 18989b631363SMatt Jacob */ 18999b631363SMatt Jacob void 1900b0a2fdeeSScott Long mpt_enable_ints(struct mpt_softc *mpt) 19019b631363SMatt Jacob { 19029b631363SMatt Jacob /* Unmask every thing except door bell int */ 19039b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_MASK, MPT_INTR_DB_MASK); 19049b631363SMatt Jacob } 19059b631363SMatt Jacob 19069b631363SMatt Jacob /* 19079b631363SMatt Jacob * Mask the interupts on the chip. 19089b631363SMatt Jacob */ 19099b631363SMatt Jacob void 1910b0a2fdeeSScott Long mpt_disable_ints(struct mpt_softc *mpt) 19119b631363SMatt Jacob { 19129b631363SMatt Jacob /* Mask all interrupts */ 19139b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_MASK, 19149b631363SMatt Jacob MPT_INTR_REPLY_MASK | MPT_INTR_DB_MASK); 19159b631363SMatt Jacob } 19169b631363SMatt Jacob 1917b0a2fdeeSScott Long static void 1918b0a2fdeeSScott Long mpt_sysctl_attach(struct mpt_softc *mpt) 19199b631363SMatt Jacob { 1920b0a2fdeeSScott Long struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(mpt->dev); 1921b0a2fdeeSScott Long struct sysctl_oid *tree = device_get_sysctl_tree(mpt->dev); 19229b631363SMatt Jacob 1923b0a2fdeeSScott Long SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1924b0a2fdeeSScott Long "debug", CTLFLAG_RW, &mpt->verbose, 0, 1925b0a2fdeeSScott Long "Debugging/Verbose level"); 19269b631363SMatt Jacob } 19279b631363SMatt Jacob 1928b0a2fdeeSScott Long int 1929b0a2fdeeSScott Long mpt_attach(struct mpt_softc *mpt) 1930b0a2fdeeSScott Long { 1931b0a2fdeeSScott Long int i; 1932b0a2fdeeSScott Long 1933b0a2fdeeSScott Long for (i = 0; i < MPT_MAX_PERSONALITIES; i++) { 1934b0a2fdeeSScott Long struct mpt_personality *pers; 1935b0a2fdeeSScott Long int error; 1936b0a2fdeeSScott Long 1937b0a2fdeeSScott Long pers = mpt_personalities[i]; 1938b0a2fdeeSScott Long if (pers == NULL) 1939b0a2fdeeSScott Long continue; 1940b0a2fdeeSScott Long 1941b0a2fdeeSScott Long if (pers->probe(mpt) == 0) { 1942b0a2fdeeSScott Long error = pers->attach(mpt); 1943b0a2fdeeSScott Long if (error != 0) { 1944b0a2fdeeSScott Long mpt_detach(mpt); 1945b0a2fdeeSScott Long return (error); 1946b0a2fdeeSScott Long } 1947b0a2fdeeSScott Long mpt->mpt_pers_mask |= (0x1 << pers->id); 1948b0a2fdeeSScott Long pers->use_count++; 1949b0a2fdeeSScott Long } 1950b0a2fdeeSScott Long } 1951444dd2b6SMatt Jacob 1952b0a2fdeeSScott Long return (0); 1953b0a2fdeeSScott Long } 1954b0a2fdeeSScott Long 1955b0a2fdeeSScott Long int 1956b0a2fdeeSScott Long mpt_shutdown(struct mpt_softc *mpt) 1957b0a2fdeeSScott Long { 1958b0a2fdeeSScott Long struct mpt_personality *pers; 1959b0a2fdeeSScott Long 1960b0a2fdeeSScott Long MPT_PERS_FOREACH_REVERSE(mpt, pers) 1961b0a2fdeeSScott Long pers->shutdown(mpt); 1962b0a2fdeeSScott Long 1963b0a2fdeeSScott Long mpt_reset(mpt, /*reinit*/FALSE); 1964b0a2fdeeSScott Long return (0); 1965b0a2fdeeSScott Long } 1966b0a2fdeeSScott Long 1967b0a2fdeeSScott Long int 1968b0a2fdeeSScott Long mpt_detach(struct mpt_softc *mpt) 1969b0a2fdeeSScott Long { 1970b0a2fdeeSScott Long struct mpt_personality *pers; 1971b0a2fdeeSScott Long 1972b0a2fdeeSScott Long MPT_PERS_FOREACH_REVERSE(mpt, pers) { 1973b0a2fdeeSScott Long pers->detach(mpt); 1974b0a2fdeeSScott Long mpt->mpt_pers_mask &= ~(0x1 << pers->id); 1975b0a2fdeeSScott Long pers->use_count--; 1976b0a2fdeeSScott Long } 1977b0a2fdeeSScott Long 1978b0a2fdeeSScott Long return (0); 1979b0a2fdeeSScott Long } 1980b0a2fdeeSScott Long 1981b0a2fdeeSScott Long int 1982b0a2fdeeSScott Long mpt_core_load(struct mpt_personality *pers) 1983b0a2fdeeSScott Long { 1984b0a2fdeeSScott Long int i; 1985b0a2fdeeSScott Long 1986b0a2fdeeSScott Long /* 1987b0a2fdeeSScott Long * Setup core handlers and insert the default handler 1988b0a2fdeeSScott Long * into all "empty slots". 1989b0a2fdeeSScott Long */ 1990b0a2fdeeSScott Long for (i = 0; i < MPT_NUM_REPLY_HANDLERS; i++) 1991b0a2fdeeSScott Long mpt_reply_handlers[i] = mpt_default_reply_handler; 1992b0a2fdeeSScott Long 1993b0a2fdeeSScott Long mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_EVENTS)] = 1994b0a2fdeeSScott Long mpt_event_reply_handler; 1995b0a2fdeeSScott Long mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_CONFIG)] = 1996b0a2fdeeSScott Long mpt_config_reply_handler; 1997b0a2fdeeSScott Long mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_HANDSHAKE)] = 1998b0a2fdeeSScott Long mpt_handshake_reply_handler; 1999b0a2fdeeSScott Long 2000b0a2fdeeSScott Long return (0); 20019b631363SMatt Jacob } 20029b631363SMatt Jacob 20039b631363SMatt Jacob /* 2004b0a2fdeeSScott Long * Initialize per-instance driver data and perform 2005b0a2fdeeSScott Long * initial controller configuration. 20069b631363SMatt Jacob */ 2007b0a2fdeeSScott Long int 2008b0a2fdeeSScott Long mpt_core_attach(struct mpt_softc *mpt) 2009b0a2fdeeSScott Long { 2010b0a2fdeeSScott Long int val; 2011b0a2fdeeSScott Long int error; 2012b0a2fdeeSScott Long 2013b0a2fdeeSScott Long LIST_INIT(&mpt->ack_frames); 2014b0a2fdeeSScott Long 2015b0a2fdeeSScott Long /* Put all request buffers on the free list */ 2016b0a2fdeeSScott Long TAILQ_INIT(&mpt->request_pending_list); 2017b0a2fdeeSScott Long TAILQ_INIT(&mpt->request_free_list); 2018b0a2fdeeSScott Long for (val = 0; val < MPT_MAX_REQUESTS(mpt); val++) 2019b0a2fdeeSScott Long mpt_free_request(mpt, &mpt->request_pool[val]); 2020b0a2fdeeSScott Long 2021b0a2fdeeSScott Long mpt_sysctl_attach(mpt); 2022b0a2fdeeSScott Long 2023b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "doorbell req = %s\n", 2024b0a2fdeeSScott Long mpt_ioc_diag(mpt_read(mpt, MPT_OFFSET_DOORBELL))); 2025b0a2fdeeSScott Long 2026b0a2fdeeSScott Long error = mpt_configure_ioc(mpt); 2027b0a2fdeeSScott Long 2028b0a2fdeeSScott Long return (error); 20299b631363SMatt Jacob } 20309b631363SMatt Jacob 2031b0a2fdeeSScott Long void 2032b0a2fdeeSScott Long mpt_core_shutdown(struct mpt_softc *mpt) 2033b0a2fdeeSScott Long { 2034b0a2fdeeSScott Long } 2035b0a2fdeeSScott Long 2036b0a2fdeeSScott Long void 2037b0a2fdeeSScott Long mpt_core_detach(struct mpt_softc *mpt) 2038b0a2fdeeSScott Long { 2039b0a2fdeeSScott Long } 2040b0a2fdeeSScott Long 2041b0a2fdeeSScott Long int 2042b0a2fdeeSScott Long mpt_core_unload(struct mpt_personality *pers) 2043b0a2fdeeSScott Long { 2044b0a2fdeeSScott Long /* Unload is always successfull. */ 2045b0a2fdeeSScott Long return (0); 2046b0a2fdeeSScott Long } 2047b0a2fdeeSScott Long 2048b0a2fdeeSScott Long #define FW_UPLOAD_REQ_SIZE \ 2049b0a2fdeeSScott Long (sizeof(MSG_FW_UPLOAD) - sizeof(SGE_MPI_UNION) \ 2050b0a2fdeeSScott Long + sizeof(FW_UPLOAD_TCSGE) + sizeof(SGE_SIMPLE32)) 2051b0a2fdeeSScott Long 2052b0a2fdeeSScott Long static int 2053b0a2fdeeSScott Long mpt_upload_fw(struct mpt_softc *mpt) 2054b0a2fdeeSScott Long { 2055b0a2fdeeSScott Long uint8_t fw_req_buf[FW_UPLOAD_REQ_SIZE]; 2056b0a2fdeeSScott Long MSG_FW_UPLOAD_REPLY fw_reply; 2057b0a2fdeeSScott Long MSG_FW_UPLOAD *fw_req; 2058b0a2fdeeSScott Long FW_UPLOAD_TCSGE *tsge; 2059b0a2fdeeSScott Long SGE_SIMPLE32 *sge; 2060b0a2fdeeSScott Long uint32_t flags; 2061b0a2fdeeSScott Long int error; 2062b0a2fdeeSScott Long 2063b0a2fdeeSScott Long memset(&fw_req_buf, 0, sizeof(fw_req_buf)); 2064b0a2fdeeSScott Long fw_req = (MSG_FW_UPLOAD *)fw_req_buf; 2065b0a2fdeeSScott Long fw_req->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM; 2066b0a2fdeeSScott Long fw_req->Function = MPI_FUNCTION_FW_UPLOAD; 2067b0a2fdeeSScott Long fw_req->MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 2068b0a2fdeeSScott Long tsge = (FW_UPLOAD_TCSGE *)&fw_req->SGL; 2069b0a2fdeeSScott Long tsge->DetailsLength = 12; 2070b0a2fdeeSScott Long tsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT; 2071b0a2fdeeSScott Long tsge->ImageSize = htole32(mpt->fw_image_size); 2072b0a2fdeeSScott Long sge = (SGE_SIMPLE32 *)(tsge + 1); 2073b0a2fdeeSScott Long flags = (MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER 2074b0a2fdeeSScott Long | MPI_SGE_FLAGS_END_OF_LIST | MPI_SGE_FLAGS_SIMPLE_ELEMENT 2075b0a2fdeeSScott Long | MPI_SGE_FLAGS_32_BIT_ADDRESSING | MPI_SGE_FLAGS_IOC_TO_HOST); 2076b0a2fdeeSScott Long flags <<= MPI_SGE_FLAGS_SHIFT; 2077b0a2fdeeSScott Long sge->FlagsLength = htole32(flags | mpt->fw_image_size); 2078b0a2fdeeSScott Long sge->Address = htole32(mpt->fw_phys); 2079b0a2fdeeSScott Long error = mpt_send_handshake_cmd(mpt, sizeof(fw_req_buf), &fw_req_buf); 2080b0a2fdeeSScott Long if (error) 2081b0a2fdeeSScott Long return(error); 2082b0a2fdeeSScott Long error = mpt_recv_handshake_reply(mpt, sizeof(fw_reply), &fw_reply); 2083b0a2fdeeSScott Long return (error); 2084b0a2fdeeSScott Long } 2085b0a2fdeeSScott Long 2086b0a2fdeeSScott Long static void 2087b0a2fdeeSScott Long mpt_diag_outsl(struct mpt_softc *mpt, uint32_t addr, 2088b0a2fdeeSScott Long uint32_t *data, bus_size_t len) 2089b0a2fdeeSScott Long { 2090b0a2fdeeSScott Long uint32_t *data_end; 2091b0a2fdeeSScott Long 2092b0a2fdeeSScott Long data_end = data + (roundup2(len, sizeof(uint32_t)) / 4); 2093444dd2b6SMatt Jacob pci_enable_io(mpt->dev, SYS_RES_IOPORT); 2094b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, addr); 2095b0a2fdeeSScott Long while (data != data_end) { 2096b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, *data); 2097b0a2fdeeSScott Long data++; 2098b0a2fdeeSScott Long } 2099444dd2b6SMatt Jacob pci_disable_io(mpt->dev, SYS_RES_IOPORT); 2100b0a2fdeeSScott Long } 2101b0a2fdeeSScott Long 2102b0a2fdeeSScott Long static int 2103b0a2fdeeSScott Long mpt_download_fw(struct mpt_softc *mpt) 2104b0a2fdeeSScott Long { 2105b0a2fdeeSScott Long MpiFwHeader_t *fw_hdr; 2106b0a2fdeeSScott Long int error; 2107b0a2fdeeSScott Long uint32_t ext_offset; 2108b0a2fdeeSScott Long uint32_t data; 2109b0a2fdeeSScott Long 2110b0a2fdeeSScott Long mpt_prt(mpt, "Downloading Firmware - Image Size %d\n", 2111b0a2fdeeSScott Long mpt->fw_image_size); 2112b0a2fdeeSScott Long 2113b0a2fdeeSScott Long error = mpt_enable_diag_mode(mpt); 2114b0a2fdeeSScott Long if (error != 0) { 2115b0a2fdeeSScott Long mpt_prt(mpt, "Could not enter diagnostic mode!\n"); 2116b0a2fdeeSScott Long return (EIO); 2117b0a2fdeeSScott Long } 2118b0a2fdeeSScott Long 2119b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, 2120b0a2fdeeSScott Long MPI_DIAG_RW_ENABLE|MPI_DIAG_DISABLE_ARM); 2121b0a2fdeeSScott Long 2122b0a2fdeeSScott Long fw_hdr = (MpiFwHeader_t *)mpt->fw_image; 2123b0a2fdeeSScott Long mpt_diag_outsl(mpt, fw_hdr->LoadStartAddress, (uint32_t*)fw_hdr, 2124b0a2fdeeSScott Long fw_hdr->ImageSize); 2125b0a2fdeeSScott Long 2126b0a2fdeeSScott Long ext_offset = fw_hdr->NextImageHeaderOffset; 2127b0a2fdeeSScott Long while (ext_offset != 0) { 2128b0a2fdeeSScott Long MpiExtImageHeader_t *ext; 2129b0a2fdeeSScott Long 2130b0a2fdeeSScott Long ext = (MpiExtImageHeader_t *)((uintptr_t)fw_hdr + ext_offset); 2131b0a2fdeeSScott Long ext_offset = ext->NextImageHeaderOffset; 2132b0a2fdeeSScott Long 2133b0a2fdeeSScott Long mpt_diag_outsl(mpt, ext->LoadStartAddress, (uint32_t*)ext, 2134b0a2fdeeSScott Long ext->ImageSize); 2135b0a2fdeeSScott Long } 2136b0a2fdeeSScott Long 2137444dd2b6SMatt Jacob pci_enable_io(mpt->dev, SYS_RES_IOPORT); 2138b0a2fdeeSScott Long /* Setup the address to jump to on reset. */ 2139b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, fw_hdr->IopResetRegAddr); 2140b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, fw_hdr->IopResetVectorValue); 2141b0a2fdeeSScott Long 2142b0a2fdeeSScott Long /* 2143b0a2fdeeSScott Long * The controller sets the "flash bad" status after attempting 2144b0a2fdeeSScott Long * to auto-boot from flash. Clear the status so that the controller 2145b0a2fdeeSScott Long * will continue the boot process with our newly installed firmware. 2146b0a2fdeeSScott Long */ 2147b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, MPT_DIAG_MEM_CFG_BASE); 2148b0a2fdeeSScott Long data = mpt_pio_read(mpt, MPT_OFFSET_DIAG_DATA) | MPT_DIAG_MEM_CFG_BADFL; 2149b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, MPT_DIAG_MEM_CFG_BASE); 2150b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, data); 2151b0a2fdeeSScott Long 2152444dd2b6SMatt Jacob pci_disable_io(mpt->dev, SYS_RES_IOPORT); 2153444dd2b6SMatt Jacob 2154b0a2fdeeSScott Long /* 2155b0a2fdeeSScott Long * Re-enable the processor and clear the boot halt flag. 2156b0a2fdeeSScott Long */ 2157b0a2fdeeSScott Long data = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 2158b0a2fdeeSScott Long data &= ~(MPI_DIAG_PREVENT_IOC_BOOT|MPI_DIAG_DISABLE_ARM); 2159b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, data); 2160b0a2fdeeSScott Long 2161b0a2fdeeSScott Long mpt_disable_diag_mode(mpt); 2162b0a2fdeeSScott Long return (0); 2163b0a2fdeeSScott Long } 2164b0a2fdeeSScott Long 2165b0a2fdeeSScott Long /* 2166b0a2fdeeSScott Long * Allocate/Initialize data structures for the controller. Called 2167b0a2fdeeSScott Long * once at instance startup. 2168b0a2fdeeSScott Long */ 2169b0a2fdeeSScott Long static int 2170b0a2fdeeSScott Long mpt_configure_ioc(struct mpt_softc *mpt) 2171b0a2fdeeSScott Long { 2172b0a2fdeeSScott Long MSG_PORT_FACTS_REPLY pfp; 2173b0a2fdeeSScott Long MSG_IOC_FACTS_REPLY facts; 2174b0a2fdeeSScott Long int try; 2175b0a2fdeeSScott Long int needreset; 2176444dd2b6SMatt Jacob uint32_t max_chain_depth; 2177b0a2fdeeSScott Long 2178b0a2fdeeSScott Long needreset = 0; 21799b631363SMatt Jacob for (try = 0; try < MPT_MAX_TRYS; try++) { 2180b0a2fdeeSScott Long 21819b631363SMatt Jacob /* 21829b631363SMatt Jacob * No need to reset if the IOC is already in the READY state. 21839b631363SMatt Jacob * 21849b631363SMatt Jacob * Force reset if initialization failed previously. 21859b631363SMatt Jacob * Note that a hard_reset of the second channel of a '929 21869b631363SMatt Jacob * will stop operation of the first channel. Hopefully, if the 21879b631363SMatt Jacob * first channel is ok, the second will not require a hard 21889b631363SMatt Jacob * reset. 21899b631363SMatt Jacob */ 2190b0a2fdeeSScott Long if (needreset || (mpt_rd_db(mpt) & MPT_DB_STATE_MASK) != 21919b631363SMatt Jacob MPT_DB_STATE_READY) { 2192b0a2fdeeSScott Long if (mpt_reset(mpt, /*reinit*/FALSE) != MPT_OK) 21939b631363SMatt Jacob continue; 21949b631363SMatt Jacob } 2195b0a2fdeeSScott Long needreset = 0; 21969b631363SMatt Jacob 21979b631363SMatt Jacob if (mpt_get_iocfacts(mpt, &facts) != MPT_OK) { 2198b0a2fdeeSScott Long mpt_prt(mpt, "mpt_get_iocfacts failed\n"); 2199b0a2fdeeSScott Long needreset = 1; 22009b631363SMatt Jacob continue; 22017104aeefSMatt Jacob } 22027104aeefSMatt Jacob 2203b0a2fdeeSScott Long mpt->mpt_global_credits = le16toh(facts.GlobalCredits); 2204b0a2fdeeSScott Long mpt->request_frame_size = le16toh(facts.RequestFrameSize); 2205444dd2b6SMatt Jacob mpt->ioc_facts_flags = facts.Flags; 2206b0a2fdeeSScott Long mpt_prt(mpt, "MPI Version=%d.%d.%d.%d\n", 2207b0a2fdeeSScott Long le16toh(facts.MsgVersion) >> 8, 2208b0a2fdeeSScott Long le16toh(facts.MsgVersion) & 0xFF, 2209b0a2fdeeSScott Long le16toh(facts.HeaderVersion) >> 8, 2210b0a2fdeeSScott Long le16toh(facts.HeaderVersion) & 0xFF); 2211444dd2b6SMatt Jacob 2212444dd2b6SMatt Jacob /* 2213444dd2b6SMatt Jacob * Now that we know request frame size, we can calculate 2214444dd2b6SMatt Jacob * the actual (reasonable) segment limit for read/write I/O. 2215444dd2b6SMatt Jacob * 2216444dd2b6SMatt Jacob * This limit is constrained by: 2217444dd2b6SMatt Jacob * 2218444dd2b6SMatt Jacob * + The size of each area we allocate per command (and how 2219444dd2b6SMatt Jacob * many chain segments we can fit into it). 2220444dd2b6SMatt Jacob * + The total number of areas we've set up. 2221444dd2b6SMatt Jacob * + The actual chain depth the card will allow. 2222444dd2b6SMatt Jacob * 2223444dd2b6SMatt Jacob * The first area's segment count is limited by the I/O request 2224444dd2b6SMatt Jacob * at the head of it. We cannot allocate realistically more 2225444dd2b6SMatt Jacob * than MPT_MAX_REQUESTS areas. Therefore, to account for both 2226444dd2b6SMatt Jacob * conditions, we'll just start out with MPT_MAX_REQUESTS-2. 2227444dd2b6SMatt Jacob * 2228444dd2b6SMatt Jacob */ 2229444dd2b6SMatt Jacob max_chain_depth = facts.MaxChainDepth; 2230444dd2b6SMatt Jacob 2231444dd2b6SMatt Jacob /* total number of request areas we (can) allocate */ 2232444dd2b6SMatt Jacob mpt->max_seg_cnt = MPT_MAX_REQUESTS(mpt) - 2; 2233444dd2b6SMatt Jacob 2234444dd2b6SMatt Jacob /* converted to the number of chain areas possible */ 2235444dd2b6SMatt Jacob mpt->max_seg_cnt *= MPT_NRFM(mpt); 2236444dd2b6SMatt Jacob 2237444dd2b6SMatt Jacob /* limited by the number of chain areas the card will support */ 2238444dd2b6SMatt Jacob if (mpt->max_seg_cnt > max_chain_depth) { 2239444dd2b6SMatt Jacob mpt_lprt(mpt, MPT_PRT_DEBUG, 2240444dd2b6SMatt Jacob "chain depth limited to %u (from %u)\n", 2241444dd2b6SMatt Jacob max_chain_depth, mpt->max_seg_cnt); 2242444dd2b6SMatt Jacob mpt->max_seg_cnt = max_chain_depth; 2243444dd2b6SMatt Jacob } 2244444dd2b6SMatt Jacob 2245444dd2b6SMatt Jacob /* converted to the number of simple sges in chain segments. */ 2246444dd2b6SMatt Jacob mpt->max_seg_cnt *= (MPT_NSGL(mpt) - 1); 2247444dd2b6SMatt Jacob 2248444dd2b6SMatt Jacob mpt_lprt(mpt, MPT_PRT_DEBUG, 2249444dd2b6SMatt Jacob "Maximum Segment Count: %u\n", mpt->max_seg_cnt); 2250b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 2251b0a2fdeeSScott Long "MsgLength=%u IOCNumber = %d\n", 2252b0a2fdeeSScott Long facts.MsgLength, facts.IOCNumber); 2253b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 2254444dd2b6SMatt Jacob "IOCFACTS: GlobalCredits=%d BlockSize=%u bytes " 2255444dd2b6SMatt Jacob "Request Frame Size %u bytes Max Chain Depth %u\n", 2256444dd2b6SMatt Jacob mpt->mpt_global_credits, facts.BlockSize, 2257444dd2b6SMatt Jacob mpt->request_frame_size << 2, max_chain_depth); 2258b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 2259b0a2fdeeSScott Long "IOCFACTS: Num Ports %d, FWImageSize %d, " 2260b0a2fdeeSScott Long "Flags=%#x\n", facts.NumberOfPorts, 2261b0a2fdeeSScott Long le32toh(facts.FWImageSize), facts.Flags); 2262b0a2fdeeSScott Long 2263444dd2b6SMatt Jacob 2264b0a2fdeeSScott Long if ((facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT) != 0) { 2265b0a2fdeeSScott Long struct mpt_map_info mi; 2266b0a2fdeeSScott Long int error; 2267b0a2fdeeSScott Long 2268b0a2fdeeSScott Long /* 2269b0a2fdeeSScott Long * In some configurations, the IOC's firmware is 2270b0a2fdeeSScott Long * stored in a shared piece of system NVRAM that 2271b0a2fdeeSScott Long * is only accessable via the BIOS. In this 2272b0a2fdeeSScott Long * case, the firmware keeps a copy of firmware in 2273b0a2fdeeSScott Long * RAM until the OS driver retrieves it. Once 2274b0a2fdeeSScott Long * retrieved, we are responsible for re-downloading 2275b0a2fdeeSScott Long * the firmware after any hard-reset. 2276b0a2fdeeSScott Long */ 2277b0a2fdeeSScott Long mpt->fw_image_size = le32toh(facts.FWImageSize); 2278b0a2fdeeSScott Long error = mpt_dma_tag_create(mpt, mpt->parent_dmat, 2279b0a2fdeeSScott Long /*alignment*/1, /*boundary*/0, 2280b0a2fdeeSScott Long /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 2281b0a2fdeeSScott Long /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, 2282b0a2fdeeSScott Long /*filterarg*/NULL, mpt->fw_image_size, 2283b0a2fdeeSScott Long /*nsegments*/1, /*maxsegsz*/mpt->fw_image_size, 2284b0a2fdeeSScott Long /*flags*/0, &mpt->fw_dmat); 2285b0a2fdeeSScott Long if (error != 0) { 2286b0a2fdeeSScott Long mpt_prt(mpt, "cannot create fw dma tag\n"); 2287b0a2fdeeSScott Long return (ENOMEM); 22889b631363SMatt Jacob } 2289b0a2fdeeSScott Long error = bus_dmamem_alloc(mpt->fw_dmat, 2290b0a2fdeeSScott Long (void **)&mpt->fw_image, BUS_DMA_NOWAIT, 2291b0a2fdeeSScott Long &mpt->fw_dmap); 2292b0a2fdeeSScott Long if (error != 0) { 2293b0a2fdeeSScott Long mpt_prt(mpt, "cannot allocate fw mem.\n"); 2294b0a2fdeeSScott Long bus_dma_tag_destroy(mpt->fw_dmat); 2295b0a2fdeeSScott Long return (ENOMEM); 2296b0a2fdeeSScott Long } 2297b0a2fdeeSScott Long mi.mpt = mpt; 2298b0a2fdeeSScott Long mi.error = 0; 2299b0a2fdeeSScott Long bus_dmamap_load(mpt->fw_dmat, mpt->fw_dmap, 2300b0a2fdeeSScott Long mpt->fw_image, mpt->fw_image_size, mpt_map_rquest, 2301b0a2fdeeSScott Long &mi, 0); 2302b0a2fdeeSScott Long mpt->fw_phys = mi.phys; 2303b0a2fdeeSScott Long 2304b0a2fdeeSScott Long error = mpt_upload_fw(mpt); 2305b0a2fdeeSScott Long if (error != 0) { 2306b0a2fdeeSScott Long mpt_prt(mpt, "fw upload failed.\n"); 2307b0a2fdeeSScott Long bus_dmamap_unload(mpt->fw_dmat, mpt->fw_dmap); 2308b0a2fdeeSScott Long bus_dmamem_free(mpt->fw_dmat, mpt->fw_image, 2309b0a2fdeeSScott Long mpt->fw_dmap); 2310b0a2fdeeSScott Long bus_dma_tag_destroy(mpt->fw_dmat); 2311b0a2fdeeSScott Long mpt->fw_image = NULL; 2312b0a2fdeeSScott Long return (EIO); 2313b0a2fdeeSScott Long } 2314b0a2fdeeSScott Long } 23159b631363SMatt Jacob 23167104aeefSMatt Jacob if (mpt_get_portfacts(mpt, &pfp) != MPT_OK) { 2317b0a2fdeeSScott Long mpt_prt(mpt, "mpt_get_portfacts failed\n"); 2318b0a2fdeeSScott Long needreset = 1; 23197104aeefSMatt Jacob continue; 23207104aeefSMatt Jacob } 23217104aeefSMatt Jacob 2322b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 23237dec90bcSMatt Jacob "PORTFACTS: Type %x PFlags %x IID %d MaxDev %d\n", 23247dec90bcSMatt Jacob pfp.PortType, pfp.ProtocolFlags, pfp.PortSCSIID, 23257dec90bcSMatt Jacob pfp.MaxDevices); 23267104aeefSMatt Jacob 2327b0a2fdeeSScott Long mpt->mpt_port_type = pfp.PortType; 2328b0a2fdeeSScott Long mpt->mpt_proto_flags = pfp.ProtocolFlags; 23297104aeefSMatt Jacob if (pfp.PortType != MPI_PORTFACTS_PORTTYPE_SCSI && 2330444dd2b6SMatt Jacob pfp.PortType != MPI_PORTFACTS_PORTTYPE_SAS && 23317104aeefSMatt Jacob pfp.PortType != MPI_PORTFACTS_PORTTYPE_FC) { 2332b0a2fdeeSScott Long mpt_prt(mpt, "Unsupported Port Type (%x)\n", 23337104aeefSMatt Jacob pfp.PortType); 23347104aeefSMatt Jacob return (ENXIO); 23357104aeefSMatt Jacob } 23367104aeefSMatt Jacob if (!(pfp.ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR)) { 2337b0a2fdeeSScott Long mpt_prt(mpt, "initiator role unsupported\n"); 23387104aeefSMatt Jacob return (ENXIO); 23397104aeefSMatt Jacob } 23407104aeefSMatt Jacob if (pfp.PortType == MPI_PORTFACTS_PORTTYPE_FC) { 23417104aeefSMatt Jacob mpt->is_fc = 1; 2342444dd2b6SMatt Jacob mpt->is_sas = 0; 2343444dd2b6SMatt Jacob } else if (pfp.PortType == MPI_PORTFACTS_PORTTYPE_SAS) { 2344444dd2b6SMatt Jacob mpt->is_fc = 0; 2345444dd2b6SMatt Jacob mpt->is_sas = 1; 23467104aeefSMatt Jacob } else { 23477104aeefSMatt Jacob mpt->is_fc = 0; 2348444dd2b6SMatt Jacob mpt->is_sas = 0; 23497104aeefSMatt Jacob } 23507104aeefSMatt Jacob mpt->mpt_ini_id = pfp.PortSCSIID; 2351444dd2b6SMatt Jacob mpt->mpt_max_devices = pfp.MaxDevices; 23527104aeefSMatt Jacob 2353b0a2fdeeSScott Long if (mpt_enable_ioc(mpt) != 0) { 2354b0a2fdeeSScott Long mpt_prt(mpt, "Unable to initialize IOC\n"); 2355b0a2fdeeSScott Long return (ENXIO); 23567104aeefSMatt Jacob } 23577104aeefSMatt Jacob 2358b0a2fdeeSScott Long /* 2359b0a2fdeeSScott Long * Read and set up initial configuration information 2360b0a2fdeeSScott Long * (IOC and SPI only for now) 2361b0a2fdeeSScott Long * 2362b0a2fdeeSScott Long * XXX Should figure out what "personalities" are 2363b0a2fdeeSScott Long * available and defer all initialization junk to 2364b0a2fdeeSScott Long * them. 2365b0a2fdeeSScott Long */ 2366b0a2fdeeSScott Long mpt_read_config_info_ioc(mpt); 2367b0a2fdeeSScott Long 2368444dd2b6SMatt Jacob if (mpt->is_fc == 0 && mpt->is_sas == 0) { 2369b0a2fdeeSScott Long if (mpt_read_config_info_spi(mpt)) { 2370b0a2fdeeSScott Long return (EIO); 23719b631363SMatt Jacob } 2372b0a2fdeeSScott Long if (mpt_set_initial_config_spi(mpt)) { 2373b0a2fdeeSScott Long return (EIO); 2374b0a2fdeeSScott Long } 2375b0a2fdeeSScott Long } 2376b0a2fdeeSScott Long 2377b0a2fdeeSScott Long /* Everything worked */ 2378b0a2fdeeSScott Long break; 2379b0a2fdeeSScott Long } 2380b0a2fdeeSScott Long 2381b0a2fdeeSScott Long if (try >= MPT_MAX_TRYS) { 2382b0a2fdeeSScott Long mpt_prt(mpt, "failed to initialize IOC"); 2383b0a2fdeeSScott Long return (EIO); 2384b0a2fdeeSScott Long } 2385b0a2fdeeSScott Long 2386b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "enabling interrupts\n"); 2387b0a2fdeeSScott Long 2388b0a2fdeeSScott Long mpt_enable_ints(mpt); 2389b0a2fdeeSScott Long return (0); 2390b0a2fdeeSScott Long } 2391b0a2fdeeSScott Long 2392b0a2fdeeSScott Long static int 2393b0a2fdeeSScott Long mpt_enable_ioc(struct mpt_softc *mpt) 2394b0a2fdeeSScott Long { 2395b0a2fdeeSScott Long uint32_t pptr; 2396b0a2fdeeSScott Long int val; 2397b0a2fdeeSScott Long 2398444dd2b6SMatt Jacob if (mpt_send_ioc_init(mpt, MPI_WHOINIT_HOST_DRIVER) != MPT_OK) { 2399b0a2fdeeSScott Long mpt_prt(mpt, "mpt_send_ioc_init failed\n"); 2400b0a2fdeeSScott Long return (EIO); 2401b0a2fdeeSScott Long } 2402b0a2fdeeSScott Long 2403b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_send_ioc_init ok\n"); 24049b631363SMatt Jacob 24059b631363SMatt Jacob if (mpt_wait_state(mpt, MPT_DB_STATE_RUNNING) != MPT_OK) { 2406b0a2fdeeSScott Long mpt_prt(mpt, "IOC failed to go to run state\n"); 2407b0a2fdeeSScott Long return (ENXIO); 24087104aeefSMatt Jacob } 2409444dd2b6SMatt Jacob mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC now at RUNSTATE\n"); 24109b631363SMatt Jacob 24119b631363SMatt Jacob /* 24129b631363SMatt Jacob * Give it reply buffers 24139b631363SMatt Jacob * 2414b0a2fdeeSScott Long * Do *not* exceed global credits. 24159b631363SMatt Jacob */ 24169b631363SMatt Jacob for (val = 0, pptr = mpt->reply_phys; 24179b631363SMatt Jacob (pptr + MPT_REPLY_SIZE) < (mpt->reply_phys + PAGE_SIZE); 24189b631363SMatt Jacob pptr += MPT_REPLY_SIZE) { 24199b631363SMatt Jacob mpt_free_reply(mpt, pptr); 24209b631363SMatt Jacob if (++val == mpt->mpt_global_credits - 1) 24219b631363SMatt Jacob break; 24229b631363SMatt Jacob } 24239b631363SMatt Jacob 24247104aeefSMatt Jacob /* 24257104aeefSMatt Jacob * Enable asynchronous event reporting 24267104aeefSMatt Jacob */ 24279b631363SMatt Jacob mpt_send_event_request(mpt, 1); 24289b631363SMatt Jacob 24297104aeefSMatt Jacob /* 2430444dd2b6SMatt Jacob * Enable the port 24317104aeefSMatt Jacob */ 24329b631363SMatt Jacob if (mpt_send_port_enable(mpt, 0) != MPT_OK) { 2433b0a2fdeeSScott Long mpt_prt(mpt, "failed to enable port 0\n"); 2434b0a2fdeeSScott Long return (ENXIO); 24357104aeefSMatt Jacob } 2436b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "enabled port 0\n"); 24379b631363SMatt Jacob 2438444dd2b6SMatt Jacob 24399b631363SMatt Jacob return (0); 24409b631363SMatt Jacob } 2441