1098ca2bdSWarner Losh /*- 20b80d21bSMatt Jacob * Generic routines for LSI Fusion adapters. 39b631363SMatt Jacob * FreeBSD Version. 49b631363SMatt Jacob * 59b631363SMatt Jacob * Copyright (c) 2000, 2001 by Greg Ansley 69b631363SMatt Jacob * 79b631363SMatt Jacob * Redistribution and use in source and binary forms, with or without 89b631363SMatt Jacob * modification, are permitted provided that the following conditions 99b631363SMatt Jacob * are met: 109b631363SMatt Jacob * 1. Redistributions of source code must retain the above copyright 119b631363SMatt Jacob * notice immediately at the beginning of the file, without modification, 129b631363SMatt Jacob * this list of conditions, and the following disclaimer. 139b631363SMatt Jacob * 2. The name of the author may not be used to endorse or promote products 149b631363SMatt Jacob * derived from this software without specific prior written permission. 159b631363SMatt Jacob * 169b631363SMatt Jacob * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 179b631363SMatt Jacob * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 189b631363SMatt Jacob * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 199b631363SMatt Jacob * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 209b631363SMatt Jacob * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 219b631363SMatt Jacob * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 229b631363SMatt Jacob * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 239b631363SMatt Jacob * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 249b631363SMatt Jacob * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 259b631363SMatt Jacob * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 269b631363SMatt Jacob * SUCH DAMAGE. 279b631363SMatt Jacob */ 280b80d21bSMatt Jacob /*- 290b80d21bSMatt Jacob * Copyright (c) 2002, 2006 by Matthew Jacob 300b80d21bSMatt Jacob * All rights reserved. 310b80d21bSMatt Jacob * 320b80d21bSMatt Jacob * Redistribution and use in source and binary forms, with or without 330b80d21bSMatt Jacob * modification, are permitted provided that the following conditions are 340b80d21bSMatt Jacob * met: 350b80d21bSMatt Jacob * 1. Redistributions of source code must retain the above copyright 360b80d21bSMatt Jacob * notice, this list of conditions and the following disclaimer. 370b80d21bSMatt Jacob * 2. Redistributions in binary form must reproduce at minimum a disclaimer 380b80d21bSMatt Jacob * substantially similar to the "NO WARRANTY" disclaimer below 390b80d21bSMatt Jacob * ("Disclaimer") and any redistribution must be conditioned upon including 400b80d21bSMatt Jacob * a substantially similar Disclaimer requirement for further binary 410b80d21bSMatt Jacob * redistribution. 420b80d21bSMatt Jacob * 3. Neither the names of the above listed copyright holders nor the names 430b80d21bSMatt Jacob * of any contributors may be used to endorse or promote products derived 440b80d21bSMatt Jacob * from this software without specific prior written permission. 450b80d21bSMatt Jacob * 460b80d21bSMatt Jacob * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 470b80d21bSMatt Jacob * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 480b80d21bSMatt Jacob * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 490b80d21bSMatt Jacob * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 500b80d21bSMatt Jacob * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 510b80d21bSMatt Jacob * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 520b80d21bSMatt Jacob * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 530b80d21bSMatt Jacob * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 540b80d21bSMatt Jacob * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 550b80d21bSMatt Jacob * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 560b80d21bSMatt Jacob * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 570b80d21bSMatt Jacob * 580b80d21bSMatt Jacob * Support from Chris Ellsworth in order to make SAS adapters work 590b80d21bSMatt Jacob * is gratefully acknowledged. 600b80d21bSMatt Jacob */ 610b80d21bSMatt Jacob /*- 62b0a2fdeeSScott Long * Copyright (c) 2004, Avid Technology, Inc. and its contributors. 63b0a2fdeeSScott Long * Copyright (c) 2005, WHEEL Sp. z o.o. 64b0a2fdeeSScott Long * Copyright (c) 2004, 2005 Justin T. Gibbs 65b0a2fdeeSScott Long * All rights reserved. 66b0a2fdeeSScott Long * 67b0a2fdeeSScott Long * Redistribution and use in source and binary forms, with or without 68b0a2fdeeSScott Long * modification, are permitted provided that the following conditions are 69b0a2fdeeSScott Long * met: 70b0a2fdeeSScott Long * 1. Redistributions of source code must retain the above copyright 71b0a2fdeeSScott Long * notice, this list of conditions and the following disclaimer. 72b0a2fdeeSScott Long * 2. Redistributions in binary form must reproduce at minimum a disclaimer 73b0a2fdeeSScott Long * substantially similar to the "NO WARRANTY" disclaimer below 74b0a2fdeeSScott Long * ("Disclaimer") and any redistribution must be conditioned upon including 75b0a2fdeeSScott Long * a substantially similar Disclaimer requirement for further binary 76b0a2fdeeSScott Long * redistribution. 77286e947fSJustin T. Gibbs * 3. Neither the names of the above listed copyright holders nor the names 78286e947fSJustin T. Gibbs * of any contributors may be used to endorse or promote products derived 79286e947fSJustin T. Gibbs * from this software without specific prior written permission. 80b0a2fdeeSScott Long * 81b0a2fdeeSScott Long * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 82b0a2fdeeSScott Long * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 83b0a2fdeeSScott Long * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 84b0a2fdeeSScott Long * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 85b0a2fdeeSScott Long * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 86b0a2fdeeSScott Long * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 87b0a2fdeeSScott Long * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 88b0a2fdeeSScott Long * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 89b0a2fdeeSScott Long * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 90b0a2fdeeSScott Long * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 91b0a2fdeeSScott Long * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 929b631363SMatt Jacob */ 939b631363SMatt Jacob 949295c6c5SDavid E. O'Brien #include <sys/cdefs.h> 959295c6c5SDavid E. O'Brien __FBSDID("$FreeBSD$"); 969295c6c5SDavid E. O'Brien 97b0a2fdeeSScott Long #include <dev/mpt/mpt.h> 98b0a2fdeeSScott Long #include <dev/mpt/mpt_cam.h> /* XXX For static handler registration */ 99b0a2fdeeSScott Long #include <dev/mpt/mpt_raid.h> /* XXX For static handler registration */ 100b0a2fdeeSScott Long 101b0a2fdeeSScott Long #include <dev/mpt/mpilib/mpi.h> 102b0a2fdeeSScott Long #include <dev/mpt/mpilib/mpi_ioc.h> 103b0a2fdeeSScott Long 104b0a2fdeeSScott Long #include <sys/sysctl.h> 1057104aeefSMatt Jacob 1069b631363SMatt Jacob #define MPT_MAX_TRYS 3 1079b631363SMatt Jacob #define MPT_MAX_WAIT 300000 1089b631363SMatt Jacob 1099b631363SMatt Jacob static int maxwait_ack = 0; 1109b631363SMatt Jacob static int maxwait_int = 0; 1119b631363SMatt Jacob static int maxwait_state = 0; 1129b631363SMatt Jacob 113b0a2fdeeSScott Long TAILQ_HEAD(, mpt_softc) mpt_tailq = TAILQ_HEAD_INITIALIZER(mpt_tailq); 114b0a2fdeeSScott Long mpt_reply_handler_t *mpt_reply_handlers[MPT_NUM_REPLY_HANDLERS]; 1159b631363SMatt Jacob 116b0a2fdeeSScott Long static mpt_reply_handler_t mpt_default_reply_handler; 117b0a2fdeeSScott Long static mpt_reply_handler_t mpt_config_reply_handler; 118b0a2fdeeSScott Long static mpt_reply_handler_t mpt_handshake_reply_handler; 119b0a2fdeeSScott Long static mpt_reply_handler_t mpt_event_reply_handler; 120b0a2fdeeSScott Long static void mpt_send_event_ack(struct mpt_softc *mpt, request_t *ack_req, 121b0a2fdeeSScott Long MSG_EVENT_NOTIFY_REPLY *msg, uint32_t context); 122444dd2b6SMatt Jacob static int mpt_send_event_request(struct mpt_softc *mpt, int onoff); 123b0a2fdeeSScott Long static int mpt_soft_reset(struct mpt_softc *mpt); 124b0a2fdeeSScott Long static void mpt_hard_reset(struct mpt_softc *mpt); 125b0a2fdeeSScott Long static int mpt_configure_ioc(struct mpt_softc *mpt); 126b0a2fdeeSScott Long static int mpt_enable_ioc(struct mpt_softc *mpt); 127b0a2fdeeSScott Long 128b0a2fdeeSScott Long /************************* Personality Module Support *************************/ 129b0a2fdeeSScott Long /* 130b0a2fdeeSScott Long * We include one extra entry that is guaranteed to be NULL 131b0a2fdeeSScott Long * to simplify our itterator. 132b0a2fdeeSScott Long */ 133b0a2fdeeSScott Long static struct mpt_personality *mpt_personalities[MPT_MAX_PERSONALITIES + 1]; 134b0a2fdeeSScott Long static __inline struct mpt_personality* 135b0a2fdeeSScott Long mpt_pers_find(struct mpt_softc *, u_int); 136b0a2fdeeSScott Long static __inline struct mpt_personality* 137b0a2fdeeSScott Long mpt_pers_find_reverse(struct mpt_softc *, u_int); 138b0a2fdeeSScott Long 139b0a2fdeeSScott Long static __inline struct mpt_personality * 140b0a2fdeeSScott Long mpt_pers_find(struct mpt_softc *mpt, u_int start_at) 141b0a2fdeeSScott Long { 142b0a2fdeeSScott Long KASSERT(start_at <= MPT_MAX_PERSONALITIES, 143b0a2fdeeSScott Long ("mpt_pers_find: starting position out of range\n")); 144b0a2fdeeSScott Long 145b0a2fdeeSScott Long while (start_at < MPT_MAX_PERSONALITIES 146b0a2fdeeSScott Long && (mpt->mpt_pers_mask & (0x1 << start_at)) == 0) { 147b0a2fdeeSScott Long start_at++; 148b0a2fdeeSScott Long } 149b0a2fdeeSScott Long return (mpt_personalities[start_at]); 150b0a2fdeeSScott Long } 151b0a2fdeeSScott Long 152b0a2fdeeSScott Long /* 153b0a2fdeeSScott Long * Used infrequenstly, so no need to optimize like a forward 154b0a2fdeeSScott Long * traversal where we use the MAX+1 is guaranteed to be NULL 155b0a2fdeeSScott Long * trick. 156b0a2fdeeSScott Long */ 157b0a2fdeeSScott Long static __inline struct mpt_personality * 158b0a2fdeeSScott Long mpt_pers_find_reverse(struct mpt_softc *mpt, u_int start_at) 159b0a2fdeeSScott Long { 160b0a2fdeeSScott Long while (start_at < MPT_MAX_PERSONALITIES 161b0a2fdeeSScott Long && (mpt->mpt_pers_mask & (0x1 << start_at)) == 0) { 162b0a2fdeeSScott Long start_at--; 163b0a2fdeeSScott Long } 164b0a2fdeeSScott Long if (start_at < MPT_MAX_PERSONALITIES) 165b0a2fdeeSScott Long return (mpt_personalities[start_at]); 166b0a2fdeeSScott Long return (NULL); 167b0a2fdeeSScott Long } 168b0a2fdeeSScott Long 169b0a2fdeeSScott Long #define MPT_PERS_FOREACH(mpt, pers) \ 170b0a2fdeeSScott Long for (pers = mpt_pers_find(mpt, /*start_at*/0); \ 171b0a2fdeeSScott Long pers != NULL; \ 172b0a2fdeeSScott Long pers = mpt_pers_find(mpt, /*start_at*/pers->id+1)) 173b0a2fdeeSScott Long 174b0a2fdeeSScott Long #define MPT_PERS_FOREACH_REVERSE(mpt, pers) \ 175b0a2fdeeSScott Long for (pers = mpt_pers_find_reverse(mpt, MPT_MAX_PERSONALITIES-1);\ 176b0a2fdeeSScott Long pers != NULL; \ 177b0a2fdeeSScott Long pers = mpt_pers_find_reverse(mpt, /*start_at*/pers->id-1)) 178b0a2fdeeSScott Long 179b0a2fdeeSScott Long static mpt_load_handler_t mpt_stdload; 180b0a2fdeeSScott Long static mpt_probe_handler_t mpt_stdprobe; 181b0a2fdeeSScott Long static mpt_attach_handler_t mpt_stdattach; 182b0a2fdeeSScott Long static mpt_event_handler_t mpt_stdevent; 183b0a2fdeeSScott Long static mpt_reset_handler_t mpt_stdreset; 184b0a2fdeeSScott Long static mpt_shutdown_handler_t mpt_stdshutdown; 185b0a2fdeeSScott Long static mpt_detach_handler_t mpt_stddetach; 186b0a2fdeeSScott Long static mpt_unload_handler_t mpt_stdunload; 187b0a2fdeeSScott Long static struct mpt_personality mpt_default_personality = 188b0a2fdeeSScott Long { 189b0a2fdeeSScott Long .load = mpt_stdload, 190b0a2fdeeSScott Long .probe = mpt_stdprobe, 191b0a2fdeeSScott Long .attach = mpt_stdattach, 192b0a2fdeeSScott Long .event = mpt_stdevent, 193b0a2fdeeSScott Long .reset = mpt_stdreset, 194b0a2fdeeSScott Long .shutdown = mpt_stdshutdown, 195b0a2fdeeSScott Long .detach = mpt_stddetach, 196b0a2fdeeSScott Long .unload = mpt_stdunload 197b0a2fdeeSScott Long }; 198b0a2fdeeSScott Long 199b0a2fdeeSScott Long static mpt_load_handler_t mpt_core_load; 200b0a2fdeeSScott Long static mpt_attach_handler_t mpt_core_attach; 201b0a2fdeeSScott Long static mpt_reset_handler_t mpt_core_ioc_reset; 202b0a2fdeeSScott Long static mpt_event_handler_t mpt_core_event; 203b0a2fdeeSScott Long static mpt_shutdown_handler_t mpt_core_shutdown; 204b0a2fdeeSScott Long static mpt_shutdown_handler_t mpt_core_detach; 205b0a2fdeeSScott Long static mpt_unload_handler_t mpt_core_unload; 206b0a2fdeeSScott Long static struct mpt_personality mpt_core_personality = 207b0a2fdeeSScott Long { 208b0a2fdeeSScott Long .name = "mpt_core", 209b0a2fdeeSScott Long .load = mpt_core_load, 210b0a2fdeeSScott Long .attach = mpt_core_attach, 211b0a2fdeeSScott Long .event = mpt_core_event, 212b0a2fdeeSScott Long .reset = mpt_core_ioc_reset, 213b0a2fdeeSScott Long .shutdown = mpt_core_shutdown, 214b0a2fdeeSScott Long .detach = mpt_core_detach, 215b0a2fdeeSScott Long .unload = mpt_core_unload, 216b0a2fdeeSScott Long }; 217b0a2fdeeSScott Long 218b0a2fdeeSScott Long /* 219b0a2fdeeSScott Long * Manual declaration so that DECLARE_MPT_PERSONALITY doesn't need 220b0a2fdeeSScott Long * ordering information. We want the core to always register FIRST. 221b0a2fdeeSScott Long * other modules are set to SI_ORDER_SECOND. 222b0a2fdeeSScott Long */ 223b0a2fdeeSScott Long static moduledata_t mpt_core_mod = { 224b0a2fdeeSScott Long "mpt_core", mpt_modevent, &mpt_core_personality 225b0a2fdeeSScott Long }; 226b0a2fdeeSScott Long DECLARE_MODULE(mpt_core, mpt_core_mod, SI_SUB_DRIVERS, SI_ORDER_FIRST); 227b0a2fdeeSScott Long MODULE_VERSION(mpt_core, 1); 228b0a2fdeeSScott Long 229b0a2fdeeSScott Long #define MPT_PERS_ATACHED(pers, mpt) \ 230b0a2fdeeSScott Long ((mpt)->pers_mask & (0x1 << pers->id)) 231b0a2fdeeSScott Long 232b0a2fdeeSScott Long 233b0a2fdeeSScott Long int 234b0a2fdeeSScott Long mpt_modevent(module_t mod, int type, void *data) 235b0a2fdeeSScott Long { 236b0a2fdeeSScott Long struct mpt_personality *pers; 237b0a2fdeeSScott Long int error; 238b0a2fdeeSScott Long 239b0a2fdeeSScott Long pers = (struct mpt_personality *)data; 240b0a2fdeeSScott Long 241b0a2fdeeSScott Long error = 0; 242b0a2fdeeSScott Long switch (type) { 243b0a2fdeeSScott Long case MOD_LOAD: 244b0a2fdeeSScott Long { 245b0a2fdeeSScott Long mpt_load_handler_t **def_handler; 246b0a2fdeeSScott Long mpt_load_handler_t **pers_handler; 247b0a2fdeeSScott Long int i; 248b0a2fdeeSScott Long 249b0a2fdeeSScott Long for (i = 0; i < MPT_MAX_PERSONALITIES; i++) { 250b0a2fdeeSScott Long if (mpt_personalities[i] == NULL) 251b0a2fdeeSScott Long break; 252b0a2fdeeSScott Long } 253b0a2fdeeSScott Long if (i >= MPT_MAX_PERSONALITIES) { 254b0a2fdeeSScott Long error = ENOMEM; 255b0a2fdeeSScott Long break; 256b0a2fdeeSScott Long } 257b0a2fdeeSScott Long pers->id = i; 258b0a2fdeeSScott Long mpt_personalities[i] = pers; 259b0a2fdeeSScott Long 260b0a2fdeeSScott Long /* Install standard/noop handlers for any NULL entries. */ 261b0a2fdeeSScott Long def_handler = MPT_PERS_FIRST_HANDLER(&mpt_default_personality); 262b0a2fdeeSScott Long pers_handler = MPT_PERS_FIRST_HANDLER(pers); 263b0a2fdeeSScott Long while (pers_handler <= MPT_PERS_LAST_HANDLER(pers)) { 264b0a2fdeeSScott Long if (*pers_handler == NULL) 265b0a2fdeeSScott Long *pers_handler = *def_handler; 266b0a2fdeeSScott Long pers_handler++; 267b0a2fdeeSScott Long def_handler++; 268b0a2fdeeSScott Long } 269b0a2fdeeSScott Long 270b0a2fdeeSScott Long error = (pers->load(pers)); 271b0a2fdeeSScott Long if (error != 0) 272b0a2fdeeSScott Long mpt_personalities[i] = NULL; 273b0a2fdeeSScott Long break; 274b0a2fdeeSScott Long } 275b0a2fdeeSScott Long case MOD_SHUTDOWN: 276b0a2fdeeSScott Long break; 277b0a2fdeeSScott Long case MOD_QUIESCE: 278b0a2fdeeSScott Long break; 279b0a2fdeeSScott Long case MOD_UNLOAD: 280b0a2fdeeSScott Long error = pers->unload(pers); 281b0a2fdeeSScott Long mpt_personalities[pers->id] = NULL; 282b0a2fdeeSScott Long break; 283b0a2fdeeSScott Long default: 284b0a2fdeeSScott Long error = EINVAL; 285b0a2fdeeSScott Long break; 286b0a2fdeeSScott Long } 287b0a2fdeeSScott Long return (error); 288b0a2fdeeSScott Long } 289b0a2fdeeSScott Long 290b0a2fdeeSScott Long int 291b0a2fdeeSScott Long mpt_stdload(struct mpt_personality *pers) 292b0a2fdeeSScott Long { 293b0a2fdeeSScott Long /* Load is always successfull. */ 294b0a2fdeeSScott Long return (0); 295b0a2fdeeSScott Long } 296b0a2fdeeSScott Long 297b0a2fdeeSScott Long int 298b0a2fdeeSScott Long mpt_stdprobe(struct mpt_softc *mpt) 299b0a2fdeeSScott Long { 300b0a2fdeeSScott Long /* Probe is always successfull. */ 301b0a2fdeeSScott Long return (0); 302b0a2fdeeSScott Long } 303b0a2fdeeSScott Long 304b0a2fdeeSScott Long int 305b0a2fdeeSScott Long mpt_stdattach(struct mpt_softc *mpt) 306b0a2fdeeSScott Long { 307b0a2fdeeSScott Long /* Attach is always successfull. */ 308b0a2fdeeSScott Long return (0); 309b0a2fdeeSScott Long } 310b0a2fdeeSScott Long 311b0a2fdeeSScott Long int 312444dd2b6SMatt Jacob mpt_stdevent(struct mpt_softc *mpt, request_t *req, MSG_EVENT_NOTIFY_REPLY *msg) 313b0a2fdeeSScott Long { 314444dd2b6SMatt Jacob mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_stdevent: 0x%x\n", msg->Event & 0xFF); 315b0a2fdeeSScott Long /* Event was not for us. */ 316b0a2fdeeSScott Long return (0); 317b0a2fdeeSScott Long } 318b0a2fdeeSScott Long 319b0a2fdeeSScott Long void 320b0a2fdeeSScott Long mpt_stdreset(struct mpt_softc *mpt, int type) 321b0a2fdeeSScott Long { 322b0a2fdeeSScott Long } 323b0a2fdeeSScott Long 324b0a2fdeeSScott Long void 325b0a2fdeeSScott Long mpt_stdshutdown(struct mpt_softc *mpt) 326b0a2fdeeSScott Long { 327b0a2fdeeSScott Long } 328b0a2fdeeSScott Long 329b0a2fdeeSScott Long void 330b0a2fdeeSScott Long mpt_stddetach(struct mpt_softc *mpt) 331b0a2fdeeSScott Long { 332b0a2fdeeSScott Long } 333b0a2fdeeSScott Long 334b0a2fdeeSScott Long int 335b0a2fdeeSScott Long mpt_stdunload(struct mpt_personality *pers) 336b0a2fdeeSScott Long { 337b0a2fdeeSScott Long /* Unload is always successfull. */ 338b0a2fdeeSScott Long return (0); 339b0a2fdeeSScott Long } 340b0a2fdeeSScott Long 341b0a2fdeeSScott Long /******************************* Bus DMA Support ******************************/ 342b0a2fdeeSScott Long void 343b0a2fdeeSScott Long mpt_map_rquest(void *arg, bus_dma_segment_t *segs, int nseg, int error) 344b0a2fdeeSScott Long { 345b0a2fdeeSScott Long struct mpt_map_info *map_info; 346b0a2fdeeSScott Long 347b0a2fdeeSScott Long map_info = (struct mpt_map_info *)arg; 348b0a2fdeeSScott Long map_info->error = error; 349b0a2fdeeSScott Long map_info->phys = segs->ds_addr; 350b0a2fdeeSScott Long } 351b0a2fdeeSScott Long 352b0a2fdeeSScott Long /**************************** Reply/Event Handling ****************************/ 353b0a2fdeeSScott Long int 354b0a2fdeeSScott Long mpt_register_handler(struct mpt_softc *mpt, mpt_handler_type type, 355b0a2fdeeSScott Long mpt_handler_t handler, uint32_t *phandler_id) 356b0a2fdeeSScott Long { 357b0a2fdeeSScott Long 358b0a2fdeeSScott Long switch (type) { 359b0a2fdeeSScott Long case MPT_HANDLER_REPLY: 360b0a2fdeeSScott Long { 361b0a2fdeeSScott Long u_int cbi; 362b0a2fdeeSScott Long u_int free_cbi; 363b0a2fdeeSScott Long 364b0a2fdeeSScott Long if (phandler_id == NULL) 365b0a2fdeeSScott Long return (EINVAL); 366b0a2fdeeSScott Long 367b0a2fdeeSScott Long free_cbi = MPT_HANDLER_ID_NONE; 368b0a2fdeeSScott Long for (cbi = 0; cbi < MPT_NUM_REPLY_HANDLERS; cbi++) { 369b0a2fdeeSScott Long /* 370b0a2fdeeSScott Long * If the same handler is registered multiple 371b0a2fdeeSScott Long * times, don't error out. Just return the 372b0a2fdeeSScott Long * index of the original registration. 373b0a2fdeeSScott Long */ 374b0a2fdeeSScott Long if (mpt_reply_handlers[cbi] == handler.reply_handler) { 375b0a2fdeeSScott Long *phandler_id = MPT_CBI_TO_HID(cbi); 376b0a2fdeeSScott Long return (0); 377b0a2fdeeSScott Long } 378b0a2fdeeSScott Long 379b0a2fdeeSScott Long /* 380b0a2fdeeSScott Long * Fill from the front in the hope that 381b0a2fdeeSScott Long * all registered handlers consume only a 382b0a2fdeeSScott Long * single cache line. 383b0a2fdeeSScott Long * 384b0a2fdeeSScott Long * We don't break on the first empty slot so 385b0a2fdeeSScott Long * that the full table is checked to see if 386b0a2fdeeSScott Long * this handler was previously registered. 387b0a2fdeeSScott Long */ 388b0a2fdeeSScott Long if (free_cbi == MPT_HANDLER_ID_NONE 389b0a2fdeeSScott Long && (mpt_reply_handlers[cbi] 390b0a2fdeeSScott Long == mpt_default_reply_handler)) 391b0a2fdeeSScott Long free_cbi = cbi; 392b0a2fdeeSScott Long } 393b0a2fdeeSScott Long if (free_cbi == MPT_HANDLER_ID_NONE) 394b0a2fdeeSScott Long return (ENOMEM); 395b0a2fdeeSScott Long mpt_reply_handlers[free_cbi] = handler.reply_handler; 396b0a2fdeeSScott Long *phandler_id = MPT_CBI_TO_HID(free_cbi); 397b0a2fdeeSScott Long break; 398b0a2fdeeSScott Long } 399b0a2fdeeSScott Long default: 400b0a2fdeeSScott Long mpt_prt(mpt, "mpt_register_handler unknown type %d\n", type); 401b0a2fdeeSScott Long return (EINVAL); 402b0a2fdeeSScott Long } 403b0a2fdeeSScott Long return (0); 404b0a2fdeeSScott Long } 405b0a2fdeeSScott Long 406b0a2fdeeSScott Long int 407b0a2fdeeSScott Long mpt_deregister_handler(struct mpt_softc *mpt, mpt_handler_type type, 408b0a2fdeeSScott Long mpt_handler_t handler, uint32_t handler_id) 409b0a2fdeeSScott Long { 410b0a2fdeeSScott Long 411b0a2fdeeSScott Long switch (type) { 412b0a2fdeeSScott Long case MPT_HANDLER_REPLY: 413b0a2fdeeSScott Long { 414b0a2fdeeSScott Long u_int cbi; 415b0a2fdeeSScott Long 416b0a2fdeeSScott Long cbi = MPT_CBI(handler_id); 417b0a2fdeeSScott Long if (cbi >= MPT_NUM_REPLY_HANDLERS 418b0a2fdeeSScott Long || mpt_reply_handlers[cbi] != handler.reply_handler) 419b0a2fdeeSScott Long return (ENOENT); 420b0a2fdeeSScott Long mpt_reply_handlers[cbi] = mpt_default_reply_handler; 421b0a2fdeeSScott Long break; 422b0a2fdeeSScott Long } 423b0a2fdeeSScott Long default: 424b0a2fdeeSScott Long mpt_prt(mpt, "mpt_deregister_handler unknown type %d\n", type); 425b0a2fdeeSScott Long return (EINVAL); 426b0a2fdeeSScott Long } 427b0a2fdeeSScott Long return (0); 428b0a2fdeeSScott Long } 429b0a2fdeeSScott Long 430b0a2fdeeSScott Long static int 431b0a2fdeeSScott Long mpt_default_reply_handler(struct mpt_softc *mpt, request_t *req, 432b0a2fdeeSScott Long MSG_DEFAULT_REPLY *reply_frame) 433b0a2fdeeSScott Long { 434b0a2fdeeSScott Long mpt_prt(mpt, "XXXX Default Handler Called. Req %p, Frame %p\n", 435b0a2fdeeSScott Long req, reply_frame); 436b0a2fdeeSScott Long 437b0a2fdeeSScott Long if (reply_frame != NULL) 438b0a2fdeeSScott Long mpt_dump_reply_frame(mpt, reply_frame); 439b0a2fdeeSScott Long 440b0a2fdeeSScott Long mpt_prt(mpt, "XXXX Reply Frame Ignored\n"); 441b0a2fdeeSScott Long 442b0a2fdeeSScott Long return (/*free_reply*/TRUE); 443b0a2fdeeSScott Long } 444b0a2fdeeSScott Long 445b0a2fdeeSScott Long static int 446b0a2fdeeSScott Long mpt_config_reply_handler(struct mpt_softc *mpt, request_t *req, 447b0a2fdeeSScott Long MSG_DEFAULT_REPLY *reply_frame) 448b0a2fdeeSScott Long { 449b0a2fdeeSScott Long if (req != NULL) { 450b0a2fdeeSScott Long 451b0a2fdeeSScott Long if (reply_frame != NULL) { 452b0a2fdeeSScott Long MSG_CONFIG *cfgp; 453b0a2fdeeSScott Long MSG_CONFIG_REPLY *reply; 454b0a2fdeeSScott Long 455b0a2fdeeSScott Long cfgp = (MSG_CONFIG *)req->req_vbuf; 456b0a2fdeeSScott Long reply = (MSG_CONFIG_REPLY *)reply_frame; 457b0a2fdeeSScott Long req->IOCStatus = le16toh(reply_frame->IOCStatus); 458b0a2fdeeSScott Long bcopy(&reply->Header, &cfgp->Header, 459b0a2fdeeSScott Long sizeof(cfgp->Header)); 460b0a2fdeeSScott Long } 461b0a2fdeeSScott Long req->state &= ~REQ_STATE_QUEUED; 462b0a2fdeeSScott Long req->state |= REQ_STATE_DONE; 463b0a2fdeeSScott Long TAILQ_REMOVE(&mpt->request_pending_list, req, links); 464b0a2fdeeSScott Long 465b0a2fdeeSScott Long if ((req->state & REQ_STATE_NEED_WAKEUP) != 0) 466b0a2fdeeSScott Long wakeup(req); 467b0a2fdeeSScott Long } 468b0a2fdeeSScott Long 469b0a2fdeeSScott Long return (/*free_reply*/TRUE); 470b0a2fdeeSScott Long } 471b0a2fdeeSScott Long 472b0a2fdeeSScott Long static int 473b0a2fdeeSScott Long mpt_handshake_reply_handler(struct mpt_softc *mpt, request_t *req, 474b0a2fdeeSScott Long MSG_DEFAULT_REPLY *reply_frame) 475b0a2fdeeSScott Long { 476b0a2fdeeSScott Long /* Nothing to be done. */ 477b0a2fdeeSScott Long return (/*free_reply*/TRUE); 478b0a2fdeeSScott Long } 479b0a2fdeeSScott Long 480b0a2fdeeSScott Long static int 481b0a2fdeeSScott Long mpt_event_reply_handler(struct mpt_softc *mpt, request_t *req, 482b0a2fdeeSScott Long MSG_DEFAULT_REPLY *reply_frame) 483b0a2fdeeSScott Long { 484b0a2fdeeSScott Long int free_reply; 485b0a2fdeeSScott Long 486b0a2fdeeSScott Long if (reply_frame == NULL) { 487b0a2fdeeSScott Long mpt_prt(mpt, "Event Handler: req %p - Unexpected NULL reply\n"); 488b0a2fdeeSScott Long return (/*free_reply*/TRUE); 489b0a2fdeeSScott Long } 490b0a2fdeeSScott Long 491b0a2fdeeSScott Long free_reply = TRUE; 492b0a2fdeeSScott Long switch (reply_frame->Function) { 493b0a2fdeeSScott Long case MPI_FUNCTION_EVENT_NOTIFICATION: 494b0a2fdeeSScott Long { 495b0a2fdeeSScott Long MSG_EVENT_NOTIFY_REPLY *msg; 496b0a2fdeeSScott Long struct mpt_personality *pers; 497b0a2fdeeSScott Long u_int handled; 498b0a2fdeeSScott Long 499b0a2fdeeSScott Long handled = 0; 500b0a2fdeeSScott Long msg = (MSG_EVENT_NOTIFY_REPLY *)reply_frame; 501b0a2fdeeSScott Long MPT_PERS_FOREACH(mpt, pers) 502b0a2fdeeSScott Long handled += pers->event(mpt, req, msg); 503b0a2fdeeSScott Long 504444dd2b6SMatt Jacob if (handled == 0 && mpt->mpt_pers_mask == 0) { 5051977cbd6SMatt Jacob mpt_lprt(mpt, MPT_PRT_INFO, 506444dd2b6SMatt Jacob "No Handlers For Any Event Notify Frames. " 507444dd2b6SMatt Jacob "Event %#x (ACK %sequired).\n", 508444dd2b6SMatt Jacob msg->Event, msg->AckRequired? "r" : "not r"); 509444dd2b6SMatt Jacob } else if (handled == 0) { 5101977cbd6SMatt Jacob mpt_lprt(mpt, MPT_PRT_WARN, 511444dd2b6SMatt Jacob "Unhandled Event Notify Frame. Event %#x " 512444dd2b6SMatt Jacob "(ACK %sequired).\n", 513444dd2b6SMatt Jacob msg->Event, msg->AckRequired? "r" : "not r"); 514444dd2b6SMatt Jacob } 515b0a2fdeeSScott Long 516b0a2fdeeSScott Long if (msg->AckRequired) { 517b0a2fdeeSScott Long request_t *ack_req; 518b0a2fdeeSScott Long uint32_t context; 519b0a2fdeeSScott Long 520b0a2fdeeSScott Long context = htole32(req->index|MPT_REPLY_HANDLER_EVENTS); 521b0a2fdeeSScott Long ack_req = mpt_get_request(mpt, /*sleep_ok*/FALSE); 522b0a2fdeeSScott Long if (ack_req == NULL) { 523b0a2fdeeSScott Long struct mpt_evtf_record *evtf; 524b0a2fdeeSScott Long 525b0a2fdeeSScott Long evtf = (struct mpt_evtf_record *)reply_frame; 526b0a2fdeeSScott Long evtf->context = context; 527b0a2fdeeSScott Long LIST_INSERT_HEAD(&mpt->ack_frames, evtf, links); 528b0a2fdeeSScott Long free_reply = FALSE; 529b0a2fdeeSScott Long break; 530b0a2fdeeSScott Long } 531b0a2fdeeSScott Long mpt_send_event_ack(mpt, ack_req, msg, context); 532b0a2fdeeSScott Long } 533b0a2fdeeSScott Long break; 534b0a2fdeeSScott Long } 535b0a2fdeeSScott Long case MPI_FUNCTION_PORT_ENABLE: 536b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "enable port reply\n"); 537b0a2fdeeSScott Long break; 538b0a2fdeeSScott Long case MPI_FUNCTION_EVENT_ACK: 539b0a2fdeeSScott Long break; 540b0a2fdeeSScott Long default: 541b0a2fdeeSScott Long mpt_prt(mpt, "Unknown Event Function: %x\n", 542b0a2fdeeSScott Long reply_frame->Function); 543b0a2fdeeSScott Long break; 544b0a2fdeeSScott Long } 545b0a2fdeeSScott Long 546b0a2fdeeSScott Long if (req != NULL 547b0a2fdeeSScott Long && (reply_frame->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY) == 0) { 548b0a2fdeeSScott Long 549b0a2fdeeSScott Long req->state &= ~REQ_STATE_QUEUED; 550b0a2fdeeSScott Long req->state |= REQ_STATE_DONE; 551b0a2fdeeSScott Long TAILQ_REMOVE(&mpt->request_pending_list, req, links); 552b0a2fdeeSScott Long 553b0a2fdeeSScott Long if ((req->state & REQ_STATE_NEED_WAKEUP) != 0) 554b0a2fdeeSScott Long wakeup(req); 555b0a2fdeeSScott Long else 556b0a2fdeeSScott Long mpt_free_request(mpt, req); 557b0a2fdeeSScott Long } 558b0a2fdeeSScott Long return (free_reply); 559b0a2fdeeSScott Long } 560b0a2fdeeSScott Long 561b0a2fdeeSScott Long /* 562b0a2fdeeSScott Long * Process an asynchronous event from the IOC. 563b0a2fdeeSScott Long */ 564b0a2fdeeSScott Long static int 565b0a2fdeeSScott Long mpt_core_event(struct mpt_softc *mpt, request_t *req, 566b0a2fdeeSScott Long MSG_EVENT_NOTIFY_REPLY *msg) 567b0a2fdeeSScott Long { 568444dd2b6SMatt Jacob mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_core_event: 0x%x\n", 569444dd2b6SMatt Jacob msg->Event & 0xFF); 570b0a2fdeeSScott Long switch(msg->Event & 0xFF) { 571b0a2fdeeSScott Long case MPI_EVENT_NONE: 572b0a2fdeeSScott Long break; 573b0a2fdeeSScott Long case MPI_EVENT_LOG_DATA: 574b0a2fdeeSScott Long { 575b0a2fdeeSScott Long int i; 576b0a2fdeeSScott Long 577b0a2fdeeSScott Long /* Some error occured that LSI wants logged */ 578b0a2fdeeSScott Long mpt_prt(mpt, "EvtLogData: IOCLogInfo: 0x%08x\n", 579b0a2fdeeSScott Long msg->IOCLogInfo); 580b0a2fdeeSScott Long mpt_prt(mpt, "\tEvtLogData: Event Data:"); 581b0a2fdeeSScott Long for (i = 0; i < msg->EventDataLength; i++) 582b0a2fdeeSScott Long mpt_prtc(mpt, " %08x", msg->Data[i]); 583b0a2fdeeSScott Long mpt_prtc(mpt, "\n"); 584b0a2fdeeSScott Long break; 585b0a2fdeeSScott Long } 586b0a2fdeeSScott Long case MPI_EVENT_EVENT_CHANGE: 587b0a2fdeeSScott Long /* 588b0a2fdeeSScott Long * This is just an acknowledgement 589b0a2fdeeSScott Long * of our mpt_send_event_request. 590b0a2fdeeSScott Long */ 591b0a2fdeeSScott Long break; 592444dd2b6SMatt Jacob case MPI_EVENT_SAS_DEVICE_STATUS_CHANGE: 593444dd2b6SMatt Jacob break; 594b0a2fdeeSScott Long default: 595b0a2fdeeSScott Long return (/*handled*/0); 596b0a2fdeeSScott Long break; 597b0a2fdeeSScott Long } 598b0a2fdeeSScott Long return (/*handled*/1); 599b0a2fdeeSScott Long } 600b0a2fdeeSScott Long 601b0a2fdeeSScott Long static void 602b0a2fdeeSScott Long mpt_send_event_ack(struct mpt_softc *mpt, request_t *ack_req, 603b0a2fdeeSScott Long MSG_EVENT_NOTIFY_REPLY *msg, uint32_t context) 604b0a2fdeeSScott Long { 605b0a2fdeeSScott Long MSG_EVENT_ACK *ackp; 606b0a2fdeeSScott Long 607b0a2fdeeSScott Long ackp = (MSG_EVENT_ACK *)ack_req->req_vbuf; 608b0a2fdeeSScott Long bzero(ackp, sizeof *ackp); 609b0a2fdeeSScott Long ackp->Function = MPI_FUNCTION_EVENT_ACK; 610b0a2fdeeSScott Long ackp->Event = msg->Event; 611b0a2fdeeSScott Long ackp->EventContext = msg->EventContext; 612b0a2fdeeSScott Long ackp->MsgContext = context; 613b0a2fdeeSScott Long mpt_check_doorbell(mpt); 614b0a2fdeeSScott Long mpt_send_cmd(mpt, ack_req); 615b0a2fdeeSScott Long } 616b0a2fdeeSScott Long 617b0a2fdeeSScott Long /***************************** Interrupt Handling *****************************/ 618b0a2fdeeSScott Long void 619b0a2fdeeSScott Long mpt_intr(void *arg) 620b0a2fdeeSScott Long { 621b0a2fdeeSScott Long struct mpt_softc *mpt; 622b0a2fdeeSScott Long uint32_t reply_desc; 623b0a2fdeeSScott Long 624b0a2fdeeSScott Long mpt = (struct mpt_softc *)arg; 625b0a2fdeeSScott Long while ((reply_desc = mpt_pop_reply_queue(mpt)) != MPT_REPLY_EMPTY) { 626b0a2fdeeSScott Long request_t *req; 627b0a2fdeeSScott Long MSG_DEFAULT_REPLY *reply_frame; 628b0a2fdeeSScott Long uint32_t reply_baddr; 629b0a2fdeeSScott Long u_int cb_index; 630b0a2fdeeSScott Long u_int req_index; 631b0a2fdeeSScott Long int free_rf; 632b0a2fdeeSScott Long 633b0a2fdeeSScott Long req = NULL; 634b0a2fdeeSScott Long reply_frame = NULL; 635b0a2fdeeSScott Long reply_baddr = 0; 636b0a2fdeeSScott Long if ((reply_desc & MPI_ADDRESS_REPLY_A_BIT) != 0) { 637b0a2fdeeSScott Long u_int offset; 638b0a2fdeeSScott Long 639b0a2fdeeSScott Long /* 640b0a2fdeeSScott Long * Insure that the reply frame is coherent. 641b0a2fdeeSScott Long */ 642b0a2fdeeSScott Long reply_baddr = (reply_desc << 1); 643b0a2fdeeSScott Long offset = reply_baddr - (mpt->reply_phys & 0xFFFFFFFF); 644b0a2fdeeSScott Long bus_dmamap_sync_range(mpt->reply_dmat, mpt->reply_dmap, 645b0a2fdeeSScott Long offset, MPT_REPLY_SIZE, 646b0a2fdeeSScott Long BUS_DMASYNC_POSTREAD); 647b0a2fdeeSScott Long reply_frame = MPT_REPLY_OTOV(mpt, offset); 648b0a2fdeeSScott Long reply_desc = le32toh(reply_frame->MsgContext); 649b0a2fdeeSScott Long } 650b0a2fdeeSScott Long cb_index = MPT_CONTEXT_TO_CBI(reply_desc); 651b0a2fdeeSScott Long req_index = MPT_CONTEXT_TO_REQI(reply_desc); 652b0a2fdeeSScott Long if (req_index < MPT_MAX_REQUESTS(mpt)) 653b0a2fdeeSScott Long req = &mpt->request_pool[req_index]; 654b0a2fdeeSScott Long 655b0a2fdeeSScott Long free_rf = mpt_reply_handlers[cb_index](mpt, req, reply_frame); 656b0a2fdeeSScott Long 657b0a2fdeeSScott Long if (reply_frame != NULL && free_rf) 658b0a2fdeeSScott Long mpt_free_reply(mpt, reply_baddr); 659b0a2fdeeSScott Long } 660b0a2fdeeSScott Long } 661b0a2fdeeSScott Long 662b0a2fdeeSScott Long /******************************* Error Recovery *******************************/ 663b0a2fdeeSScott Long void 664b0a2fdeeSScott Long mpt_complete_request_chain(struct mpt_softc *mpt, struct req_queue *chain, 665b0a2fdeeSScott Long u_int iocstatus) 666b0a2fdeeSScott Long { 667b0a2fdeeSScott Long MSG_DEFAULT_REPLY ioc_status_frame; 668b0a2fdeeSScott Long request_t *req; 669b0a2fdeeSScott Long 670b0a2fdeeSScott Long bzero(&ioc_status_frame, sizeof(ioc_status_frame)); 671b0a2fdeeSScott Long ioc_status_frame.MsgLength = roundup2(sizeof(ioc_status_frame), 4); 672b0a2fdeeSScott Long ioc_status_frame.IOCStatus = iocstatus; 673b0a2fdeeSScott Long while((req = TAILQ_FIRST(chain)) != NULL) { 674b0a2fdeeSScott Long MSG_REQUEST_HEADER *msg_hdr; 675b0a2fdeeSScott Long u_int cb_index; 676b0a2fdeeSScott Long 677b0a2fdeeSScott Long msg_hdr = (MSG_REQUEST_HEADER *)req->req_vbuf; 678b0a2fdeeSScott Long ioc_status_frame.Function = msg_hdr->Function; 679b0a2fdeeSScott Long ioc_status_frame.MsgContext = msg_hdr->MsgContext; 680b0a2fdeeSScott Long cb_index = MPT_CONTEXT_TO_CBI(le32toh(msg_hdr->MsgContext)); 681b0a2fdeeSScott Long mpt_reply_handlers[cb_index](mpt, req, &ioc_status_frame); 682b0a2fdeeSScott Long } 683b0a2fdeeSScott Long } 684b0a2fdeeSScott Long 685b0a2fdeeSScott Long /********************************* Diagnostics ********************************/ 686b0a2fdeeSScott Long /* 687b0a2fdeeSScott Long * Perform a diagnostic dump of a reply frame. 688b0a2fdeeSScott Long */ 689b0a2fdeeSScott Long void 690b0a2fdeeSScott Long mpt_dump_reply_frame(struct mpt_softc *mpt, MSG_DEFAULT_REPLY *reply_frame) 691b0a2fdeeSScott Long { 692b0a2fdeeSScott Long 693b0a2fdeeSScott Long mpt_prt(mpt, "Address Reply:\n"); 694b0a2fdeeSScott Long mpt_print_reply(reply_frame); 695b0a2fdeeSScott Long } 696b0a2fdeeSScott Long 697b0a2fdeeSScott Long /******************************* Doorbell Access ******************************/ 698b0a2fdeeSScott Long static __inline uint32_t mpt_rd_db(struct mpt_softc *mpt); 699b0a2fdeeSScott Long static __inline uint32_t mpt_rd_intr(struct mpt_softc *mpt); 700b0a2fdeeSScott Long 701b0a2fdeeSScott Long static __inline uint32_t 702b0a2fdeeSScott Long mpt_rd_db(struct mpt_softc *mpt) 7039b631363SMatt Jacob { 7049b631363SMatt Jacob return mpt_read(mpt, MPT_OFFSET_DOORBELL); 7059b631363SMatt Jacob } 7069b631363SMatt Jacob 707b0a2fdeeSScott Long static __inline uint32_t 708b0a2fdeeSScott Long mpt_rd_intr(struct mpt_softc *mpt) 7099b631363SMatt Jacob { 7109b631363SMatt Jacob return mpt_read(mpt, MPT_OFFSET_INTR_STATUS); 7119b631363SMatt Jacob } 7129b631363SMatt Jacob 7139b631363SMatt Jacob /* Busy wait for a door bell to be read by IOC */ 7149b631363SMatt Jacob static int 715b0a2fdeeSScott Long mpt_wait_db_ack(struct mpt_softc *mpt) 7169b631363SMatt Jacob { 7179b631363SMatt Jacob int i; 7189b631363SMatt Jacob for (i=0; i < MPT_MAX_WAIT; i++) { 7199b631363SMatt Jacob if (!MPT_DB_IS_BUSY(mpt_rd_intr(mpt))) { 7209b631363SMatt Jacob maxwait_ack = i > maxwait_ack ? i : maxwait_ack; 7219b631363SMatt Jacob return MPT_OK; 7229b631363SMatt Jacob } 7239b631363SMatt Jacob 724b0a2fdeeSScott Long DELAY(1000); 7259b631363SMatt Jacob } 7269b631363SMatt Jacob return MPT_FAIL; 7279b631363SMatt Jacob } 7289b631363SMatt Jacob 7299b631363SMatt Jacob /* Busy wait for a door bell interrupt */ 7309b631363SMatt Jacob static int 731b0a2fdeeSScott Long mpt_wait_db_int(struct mpt_softc *mpt) 7329b631363SMatt Jacob { 7339b631363SMatt Jacob int i; 7349b631363SMatt Jacob for (i=0; i < MPT_MAX_WAIT; i++) { 7359b631363SMatt Jacob if (MPT_DB_INTR(mpt_rd_intr(mpt))) { 7369b631363SMatt Jacob maxwait_int = i > maxwait_int ? i : maxwait_int; 7379b631363SMatt Jacob return MPT_OK; 7389b631363SMatt Jacob } 7399b631363SMatt Jacob DELAY(100); 7409b631363SMatt Jacob } 7419b631363SMatt Jacob return MPT_FAIL; 7429b631363SMatt Jacob } 7439b631363SMatt Jacob 7449b631363SMatt Jacob /* Wait for IOC to transition to a give state */ 7459b631363SMatt Jacob void 746b0a2fdeeSScott Long mpt_check_doorbell(struct mpt_softc *mpt) 7479b631363SMatt Jacob { 748b0a2fdeeSScott Long uint32_t db = mpt_rd_db(mpt); 7499b631363SMatt Jacob if (MPT_STATE(db) != MPT_DB_STATE_RUNNING) { 750b0a2fdeeSScott Long mpt_prt(mpt, "Device not running\n"); 7519b631363SMatt Jacob mpt_print_db(db); 7529b631363SMatt Jacob } 7539b631363SMatt Jacob } 7549b631363SMatt Jacob 7559b631363SMatt Jacob /* Wait for IOC to transition to a give state */ 7569b631363SMatt Jacob static int 757b0a2fdeeSScott Long mpt_wait_state(struct mpt_softc *mpt, enum DB_STATE_BITS state) 7589b631363SMatt Jacob { 7599b631363SMatt Jacob int i; 7609b631363SMatt Jacob 7619b631363SMatt Jacob for (i = 0; i < MPT_MAX_WAIT; i++) { 762b0a2fdeeSScott Long uint32_t db = mpt_rd_db(mpt); 7639b631363SMatt Jacob if (MPT_STATE(db) == state) { 7649b631363SMatt Jacob maxwait_state = i > maxwait_state ? i : maxwait_state; 7659b631363SMatt Jacob return (MPT_OK); 7669b631363SMatt Jacob } 7679b631363SMatt Jacob DELAY(100); 7689b631363SMatt Jacob } 7699b631363SMatt Jacob return (MPT_FAIL); 7709b631363SMatt Jacob } 7719b631363SMatt Jacob 7729b631363SMatt Jacob 773b0a2fdeeSScott Long /************************* Intialization/Configuration ************************/ 774b0a2fdeeSScott Long static int mpt_download_fw(struct mpt_softc *mpt); 775b0a2fdeeSScott Long 7769b631363SMatt Jacob /* Issue the reset COMMAND to the IOC */ 777b0a2fdeeSScott Long static int 778b0a2fdeeSScott Long mpt_soft_reset(struct mpt_softc *mpt) 7799b631363SMatt Jacob { 780b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "soft reset\n"); 7819b631363SMatt Jacob 7829b631363SMatt Jacob /* Have to use hard reset if we are not in Running state */ 7839b631363SMatt Jacob if (MPT_STATE(mpt_rd_db(mpt)) != MPT_DB_STATE_RUNNING) { 784b0a2fdeeSScott Long mpt_prt(mpt, "soft reset failed: device not running\n"); 7859b631363SMatt Jacob return MPT_FAIL; 7869b631363SMatt Jacob } 7879b631363SMatt Jacob 7889b631363SMatt Jacob /* If door bell is in use we don't have a chance of getting 7899b631363SMatt Jacob * a word in since the IOC probably crashed in message 7909b631363SMatt Jacob * processing. So don't waste our time. 7919b631363SMatt Jacob */ 7929b631363SMatt Jacob if (MPT_DB_IS_IN_USE(mpt_rd_db(mpt))) { 793b0a2fdeeSScott Long mpt_prt(mpt, "soft reset failed: doorbell wedged\n"); 7949b631363SMatt Jacob return MPT_FAIL; 7959b631363SMatt Jacob } 7969b631363SMatt Jacob 7979b631363SMatt Jacob /* Send the reset request to the IOC */ 7989b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_DOORBELL, 7999b631363SMatt Jacob MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET << MPI_DOORBELL_FUNCTION_SHIFT); 8009b631363SMatt Jacob if (mpt_wait_db_ack(mpt) != MPT_OK) { 801b0a2fdeeSScott Long mpt_prt(mpt, "soft reset failed: ack timeout\n"); 8029b631363SMatt Jacob return MPT_FAIL; 8039b631363SMatt Jacob } 8049b631363SMatt Jacob 8059b631363SMatt Jacob /* Wait for the IOC to reload and come out of reset state */ 8069b631363SMatt Jacob if (mpt_wait_state(mpt, MPT_DB_STATE_READY) != MPT_OK) { 807b0a2fdeeSScott Long mpt_prt(mpt, "soft reset failed: device did not restart\n"); 8089b631363SMatt Jacob return MPT_FAIL; 8099b631363SMatt Jacob } 8109b631363SMatt Jacob 8119b631363SMatt Jacob return MPT_OK; 8129b631363SMatt Jacob } 8139b631363SMatt Jacob 814b0a2fdeeSScott Long static int 815b0a2fdeeSScott Long mpt_enable_diag_mode(struct mpt_softc *mpt) 816b0a2fdeeSScott Long { 817b0a2fdeeSScott Long int try; 818b0a2fdeeSScott Long 819b0a2fdeeSScott Long try = 20; 820b0a2fdeeSScott Long while (--try) { 821b0a2fdeeSScott Long 822b0a2fdeeSScott Long if ((mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC) & MPI_DIAG_DRWE) != 0) 823b0a2fdeeSScott Long break; 824b0a2fdeeSScott Long 825b0a2fdeeSScott Long /* Enable diagnostic registers */ 826b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, 0xFF); 827b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_1ST_KEY_VALUE); 828b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_2ND_KEY_VALUE); 829b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_3RD_KEY_VALUE); 830b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_4TH_KEY_VALUE); 831b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_5TH_KEY_VALUE); 832b0a2fdeeSScott Long 833b0a2fdeeSScott Long DELAY(100000); 834b0a2fdeeSScott Long } 835b0a2fdeeSScott Long if (try == 0) 836b0a2fdeeSScott Long return (EIO); 837b0a2fdeeSScott Long return (0); 838b0a2fdeeSScott Long } 839b0a2fdeeSScott Long 840b0a2fdeeSScott Long static void 841b0a2fdeeSScott Long mpt_disable_diag_mode(struct mpt_softc *mpt) 842b0a2fdeeSScott Long { 843b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_SEQUENCE, 0xFFFFFFFF); 844b0a2fdeeSScott Long } 845b0a2fdeeSScott Long 8469b631363SMatt Jacob /* This is a magic diagnostic reset that resets all the ARM 8479b631363SMatt Jacob * processors in the chip. 8489b631363SMatt Jacob */ 849b0a2fdeeSScott Long static void 850b0a2fdeeSScott Long mpt_hard_reset(struct mpt_softc *mpt) 8519b631363SMatt Jacob { 852b0a2fdeeSScott Long int error; 853b0a2fdeeSScott Long int wait; 854b0a2fdeeSScott Long uint32_t diagreg; 8559b631363SMatt Jacob 856b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "hard reset\n"); 857b0a2fdeeSScott Long 858b0a2fdeeSScott Long error = mpt_enable_diag_mode(mpt); 859b0a2fdeeSScott Long if (error) { 860b0a2fdeeSScott Long mpt_prt(mpt, "WARNING - Could not enter diagnostic mode !\n"); 861b0a2fdeeSScott Long mpt_prt(mpt, "Trying to reset anyway.\n"); 862b0a2fdeeSScott Long } 863b0a2fdeeSScott Long 864b0a2fdeeSScott Long diagreg = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 865b0a2fdeeSScott Long 866b0a2fdeeSScott Long /* 867b0a2fdeeSScott Long * This appears to be a workaround required for some 868b0a2fdeeSScott Long * firmware or hardware revs. 869b0a2fdeeSScott Long */ 870b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, diagreg | MPI_DIAG_DISABLE_ARM); 871b0a2fdeeSScott Long DELAY(1000); 8729b631363SMatt Jacob 8739b631363SMatt Jacob /* Diag. port is now active so we can now hit the reset bit */ 874b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, diagreg | MPI_DIAG_RESET_ADAPTER); 8759b631363SMatt Jacob 876b0a2fdeeSScott Long /* 877b0a2fdeeSScott Long * Ensure that the reset has finished. We delay 1ms 878b0a2fdeeSScott Long * prior to reading the register to make sure the chip 879b0a2fdeeSScott Long * has sufficiently completed its reset to handle register 880b0a2fdeeSScott Long * accesses. 881b0a2fdeeSScott Long */ 882b0a2fdeeSScott Long wait = 5000; 883b0a2fdeeSScott Long do { 884b0a2fdeeSScott Long DELAY(1000); 885b0a2fdeeSScott Long diagreg = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 886b0a2fdeeSScott Long } while (--wait && (diagreg & MPI_DIAG_RESET_ADAPTER) == 0); 8879b631363SMatt Jacob 888b0a2fdeeSScott Long if (wait == 0) { 889b0a2fdeeSScott Long mpt_prt(mpt, "WARNING - Failed hard reset! " 890b0a2fdeeSScott Long "Trying to initialize anyway.\n"); 8919b631363SMatt Jacob } 8929b631363SMatt Jacob 893b0a2fdeeSScott Long /* 894b0a2fdeeSScott Long * If we have firmware to download, it must be loaded before 895b0a2fdeeSScott Long * the controller will become operational. Do so now. 896b0a2fdeeSScott Long */ 897b0a2fdeeSScott Long if (mpt->fw_image != NULL) { 898b0a2fdeeSScott Long 899b0a2fdeeSScott Long error = mpt_download_fw(mpt); 900b0a2fdeeSScott Long 901b0a2fdeeSScott Long if (error) { 902b0a2fdeeSScott Long mpt_prt(mpt, "WARNING - Firmware Download Failed!\n"); 903b0a2fdeeSScott Long mpt_prt(mpt, "Trying to initialize anyway.\n"); 9049b631363SMatt Jacob } 905b0a2fdeeSScott Long } 906b0a2fdeeSScott Long 907b0a2fdeeSScott Long /* 908b0a2fdeeSScott Long * Reseting the controller should have disabled write 909b0a2fdeeSScott Long * access to the diagnostic registers, but disable 910b0a2fdeeSScott Long * manually to be sure. 911b0a2fdeeSScott Long */ 912b0a2fdeeSScott Long mpt_disable_diag_mode(mpt); 913b0a2fdeeSScott Long } 914b0a2fdeeSScott Long 915b0a2fdeeSScott Long static void 916b0a2fdeeSScott Long mpt_core_ioc_reset(struct mpt_softc *mpt, int type) 917b0a2fdeeSScott Long { 918b0a2fdeeSScott Long /* 919b0a2fdeeSScott Long * Complete all pending requests with a status 920b0a2fdeeSScott Long * appropriate for an IOC reset. 921b0a2fdeeSScott Long */ 922b0a2fdeeSScott Long mpt_complete_request_chain(mpt, &mpt->request_pending_list, 923b0a2fdeeSScott Long MPI_IOCSTATUS_INVALID_STATE); 924b0a2fdeeSScott Long } 925b0a2fdeeSScott Long 9269b631363SMatt Jacob 9279b631363SMatt Jacob /* 9289b631363SMatt Jacob * Reset the IOC when needed. Try software command first then if needed 9299b631363SMatt Jacob * poke at the magic diagnostic reset. Note that a hard reset resets 9309b631363SMatt Jacob * *both* IOCs on dual function chips (FC929 && LSI1030) as well as 9319b631363SMatt Jacob * fouls up the PCI configuration registers. 9329b631363SMatt Jacob */ 9339b631363SMatt Jacob int 934b0a2fdeeSScott Long mpt_reset(struct mpt_softc *mpt, int reinit) 9359b631363SMatt Jacob { 936b0a2fdeeSScott Long struct mpt_personality *pers; 9379b631363SMatt Jacob int ret; 93829ae59edSMatt Jacob int retry_cnt = 0; 9399b631363SMatt Jacob 94029ae59edSMatt Jacob /* 94129ae59edSMatt Jacob * Try a soft reset. If that fails, get out the big hammer. 94229ae59edSMatt Jacob */ 94329ae59edSMatt Jacob again: 9449b631363SMatt Jacob if ((ret = mpt_soft_reset(mpt)) != MPT_OK) { 94529ae59edSMatt Jacob int cnt; 94629ae59edSMatt Jacob for (cnt = 0; cnt < 5; cnt++) { 9479b631363SMatt Jacob /* Failed; do a hard reset */ 9489b631363SMatt Jacob mpt_hard_reset(mpt); 9499b631363SMatt Jacob 95029ae59edSMatt Jacob /* 95129ae59edSMatt Jacob * Wait for the IOC to reload 95229ae59edSMatt Jacob * and come out of reset state 95329ae59edSMatt Jacob */ 9549b631363SMatt Jacob ret = mpt_wait_state(mpt, MPT_DB_STATE_READY); 95529ae59edSMatt Jacob if (ret == MPT_OK) { 95629ae59edSMatt Jacob break; 95729ae59edSMatt Jacob } 95829ae59edSMatt Jacob /* 95929ae59edSMatt Jacob * Okay- try to check again... 96029ae59edSMatt Jacob */ 96129ae59edSMatt Jacob ret = mpt_wait_state(mpt, MPT_DB_STATE_READY); 96229ae59edSMatt Jacob if (ret == MPT_OK) { 96329ae59edSMatt Jacob break; 96429ae59edSMatt Jacob } 96529ae59edSMatt Jacob mpt_prt(mpt, "mpt_reset: failed hard reset (%d:%d)\n", 96629ae59edSMatt Jacob retry_cnt, cnt); 96729ae59edSMatt Jacob } 9689b631363SMatt Jacob } 969b0a2fdeeSScott Long 97029ae59edSMatt Jacob if (retry_cnt == 0) { 971b0a2fdeeSScott Long /* 972b0a2fdeeSScott Long * Invoke reset handlers. We bump the reset count so 973b0a2fdeeSScott Long * that mpt_wait_req() understands that regardless of 974b0a2fdeeSScott Long * the specified wait condition, it should stop its wait. 975b0a2fdeeSScott Long */ 976b0a2fdeeSScott Long mpt->reset_cnt++; 977b0a2fdeeSScott Long MPT_PERS_FOREACH(mpt, pers) 978b0a2fdeeSScott Long pers->reset(mpt, ret); 97929ae59edSMatt Jacob } 980b0a2fdeeSScott Long 98129ae59edSMatt Jacob if (reinit != 0) { 98229ae59edSMatt Jacob ret = mpt_enable_ioc(mpt); 98329ae59edSMatt Jacob if (ret == MPT_OK) { 98429ae59edSMatt Jacob mpt_enable_ints(mpt); 98529ae59edSMatt Jacob } 98629ae59edSMatt Jacob } 98729ae59edSMatt Jacob if (ret != MPT_OK && retry_cnt++ < 2) { 98829ae59edSMatt Jacob goto again; 98929ae59edSMatt Jacob } 9909b631363SMatt Jacob return ret; 9919b631363SMatt Jacob } 9929b631363SMatt Jacob 9939b631363SMatt Jacob /* Return a command buffer to the free queue */ 9949b631363SMatt Jacob void 995b0a2fdeeSScott Long mpt_free_request(struct mpt_softc *mpt, request_t *req) 9969b631363SMatt Jacob { 997444dd2b6SMatt Jacob request_t *nxt; 998b0a2fdeeSScott Long struct mpt_evtf_record *record; 999b0a2fdeeSScott Long uint32_t reply_baddr; 1000b0a2fdeeSScott Long 10017dec90bcSMatt Jacob if (req == NULL || req != &mpt->request_pool[req->index]) { 10029b631363SMatt Jacob panic("mpt_free_request bad req ptr\n"); 10039b631363SMatt Jacob return; 10049b631363SMatt Jacob } 1005444dd2b6SMatt Jacob if ((nxt = req->chain) != NULL) { 1006444dd2b6SMatt Jacob req->chain = NULL; 1007444dd2b6SMatt Jacob mpt_free_request(mpt, nxt); /* NB: recursion */ 1008444dd2b6SMatt Jacob } 10099b631363SMatt Jacob req->ccb = NULL; 1010b0a2fdeeSScott Long req->state = REQ_STATE_FREE; 1011b0a2fdeeSScott Long if (LIST_EMPTY(&mpt->ack_frames)) { 1012b0a2fdeeSScott Long TAILQ_INSERT_HEAD(&mpt->request_free_list, req, links); 1013b0a2fdeeSScott Long if (mpt->getreqwaiter != 0) { 1014b0a2fdeeSScott Long mpt->getreqwaiter = 0; 1015b0a2fdeeSScott Long wakeup(&mpt->request_free_list); 1016b0a2fdeeSScott Long } 1017b0a2fdeeSScott Long return; 1018b0a2fdeeSScott Long } 1019b0a2fdeeSScott Long 1020b0a2fdeeSScott Long /* 1021b0a2fdeeSScott Long * Process an ack frame deferred due to resource shortage. 1022b0a2fdeeSScott Long */ 1023b0a2fdeeSScott Long record = LIST_FIRST(&mpt->ack_frames); 1024b0a2fdeeSScott Long LIST_REMOVE(record, links); 1025b0a2fdeeSScott Long mpt_send_event_ack(mpt, req, &record->reply, record->context); 1026b0a2fdeeSScott Long reply_baddr = (uint32_t)((uint8_t *)record - mpt->reply) 1027b0a2fdeeSScott Long + (mpt->reply_phys & 0xFFFFFFFF); 1028b0a2fdeeSScott Long mpt_free_reply(mpt, reply_baddr); 10299b631363SMatt Jacob } 10309b631363SMatt Jacob 10319b631363SMatt Jacob /* Get a command buffer from the free queue */ 10329b631363SMatt Jacob request_t * 1033b0a2fdeeSScott Long mpt_get_request(struct mpt_softc *mpt, int sleep_ok) 10349b631363SMatt Jacob { 10359b631363SMatt Jacob request_t *req; 1036b0a2fdeeSScott Long 1037b0a2fdeeSScott Long retry: 1038b0a2fdeeSScott Long req = TAILQ_FIRST(&mpt->request_free_list); 10399b631363SMatt Jacob if (req != NULL) { 1040b0a2fdeeSScott Long KASSERT(req == &mpt->request_pool[req->index], 1041b0a2fdeeSScott Long ("mpt_get_request: corrupted request free list\n")); 1042b0a2fdeeSScott Long TAILQ_REMOVE(&mpt->request_free_list, req, links); 1043b0a2fdeeSScott Long req->state = REQ_STATE_ALLOCATED; 1044444dd2b6SMatt Jacob req->chain = NULL; 1045b0a2fdeeSScott Long } else if (sleep_ok != 0) { 1046b0a2fdeeSScott Long mpt->getreqwaiter = 1; 1047b0a2fdeeSScott Long mpt_sleep(mpt, &mpt->request_free_list, PUSER, "mptgreq", 0); 1048b0a2fdeeSScott Long goto retry; 10499b631363SMatt Jacob } 10509b631363SMatt Jacob return req; 10519b631363SMatt Jacob } 10529b631363SMatt Jacob 10539b631363SMatt Jacob /* Pass the command to the IOC */ 10549b631363SMatt Jacob void 1055b0a2fdeeSScott Long mpt_send_cmd(struct mpt_softc *mpt, request_t *req) 10569b631363SMatt Jacob { 1057b0a2fdeeSScott Long uint32_t *pReq; 1058b0a2fdeeSScott Long 10599b631363SMatt Jacob pReq = req->req_vbuf; 1060444dd2b6SMatt Jacob if (mpt->verbose > MPT_PRT_TRACE) { 1061444dd2b6SMatt Jacob int offset; 1062444dd2b6SMatt Jacob mpt_prt(mpt, "Send Request %d (0x%x):", 1063301472c2SMatt Jacob req->index, req->req_pbuf); 1064444dd2b6SMatt Jacob for (offset = 0; offset < mpt->request_frame_size; offset++) { 1065444dd2b6SMatt Jacob if ((offset & 0x7) == 0) { 1066444dd2b6SMatt Jacob mpt_prtc(mpt, "\n"); 1067444dd2b6SMatt Jacob mpt_prt(mpt, " "); 1068444dd2b6SMatt Jacob } 1069444dd2b6SMatt Jacob mpt_prtc(mpt, " %08x", pReq[offset]); 1070444dd2b6SMatt Jacob } 1071444dd2b6SMatt Jacob mpt_prtc(mpt, "\n"); 1072444dd2b6SMatt Jacob } 10739b631363SMatt Jacob bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap, 10749b631363SMatt Jacob BUS_DMASYNC_PREWRITE); 1075b0a2fdeeSScott Long req->state |= REQ_STATE_QUEUED; 1076b0a2fdeeSScott Long TAILQ_INSERT_HEAD(&mpt->request_pending_list, req, links); 1077b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_REQUEST_Q, (uint32_t) req->req_pbuf); 10789b631363SMatt Jacob } 10799b631363SMatt Jacob 10809b631363SMatt Jacob /* 1081b0a2fdeeSScott Long * Wait for a request to complete. 1082b0a2fdeeSScott Long * 1083b0a2fdeeSScott Long * Inputs: 1084b0a2fdeeSScott Long * mpt softc of controller executing request 1085b0a2fdeeSScott Long * req request to wait for 1086b0a2fdeeSScott Long * sleep_ok nonzero implies may sleep in this context 1087b0a2fdeeSScott Long * time_ms timeout in ms. 0 implies no timeout. 1088b0a2fdeeSScott Long * 1089b0a2fdeeSScott Long * Return Values: 1090b0a2fdeeSScott Long * 0 Request completed 1091b0a2fdeeSScott Long * non-0 Timeout fired before request completion. 10929b631363SMatt Jacob */ 1093b0a2fdeeSScott Long int 1094b0a2fdeeSScott Long mpt_wait_req(struct mpt_softc *mpt, request_t *req, 1095b0a2fdeeSScott Long mpt_req_state_t state, mpt_req_state_t mask, 1096b0a2fdeeSScott Long int sleep_ok, int time_ms) 10979b631363SMatt Jacob { 1098b0a2fdeeSScott Long int error; 1099b0a2fdeeSScott Long int timeout; 1100b0a2fdeeSScott Long u_int saved_cnt; 11019b631363SMatt Jacob 1102b0a2fdeeSScott Long /* 1103b0a2fdeeSScott Long * timeout is in ms. 0 indicates infinite wait. 1104b0a2fdeeSScott Long * Convert to ticks or 500us units depending on 1105b0a2fdeeSScott Long * our sleep mode. 1106b0a2fdeeSScott Long */ 1107b0a2fdeeSScott Long if (sleep_ok != 0) 1108b0a2fdeeSScott Long timeout = (time_ms * hz) / 1000; 1109b0a2fdeeSScott Long else 1110b0a2fdeeSScott Long timeout = time_ms * 2; 1111b0a2fdeeSScott Long req->state |= REQ_STATE_NEED_WAKEUP; 1112b0a2fdeeSScott Long mask &= ~REQ_STATE_NEED_WAKEUP; 1113444dd2b6SMatt Jacob saved_cnt = mpt->reset_cnt; 1114b0a2fdeeSScott Long while ((req->state & mask) != state 1115b0a2fdeeSScott Long && mpt->reset_cnt == saved_cnt) { 1116b0a2fdeeSScott Long 1117b0a2fdeeSScott Long if (sleep_ok != 0) { 1118b0a2fdeeSScott Long error = mpt_sleep(mpt, req, PUSER, "mptreq", timeout); 1119b0a2fdeeSScott Long if (error == EWOULDBLOCK) { 1120b0a2fdeeSScott Long timeout = 0; 1121b0a2fdeeSScott Long break; 1122b0a2fdeeSScott Long } 1123b0a2fdeeSScott Long } else { 1124b0a2fdeeSScott Long if (time_ms != 0 && --timeout == 0) { 1125b0a2fdeeSScott Long mpt_prt(mpt, "mpt_wait_req timed out\n"); 1126b0a2fdeeSScott Long break; 1127b0a2fdeeSScott Long } 1128b0a2fdeeSScott Long DELAY(500); 1129b0a2fdeeSScott Long mpt_intr(mpt); 1130b0a2fdeeSScott Long } 1131b0a2fdeeSScott Long } 1132b0a2fdeeSScott Long req->state &= ~REQ_STATE_NEED_WAKEUP; 1133b0a2fdeeSScott Long if (mpt->reset_cnt != saved_cnt) 1134b0a2fdeeSScott Long return (EIO); 1135444dd2b6SMatt Jacob if (time_ms && timeout <= 0) 1136b0a2fdeeSScott Long return (ETIMEDOUT); 1137b0a2fdeeSScott Long return (0); 11389b631363SMatt Jacob } 11399b631363SMatt Jacob 11409b631363SMatt Jacob /* 11419b631363SMatt Jacob * Send a command to the IOC via the handshake register. 11429b631363SMatt Jacob * 11439b631363SMatt Jacob * Only done at initialization time and for certain unusual 11449b631363SMatt Jacob * commands such as device/bus reset as specified by LSI. 11459b631363SMatt Jacob */ 11469b631363SMatt Jacob int 1147b0a2fdeeSScott Long mpt_send_handshake_cmd(struct mpt_softc *mpt, size_t len, void *cmd) 11489b631363SMatt Jacob { 11499b631363SMatt Jacob int i; 1150b0a2fdeeSScott Long uint32_t data, *data32; 11519b631363SMatt Jacob 11529b631363SMatt Jacob /* Check condition of the IOC */ 11539b631363SMatt Jacob data = mpt_rd_db(mpt); 1154b0a2fdeeSScott Long if ((MPT_STATE(data) != MPT_DB_STATE_READY 1155b0a2fdeeSScott Long && MPT_STATE(data) != MPT_DB_STATE_RUNNING 1156b0a2fdeeSScott Long && MPT_STATE(data) != MPT_DB_STATE_FAULT) 1157b0a2fdeeSScott Long || MPT_DB_IS_IN_USE(data)) { 1158b0a2fdeeSScott Long mpt_prt(mpt, "handshake aborted - invalid doorbell state\n"); 11599b631363SMatt Jacob mpt_print_db(data); 11609b631363SMatt Jacob return (EBUSY); 11619b631363SMatt Jacob } 11629b631363SMatt Jacob 11639b631363SMatt Jacob /* We move things in 32 bit chunks */ 11649b631363SMatt Jacob len = (len + 3) >> 2; 11659b631363SMatt Jacob data32 = cmd; 11669b631363SMatt Jacob 11679b631363SMatt Jacob /* Clear any left over pending doorbell interupts */ 11689b631363SMatt Jacob if (MPT_DB_INTR(mpt_rd_intr(mpt))) 11699b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 11709b631363SMatt Jacob 11719b631363SMatt Jacob /* 11729b631363SMatt Jacob * Tell the handshake reg. we are going to send a command 11739b631363SMatt Jacob * and how long it is going to be. 11749b631363SMatt Jacob */ 11759b631363SMatt Jacob data = (MPI_FUNCTION_HANDSHAKE << MPI_DOORBELL_FUNCTION_SHIFT) | 11769b631363SMatt Jacob (len << MPI_DOORBELL_ADD_DWORDS_SHIFT); 11779b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_DOORBELL, data); 11789b631363SMatt Jacob 11799b631363SMatt Jacob /* Wait for the chip to notice */ 11809b631363SMatt Jacob if (mpt_wait_db_int(mpt) != MPT_OK) { 1181b0a2fdeeSScott Long mpt_prt(mpt, "mpt_send_handshake_cmd timeout1\n"); 1182b0a2fdeeSScott Long return (ETIMEDOUT); 11839b631363SMatt Jacob } 11849b631363SMatt Jacob 11859b631363SMatt Jacob /* Clear the interrupt */ 11869b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 11879b631363SMatt Jacob 11889b631363SMatt Jacob if (mpt_wait_db_ack(mpt) != MPT_OK) { 1189b0a2fdeeSScott Long mpt_prt(mpt, "mpt_send_handshake_cmd timeout2\n"); 1190b0a2fdeeSScott Long return (ETIMEDOUT); 11919b631363SMatt Jacob } 11929b631363SMatt Jacob 11939b631363SMatt Jacob /* Send the command */ 11949b631363SMatt Jacob for (i = 0; i < len; i++) { 11959b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_DOORBELL, *data32++); 11969b631363SMatt Jacob if (mpt_wait_db_ack(mpt) != MPT_OK) { 1197301472c2SMatt Jacob mpt_prt(mpt, 1198b0a2fdeeSScott Long "mpt_send_handshake_cmd timeout! index = %d\n", 1199b0a2fdeeSScott Long i); 1200b0a2fdeeSScott Long return (ETIMEDOUT); 12019b631363SMatt Jacob } 12029b631363SMatt Jacob } 12039b631363SMatt Jacob return MPT_OK; 12049b631363SMatt Jacob } 12059b631363SMatt Jacob 12069b631363SMatt Jacob /* Get the response from the handshake register */ 12079b631363SMatt Jacob int 1208b0a2fdeeSScott Long mpt_recv_handshake_reply(struct mpt_softc *mpt, size_t reply_len, void *reply) 12099b631363SMatt Jacob { 12109b631363SMatt Jacob int left, reply_left; 12119b631363SMatt Jacob u_int16_t *data16; 12129b631363SMatt Jacob MSG_DEFAULT_REPLY *hdr; 12139b631363SMatt Jacob 12149b631363SMatt Jacob /* We move things out in 16 bit chunks */ 12159b631363SMatt Jacob reply_len >>= 1; 12169b631363SMatt Jacob data16 = (u_int16_t *)reply; 12179b631363SMatt Jacob 12189b631363SMatt Jacob hdr = (MSG_DEFAULT_REPLY *)reply; 12199b631363SMatt Jacob 12209b631363SMatt Jacob /* Get first word */ 12219b631363SMatt Jacob if (mpt_wait_db_int(mpt) != MPT_OK) { 1222b0a2fdeeSScott Long mpt_prt(mpt, "mpt_recv_handshake_cmd timeout1\n"); 12239b631363SMatt Jacob return ETIMEDOUT; 12249b631363SMatt Jacob } 12259b631363SMatt Jacob *data16++ = mpt_read(mpt, MPT_OFFSET_DOORBELL) & MPT_DB_DATA_MASK; 12269b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 12279b631363SMatt Jacob 12289b631363SMatt Jacob /* Get Second Word */ 12299b631363SMatt Jacob if (mpt_wait_db_int(mpt) != MPT_OK) { 1230b0a2fdeeSScott Long mpt_prt(mpt, "mpt_recv_handshake_cmd timeout2\n"); 12319b631363SMatt Jacob return ETIMEDOUT; 12329b631363SMatt Jacob } 12339b631363SMatt Jacob *data16++ = mpt_read(mpt, MPT_OFFSET_DOORBELL) & MPT_DB_DATA_MASK; 12349b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 12359b631363SMatt Jacob 12369b631363SMatt Jacob /* With the second word, we can now look at the length */ 1237b0a2fdeeSScott Long if (((reply_len >> 1) != hdr->MsgLength)) { 1238301472c2SMatt Jacob mpt_prt(mpt, "reply length does not match message length: " 1239b0a2fdeeSScott Long "got 0x%02x, expected 0x%02x\n", 1240301472c2SMatt Jacob hdr->MsgLength << 2, reply_len << 1); 12419b631363SMatt Jacob } 12429b631363SMatt Jacob 12439b631363SMatt Jacob /* Get rest of the reply; but don't overflow the provided buffer */ 12449b631363SMatt Jacob left = (hdr->MsgLength << 1) - 2; 12459b631363SMatt Jacob reply_left = reply_len - 2; 12469b631363SMatt Jacob while (left--) { 12479b631363SMatt Jacob u_int16_t datum; 12489b631363SMatt Jacob 12499b631363SMatt Jacob if (mpt_wait_db_int(mpt) != MPT_OK) { 1250b0a2fdeeSScott Long mpt_prt(mpt, "mpt_recv_handshake_cmd timeout3\n"); 12519b631363SMatt Jacob return ETIMEDOUT; 12529b631363SMatt Jacob } 12539b631363SMatt Jacob datum = mpt_read(mpt, MPT_OFFSET_DOORBELL); 12549b631363SMatt Jacob 12559b631363SMatt Jacob if (reply_left-- > 0) 12569b631363SMatt Jacob *data16++ = datum & MPT_DB_DATA_MASK; 12579b631363SMatt Jacob 12589b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 12599b631363SMatt Jacob } 12609b631363SMatt Jacob 12619b631363SMatt Jacob /* One more wait & clear at the end */ 12629b631363SMatt Jacob if (mpt_wait_db_int(mpt) != MPT_OK) { 1263b0a2fdeeSScott Long mpt_prt(mpt, "mpt_recv_handshake_cmd timeout4\n"); 12649b631363SMatt Jacob return ETIMEDOUT; 12659b631363SMatt Jacob } 12669b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0); 12679b631363SMatt Jacob 12689b631363SMatt Jacob if ((hdr->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1269b0a2fdeeSScott Long if (mpt->verbose >= MPT_PRT_TRACE) 12709b631363SMatt Jacob mpt_print_reply(hdr); 12719b631363SMatt Jacob return (MPT_FAIL | hdr->IOCStatus); 12729b631363SMatt Jacob } 12739b631363SMatt Jacob 12749b631363SMatt Jacob return (0); 12759b631363SMatt Jacob } 12769b631363SMatt Jacob 12779b631363SMatt Jacob static int 1278b0a2fdeeSScott Long mpt_get_iocfacts(struct mpt_softc *mpt, MSG_IOC_FACTS_REPLY *freplp) 12799b631363SMatt Jacob { 12809b631363SMatt Jacob MSG_IOC_FACTS f_req; 12819b631363SMatt Jacob int error; 12829b631363SMatt Jacob 12839b631363SMatt Jacob bzero(&f_req, sizeof f_req); 12849b631363SMatt Jacob f_req.Function = MPI_FUNCTION_IOC_FACTS; 1285b0a2fdeeSScott Long f_req.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 12869b631363SMatt Jacob error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req); 12879b631363SMatt Jacob if (error) 12889b631363SMatt Jacob return(error); 12899b631363SMatt Jacob error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp); 12909b631363SMatt Jacob return (error); 12919b631363SMatt Jacob } 12929b631363SMatt Jacob 12937104aeefSMatt Jacob static int 1294b0a2fdeeSScott Long mpt_get_portfacts(struct mpt_softc *mpt, MSG_PORT_FACTS_REPLY *freplp) 12957104aeefSMatt Jacob { 12967104aeefSMatt Jacob MSG_PORT_FACTS f_req; 12977104aeefSMatt Jacob int error; 12987104aeefSMatt Jacob 12997104aeefSMatt Jacob /* XXX: Only getting PORT FACTS for Port 0 */ 1300b0a2fdeeSScott Long memset(&f_req, 0, sizeof f_req); 13017104aeefSMatt Jacob f_req.Function = MPI_FUNCTION_PORT_FACTS; 1302b0a2fdeeSScott Long f_req.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 13037104aeefSMatt Jacob error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req); 13047104aeefSMatt Jacob if (error) 13057104aeefSMatt Jacob return(error); 13067104aeefSMatt Jacob error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp); 13077104aeefSMatt Jacob return (error); 13087104aeefSMatt Jacob } 13097104aeefSMatt Jacob 13109b631363SMatt Jacob /* 13119b631363SMatt Jacob * Send the initialization request. This is where we specify how many 13129b631363SMatt Jacob * SCSI busses and how many devices per bus we wish to emulate. 13139b631363SMatt Jacob * This is also the command that specifies the max size of the reply 13149b631363SMatt Jacob * frames from the IOC that we will be allocating. 13159b631363SMatt Jacob */ 13169b631363SMatt Jacob static int 1317b0a2fdeeSScott Long mpt_send_ioc_init(struct mpt_softc *mpt, uint32_t who) 13189b631363SMatt Jacob { 13199b631363SMatt Jacob int error = 0; 13209b631363SMatt Jacob MSG_IOC_INIT init; 13219b631363SMatt Jacob MSG_IOC_INIT_REPLY reply; 13229b631363SMatt Jacob 13239b631363SMatt Jacob bzero(&init, sizeof init); 13249b631363SMatt Jacob init.WhoInit = who; 13259b631363SMatt Jacob init.Function = MPI_FUNCTION_IOC_INIT; 13269b631363SMatt Jacob if (mpt->is_fc) { 13279b631363SMatt Jacob init.MaxDevices = 255; 1328444dd2b6SMatt Jacob } else if (mpt->is_sas) { 1329444dd2b6SMatt Jacob init.MaxDevices = mpt->mpt_max_devices; 13309b631363SMatt Jacob } else { 13319b631363SMatt Jacob init.MaxDevices = 16; 13329b631363SMatt Jacob } 13339b631363SMatt Jacob init.MaxBuses = 1; 1334444dd2b6SMatt Jacob 1335444dd2b6SMatt Jacob init.MsgVersion = htole16(MPI_VERSION); 1336444dd2b6SMatt Jacob init.HeaderVersion = htole16(MPI_HEADER_VERSION); 1337444dd2b6SMatt Jacob init.ReplyFrameSize = htole16(MPT_REPLY_SIZE); 1338b0a2fdeeSScott Long init.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 13399b631363SMatt Jacob 13409b631363SMatt Jacob if ((error = mpt_send_handshake_cmd(mpt, sizeof init, &init)) != 0) { 13419b631363SMatt Jacob return(error); 13429b631363SMatt Jacob } 13439b631363SMatt Jacob 13449b631363SMatt Jacob error = mpt_recv_handshake_reply(mpt, sizeof reply, &reply); 13459b631363SMatt Jacob return (error); 13469b631363SMatt Jacob } 13479b631363SMatt Jacob 13487104aeefSMatt Jacob 13497104aeefSMatt Jacob /* 13507104aeefSMatt Jacob * Utiltity routine to read configuration headers and pages 13517104aeefSMatt Jacob */ 1352b0a2fdeeSScott Long int 1353b0a2fdeeSScott Long mpt_issue_cfg_req(struct mpt_softc *mpt, request_t *req, u_int Action, 1354b0a2fdeeSScott Long u_int PageVersion, u_int PageLength, u_int PageNumber, 1355b0a2fdeeSScott Long u_int PageType, uint32_t PageAddress, bus_addr_t addr, 1356b0a2fdeeSScott Long bus_size_t len, int sleep_ok, int timeout_ms) 13577104aeefSMatt Jacob { 13587104aeefSMatt Jacob MSG_CONFIG *cfgp; 1359b0a2fdeeSScott Long SGE_SIMPLE32 *se; 13607104aeefSMatt Jacob 13617104aeefSMatt Jacob cfgp = req->req_vbuf; 1362b0a2fdeeSScott Long memset(cfgp, 0, sizeof *cfgp); 1363b0a2fdeeSScott Long cfgp->Action = Action; 13647104aeefSMatt Jacob cfgp->Function = MPI_FUNCTION_CONFIG; 1365b0a2fdeeSScott Long cfgp->Header.PageVersion = PageVersion; 1366b0a2fdeeSScott Long cfgp->Header.PageLength = PageLength; 1367b0a2fdeeSScott Long cfgp->Header.PageNumber = PageNumber; 1368b0a2fdeeSScott Long cfgp->Header.PageType = PageType; 13697104aeefSMatt Jacob cfgp->PageAddress = PageAddress; 1370b0a2fdeeSScott Long se = (SGE_SIMPLE32 *)&cfgp->PageBufferSGE; 1371b0a2fdeeSScott Long se->Address = addr; 1372b0a2fdeeSScott Long MPI_pSGE_SET_LENGTH(se, len); 1373b0a2fdeeSScott Long MPI_pSGE_SET_FLAGS(se, (MPI_SGE_FLAGS_SIMPLE_ELEMENT | 1374b0a2fdeeSScott Long MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER | 1375b0a2fdeeSScott Long MPI_SGE_FLAGS_END_OF_LIST | 1376b0a2fdeeSScott Long ((Action == MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT 1377b0a2fdeeSScott Long || Action == MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM) 1378b0a2fdeeSScott Long ? MPI_SGE_FLAGS_HOST_TO_IOC : MPI_SGE_FLAGS_IOC_TO_HOST))); 1379b0a2fdeeSScott Long cfgp->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_CONFIG); 13807104aeefSMatt Jacob 13817104aeefSMatt Jacob mpt_check_doorbell(mpt); 13827104aeefSMatt Jacob mpt_send_cmd(mpt, req); 1383b0a2fdeeSScott Long return (mpt_wait_req(mpt, req, REQ_STATE_DONE, REQ_STATE_DONE, 1384b0a2fdeeSScott Long sleep_ok, timeout_ms)); 13857104aeefSMatt Jacob } 13867104aeefSMatt Jacob 1387b0a2fdeeSScott Long 1388b0a2fdeeSScott Long int 1389b0a2fdeeSScott Long mpt_read_cfg_header(struct mpt_softc *mpt, int PageType, int PageNumber, 1390b0a2fdeeSScott Long uint32_t PageAddress, CONFIG_PAGE_HEADER *rslt, 1391b0a2fdeeSScott Long int sleep_ok, int timeout_ms) 1392b0a2fdeeSScott Long { 1393b0a2fdeeSScott Long request_t *req; 139429ae59edSMatt Jacob MSG_CONFIG *cfgp; 1395b0a2fdeeSScott Long int error; 1396b0a2fdeeSScott Long 1397b0a2fdeeSScott Long req = mpt_get_request(mpt, sleep_ok); 1398b0a2fdeeSScott Long if (req == NULL) { 1399b0a2fdeeSScott Long mpt_prt(mpt, "mpt_read_cfg_header: Get request failed!\n"); 140029ae59edSMatt Jacob return (ENOMEM); 14017104aeefSMatt Jacob } 1402b0a2fdeeSScott Long 1403b0a2fdeeSScott Long error = mpt_issue_cfg_req(mpt, req, MPI_CONFIG_ACTION_PAGE_HEADER, 1404b0a2fdeeSScott Long /*PageVersion*/0, /*PageLength*/0, PageNumber, 1405b0a2fdeeSScott Long PageType, PageAddress, /*addr*/0, /*len*/0, 1406b0a2fdeeSScott Long sleep_ok, timeout_ms); 1407b0a2fdeeSScott Long if (error != 0) { 140829ae59edSMatt Jacob mpt_free_request(mpt, req); 1409b0a2fdeeSScott Long mpt_prt(mpt, "read_cfg_header timed out\n"); 141029ae59edSMatt Jacob return (ETIMEDOUT); 1411b0a2fdeeSScott Long } 1412b0a2fdeeSScott Long 141329ae59edSMatt Jacob switch (req->IOCStatus & MPI_IOCSTATUS_MASK) { 141429ae59edSMatt Jacob case MPI_IOCSTATUS_SUCCESS: 1415b0a2fdeeSScott Long cfgp = req->req_vbuf; 1416b0a2fdeeSScott Long bcopy(&cfgp->Header, rslt, sizeof(*rslt)); 1417b0a2fdeeSScott Long error = 0; 141829ae59edSMatt Jacob break; 141929ae59edSMatt Jacob case MPI_IOCSTATUS_CONFIG_INVALID_PAGE: 142029ae59edSMatt Jacob mpt_lprt(mpt, MPT_PRT_DEBUG, 142129ae59edSMatt Jacob "Invalid Page Type %d Number %d Addr 0x%0x\n", 142229ae59edSMatt Jacob PageType, PageNumber, PageAddress); 142329ae59edSMatt Jacob error = EINVAL; 142429ae59edSMatt Jacob break; 142529ae59edSMatt Jacob default: 142629ae59edSMatt Jacob mpt_prt(mpt, "mpt_read_cfg_header: Config Info Status %x\n", 142729ae59edSMatt Jacob req->IOCStatus); 142829ae59edSMatt Jacob error = EIO; 142929ae59edSMatt Jacob break; 1430b0a2fdeeSScott Long } 14317104aeefSMatt Jacob mpt_free_request(mpt, req); 1432b0a2fdeeSScott Long return (error); 14337104aeefSMatt Jacob } 14347104aeefSMatt Jacob 14350424fb53SMatt Jacob #define CFG_DATA_OFF 128 14367104aeefSMatt Jacob 1437ce68dae5SMatt Jacob int 1438b0a2fdeeSScott Long mpt_read_cfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress, 1439b0a2fdeeSScott Long CONFIG_PAGE_HEADER *hdr, size_t len, int sleep_ok, 1440b0a2fdeeSScott Long int timeout_ms) 14417104aeefSMatt Jacob { 14427104aeefSMatt Jacob request_t *req; 1443b0a2fdeeSScott Long int error; 14447104aeefSMatt Jacob 1445b0a2fdeeSScott Long req = mpt_get_request(mpt, sleep_ok); 1446b0a2fdeeSScott Long if (req == NULL) { 1447b0a2fdeeSScott Long mpt_prt(mpt, "mpt_read_cfg_page: Get request failed!\n"); 14487104aeefSMatt Jacob return (-1); 14497104aeefSMatt Jacob } 14507104aeefSMatt Jacob 1451b0a2fdeeSScott Long error = mpt_issue_cfg_req(mpt, req, Action, hdr->PageVersion, 1452b0a2fdeeSScott Long hdr->PageLength, hdr->PageNumber, 1453b0a2fdeeSScott Long hdr->PageType & MPI_CONFIG_PAGETYPE_MASK, 1454b0a2fdeeSScott Long PageAddress, req->req_pbuf + CFG_DATA_OFF, 1455b0a2fdeeSScott Long len, sleep_ok, timeout_ms); 1456b0a2fdeeSScott Long if (error != 0) { 1457b0a2fdeeSScott Long mpt_prt(mpt, "read_cfg_page(%d) timed out\n", Action); 14587104aeefSMatt Jacob return (-1); 14597104aeefSMatt Jacob } 1460b0a2fdeeSScott Long 1461b0a2fdeeSScott Long if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1462b0a2fdeeSScott Long mpt_prt(mpt, "mpt_read_cfg_page: Config Info Status %x\n", 1463b0a2fdeeSScott Long req->IOCStatus); 1464b0a2fdeeSScott Long mpt_free_request(mpt, req); 1465b0a2fdeeSScott Long return (-1); 1466b0a2fdeeSScott Long } 14677104aeefSMatt Jacob bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap, 14687104aeefSMatt Jacob BUS_DMASYNC_POSTREAD); 1469b0a2fdeeSScott Long memcpy(hdr, ((uint8_t *)req->req_vbuf)+CFG_DATA_OFF, len); 14707104aeefSMatt Jacob mpt_free_request(mpt, req); 14717104aeefSMatt Jacob return (0); 14727104aeefSMatt Jacob } 14737104aeefSMatt Jacob 1474ce68dae5SMatt Jacob int 1475b0a2fdeeSScott Long mpt_write_cfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress, 1476b0a2fdeeSScott Long CONFIG_PAGE_HEADER *hdr, size_t len, int sleep_ok, 1477b0a2fdeeSScott Long int timeout_ms) 14787104aeefSMatt Jacob { 14797104aeefSMatt Jacob request_t *req; 1480b0a2fdeeSScott Long u_int hdr_attr; 1481b0a2fdeeSScott Long int error; 14827104aeefSMatt Jacob 14837104aeefSMatt Jacob hdr_attr = hdr->PageType & MPI_CONFIG_PAGEATTR_MASK; 14847104aeefSMatt Jacob if (hdr_attr != MPI_CONFIG_PAGEATTR_CHANGEABLE && 14857104aeefSMatt Jacob hdr_attr != MPI_CONFIG_PAGEATTR_PERSISTENT) { 1486b0a2fdeeSScott Long mpt_prt(mpt, "page type 0x%x not changeable\n", 14877104aeefSMatt Jacob hdr->PageType & MPI_CONFIG_PAGETYPE_MASK); 14887104aeefSMatt Jacob return (-1); 14897104aeefSMatt Jacob } 1490b0a2fdeeSScott Long hdr->PageType &= MPI_CONFIG_PAGETYPE_MASK, 14917104aeefSMatt Jacob 1492b0a2fdeeSScott Long req = mpt_get_request(mpt, sleep_ok); 1493b0a2fdeeSScott Long if (req == NULL) 1494b0a2fdeeSScott Long return (-1); 14957104aeefSMatt Jacob 1496b0a2fdeeSScott Long memcpy(((caddr_t)req->req_vbuf)+CFG_DATA_OFF, hdr, len); 1497301472c2SMatt Jacob /* Restore stripped out attributes */ 1498301472c2SMatt Jacob hdr->PageType |= hdr_attr; 14997104aeefSMatt Jacob 1500b0a2fdeeSScott Long error = mpt_issue_cfg_req(mpt, req, Action, hdr->PageVersion, 1501b0a2fdeeSScott Long hdr->PageLength, hdr->PageNumber, 1502b0a2fdeeSScott Long hdr->PageType & MPI_CONFIG_PAGETYPE_MASK, 1503b0a2fdeeSScott Long PageAddress, req->req_pbuf + CFG_DATA_OFF, 1504b0a2fdeeSScott Long len, sleep_ok, timeout_ms); 1505b0a2fdeeSScott Long if (error != 0) { 1506b0a2fdeeSScott Long mpt_prt(mpt, "mpt_write_cfg_page timed out\n"); 15077104aeefSMatt Jacob return (-1); 15087104aeefSMatt Jacob } 15097104aeefSMatt Jacob 1510b0a2fdeeSScott Long if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) { 1511b0a2fdeeSScott Long mpt_prt(mpt, "mpt_write_cfg_page: Config Info Status %x\n", 1512b0a2fdeeSScott Long req->IOCStatus); 15137104aeefSMatt Jacob mpt_free_request(mpt, req); 1514b0a2fdeeSScott Long return (-1); 1515b0a2fdeeSScott Long } 1516b0a2fdeeSScott Long mpt_free_request(mpt, req); 1517b0a2fdeeSScott Long return (0); 1518b0a2fdeeSScott Long } 1519b0a2fdeeSScott Long 1520b0a2fdeeSScott Long /* 1521b0a2fdeeSScott Long * Read IOC configuration information 1522b0a2fdeeSScott Long */ 1523b0a2fdeeSScott Long static int 1524b0a2fdeeSScott Long mpt_read_config_info_ioc(struct mpt_softc *mpt) 1525b0a2fdeeSScott Long { 1526b0a2fdeeSScott Long CONFIG_PAGE_HEADER hdr; 1527b0a2fdeeSScott Long struct mpt_raid_volume *mpt_raid; 1528b0a2fdeeSScott Long int rv; 1529b0a2fdeeSScott Long int i; 1530b0a2fdeeSScott Long size_t len; 1531b0a2fdeeSScott Long 1532b0a2fdeeSScott Long rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_IOC, 1533b0a2fdeeSScott Long /*PageNumber*/2, /*PageAddress*/0, &hdr, 1534b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 153529ae59edSMatt Jacob /* 153629ae59edSMatt Jacob * If it's an invalid page, so what? Not a supported function.... 153729ae59edSMatt Jacob */ 153829ae59edSMatt Jacob if (rv == EINVAL) 153929ae59edSMatt Jacob return (0); 1540b0a2fdeeSScott Long if (rv) 154129ae59edSMatt Jacob return (rv); 1542b0a2fdeeSScott Long 1543b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC Page 2 Header: ver %x, len %x, " 1544b0a2fdeeSScott Long "num %x, type %x\n", hdr.PageVersion, 1545b0a2fdeeSScott Long hdr.PageLength * sizeof(uint32_t), 1546b0a2fdeeSScott Long hdr.PageNumber, hdr.PageType); 1547b0a2fdeeSScott Long 1548b0a2fdeeSScott Long len = hdr.PageLength * sizeof(uint32_t); 1549a3699bcaSScott Long mpt->ioc_page2 = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 1550b0a2fdeeSScott Long if (mpt->ioc_page2 == NULL) 1551b0a2fdeeSScott Long return (ENOMEM); 1552b0a2fdeeSScott Long memcpy(&mpt->ioc_page2->Header, &hdr, sizeof(hdr)); 1553b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0, 1554b0a2fdeeSScott Long &mpt->ioc_page2->Header, len, 1555b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1556b0a2fdeeSScott Long if (rv) { 1557b0a2fdeeSScott Long mpt_prt(mpt, "failed to read IOC Page 2\n"); 1558b0a2fdeeSScott Long } else if (mpt->ioc_page2->CapabilitiesFlags != 0) { 1559b0a2fdeeSScott Long uint32_t mask; 1560b0a2fdeeSScott Long 1561b0a2fdeeSScott Long mpt_prt(mpt, "Capabilities: ("); 1562b0a2fdeeSScott Long for (mask = 1; mask != 0; mask <<= 1) { 1563b0a2fdeeSScott Long if ((mpt->ioc_page2->CapabilitiesFlags & mask) == 0) 1564b0a2fdeeSScott Long continue; 1565b0a2fdeeSScott Long 1566b0a2fdeeSScott Long switch (mask) { 1567b0a2fdeeSScott Long case MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT: 1568b0a2fdeeSScott Long mpt_prtc(mpt, " RAID-0"); 1569b0a2fdeeSScott Long break; 1570b0a2fdeeSScott Long case MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT: 1571b0a2fdeeSScott Long mpt_prtc(mpt, " RAID-1E"); 1572b0a2fdeeSScott Long break; 1573b0a2fdeeSScott Long case MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT: 1574b0a2fdeeSScott Long mpt_prtc(mpt, " RAID-1"); 1575b0a2fdeeSScott Long break; 1576b0a2fdeeSScott Long case MPI_IOCPAGE2_CAP_FLAGS_SES_SUPPORT: 1577b0a2fdeeSScott Long mpt_prtc(mpt, " SES"); 1578b0a2fdeeSScott Long break; 1579b0a2fdeeSScott Long case MPI_IOCPAGE2_CAP_FLAGS_SAFTE_SUPPORT: 1580b0a2fdeeSScott Long mpt_prtc(mpt, " SAFTE"); 1581b0a2fdeeSScott Long break; 1582b0a2fdeeSScott Long case MPI_IOCPAGE2_CAP_FLAGS_CROSS_CHANNEL_SUPPORT: 1583b0a2fdeeSScott Long mpt_prtc(mpt, " Multi-Channel-Arrays"); 1584b0a2fdeeSScott Long default: 1585b0a2fdeeSScott Long break; 1586b0a2fdeeSScott Long } 1587b0a2fdeeSScott Long } 1588b0a2fdeeSScott Long mpt_prtc(mpt, " )\n"); 1589b0a2fdeeSScott Long if ((mpt->ioc_page2->CapabilitiesFlags 1590b0a2fdeeSScott Long & (MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT 1591b0a2fdeeSScott Long | MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT 1592b0a2fdeeSScott Long | MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT)) != 0) { 1593b0a2fdeeSScott Long mpt_prt(mpt, "%d Active Volume%s(%d Max)\n", 1594b0a2fdeeSScott Long mpt->ioc_page2->NumActiveVolumes, 1595b0a2fdeeSScott Long mpt->ioc_page2->NumActiveVolumes != 1 1596b0a2fdeeSScott Long ? "s " : " ", 1597b0a2fdeeSScott Long mpt->ioc_page2->MaxVolumes); 1598b0a2fdeeSScott Long mpt_prt(mpt, "%d Hidden Drive Member%s(%d Max)\n", 1599b0a2fdeeSScott Long mpt->ioc_page2->NumActivePhysDisks, 1600b0a2fdeeSScott Long mpt->ioc_page2->NumActivePhysDisks != 1 1601b0a2fdeeSScott Long ? "s " : " ", 1602b0a2fdeeSScott Long mpt->ioc_page2->MaxPhysDisks); 1603b0a2fdeeSScott Long } 1604b0a2fdeeSScott Long } 1605b0a2fdeeSScott Long 1606b0a2fdeeSScott Long len = mpt->ioc_page2->MaxVolumes * sizeof(struct mpt_raid_volume); 1607b0a2fdeeSScott Long mpt->raid_volumes = malloc(len, M_DEVBUF, M_NOWAIT); 1608b0a2fdeeSScott Long if (mpt->raid_volumes == NULL) { 1609b0a2fdeeSScott Long mpt_prt(mpt, "Could not allocate RAID volume data\n"); 1610b0a2fdeeSScott Long } else { 1611b0a2fdeeSScott Long memset(mpt->raid_volumes, 0, len); 1612b0a2fdeeSScott Long } 1613b0a2fdeeSScott Long 1614b0a2fdeeSScott Long /* 1615b0a2fdeeSScott Long * Copy critical data out of ioc_page2 so that we can 1616b0a2fdeeSScott Long * safely refresh the page without windows of unreliable 1617b0a2fdeeSScott Long * data. 1618b0a2fdeeSScott Long */ 1619b0a2fdeeSScott Long mpt->raid_max_volumes = mpt->ioc_page2->MaxVolumes; 1620b0a2fdeeSScott Long 1621b0a2fdeeSScott Long len = sizeof(*mpt->raid_volumes->config_page) 1622b0a2fdeeSScott Long + (sizeof(RAID_VOL0_PHYS_DISK)*(mpt->ioc_page2->MaxPhysDisks - 1)); 1623b0a2fdeeSScott Long for (i = 0; i < mpt->ioc_page2->MaxVolumes; i++) { 1624b0a2fdeeSScott Long mpt_raid = &mpt->raid_volumes[i]; 1625b0a2fdeeSScott Long mpt_raid->config_page = malloc(len, M_DEVBUF, M_NOWAIT); 1626b0a2fdeeSScott Long if (mpt_raid->config_page == NULL) { 1627b0a2fdeeSScott Long mpt_prt(mpt, "Could not allocate RAID page data\n"); 1628b0a2fdeeSScott Long break; 1629b0a2fdeeSScott Long } 1630b0a2fdeeSScott Long memset(mpt_raid->config_page, 0, len); 1631b0a2fdeeSScott Long } 1632b0a2fdeeSScott Long mpt->raid_page0_len = len; 1633b0a2fdeeSScott Long 1634b0a2fdeeSScott Long len = mpt->ioc_page2->MaxPhysDisks * sizeof(struct mpt_raid_disk); 1635b0a2fdeeSScott Long mpt->raid_disks = malloc(len, M_DEVBUF, M_NOWAIT); 1636b0a2fdeeSScott Long if (mpt->raid_disks == NULL) { 1637b0a2fdeeSScott Long mpt_prt(mpt, "Could not allocate RAID disk data\n"); 1638b0a2fdeeSScott Long } else { 1639b0a2fdeeSScott Long memset(mpt->raid_disks, 0, len); 1640b0a2fdeeSScott Long } 1641b0a2fdeeSScott Long 1642b0a2fdeeSScott Long mpt->raid_max_disks = mpt->ioc_page2->MaxPhysDisks; 1643b0a2fdeeSScott Long 1644b0a2fdeeSScott Long rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_IOC, 1645b0a2fdeeSScott Long /*PageNumber*/3, /*PageAddress*/0, &hdr, 1646b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1647b0a2fdeeSScott Long if (rv) 1648b0a2fdeeSScott Long return (EIO); 1649b0a2fdeeSScott Long 1650b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC Page 3 Header: %x %x %x %x\n", 1651b0a2fdeeSScott Long hdr.PageVersion, hdr.PageLength, hdr.PageNumber, hdr.PageType); 1652b0a2fdeeSScott Long 1653b0a2fdeeSScott Long if (mpt->ioc_page3 != NULL) 1654b0a2fdeeSScott Long free(mpt->ioc_page3, M_DEVBUF); 1655b0a2fdeeSScott Long len = hdr.PageLength * sizeof(uint32_t); 1656a3699bcaSScott Long mpt->ioc_page3 = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO); 1657b0a2fdeeSScott Long if (mpt->ioc_page3 == NULL) 1658b0a2fdeeSScott Long return (-1); 1659b0a2fdeeSScott Long memcpy(&mpt->ioc_page3->Header, &hdr, sizeof(hdr)); 1660b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0, 1661b0a2fdeeSScott Long &mpt->ioc_page3->Header, len, 1662b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1663b0a2fdeeSScott Long if (rv) { 1664b0a2fdeeSScott Long mpt_prt(mpt, "failed to read IOC Page 3\n"); 1665b0a2fdeeSScott Long } 1666b0a2fdeeSScott Long 1667b0a2fdeeSScott Long mpt_raid_wakeup(mpt); 1668b0a2fdeeSScott Long 16697104aeefSMatt Jacob return (0); 16707104aeefSMatt Jacob } 16717104aeefSMatt Jacob 16727104aeefSMatt Jacob /* 16737104aeefSMatt Jacob * Read SCSI configuration information 16747104aeefSMatt Jacob */ 16757104aeefSMatt Jacob static int 1676b0a2fdeeSScott Long mpt_read_config_info_spi(struct mpt_softc *mpt) 16777104aeefSMatt Jacob { 16787104aeefSMatt Jacob int rv, i; 16797104aeefSMatt Jacob 16807104aeefSMatt Jacob rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_PORT, 0, 1681b0a2fdeeSScott Long 0, &mpt->mpt_port_page0.Header, 1682b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1683b0a2fdeeSScott Long if (rv) 16847104aeefSMatt Jacob return (-1); 1685b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1686b0a2fdeeSScott Long "SPI Port Page 0 Header: %x %x %x %x\n", 16877104aeefSMatt Jacob mpt->mpt_port_page0.Header.PageVersion, 16887104aeefSMatt Jacob mpt->mpt_port_page0.Header.PageLength, 16897104aeefSMatt Jacob mpt->mpt_port_page0.Header.PageNumber, 16907104aeefSMatt Jacob mpt->mpt_port_page0.Header.PageType); 16917104aeefSMatt Jacob 16927104aeefSMatt Jacob rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_PORT, 1, 1693b0a2fdeeSScott Long 0, &mpt->mpt_port_page1.Header, 1694b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1695b0a2fdeeSScott Long if (rv) 16967104aeefSMatt Jacob return (-1); 1697b0a2fdeeSScott Long 1698b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "SPI Port Page 1 Header: %x %x %x %x\n", 16997104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageVersion, 17007104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageLength, 17017104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageNumber, 17027104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageType); 17037104aeefSMatt Jacob 17047104aeefSMatt Jacob rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_PORT, 2, 1705b0a2fdeeSScott Long /*PageAddress*/0, &mpt->mpt_port_page2.Header, 1706b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1707b0a2fdeeSScott Long if (rv) 17087104aeefSMatt Jacob return (-1); 17097104aeefSMatt Jacob 1710b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1711b0a2fdeeSScott Long "SPI Port Page 2 Header: %x %x %x %x\n", 17127104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageVersion, 17137104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageLength, 17147104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageNumber, 17157104aeefSMatt Jacob mpt->mpt_port_page1.Header.PageType); 17167104aeefSMatt Jacob 17177104aeefSMatt Jacob for (i = 0; i < 16; i++) { 17187104aeefSMatt Jacob rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_DEVICE, 1719b0a2fdeeSScott Long 0, i, &mpt->mpt_dev_page0[i].Header, 1720b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1721b0a2fdeeSScott Long if (rv) 17227104aeefSMatt Jacob return (-1); 1723b0a2fdeeSScott Long 1724b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1725b0a2fdeeSScott Long "SPI Target %d Device Page 0 Header: %x %x %x %x\n", 17267104aeefSMatt Jacob i, mpt->mpt_dev_page0[i].Header.PageVersion, 17277104aeefSMatt Jacob mpt->mpt_dev_page0[i].Header.PageLength, 17287104aeefSMatt Jacob mpt->mpt_dev_page0[i].Header.PageNumber, 17297104aeefSMatt Jacob mpt->mpt_dev_page0[i].Header.PageType); 17307104aeefSMatt Jacob 17317104aeefSMatt Jacob rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_DEVICE, 1732b0a2fdeeSScott Long 1, i, &mpt->mpt_dev_page1[i].Header, 1733b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 1734b0a2fdeeSScott Long if (rv) 17357104aeefSMatt Jacob return (-1); 1736b0a2fdeeSScott Long 1737b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1738b0a2fdeeSScott Long "SPI Target %d Device Page 1 Header: %x %x %x %x\n", 17397104aeefSMatt Jacob i, mpt->mpt_dev_page1[i].Header.PageVersion, 17407104aeefSMatt Jacob mpt->mpt_dev_page1[i].Header.PageLength, 17417104aeefSMatt Jacob mpt->mpt_dev_page1[i].Header.PageNumber, 17427104aeefSMatt Jacob mpt->mpt_dev_page1[i].Header.PageType); 17437104aeefSMatt Jacob } 17447104aeefSMatt Jacob 17457104aeefSMatt Jacob /* 17467104aeefSMatt Jacob * At this point, we don't *have* to fail. As long as we have 17477104aeefSMatt Jacob * valid config header information, we can (barely) lurch 17487104aeefSMatt Jacob * along. 17497104aeefSMatt Jacob */ 17507104aeefSMatt Jacob 1751b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0, 1752b0a2fdeeSScott Long &mpt->mpt_port_page0.Header, 1753b0a2fdeeSScott Long sizeof(mpt->mpt_port_page0), 1754b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 17557104aeefSMatt Jacob if (rv) { 1756b0a2fdeeSScott Long mpt_prt(mpt, "failed to read SPI Port Page 0\n"); 1757b0a2fdeeSScott Long } else { 1758b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1759b0a2fdeeSScott Long "SPI Port Page 0: Capabilities %x PhysicalInterface %x\n", 17607104aeefSMatt Jacob mpt->mpt_port_page0.Capabilities, 17617104aeefSMatt Jacob mpt->mpt_port_page0.PhysicalInterface); 17627104aeefSMatt Jacob } 17637104aeefSMatt Jacob 1764b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0, 1765b0a2fdeeSScott Long &mpt->mpt_port_page1.Header, 1766b0a2fdeeSScott Long sizeof(mpt->mpt_port_page1), 1767b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 17687104aeefSMatt Jacob if (rv) { 1769b0a2fdeeSScott Long mpt_prt(mpt, "failed to read SPI Port Page 1\n"); 1770b0a2fdeeSScott Long } else { 1771b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1772b0a2fdeeSScott Long "SPI Port Page 1: Configuration %x OnBusTimerValue %x\n", 17737104aeefSMatt Jacob mpt->mpt_port_page1.Configuration, 17747104aeefSMatt Jacob mpt->mpt_port_page1.OnBusTimerValue); 17757104aeefSMatt Jacob } 17767104aeefSMatt Jacob 1777b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0, 1778b0a2fdeeSScott Long &mpt->mpt_port_page2.Header, 1779b0a2fdeeSScott Long sizeof(mpt->mpt_port_page2), 1780b0a2fdeeSScott Long /*sleep_ok*/FALSE, /*timeout_ms*/5000); 17817104aeefSMatt Jacob if (rv) { 1782b0a2fdeeSScott Long mpt_prt(mpt, "failed to read SPI Port Page 2\n"); 1783b0a2fdeeSScott Long } else { 1784b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1785b0a2fdeeSScott Long "SPI Port Page 2: Flags %x Settings %x\n", 17867104aeefSMatt Jacob mpt->mpt_port_page2.PortFlags, 17877104aeefSMatt Jacob mpt->mpt_port_page2.PortSettings); 17887104aeefSMatt Jacob for (i = 0; i < 16; i++) { 1789b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1790b0a2fdeeSScott Long "SPI Port Page 2 Tgt %d: timo %x SF %x Flags %x\n", 17917104aeefSMatt Jacob i, mpt->mpt_port_page2.DeviceSettings[i].Timeout, 17927104aeefSMatt Jacob mpt->mpt_port_page2.DeviceSettings[i].SyncFactor, 17937104aeefSMatt Jacob mpt->mpt_port_page2.DeviceSettings[i].DeviceFlags); 17947104aeefSMatt Jacob } 17957104aeefSMatt Jacob } 17967104aeefSMatt Jacob 17977104aeefSMatt Jacob for (i = 0; i < 16; i++) { 1798b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/i, 1799b0a2fdeeSScott Long &mpt->mpt_dev_page0[i].Header, 1800b0a2fdeeSScott Long sizeof(*mpt->mpt_dev_page0), 1801b0a2fdeeSScott Long /*sleep_ok*/FALSE, 1802b0a2fdeeSScott Long /*timeout_ms*/5000); 18037104aeefSMatt Jacob if (rv) { 1804b0a2fdeeSScott Long mpt_prt(mpt, 1805b0a2fdeeSScott Long "cannot read SPI Tgt %d Device Page 0\n", i); 18067104aeefSMatt Jacob continue; 18077104aeefSMatt Jacob } 1808b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1809301472c2SMatt Jacob "SPI Tgt %d Page 0: NParms %x Information %x", 18107104aeefSMatt Jacob i, mpt->mpt_dev_page0[i].NegotiatedParameters, 18117104aeefSMatt Jacob mpt->mpt_dev_page0[i].Information); 1812b0a2fdeeSScott Long 1813b0a2fdeeSScott Long rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/i, 1814b0a2fdeeSScott Long &mpt->mpt_dev_page1[i].Header, 1815b0a2fdeeSScott Long sizeof(*mpt->mpt_dev_page1), 1816b0a2fdeeSScott Long /*sleep_ok*/FALSE, 1817b0a2fdeeSScott Long /*timeout_ms*/5000); 18187104aeefSMatt Jacob if (rv) { 1819b0a2fdeeSScott Long mpt_prt(mpt, 1820b0a2fdeeSScott Long "cannot read SPI Tgt %d Device Page 1\n", i); 18217104aeefSMatt Jacob continue; 18227104aeefSMatt Jacob } 1823b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1824b0a2fdeeSScott Long "SPI Tgt %d Page 1: RParms %x Configuration %x\n", 18257104aeefSMatt Jacob i, mpt->mpt_dev_page1[i].RequestedParameters, 18267104aeefSMatt Jacob mpt->mpt_dev_page1[i].Configuration); 18277104aeefSMatt Jacob } 18287104aeefSMatt Jacob return (0); 18297104aeefSMatt Jacob } 18307104aeefSMatt Jacob 18317104aeefSMatt Jacob /* 18327104aeefSMatt Jacob * Validate SPI configuration information. 18337104aeefSMatt Jacob * 18347104aeefSMatt Jacob * In particular, validate SPI Port Page 1. 18357104aeefSMatt Jacob */ 18367104aeefSMatt Jacob static int 1837b0a2fdeeSScott Long mpt_set_initial_config_spi(struct mpt_softc *mpt) 18387104aeefSMatt Jacob { 18397104aeefSMatt Jacob int i, pp1val = ((1 << mpt->mpt_ini_id) << 16) | mpt->mpt_ini_id; 1840b0a2fdeeSScott Long int error; 18417104aeefSMatt Jacob 1842ce68dae5SMatt Jacob mpt->mpt_disc_enable = 0xff; 1843ce68dae5SMatt Jacob mpt->mpt_tag_enable = 0; 1844ce68dae5SMatt Jacob 18457104aeefSMatt Jacob if (mpt->mpt_port_page1.Configuration != pp1val) { 18467fed69eeSMatt Jacob CONFIG_PAGE_SCSI_PORT_1 tmp; 1847b0a2fdeeSScott Long 1848301472c2SMatt Jacob mpt_prt(mpt, 1849b0a2fdeeSScott Long "SPI Port Page 1 Config value bad (%x)- should be %x\n", 18507104aeefSMatt Jacob mpt->mpt_port_page1.Configuration, pp1val); 18517104aeefSMatt Jacob tmp = mpt->mpt_port_page1; 18527104aeefSMatt Jacob tmp.Configuration = pp1val; 1853b0a2fdeeSScott Long error = mpt_write_cur_cfg_page(mpt, /*PageAddress*/0, 1854b0a2fdeeSScott Long &tmp.Header, sizeof(tmp), 1855b0a2fdeeSScott Long /*sleep_ok*/FALSE, 1856b0a2fdeeSScott Long /*timeout_ms*/5000); 1857b0a2fdeeSScott Long if (error) 18587104aeefSMatt Jacob return (-1); 1859b0a2fdeeSScott Long error = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0, 1860b0a2fdeeSScott Long &tmp.Header, sizeof(tmp), 1861b0a2fdeeSScott Long /*sleep_ok*/FALSE, 1862b0a2fdeeSScott Long /*timeout_ms*/5000); 1863b0a2fdeeSScott Long if (error) 18647104aeefSMatt Jacob return (-1); 18657104aeefSMatt Jacob if (tmp.Configuration != pp1val) { 1866301472c2SMatt Jacob mpt_prt(mpt, 1867b0a2fdeeSScott Long "failed to reset SPI Port Page 1 Config value\n"); 18687104aeefSMatt Jacob return (-1); 18697104aeefSMatt Jacob } 18707104aeefSMatt Jacob mpt->mpt_port_page1 = tmp; 18717104aeefSMatt Jacob } 18727104aeefSMatt Jacob 18737104aeefSMatt Jacob for (i = 0; i < 16; i++) { 18747fed69eeSMatt Jacob CONFIG_PAGE_SCSI_DEVICE_1 tmp; 18757104aeefSMatt Jacob tmp = mpt->mpt_dev_page1[i]; 18767104aeefSMatt Jacob tmp.RequestedParameters = 0; 18777104aeefSMatt Jacob tmp.Configuration = 0; 1878b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1879b0a2fdeeSScott Long "Set Tgt %d SPI DevicePage 1 values to %x 0 %x\n", 18807104aeefSMatt Jacob i, tmp.RequestedParameters, tmp.Configuration); 1881b0a2fdeeSScott Long error = mpt_write_cur_cfg_page(mpt, /*PageAddress*/i, 1882b0a2fdeeSScott Long &tmp.Header, sizeof(tmp), 1883b0a2fdeeSScott Long /*sleep_ok*/FALSE, 1884b0a2fdeeSScott Long /*timeout_ms*/5000); 1885b0a2fdeeSScott Long if (error) 18867104aeefSMatt Jacob return (-1); 1887b0a2fdeeSScott Long error = mpt_read_cur_cfg_page(mpt, /*PageAddress*/i, 1888b0a2fdeeSScott Long &tmp.Header, sizeof(tmp), 1889b0a2fdeeSScott Long /*sleep_ok*/FALSE, 1890b0a2fdeeSScott Long /*timeout_ms*/5000); 1891b0a2fdeeSScott Long if (error) 18927104aeefSMatt Jacob return (-1); 18937104aeefSMatt Jacob mpt->mpt_dev_page1[i] = tmp; 1894b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1895b0a2fdeeSScott Long "SPI Tgt %d Page 1: RParm %x Configuration %x\n", i, 18967104aeefSMatt Jacob mpt->mpt_dev_page1[i].RequestedParameters, 18977104aeefSMatt Jacob mpt->mpt_dev_page1[i].Configuration); 18987104aeefSMatt Jacob } 18997104aeefSMatt Jacob return (0); 19007104aeefSMatt Jacob } 19017104aeefSMatt Jacob 19027104aeefSMatt Jacob /* 19037104aeefSMatt Jacob * Enable IOC port 19047104aeefSMatt Jacob */ 19057104aeefSMatt Jacob static int 1906b0a2fdeeSScott Long mpt_send_port_enable(struct mpt_softc *mpt, int port) 19079b631363SMatt Jacob { 19089b631363SMatt Jacob request_t *req; 19099b631363SMatt Jacob MSG_PORT_ENABLE *enable_req; 1910b0a2fdeeSScott Long int error; 19119b631363SMatt Jacob 1912b0a2fdeeSScott Long req = mpt_get_request(mpt, /*sleep_ok*/FALSE); 1913b0a2fdeeSScott Long if (req == NULL) 1914b0a2fdeeSScott Long return (-1); 19159b631363SMatt Jacob 19169b631363SMatt Jacob enable_req = req->req_vbuf; 19179b631363SMatt Jacob bzero(enable_req, sizeof *enable_req); 19189b631363SMatt Jacob 19199b631363SMatt Jacob enable_req->Function = MPI_FUNCTION_PORT_ENABLE; 1920b0a2fdeeSScott Long enable_req->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_CONFIG); 19219b631363SMatt Jacob enable_req->PortNumber = port; 19229b631363SMatt Jacob 19239b631363SMatt Jacob mpt_check_doorbell(mpt); 1924b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "enabling port %d\n", port); 19259b631363SMatt Jacob 1926b0a2fdeeSScott Long mpt_send_cmd(mpt, req); 1927b0a2fdeeSScott Long error = mpt_wait_req(mpt, req, REQ_STATE_DONE, REQ_STATE_DONE, 1928ca8ee708SMatt Jacob /*sleep_ok*/FALSE, 1929ca8ee708SMatt Jacob /*time_ms*/(mpt->is_sas || mpt->is_fc)? 30000 : 3000); 1930b0a2fdeeSScott Long if (error != 0) { 1931444dd2b6SMatt Jacob mpt_prt(mpt, "port enable timed out\n"); 19329b631363SMatt Jacob return (-1); 19339b631363SMatt Jacob } 19349b631363SMatt Jacob mpt_free_request(mpt, req); 19359b631363SMatt Jacob return (0); 19369b631363SMatt Jacob } 19379b631363SMatt Jacob 19389b631363SMatt Jacob /* 19399b631363SMatt Jacob * Enable/Disable asynchronous event reporting. 19409b631363SMatt Jacob * 19419b631363SMatt Jacob * NB: this is the first command we send via shared memory 19429b631363SMatt Jacob * instead of the handshake register. 19439b631363SMatt Jacob */ 19449b631363SMatt Jacob static int 1945b0a2fdeeSScott Long mpt_send_event_request(struct mpt_softc *mpt, int onoff) 19469b631363SMatt Jacob { 19479b631363SMatt Jacob request_t *req; 19489b631363SMatt Jacob MSG_EVENT_NOTIFY *enable_req; 19499b631363SMatt Jacob 1950b0a2fdeeSScott Long req = mpt_get_request(mpt, /*sleep_ok*/FALSE); 19519b631363SMatt Jacob 19529b631363SMatt Jacob enable_req = req->req_vbuf; 19539b631363SMatt Jacob bzero(enable_req, sizeof *enable_req); 19549b631363SMatt Jacob 19559b631363SMatt Jacob enable_req->Function = MPI_FUNCTION_EVENT_NOTIFICATION; 1956b0a2fdeeSScott Long enable_req->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_EVENTS); 19579b631363SMatt Jacob enable_req->Switch = onoff; 19589b631363SMatt Jacob 19599b631363SMatt Jacob mpt_check_doorbell(mpt); 1960b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 1961b0a2fdeeSScott Long "%sabling async events\n", onoff ? "en" : "dis"); 19629b631363SMatt Jacob mpt_send_cmd(mpt, req); 19639b631363SMatt Jacob 19649b631363SMatt Jacob return (0); 19659b631363SMatt Jacob } 19669b631363SMatt Jacob 19679b631363SMatt Jacob /* 19689b631363SMatt Jacob * Un-mask the interupts on the chip. 19699b631363SMatt Jacob */ 19709b631363SMatt Jacob void 1971b0a2fdeeSScott Long mpt_enable_ints(struct mpt_softc *mpt) 19729b631363SMatt Jacob { 19739b631363SMatt Jacob /* Unmask every thing except door bell int */ 19749b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_MASK, MPT_INTR_DB_MASK); 19759b631363SMatt Jacob } 19769b631363SMatt Jacob 19779b631363SMatt Jacob /* 19789b631363SMatt Jacob * Mask the interupts on the chip. 19799b631363SMatt Jacob */ 19809b631363SMatt Jacob void 1981b0a2fdeeSScott Long mpt_disable_ints(struct mpt_softc *mpt) 19829b631363SMatt Jacob { 19839b631363SMatt Jacob /* Mask all interrupts */ 19849b631363SMatt Jacob mpt_write(mpt, MPT_OFFSET_INTR_MASK, 19859b631363SMatt Jacob MPT_INTR_REPLY_MASK | MPT_INTR_DB_MASK); 19869b631363SMatt Jacob } 19879b631363SMatt Jacob 1988b0a2fdeeSScott Long static void 1989b0a2fdeeSScott Long mpt_sysctl_attach(struct mpt_softc *mpt) 19909b631363SMatt Jacob { 1991b0a2fdeeSScott Long struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(mpt->dev); 1992b0a2fdeeSScott Long struct sysctl_oid *tree = device_get_sysctl_tree(mpt->dev); 19939b631363SMatt Jacob 1994b0a2fdeeSScott Long SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1995b0a2fdeeSScott Long "debug", CTLFLAG_RW, &mpt->verbose, 0, 1996b0a2fdeeSScott Long "Debugging/Verbose level"); 19979b631363SMatt Jacob } 19989b631363SMatt Jacob 1999b0a2fdeeSScott Long int 2000b0a2fdeeSScott Long mpt_attach(struct mpt_softc *mpt) 2001b0a2fdeeSScott Long { 2002b0a2fdeeSScott Long int i; 2003b0a2fdeeSScott Long 2004b0a2fdeeSScott Long for (i = 0; i < MPT_MAX_PERSONALITIES; i++) { 2005b0a2fdeeSScott Long struct mpt_personality *pers; 2006b0a2fdeeSScott Long int error; 2007b0a2fdeeSScott Long 2008b0a2fdeeSScott Long pers = mpt_personalities[i]; 2009b0a2fdeeSScott Long if (pers == NULL) 2010b0a2fdeeSScott Long continue; 2011b0a2fdeeSScott Long 2012b0a2fdeeSScott Long if (pers->probe(mpt) == 0) { 2013b0a2fdeeSScott Long error = pers->attach(mpt); 2014b0a2fdeeSScott Long if (error != 0) { 2015b0a2fdeeSScott Long mpt_detach(mpt); 2016b0a2fdeeSScott Long return (error); 2017b0a2fdeeSScott Long } 2018b0a2fdeeSScott Long mpt->mpt_pers_mask |= (0x1 << pers->id); 2019b0a2fdeeSScott Long pers->use_count++; 2020b0a2fdeeSScott Long } 2021b0a2fdeeSScott Long } 2022444dd2b6SMatt Jacob 2023b0a2fdeeSScott Long return (0); 2024b0a2fdeeSScott Long } 2025b0a2fdeeSScott Long 2026b0a2fdeeSScott Long int 2027b0a2fdeeSScott Long mpt_shutdown(struct mpt_softc *mpt) 2028b0a2fdeeSScott Long { 2029b0a2fdeeSScott Long struct mpt_personality *pers; 2030b0a2fdeeSScott Long 2031b0a2fdeeSScott Long MPT_PERS_FOREACH_REVERSE(mpt, pers) 2032b0a2fdeeSScott Long pers->shutdown(mpt); 2033b0a2fdeeSScott Long 2034b0a2fdeeSScott Long mpt_reset(mpt, /*reinit*/FALSE); 2035b0a2fdeeSScott Long return (0); 2036b0a2fdeeSScott Long } 2037b0a2fdeeSScott Long 2038b0a2fdeeSScott Long int 2039b0a2fdeeSScott Long mpt_detach(struct mpt_softc *mpt) 2040b0a2fdeeSScott Long { 2041b0a2fdeeSScott Long struct mpt_personality *pers; 2042b0a2fdeeSScott Long 2043b0a2fdeeSScott Long MPT_PERS_FOREACH_REVERSE(mpt, pers) { 2044b0a2fdeeSScott Long pers->detach(mpt); 2045b0a2fdeeSScott Long mpt->mpt_pers_mask &= ~(0x1 << pers->id); 2046b0a2fdeeSScott Long pers->use_count--; 2047b0a2fdeeSScott Long } 2048b0a2fdeeSScott Long 2049b0a2fdeeSScott Long return (0); 2050b0a2fdeeSScott Long } 2051b0a2fdeeSScott Long 2052b0a2fdeeSScott Long int 2053b0a2fdeeSScott Long mpt_core_load(struct mpt_personality *pers) 2054b0a2fdeeSScott Long { 2055b0a2fdeeSScott Long int i; 2056b0a2fdeeSScott Long 2057b0a2fdeeSScott Long /* 2058b0a2fdeeSScott Long * Setup core handlers and insert the default handler 2059b0a2fdeeSScott Long * into all "empty slots". 2060b0a2fdeeSScott Long */ 2061b0a2fdeeSScott Long for (i = 0; i < MPT_NUM_REPLY_HANDLERS; i++) 2062b0a2fdeeSScott Long mpt_reply_handlers[i] = mpt_default_reply_handler; 2063b0a2fdeeSScott Long 2064b0a2fdeeSScott Long mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_EVENTS)] = 2065b0a2fdeeSScott Long mpt_event_reply_handler; 2066b0a2fdeeSScott Long mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_CONFIG)] = 2067b0a2fdeeSScott Long mpt_config_reply_handler; 2068b0a2fdeeSScott Long mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_HANDSHAKE)] = 2069b0a2fdeeSScott Long mpt_handshake_reply_handler; 2070b0a2fdeeSScott Long 2071b0a2fdeeSScott Long return (0); 20729b631363SMatt Jacob } 20739b631363SMatt Jacob 20749b631363SMatt Jacob /* 2075b0a2fdeeSScott Long * Initialize per-instance driver data and perform 2076b0a2fdeeSScott Long * initial controller configuration. 20779b631363SMatt Jacob */ 2078b0a2fdeeSScott Long int 2079b0a2fdeeSScott Long mpt_core_attach(struct mpt_softc *mpt) 2080b0a2fdeeSScott Long { 2081b0a2fdeeSScott Long int val; 2082b0a2fdeeSScott Long int error; 2083b0a2fdeeSScott Long 2084b0a2fdeeSScott Long LIST_INIT(&mpt->ack_frames); 2085b0a2fdeeSScott Long 2086b0a2fdeeSScott Long /* Put all request buffers on the free list */ 2087b0a2fdeeSScott Long TAILQ_INIT(&mpt->request_pending_list); 2088b0a2fdeeSScott Long TAILQ_INIT(&mpt->request_free_list); 2089b0a2fdeeSScott Long for (val = 0; val < MPT_MAX_REQUESTS(mpt); val++) 2090b0a2fdeeSScott Long mpt_free_request(mpt, &mpt->request_pool[val]); 2091b0a2fdeeSScott Long 2092b0a2fdeeSScott Long mpt_sysctl_attach(mpt); 2093b0a2fdeeSScott Long 2094b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "doorbell req = %s\n", 2095b0a2fdeeSScott Long mpt_ioc_diag(mpt_read(mpt, MPT_OFFSET_DOORBELL))); 2096b0a2fdeeSScott Long 2097b0a2fdeeSScott Long error = mpt_configure_ioc(mpt); 2098b0a2fdeeSScott Long 2099b0a2fdeeSScott Long return (error); 21009b631363SMatt Jacob } 21019b631363SMatt Jacob 2102b0a2fdeeSScott Long void 2103b0a2fdeeSScott Long mpt_core_shutdown(struct mpt_softc *mpt) 2104b0a2fdeeSScott Long { 2105b0a2fdeeSScott Long } 2106b0a2fdeeSScott Long 2107b0a2fdeeSScott Long void 2108b0a2fdeeSScott Long mpt_core_detach(struct mpt_softc *mpt) 2109b0a2fdeeSScott Long { 2110b0a2fdeeSScott Long } 2111b0a2fdeeSScott Long 2112b0a2fdeeSScott Long int 2113b0a2fdeeSScott Long mpt_core_unload(struct mpt_personality *pers) 2114b0a2fdeeSScott Long { 2115b0a2fdeeSScott Long /* Unload is always successfull. */ 2116b0a2fdeeSScott Long return (0); 2117b0a2fdeeSScott Long } 2118b0a2fdeeSScott Long 2119b0a2fdeeSScott Long #define FW_UPLOAD_REQ_SIZE \ 2120b0a2fdeeSScott Long (sizeof(MSG_FW_UPLOAD) - sizeof(SGE_MPI_UNION) \ 2121b0a2fdeeSScott Long + sizeof(FW_UPLOAD_TCSGE) + sizeof(SGE_SIMPLE32)) 2122b0a2fdeeSScott Long 2123b0a2fdeeSScott Long static int 2124b0a2fdeeSScott Long mpt_upload_fw(struct mpt_softc *mpt) 2125b0a2fdeeSScott Long { 2126b0a2fdeeSScott Long uint8_t fw_req_buf[FW_UPLOAD_REQ_SIZE]; 2127b0a2fdeeSScott Long MSG_FW_UPLOAD_REPLY fw_reply; 2128b0a2fdeeSScott Long MSG_FW_UPLOAD *fw_req; 2129b0a2fdeeSScott Long FW_UPLOAD_TCSGE *tsge; 2130b0a2fdeeSScott Long SGE_SIMPLE32 *sge; 2131b0a2fdeeSScott Long uint32_t flags; 2132b0a2fdeeSScott Long int error; 2133b0a2fdeeSScott Long 2134b0a2fdeeSScott Long memset(&fw_req_buf, 0, sizeof(fw_req_buf)); 2135b0a2fdeeSScott Long fw_req = (MSG_FW_UPLOAD *)fw_req_buf; 2136b0a2fdeeSScott Long fw_req->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM; 2137b0a2fdeeSScott Long fw_req->Function = MPI_FUNCTION_FW_UPLOAD; 2138b0a2fdeeSScott Long fw_req->MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE); 2139b0a2fdeeSScott Long tsge = (FW_UPLOAD_TCSGE *)&fw_req->SGL; 2140b0a2fdeeSScott Long tsge->DetailsLength = 12; 2141b0a2fdeeSScott Long tsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT; 2142b0a2fdeeSScott Long tsge->ImageSize = htole32(mpt->fw_image_size); 2143b0a2fdeeSScott Long sge = (SGE_SIMPLE32 *)(tsge + 1); 2144b0a2fdeeSScott Long flags = (MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER 2145b0a2fdeeSScott Long | MPI_SGE_FLAGS_END_OF_LIST | MPI_SGE_FLAGS_SIMPLE_ELEMENT 2146b0a2fdeeSScott Long | MPI_SGE_FLAGS_32_BIT_ADDRESSING | MPI_SGE_FLAGS_IOC_TO_HOST); 2147b0a2fdeeSScott Long flags <<= MPI_SGE_FLAGS_SHIFT; 2148b0a2fdeeSScott Long sge->FlagsLength = htole32(flags | mpt->fw_image_size); 2149b0a2fdeeSScott Long sge->Address = htole32(mpt->fw_phys); 2150b0a2fdeeSScott Long error = mpt_send_handshake_cmd(mpt, sizeof(fw_req_buf), &fw_req_buf); 2151b0a2fdeeSScott Long if (error) 2152b0a2fdeeSScott Long return(error); 2153b0a2fdeeSScott Long error = mpt_recv_handshake_reply(mpt, sizeof(fw_reply), &fw_reply); 2154b0a2fdeeSScott Long return (error); 2155b0a2fdeeSScott Long } 2156b0a2fdeeSScott Long 2157b0a2fdeeSScott Long static void 2158b0a2fdeeSScott Long mpt_diag_outsl(struct mpt_softc *mpt, uint32_t addr, 2159b0a2fdeeSScott Long uint32_t *data, bus_size_t len) 2160b0a2fdeeSScott Long { 2161b0a2fdeeSScott Long uint32_t *data_end; 2162b0a2fdeeSScott Long 2163b0a2fdeeSScott Long data_end = data + (roundup2(len, sizeof(uint32_t)) / 4); 2164444dd2b6SMatt Jacob pci_enable_io(mpt->dev, SYS_RES_IOPORT); 2165b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, addr); 2166b0a2fdeeSScott Long while (data != data_end) { 2167b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, *data); 2168b0a2fdeeSScott Long data++; 2169b0a2fdeeSScott Long } 2170444dd2b6SMatt Jacob pci_disable_io(mpt->dev, SYS_RES_IOPORT); 2171b0a2fdeeSScott Long } 2172b0a2fdeeSScott Long 2173b0a2fdeeSScott Long static int 2174b0a2fdeeSScott Long mpt_download_fw(struct mpt_softc *mpt) 2175b0a2fdeeSScott Long { 2176b0a2fdeeSScott Long MpiFwHeader_t *fw_hdr; 2177b0a2fdeeSScott Long int error; 2178b0a2fdeeSScott Long uint32_t ext_offset; 2179b0a2fdeeSScott Long uint32_t data; 2180b0a2fdeeSScott Long 2181b0a2fdeeSScott Long mpt_prt(mpt, "Downloading Firmware - Image Size %d\n", 2182b0a2fdeeSScott Long mpt->fw_image_size); 2183b0a2fdeeSScott Long 2184b0a2fdeeSScott Long error = mpt_enable_diag_mode(mpt); 2185b0a2fdeeSScott Long if (error != 0) { 2186b0a2fdeeSScott Long mpt_prt(mpt, "Could not enter diagnostic mode!\n"); 2187b0a2fdeeSScott Long return (EIO); 2188b0a2fdeeSScott Long } 2189b0a2fdeeSScott Long 2190b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, 2191b0a2fdeeSScott Long MPI_DIAG_RW_ENABLE|MPI_DIAG_DISABLE_ARM); 2192b0a2fdeeSScott Long 2193b0a2fdeeSScott Long fw_hdr = (MpiFwHeader_t *)mpt->fw_image; 2194b0a2fdeeSScott Long mpt_diag_outsl(mpt, fw_hdr->LoadStartAddress, (uint32_t*)fw_hdr, 2195b0a2fdeeSScott Long fw_hdr->ImageSize); 2196b0a2fdeeSScott Long 2197b0a2fdeeSScott Long ext_offset = fw_hdr->NextImageHeaderOffset; 2198b0a2fdeeSScott Long while (ext_offset != 0) { 2199b0a2fdeeSScott Long MpiExtImageHeader_t *ext; 2200b0a2fdeeSScott Long 2201b0a2fdeeSScott Long ext = (MpiExtImageHeader_t *)((uintptr_t)fw_hdr + ext_offset); 2202b0a2fdeeSScott Long ext_offset = ext->NextImageHeaderOffset; 2203b0a2fdeeSScott Long 2204b0a2fdeeSScott Long mpt_diag_outsl(mpt, ext->LoadStartAddress, (uint32_t*)ext, 2205b0a2fdeeSScott Long ext->ImageSize); 2206b0a2fdeeSScott Long } 2207b0a2fdeeSScott Long 2208444dd2b6SMatt Jacob pci_enable_io(mpt->dev, SYS_RES_IOPORT); 2209b0a2fdeeSScott Long /* Setup the address to jump to on reset. */ 2210b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, fw_hdr->IopResetRegAddr); 2211b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, fw_hdr->IopResetVectorValue); 2212b0a2fdeeSScott Long 2213b0a2fdeeSScott Long /* 2214b0a2fdeeSScott Long * The controller sets the "flash bad" status after attempting 2215b0a2fdeeSScott Long * to auto-boot from flash. Clear the status so that the controller 2216b0a2fdeeSScott Long * will continue the boot process with our newly installed firmware. 2217b0a2fdeeSScott Long */ 2218b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, MPT_DIAG_MEM_CFG_BASE); 2219b0a2fdeeSScott Long data = mpt_pio_read(mpt, MPT_OFFSET_DIAG_DATA) | MPT_DIAG_MEM_CFG_BADFL; 2220b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, MPT_DIAG_MEM_CFG_BASE); 2221b0a2fdeeSScott Long mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, data); 2222b0a2fdeeSScott Long 2223444dd2b6SMatt Jacob pci_disable_io(mpt->dev, SYS_RES_IOPORT); 2224444dd2b6SMatt Jacob 2225b0a2fdeeSScott Long /* 2226b0a2fdeeSScott Long * Re-enable the processor and clear the boot halt flag. 2227b0a2fdeeSScott Long */ 2228b0a2fdeeSScott Long data = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC); 2229b0a2fdeeSScott Long data &= ~(MPI_DIAG_PREVENT_IOC_BOOT|MPI_DIAG_DISABLE_ARM); 2230b0a2fdeeSScott Long mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, data); 2231b0a2fdeeSScott Long 2232b0a2fdeeSScott Long mpt_disable_diag_mode(mpt); 2233b0a2fdeeSScott Long return (0); 2234b0a2fdeeSScott Long } 2235b0a2fdeeSScott Long 2236b0a2fdeeSScott Long /* 2237b0a2fdeeSScott Long * Allocate/Initialize data structures for the controller. Called 2238b0a2fdeeSScott Long * once at instance startup. 2239b0a2fdeeSScott Long */ 2240b0a2fdeeSScott Long static int 2241b0a2fdeeSScott Long mpt_configure_ioc(struct mpt_softc *mpt) 2242b0a2fdeeSScott Long { 2243b0a2fdeeSScott Long MSG_PORT_FACTS_REPLY pfp; 2244b0a2fdeeSScott Long MSG_IOC_FACTS_REPLY facts; 2245b0a2fdeeSScott Long int try; 2246b0a2fdeeSScott Long int needreset; 2247444dd2b6SMatt Jacob uint32_t max_chain_depth; 2248b0a2fdeeSScott Long 2249b0a2fdeeSScott Long needreset = 0; 22509b631363SMatt Jacob for (try = 0; try < MPT_MAX_TRYS; try++) { 2251b0a2fdeeSScott Long 22529b631363SMatt Jacob /* 22539b631363SMatt Jacob * No need to reset if the IOC is already in the READY state. 22549b631363SMatt Jacob * 22559b631363SMatt Jacob * Force reset if initialization failed previously. 22569b631363SMatt Jacob * Note that a hard_reset of the second channel of a '929 22579b631363SMatt Jacob * will stop operation of the first channel. Hopefully, if the 22589b631363SMatt Jacob * first channel is ok, the second will not require a hard 22599b631363SMatt Jacob * reset. 22609b631363SMatt Jacob */ 2261b0a2fdeeSScott Long if (needreset || (mpt_rd_db(mpt) & MPT_DB_STATE_MASK) != 22629b631363SMatt Jacob MPT_DB_STATE_READY) { 2263b0a2fdeeSScott Long if (mpt_reset(mpt, /*reinit*/FALSE) != MPT_OK) 22649b631363SMatt Jacob continue; 22659b631363SMatt Jacob } 2266b0a2fdeeSScott Long needreset = 0; 22679b631363SMatt Jacob 22689b631363SMatt Jacob if (mpt_get_iocfacts(mpt, &facts) != MPT_OK) { 2269b0a2fdeeSScott Long mpt_prt(mpt, "mpt_get_iocfacts failed\n"); 2270b0a2fdeeSScott Long needreset = 1; 22719b631363SMatt Jacob continue; 22727104aeefSMatt Jacob } 22737104aeefSMatt Jacob 2274b0a2fdeeSScott Long mpt->mpt_global_credits = le16toh(facts.GlobalCredits); 2275b0a2fdeeSScott Long mpt->request_frame_size = le16toh(facts.RequestFrameSize); 2276444dd2b6SMatt Jacob mpt->ioc_facts_flags = facts.Flags; 2277b0a2fdeeSScott Long mpt_prt(mpt, "MPI Version=%d.%d.%d.%d\n", 2278b0a2fdeeSScott Long le16toh(facts.MsgVersion) >> 8, 2279b0a2fdeeSScott Long le16toh(facts.MsgVersion) & 0xFF, 2280b0a2fdeeSScott Long le16toh(facts.HeaderVersion) >> 8, 2281b0a2fdeeSScott Long le16toh(facts.HeaderVersion) & 0xFF); 2282444dd2b6SMatt Jacob 2283444dd2b6SMatt Jacob /* 2284444dd2b6SMatt Jacob * Now that we know request frame size, we can calculate 2285444dd2b6SMatt Jacob * the actual (reasonable) segment limit for read/write I/O. 2286444dd2b6SMatt Jacob * 2287444dd2b6SMatt Jacob * This limit is constrained by: 2288444dd2b6SMatt Jacob * 2289444dd2b6SMatt Jacob * + The size of each area we allocate per command (and how 2290444dd2b6SMatt Jacob * many chain segments we can fit into it). 2291444dd2b6SMatt Jacob * + The total number of areas we've set up. 2292444dd2b6SMatt Jacob * + The actual chain depth the card will allow. 2293444dd2b6SMatt Jacob * 2294444dd2b6SMatt Jacob * The first area's segment count is limited by the I/O request 2295444dd2b6SMatt Jacob * at the head of it. We cannot allocate realistically more 2296444dd2b6SMatt Jacob * than MPT_MAX_REQUESTS areas. Therefore, to account for both 2297444dd2b6SMatt Jacob * conditions, we'll just start out with MPT_MAX_REQUESTS-2. 2298444dd2b6SMatt Jacob * 2299444dd2b6SMatt Jacob */ 2300444dd2b6SMatt Jacob max_chain_depth = facts.MaxChainDepth; 2301444dd2b6SMatt Jacob 2302444dd2b6SMatt Jacob /* total number of request areas we (can) allocate */ 2303444dd2b6SMatt Jacob mpt->max_seg_cnt = MPT_MAX_REQUESTS(mpt) - 2; 2304444dd2b6SMatt Jacob 2305444dd2b6SMatt Jacob /* converted to the number of chain areas possible */ 2306444dd2b6SMatt Jacob mpt->max_seg_cnt *= MPT_NRFM(mpt); 2307444dd2b6SMatt Jacob 2308444dd2b6SMatt Jacob /* limited by the number of chain areas the card will support */ 2309444dd2b6SMatt Jacob if (mpt->max_seg_cnt > max_chain_depth) { 2310444dd2b6SMatt Jacob mpt_lprt(mpt, MPT_PRT_DEBUG, 2311444dd2b6SMatt Jacob "chain depth limited to %u (from %u)\n", 2312444dd2b6SMatt Jacob max_chain_depth, mpt->max_seg_cnt); 2313444dd2b6SMatt Jacob mpt->max_seg_cnt = max_chain_depth; 2314444dd2b6SMatt Jacob } 2315444dd2b6SMatt Jacob 2316444dd2b6SMatt Jacob /* converted to the number of simple sges in chain segments. */ 2317444dd2b6SMatt Jacob mpt->max_seg_cnt *= (MPT_NSGL(mpt) - 1); 2318444dd2b6SMatt Jacob 2319444dd2b6SMatt Jacob mpt_lprt(mpt, MPT_PRT_DEBUG, 2320444dd2b6SMatt Jacob "Maximum Segment Count: %u\n", mpt->max_seg_cnt); 2321b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 2322b0a2fdeeSScott Long "MsgLength=%u IOCNumber = %d\n", 2323b0a2fdeeSScott Long facts.MsgLength, facts.IOCNumber); 2324b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 2325444dd2b6SMatt Jacob "IOCFACTS: GlobalCredits=%d BlockSize=%u bytes " 2326444dd2b6SMatt Jacob "Request Frame Size %u bytes Max Chain Depth %u\n", 2327444dd2b6SMatt Jacob mpt->mpt_global_credits, facts.BlockSize, 2328444dd2b6SMatt Jacob mpt->request_frame_size << 2, max_chain_depth); 2329b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 2330b0a2fdeeSScott Long "IOCFACTS: Num Ports %d, FWImageSize %d, " 2331b0a2fdeeSScott Long "Flags=%#x\n", facts.NumberOfPorts, 2332b0a2fdeeSScott Long le32toh(facts.FWImageSize), facts.Flags); 2333b0a2fdeeSScott Long 2334444dd2b6SMatt Jacob 2335b0a2fdeeSScott Long if ((facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT) != 0) { 2336b0a2fdeeSScott Long struct mpt_map_info mi; 2337b0a2fdeeSScott Long int error; 2338b0a2fdeeSScott Long 2339b0a2fdeeSScott Long /* 2340b0a2fdeeSScott Long * In some configurations, the IOC's firmware is 2341b0a2fdeeSScott Long * stored in a shared piece of system NVRAM that 2342b0a2fdeeSScott Long * is only accessable via the BIOS. In this 2343b0a2fdeeSScott Long * case, the firmware keeps a copy of firmware in 2344b0a2fdeeSScott Long * RAM until the OS driver retrieves it. Once 2345b0a2fdeeSScott Long * retrieved, we are responsible for re-downloading 2346b0a2fdeeSScott Long * the firmware after any hard-reset. 2347b0a2fdeeSScott Long */ 2348b0a2fdeeSScott Long mpt->fw_image_size = le32toh(facts.FWImageSize); 2349b0a2fdeeSScott Long error = mpt_dma_tag_create(mpt, mpt->parent_dmat, 2350b0a2fdeeSScott Long /*alignment*/1, /*boundary*/0, 2351b0a2fdeeSScott Long /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 2352b0a2fdeeSScott Long /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, 2353b0a2fdeeSScott Long /*filterarg*/NULL, mpt->fw_image_size, 2354b0a2fdeeSScott Long /*nsegments*/1, /*maxsegsz*/mpt->fw_image_size, 2355b0a2fdeeSScott Long /*flags*/0, &mpt->fw_dmat); 2356b0a2fdeeSScott Long if (error != 0) { 2357b0a2fdeeSScott Long mpt_prt(mpt, "cannot create fw dma tag\n"); 2358b0a2fdeeSScott Long return (ENOMEM); 23599b631363SMatt Jacob } 2360b0a2fdeeSScott Long error = bus_dmamem_alloc(mpt->fw_dmat, 2361b0a2fdeeSScott Long (void **)&mpt->fw_image, BUS_DMA_NOWAIT, 2362b0a2fdeeSScott Long &mpt->fw_dmap); 2363b0a2fdeeSScott Long if (error != 0) { 2364b0a2fdeeSScott Long mpt_prt(mpt, "cannot allocate fw mem.\n"); 2365b0a2fdeeSScott Long bus_dma_tag_destroy(mpt->fw_dmat); 2366b0a2fdeeSScott Long return (ENOMEM); 2367b0a2fdeeSScott Long } 2368b0a2fdeeSScott Long mi.mpt = mpt; 2369b0a2fdeeSScott Long mi.error = 0; 2370b0a2fdeeSScott Long bus_dmamap_load(mpt->fw_dmat, mpt->fw_dmap, 2371b0a2fdeeSScott Long mpt->fw_image, mpt->fw_image_size, mpt_map_rquest, 2372b0a2fdeeSScott Long &mi, 0); 2373b0a2fdeeSScott Long mpt->fw_phys = mi.phys; 2374b0a2fdeeSScott Long 2375b0a2fdeeSScott Long error = mpt_upload_fw(mpt); 2376b0a2fdeeSScott Long if (error != 0) { 2377b0a2fdeeSScott Long mpt_prt(mpt, "fw upload failed.\n"); 2378b0a2fdeeSScott Long bus_dmamap_unload(mpt->fw_dmat, mpt->fw_dmap); 2379b0a2fdeeSScott Long bus_dmamem_free(mpt->fw_dmat, mpt->fw_image, 2380b0a2fdeeSScott Long mpt->fw_dmap); 2381b0a2fdeeSScott Long bus_dma_tag_destroy(mpt->fw_dmat); 2382b0a2fdeeSScott Long mpt->fw_image = NULL; 2383b0a2fdeeSScott Long return (EIO); 2384b0a2fdeeSScott Long } 2385b0a2fdeeSScott Long } 23869b631363SMatt Jacob 23877104aeefSMatt Jacob if (mpt_get_portfacts(mpt, &pfp) != MPT_OK) { 2388b0a2fdeeSScott Long mpt_prt(mpt, "mpt_get_portfacts failed\n"); 2389b0a2fdeeSScott Long needreset = 1; 23907104aeefSMatt Jacob continue; 23917104aeefSMatt Jacob } 23927104aeefSMatt Jacob 2393b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, 23947dec90bcSMatt Jacob "PORTFACTS: Type %x PFlags %x IID %d MaxDev %d\n", 23957dec90bcSMatt Jacob pfp.PortType, pfp.ProtocolFlags, pfp.PortSCSIID, 23967dec90bcSMatt Jacob pfp.MaxDevices); 23977104aeefSMatt Jacob 2398b0a2fdeeSScott Long mpt->mpt_port_type = pfp.PortType; 2399b0a2fdeeSScott Long mpt->mpt_proto_flags = pfp.ProtocolFlags; 24007104aeefSMatt Jacob if (pfp.PortType != MPI_PORTFACTS_PORTTYPE_SCSI && 2401444dd2b6SMatt Jacob pfp.PortType != MPI_PORTFACTS_PORTTYPE_SAS && 24027104aeefSMatt Jacob pfp.PortType != MPI_PORTFACTS_PORTTYPE_FC) { 2403b0a2fdeeSScott Long mpt_prt(mpt, "Unsupported Port Type (%x)\n", 24047104aeefSMatt Jacob pfp.PortType); 24057104aeefSMatt Jacob return (ENXIO); 24067104aeefSMatt Jacob } 24077104aeefSMatt Jacob if (!(pfp.ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR)) { 2408b0a2fdeeSScott Long mpt_prt(mpt, "initiator role unsupported\n"); 24097104aeefSMatt Jacob return (ENXIO); 24107104aeefSMatt Jacob } 24117104aeefSMatt Jacob if (pfp.PortType == MPI_PORTFACTS_PORTTYPE_FC) { 24127104aeefSMatt Jacob mpt->is_fc = 1; 2413444dd2b6SMatt Jacob mpt->is_sas = 0; 2414444dd2b6SMatt Jacob } else if (pfp.PortType == MPI_PORTFACTS_PORTTYPE_SAS) { 2415444dd2b6SMatt Jacob mpt->is_fc = 0; 2416444dd2b6SMatt Jacob mpt->is_sas = 1; 24177104aeefSMatt Jacob } else { 24187104aeefSMatt Jacob mpt->is_fc = 0; 2419444dd2b6SMatt Jacob mpt->is_sas = 0; 24207104aeefSMatt Jacob } 24217104aeefSMatt Jacob mpt->mpt_ini_id = pfp.PortSCSIID; 2422444dd2b6SMatt Jacob mpt->mpt_max_devices = pfp.MaxDevices; 24237104aeefSMatt Jacob 2424b0a2fdeeSScott Long if (mpt_enable_ioc(mpt) != 0) { 2425b0a2fdeeSScott Long mpt_prt(mpt, "Unable to initialize IOC\n"); 2426b0a2fdeeSScott Long return (ENXIO); 24277104aeefSMatt Jacob } 24287104aeefSMatt Jacob 2429b0a2fdeeSScott Long /* 2430b0a2fdeeSScott Long * Read and set up initial configuration information 2431b0a2fdeeSScott Long * (IOC and SPI only for now) 2432b0a2fdeeSScott Long * 2433b0a2fdeeSScott Long * XXX Should figure out what "personalities" are 2434b0a2fdeeSScott Long * available and defer all initialization junk to 2435b0a2fdeeSScott Long * them. 2436b0a2fdeeSScott Long */ 2437b0a2fdeeSScott Long mpt_read_config_info_ioc(mpt); 2438b0a2fdeeSScott Long 2439444dd2b6SMatt Jacob if (mpt->is_fc == 0 && mpt->is_sas == 0) { 2440b0a2fdeeSScott Long if (mpt_read_config_info_spi(mpt)) { 2441b0a2fdeeSScott Long return (EIO); 24429b631363SMatt Jacob } 2443b0a2fdeeSScott Long if (mpt_set_initial_config_spi(mpt)) { 2444b0a2fdeeSScott Long return (EIO); 2445b0a2fdeeSScott Long } 2446b0a2fdeeSScott Long } 2447b0a2fdeeSScott Long 2448b0a2fdeeSScott Long /* Everything worked */ 2449b0a2fdeeSScott Long break; 2450b0a2fdeeSScott Long } 2451b0a2fdeeSScott Long 2452b0a2fdeeSScott Long if (try >= MPT_MAX_TRYS) { 2453b0a2fdeeSScott Long mpt_prt(mpt, "failed to initialize IOC"); 2454b0a2fdeeSScott Long return (EIO); 2455b0a2fdeeSScott Long } 2456b0a2fdeeSScott Long 2457b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "enabling interrupts\n"); 2458b0a2fdeeSScott Long 2459b0a2fdeeSScott Long mpt_enable_ints(mpt); 2460b0a2fdeeSScott Long return (0); 2461b0a2fdeeSScott Long } 2462b0a2fdeeSScott Long 2463b0a2fdeeSScott Long static int 2464b0a2fdeeSScott Long mpt_enable_ioc(struct mpt_softc *mpt) 2465b0a2fdeeSScott Long { 2466b0a2fdeeSScott Long uint32_t pptr; 2467b0a2fdeeSScott Long int val; 2468b0a2fdeeSScott Long 2469444dd2b6SMatt Jacob if (mpt_send_ioc_init(mpt, MPI_WHOINIT_HOST_DRIVER) != MPT_OK) { 2470b0a2fdeeSScott Long mpt_prt(mpt, "mpt_send_ioc_init failed\n"); 2471b0a2fdeeSScott Long return (EIO); 2472b0a2fdeeSScott Long } 2473b0a2fdeeSScott Long 2474b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_send_ioc_init ok\n"); 24759b631363SMatt Jacob 24769b631363SMatt Jacob if (mpt_wait_state(mpt, MPT_DB_STATE_RUNNING) != MPT_OK) { 2477b0a2fdeeSScott Long mpt_prt(mpt, "IOC failed to go to run state\n"); 2478b0a2fdeeSScott Long return (ENXIO); 24797104aeefSMatt Jacob } 2480444dd2b6SMatt Jacob mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC now at RUNSTATE\n"); 24819b631363SMatt Jacob 24829b631363SMatt Jacob /* 24839b631363SMatt Jacob * Give it reply buffers 24849b631363SMatt Jacob * 2485b0a2fdeeSScott Long * Do *not* exceed global credits. 24869b631363SMatt Jacob */ 24879b631363SMatt Jacob for (val = 0, pptr = mpt->reply_phys; 24889b631363SMatt Jacob (pptr + MPT_REPLY_SIZE) < (mpt->reply_phys + PAGE_SIZE); 24899b631363SMatt Jacob pptr += MPT_REPLY_SIZE) { 24909b631363SMatt Jacob mpt_free_reply(mpt, pptr); 24919b631363SMatt Jacob if (++val == mpt->mpt_global_credits - 1) 24929b631363SMatt Jacob break; 24939b631363SMatt Jacob } 24949b631363SMatt Jacob 24957104aeefSMatt Jacob /* 24967104aeefSMatt Jacob * Enable asynchronous event reporting 24977104aeefSMatt Jacob */ 24989b631363SMatt Jacob mpt_send_event_request(mpt, 1); 24999b631363SMatt Jacob 25007104aeefSMatt Jacob /* 2501444dd2b6SMatt Jacob * Enable the port 25027104aeefSMatt Jacob */ 25039b631363SMatt Jacob if (mpt_send_port_enable(mpt, 0) != MPT_OK) { 2504b0a2fdeeSScott Long mpt_prt(mpt, "failed to enable port 0\n"); 2505b0a2fdeeSScott Long return (ENXIO); 25067104aeefSMatt Jacob } 2507b0a2fdeeSScott Long mpt_lprt(mpt, MPT_PRT_DEBUG, "enabled port 0\n"); 25089b631363SMatt Jacob 2509444dd2b6SMatt Jacob 251029ae59edSMatt Jacob return (MPT_OK); 25119b631363SMatt Jacob } 2512