1 /* $FreeBSD$ */ 2 /* 3 * Copyright (c) 2000-2001 LSI Logic Corporation. 4 * 5 * 6 * Name: MPI_INIT.H 7 * Title: MPI initiator mode messages and structures 8 * Creation Date: June 8, 2000 9 * 10 * MPI Version: 01.02.04 11 * 12 * Version History 13 * --------------- 14 * 15 * Date Version Description 16 * -------- -------- ------------------------------------------------------ 17 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. 18 * 05-24-00 00.10.02 Added SenseBufferLength to _MSG_SCSI_IO_REPLY. 19 * 06-06-00 01.00.01 Update version number for 1.0 release. 20 * 06-08-00 01.00.02 Added MPI_SCSI_RSP_INFO_ definitions. 21 * 11-02-00 01.01.01 Original release for post 1.0 work. 22 * 12-04-00 01.01.02 Added MPI_SCSIIO_CONTROL_NO_DISCONNECT. 23 * 02-20-01 01.01.03 Started using MPI_POINTER. 24 * 03-27-01 01.01.04 Added structure offset comments. 25 * 04-10-01 01.01.05 Added new MsgFlag for MSG_SCSI_TASK_MGMT. 26 * 08-08-01 01.02.01 Original release for v1.2 work. 27 * 08-29-01 01.02.02 Added MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET. 28 * Added MPI_SCSI_STATE_QUEUE_TAG_REJECTED for 29 * MSG_SCSI_IO_REPLY. 30 * 09-28-01 01.02.03 Added structures and defines for SCSI Enclosure 31 * Processor messages. 32 * 10-04-01 01.02.04 Added defines for SEP request Action field. 33 * -------------------------------------------------------------------------- 34 */ 35 36 #ifndef MPI_INIT_H 37 #define MPI_INIT_H 38 39 40 /***************************************************************************** 41 * 42 * S C S I I n i t i a t o r M e s s a g e s 43 * 44 *****************************************************************************/ 45 46 /****************************************************************************/ 47 /* SCSI IO messages and assocaited structures */ 48 /****************************************************************************/ 49 50 typedef struct _MSG_SCSI_IO_REQUEST 51 { 52 U8 TargetID; /* 00h */ 53 U8 Bus; /* 01h */ 54 U8 ChainOffset; /* 02h */ 55 U8 Function; /* 03h */ 56 U8 CDBLength; /* 04h */ 57 U8 SenseBufferLength; /* 05h */ 58 U8 Reserved; /* 06h */ 59 U8 MsgFlags; /* 07h */ 60 U32 MsgContext; /* 08h */ 61 U8 LUN[8]; /* 0Ch */ 62 U32 Control; /* 14h */ 63 U8 CDB[16]; /* 18h */ 64 U32 DataLength; /* 28h */ 65 U32 SenseBufferLowAddr; /* 2Ch */ 66 SGE_IO_UNION SGL; /* 30h */ 67 } MSG_SCSI_IO_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO_REQUEST, 68 SCSIIORequest_t, MPI_POINTER pSCSIIORequest_t; 69 70 71 /* SCSIO MsgFlags bits */ 72 73 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH (0x01) 74 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32 (0x00) 75 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 (0x01) 76 #define MPI_SCSIIO_MSGFLGS_SENSE_LOCATION (0x02) 77 #define MPI_SCSIIO_MSGFLGS_SENSE_LOC_HOST (0x00) 78 #define MPI_SCSIIO_MSGFLGS_SENSE_LOC_IOC (0x02) 79 80 /* SCSIIO LUN fields */ 81 82 #define MPI_SCSIIO_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF) 83 #define MPI_SCSIIO_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000) 84 #define MPI_SCSIIO_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF) 85 #define MPI_SCSIIO_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000) 86 #define MPI_SCSIIO_LUN_LEVEL_1_WORD (0xFF00) 87 #define MPI_SCSIIO_LUN_LEVEL_1_DWORD (0x0000FF00) 88 89 /* SCSIO Control bits */ 90 91 #define MPI_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000) 92 #define MPI_SCSIIO_CONTROL_NODATATRANSFER (0x00000000) 93 #define MPI_SCSIIO_CONTROL_WRITE (0x01000000) 94 #define MPI_SCSIIO_CONTROL_READ (0x02000000) 95 96 #define MPI_SCSIIO_CONTROL_ADDCDBLEN_MASK (0x3C000000) 97 #define MPI_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26) 98 99 #define MPI_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700) 100 #define MPI_SCSIIO_CONTROL_SIMPLEQ (0x00000000) 101 #define MPI_SCSIIO_CONTROL_HEADOFQ (0x00000100) 102 #define MPI_SCSIIO_CONTROL_ORDEREDQ (0x00000200) 103 #define MPI_SCSIIO_CONTROL_ACAQ (0x00000400) 104 #define MPI_SCSIIO_CONTROL_UNTAGGED (0x00000500) 105 #define MPI_SCSIIO_CONTROL_NO_DISCONNECT (0x00000700) 106 107 #define MPI_SCSIIO_CONTROL_TASKMANAGE_MASK (0x00FF0000) 108 #define MPI_SCSIIO_CONTROL_OBSOLETE (0x00800000) 109 #define MPI_SCSIIO_CONTROL_CLEAR_ACA_RSV (0x00400000) 110 #define MPI_SCSIIO_CONTROL_TARGET_RESET (0x00200000) 111 #define MPI_SCSIIO_CONTROL_LUN_RESET_RSV (0x00100000) 112 #define MPI_SCSIIO_CONTROL_RESERVED (0x00080000) 113 #define MPI_SCSIIO_CONTROL_CLR_TASK_SET_RSV (0x00040000) 114 #define MPI_SCSIIO_CONTROL_ABORT_TASK_SET (0x00020000) 115 #define MPI_SCSIIO_CONTROL_RESERVED2 (0x00010000) 116 117 118 /* SCSIIO reply structure */ 119 typedef struct _MSG_SCSI_IO_REPLY 120 { 121 U8 TargetID; /* 00h */ 122 U8 Bus; /* 01h */ 123 U8 MsgLength; /* 02h */ 124 U8 Function; /* 03h */ 125 U8 CDBLength; /* 04h */ 126 U8 SenseBufferLength; /* 05h */ 127 U8 Reserved; /* 06h */ 128 U8 MsgFlags; /* 07h */ 129 U32 MsgContext; /* 08h */ 130 U8 SCSIStatus; /* 0Ch */ 131 U8 SCSIState; /* 0Dh */ 132 U16 IOCStatus; /* 0Eh */ 133 U32 IOCLogInfo; /* 10h */ 134 U32 TransferCount; /* 14h */ 135 U32 SenseCount; /* 18h */ 136 U32 ResponseInfo; /* 1Ch */ 137 } MSG_SCSI_IO_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_REPLY, 138 SCSIIOReply_t, MPI_POINTER pSCSIIOReply_t; 139 140 141 /* SCSIIO Reply SCSIStatus values (SAM-2 status codes) */ 142 143 #define MPI_SCSI_STATUS_SUCCESS (0x00) 144 #define MPI_SCSI_STATUS_CHECK_CONDITION (0x02) 145 #define MPI_SCSI_STATUS_CONDITION_MET (0x04) 146 #define MPI_SCSI_STATUS_BUSY (0x08) 147 #define MPI_SCSI_STATUS_INTERMEDIATE (0x10) 148 #define MPI_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14) 149 #define MPI_SCSI_STATUS_RESERVATION_CONFLICT (0x18) 150 #define MPI_SCSI_STATUS_COMMAND_TERMINATED (0x22) 151 #define MPI_SCSI_STATUS_TASK_SET_FULL (0x28) 152 #define MPI_SCSI_STATUS_ACA_ACTIVE (0x30) 153 154 155 /* SCSIIO Reply SCSIState values */ 156 157 #define MPI_SCSI_STATE_AUTOSENSE_VALID (0x01) 158 #define MPI_SCSI_STATE_AUTOSENSE_FAILED (0x02) 159 #define MPI_SCSI_STATE_NO_SCSI_STATUS (0x04) 160 #define MPI_SCSI_STATE_TERMINATED (0x08) 161 #define MPI_SCSI_STATE_RESPONSE_INFO_VALID (0x10) 162 #define MPI_SCSI_STATE_QUEUE_TAG_REJECTED (0x20) 163 164 /* SCSIIO Reply ResponseInfo values */ 165 /* (FCP-1 RSP_CODE values and SPI-3 Packetized Failure codes) */ 166 167 #define MPI_SCSI_RSP_INFO_FUNCTION_COMPLETE (0x00000000) 168 #define MPI_SCSI_RSP_INFO_FCP_BURST_LEN_ERROR (0x01000000) 169 #define MPI_SCSI_RSP_INFO_CMND_FIELDS_INVALID (0x02000000) 170 #define MPI_SCSI_RSP_INFO_FCP_DATA_RO_ERROR (0x03000000) 171 #define MPI_SCSI_RSP_INFO_TASK_MGMT_UNSUPPORTED (0x04000000) 172 #define MPI_SCSI_RSP_INFO_TASK_MGMT_FAILED (0x05000000) 173 #define MPI_SCSI_RSP_INFO_SPI_LQ_INVALID_TYPE (0x06000000) 174 175 176 /****************************************************************************/ 177 /* SCSI Task Management messages */ 178 /****************************************************************************/ 179 180 typedef struct _MSG_SCSI_TASK_MGMT 181 { 182 U8 TargetID; /* 00h */ 183 U8 Bus; /* 01h */ 184 U8 ChainOffset; /* 02h */ 185 U8 Function; /* 03h */ 186 U8 Reserved; /* 04h */ 187 U8 TaskType; /* 05h */ 188 U8 Reserved1; /* 06h */ 189 U8 MsgFlags; /* 07h */ 190 U32 MsgContext; /* 08h */ 191 U8 LUN[8]; /* 0Ch */ 192 U32 Reserved2[7]; /* 14h */ 193 U32 TaskMsgContext; /* 30h */ 194 } MSG_SCSI_TASK_MGMT, MPI_POINTER PTR_SCSI_TASK_MGMT, 195 SCSITaskMgmt_t, MPI_POINTER pSCSITaskMgmt_t; 196 197 /* TaskType values */ 198 199 #define MPI_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01) 200 #define MPI_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02) 201 #define MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03) 202 #define MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS (0x04) 203 #define MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05) 204 205 /* MsgFlags bits */ 206 #define MPI_SCSITASKMGMT_MSGFLAGS_TARGET_RESET_OPTION (0x00) 207 #define MPI_SCSITASKMGMT_MSGFLAGS_LIP_RESET_OPTION (0x02) 208 #define MPI_SCSITASKMGMT_MSGFLAGS_LIPRESET_RESET_OPTION (0x04) 209 210 /* SCSI Task Management Reply */ 211 typedef struct _MSG_SCSI_TASK_MGMT_REPLY 212 { 213 U8 TargetID; /* 00h */ 214 U8 Bus; /* 01h */ 215 U8 MsgLength; /* 02h */ 216 U8 Function; /* 03h */ 217 U8 Reserved; /* 04h */ 218 U8 TaskType; /* 05h */ 219 U8 Reserved1; /* 06h */ 220 U8 MsgFlags; /* 07h */ 221 U32 MsgContext; /* 08h */ 222 U8 Reserved2[2]; /* 0Ch */ 223 U16 IOCStatus; /* 0Eh */ 224 U32 IOCLogInfo; /* 10h */ 225 U32 TerminationCount; /* 14h */ 226 } MSG_SCSI_TASK_MGMT_REPLY, MPI_POINTER PTR_MSG_SCSI_TASK_MGMT_REPLY, 227 SCSITaskMgmtReply_t, MPI_POINTER pSCSITaskMgmtReply_t; 228 229 230 /****************************************************************************/ 231 /* SCSI Enclosure Processor messages */ 232 /****************************************************************************/ 233 234 typedef struct _MSG_SEP_REQUEST 235 { 236 U8 TargetID; /* 00h */ 237 U8 Bus; /* 01h */ 238 U8 ChainOffset; /* 02h */ 239 U8 Function; /* 03h */ 240 U8 Action; /* 04h */ 241 U8 Reserved1; /* 05h */ 242 U8 Reserved2; /* 06h */ 243 U8 MsgFlags; /* 07h */ 244 U32 MsgContext; /* 08h */ 245 U32 SlotStatus; /* 0Ch */ 246 } MSG_SEP_REQUEST, MPI_POINTER PTR_MSG_SEP_REQUEST, 247 SEPRequest_t, MPI_POINTER pSEPRequest_t; 248 249 /* Action defines */ 250 #define MPI_SEP_REQ_ACTION_WRITE_STATUS (0x00) 251 #define MPI_SEP_REQ_ACTION_READ_STATUS (0x01) 252 253 /* SlotStatus bits for MSG_SEP_REQUEST */ 254 #define MPI_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001) 255 #define MPI_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002) 256 #define MPI_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004) 257 #define MPI_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) 258 #define MPI_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) 259 #define MPI_SEP_REQ_SLOTSTATUS_PARITY_CHECK (0x00000020) 260 #define MPI_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040) 261 #define MPI_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080) 262 #define MPI_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100) 263 #define MPI_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200) 264 #define MPI_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) 265 #define MPI_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000) 266 #define MPI_SEP_REQ_SLOTSTATUS_REQUEST_INSERT (0x00080000) 267 #define MPI_SEP_REQ_SLOTSTATUS_DO_NOT_MOVE (0x00400000) 268 #define MPI_SEP_REQ_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000) 269 #define MPI_SEP_REQ_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000) 270 #define MPI_SEP_REQ_SLOTSTATUS_DEV_OFF (0x10000000) 271 #define MPI_SEP_REQ_SLOTSTATUS_SWAP_RESET (0x80000000) 272 273 274 typedef struct _MSG_SEP_REPLY 275 { 276 U8 TargetID; /* 00h */ 277 U8 Bus; /* 01h */ 278 U8 MsgLength; /* 02h */ 279 U8 Function; /* 03h */ 280 U8 Action; /* 04h */ 281 U8 Reserved1; /* 05h */ 282 U8 Reserved2; /* 06h */ 283 U8 MsgFlags; /* 07h */ 284 U32 MsgContext; /* 08h */ 285 U16 Reserved3; /* 0Ch */ 286 U16 IOCStatus; /* 0Eh */ 287 U32 IOCLogInfo; /* 10h */ 288 U32 SlotStatus; /* 14h */ 289 } MSG_SEP_REPLY, MPI_POINTER PTR_MSG_SEP_REPLY, 290 SEPReply_t, MPI_POINTER pSEPReply_t; 291 292 /* SlotStatus bits for MSG_SEP_REPLY */ 293 #define MPI_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001) 294 #define MPI_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002) 295 #define MPI_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004) 296 #define MPI_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) 297 #define MPI_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) 298 #define MPI_SEP_REPLY_SLOTSTATUS_PARITY_CHECK (0x00000020) 299 #define MPI_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040) 300 #define MPI_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080) 301 #define MPI_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100) 302 #define MPI_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200) 303 #define MPI_SEP_REPLY_SLOTSTATUS_REPORT (0x00010000) 304 #define MPI_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) 305 #define MPI_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000) 306 #define MPI_SEP_REPLY_SLOTSTATUS_INSERT_READY (0x00080000) 307 #define MPI_SEP_REPLY_SLOTSTATUS_DO_NOT_REMOVE (0x00400000) 308 #define MPI_SEP_REPLY_SLOTSTATUS_B_BYPASS_ENABLED (0x01000000) 309 #define MPI_SEP_REPLY_SLOTSTATUS_A_BYPASS_ENABLED (0x02000000) 310 #define MPI_SEP_REPLY_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000) 311 #define MPI_SEP_REPLY_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000) 312 #define MPI_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x10000000) 313 #define MPI_SEP_REPLY_SLOTSTATUS_FAULT_SENSED (0x40000000) 314 #define MPI_SEP_REPLY_SLOTSTATUS_SWAPPED (0x80000000) 315 316 #endif 317