1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2009 Yahoo! Inc. 5 * Copyright (c) 2011-2015 LSI Corp. 6 * Copyright (c) 2013-2015 Avago Technologies 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 31 * 32 * $FreeBSD$ 33 */ 34 35 #ifndef _MPSVAR_H 36 #define _MPSVAR_H 37 38 #define MPS_DRIVER_VERSION "21.02.00.00-fbsd" 39 40 #define MPS_DB_MAX_WAIT 2500 41 42 #define MPS_REQ_FRAMES 2048 43 #define MPS_PRI_REQ_FRAMES 128 44 #define MPS_EVT_REPLY_FRAMES 32 45 #define MPS_REPLY_FRAMES MPS_REQ_FRAMES 46 #define MPS_CHAIN_FRAMES 2048 47 #define MPS_MAXIO_PAGES (-1) 48 #define MPS_SENSE_LEN SSD_FULL_SIZE 49 #define MPS_MSI_MAX 1 50 #define MPS_MSIX_MAX 16 51 #define MPS_SGE64_SIZE 12 52 #define MPS_SGE32_SIZE 8 53 #define MPS_SGC_SIZE 8 54 55 #define CAN_SLEEP 1 56 #define NO_SLEEP 0 57 58 #define MPS_PERIODIC_DELAY 1 /* 1 second heartbeat/watchdog check */ 59 #define MPS_ATA_ID_TIMEOUT 5 /* 5 second timeout for SATA ID cmd */ 60 #define MPS_MISSING_CHECK_DELAY 10 /* 10 seconds between missing check */ 61 62 #define MPS_SCSI_RI_INVALID_FRAME (0x00000002) 63 64 #define DEFAULT_SPINUP_WAIT 3 /* seconds to wait for spinup */ 65 66 #include <sys/endian.h> 67 68 /* 69 * host mapping related macro definitions 70 */ 71 #define MPS_MAPTABLE_BAD_IDX 0xFFFFFFFF 72 #define MPS_DPM_BAD_IDX 0xFFFF 73 #define MPS_ENCTABLE_BAD_IDX 0xFF 74 #define MPS_MAX_MISSING_COUNT 0x0F 75 #define MPS_DEV_RESERVED 0x20000000 76 #define MPS_MAP_IN_USE 0x10000000 77 #define MPS_MAP_BAD_ID 0xFFFFFFFF 78 79 /* 80 * WarpDrive controller 81 */ 82 #define MPS_CHIP_WD_DEVICE_ID 0x007E 83 #define MPS_WD_LSI_OEM 0x80 84 #define MPS_WD_HIDE_EXPOSE_MASK 0x03 85 #define MPS_WD_HIDE_ALWAYS 0x00 86 #define MPS_WD_EXPOSE_ALWAYS 0x01 87 #define MPS_WD_HIDE_IF_VOLUME 0x02 88 #define MPS_WD_RETRY 0x01 89 #define MPS_MAN_PAGE10_SIZE 0x5C /* Hardcode for now */ 90 #define MPS_MAX_DISKS_IN_VOL 10 91 92 /* 93 * WarpDrive Event Logging 94 */ 95 #define MPI2_WD_LOG_ENTRY 0x8002 96 #define MPI2_WD_SSD_THROTTLING 0x0041 97 #define MPI2_WD_DRIVE_LIFE_WARN 0x0043 98 #define MPI2_WD_DRIVE_LIFE_DEAD 0x0044 99 #define MPI2_WD_RAIL_MON_FAIL 0x004D 100 101 typedef uint8_t u8; 102 typedef uint16_t u16; 103 typedef uint32_t u32; 104 typedef uint64_t u64; 105 106 /** 107 * struct dev_mapping_table - device mapping information 108 * @physical_id: SAS address for drives or WWID for RAID volumes 109 * @device_info: bitfield provides detailed info about the device 110 * @phy_bits: bitfields indicating controller phys 111 * @dpm_entry_num: index of this device in device persistent map table 112 * @dev_handle: device handle for the device pointed by this entry 113 * @id: target id 114 * @missing_count: number of times the device not detected by driver 115 * @hide_flag: Hide this physical disk/not (foreign configuration) 116 * @init_complete: Whether the start of the day checks completed or not 117 */ 118 struct dev_mapping_table { 119 u64 physical_id; 120 u32 device_info; 121 u32 phy_bits; 122 u16 dpm_entry_num; 123 u16 dev_handle; 124 u16 reserved1; 125 u16 id; 126 u8 missing_count; 127 u8 init_complete; 128 u8 TLR_bits; 129 u8 reserved2; 130 }; 131 132 /** 133 * struct enc_mapping_table - mapping information about an enclosure 134 * @enclosure_id: Logical ID of this enclosure 135 * @start_index: index to the entry in dev_mapping_table 136 * @phy_bits: bitfields indicating controller phys 137 * @dpm_entry_num: index of this enclosure in device persistent map table 138 * @enc_handle: device handle for the enclosure pointed by this entry 139 * @num_slots: number of slots in the enclosure 140 * @start_slot: Starting slot id 141 * @missing_count: number of times the device not detected by driver 142 * @removal_flag: used to mark the device for removal 143 * @skip_search: used as a flag to include/exclude enclosure for search 144 * @init_complete: Whether the start of the day checks completed or not 145 */ 146 struct enc_mapping_table { 147 u64 enclosure_id; 148 u32 start_index; 149 u32 phy_bits; 150 u16 dpm_entry_num; 151 u16 enc_handle; 152 u16 num_slots; 153 u16 start_slot; 154 u8 missing_count; 155 u8 removal_flag; 156 u8 skip_search; 157 u8 init_complete; 158 }; 159 160 /** 161 * struct map_removal_table - entries to be removed from mapping table 162 * @dpm_entry_num: index of this device in device persistent map table 163 * @dev_handle: device handle for the device pointed by this entry 164 */ 165 struct map_removal_table{ 166 u16 dpm_entry_num; 167 u16 dev_handle; 168 }; 169 170 typedef struct mps_fw_diagnostic_buffer { 171 size_t size; 172 uint8_t extended_type; 173 uint8_t buffer_type; 174 uint8_t force_release; 175 uint32_t product_specific[23]; 176 uint8_t immediate; 177 uint8_t enabled; 178 uint8_t valid_data; 179 uint8_t owned_by_firmware; 180 uint32_t unique_id; 181 } mps_fw_diagnostic_buffer_t; 182 183 struct mps_softc; 184 struct mps_command; 185 struct mpssas_softc; 186 union ccb; 187 struct mpssas_target; 188 struct mps_column_map; 189 190 MALLOC_DECLARE(M_MPT2); 191 192 typedef void mps_evt_callback_t(struct mps_softc *, uintptr_t, 193 MPI2_EVENT_NOTIFICATION_REPLY *reply); 194 typedef void mps_command_callback_t(struct mps_softc *, struct mps_command *cm); 195 196 struct mps_chain { 197 TAILQ_ENTRY(mps_chain) chain_link; 198 MPI2_SGE_IO_UNION *chain; 199 uint32_t chain_busaddr; 200 }; 201 202 /* 203 * This needs to be at least 2 to support SMP passthrough. 204 */ 205 #define MPS_IOVEC_COUNT 2 206 207 struct mps_command { 208 TAILQ_ENTRY(mps_command) cm_link; 209 TAILQ_ENTRY(mps_command) cm_recovery; 210 struct mps_softc *cm_sc; 211 union ccb *cm_ccb; 212 void *cm_data; 213 u_int cm_length; 214 u_int cm_out_len; 215 struct uio cm_uio; 216 struct iovec cm_iovec[MPS_IOVEC_COUNT]; 217 u_int cm_max_segs; 218 u_int cm_sglsize; 219 MPI2_SGE_IO_UNION *cm_sge; 220 uint8_t *cm_req; 221 uint8_t *cm_reply; 222 uint32_t cm_reply_data; 223 mps_command_callback_t *cm_complete; 224 void *cm_complete_data; 225 struct mpssas_target *cm_targ; 226 MPI2_REQUEST_DESCRIPTOR_UNION cm_desc; 227 u_int cm_lun; 228 u_int cm_flags; 229 #define MPS_CM_FLAGS_POLLED (1 << 0) 230 #define MPS_CM_FLAGS_COMPLETE (1 << 1) 231 #define MPS_CM_FLAGS_SGE_SIMPLE (1 << 2) 232 #define MPS_CM_FLAGS_DATAOUT (1 << 3) 233 #define MPS_CM_FLAGS_DATAIN (1 << 4) 234 #define MPS_CM_FLAGS_WAKEUP (1 << 5) 235 #define MPS_CM_FLAGS_DD_IO (1 << 6) 236 #define MPS_CM_FLAGS_USE_UIO (1 << 7) 237 #define MPS_CM_FLAGS_SMP_PASS (1 << 8) 238 #define MPS_CM_FLAGS_CHAIN_FAILED (1 << 9) 239 #define MPS_CM_FLAGS_ERROR_MASK MPS_CM_FLAGS_CHAIN_FAILED 240 #define MPS_CM_FLAGS_USE_CCB (1 << 10) 241 #define MPS_CM_FLAGS_SATA_ID_TIMEOUT (1 << 11) 242 u_int cm_state; 243 #define MPS_CM_STATE_FREE 0 244 #define MPS_CM_STATE_BUSY 1 245 #define MPS_CM_STATE_TIMEDOUT 2 246 bus_dmamap_t cm_dmamap; 247 struct scsi_sense_data *cm_sense; 248 TAILQ_HEAD(, mps_chain) cm_chain_list; 249 uint32_t cm_req_busaddr; 250 uint32_t cm_sense_busaddr; 251 struct callout cm_callout; 252 }; 253 254 struct mps_column_map { 255 uint16_t dev_handle; 256 uint8_t phys_disk_num; 257 }; 258 259 struct mps_event_handle { 260 TAILQ_ENTRY(mps_event_handle) eh_list; 261 mps_evt_callback_t *callback; 262 void *data; 263 u32 mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 264 }; 265 266 struct mps_queue { 267 struct mps_softc *sc; 268 int qnum; 269 MPI2_REPLY_DESCRIPTORS_UNION *post_queue; 270 int replypostindex; 271 #ifdef notyet 272 ck_ring_buffer_t *ringmem; 273 ck_ring_buffer_t *chainmem; 274 ck_ring_t req_ring; 275 ck_ring_t chain_ring; 276 #endif 277 bus_dma_tag_t buffer_dmat; 278 int io_cmds_highwater; 279 int chain_free_lowwater; 280 int chain_alloc_fail; 281 struct resource *irq; 282 void *intrhand; 283 int irq_rid; 284 }; 285 286 struct mps_softc { 287 device_t mps_dev; 288 struct cdev *mps_cdev; 289 u_int mps_flags; 290 #define MPS_FLAGS_INTX (1 << 0) 291 #define MPS_FLAGS_MSI (1 << 1) 292 #define MPS_FLAGS_BUSY (1 << 2) 293 #define MPS_FLAGS_SHUTDOWN (1 << 3) 294 #define MPS_FLAGS_DIAGRESET (1 << 4) 295 #define MPS_FLAGS_ATTACH_DONE (1 << 5) 296 #define MPS_FLAGS_WD_AVAILABLE (1 << 6) 297 #define MPS_FLAGS_REALLOCATED (1 << 7) 298 u_int mps_debug; 299 u_int msi_msgs; 300 int tm_cmds_active; 301 int io_cmds_active; 302 int io_cmds_highwater; 303 int chain_free; 304 int max_chains; 305 int max_io_pages; 306 int chain_free_lowwater; 307 u_int enable_ssu; 308 int spinup_wait_time; 309 int use_phynum; 310 uint64_t chain_alloc_fail; 311 struct sysctl_ctx_list sysctl_ctx; 312 struct sysctl_oid *sysctl_tree; 313 char fw_version[16]; 314 struct mps_command *commands; 315 struct mps_chain *chains; 316 struct callout periodic; 317 struct callout device_check_callout; 318 struct mps_queue *queues; 319 320 struct mpssas_softc *sassc; 321 TAILQ_HEAD(, mps_command) req_list; 322 TAILQ_HEAD(, mps_command) high_priority_req_list; 323 TAILQ_HEAD(, mps_chain) chain_list; 324 TAILQ_HEAD(, mps_command) tm_list; 325 int replypostindex; 326 int replyfreeindex; 327 328 struct resource *mps_regs_resource; 329 bus_space_handle_t mps_bhandle; 330 bus_space_tag_t mps_btag; 331 int mps_regs_rid; 332 333 bus_dma_tag_t mps_parent_dmat; 334 bus_dma_tag_t buffer_dmat; 335 336 MPI2_IOC_FACTS_REPLY *facts; 337 int num_reqs; 338 int num_replies; 339 int fqdepth; /* Free queue */ 340 int pqdepth; /* Post queue */ 341 342 u32 event_mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 343 TAILQ_HEAD(, mps_event_handle) event_list; 344 struct mps_event_handle *mps_log_eh; 345 346 struct mtx mps_mtx; 347 struct intr_config_hook mps_ich; 348 349 uint8_t *req_frames; 350 bus_addr_t req_busaddr; 351 bus_dma_tag_t req_dmat; 352 bus_dmamap_t req_map; 353 354 uint8_t *reply_frames; 355 bus_addr_t reply_busaddr; 356 bus_dma_tag_t reply_dmat; 357 bus_dmamap_t reply_map; 358 359 struct scsi_sense_data *sense_frames; 360 bus_addr_t sense_busaddr; 361 bus_dma_tag_t sense_dmat; 362 bus_dmamap_t sense_map; 363 364 uint8_t *chain_frames; 365 bus_addr_t chain_busaddr; 366 bus_dma_tag_t chain_dmat; 367 bus_dmamap_t chain_map; 368 369 MPI2_REPLY_DESCRIPTORS_UNION *post_queue; 370 bus_addr_t post_busaddr; 371 uint32_t *free_queue; 372 bus_addr_t free_busaddr; 373 bus_dma_tag_t queues_dmat; 374 bus_dmamap_t queues_map; 375 376 uint8_t *fw_diag_buffer; 377 bus_addr_t fw_diag_busaddr; 378 bus_dma_tag_t fw_diag_dmat; 379 bus_dmamap_t fw_diag_map; 380 381 uint8_t ir_firmware; 382 383 /* static config pages */ 384 Mpi2IOCPage8_t ioc_pg8; 385 386 /* host mapping support */ 387 struct dev_mapping_table *mapping_table; 388 struct enc_mapping_table *enclosure_table; 389 struct map_removal_table *removal_table; 390 uint8_t *dpm_entry_used; 391 uint8_t *dpm_flush_entry; 392 Mpi2DriverMappingPage0_t *dpm_pg0; 393 uint16_t max_devices; 394 uint16_t max_enclosures; 395 uint16_t max_expanders; 396 uint8_t max_volumes; 397 uint8_t num_enc_table_entries; 398 uint8_t num_rsvd_entries; 399 uint16_t max_dpm_entries; 400 uint8_t is_dpm_enable; 401 uint8_t track_mapping_events; 402 uint32_t pending_map_events; 403 404 /* FW diag Buffer List */ 405 mps_fw_diagnostic_buffer_t 406 fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT]; 407 408 /* Event Recording IOCTL support */ 409 uint32_t events_to_record[4]; 410 mps_event_entry_t recorded_events[MPS_EVENT_QUEUE_SIZE]; 411 uint8_t event_index; 412 uint32_t event_number; 413 414 /* EEDP and TLR support */ 415 uint8_t eedp_enabled; 416 uint8_t control_TLR; 417 418 /* Shutdown Event Handler */ 419 eventhandler_tag shutdown_eh; 420 421 /* To track topo events during reset */ 422 #define MPS_DIAG_RESET_TIMEOUT 300000 423 uint8_t wait_for_port_enable; 424 uint8_t port_enable_complete; 425 uint8_t msleep_fake_chan; 426 427 /* WD controller */ 428 uint8_t WD_available; 429 uint8_t WD_valid_config; 430 uint8_t WD_hide_expose; 431 432 /* Direct Drive for WarpDrive */ 433 uint8_t DD_num_phys_disks; 434 uint16_t DD_dev_handle; 435 uint32_t DD_stripe_size; 436 uint32_t DD_stripe_exponent; 437 uint32_t DD_block_size; 438 uint16_t DD_block_exponent; 439 uint64_t DD_max_lba; 440 struct mps_column_map DD_column_map[MPS_MAX_DISKS_IN_VOL]; 441 442 /* StartStopUnit command handling at shutdown */ 443 uint32_t SSU_refcount; 444 uint8_t SSU_started; 445 446 /* Configuration tunables */ 447 u_int disable_msix; 448 u_int disable_msi; 449 u_int max_msix; 450 u_int max_reqframes; 451 u_int max_prireqframes; 452 u_int max_replyframes; 453 u_int max_evtframes; 454 char exclude_ids[80]; 455 456 struct timeval lastfail; 457 }; 458 459 struct mps_config_params { 460 MPI2_CONFIG_EXT_PAGE_HEADER_UNION hdr; 461 u_int action; 462 u_int page_address; /* Attributes, not a phys address */ 463 u_int status; 464 void *buffer; 465 u_int length; 466 int timeout; 467 void (*callback)(struct mps_softc *, struct mps_config_params *); 468 void *cbdata; 469 }; 470 471 struct scsi_read_capacity_eedp 472 { 473 uint8_t addr[8]; 474 uint8_t length[4]; 475 uint8_t protect; 476 }; 477 478 static __inline uint32_t 479 mps_regread(struct mps_softc *sc, uint32_t offset) 480 { 481 return (bus_space_read_4(sc->mps_btag, sc->mps_bhandle, offset)); 482 } 483 484 static __inline void 485 mps_regwrite(struct mps_softc *sc, uint32_t offset, uint32_t val) 486 { 487 bus_space_write_4(sc->mps_btag, sc->mps_bhandle, offset, val); 488 } 489 490 /* free_queue must have Little Endian address 491 * TODO- cm_reply_data is unwanted. We can remove it. 492 * */ 493 static __inline void 494 mps_free_reply(struct mps_softc *sc, uint32_t busaddr) 495 { 496 if (++sc->replyfreeindex >= sc->fqdepth) 497 sc->replyfreeindex = 0; 498 sc->free_queue[sc->replyfreeindex] = htole32(busaddr); 499 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); 500 } 501 502 static __inline struct mps_chain * 503 mps_alloc_chain(struct mps_softc *sc) 504 { 505 struct mps_chain *chain; 506 507 if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) { 508 TAILQ_REMOVE(&sc->chain_list, chain, chain_link); 509 sc->chain_free--; 510 if (sc->chain_free < sc->chain_free_lowwater) 511 sc->chain_free_lowwater = sc->chain_free; 512 } else 513 sc->chain_alloc_fail++; 514 return (chain); 515 } 516 517 static __inline void 518 mps_free_chain(struct mps_softc *sc, struct mps_chain *chain) 519 { 520 sc->chain_free++; 521 TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link); 522 } 523 524 static __inline void 525 mps_free_command(struct mps_softc *sc, struct mps_command *cm) 526 { 527 struct mps_chain *chain, *chain_temp; 528 529 if (cm->cm_reply != NULL) 530 mps_free_reply(sc, cm->cm_reply_data); 531 cm->cm_reply = NULL; 532 cm->cm_flags = 0; 533 cm->cm_complete = NULL; 534 cm->cm_complete_data = NULL; 535 cm->cm_ccb = NULL; 536 cm->cm_targ = NULL; 537 cm->cm_max_segs = 0; 538 cm->cm_lun = 0; 539 cm->cm_state = MPS_CM_STATE_FREE; 540 cm->cm_data = NULL; 541 cm->cm_length = 0; 542 cm->cm_out_len = 0; 543 cm->cm_sglsize = 0; 544 cm->cm_sge = NULL; 545 546 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) { 547 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link); 548 mps_free_chain(sc, chain); 549 } 550 TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link); 551 } 552 553 static __inline struct mps_command * 554 mps_alloc_command(struct mps_softc *sc) 555 { 556 struct mps_command *cm; 557 558 cm = TAILQ_FIRST(&sc->req_list); 559 if (cm == NULL) 560 return (NULL); 561 562 TAILQ_REMOVE(&sc->req_list, cm, cm_link); 563 KASSERT(cm->cm_state == MPS_CM_STATE_FREE, ("mps: Allocating busy command\n")); 564 cm->cm_state = MPS_CM_STATE_BUSY; 565 return (cm); 566 } 567 568 static __inline void 569 mps_free_high_priority_command(struct mps_softc *sc, struct mps_command *cm) 570 { 571 struct mps_chain *chain, *chain_temp; 572 573 if (cm->cm_reply != NULL) 574 mps_free_reply(sc, cm->cm_reply_data); 575 cm->cm_reply = NULL; 576 cm->cm_flags = 0; 577 cm->cm_complete = NULL; 578 cm->cm_complete_data = NULL; 579 cm->cm_ccb = NULL; 580 cm->cm_targ = NULL; 581 cm->cm_lun = 0; 582 cm->cm_state = MPS_CM_STATE_FREE; 583 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) { 584 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link); 585 mps_free_chain(sc, chain); 586 } 587 TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link); 588 } 589 590 static __inline struct mps_command * 591 mps_alloc_high_priority_command(struct mps_softc *sc) 592 { 593 struct mps_command *cm; 594 595 cm = TAILQ_FIRST(&sc->high_priority_req_list); 596 if (cm == NULL) 597 return (NULL); 598 599 TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link); 600 KASSERT(cm->cm_state == MPS_CM_STATE_FREE, ("mps: Allocating busy command\n")); 601 cm->cm_state = MPS_CM_STATE_BUSY; 602 return (cm); 603 } 604 605 static __inline void 606 mps_lock(struct mps_softc *sc) 607 { 608 mtx_lock(&sc->mps_mtx); 609 } 610 611 static __inline void 612 mps_unlock(struct mps_softc *sc) 613 { 614 mtx_unlock(&sc->mps_mtx); 615 } 616 617 #define MPS_INFO (1 << 0) /* Basic info */ 618 #define MPS_FAULT (1 << 1) /* Hardware faults */ 619 #define MPS_EVENT (1 << 2) /* Event data from the controller */ 620 #define MPS_LOG (1 << 3) /* Log data from the controller */ 621 #define MPS_RECOVERY (1 << 4) /* Command error recovery tracing */ 622 #define MPS_ERROR (1 << 5) /* Parameter errors, programming bugs */ 623 #define MPS_INIT (1 << 6) /* Things related to system init */ 624 #define MPS_XINFO (1 << 7) /* More detailed/noisy info */ 625 #define MPS_USER (1 << 8) /* Trace user-generated commands */ 626 #define MPS_MAPPING (1 << 9) /* Trace device mappings */ 627 #define MPS_TRACE (1 << 10) /* Function-by-function trace */ 628 629 #define MPS_SSU_DISABLE_SSD_DISABLE_HDD 0 630 #define MPS_SSU_ENABLE_SSD_DISABLE_HDD 1 631 #define MPS_SSU_DISABLE_SSD_ENABLE_HDD 2 632 #define MPS_SSU_ENABLE_SSD_ENABLE_HDD 3 633 634 #define mps_printf(sc, args...) \ 635 device_printf((sc)->mps_dev, ##args) 636 637 #define mps_print_field(sc, msg, args...) \ 638 printf("\t" msg, ##args) 639 640 #define mps_vprintf(sc, args...) \ 641 do { \ 642 if (bootverbose) \ 643 mps_printf(sc, ##args); \ 644 } while (0) 645 646 #define mps_dprint(sc, level, msg, args...) \ 647 do { \ 648 if ((sc)->mps_debug & (level)) \ 649 device_printf((sc)->mps_dev, msg, ##args); \ 650 } while (0) 651 652 #define MPS_PRINTFIELD_START(sc, tag...) \ 653 mps_printf((sc), ##tag); \ 654 mps_print_field((sc), ":\n") 655 #define MPS_PRINTFIELD_END(sc, tag) \ 656 mps_printf((sc), tag "\n") 657 #define MPS_PRINTFIELD(sc, facts, attr, fmt) \ 658 mps_print_field((sc), #attr ": " #fmt "\n", (facts)->attr) 659 660 #define MPS_FUNCTRACE(sc) \ 661 mps_dprint((sc), MPS_TRACE, "%s\n", __func__) 662 663 #define CAN_SLEEP 1 664 #define NO_SLEEP 0 665 666 static __inline void 667 mps_from_u64(uint64_t data, U64 *mps) 668 { 669 (mps)->High = htole32((uint32_t)((data) >> 32)); 670 (mps)->Low = htole32((uint32_t)((data) & 0xffffffff)); 671 } 672 673 static __inline uint64_t 674 mps_to_u64(U64 *data) 675 { 676 677 return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low)); 678 } 679 680 static __inline void 681 mps_mask_intr(struct mps_softc *sc) 682 { 683 uint32_t mask; 684 685 mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET); 686 mask |= MPI2_HIM_REPLY_INT_MASK; 687 mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask); 688 } 689 690 static __inline void 691 mps_unmask_intr(struct mps_softc *sc) 692 { 693 uint32_t mask; 694 695 mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET); 696 mask &= ~MPI2_HIM_REPLY_INT_MASK; 697 mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask); 698 } 699 700 int mps_pci_setup_interrupts(struct mps_softc *sc); 701 void mps_pci_free_interrupts(struct mps_softc *sc); 702 int mps_pci_restore(struct mps_softc *sc); 703 704 void mps_get_tunables(struct mps_softc *sc); 705 int mps_attach(struct mps_softc *sc); 706 int mps_free(struct mps_softc *sc); 707 void mps_intr(void *); 708 void mps_intr_msi(void *); 709 void mps_intr_locked(void *); 710 int mps_register_events(struct mps_softc *, u32 *, mps_evt_callback_t *, 711 void *, struct mps_event_handle **); 712 int mps_restart(struct mps_softc *); 713 int mps_update_events(struct mps_softc *, struct mps_event_handle *, u32 *); 714 void mps_deregister_events(struct mps_softc *, struct mps_event_handle *); 715 int mps_push_sge(struct mps_command *, void *, size_t, int); 716 int mps_add_dmaseg(struct mps_command *, vm_paddr_t, size_t, u_int, int); 717 int mps_attach_sas(struct mps_softc *sc); 718 int mps_detach_sas(struct mps_softc *sc); 719 int mps_read_config_page(struct mps_softc *, struct mps_config_params *); 720 int mps_write_config_page(struct mps_softc *, struct mps_config_params *); 721 void mps_memaddr_cb(void *, bus_dma_segment_t *, int , int ); 722 void mpi_init_sge(struct mps_command *cm, void *req, void *sge); 723 int mps_attach_user(struct mps_softc *); 724 void mps_detach_user(struct mps_softc *); 725 void mpssas_record_event(struct mps_softc *sc, 726 MPI2_EVENT_NOTIFICATION_REPLY *event_reply); 727 728 int mps_map_command(struct mps_softc *sc, struct mps_command *cm); 729 int mps_wait_command(struct mps_softc *sc, struct mps_command **cm, int timeout, 730 int sleep_flag); 731 732 int mps_config_get_bios_pg3(struct mps_softc *sc, Mpi2ConfigReply_t 733 *mpi_reply, Mpi2BiosPage3_t *config_page); 734 int mps_config_get_raid_volume_pg0(struct mps_softc *sc, Mpi2ConfigReply_t 735 *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address); 736 int mps_config_get_ioc_pg8(struct mps_softc *sc, Mpi2ConfigReply_t *, 737 Mpi2IOCPage8_t *); 738 int mps_config_get_man_pg10(struct mps_softc *sc, Mpi2ConfigReply_t *mpi_reply); 739 int mps_config_get_sas_device_pg0(struct mps_softc *, Mpi2ConfigReply_t *, 740 Mpi2SasDevicePage0_t *, u32 , u16 ); 741 int mps_config_get_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *, 742 Mpi2DriverMappingPage0_t *, u16 ); 743 int mps_config_get_raid_volume_pg1(struct mps_softc *sc, 744 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form, 745 u16 handle); 746 int mps_config_get_volume_wwid(struct mps_softc *sc, u16 volume_handle, 747 u64 *wwid); 748 int mps_config_get_raid_pd_pg0(struct mps_softc *sc, 749 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page, 750 u32 page_address); 751 void mpssas_ir_shutdown(struct mps_softc *sc); 752 753 int mps_reinit(struct mps_softc *sc); 754 void mpssas_handle_reinit(struct mps_softc *sc); 755 756 void mps_base_static_config_pages(struct mps_softc *sc); 757 void mps_wd_config_pages(struct mps_softc *sc); 758 759 int mps_mapping_initialize(struct mps_softc *); 760 void mps_mapping_topology_change_event(struct mps_softc *, 761 Mpi2EventDataSasTopologyChangeList_t *); 762 void mps_mapping_free_memory(struct mps_softc *sc); 763 int mps_config_set_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *, 764 Mpi2DriverMappingPage0_t *, u16 ); 765 void mps_mapping_exit(struct mps_softc *); 766 void mps_mapping_check_devices(void *); 767 int mps_mapping_allocate_memory(struct mps_softc *sc); 768 unsigned int mps_mapping_get_tid(struct mps_softc *, uint64_t , u16); 769 unsigned int mps_mapping_get_tid_from_handle(struct mps_softc *sc, 770 u16 handle); 771 unsigned int mps_mapping_get_raid_tid(struct mps_softc *sc, u64 wwid, 772 u16 volHandle); 773 unsigned int mps_mapping_get_raid_tid_from_handle(struct mps_softc *sc, 774 u16 volHandle); 775 void mps_mapping_enclosure_dev_status_change_event(struct mps_softc *, 776 Mpi2EventDataSasEnclDevStatusChange_t *event_data); 777 void mps_mapping_ir_config_change_event(struct mps_softc *sc, 778 Mpi2EventDataIrConfigChangeList_t *event_data); 779 int mps_mapping_dump(SYSCTL_HANDLER_ARGS); 780 int mps_mapping_encl_dump(SYSCTL_HANDLER_ARGS); 781 782 void mpssas_evt_handler(struct mps_softc *sc, uintptr_t data, 783 MPI2_EVENT_NOTIFICATION_REPLY *event); 784 void mpssas_prepare_remove(struct mpssas_softc *sassc, uint16_t handle); 785 void mpssas_prepare_volume_remove(struct mpssas_softc *sassc, uint16_t handle); 786 int mpssas_startup(struct mps_softc *sc); 787 struct mpssas_target * mpssas_find_target_by_handle(struct mpssas_softc *, int, uint16_t); 788 void mpssas_realloc_targets(struct mps_softc *sc, int maxtargets); 789 struct mps_command * mpssas_alloc_tm(struct mps_softc *sc); 790 void mpssas_free_tm(struct mps_softc *sc, struct mps_command *tm); 791 void mpssas_release_simq_reinit(struct mpssas_softc *sassc); 792 int mpssas_send_reset(struct mps_softc *sc, struct mps_command *tm, 793 uint8_t type); 794 795 SYSCTL_DECL(_hw_mps); 796 797 /* Compatibility shims for different OS versions */ 798 #if __FreeBSD_version >= 800001 799 #define mps_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \ 800 kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) 801 #define mps_kproc_exit(arg) kproc_exit(arg) 802 #else 803 #define mps_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \ 804 kthread_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) 805 #define mps_kproc_exit(arg) kthread_exit(arg) 806 #endif 807 808 #if defined(CAM_PRIORITY_XPT) 809 #define MPS_PRIORITY_XPT CAM_PRIORITY_XPT 810 #else 811 #define MPS_PRIORITY_XPT 5 812 #endif 813 814 #if __FreeBSD_version < 800107 815 // Prior to FreeBSD-8.0 scp3_flags was not defined. 816 #define spc3_flags reserved 817 818 #define SPC3_SID_PROTECT 0x01 819 #define SPC3_SID_3PC 0x08 820 #define SPC3_SID_TPGS_MASK 0x30 821 #define SPC3_SID_TPGS_IMPLICIT 0x10 822 #define SPC3_SID_TPGS_EXPLICIT 0x20 823 #define SPC3_SID_ACC 0x40 824 #define SPC3_SID_SCCS 0x80 825 826 #define CAM_PRIORITY_NORMAL CAM_PRIORITY_NONE 827 #endif 828 829 #endif 830 831