1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2009 Yahoo! Inc. 5 * Copyright (c) 2011-2015 LSI Corp. 6 * Copyright (c) 2013-2015 Avago Technologies 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 31 * 32 * $FreeBSD$ 33 */ 34 35 #ifndef _MPSVAR_H 36 #define _MPSVAR_H 37 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 41 #define MPS_DRIVER_VERSION "21.02.00.00-fbsd" 42 43 #define MPS_DB_MAX_WAIT 2500 44 45 #define MPS_REQ_FRAMES 2048 46 #define MPS_PRI_REQ_FRAMES 128 47 #define MPS_EVT_REPLY_FRAMES 32 48 #define MPS_REPLY_FRAMES MPS_REQ_FRAMES 49 #define MPS_CHAIN_FRAMES 16384 50 #define MPS_MAXIO_PAGES (-1) 51 #define MPS_SENSE_LEN SSD_FULL_SIZE 52 #define MPS_MSI_MAX 1 53 #define MPS_MSIX_MAX 16 54 #define MPS_SGE64_SIZE 12 55 #define MPS_SGE32_SIZE 8 56 #define MPS_SGC_SIZE 12 57 58 #define CAN_SLEEP 1 59 #define NO_SLEEP 0 60 61 #define MPS_PERIODIC_DELAY 1 /* 1 second heartbeat/watchdog check */ 62 #define MPS_ATA_ID_TIMEOUT 5 /* 5 second timeout for SATA ID cmd */ 63 #define MPS_MISSING_CHECK_DELAY 10 /* 10 seconds between missing check */ 64 65 #define MPS_SCSI_RI_INVALID_FRAME (0x00000002) 66 67 #define DEFAULT_SPINUP_WAIT 3 /* seconds to wait for spinup */ 68 69 #include <sys/endian.h> 70 71 /* 72 * host mapping related macro definitions 73 */ 74 #define MPS_MAPTABLE_BAD_IDX 0xFFFFFFFF 75 #define MPS_DPM_BAD_IDX 0xFFFF 76 #define MPS_ENCTABLE_BAD_IDX 0xFF 77 #define MPS_MAX_MISSING_COUNT 0x0F 78 #define MPS_DEV_RESERVED 0x20000000 79 #define MPS_MAP_IN_USE 0x10000000 80 #define MPS_MAP_BAD_ID 0xFFFFFFFF 81 82 /* 83 * WarpDrive controller 84 */ 85 #define MPS_CHIP_WD_DEVICE_ID 0x007E 86 #define MPS_WD_LSI_OEM 0x80 87 #define MPS_WD_HIDE_EXPOSE_MASK 0x03 88 #define MPS_WD_HIDE_ALWAYS 0x00 89 #define MPS_WD_EXPOSE_ALWAYS 0x01 90 #define MPS_WD_HIDE_IF_VOLUME 0x02 91 #define MPS_WD_RETRY 0x01 92 #define MPS_MAN_PAGE10_SIZE 0x5C /* Hardcode for now */ 93 #define MPS_MAX_DISKS_IN_VOL 10 94 95 /* 96 * WarpDrive Event Logging 97 */ 98 #define MPI2_WD_LOG_ENTRY 0x8002 99 #define MPI2_WD_SSD_THROTTLING 0x0041 100 #define MPI2_WD_DRIVE_LIFE_WARN 0x0043 101 #define MPI2_WD_DRIVE_LIFE_DEAD 0x0044 102 #define MPI2_WD_RAIL_MON_FAIL 0x004D 103 104 typedef uint8_t u8; 105 typedef uint16_t u16; 106 typedef uint32_t u32; 107 typedef uint64_t u64; 108 109 /** 110 * struct dev_mapping_table - device mapping information 111 * @physical_id: SAS address for drives or WWID for RAID volumes 112 * @device_info: bitfield provides detailed info about the device 113 * @phy_bits: bitfields indicating controller phys 114 * @dpm_entry_num: index of this device in device persistent map table 115 * @dev_handle: device handle for the device pointed by this entry 116 * @id: target id 117 * @missing_count: number of times the device not detected by driver 118 * @hide_flag: Hide this physical disk/not (foreign configuration) 119 * @init_complete: Whether the start of the day checks completed or not 120 */ 121 struct dev_mapping_table { 122 u64 physical_id; 123 u32 device_info; 124 u32 phy_bits; 125 u16 dpm_entry_num; 126 u16 dev_handle; 127 u16 reserved1; 128 u16 id; 129 u8 missing_count; 130 u8 init_complete; 131 u8 TLR_bits; 132 u8 reserved2; 133 }; 134 135 /** 136 * struct enc_mapping_table - mapping information about an enclosure 137 * @enclosure_id: Logical ID of this enclosure 138 * @start_index: index to the entry in dev_mapping_table 139 * @phy_bits: bitfields indicating controller phys 140 * @dpm_entry_num: index of this enclosure in device persistent map table 141 * @enc_handle: device handle for the enclosure pointed by this entry 142 * @num_slots: number of slots in the enclosure 143 * @start_slot: Starting slot id 144 * @missing_count: number of times the device not detected by driver 145 * @removal_flag: used to mark the device for removal 146 * @skip_search: used as a flag to include/exclude enclosure for search 147 * @init_complete: Whether the start of the day checks completed or not 148 */ 149 struct enc_mapping_table { 150 u64 enclosure_id; 151 u32 start_index; 152 u32 phy_bits; 153 u16 dpm_entry_num; 154 u16 enc_handle; 155 u16 num_slots; 156 u16 start_slot; 157 u8 missing_count; 158 u8 removal_flag; 159 u8 skip_search; 160 u8 init_complete; 161 }; 162 163 /** 164 * struct map_removal_table - entries to be removed from mapping table 165 * @dpm_entry_num: index of this device in device persistent map table 166 * @dev_handle: device handle for the device pointed by this entry 167 */ 168 struct map_removal_table{ 169 u16 dpm_entry_num; 170 u16 dev_handle; 171 }; 172 173 typedef struct mps_fw_diagnostic_buffer { 174 size_t size; 175 uint8_t extended_type; 176 uint8_t buffer_type; 177 uint8_t force_release; 178 uint32_t product_specific[23]; 179 uint8_t immediate; 180 uint8_t enabled; 181 uint8_t valid_data; 182 uint8_t owned_by_firmware; 183 uint32_t unique_id; 184 } mps_fw_diagnostic_buffer_t; 185 186 struct mps_softc; 187 struct mps_command; 188 struct mpssas_softc; 189 union ccb; 190 struct mpssas_target; 191 struct mps_column_map; 192 193 MALLOC_DECLARE(M_MPT2); 194 195 typedef void mps_evt_callback_t(struct mps_softc *, uintptr_t, 196 MPI2_EVENT_NOTIFICATION_REPLY *reply); 197 typedef void mps_command_callback_t(struct mps_softc *, struct mps_command *cm); 198 199 struct mps_chain { 200 TAILQ_ENTRY(mps_chain) chain_link; 201 MPI2_SGE_IO_UNION *chain; 202 uint64_t chain_busaddr; 203 }; 204 205 /* 206 * This needs to be at least 2 to support SMP passthrough. 207 */ 208 #define MPS_IOVEC_COUNT 2 209 210 struct mps_command { 211 TAILQ_ENTRY(mps_command) cm_link; 212 TAILQ_ENTRY(mps_command) cm_recovery; 213 struct mps_softc *cm_sc; 214 union ccb *cm_ccb; 215 void *cm_data; 216 u_int cm_length; 217 u_int cm_out_len; 218 struct uio cm_uio; 219 struct iovec cm_iovec[MPS_IOVEC_COUNT]; 220 u_int cm_max_segs; 221 u_int cm_sglsize; 222 MPI2_SGE_IO_UNION *cm_sge; 223 uint8_t *cm_req; 224 uint8_t *cm_reply; 225 uint32_t cm_reply_data; 226 mps_command_callback_t *cm_complete; 227 void *cm_complete_data; 228 struct mpssas_target *cm_targ; 229 MPI2_REQUEST_DESCRIPTOR_UNION cm_desc; 230 u_int cm_lun; 231 u_int cm_flags; 232 #define MPS_CM_FLAGS_POLLED (1 << 0) 233 #define MPS_CM_FLAGS_COMPLETE (1 << 1) 234 #define MPS_CM_FLAGS_SGE_SIMPLE (1 << 2) 235 #define MPS_CM_FLAGS_DATAOUT (1 << 3) 236 #define MPS_CM_FLAGS_DATAIN (1 << 4) 237 #define MPS_CM_FLAGS_WAKEUP (1 << 5) 238 #define MPS_CM_FLAGS_DD_IO (1 << 6) 239 #define MPS_CM_FLAGS_USE_UIO (1 << 7) 240 #define MPS_CM_FLAGS_SMP_PASS (1 << 8) 241 #define MPS_CM_FLAGS_CHAIN_FAILED (1 << 9) 242 #define MPS_CM_FLAGS_ERROR_MASK MPS_CM_FLAGS_CHAIN_FAILED 243 #define MPS_CM_FLAGS_USE_CCB (1 << 10) 244 #define MPS_CM_FLAGS_SATA_ID_TIMEOUT (1 << 11) 245 #define MPS_CM_FLAGS_ON_RECOVERY (1 << 12) 246 #define MPS_CM_FLAGS_TIMEDOUT (1 << 13) 247 u_int cm_state; 248 #define MPS_CM_STATE_FREE 0 249 #define MPS_CM_STATE_BUSY 1 250 #define MPS_CM_STATE_INQUEUE 2 251 bus_dmamap_t cm_dmamap; 252 struct scsi_sense_data *cm_sense; 253 TAILQ_HEAD(, mps_chain) cm_chain_list; 254 uint32_t cm_req_busaddr; 255 uint32_t cm_sense_busaddr; 256 struct callout cm_callout; 257 mps_command_callback_t *cm_timeout_handler; 258 }; 259 260 struct mps_column_map { 261 uint16_t dev_handle; 262 uint8_t phys_disk_num; 263 }; 264 265 struct mps_event_handle { 266 TAILQ_ENTRY(mps_event_handle) eh_list; 267 mps_evt_callback_t *callback; 268 void *data; 269 u32 mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 270 }; 271 272 struct mps_busdma_context { 273 int completed; 274 int abandoned; 275 int error; 276 bus_addr_t *addr; 277 struct mps_softc *softc; 278 bus_dmamap_t buffer_dmamap; 279 bus_dma_tag_t buffer_dmat; 280 }; 281 282 struct mps_queue { 283 struct mps_softc *sc; 284 int qnum; 285 MPI2_REPLY_DESCRIPTORS_UNION *post_queue; 286 int replypostindex; 287 #ifdef notyet 288 ck_ring_buffer_t *ringmem; 289 ck_ring_buffer_t *chainmem; 290 ck_ring_t req_ring; 291 ck_ring_t chain_ring; 292 #endif 293 bus_dma_tag_t buffer_dmat; 294 int io_cmds_highwater; 295 int chain_free_lowwater; 296 int chain_alloc_fail; 297 struct resource *irq; 298 void *intrhand; 299 int irq_rid; 300 }; 301 302 struct mps_softc { 303 device_t mps_dev; 304 struct cdev *mps_cdev; 305 u_int mps_flags; 306 #define MPS_FLAGS_INTX (1 << 0) 307 #define MPS_FLAGS_MSI (1 << 1) 308 #define MPS_FLAGS_BUSY (1 << 2) 309 #define MPS_FLAGS_SHUTDOWN (1 << 3) 310 #define MPS_FLAGS_DIAGRESET (1 << 4) 311 #define MPS_FLAGS_ATTACH_DONE (1 << 5) 312 #define MPS_FLAGS_WD_AVAILABLE (1 << 6) 313 #define MPS_FLAGS_REALLOCATED (1 << 7) 314 u_int mps_debug; 315 u_int msi_msgs; 316 u_int reqframesz; 317 u_int replyframesz; 318 int tm_cmds_active; 319 int io_cmds_active; 320 int io_cmds_highwater; 321 int chain_free; 322 int max_chains; 323 int max_io_pages; 324 u_int maxio; 325 int chain_free_lowwater; 326 u_int enable_ssu; 327 int spinup_wait_time; 328 int use_phynum; 329 int dump_reqs_alltypes; 330 uint64_t chain_alloc_fail; 331 struct sysctl_ctx_list sysctl_ctx; 332 struct sysctl_oid *sysctl_tree; 333 char fw_version[16]; 334 char msg_version[8]; 335 struct mps_command *commands; 336 struct mps_chain *chains; 337 struct callout periodic; 338 struct callout device_check_callout; 339 struct mps_queue *queues; 340 341 struct mpssas_softc *sassc; 342 TAILQ_HEAD(, mps_command) req_list; 343 TAILQ_HEAD(, mps_command) high_priority_req_list; 344 TAILQ_HEAD(, mps_chain) chain_list; 345 TAILQ_HEAD(, mps_command) tm_list; 346 int replypostindex; 347 int replyfreeindex; 348 349 struct resource *mps_regs_resource; 350 bus_space_handle_t mps_bhandle; 351 bus_space_tag_t mps_btag; 352 int mps_regs_rid; 353 354 bus_dma_tag_t mps_parent_dmat; 355 bus_dma_tag_t buffer_dmat; 356 357 MPI2_IOC_FACTS_REPLY *facts; 358 int num_reqs; 359 int num_prireqs; 360 int num_replies; 361 int num_chains; 362 int fqdepth; /* Free queue */ 363 int pqdepth; /* Post queue */ 364 365 u32 event_mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 366 TAILQ_HEAD(, mps_event_handle) event_list; 367 struct mps_event_handle *mps_log_eh; 368 369 struct mtx mps_mtx; 370 struct intr_config_hook mps_ich; 371 372 uint8_t *req_frames; 373 bus_addr_t req_busaddr; 374 bus_dma_tag_t req_dmat; 375 bus_dmamap_t req_map; 376 377 uint8_t *reply_frames; 378 bus_addr_t reply_busaddr; 379 bus_dma_tag_t reply_dmat; 380 bus_dmamap_t reply_map; 381 382 struct scsi_sense_data *sense_frames; 383 bus_addr_t sense_busaddr; 384 bus_dma_tag_t sense_dmat; 385 bus_dmamap_t sense_map; 386 387 uint8_t *chain_frames; 388 bus_dma_tag_t chain_dmat; 389 bus_dmamap_t chain_map; 390 391 MPI2_REPLY_DESCRIPTORS_UNION *post_queue; 392 bus_addr_t post_busaddr; 393 uint32_t *free_queue; 394 bus_addr_t free_busaddr; 395 bus_dma_tag_t queues_dmat; 396 bus_dmamap_t queues_map; 397 398 uint8_t *fw_diag_buffer; 399 bus_addr_t fw_diag_busaddr; 400 bus_dma_tag_t fw_diag_dmat; 401 bus_dmamap_t fw_diag_map; 402 403 uint8_t ir_firmware; 404 405 /* static config pages */ 406 Mpi2IOCPage8_t ioc_pg8; 407 408 /* host mapping support */ 409 struct dev_mapping_table *mapping_table; 410 struct enc_mapping_table *enclosure_table; 411 struct map_removal_table *removal_table; 412 uint8_t *dpm_entry_used; 413 uint8_t *dpm_flush_entry; 414 Mpi2DriverMappingPage0_t *dpm_pg0; 415 uint16_t max_devices; 416 uint16_t max_enclosures; 417 uint16_t max_expanders; 418 uint8_t max_volumes; 419 uint8_t num_enc_table_entries; 420 uint8_t num_rsvd_entries; 421 uint16_t max_dpm_entries; 422 uint8_t is_dpm_enable; 423 uint8_t track_mapping_events; 424 uint32_t pending_map_events; 425 426 /* FW diag Buffer List */ 427 mps_fw_diagnostic_buffer_t 428 fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT]; 429 430 /* Event Recording IOCTL support */ 431 uint32_t events_to_record[4]; 432 mps_event_entry_t recorded_events[MPS_EVENT_QUEUE_SIZE]; 433 uint8_t event_index; 434 uint32_t event_number; 435 436 /* EEDP and TLR support */ 437 uint8_t eedp_enabled; 438 uint8_t control_TLR; 439 440 /* Shutdown Event Handler */ 441 eventhandler_tag shutdown_eh; 442 443 /* To track topo events during reset */ 444 #define MPS_DIAG_RESET_TIMEOUT 300000 445 uint8_t wait_for_port_enable; 446 uint8_t port_enable_complete; 447 uint8_t msleep_fake_chan; 448 449 /* WD controller */ 450 uint8_t WD_available; 451 uint8_t WD_valid_config; 452 uint8_t WD_hide_expose; 453 454 /* Direct Drive for WarpDrive */ 455 uint8_t DD_num_phys_disks; 456 uint16_t DD_dev_handle; 457 uint32_t DD_stripe_size; 458 uint32_t DD_stripe_exponent; 459 uint32_t DD_block_size; 460 uint16_t DD_block_exponent; 461 uint64_t DD_max_lba; 462 struct mps_column_map DD_column_map[MPS_MAX_DISKS_IN_VOL]; 463 464 /* StartStopUnit command handling at shutdown */ 465 uint32_t SSU_refcount; 466 uint8_t SSU_started; 467 468 /* Configuration tunables */ 469 u_int disable_msix; 470 u_int disable_msi; 471 u_int max_msix; 472 u_int max_reqframes; 473 u_int max_prireqframes; 474 u_int max_replyframes; 475 u_int max_evtframes; 476 char exclude_ids[80]; 477 478 struct timeval lastfail; 479 }; 480 481 struct mps_config_params { 482 MPI2_CONFIG_EXT_PAGE_HEADER_UNION hdr; 483 u_int action; 484 u_int page_address; /* Attributes, not a phys address */ 485 u_int status; 486 void *buffer; 487 u_int length; 488 int timeout; 489 void (*callback)(struct mps_softc *, struct mps_config_params *); 490 void *cbdata; 491 }; 492 493 struct scsi_read_capacity_eedp 494 { 495 uint8_t addr[8]; 496 uint8_t length[4]; 497 uint8_t protect; 498 }; 499 500 static __inline uint32_t 501 mps_regread(struct mps_softc *sc, uint32_t offset) 502 { 503 return (bus_space_read_4(sc->mps_btag, sc->mps_bhandle, offset)); 504 } 505 506 static __inline void 507 mps_regwrite(struct mps_softc *sc, uint32_t offset, uint32_t val) 508 { 509 bus_space_write_4(sc->mps_btag, sc->mps_bhandle, offset, val); 510 } 511 512 /* free_queue must have Little Endian address 513 * TODO- cm_reply_data is unwanted. We can remove it. 514 * */ 515 static __inline void 516 mps_free_reply(struct mps_softc *sc, uint32_t busaddr) 517 { 518 if (++sc->replyfreeindex >= sc->fqdepth) 519 sc->replyfreeindex = 0; 520 sc->free_queue[sc->replyfreeindex] = htole32(busaddr); 521 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); 522 } 523 524 static __inline struct mps_chain * 525 mps_alloc_chain(struct mps_softc *sc) 526 { 527 struct mps_chain *chain; 528 529 if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) { 530 TAILQ_REMOVE(&sc->chain_list, chain, chain_link); 531 sc->chain_free--; 532 if (sc->chain_free < sc->chain_free_lowwater) 533 sc->chain_free_lowwater = sc->chain_free; 534 } else 535 sc->chain_alloc_fail++; 536 return (chain); 537 } 538 539 static __inline void 540 mps_free_chain(struct mps_softc *sc, struct mps_chain *chain) 541 { 542 sc->chain_free++; 543 TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link); 544 } 545 546 static __inline void 547 mps_free_command(struct mps_softc *sc, struct mps_command *cm) 548 { 549 struct mps_chain *chain, *chain_temp; 550 551 KASSERT(cm->cm_state == MPS_CM_STATE_BUSY, 552 ("state not busy: %u\n", cm->cm_state)); 553 554 if (cm->cm_reply != NULL) 555 mps_free_reply(sc, cm->cm_reply_data); 556 cm->cm_reply = NULL; 557 cm->cm_flags = 0; 558 cm->cm_complete = NULL; 559 cm->cm_complete_data = NULL; 560 cm->cm_ccb = NULL; 561 cm->cm_targ = NULL; 562 cm->cm_max_segs = 0; 563 cm->cm_lun = 0; 564 cm->cm_state = MPS_CM_STATE_FREE; 565 cm->cm_data = NULL; 566 cm->cm_length = 0; 567 cm->cm_out_len = 0; 568 cm->cm_sglsize = 0; 569 cm->cm_sge = NULL; 570 571 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) { 572 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link); 573 mps_free_chain(sc, chain); 574 } 575 TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link); 576 } 577 578 static __inline struct mps_command * 579 mps_alloc_command(struct mps_softc *sc) 580 { 581 struct mps_command *cm; 582 583 cm = TAILQ_FIRST(&sc->req_list); 584 if (cm == NULL) 585 return (NULL); 586 587 KASSERT(cm->cm_state == MPS_CM_STATE_FREE, 588 ("mps: Allocating busy command: %u\n", cm->cm_state)); 589 590 TAILQ_REMOVE(&sc->req_list, cm, cm_link); 591 cm->cm_state = MPS_CM_STATE_BUSY; 592 cm->cm_timeout_handler = NULL; 593 return (cm); 594 } 595 596 static __inline void 597 mps_free_high_priority_command(struct mps_softc *sc, struct mps_command *cm) 598 { 599 struct mps_chain *chain, *chain_temp; 600 601 KASSERT(cm->cm_state == MPS_CM_STATE_BUSY, 602 ("state not busy: %u\n", cm->cm_state)); 603 604 if (cm->cm_reply != NULL) 605 mps_free_reply(sc, cm->cm_reply_data); 606 cm->cm_reply = NULL; 607 cm->cm_flags = 0; 608 cm->cm_complete = NULL; 609 cm->cm_complete_data = NULL; 610 cm->cm_ccb = NULL; 611 cm->cm_targ = NULL; 612 cm->cm_lun = 0; 613 cm->cm_state = MPS_CM_STATE_FREE; 614 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) { 615 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link); 616 mps_free_chain(sc, chain); 617 } 618 TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link); 619 } 620 621 static __inline struct mps_command * 622 mps_alloc_high_priority_command(struct mps_softc *sc) 623 { 624 struct mps_command *cm; 625 626 cm = TAILQ_FIRST(&sc->high_priority_req_list); 627 if (cm == NULL) 628 return (NULL); 629 630 KASSERT(cm->cm_state == MPS_CM_STATE_FREE, 631 ("mps: Allocating high priority busy command: %u\n", cm->cm_state)); 632 633 TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link); 634 cm->cm_state = MPS_CM_STATE_BUSY; 635 cm->cm_timeout_handler = NULL; 636 cm->cm_desc.HighPriority.RequestFlags = 637 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY; 638 return (cm); 639 } 640 641 static __inline void 642 mps_lock(struct mps_softc *sc) 643 { 644 mtx_lock(&sc->mps_mtx); 645 } 646 647 static __inline void 648 mps_unlock(struct mps_softc *sc) 649 { 650 mtx_unlock(&sc->mps_mtx); 651 } 652 653 #define MPS_INFO (1 << 0) /* Basic info */ 654 #define MPS_FAULT (1 << 1) /* Hardware faults */ 655 #define MPS_EVENT (1 << 2) /* Event data from the controller */ 656 #define MPS_LOG (1 << 3) /* Log data from the controller */ 657 #define MPS_RECOVERY (1 << 4) /* Command error recovery tracing */ 658 #define MPS_ERROR (1 << 5) /* Parameter errors, programming bugs */ 659 #define MPS_INIT (1 << 6) /* Things related to system init */ 660 #define MPS_XINFO (1 << 7) /* More detailed/noisy info */ 661 #define MPS_USER (1 << 8) /* Trace user-generated commands */ 662 #define MPS_MAPPING (1 << 9) /* Trace device mappings */ 663 #define MPS_TRACE (1 << 10) /* Function-by-function trace */ 664 665 #define MPS_SSU_DISABLE_SSD_DISABLE_HDD 0 666 #define MPS_SSU_ENABLE_SSD_DISABLE_HDD 1 667 #define MPS_SSU_DISABLE_SSD_ENABLE_HDD 2 668 #define MPS_SSU_ENABLE_SSD_ENABLE_HDD 3 669 670 #define mps_printf(sc, args...) \ 671 device_printf((sc)->mps_dev, ##args) 672 673 #define mps_print_field(sc, msg, args...) \ 674 printf("\t" msg, ##args) 675 676 #define mps_vprintf(sc, args...) \ 677 do { \ 678 if (bootverbose) \ 679 mps_printf(sc, ##args); \ 680 } while (0) 681 682 #define mps_dprint(sc, level, msg, args...) \ 683 do { \ 684 if ((sc)->mps_debug & (level)) \ 685 device_printf((sc)->mps_dev, msg, ##args); \ 686 } while (0) 687 688 #define MPS_PRINTFIELD_START(sc, tag...) \ 689 mps_printf((sc), ##tag); \ 690 mps_print_field((sc), ":\n") 691 #define MPS_PRINTFIELD_END(sc, tag) \ 692 mps_printf((sc), tag "\n") 693 #define MPS_PRINTFIELD(sc, facts, attr, fmt) \ 694 mps_print_field((sc), #attr ": " #fmt "\n", (facts)->attr) 695 696 #define MPS_FUNCTRACE(sc) \ 697 mps_dprint((sc), MPS_TRACE, "%s\n", __func__) 698 699 #define CAN_SLEEP 1 700 #define NO_SLEEP 0 701 702 static __inline void 703 mps_from_u64(uint64_t data, U64 *mps) 704 { 705 (mps)->High = htole32((uint32_t)((data) >> 32)); 706 (mps)->Low = htole32((uint32_t)((data) & 0xffffffff)); 707 } 708 709 static __inline uint64_t 710 mps_to_u64(U64 *data) 711 { 712 713 return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low)); 714 } 715 716 static __inline void 717 mps_mask_intr(struct mps_softc *sc) 718 { 719 uint32_t mask; 720 721 mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET); 722 mask |= MPI2_HIM_REPLY_INT_MASK; 723 mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask); 724 } 725 726 static __inline void 727 mps_unmask_intr(struct mps_softc *sc) 728 { 729 uint32_t mask; 730 731 mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET); 732 mask &= ~MPI2_HIM_REPLY_INT_MASK; 733 mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask); 734 } 735 736 int mps_pci_setup_interrupts(struct mps_softc *sc); 737 void mps_pci_free_interrupts(struct mps_softc *sc); 738 int mps_pci_restore(struct mps_softc *sc); 739 740 void mps_get_tunables(struct mps_softc *sc); 741 int mps_attach(struct mps_softc *sc); 742 int mps_free(struct mps_softc *sc); 743 void mps_intr(void *); 744 void mps_intr_msi(void *); 745 void mps_intr_locked(void *); 746 int mps_register_events(struct mps_softc *, u32 *, mps_evt_callback_t *, 747 void *, struct mps_event_handle **); 748 int mps_restart(struct mps_softc *); 749 int mps_update_events(struct mps_softc *, struct mps_event_handle *, u32 *); 750 void mps_deregister_events(struct mps_softc *, struct mps_event_handle *); 751 int mps_push_sge(struct mps_command *, void *, size_t, int); 752 int mps_add_dmaseg(struct mps_command *, vm_paddr_t, size_t, u_int, int); 753 int mps_attach_sas(struct mps_softc *sc); 754 int mps_detach_sas(struct mps_softc *sc); 755 int mps_read_config_page(struct mps_softc *, struct mps_config_params *); 756 int mps_write_config_page(struct mps_softc *, struct mps_config_params *); 757 void mps_memaddr_cb(void *, bus_dma_segment_t *, int , int ); 758 void mps_memaddr_wait_cb(void *, bus_dma_segment_t *, int , int ); 759 void mpi_init_sge(struct mps_command *cm, void *req, void *sge); 760 int mps_attach_user(struct mps_softc *); 761 void mps_detach_user(struct mps_softc *); 762 void mpssas_record_event(struct mps_softc *sc, 763 MPI2_EVENT_NOTIFICATION_REPLY *event_reply); 764 765 int mps_map_command(struct mps_softc *sc, struct mps_command *cm); 766 int mps_wait_command(struct mps_softc *sc, struct mps_command **cm, int timeout, 767 int sleep_flag); 768 769 int mps_config_get_bios_pg3(struct mps_softc *sc, Mpi2ConfigReply_t 770 *mpi_reply, Mpi2BiosPage3_t *config_page); 771 int mps_config_get_raid_volume_pg0(struct mps_softc *sc, Mpi2ConfigReply_t 772 *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address); 773 int mps_config_get_ioc_pg8(struct mps_softc *sc, Mpi2ConfigReply_t *, 774 Mpi2IOCPage8_t *); 775 int mps_config_get_man_pg10(struct mps_softc *sc, Mpi2ConfigReply_t *mpi_reply); 776 int mps_config_get_sas_device_pg0(struct mps_softc *, Mpi2ConfigReply_t *, 777 Mpi2SasDevicePage0_t *, u32 , u16 ); 778 int mps_config_get_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *, 779 Mpi2DriverMappingPage0_t *, u16 ); 780 int mps_config_get_raid_volume_pg1(struct mps_softc *sc, 781 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form, 782 u16 handle); 783 int mps_config_get_volume_wwid(struct mps_softc *sc, u16 volume_handle, 784 u64 *wwid); 785 int mps_config_get_raid_pd_pg0(struct mps_softc *sc, 786 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page, 787 u32 page_address); 788 void mpssas_ir_shutdown(struct mps_softc *sc, int howto); 789 790 int mps_reinit(struct mps_softc *sc); 791 void mpssas_handle_reinit(struct mps_softc *sc); 792 793 void mps_base_static_config_pages(struct mps_softc *sc); 794 void mps_wd_config_pages(struct mps_softc *sc); 795 796 int mps_mapping_initialize(struct mps_softc *); 797 void mps_mapping_topology_change_event(struct mps_softc *, 798 Mpi2EventDataSasTopologyChangeList_t *); 799 void mps_mapping_free_memory(struct mps_softc *sc); 800 int mps_config_set_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *, 801 Mpi2DriverMappingPage0_t *, u16 ); 802 void mps_mapping_exit(struct mps_softc *); 803 void mps_mapping_check_devices(void *); 804 int mps_mapping_allocate_memory(struct mps_softc *sc); 805 unsigned int mps_mapping_get_tid(struct mps_softc *, uint64_t , u16); 806 unsigned int mps_mapping_get_tid_from_handle(struct mps_softc *sc, 807 u16 handle); 808 unsigned int mps_mapping_get_raid_tid(struct mps_softc *sc, u64 wwid, 809 u16 volHandle); 810 unsigned int mps_mapping_get_raid_tid_from_handle(struct mps_softc *sc, 811 u16 volHandle); 812 void mps_mapping_enclosure_dev_status_change_event(struct mps_softc *, 813 Mpi2EventDataSasEnclDevStatusChange_t *event_data); 814 void mps_mapping_ir_config_change_event(struct mps_softc *sc, 815 Mpi2EventDataIrConfigChangeList_t *event_data); 816 int mps_mapping_dump(SYSCTL_HANDLER_ARGS); 817 int mps_mapping_encl_dump(SYSCTL_HANDLER_ARGS); 818 819 void mpssas_evt_handler(struct mps_softc *sc, uintptr_t data, 820 MPI2_EVENT_NOTIFICATION_REPLY *event); 821 void mpssas_prepare_remove(struct mpssas_softc *sassc, uint16_t handle); 822 void mpssas_prepare_volume_remove(struct mpssas_softc *sassc, uint16_t handle); 823 int mpssas_startup(struct mps_softc *sc); 824 struct mpssas_target * mpssas_find_target_by_handle(struct mpssas_softc *, int, uint16_t); 825 void mpssas_realloc_targets(struct mps_softc *sc, int maxtargets); 826 struct mps_command * mpssas_alloc_tm(struct mps_softc *sc); 827 void mpssas_free_tm(struct mps_softc *sc, struct mps_command *tm); 828 void mpssas_release_simq_reinit(struct mpssas_softc *sassc); 829 int mpssas_send_reset(struct mps_softc *sc, struct mps_command *tm, 830 uint8_t type); 831 832 SYSCTL_DECL(_hw_mps); 833 834 /* Compatibility shims for different OS versions */ 835 #if defined(CAM_PRIORITY_XPT) 836 #define MPS_PRIORITY_XPT CAM_PRIORITY_XPT 837 #else 838 #define MPS_PRIORITY_XPT 5 839 #endif 840 841 #endif 842