xref: /freebsd/sys/dev/mps/mpsvar.h (revision 6683132d54bd6d589889e43dabdc53d35e38a028)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2009 Yahoo! Inc.
5  * Copyright (c) 2011-2015 LSI Corp.
6  * Copyright (c) 2013-2015 Avago Technologies
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  *
30  * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
31  *
32  * $FreeBSD$
33  */
34 
35 #ifndef _MPSVAR_H
36 #define _MPSVAR_H
37 
38 #include <sys/lock.h>
39 #include <sys/mutex.h>
40 
41 #define MPS_DRIVER_VERSION	"21.02.00.00-fbsd"
42 
43 #define MPS_DB_MAX_WAIT		2500
44 
45 #define MPS_REQ_FRAMES		2048
46 #define MPS_PRI_REQ_FRAMES	128
47 #define MPS_EVT_REPLY_FRAMES	32
48 #define MPS_REPLY_FRAMES	MPS_REQ_FRAMES
49 #define MPS_CHAIN_FRAMES	16384
50 #define MPS_MAXIO_PAGES		(-1)
51 #define MPS_SENSE_LEN		SSD_FULL_SIZE
52 #define MPS_MSI_MAX		1
53 #define MPS_MSIX_MAX		16
54 #define MPS_SGE64_SIZE		12
55 #define MPS_SGE32_SIZE		8
56 #define MPS_SGC_SIZE		8
57 
58 #define	 CAN_SLEEP			1
59 #define  NO_SLEEP			0
60 
61 #define MPS_PERIODIC_DELAY	1	/* 1 second heartbeat/watchdog check */
62 #define MPS_ATA_ID_TIMEOUT	5	/* 5 second timeout for SATA ID cmd */
63 #define MPS_MISSING_CHECK_DELAY	10	/* 10 seconds between missing check */
64 
65 #define MPS_SCSI_RI_INVALID_FRAME	(0x00000002)
66 
67 #define DEFAULT_SPINUP_WAIT	3	/* seconds to wait for spinup */
68 
69 #include <sys/endian.h>
70 
71 /*
72  * host mapping related macro definitions
73  */
74 #define MPS_MAPTABLE_BAD_IDX	0xFFFFFFFF
75 #define MPS_DPM_BAD_IDX		0xFFFF
76 #define MPS_ENCTABLE_BAD_IDX	0xFF
77 #define MPS_MAX_MISSING_COUNT	0x0F
78 #define MPS_DEV_RESERVED	0x20000000
79 #define MPS_MAP_IN_USE		0x10000000
80 #define MPS_MAP_BAD_ID		0xFFFFFFFF
81 
82 /*
83  * WarpDrive controller
84  */
85 #define	MPS_CHIP_WD_DEVICE_ID	0x007E
86 #define	MPS_WD_LSI_OEM		0x80
87 #define	MPS_WD_HIDE_EXPOSE_MASK	0x03
88 #define	MPS_WD_HIDE_ALWAYS	0x00
89 #define	MPS_WD_EXPOSE_ALWAYS	0x01
90 #define	MPS_WD_HIDE_IF_VOLUME	0x02
91 #define	MPS_WD_RETRY		0x01
92 #define	MPS_MAN_PAGE10_SIZE	0x5C	/* Hardcode for now */
93 #define MPS_MAX_DISKS_IN_VOL	10
94 
95 /*
96  * WarpDrive Event Logging
97  */
98 #define	MPI2_WD_LOG_ENTRY	0x8002
99 #define	MPI2_WD_SSD_THROTTLING	0x0041
100 #define	MPI2_WD_DRIVE_LIFE_WARN	0x0043
101 #define	MPI2_WD_DRIVE_LIFE_DEAD	0x0044
102 #define	MPI2_WD_RAIL_MON_FAIL	0x004D
103 
104 typedef uint8_t u8;
105 typedef uint16_t u16;
106 typedef uint32_t u32;
107 typedef uint64_t u64;
108 
109 /**
110  * struct dev_mapping_table - device mapping information
111  * @physical_id: SAS address for drives or WWID for RAID volumes
112  * @device_info: bitfield provides detailed info about the device
113  * @phy_bits: bitfields indicating controller phys
114  * @dpm_entry_num: index of this device in device persistent map table
115  * @dev_handle: device handle for the device pointed by this entry
116  * @id: target id
117  * @missing_count: number of times the device not detected by driver
118  * @hide_flag: Hide this physical disk/not (foreign configuration)
119  * @init_complete: Whether the start of the day checks completed or not
120  */
121 struct dev_mapping_table {
122 	u64	physical_id;
123 	u32	device_info;
124 	u32	phy_bits;
125 	u16	dpm_entry_num;
126 	u16	dev_handle;
127 	u16	reserved1;
128 	u16	id;
129 	u8	missing_count;
130 	u8	init_complete;
131 	u8	TLR_bits;
132 	u8	reserved2;
133 };
134 
135 /**
136  * struct enc_mapping_table -  mapping information about an enclosure
137  * @enclosure_id: Logical ID of this enclosure
138  * @start_index: index to the entry in dev_mapping_table
139  * @phy_bits: bitfields indicating controller phys
140  * @dpm_entry_num: index of this enclosure in device persistent map table
141  * @enc_handle: device handle for the enclosure pointed by this entry
142  * @num_slots: number of slots in the enclosure
143  * @start_slot: Starting slot id
144  * @missing_count: number of times the device not detected by driver
145  * @removal_flag: used to mark the device for removal
146  * @skip_search: used as a flag to include/exclude enclosure for search
147  * @init_complete: Whether the start of the day checks completed or not
148  */
149 struct enc_mapping_table {
150 	u64	enclosure_id;
151 	u32	start_index;
152 	u32	phy_bits;
153 	u16	dpm_entry_num;
154 	u16	enc_handle;
155 	u16	num_slots;
156 	u16	start_slot;
157 	u8	missing_count;
158 	u8	removal_flag;
159 	u8	skip_search;
160 	u8	init_complete;
161 };
162 
163 /**
164  * struct map_removal_table - entries to be removed from mapping table
165  * @dpm_entry_num: index of this device in device persistent map table
166  * @dev_handle: device handle for the device pointed by this entry
167  */
168 struct map_removal_table{
169 	u16	dpm_entry_num;
170 	u16	dev_handle;
171 };
172 
173 typedef struct mps_fw_diagnostic_buffer {
174 	size_t		size;
175 	uint8_t		extended_type;
176 	uint8_t		buffer_type;
177 	uint8_t		force_release;
178 	uint32_t	product_specific[23];
179 	uint8_t		immediate;
180 	uint8_t		enabled;
181 	uint8_t		valid_data;
182 	uint8_t		owned_by_firmware;
183 	uint32_t	unique_id;
184 } mps_fw_diagnostic_buffer_t;
185 
186 struct mps_softc;
187 struct mps_command;
188 struct mpssas_softc;
189 union ccb;
190 struct mpssas_target;
191 struct mps_column_map;
192 
193 MALLOC_DECLARE(M_MPT2);
194 
195 typedef void mps_evt_callback_t(struct mps_softc *, uintptr_t,
196     MPI2_EVENT_NOTIFICATION_REPLY *reply);
197 typedef void mps_command_callback_t(struct mps_softc *, struct mps_command *cm);
198 
199 struct mps_chain {
200 	TAILQ_ENTRY(mps_chain)		chain_link;
201 	MPI2_SGE_IO_UNION		*chain;
202 	uint32_t			chain_busaddr;
203 };
204 
205 /*
206  * This needs to be at least 2 to support SMP passthrough.
207  */
208 #define       MPS_IOVEC_COUNT 2
209 
210 struct mps_command {
211 	TAILQ_ENTRY(mps_command)	cm_link;
212 	TAILQ_ENTRY(mps_command)	cm_recovery;
213 	struct mps_softc		*cm_sc;
214 	union ccb			*cm_ccb;
215 	void				*cm_data;
216 	u_int				cm_length;
217 	u_int				cm_out_len;
218 	struct uio			cm_uio;
219 	struct iovec			cm_iovec[MPS_IOVEC_COUNT];
220 	u_int				cm_max_segs;
221 	u_int				cm_sglsize;
222 	MPI2_SGE_IO_UNION		*cm_sge;
223 	uint8_t				*cm_req;
224 	uint8_t				*cm_reply;
225 	uint32_t			cm_reply_data;
226 	mps_command_callback_t		*cm_complete;
227 	void				*cm_complete_data;
228 	struct mpssas_target		*cm_targ;
229 	MPI2_REQUEST_DESCRIPTOR_UNION	cm_desc;
230 	u_int	                	cm_lun;
231 	u_int				cm_flags;
232 #define MPS_CM_FLAGS_POLLED		(1 << 0)
233 #define MPS_CM_FLAGS_COMPLETE		(1 << 1)
234 #define MPS_CM_FLAGS_SGE_SIMPLE		(1 << 2)
235 #define MPS_CM_FLAGS_DATAOUT		(1 << 3)
236 #define MPS_CM_FLAGS_DATAIN		(1 << 4)
237 #define MPS_CM_FLAGS_WAKEUP		(1 << 5)
238 #define MPS_CM_FLAGS_DD_IO		(1 << 6)
239 #define MPS_CM_FLAGS_USE_UIO		(1 << 7)
240 #define MPS_CM_FLAGS_SMP_PASS		(1 << 8)
241 #define	MPS_CM_FLAGS_CHAIN_FAILED	(1 << 9)
242 #define	MPS_CM_FLAGS_ERROR_MASK		MPS_CM_FLAGS_CHAIN_FAILED
243 #define	MPS_CM_FLAGS_USE_CCB		(1 << 10)
244 #define	MPS_CM_FLAGS_SATA_ID_TIMEOUT	(1 << 11)
245 	u_int				cm_state;
246 #define MPS_CM_STATE_FREE		0
247 #define MPS_CM_STATE_BUSY		1
248 #define MPS_CM_STATE_TIMEDOUT		2
249 #define MPS_CM_STATE_INQUEUE		3
250 	bus_dmamap_t			cm_dmamap;
251 	struct scsi_sense_data		*cm_sense;
252 	TAILQ_HEAD(, mps_chain)		cm_chain_list;
253 	uint32_t			cm_req_busaddr;
254 	uint32_t			cm_sense_busaddr;
255 	struct callout			cm_callout;
256 	mps_command_callback_t		*cm_timeout_handler;
257 };
258 
259 struct mps_column_map {
260 	uint16_t			dev_handle;
261 	uint8_t				phys_disk_num;
262 };
263 
264 struct mps_event_handle {
265 	TAILQ_ENTRY(mps_event_handle)	eh_list;
266 	mps_evt_callback_t		*callback;
267 	void				*data;
268 	u32				mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
269 };
270 
271 struct mps_busdma_context {
272 	int				completed;
273 	int				abandoned;
274 	int				error;
275 	bus_addr_t			*addr;
276 	struct mps_softc		*softc;
277 	bus_dmamap_t			buffer_dmamap;
278 	bus_dma_tag_t			buffer_dmat;
279 };
280 
281 struct mps_queue {
282 	struct mps_softc		*sc;
283 	int				qnum;
284 	MPI2_REPLY_DESCRIPTORS_UNION	*post_queue;
285 	int				replypostindex;
286 #ifdef notyet
287 	ck_ring_buffer_t		*ringmem;
288 	ck_ring_buffer_t		*chainmem;
289 	ck_ring_t			req_ring;
290 	ck_ring_t			chain_ring;
291 #endif
292 	bus_dma_tag_t			buffer_dmat;
293 	int				io_cmds_highwater;
294 	int				chain_free_lowwater;
295 	int				chain_alloc_fail;
296 	struct resource			*irq;
297 	void				*intrhand;
298 	int				irq_rid;
299 };
300 
301 struct mps_softc {
302 	device_t			mps_dev;
303 	struct cdev			*mps_cdev;
304 	u_int				mps_flags;
305 #define MPS_FLAGS_INTX		(1 << 0)
306 #define MPS_FLAGS_MSI		(1 << 1)
307 #define MPS_FLAGS_BUSY		(1 << 2)
308 #define MPS_FLAGS_SHUTDOWN	(1 << 3)
309 #define MPS_FLAGS_DIAGRESET	(1 << 4)
310 #define	MPS_FLAGS_ATTACH_DONE	(1 << 5)
311 #define	MPS_FLAGS_WD_AVAILABLE	(1 << 6)
312 #define	MPS_FLAGS_REALLOCATED	(1 << 7)
313 	u_int				mps_debug;
314 	u_int				msi_msgs;
315 	u_int				reqframesz;
316 	u_int				replyframesz;
317 	int				tm_cmds_active;
318 	int				io_cmds_active;
319 	int				io_cmds_highwater;
320 	int				chain_free;
321 	int				max_chains;
322 	int				max_io_pages;
323 	u_int				maxio;
324 	int				chain_free_lowwater;
325 	u_int				enable_ssu;
326 	int				spinup_wait_time;
327 	int				use_phynum;
328 	uint64_t			chain_alloc_fail;
329 	struct sysctl_ctx_list		sysctl_ctx;
330 	struct sysctl_oid		*sysctl_tree;
331 	char                            fw_version[16];
332 	struct mps_command		*commands;
333 	struct mps_chain		*chains;
334 	struct callout			periodic;
335 	struct callout			device_check_callout;
336 	struct mps_queue		*queues;
337 
338 	struct mpssas_softc		*sassc;
339 	TAILQ_HEAD(, mps_command)	req_list;
340 	TAILQ_HEAD(, mps_command)	high_priority_req_list;
341 	TAILQ_HEAD(, mps_chain)		chain_list;
342 	TAILQ_HEAD(, mps_command)	tm_list;
343 	int				replypostindex;
344 	int				replyfreeindex;
345 
346 	struct resource			*mps_regs_resource;
347 	bus_space_handle_t		mps_bhandle;
348 	bus_space_tag_t			mps_btag;
349 	int				mps_regs_rid;
350 
351 	bus_dma_tag_t			mps_parent_dmat;
352 	bus_dma_tag_t			buffer_dmat;
353 
354 	MPI2_IOC_FACTS_REPLY		*facts;
355 	int				num_reqs;
356 	int				num_prireqs;
357 	int				num_replies;
358 	int				num_chains;
359 	int				fqdepth;	/* Free queue */
360 	int				pqdepth;	/* Post queue */
361 
362 	u32             event_mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
363 	TAILQ_HEAD(, mps_event_handle)	event_list;
364 	struct mps_event_handle		*mps_log_eh;
365 
366 	struct mtx			mps_mtx;
367 	struct intr_config_hook		mps_ich;
368 
369 	uint8_t				*req_frames;
370 	bus_addr_t			req_busaddr;
371 	bus_dma_tag_t			req_dmat;
372 	bus_dmamap_t			req_map;
373 
374 	uint8_t				*reply_frames;
375 	bus_addr_t			reply_busaddr;
376 	bus_dma_tag_t			reply_dmat;
377 	bus_dmamap_t			reply_map;
378 
379 	struct scsi_sense_data		*sense_frames;
380 	bus_addr_t			sense_busaddr;
381 	bus_dma_tag_t			sense_dmat;
382 	bus_dmamap_t			sense_map;
383 
384 	uint8_t				*chain_frames;
385 	bus_dma_tag_t			chain_dmat;
386 	bus_dmamap_t			chain_map;
387 
388 	MPI2_REPLY_DESCRIPTORS_UNION	*post_queue;
389 	bus_addr_t			post_busaddr;
390 	uint32_t			*free_queue;
391 	bus_addr_t			free_busaddr;
392 	bus_dma_tag_t			queues_dmat;
393 	bus_dmamap_t			queues_map;
394 
395 	uint8_t				*fw_diag_buffer;
396 	bus_addr_t			fw_diag_busaddr;
397 	bus_dma_tag_t			fw_diag_dmat;
398 	bus_dmamap_t			fw_diag_map;
399 
400 	uint8_t				ir_firmware;
401 
402 	/* static config pages */
403 	Mpi2IOCPage8_t			ioc_pg8;
404 
405 	/* host mapping support */
406 	struct dev_mapping_table	*mapping_table;
407 	struct enc_mapping_table	*enclosure_table;
408 	struct map_removal_table	*removal_table;
409 	uint8_t				*dpm_entry_used;
410 	uint8_t				*dpm_flush_entry;
411 	Mpi2DriverMappingPage0_t	*dpm_pg0;
412 	uint16_t			max_devices;
413 	uint16_t			max_enclosures;
414 	uint16_t			max_expanders;
415 	uint8_t				max_volumes;
416 	uint8_t				num_enc_table_entries;
417 	uint8_t				num_rsvd_entries;
418 	uint16_t			max_dpm_entries;
419 	uint8_t				is_dpm_enable;
420 	uint8_t				track_mapping_events;
421 	uint32_t			pending_map_events;
422 
423 	/* FW diag Buffer List */
424 	mps_fw_diagnostic_buffer_t
425 				fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT];
426 
427 	/* Event Recording IOCTL support */
428 	uint32_t			events_to_record[4];
429 	mps_event_entry_t		recorded_events[MPS_EVENT_QUEUE_SIZE];
430 	uint8_t				event_index;
431 	uint32_t			event_number;
432 
433 	/* EEDP and TLR support */
434 	uint8_t				eedp_enabled;
435 	uint8_t				control_TLR;
436 
437 	/* Shutdown Event Handler */
438 	eventhandler_tag		shutdown_eh;
439 
440 	/* To track topo events during reset */
441 #define	MPS_DIAG_RESET_TIMEOUT	300000
442 	uint8_t				wait_for_port_enable;
443 	uint8_t				port_enable_complete;
444 	uint8_t				msleep_fake_chan;
445 
446 	/* WD controller */
447 	uint8_t             WD_available;
448 	uint8_t				WD_valid_config;
449 	uint8_t				WD_hide_expose;
450 
451 	/* Direct Drive for WarpDrive */
452 	uint8_t				DD_num_phys_disks;
453 	uint16_t			DD_dev_handle;
454 	uint32_t			DD_stripe_size;
455 	uint32_t			DD_stripe_exponent;
456 	uint32_t			DD_block_size;
457 	uint16_t			DD_block_exponent;
458 	uint64_t			DD_max_lba;
459 	struct mps_column_map		DD_column_map[MPS_MAX_DISKS_IN_VOL];
460 
461 	/* StartStopUnit command handling at shutdown */
462 	uint32_t			SSU_refcount;
463 	uint8_t				SSU_started;
464 
465 	/* Configuration tunables */
466 	u_int				disable_msix;
467 	u_int				disable_msi;
468 	u_int				max_msix;
469 	u_int				max_reqframes;
470 	u_int				max_prireqframes;
471 	u_int				max_replyframes;
472 	u_int				max_evtframes;
473 	char				exclude_ids[80];
474 
475 	struct timeval			lastfail;
476 };
477 
478 struct mps_config_params {
479 	MPI2_CONFIG_EXT_PAGE_HEADER_UNION	hdr;
480 	u_int		action;
481 	u_int		page_address;	/* Attributes, not a phys address */
482 	u_int		status;
483 	void		*buffer;
484 	u_int		length;
485 	int		timeout;
486 	void		(*callback)(struct mps_softc *, struct mps_config_params *);
487 	void		*cbdata;
488 };
489 
490 struct scsi_read_capacity_eedp
491 {
492 	uint8_t addr[8];
493 	uint8_t length[4];
494 	uint8_t protect;
495 };
496 
497 static __inline uint32_t
498 mps_regread(struct mps_softc *sc, uint32_t offset)
499 {
500 	return (bus_space_read_4(sc->mps_btag, sc->mps_bhandle, offset));
501 }
502 
503 static __inline void
504 mps_regwrite(struct mps_softc *sc, uint32_t offset, uint32_t val)
505 {
506 	bus_space_write_4(sc->mps_btag, sc->mps_bhandle, offset, val);
507 }
508 
509 /* free_queue must have Little Endian address
510  * TODO- cm_reply_data is unwanted. We can remove it.
511  * */
512 static __inline void
513 mps_free_reply(struct mps_softc *sc, uint32_t busaddr)
514 {
515 	if (++sc->replyfreeindex >= sc->fqdepth)
516 		sc->replyfreeindex = 0;
517 	sc->free_queue[sc->replyfreeindex] = htole32(busaddr);
518 	mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
519 }
520 
521 static __inline struct mps_chain *
522 mps_alloc_chain(struct mps_softc *sc)
523 {
524 	struct mps_chain *chain;
525 
526 	if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) {
527 		TAILQ_REMOVE(&sc->chain_list, chain, chain_link);
528 		sc->chain_free--;
529 		if (sc->chain_free < sc->chain_free_lowwater)
530 			sc->chain_free_lowwater = sc->chain_free;
531 	} else
532 		sc->chain_alloc_fail++;
533 	return (chain);
534 }
535 
536 static __inline void
537 mps_free_chain(struct mps_softc *sc, struct mps_chain *chain)
538 {
539 	sc->chain_free++;
540 	TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link);
541 }
542 
543 static __inline void
544 mps_free_command(struct mps_softc *sc, struct mps_command *cm)
545 {
546 	struct mps_chain *chain, *chain_temp;
547 
548 	KASSERT(cm->cm_state == MPS_CM_STATE_BUSY, ("state not busy\n"));
549 
550 	if (cm->cm_reply != NULL)
551 		mps_free_reply(sc, cm->cm_reply_data);
552 	cm->cm_reply = NULL;
553 	cm->cm_flags = 0;
554 	cm->cm_complete = NULL;
555 	cm->cm_complete_data = NULL;
556 	cm->cm_ccb = NULL;
557 	cm->cm_targ = NULL;
558 	cm->cm_max_segs = 0;
559 	cm->cm_lun = 0;
560 	cm->cm_state = MPS_CM_STATE_FREE;
561 	cm->cm_data = NULL;
562 	cm->cm_length = 0;
563 	cm->cm_out_len = 0;
564 	cm->cm_sglsize = 0;
565 	cm->cm_sge = NULL;
566 
567 	TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
568 		TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
569 		mps_free_chain(sc, chain);
570 	}
571 	TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link);
572 }
573 
574 static __inline struct mps_command *
575 mps_alloc_command(struct mps_softc *sc)
576 {
577 	struct mps_command *cm;
578 
579 	cm = TAILQ_FIRST(&sc->req_list);
580 	if (cm == NULL)
581 		return (NULL);
582 
583 	KASSERT(cm->cm_state == MPS_CM_STATE_FREE,
584 	    ("mps: Allocating busy command\n"));
585 
586 	TAILQ_REMOVE(&sc->req_list, cm, cm_link);
587 	cm->cm_state = MPS_CM_STATE_BUSY;
588 	cm->cm_timeout_handler = NULL;
589 	return (cm);
590 }
591 
592 static __inline void
593 mps_free_high_priority_command(struct mps_softc *sc, struct mps_command *cm)
594 {
595 	struct mps_chain *chain, *chain_temp;
596 
597 	KASSERT(cm->cm_state == MPS_CM_STATE_BUSY, ("state not busy\n"));
598 
599 	if (cm->cm_reply != NULL)
600 		mps_free_reply(sc, cm->cm_reply_data);
601 	cm->cm_reply = NULL;
602 	cm->cm_flags = 0;
603 	cm->cm_complete = NULL;
604 	cm->cm_complete_data = NULL;
605 	cm->cm_ccb = NULL;
606 	cm->cm_targ = NULL;
607 	cm->cm_lun = 0;
608 	cm->cm_state = MPS_CM_STATE_FREE;
609 	TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
610 		TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
611 		mps_free_chain(sc, chain);
612 	}
613 	TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link);
614 }
615 
616 static __inline struct mps_command *
617 mps_alloc_high_priority_command(struct mps_softc *sc)
618 {
619 	struct mps_command *cm;
620 
621 	cm = TAILQ_FIRST(&sc->high_priority_req_list);
622 	if (cm == NULL)
623 		return (NULL);
624 
625 	KASSERT(cm->cm_state == MPS_CM_STATE_FREE,
626 	    ("mps: Allocating busy command\n"));
627 
628 	TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link);
629 	cm->cm_state = MPS_CM_STATE_BUSY;
630 	cm->cm_timeout_handler = NULL;
631 	cm->cm_desc.HighPriority.RequestFlags =
632 	    MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
633 	return (cm);
634 }
635 
636 static __inline void
637 mps_lock(struct mps_softc *sc)
638 {
639 	mtx_lock(&sc->mps_mtx);
640 }
641 
642 static __inline void
643 mps_unlock(struct mps_softc *sc)
644 {
645 	mtx_unlock(&sc->mps_mtx);
646 }
647 
648 #define MPS_INFO	(1 << 0)	/* Basic info */
649 #define MPS_FAULT	(1 << 1)	/* Hardware faults */
650 #define MPS_EVENT	(1 << 2)	/* Event data from the controller */
651 #define MPS_LOG		(1 << 3)	/* Log data from the controller */
652 #define MPS_RECOVERY	(1 << 4)	/* Command error recovery tracing */
653 #define MPS_ERROR	(1 << 5)	/* Parameter errors, programming bugs */
654 #define MPS_INIT	(1 << 6)	/* Things related to system init */
655 #define MPS_XINFO	(1 << 7)	/* More detailed/noisy info */
656 #define MPS_USER	(1 << 8)	/* Trace user-generated commands */
657 #define MPS_MAPPING	(1 << 9)	/* Trace device mappings */
658 #define MPS_TRACE	(1 << 10)	/* Function-by-function trace */
659 
660 #define	MPS_SSU_DISABLE_SSD_DISABLE_HDD	0
661 #define	MPS_SSU_ENABLE_SSD_DISABLE_HDD	1
662 #define	MPS_SSU_DISABLE_SSD_ENABLE_HDD	2
663 #define	MPS_SSU_ENABLE_SSD_ENABLE_HDD	3
664 
665 #define mps_printf(sc, args...)				\
666 	device_printf((sc)->mps_dev, ##args)
667 
668 #define mps_print_field(sc, msg, args...)		\
669 	printf("\t" msg, ##args)
670 
671 #define mps_vprintf(sc, args...)			\
672 do {							\
673 	if (bootverbose)				\
674 		mps_printf(sc, ##args);			\
675 } while (0)
676 
677 #define mps_dprint(sc, level, msg, args...)		\
678 do {							\
679 	if ((sc)->mps_debug & (level))			\
680 		device_printf((sc)->mps_dev, msg, ##args);	\
681 } while (0)
682 
683 #define MPS_PRINTFIELD_START(sc, tag...)	\
684 	mps_printf((sc), ##tag);			\
685 	mps_print_field((sc), ":\n")
686 #define MPS_PRINTFIELD_END(sc, tag)		\
687 	mps_printf((sc), tag "\n")
688 #define MPS_PRINTFIELD(sc, facts, attr, fmt)	\
689 	mps_print_field((sc), #attr ": " #fmt "\n", (facts)->attr)
690 
691 #define MPS_FUNCTRACE(sc)			\
692 	mps_dprint((sc), MPS_TRACE, "%s\n", __func__)
693 
694 #define  CAN_SLEEP                      1
695 #define  NO_SLEEP                       0
696 
697 static __inline void
698 mps_from_u64(uint64_t data, U64 *mps)
699 {
700 	(mps)->High = htole32((uint32_t)((data) >> 32));
701 	(mps)->Low = htole32((uint32_t)((data) & 0xffffffff));
702 }
703 
704 static __inline uint64_t
705 mps_to_u64(U64 *data)
706 {
707 
708 	return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low));
709 }
710 
711 static __inline void
712 mps_mask_intr(struct mps_softc *sc)
713 {
714 	uint32_t mask;
715 
716 	mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
717 	mask |= MPI2_HIM_REPLY_INT_MASK;
718 	mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
719 }
720 
721 static __inline void
722 mps_unmask_intr(struct mps_softc *sc)
723 {
724 	uint32_t mask;
725 
726 	mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
727 	mask &= ~MPI2_HIM_REPLY_INT_MASK;
728 	mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
729 }
730 
731 int mps_pci_setup_interrupts(struct mps_softc *sc);
732 void mps_pci_free_interrupts(struct mps_softc *sc);
733 int mps_pci_restore(struct mps_softc *sc);
734 
735 void mps_get_tunables(struct mps_softc *sc);
736 int mps_attach(struct mps_softc *sc);
737 int mps_free(struct mps_softc *sc);
738 void mps_intr(void *);
739 void mps_intr_msi(void *);
740 void mps_intr_locked(void *);
741 int mps_register_events(struct mps_softc *, u32 *, mps_evt_callback_t *,
742     void *, struct mps_event_handle **);
743 int mps_restart(struct mps_softc *);
744 int mps_update_events(struct mps_softc *, struct mps_event_handle *, u32 *);
745 void mps_deregister_events(struct mps_softc *, struct mps_event_handle *);
746 int mps_push_sge(struct mps_command *, void *, size_t, int);
747 int mps_add_dmaseg(struct mps_command *, vm_paddr_t, size_t, u_int, int);
748 int mps_attach_sas(struct mps_softc *sc);
749 int mps_detach_sas(struct mps_softc *sc);
750 int mps_read_config_page(struct mps_softc *, struct mps_config_params *);
751 int mps_write_config_page(struct mps_softc *, struct mps_config_params *);
752 void mps_memaddr_cb(void *, bus_dma_segment_t *, int , int );
753 void mps_memaddr_wait_cb(void *, bus_dma_segment_t *, int , int );
754 void mpi_init_sge(struct mps_command *cm, void *req, void *sge);
755 int mps_attach_user(struct mps_softc *);
756 void mps_detach_user(struct mps_softc *);
757 void mpssas_record_event(struct mps_softc *sc,
758     MPI2_EVENT_NOTIFICATION_REPLY *event_reply);
759 
760 int mps_map_command(struct mps_softc *sc, struct mps_command *cm);
761 int mps_wait_command(struct mps_softc *sc, struct mps_command **cm, int timeout,
762     int sleep_flag);
763 
764 int mps_config_get_bios_pg3(struct mps_softc *sc, Mpi2ConfigReply_t
765     *mpi_reply, Mpi2BiosPage3_t *config_page);
766 int mps_config_get_raid_volume_pg0(struct mps_softc *sc, Mpi2ConfigReply_t
767     *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address);
768 int mps_config_get_ioc_pg8(struct mps_softc *sc, Mpi2ConfigReply_t *,
769     Mpi2IOCPage8_t *);
770 int mps_config_get_man_pg10(struct mps_softc *sc, Mpi2ConfigReply_t *mpi_reply);
771 int mps_config_get_sas_device_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
772     Mpi2SasDevicePage0_t *, u32 , u16 );
773 int mps_config_get_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
774     Mpi2DriverMappingPage0_t *, u16 );
775 int mps_config_get_raid_volume_pg1(struct mps_softc *sc,
776     Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
777     u16 handle);
778 int mps_config_get_volume_wwid(struct mps_softc *sc, u16 volume_handle,
779     u64 *wwid);
780 int mps_config_get_raid_pd_pg0(struct mps_softc *sc,
781     Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
782     u32 page_address);
783 void mpssas_ir_shutdown(struct mps_softc *sc, int howto);
784 
785 int mps_reinit(struct mps_softc *sc);
786 void mpssas_handle_reinit(struct mps_softc *sc);
787 
788 void mps_base_static_config_pages(struct mps_softc *sc);
789 void mps_wd_config_pages(struct mps_softc *sc);
790 
791 int mps_mapping_initialize(struct mps_softc *);
792 void mps_mapping_topology_change_event(struct mps_softc *,
793     Mpi2EventDataSasTopologyChangeList_t *);
794 void mps_mapping_free_memory(struct mps_softc *sc);
795 int mps_config_set_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
796     Mpi2DriverMappingPage0_t *, u16 );
797 void mps_mapping_exit(struct mps_softc *);
798 void mps_mapping_check_devices(void *);
799 int mps_mapping_allocate_memory(struct mps_softc *sc);
800 unsigned int mps_mapping_get_tid(struct mps_softc *, uint64_t , u16);
801 unsigned int mps_mapping_get_tid_from_handle(struct mps_softc *sc,
802     u16 handle);
803 unsigned int mps_mapping_get_raid_tid(struct mps_softc *sc, u64 wwid,
804      u16 volHandle);
805 unsigned int mps_mapping_get_raid_tid_from_handle(struct mps_softc *sc,
806     u16 volHandle);
807 void mps_mapping_enclosure_dev_status_change_event(struct mps_softc *,
808     Mpi2EventDataSasEnclDevStatusChange_t *event_data);
809 void mps_mapping_ir_config_change_event(struct mps_softc *sc,
810     Mpi2EventDataIrConfigChangeList_t *event_data);
811 int mps_mapping_dump(SYSCTL_HANDLER_ARGS);
812 int mps_mapping_encl_dump(SYSCTL_HANDLER_ARGS);
813 
814 void mpssas_evt_handler(struct mps_softc *sc, uintptr_t data,
815     MPI2_EVENT_NOTIFICATION_REPLY *event);
816 void mpssas_prepare_remove(struct mpssas_softc *sassc, uint16_t handle);
817 void mpssas_prepare_volume_remove(struct mpssas_softc *sassc, uint16_t handle);
818 int mpssas_startup(struct mps_softc *sc);
819 struct mpssas_target * mpssas_find_target_by_handle(struct mpssas_softc *, int, uint16_t);
820 void mpssas_realloc_targets(struct mps_softc *sc, int maxtargets);
821 struct mps_command * mpssas_alloc_tm(struct mps_softc *sc);
822 void mpssas_free_tm(struct mps_softc *sc, struct mps_command *tm);
823 void mpssas_release_simq_reinit(struct mpssas_softc *sassc);
824 int mpssas_send_reset(struct mps_softc *sc, struct mps_command *tm,
825     uint8_t type);
826 
827 SYSCTL_DECL(_hw_mps);
828 
829 /* Compatibility shims for different OS versions */
830 #if __FreeBSD_version >= 800001
831 #define mps_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
832     kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg)
833 #define mps_kproc_exit(arg)	kproc_exit(arg)
834 #else
835 #define mps_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
836     kthread_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg)
837 #define mps_kproc_exit(arg)	kthread_exit(arg)
838 #endif
839 
840 #if defined(CAM_PRIORITY_XPT)
841 #define MPS_PRIORITY_XPT	CAM_PRIORITY_XPT
842 #else
843 #define MPS_PRIORITY_XPT	5
844 #endif
845 
846 #if __FreeBSD_version < 800107
847 // Prior to FreeBSD-8.0 scp3_flags was not defined.
848 #define spc3_flags reserved
849 
850 #define SPC3_SID_PROTECT    0x01
851 #define SPC3_SID_3PC        0x08
852 #define SPC3_SID_TPGS_MASK  0x30
853 #define SPC3_SID_TPGS_IMPLICIT  0x10
854 #define SPC3_SID_TPGS_EXPLICIT  0x20
855 #define SPC3_SID_ACC        0x40
856 #define SPC3_SID_SCCS       0x80
857 
858 #define CAM_PRIORITY_NORMAL CAM_PRIORITY_NONE
859 #endif
860 
861 #endif
862 
863