xref: /freebsd/sys/dev/mps/mpsvar.h (revision 47dd1d1b619cc035b82b49a91a25544309ff95ae)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2009 Yahoo! Inc.
5  * Copyright (c) 2011-2015 LSI Corp.
6  * Copyright (c) 2013-2015 Avago Technologies
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  *
30  * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
31  *
32  * $FreeBSD$
33  */
34 
35 #ifndef _MPSVAR_H
36 #define _MPSVAR_H
37 
38 #define MPS_DRIVER_VERSION	"21.02.00.00-fbsd"
39 
40 #define MPS_DB_MAX_WAIT		2500
41 
42 #define MPS_REQ_FRAMES		2048
43 #define MPS_PRI_REQ_FRAMES	128
44 #define MPS_EVT_REPLY_FRAMES	32
45 #define MPS_REPLY_FRAMES	MPS_REQ_FRAMES
46 #define MPS_CHAIN_FRAMES	16384
47 #define MPS_MAXIO_PAGES		(-1)
48 #define MPS_SENSE_LEN		SSD_FULL_SIZE
49 #define MPS_MSI_MAX		1
50 #define MPS_MSIX_MAX		16
51 #define MPS_SGE64_SIZE		12
52 #define MPS_SGE32_SIZE		8
53 #define MPS_SGC_SIZE		8
54 
55 #define	 CAN_SLEEP			1
56 #define  NO_SLEEP			0
57 
58 #define MPS_PERIODIC_DELAY	1	/* 1 second heartbeat/watchdog check */
59 #define MPS_ATA_ID_TIMEOUT	5	/* 5 second timeout for SATA ID cmd */
60 #define MPS_MISSING_CHECK_DELAY	10	/* 10 seconds between missing check */
61 
62 #define MPS_SCSI_RI_INVALID_FRAME	(0x00000002)
63 
64 #define DEFAULT_SPINUP_WAIT	3	/* seconds to wait for spinup */
65 
66 #include <sys/endian.h>
67 
68 /*
69  * host mapping related macro definitions
70  */
71 #define MPS_MAPTABLE_BAD_IDX	0xFFFFFFFF
72 #define MPS_DPM_BAD_IDX		0xFFFF
73 #define MPS_ENCTABLE_BAD_IDX	0xFF
74 #define MPS_MAX_MISSING_COUNT	0x0F
75 #define MPS_DEV_RESERVED	0x20000000
76 #define MPS_MAP_IN_USE		0x10000000
77 #define MPS_MAP_BAD_ID		0xFFFFFFFF
78 
79 /*
80  * WarpDrive controller
81  */
82 #define	MPS_CHIP_WD_DEVICE_ID	0x007E
83 #define	MPS_WD_LSI_OEM		0x80
84 #define	MPS_WD_HIDE_EXPOSE_MASK	0x03
85 #define	MPS_WD_HIDE_ALWAYS	0x00
86 #define	MPS_WD_EXPOSE_ALWAYS	0x01
87 #define	MPS_WD_HIDE_IF_VOLUME	0x02
88 #define	MPS_WD_RETRY		0x01
89 #define	MPS_MAN_PAGE10_SIZE	0x5C	/* Hardcode for now */
90 #define MPS_MAX_DISKS_IN_VOL	10
91 
92 /*
93  * WarpDrive Event Logging
94  */
95 #define	MPI2_WD_LOG_ENTRY	0x8002
96 #define	MPI2_WD_SSD_THROTTLING	0x0041
97 #define	MPI2_WD_DRIVE_LIFE_WARN	0x0043
98 #define	MPI2_WD_DRIVE_LIFE_DEAD	0x0044
99 #define	MPI2_WD_RAIL_MON_FAIL	0x004D
100 
101 typedef uint8_t u8;
102 typedef uint16_t u16;
103 typedef uint32_t u32;
104 typedef uint64_t u64;
105 
106 /**
107  * struct dev_mapping_table - device mapping information
108  * @physical_id: SAS address for drives or WWID for RAID volumes
109  * @device_info: bitfield provides detailed info about the device
110  * @phy_bits: bitfields indicating controller phys
111  * @dpm_entry_num: index of this device in device persistent map table
112  * @dev_handle: device handle for the device pointed by this entry
113  * @id: target id
114  * @missing_count: number of times the device not detected by driver
115  * @hide_flag: Hide this physical disk/not (foreign configuration)
116  * @init_complete: Whether the start of the day checks completed or not
117  */
118 struct dev_mapping_table {
119 	u64	physical_id;
120 	u32	device_info;
121 	u32	phy_bits;
122 	u16	dpm_entry_num;
123 	u16	dev_handle;
124 	u16	reserved1;
125 	u16	id;
126 	u8	missing_count;
127 	u8	init_complete;
128 	u8	TLR_bits;
129 	u8	reserved2;
130 };
131 
132 /**
133  * struct enc_mapping_table -  mapping information about an enclosure
134  * @enclosure_id: Logical ID of this enclosure
135  * @start_index: index to the entry in dev_mapping_table
136  * @phy_bits: bitfields indicating controller phys
137  * @dpm_entry_num: index of this enclosure in device persistent map table
138  * @enc_handle: device handle for the enclosure pointed by this entry
139  * @num_slots: number of slots in the enclosure
140  * @start_slot: Starting slot id
141  * @missing_count: number of times the device not detected by driver
142  * @removal_flag: used to mark the device for removal
143  * @skip_search: used as a flag to include/exclude enclosure for search
144  * @init_complete: Whether the start of the day checks completed or not
145  */
146 struct enc_mapping_table {
147 	u64	enclosure_id;
148 	u32	start_index;
149 	u32	phy_bits;
150 	u16	dpm_entry_num;
151 	u16	enc_handle;
152 	u16	num_slots;
153 	u16	start_slot;
154 	u8	missing_count;
155 	u8	removal_flag;
156 	u8	skip_search;
157 	u8	init_complete;
158 };
159 
160 /**
161  * struct map_removal_table - entries to be removed from mapping table
162  * @dpm_entry_num: index of this device in device persistent map table
163  * @dev_handle: device handle for the device pointed by this entry
164  */
165 struct map_removal_table{
166 	u16	dpm_entry_num;
167 	u16	dev_handle;
168 };
169 
170 typedef struct mps_fw_diagnostic_buffer {
171 	size_t		size;
172 	uint8_t		extended_type;
173 	uint8_t		buffer_type;
174 	uint8_t		force_release;
175 	uint32_t	product_specific[23];
176 	uint8_t		immediate;
177 	uint8_t		enabled;
178 	uint8_t		valid_data;
179 	uint8_t		owned_by_firmware;
180 	uint32_t	unique_id;
181 } mps_fw_diagnostic_buffer_t;
182 
183 struct mps_softc;
184 struct mps_command;
185 struct mpssas_softc;
186 union ccb;
187 struct mpssas_target;
188 struct mps_column_map;
189 
190 MALLOC_DECLARE(M_MPT2);
191 
192 typedef void mps_evt_callback_t(struct mps_softc *, uintptr_t,
193     MPI2_EVENT_NOTIFICATION_REPLY *reply);
194 typedef void mps_command_callback_t(struct mps_softc *, struct mps_command *cm);
195 
196 struct mps_chain {
197 	TAILQ_ENTRY(mps_chain)		chain_link;
198 	MPI2_SGE_IO_UNION		*chain;
199 	uint32_t			chain_busaddr;
200 };
201 
202 /*
203  * This needs to be at least 2 to support SMP passthrough.
204  */
205 #define       MPS_IOVEC_COUNT 2
206 
207 struct mps_command {
208 	TAILQ_ENTRY(mps_command)	cm_link;
209 	TAILQ_ENTRY(mps_command)	cm_recovery;
210 	struct mps_softc		*cm_sc;
211 	union ccb			*cm_ccb;
212 	void				*cm_data;
213 	u_int				cm_length;
214 	u_int				cm_out_len;
215 	struct uio			cm_uio;
216 	struct iovec			cm_iovec[MPS_IOVEC_COUNT];
217 	u_int				cm_max_segs;
218 	u_int				cm_sglsize;
219 	MPI2_SGE_IO_UNION		*cm_sge;
220 	uint8_t				*cm_req;
221 	uint8_t				*cm_reply;
222 	uint32_t			cm_reply_data;
223 	mps_command_callback_t		*cm_complete;
224 	void				*cm_complete_data;
225 	struct mpssas_target		*cm_targ;
226 	MPI2_REQUEST_DESCRIPTOR_UNION	cm_desc;
227 	u_int	                	cm_lun;
228 	u_int				cm_flags;
229 #define MPS_CM_FLAGS_POLLED		(1 << 0)
230 #define MPS_CM_FLAGS_COMPLETE		(1 << 1)
231 #define MPS_CM_FLAGS_SGE_SIMPLE		(1 << 2)
232 #define MPS_CM_FLAGS_DATAOUT		(1 << 3)
233 #define MPS_CM_FLAGS_DATAIN		(1 << 4)
234 #define MPS_CM_FLAGS_WAKEUP		(1 << 5)
235 #define MPS_CM_FLAGS_DD_IO		(1 << 6)
236 #define MPS_CM_FLAGS_USE_UIO		(1 << 7)
237 #define MPS_CM_FLAGS_SMP_PASS		(1 << 8)
238 #define	MPS_CM_FLAGS_CHAIN_FAILED	(1 << 9)
239 #define	MPS_CM_FLAGS_ERROR_MASK		MPS_CM_FLAGS_CHAIN_FAILED
240 #define	MPS_CM_FLAGS_USE_CCB		(1 << 10)
241 #define	MPS_CM_FLAGS_SATA_ID_TIMEOUT	(1 << 11)
242 	u_int				cm_state;
243 #define MPS_CM_STATE_FREE		0
244 #define MPS_CM_STATE_BUSY		1
245 #define MPS_CM_STATE_TIMEDOUT		2
246 #define MPS_CM_STATE_INQUEUE		3
247 	bus_dmamap_t			cm_dmamap;
248 	struct scsi_sense_data		*cm_sense;
249 	TAILQ_HEAD(, mps_chain)		cm_chain_list;
250 	uint32_t			cm_req_busaddr;
251 	uint32_t			cm_sense_busaddr;
252 	struct callout			cm_callout;
253 };
254 
255 struct mps_column_map {
256 	uint16_t			dev_handle;
257 	uint8_t				phys_disk_num;
258 };
259 
260 struct mps_event_handle {
261 	TAILQ_ENTRY(mps_event_handle)	eh_list;
262 	mps_evt_callback_t		*callback;
263 	void				*data;
264 	u32				mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
265 };
266 
267 struct mps_busdma_context {
268 	int				completed;
269 	int				abandoned;
270 	int				error;
271 	bus_addr_t			*addr;
272 	struct mps_softc		*softc;
273 	bus_dmamap_t			buffer_dmamap;
274 	bus_dma_tag_t			buffer_dmat;
275 };
276 
277 struct mps_queue {
278 	struct mps_softc		*sc;
279 	int				qnum;
280 	MPI2_REPLY_DESCRIPTORS_UNION	*post_queue;
281 	int				replypostindex;
282 #ifdef notyet
283 	ck_ring_buffer_t		*ringmem;
284 	ck_ring_buffer_t		*chainmem;
285 	ck_ring_t			req_ring;
286 	ck_ring_t			chain_ring;
287 #endif
288 	bus_dma_tag_t			buffer_dmat;
289 	int				io_cmds_highwater;
290 	int				chain_free_lowwater;
291 	int				chain_alloc_fail;
292 	struct resource			*irq;
293 	void				*intrhand;
294 	int				irq_rid;
295 };
296 
297 struct mps_softc {
298 	device_t			mps_dev;
299 	struct cdev			*mps_cdev;
300 	u_int				mps_flags;
301 #define MPS_FLAGS_INTX		(1 << 0)
302 #define MPS_FLAGS_MSI		(1 << 1)
303 #define MPS_FLAGS_BUSY		(1 << 2)
304 #define MPS_FLAGS_SHUTDOWN	(1 << 3)
305 #define MPS_FLAGS_DIAGRESET	(1 << 4)
306 #define	MPS_FLAGS_ATTACH_DONE	(1 << 5)
307 #define	MPS_FLAGS_WD_AVAILABLE	(1 << 6)
308 #define	MPS_FLAGS_REALLOCATED	(1 << 7)
309 	u_int				mps_debug;
310 	u_int				msi_msgs;
311 	u_int				reqframesz;
312 	u_int				replyframesz;
313 	int				tm_cmds_active;
314 	int				io_cmds_active;
315 	int				io_cmds_highwater;
316 	int				chain_free;
317 	int				max_chains;
318 	int				max_io_pages;
319 	u_int				maxio;
320 	int				chain_free_lowwater;
321 	u_int				enable_ssu;
322 	int				spinup_wait_time;
323 	int				use_phynum;
324 	uint64_t			chain_alloc_fail;
325 	struct sysctl_ctx_list		sysctl_ctx;
326 	struct sysctl_oid		*sysctl_tree;
327 	char                            fw_version[16];
328 	struct mps_command		*commands;
329 	struct mps_chain		*chains;
330 	struct callout			periodic;
331 	struct callout			device_check_callout;
332 	struct mps_queue		*queues;
333 
334 	struct mpssas_softc		*sassc;
335 	TAILQ_HEAD(, mps_command)	req_list;
336 	TAILQ_HEAD(, mps_command)	high_priority_req_list;
337 	TAILQ_HEAD(, mps_chain)		chain_list;
338 	TAILQ_HEAD(, mps_command)	tm_list;
339 	int				replypostindex;
340 	int				replyfreeindex;
341 
342 	struct resource			*mps_regs_resource;
343 	bus_space_handle_t		mps_bhandle;
344 	bus_space_tag_t			mps_btag;
345 	int				mps_regs_rid;
346 
347 	bus_dma_tag_t			mps_parent_dmat;
348 	bus_dma_tag_t			buffer_dmat;
349 
350 	MPI2_IOC_FACTS_REPLY		*facts;
351 	int				num_reqs;
352 	int				num_prireqs;
353 	int				num_replies;
354 	int				num_chains;
355 	int				fqdepth;	/* Free queue */
356 	int				pqdepth;	/* Post queue */
357 
358 	u32             event_mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
359 	TAILQ_HEAD(, mps_event_handle)	event_list;
360 	struct mps_event_handle		*mps_log_eh;
361 
362 	struct mtx			mps_mtx;
363 	struct intr_config_hook		mps_ich;
364 
365 	uint8_t				*req_frames;
366 	bus_addr_t			req_busaddr;
367 	bus_dma_tag_t			req_dmat;
368 	bus_dmamap_t			req_map;
369 
370 	uint8_t				*reply_frames;
371 	bus_addr_t			reply_busaddr;
372 	bus_dma_tag_t			reply_dmat;
373 	bus_dmamap_t			reply_map;
374 
375 	struct scsi_sense_data		*sense_frames;
376 	bus_addr_t			sense_busaddr;
377 	bus_dma_tag_t			sense_dmat;
378 	bus_dmamap_t			sense_map;
379 
380 	uint8_t				*chain_frames;
381 	bus_dma_tag_t			chain_dmat;
382 	bus_dmamap_t			chain_map;
383 
384 	MPI2_REPLY_DESCRIPTORS_UNION	*post_queue;
385 	bus_addr_t			post_busaddr;
386 	uint32_t			*free_queue;
387 	bus_addr_t			free_busaddr;
388 	bus_dma_tag_t			queues_dmat;
389 	bus_dmamap_t			queues_map;
390 
391 	uint8_t				*fw_diag_buffer;
392 	bus_addr_t			fw_diag_busaddr;
393 	bus_dma_tag_t			fw_diag_dmat;
394 	bus_dmamap_t			fw_diag_map;
395 
396 	uint8_t				ir_firmware;
397 
398 	/* static config pages */
399 	Mpi2IOCPage8_t			ioc_pg8;
400 
401 	/* host mapping support */
402 	struct dev_mapping_table	*mapping_table;
403 	struct enc_mapping_table	*enclosure_table;
404 	struct map_removal_table	*removal_table;
405 	uint8_t				*dpm_entry_used;
406 	uint8_t				*dpm_flush_entry;
407 	Mpi2DriverMappingPage0_t	*dpm_pg0;
408 	uint16_t			max_devices;
409 	uint16_t			max_enclosures;
410 	uint16_t			max_expanders;
411 	uint8_t				max_volumes;
412 	uint8_t				num_enc_table_entries;
413 	uint8_t				num_rsvd_entries;
414 	uint16_t			max_dpm_entries;
415 	uint8_t				is_dpm_enable;
416 	uint8_t				track_mapping_events;
417 	uint32_t			pending_map_events;
418 
419 	/* FW diag Buffer List */
420 	mps_fw_diagnostic_buffer_t
421 				fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT];
422 
423 	/* Event Recording IOCTL support */
424 	uint32_t			events_to_record[4];
425 	mps_event_entry_t		recorded_events[MPS_EVENT_QUEUE_SIZE];
426 	uint8_t				event_index;
427 	uint32_t			event_number;
428 
429 	/* EEDP and TLR support */
430 	uint8_t				eedp_enabled;
431 	uint8_t				control_TLR;
432 
433 	/* Shutdown Event Handler */
434 	eventhandler_tag		shutdown_eh;
435 
436 	/* To track topo events during reset */
437 #define	MPS_DIAG_RESET_TIMEOUT	300000
438 	uint8_t				wait_for_port_enable;
439 	uint8_t				port_enable_complete;
440 	uint8_t				msleep_fake_chan;
441 
442 	/* WD controller */
443 	uint8_t             WD_available;
444 	uint8_t				WD_valid_config;
445 	uint8_t				WD_hide_expose;
446 
447 	/* Direct Drive for WarpDrive */
448 	uint8_t				DD_num_phys_disks;
449 	uint16_t			DD_dev_handle;
450 	uint32_t			DD_stripe_size;
451 	uint32_t			DD_stripe_exponent;
452 	uint32_t			DD_block_size;
453 	uint16_t			DD_block_exponent;
454 	uint64_t			DD_max_lba;
455 	struct mps_column_map		DD_column_map[MPS_MAX_DISKS_IN_VOL];
456 
457 	/* StartStopUnit command handling at shutdown */
458 	uint32_t			SSU_refcount;
459 	uint8_t				SSU_started;
460 
461 	/* Configuration tunables */
462 	u_int				disable_msix;
463 	u_int				disable_msi;
464 	u_int				max_msix;
465 	u_int				max_reqframes;
466 	u_int				max_prireqframes;
467 	u_int				max_replyframes;
468 	u_int				max_evtframes;
469 	char				exclude_ids[80];
470 
471 	struct timeval			lastfail;
472 };
473 
474 struct mps_config_params {
475 	MPI2_CONFIG_EXT_PAGE_HEADER_UNION	hdr;
476 	u_int		action;
477 	u_int		page_address;	/* Attributes, not a phys address */
478 	u_int		status;
479 	void		*buffer;
480 	u_int		length;
481 	int		timeout;
482 	void		(*callback)(struct mps_softc *, struct mps_config_params *);
483 	void		*cbdata;
484 };
485 
486 struct scsi_read_capacity_eedp
487 {
488 	uint8_t addr[8];
489 	uint8_t length[4];
490 	uint8_t protect;
491 };
492 
493 static __inline uint32_t
494 mps_regread(struct mps_softc *sc, uint32_t offset)
495 {
496 	return (bus_space_read_4(sc->mps_btag, sc->mps_bhandle, offset));
497 }
498 
499 static __inline void
500 mps_regwrite(struct mps_softc *sc, uint32_t offset, uint32_t val)
501 {
502 	bus_space_write_4(sc->mps_btag, sc->mps_bhandle, offset, val);
503 }
504 
505 /* free_queue must have Little Endian address
506  * TODO- cm_reply_data is unwanted. We can remove it.
507  * */
508 static __inline void
509 mps_free_reply(struct mps_softc *sc, uint32_t busaddr)
510 {
511 	if (++sc->replyfreeindex >= sc->fqdepth)
512 		sc->replyfreeindex = 0;
513 	sc->free_queue[sc->replyfreeindex] = htole32(busaddr);
514 	mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
515 }
516 
517 static __inline struct mps_chain *
518 mps_alloc_chain(struct mps_softc *sc)
519 {
520 	struct mps_chain *chain;
521 
522 	if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) {
523 		TAILQ_REMOVE(&sc->chain_list, chain, chain_link);
524 		sc->chain_free--;
525 		if (sc->chain_free < sc->chain_free_lowwater)
526 			sc->chain_free_lowwater = sc->chain_free;
527 	} else
528 		sc->chain_alloc_fail++;
529 	return (chain);
530 }
531 
532 static __inline void
533 mps_free_chain(struct mps_softc *sc, struct mps_chain *chain)
534 {
535 	sc->chain_free++;
536 	TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link);
537 }
538 
539 static __inline void
540 mps_free_command(struct mps_softc *sc, struct mps_command *cm)
541 {
542 	struct mps_chain *chain, *chain_temp;
543 
544 	KASSERT(cm->cm_state == MPS_CM_STATE_BUSY, ("state not busy\n"));
545 
546 	if (cm->cm_reply != NULL)
547 		mps_free_reply(sc, cm->cm_reply_data);
548 	cm->cm_reply = NULL;
549 	cm->cm_flags = 0;
550 	cm->cm_complete = NULL;
551 	cm->cm_complete_data = NULL;
552 	cm->cm_ccb = NULL;
553 	cm->cm_targ = NULL;
554 	cm->cm_max_segs = 0;
555 	cm->cm_lun = 0;
556 	cm->cm_state = MPS_CM_STATE_FREE;
557 	cm->cm_data = NULL;
558 	cm->cm_length = 0;
559 	cm->cm_out_len = 0;
560 	cm->cm_sglsize = 0;
561 	cm->cm_sge = NULL;
562 
563 	TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
564 		TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
565 		mps_free_chain(sc, chain);
566 	}
567 	TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link);
568 }
569 
570 static __inline struct mps_command *
571 mps_alloc_command(struct mps_softc *sc)
572 {
573 	struct mps_command *cm;
574 
575 	cm = TAILQ_FIRST(&sc->req_list);
576 	if (cm == NULL)
577 		return (NULL);
578 
579 	KASSERT(cm->cm_state == MPS_CM_STATE_FREE,
580 	    ("mps: Allocating busy command\n"));
581 
582 	TAILQ_REMOVE(&sc->req_list, cm, cm_link);
583 	cm->cm_state = MPS_CM_STATE_BUSY;
584 	return (cm);
585 }
586 
587 static __inline void
588 mps_free_high_priority_command(struct mps_softc *sc, struct mps_command *cm)
589 {
590 	struct mps_chain *chain, *chain_temp;
591 
592 	KASSERT(cm->cm_state == MPS_CM_STATE_BUSY, ("state not busy\n"));
593 
594 	if (cm->cm_reply != NULL)
595 		mps_free_reply(sc, cm->cm_reply_data);
596 	cm->cm_reply = NULL;
597 	cm->cm_flags = 0;
598 	cm->cm_complete = NULL;
599 	cm->cm_complete_data = NULL;
600 	cm->cm_ccb = NULL;
601 	cm->cm_targ = NULL;
602 	cm->cm_lun = 0;
603 	cm->cm_state = MPS_CM_STATE_FREE;
604 	TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
605 		TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
606 		mps_free_chain(sc, chain);
607 	}
608 	TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link);
609 }
610 
611 static __inline struct mps_command *
612 mps_alloc_high_priority_command(struct mps_softc *sc)
613 {
614 	struct mps_command *cm;
615 
616 	cm = TAILQ_FIRST(&sc->high_priority_req_list);
617 	if (cm == NULL)
618 		return (NULL);
619 
620 	KASSERT(cm->cm_state == MPS_CM_STATE_FREE,
621 	    ("mps: Allocating busy command\n"));
622 
623 	TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link);
624 	cm->cm_state = MPS_CM_STATE_BUSY;
625 	return (cm);
626 }
627 
628 static __inline void
629 mps_lock(struct mps_softc *sc)
630 {
631 	mtx_lock(&sc->mps_mtx);
632 }
633 
634 static __inline void
635 mps_unlock(struct mps_softc *sc)
636 {
637 	mtx_unlock(&sc->mps_mtx);
638 }
639 
640 #define MPS_INFO	(1 << 0)	/* Basic info */
641 #define MPS_FAULT	(1 << 1)	/* Hardware faults */
642 #define MPS_EVENT	(1 << 2)	/* Event data from the controller */
643 #define MPS_LOG		(1 << 3)	/* Log data from the controller */
644 #define MPS_RECOVERY	(1 << 4)	/* Command error recovery tracing */
645 #define MPS_ERROR	(1 << 5)	/* Parameter errors, programming bugs */
646 #define MPS_INIT	(1 << 6)	/* Things related to system init */
647 #define MPS_XINFO	(1 << 7)	/* More detailed/noisy info */
648 #define MPS_USER	(1 << 8)	/* Trace user-generated commands */
649 #define MPS_MAPPING	(1 << 9)	/* Trace device mappings */
650 #define MPS_TRACE	(1 << 10)	/* Function-by-function trace */
651 
652 #define	MPS_SSU_DISABLE_SSD_DISABLE_HDD	0
653 #define	MPS_SSU_ENABLE_SSD_DISABLE_HDD	1
654 #define	MPS_SSU_DISABLE_SSD_ENABLE_HDD	2
655 #define	MPS_SSU_ENABLE_SSD_ENABLE_HDD	3
656 
657 #define mps_printf(sc, args...)				\
658 	device_printf((sc)->mps_dev, ##args)
659 
660 #define mps_print_field(sc, msg, args...)		\
661 	printf("\t" msg, ##args)
662 
663 #define mps_vprintf(sc, args...)			\
664 do {							\
665 	if (bootverbose)				\
666 		mps_printf(sc, ##args);			\
667 } while (0)
668 
669 #define mps_dprint(sc, level, msg, args...)		\
670 do {							\
671 	if ((sc)->mps_debug & (level))			\
672 		device_printf((sc)->mps_dev, msg, ##args);	\
673 } while (0)
674 
675 #define MPS_PRINTFIELD_START(sc, tag...)	\
676 	mps_printf((sc), ##tag);			\
677 	mps_print_field((sc), ":\n")
678 #define MPS_PRINTFIELD_END(sc, tag)		\
679 	mps_printf((sc), tag "\n")
680 #define MPS_PRINTFIELD(sc, facts, attr, fmt)	\
681 	mps_print_field((sc), #attr ": " #fmt "\n", (facts)->attr)
682 
683 #define MPS_FUNCTRACE(sc)			\
684 	mps_dprint((sc), MPS_TRACE, "%s\n", __func__)
685 
686 #define  CAN_SLEEP                      1
687 #define  NO_SLEEP                       0
688 
689 static __inline void
690 mps_from_u64(uint64_t data, U64 *mps)
691 {
692 	(mps)->High = htole32((uint32_t)((data) >> 32));
693 	(mps)->Low = htole32((uint32_t)((data) & 0xffffffff));
694 }
695 
696 static __inline uint64_t
697 mps_to_u64(U64 *data)
698 {
699 
700 	return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low));
701 }
702 
703 static __inline void
704 mps_mask_intr(struct mps_softc *sc)
705 {
706 	uint32_t mask;
707 
708 	mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
709 	mask |= MPI2_HIM_REPLY_INT_MASK;
710 	mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
711 }
712 
713 static __inline void
714 mps_unmask_intr(struct mps_softc *sc)
715 {
716 	uint32_t mask;
717 
718 	mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
719 	mask &= ~MPI2_HIM_REPLY_INT_MASK;
720 	mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
721 }
722 
723 int mps_pci_setup_interrupts(struct mps_softc *sc);
724 void mps_pci_free_interrupts(struct mps_softc *sc);
725 int mps_pci_restore(struct mps_softc *sc);
726 
727 void mps_get_tunables(struct mps_softc *sc);
728 int mps_attach(struct mps_softc *sc);
729 int mps_free(struct mps_softc *sc);
730 void mps_intr(void *);
731 void mps_intr_msi(void *);
732 void mps_intr_locked(void *);
733 int mps_register_events(struct mps_softc *, u32 *, mps_evt_callback_t *,
734     void *, struct mps_event_handle **);
735 int mps_restart(struct mps_softc *);
736 int mps_update_events(struct mps_softc *, struct mps_event_handle *, u32 *);
737 void mps_deregister_events(struct mps_softc *, struct mps_event_handle *);
738 int mps_push_sge(struct mps_command *, void *, size_t, int);
739 int mps_add_dmaseg(struct mps_command *, vm_paddr_t, size_t, u_int, int);
740 int mps_attach_sas(struct mps_softc *sc);
741 int mps_detach_sas(struct mps_softc *sc);
742 int mps_read_config_page(struct mps_softc *, struct mps_config_params *);
743 int mps_write_config_page(struct mps_softc *, struct mps_config_params *);
744 void mps_memaddr_cb(void *, bus_dma_segment_t *, int , int );
745 void mps_memaddr_wait_cb(void *, bus_dma_segment_t *, int , int );
746 void mpi_init_sge(struct mps_command *cm, void *req, void *sge);
747 int mps_attach_user(struct mps_softc *);
748 void mps_detach_user(struct mps_softc *);
749 void mpssas_record_event(struct mps_softc *sc,
750     MPI2_EVENT_NOTIFICATION_REPLY *event_reply);
751 
752 int mps_map_command(struct mps_softc *sc, struct mps_command *cm);
753 int mps_wait_command(struct mps_softc *sc, struct mps_command **cm, int timeout,
754     int sleep_flag);
755 
756 int mps_config_get_bios_pg3(struct mps_softc *sc, Mpi2ConfigReply_t
757     *mpi_reply, Mpi2BiosPage3_t *config_page);
758 int mps_config_get_raid_volume_pg0(struct mps_softc *sc, Mpi2ConfigReply_t
759     *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address);
760 int mps_config_get_ioc_pg8(struct mps_softc *sc, Mpi2ConfigReply_t *,
761     Mpi2IOCPage8_t *);
762 int mps_config_get_man_pg10(struct mps_softc *sc, Mpi2ConfigReply_t *mpi_reply);
763 int mps_config_get_sas_device_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
764     Mpi2SasDevicePage0_t *, u32 , u16 );
765 int mps_config_get_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
766     Mpi2DriverMappingPage0_t *, u16 );
767 int mps_config_get_raid_volume_pg1(struct mps_softc *sc,
768     Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
769     u16 handle);
770 int mps_config_get_volume_wwid(struct mps_softc *sc, u16 volume_handle,
771     u64 *wwid);
772 int mps_config_get_raid_pd_pg0(struct mps_softc *sc,
773     Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
774     u32 page_address);
775 void mpssas_ir_shutdown(struct mps_softc *sc, int howto);
776 
777 int mps_reinit(struct mps_softc *sc);
778 void mpssas_handle_reinit(struct mps_softc *sc);
779 
780 void mps_base_static_config_pages(struct mps_softc *sc);
781 void mps_wd_config_pages(struct mps_softc *sc);
782 
783 int mps_mapping_initialize(struct mps_softc *);
784 void mps_mapping_topology_change_event(struct mps_softc *,
785     Mpi2EventDataSasTopologyChangeList_t *);
786 void mps_mapping_free_memory(struct mps_softc *sc);
787 int mps_config_set_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
788     Mpi2DriverMappingPage0_t *, u16 );
789 void mps_mapping_exit(struct mps_softc *);
790 void mps_mapping_check_devices(void *);
791 int mps_mapping_allocate_memory(struct mps_softc *sc);
792 unsigned int mps_mapping_get_tid(struct mps_softc *, uint64_t , u16);
793 unsigned int mps_mapping_get_tid_from_handle(struct mps_softc *sc,
794     u16 handle);
795 unsigned int mps_mapping_get_raid_tid(struct mps_softc *sc, u64 wwid,
796      u16 volHandle);
797 unsigned int mps_mapping_get_raid_tid_from_handle(struct mps_softc *sc,
798     u16 volHandle);
799 void mps_mapping_enclosure_dev_status_change_event(struct mps_softc *,
800     Mpi2EventDataSasEnclDevStatusChange_t *event_data);
801 void mps_mapping_ir_config_change_event(struct mps_softc *sc,
802     Mpi2EventDataIrConfigChangeList_t *event_data);
803 int mps_mapping_dump(SYSCTL_HANDLER_ARGS);
804 int mps_mapping_encl_dump(SYSCTL_HANDLER_ARGS);
805 
806 void mpssas_evt_handler(struct mps_softc *sc, uintptr_t data,
807     MPI2_EVENT_NOTIFICATION_REPLY *event);
808 void mpssas_prepare_remove(struct mpssas_softc *sassc, uint16_t handle);
809 void mpssas_prepare_volume_remove(struct mpssas_softc *sassc, uint16_t handle);
810 int mpssas_startup(struct mps_softc *sc);
811 struct mpssas_target * mpssas_find_target_by_handle(struct mpssas_softc *, int, uint16_t);
812 void mpssas_realloc_targets(struct mps_softc *sc, int maxtargets);
813 struct mps_command * mpssas_alloc_tm(struct mps_softc *sc);
814 void mpssas_free_tm(struct mps_softc *sc, struct mps_command *tm);
815 void mpssas_release_simq_reinit(struct mpssas_softc *sassc);
816 int mpssas_send_reset(struct mps_softc *sc, struct mps_command *tm,
817     uint8_t type);
818 
819 SYSCTL_DECL(_hw_mps);
820 
821 /* Compatibility shims for different OS versions */
822 #if __FreeBSD_version >= 800001
823 #define mps_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
824     kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg)
825 #define mps_kproc_exit(arg)	kproc_exit(arg)
826 #else
827 #define mps_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
828     kthread_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg)
829 #define mps_kproc_exit(arg)	kthread_exit(arg)
830 #endif
831 
832 #if defined(CAM_PRIORITY_XPT)
833 #define MPS_PRIORITY_XPT	CAM_PRIORITY_XPT
834 #else
835 #define MPS_PRIORITY_XPT	5
836 #endif
837 
838 #if __FreeBSD_version < 800107
839 // Prior to FreeBSD-8.0 scp3_flags was not defined.
840 #define spc3_flags reserved
841 
842 #define SPC3_SID_PROTECT    0x01
843 #define SPC3_SID_3PC        0x08
844 #define SPC3_SID_TPGS_MASK  0x30
845 #define SPC3_SID_TPGS_IMPLICIT  0x10
846 #define SPC3_SID_TPGS_EXPLICIT  0x20
847 #define SPC3_SID_ACC        0x40
848 #define SPC3_SID_SCCS       0x80
849 
850 #define CAM_PRIORITY_NORMAL CAM_PRIORITY_NONE
851 #endif
852 
853 #endif
854 
855