1 /*- 2 * Copyright (c) 2009 Yahoo! Inc. 3 * Copyright (c) 2011-2015 LSI Corp. 4 * Copyright (c) 2013-2015 Avago Technologies 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 29 * 30 * $FreeBSD$ 31 */ 32 33 #ifndef _MPSVAR_H 34 #define _MPSVAR_H 35 36 #define MPS_DRIVER_VERSION "21.01.00.00-fbsd" 37 38 #define MPS_DB_MAX_WAIT 2500 39 40 #define MPS_REQ_FRAMES 1024 41 #define MPS_EVT_REPLY_FRAMES 32 42 #define MPS_REPLY_FRAMES MPS_REQ_FRAMES 43 #define MPS_CHAIN_FRAMES 2048 44 #define MPS_MAXIO_PAGES (-1) 45 #define MPS_SENSE_LEN SSD_FULL_SIZE 46 #define MPS_MSI_COUNT 1 47 #define MPS_SGE64_SIZE 12 48 #define MPS_SGE32_SIZE 8 49 #define MPS_SGC_SIZE 8 50 51 #define CAN_SLEEP 1 52 #define NO_SLEEP 0 53 54 #define MPS_PERIODIC_DELAY 1 /* 1 second heartbeat/watchdog check */ 55 #define MPS_ATA_ID_TIMEOUT 5 /* 5 second timeout for SATA ID cmd */ 56 57 #define MPS_SCSI_RI_INVALID_FRAME (0x00000002) 58 #define MPS_STRING_LENGTH 64 59 60 #define DEFAULT_SPINUP_WAIT 3 /* seconds to wait for spinup */ 61 62 #include <sys/endian.h> 63 64 /* 65 * host mapping related macro definitions 66 */ 67 #define MPS_MAPTABLE_BAD_IDX 0xFFFFFFFF 68 #define MPS_DPM_BAD_IDX 0xFFFF 69 #define MPS_ENCTABLE_BAD_IDX 0xFF 70 #define MPS_MAX_MISSING_COUNT 0x0F 71 #define MPS_DEV_RESERVED 0x20000000 72 #define MPS_MAP_IN_USE 0x10000000 73 #define MPS_RAID_CHANNEL 1 74 #define MPS_MAP_BAD_ID 0xFFFFFFFF 75 76 /* 77 * WarpDrive controller 78 */ 79 #define MPS_CHIP_WD_DEVICE_ID 0x007E 80 #define MPS_WD_LSI_OEM 0x80 81 #define MPS_WD_HIDE_EXPOSE_MASK 0x03 82 #define MPS_WD_HIDE_ALWAYS 0x00 83 #define MPS_WD_EXPOSE_ALWAYS 0x01 84 #define MPS_WD_HIDE_IF_VOLUME 0x02 85 #define MPS_WD_RETRY 0x01 86 #define MPS_MAN_PAGE10_SIZE 0x5C /* Hardcode for now */ 87 #define MPS_MAX_DISKS_IN_VOL 10 88 89 /* 90 * WarpDrive Event Logging 91 */ 92 #define MPI2_WD_LOG_ENTRY 0x8002 93 #define MPI2_WD_SSD_THROTTLING 0x0041 94 #define MPI2_WD_DRIVE_LIFE_WARN 0x0043 95 #define MPI2_WD_DRIVE_LIFE_DEAD 0x0044 96 #define MPI2_WD_RAIL_MON_FAIL 0x004D 97 98 typedef uint8_t u8; 99 typedef uint16_t u16; 100 typedef uint32_t u32; 101 typedef uint64_t u64; 102 103 /** 104 * struct dev_mapping_table - device mapping information 105 * @physical_id: SAS address for drives or WWID for RAID volumes 106 * @device_info: bitfield provides detailed info about the device 107 * @phy_bits: bitfields indicating controller phys 108 * @dpm_entry_num: index of this device in device persistent map table 109 * @dev_handle: device handle for the device pointed by this entry 110 * @channel: target channel 111 * @id: target id 112 * @missing_count: number of times the device not detected by driver 113 * @hide_flag: Hide this physical disk/not (foreign configuration) 114 * @init_complete: Whether the start of the day checks completed or not 115 */ 116 struct dev_mapping_table { 117 u64 physical_id; 118 u32 device_info; 119 u32 phy_bits; 120 u16 dpm_entry_num; 121 u16 dev_handle; 122 u8 reserved1; 123 u8 channel; 124 u16 id; 125 u8 missing_count; 126 u8 init_complete; 127 u8 TLR_bits; 128 u8 reserved2; 129 }; 130 131 /** 132 * struct enc_mapping_table - mapping information about an enclosure 133 * @enclosure_id: Logical ID of this enclosure 134 * @start_index: index to the entry in dev_mapping_table 135 * @phy_bits: bitfields indicating controller phys 136 * @dpm_entry_num: index of this enclosure in device persistent map table 137 * @enc_handle: device handle for the enclosure pointed by this entry 138 * @num_slots: number of slots in the enclosure 139 * @start_slot: Starting slot id 140 * @missing_count: number of times the device not detected by driver 141 * @removal_flag: used to mark the device for removal 142 * @skip_search: used as a flag to include/exclude enclosure for search 143 * @init_complete: Whether the start of the day checks completed or not 144 */ 145 struct enc_mapping_table { 146 u64 enclosure_id; 147 u32 start_index; 148 u32 phy_bits; 149 u16 dpm_entry_num; 150 u16 enc_handle; 151 u16 num_slots; 152 u16 start_slot; 153 u8 missing_count; 154 u8 removal_flag; 155 u8 skip_search; 156 u8 init_complete; 157 }; 158 159 /** 160 * struct map_removal_table - entries to be removed from mapping table 161 * @dpm_entry_num: index of this device in device persistent map table 162 * @dev_handle: device handle for the device pointed by this entry 163 */ 164 struct map_removal_table{ 165 u16 dpm_entry_num; 166 u16 dev_handle; 167 }; 168 169 typedef struct mps_fw_diagnostic_buffer { 170 size_t size; 171 uint8_t extended_type; 172 uint8_t buffer_type; 173 uint8_t force_release; 174 uint32_t product_specific[23]; 175 uint8_t immediate; 176 uint8_t enabled; 177 uint8_t valid_data; 178 uint8_t owned_by_firmware; 179 uint32_t unique_id; 180 } mps_fw_diagnostic_buffer_t; 181 182 struct mps_softc; 183 struct mps_command; 184 struct mpssas_softc; 185 union ccb; 186 struct mpssas_target; 187 struct mps_column_map; 188 189 MALLOC_DECLARE(M_MPT2); 190 191 typedef void mps_evt_callback_t(struct mps_softc *, uintptr_t, 192 MPI2_EVENT_NOTIFICATION_REPLY *reply); 193 typedef void mps_command_callback_t(struct mps_softc *, struct mps_command *cm); 194 195 struct mps_chain { 196 TAILQ_ENTRY(mps_chain) chain_link; 197 MPI2_SGE_IO_UNION *chain; 198 uint32_t chain_busaddr; 199 }; 200 201 /* 202 * This needs to be at least 2 to support SMP passthrough. 203 */ 204 #define MPS_IOVEC_COUNT 2 205 206 struct mps_command { 207 TAILQ_ENTRY(mps_command) cm_link; 208 TAILQ_ENTRY(mps_command) cm_recovery; 209 struct mps_softc *cm_sc; 210 union ccb *cm_ccb; 211 void *cm_data; 212 u_int cm_length; 213 u_int cm_out_len; 214 struct uio cm_uio; 215 struct iovec cm_iovec[MPS_IOVEC_COUNT]; 216 u_int cm_max_segs; 217 u_int cm_sglsize; 218 MPI2_SGE_IO_UNION *cm_sge; 219 uint8_t *cm_req; 220 uint8_t *cm_reply; 221 uint32_t cm_reply_data; 222 mps_command_callback_t *cm_complete; 223 void *cm_complete_data; 224 struct mpssas_target *cm_targ; 225 MPI2_REQUEST_DESCRIPTOR_UNION cm_desc; 226 u_int cm_lun; 227 u_int cm_flags; 228 #define MPS_CM_FLAGS_POLLED (1 << 0) 229 #define MPS_CM_FLAGS_COMPLETE (1 << 1) 230 #define MPS_CM_FLAGS_SGE_SIMPLE (1 << 2) 231 #define MPS_CM_FLAGS_DATAOUT (1 << 3) 232 #define MPS_CM_FLAGS_DATAIN (1 << 4) 233 #define MPS_CM_FLAGS_WAKEUP (1 << 5) 234 #define MPS_CM_FLAGS_DD_IO (1 << 6) 235 #define MPS_CM_FLAGS_USE_UIO (1 << 7) 236 #define MPS_CM_FLAGS_SMP_PASS (1 << 8) 237 #define MPS_CM_FLAGS_CHAIN_FAILED (1 << 9) 238 #define MPS_CM_FLAGS_ERROR_MASK MPS_CM_FLAGS_CHAIN_FAILED 239 #define MPS_CM_FLAGS_USE_CCB (1 << 10) 240 #define MPS_CM_FLAGS_SATA_ID_TIMEOUT (1 << 11) 241 u_int cm_state; 242 #define MPS_CM_STATE_FREE 0 243 #define MPS_CM_STATE_BUSY 1 244 #define MPS_CM_STATE_TIMEDOUT 2 245 bus_dmamap_t cm_dmamap; 246 struct scsi_sense_data *cm_sense; 247 TAILQ_HEAD(, mps_chain) cm_chain_list; 248 uint32_t cm_req_busaddr; 249 uint32_t cm_sense_busaddr; 250 struct callout cm_callout; 251 }; 252 253 struct mps_column_map { 254 uint16_t dev_handle; 255 uint8_t phys_disk_num; 256 }; 257 258 struct mps_event_handle { 259 TAILQ_ENTRY(mps_event_handle) eh_list; 260 mps_evt_callback_t *callback; 261 void *data; 262 u32 mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 263 }; 264 265 struct mps_softc { 266 device_t mps_dev; 267 struct cdev *mps_cdev; 268 u_int mps_flags; 269 #define MPS_FLAGS_INTX (1 << 0) 270 #define MPS_FLAGS_MSI (1 << 1) 271 #define MPS_FLAGS_BUSY (1 << 2) 272 #define MPS_FLAGS_SHUTDOWN (1 << 3) 273 #define MPS_FLAGS_DIAGRESET (1 << 4) 274 #define MPS_FLAGS_ATTACH_DONE (1 << 5) 275 #define MPS_FLAGS_WD_AVAILABLE (1 << 6) 276 u_int mps_debug; 277 u_int disable_msix; 278 u_int disable_msi; 279 int tm_cmds_active; 280 int io_cmds_active; 281 int io_cmds_highwater; 282 int chain_free; 283 int max_chains; 284 int max_io_pages; 285 int chain_free_lowwater; 286 u_int enable_ssu; 287 int spinup_wait_time; 288 uint64_t chain_alloc_fail; 289 struct sysctl_ctx_list sysctl_ctx; 290 struct sysctl_oid *sysctl_tree; 291 char fw_version[16]; 292 struct mps_command *commands; 293 struct mps_chain *chains; 294 struct callout periodic; 295 296 struct mpssas_softc *sassc; 297 char tmp_string[MPS_STRING_LENGTH]; 298 TAILQ_HEAD(, mps_command) req_list; 299 TAILQ_HEAD(, mps_command) high_priority_req_list; 300 TAILQ_HEAD(, mps_chain) chain_list; 301 TAILQ_HEAD(, mps_command) tm_list; 302 int replypostindex; 303 int replyfreeindex; 304 305 struct resource *mps_regs_resource; 306 bus_space_handle_t mps_bhandle; 307 bus_space_tag_t mps_btag; 308 int mps_regs_rid; 309 310 bus_dma_tag_t mps_parent_dmat; 311 bus_dma_tag_t buffer_dmat; 312 313 MPI2_IOC_FACTS_REPLY *facts; 314 int num_reqs; 315 int num_replies; 316 int fqdepth; /* Free queue */ 317 int pqdepth; /* Post queue */ 318 319 u32 event_mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 320 TAILQ_HEAD(, mps_event_handle) event_list; 321 struct mps_event_handle *mps_log_eh; 322 323 struct mtx mps_mtx; 324 struct intr_config_hook mps_ich; 325 struct resource *mps_irq[MPS_MSI_COUNT]; 326 void *mps_intrhand[MPS_MSI_COUNT]; 327 int mps_irq_rid[MPS_MSI_COUNT]; 328 329 uint8_t *req_frames; 330 bus_addr_t req_busaddr; 331 bus_dma_tag_t req_dmat; 332 bus_dmamap_t req_map; 333 334 uint8_t *reply_frames; 335 bus_addr_t reply_busaddr; 336 bus_dma_tag_t reply_dmat; 337 bus_dmamap_t reply_map; 338 339 struct scsi_sense_data *sense_frames; 340 bus_addr_t sense_busaddr; 341 bus_dma_tag_t sense_dmat; 342 bus_dmamap_t sense_map; 343 344 uint8_t *chain_frames; 345 bus_addr_t chain_busaddr; 346 bus_dma_tag_t chain_dmat; 347 bus_dmamap_t chain_map; 348 349 MPI2_REPLY_DESCRIPTORS_UNION *post_queue; 350 bus_addr_t post_busaddr; 351 uint32_t *free_queue; 352 bus_addr_t free_busaddr; 353 bus_dma_tag_t queues_dmat; 354 bus_dmamap_t queues_map; 355 356 uint8_t *fw_diag_buffer; 357 bus_addr_t fw_diag_busaddr; 358 bus_dma_tag_t fw_diag_dmat; 359 bus_dmamap_t fw_diag_map; 360 361 uint8_t ir_firmware; 362 363 /* static config pages */ 364 Mpi2IOCPage8_t ioc_pg8; 365 366 /* host mapping support */ 367 struct dev_mapping_table *mapping_table; 368 struct enc_mapping_table *enclosure_table; 369 struct map_removal_table *removal_table; 370 uint8_t *dpm_entry_used; 371 uint8_t *dpm_flush_entry; 372 Mpi2DriverMappingPage0_t *dpm_pg0; 373 uint16_t max_devices; 374 uint16_t max_enclosures; 375 uint16_t max_expanders; 376 uint8_t max_volumes; 377 uint8_t num_enc_table_entries; 378 uint8_t num_rsvd_entries; 379 uint8_t num_channels; 380 uint16_t max_dpm_entries; 381 uint8_t is_dpm_enable; 382 uint8_t track_mapping_events; 383 uint32_t pending_map_events; 384 uint8_t mt_full_retry; 385 uint8_t mt_add_device_failed; 386 387 /* FW diag Buffer List */ 388 mps_fw_diagnostic_buffer_t 389 fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT]; 390 391 /* Event Recording IOCTL support */ 392 uint32_t events_to_record[4]; 393 mps_event_entry_t recorded_events[MPS_EVENT_QUEUE_SIZE]; 394 uint8_t event_index; 395 uint32_t event_number; 396 397 /* EEDP and TLR support */ 398 uint8_t eedp_enabled; 399 uint8_t control_TLR; 400 401 /* Shutdown Event Handler */ 402 eventhandler_tag shutdown_eh; 403 404 /* To track topo events during reset */ 405 #define MPS_DIAG_RESET_TIMEOUT 300000 406 uint8_t wait_for_port_enable; 407 uint8_t port_enable_complete; 408 uint8_t msleep_fake_chan; 409 410 /* WD controller */ 411 uint8_t WD_available; 412 uint8_t WD_valid_config; 413 uint8_t WD_hide_expose; 414 415 /* Direct Drive for WarpDrive */ 416 uint8_t DD_num_phys_disks; 417 uint16_t DD_dev_handle; 418 uint32_t DD_stripe_size; 419 uint32_t DD_stripe_exponent; 420 uint32_t DD_block_size; 421 uint16_t DD_block_exponent; 422 uint64_t DD_max_lba; 423 struct mps_column_map DD_column_map[MPS_MAX_DISKS_IN_VOL]; 424 425 char exclude_ids[80]; 426 struct timeval lastfail; 427 428 /* StartStopUnit command handling at shutdown */ 429 uint32_t SSU_refcount; 430 uint8_t SSU_started; 431 }; 432 433 struct mps_config_params { 434 MPI2_CONFIG_EXT_PAGE_HEADER_UNION hdr; 435 u_int action; 436 u_int page_address; /* Attributes, not a phys address */ 437 u_int status; 438 void *buffer; 439 u_int length; 440 int timeout; 441 void (*callback)(struct mps_softc *, struct mps_config_params *); 442 void *cbdata; 443 }; 444 445 struct scsi_read_capacity_eedp 446 { 447 uint8_t addr[8]; 448 uint8_t length[4]; 449 uint8_t protect; 450 }; 451 452 static __inline uint32_t 453 mps_regread(struct mps_softc *sc, uint32_t offset) 454 { 455 return (bus_space_read_4(sc->mps_btag, sc->mps_bhandle, offset)); 456 } 457 458 static __inline void 459 mps_regwrite(struct mps_softc *sc, uint32_t offset, uint32_t val) 460 { 461 bus_space_write_4(sc->mps_btag, sc->mps_bhandle, offset, val); 462 } 463 464 /* free_queue must have Little Endian address 465 * TODO- cm_reply_data is unwanted. We can remove it. 466 * */ 467 static __inline void 468 mps_free_reply(struct mps_softc *sc, uint32_t busaddr) 469 { 470 if (++sc->replyfreeindex >= sc->fqdepth) 471 sc->replyfreeindex = 0; 472 sc->free_queue[sc->replyfreeindex] = htole32(busaddr); 473 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); 474 } 475 476 static __inline struct mps_chain * 477 mps_alloc_chain(struct mps_softc *sc) 478 { 479 struct mps_chain *chain; 480 481 if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) { 482 TAILQ_REMOVE(&sc->chain_list, chain, chain_link); 483 sc->chain_free--; 484 if (sc->chain_free < sc->chain_free_lowwater) 485 sc->chain_free_lowwater = sc->chain_free; 486 } else 487 sc->chain_alloc_fail++; 488 return (chain); 489 } 490 491 static __inline void 492 mps_free_chain(struct mps_softc *sc, struct mps_chain *chain) 493 { 494 sc->chain_free++; 495 TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link); 496 } 497 498 static __inline void 499 mps_free_command(struct mps_softc *sc, struct mps_command *cm) 500 { 501 struct mps_chain *chain, *chain_temp; 502 503 if (cm->cm_reply != NULL) 504 mps_free_reply(sc, cm->cm_reply_data); 505 cm->cm_reply = NULL; 506 cm->cm_flags = 0; 507 cm->cm_complete = NULL; 508 cm->cm_complete_data = NULL; 509 cm->cm_ccb = NULL; 510 cm->cm_targ = NULL; 511 cm->cm_max_segs = 0; 512 cm->cm_lun = 0; 513 cm->cm_state = MPS_CM_STATE_FREE; 514 cm->cm_data = NULL; 515 cm->cm_length = 0; 516 cm->cm_out_len = 0; 517 cm->cm_sglsize = 0; 518 cm->cm_sge = NULL; 519 520 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) { 521 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link); 522 mps_free_chain(sc, chain); 523 } 524 TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link); 525 } 526 527 static __inline struct mps_command * 528 mps_alloc_command(struct mps_softc *sc) 529 { 530 struct mps_command *cm; 531 532 cm = TAILQ_FIRST(&sc->req_list); 533 if (cm == NULL) 534 return (NULL); 535 536 TAILQ_REMOVE(&sc->req_list, cm, cm_link); 537 KASSERT(cm->cm_state == MPS_CM_STATE_FREE, ("mps: Allocating busy command\n")); 538 cm->cm_state = MPS_CM_STATE_BUSY; 539 return (cm); 540 } 541 542 static __inline void 543 mps_free_high_priority_command(struct mps_softc *sc, struct mps_command *cm) 544 { 545 struct mps_chain *chain, *chain_temp; 546 547 if (cm->cm_reply != NULL) 548 mps_free_reply(sc, cm->cm_reply_data); 549 cm->cm_reply = NULL; 550 cm->cm_flags = 0; 551 cm->cm_complete = NULL; 552 cm->cm_complete_data = NULL; 553 cm->cm_ccb = NULL; 554 cm->cm_targ = NULL; 555 cm->cm_lun = 0; 556 cm->cm_state = MPS_CM_STATE_FREE; 557 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) { 558 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link); 559 mps_free_chain(sc, chain); 560 } 561 TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link); 562 } 563 564 static __inline struct mps_command * 565 mps_alloc_high_priority_command(struct mps_softc *sc) 566 { 567 struct mps_command *cm; 568 569 cm = TAILQ_FIRST(&sc->high_priority_req_list); 570 if (cm == NULL) 571 return (NULL); 572 573 TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link); 574 KASSERT(cm->cm_state == MPS_CM_STATE_FREE, ("mps: Allocating busy command\n")); 575 cm->cm_state = MPS_CM_STATE_BUSY; 576 return (cm); 577 } 578 579 static __inline void 580 mps_lock(struct mps_softc *sc) 581 { 582 mtx_lock(&sc->mps_mtx); 583 } 584 585 static __inline void 586 mps_unlock(struct mps_softc *sc) 587 { 588 mtx_unlock(&sc->mps_mtx); 589 } 590 591 #define MPS_INFO (1 << 0) /* Basic info */ 592 #define MPS_FAULT (1 << 1) /* Hardware faults */ 593 #define MPS_EVENT (1 << 2) /* Event data from the controller */ 594 #define MPS_LOG (1 << 3) /* Log data from the controller */ 595 #define MPS_RECOVERY (1 << 4) /* Command error recovery tracing */ 596 #define MPS_ERROR (1 << 5) /* Parameter errors, programming bugs */ 597 #define MPS_INIT (1 << 6) /* Things related to system init */ 598 #define MPS_XINFO (1 << 7) /* More detailed/noisy info */ 599 #define MPS_USER (1 << 8) /* Trace user-generated commands */ 600 #define MPS_MAPPING (1 << 9) /* Trace device mappings */ 601 #define MPS_TRACE (1 << 10) /* Function-by-function trace */ 602 603 #define MPS_SSU_DISABLE_SSD_DISABLE_HDD 0 604 #define MPS_SSU_ENABLE_SSD_DISABLE_HDD 1 605 #define MPS_SSU_DISABLE_SSD_ENABLE_HDD 2 606 #define MPS_SSU_ENABLE_SSD_ENABLE_HDD 3 607 608 #define mps_printf(sc, args...) \ 609 device_printf((sc)->mps_dev, ##args) 610 611 #define mps_vprintf(sc, args...) \ 612 do { \ 613 if (bootverbose) \ 614 mps_printf(sc, ##args); \ 615 } while (0) 616 617 #define mps_dprint(sc, level, msg, args...) \ 618 do { \ 619 if ((sc)->mps_debug & (level)) \ 620 device_printf((sc)->mps_dev, msg, ##args); \ 621 } while (0) 622 623 #define mps_dprint_field(sc, level, msg, args...) \ 624 do { \ 625 if ((sc)->mps_debug & (level)) \ 626 printf("\t" msg, ##args); \ 627 } while (0) 628 629 #define MPS_PRINTFIELD_START(sc, tag...) \ 630 mps_dprint((sc), MPS_XINFO, ##tag); \ 631 mps_dprint_field((sc), MPS_XINFO, ":\n") 632 #define MPS_PRINTFIELD_END(sc, tag) \ 633 mps_dprint((sc), MPS_XINFO, tag "\n") 634 #define MPS_PRINTFIELD(sc, facts, attr, fmt) \ 635 mps_dprint_field((sc), MPS_XINFO, #attr ": " #fmt "\n", (facts)->attr) 636 637 #define MPS_EVENTFIELD_START(sc, tag...) \ 638 mps_dprint((sc), MPS_EVENT, ##tag); \ 639 mps_dprint_field((sc), MPS_EVENT, ":\n") 640 #define MPS_EVENTFIELD(sc, facts, attr, fmt) \ 641 mps_dprint_field((sc), MPS_EVENT, #attr ": " #fmt "\n", (facts)->attr) 642 643 #define MPS_FUNCTRACE(sc) \ 644 mps_dprint((sc), MPS_TRACE, "%s\n", __func__) 645 646 #define CAN_SLEEP 1 647 #define NO_SLEEP 0 648 649 static __inline void 650 mps_from_u64(uint64_t data, U64 *mps) 651 { 652 (mps)->High = htole32((uint32_t)((data) >> 32)); 653 (mps)->Low = htole32((uint32_t)((data) & 0xffffffff)); 654 } 655 656 static __inline uint64_t 657 mps_to_u64(U64 *data) 658 { 659 660 return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low)); 661 } 662 663 static __inline void 664 mps_mask_intr(struct mps_softc *sc) 665 { 666 uint32_t mask; 667 668 mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET); 669 mask |= MPI2_HIM_REPLY_INT_MASK; 670 mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask); 671 } 672 673 static __inline void 674 mps_unmask_intr(struct mps_softc *sc) 675 { 676 uint32_t mask; 677 678 mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET); 679 mask &= ~MPI2_HIM_REPLY_INT_MASK; 680 mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask); 681 } 682 683 int mps_pci_setup_interrupts(struct mps_softc *sc); 684 int mps_pci_restore(struct mps_softc *sc); 685 686 int mps_attach(struct mps_softc *sc); 687 int mps_free(struct mps_softc *sc); 688 void mps_intr(void *); 689 void mps_intr_msi(void *); 690 void mps_intr_locked(void *); 691 int mps_register_events(struct mps_softc *, u32 *, mps_evt_callback_t *, 692 void *, struct mps_event_handle **); 693 int mps_restart(struct mps_softc *); 694 int mps_update_events(struct mps_softc *, struct mps_event_handle *, u32 *); 695 void mps_deregister_events(struct mps_softc *, struct mps_event_handle *); 696 int mps_push_sge(struct mps_command *, void *, size_t, int); 697 int mps_add_dmaseg(struct mps_command *, vm_paddr_t, size_t, u_int, int); 698 int mps_attach_sas(struct mps_softc *sc); 699 int mps_detach_sas(struct mps_softc *sc); 700 int mps_read_config_page(struct mps_softc *, struct mps_config_params *); 701 int mps_write_config_page(struct mps_softc *, struct mps_config_params *); 702 void mps_memaddr_cb(void *, bus_dma_segment_t *, int , int ); 703 void mpi_init_sge(struct mps_command *cm, void *req, void *sge); 704 int mps_attach_user(struct mps_softc *); 705 void mps_detach_user(struct mps_softc *); 706 void mpssas_record_event(struct mps_softc *sc, 707 MPI2_EVENT_NOTIFICATION_REPLY *event_reply); 708 709 int mps_map_command(struct mps_softc *sc, struct mps_command *cm); 710 int mps_wait_command(struct mps_softc *sc, struct mps_command *cm, int timeout, 711 int sleep_flag); 712 713 int mps_config_get_bios_pg3(struct mps_softc *sc, Mpi2ConfigReply_t 714 *mpi_reply, Mpi2BiosPage3_t *config_page); 715 int mps_config_get_raid_volume_pg0(struct mps_softc *sc, Mpi2ConfigReply_t 716 *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address); 717 int mps_config_get_ioc_pg8(struct mps_softc *sc, Mpi2ConfigReply_t *, 718 Mpi2IOCPage8_t *); 719 int mps_config_get_man_pg10(struct mps_softc *sc, Mpi2ConfigReply_t *mpi_reply); 720 int mps_config_get_sas_device_pg0(struct mps_softc *, Mpi2ConfigReply_t *, 721 Mpi2SasDevicePage0_t *, u32 , u16 ); 722 int mps_config_get_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *, 723 Mpi2DriverMappingPage0_t *, u16 ); 724 int mps_config_get_raid_volume_pg1(struct mps_softc *sc, 725 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form, 726 u16 handle); 727 int mps_config_get_volume_wwid(struct mps_softc *sc, u16 volume_handle, 728 u64 *wwid); 729 int mps_config_get_raid_pd_pg0(struct mps_softc *sc, 730 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page, 731 u32 page_address); 732 void mpssas_ir_shutdown(struct mps_softc *sc); 733 734 int mps_reinit(struct mps_softc *sc); 735 void mpssas_handle_reinit(struct mps_softc *sc); 736 737 void mps_base_static_config_pages(struct mps_softc *sc); 738 void mps_wd_config_pages(struct mps_softc *sc); 739 740 int mps_mapping_initialize(struct mps_softc *); 741 void mps_mapping_topology_change_event(struct mps_softc *, 742 Mpi2EventDataSasTopologyChangeList_t *); 743 int mps_mapping_is_reinit_required(struct mps_softc *); 744 void mps_mapping_free_memory(struct mps_softc *sc); 745 int mps_config_set_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *, 746 Mpi2DriverMappingPage0_t *, u16 ); 747 void mps_mapping_exit(struct mps_softc *); 748 void mps_mapping_check_devices(struct mps_softc *, int); 749 int mps_mapping_allocate_memory(struct mps_softc *sc); 750 unsigned int mps_mapping_get_sas_id(struct mps_softc *, uint64_t , u16); 751 unsigned int mps_mapping_get_sas_id_from_handle(struct mps_softc *sc, 752 u16 handle); 753 unsigned int mps_mapping_get_raid_id(struct mps_softc *sc, u64 wwid, 754 u16 handle); 755 unsigned int mps_mapping_get_raid_id_from_handle(struct mps_softc *sc, 756 u16 volHandle); 757 void mps_mapping_enclosure_dev_status_change_event(struct mps_softc *, 758 Mpi2EventDataSasEnclDevStatusChange_t *event_data); 759 void mps_mapping_ir_config_change_event(struct mps_softc *sc, 760 Mpi2EventDataIrConfigChangeList_t *event_data); 761 int mps_mapping_dump(SYSCTL_HANDLER_ARGS); 762 int mps_mapping_encl_dump(SYSCTL_HANDLER_ARGS); 763 764 void mpssas_evt_handler(struct mps_softc *sc, uintptr_t data, 765 MPI2_EVENT_NOTIFICATION_REPLY *event); 766 void mpssas_prepare_remove(struct mpssas_softc *sassc, uint16_t handle); 767 void mpssas_prepare_volume_remove(struct mpssas_softc *sassc, uint16_t handle); 768 int mpssas_startup(struct mps_softc *sc); 769 struct mpssas_target * mpssas_find_target_by_handle(struct mpssas_softc *, int, uint16_t); 770 void mpssas_realloc_targets(struct mps_softc *sc, int maxtargets); 771 struct mps_command * mpssas_alloc_tm(struct mps_softc *sc); 772 void mpssas_free_tm(struct mps_softc *sc, struct mps_command *tm); 773 void mpssas_release_simq_reinit(struct mpssas_softc *sassc); 774 int mpssas_send_reset(struct mps_softc *sc, struct mps_command *tm, 775 uint8_t type); 776 777 SYSCTL_DECL(_hw_mps); 778 779 /* Compatibility shims for different OS versions */ 780 #if __FreeBSD_version >= 800001 781 #define mps_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \ 782 kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) 783 #define mps_kproc_exit(arg) kproc_exit(arg) 784 #else 785 #define mps_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \ 786 kthread_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) 787 #define mps_kproc_exit(arg) kthread_exit(arg) 788 #endif 789 790 #if defined(CAM_PRIORITY_XPT) 791 #define MPS_PRIORITY_XPT CAM_PRIORITY_XPT 792 #else 793 #define MPS_PRIORITY_XPT 5 794 #endif 795 796 #if __FreeBSD_version < 800107 797 // Prior to FreeBSD-8.0 scp3_flags was not defined. 798 #define spc3_flags reserved 799 800 #define SPC3_SID_PROTECT 0x01 801 #define SPC3_SID_3PC 0x08 802 #define SPC3_SID_TPGS_MASK 0x30 803 #define SPC3_SID_TPGS_IMPLICIT 0x10 804 #define SPC3_SID_TPGS_EXPLICIT 0x20 805 #define SPC3_SID_ACC 0x40 806 #define SPC3_SID_SCCS 0x80 807 808 #define CAM_PRIORITY_NORMAL CAM_PRIORITY_NONE 809 #endif 810 811 #endif 812 813