xref: /freebsd/sys/dev/mps/mpsvar.h (revision 3cbb4cc200f8a0ad7ed08233425ea54524a21f1c)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2009 Yahoo! Inc.
5  * Copyright (c) 2011-2015 LSI Corp.
6  * Copyright (c) 2013-2015 Avago Technologies
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  *
30  * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
31  *
32  * $FreeBSD$
33  */
34 
35 #ifndef _MPSVAR_H
36 #define _MPSVAR_H
37 
38 #include <sys/lock.h>
39 #include <sys/mutex.h>
40 
41 #define MPS_DRIVER_VERSION	"21.02.00.00-fbsd"
42 
43 #define MPS_DB_MAX_WAIT		2500
44 
45 #define MPS_REQ_FRAMES		2048
46 #define MPS_PRI_REQ_FRAMES	128
47 #define MPS_EVT_REPLY_FRAMES	32
48 #define MPS_REPLY_FRAMES	MPS_REQ_FRAMES
49 #define MPS_CHAIN_FRAMES	16384
50 #define MPS_MAXIO_PAGES		(-1)
51 #define MPS_SENSE_LEN		SSD_FULL_SIZE
52 #define MPS_MSI_MAX		1
53 #define MPS_MSIX_MAX		16
54 #define MPS_SGE64_SIZE		12
55 #define MPS_SGE32_SIZE		8
56 #define MPS_SGC_SIZE		8
57 
58 #define	 CAN_SLEEP			1
59 #define  NO_SLEEP			0
60 
61 #define MPS_PERIODIC_DELAY	1	/* 1 second heartbeat/watchdog check */
62 #define MPS_ATA_ID_TIMEOUT	5	/* 5 second timeout for SATA ID cmd */
63 #define MPS_MISSING_CHECK_DELAY	10	/* 10 seconds between missing check */
64 
65 #define MPS_SCSI_RI_INVALID_FRAME	(0x00000002)
66 
67 #define DEFAULT_SPINUP_WAIT	3	/* seconds to wait for spinup */
68 
69 #include <sys/endian.h>
70 
71 /*
72  * host mapping related macro definitions
73  */
74 #define MPS_MAPTABLE_BAD_IDX	0xFFFFFFFF
75 #define MPS_DPM_BAD_IDX		0xFFFF
76 #define MPS_ENCTABLE_BAD_IDX	0xFF
77 #define MPS_MAX_MISSING_COUNT	0x0F
78 #define MPS_DEV_RESERVED	0x20000000
79 #define MPS_MAP_IN_USE		0x10000000
80 #define MPS_MAP_BAD_ID		0xFFFFFFFF
81 
82 /*
83  * WarpDrive controller
84  */
85 #define	MPS_CHIP_WD_DEVICE_ID	0x007E
86 #define	MPS_WD_LSI_OEM		0x80
87 #define	MPS_WD_HIDE_EXPOSE_MASK	0x03
88 #define	MPS_WD_HIDE_ALWAYS	0x00
89 #define	MPS_WD_EXPOSE_ALWAYS	0x01
90 #define	MPS_WD_HIDE_IF_VOLUME	0x02
91 #define	MPS_WD_RETRY		0x01
92 #define	MPS_MAN_PAGE10_SIZE	0x5C	/* Hardcode for now */
93 #define MPS_MAX_DISKS_IN_VOL	10
94 
95 /*
96  * WarpDrive Event Logging
97  */
98 #define	MPI2_WD_LOG_ENTRY	0x8002
99 #define	MPI2_WD_SSD_THROTTLING	0x0041
100 #define	MPI2_WD_DRIVE_LIFE_WARN	0x0043
101 #define	MPI2_WD_DRIVE_LIFE_DEAD	0x0044
102 #define	MPI2_WD_RAIL_MON_FAIL	0x004D
103 
104 typedef uint8_t u8;
105 typedef uint16_t u16;
106 typedef uint32_t u32;
107 typedef uint64_t u64;
108 
109 /**
110  * struct dev_mapping_table - device mapping information
111  * @physical_id: SAS address for drives or WWID for RAID volumes
112  * @device_info: bitfield provides detailed info about the device
113  * @phy_bits: bitfields indicating controller phys
114  * @dpm_entry_num: index of this device in device persistent map table
115  * @dev_handle: device handle for the device pointed by this entry
116  * @id: target id
117  * @missing_count: number of times the device not detected by driver
118  * @hide_flag: Hide this physical disk/not (foreign configuration)
119  * @init_complete: Whether the start of the day checks completed or not
120  */
121 struct dev_mapping_table {
122 	u64	physical_id;
123 	u32	device_info;
124 	u32	phy_bits;
125 	u16	dpm_entry_num;
126 	u16	dev_handle;
127 	u16	reserved1;
128 	u16	id;
129 	u8	missing_count;
130 	u8	init_complete;
131 	u8	TLR_bits;
132 	u8	reserved2;
133 };
134 
135 /**
136  * struct enc_mapping_table -  mapping information about an enclosure
137  * @enclosure_id: Logical ID of this enclosure
138  * @start_index: index to the entry in dev_mapping_table
139  * @phy_bits: bitfields indicating controller phys
140  * @dpm_entry_num: index of this enclosure in device persistent map table
141  * @enc_handle: device handle for the enclosure pointed by this entry
142  * @num_slots: number of slots in the enclosure
143  * @start_slot: Starting slot id
144  * @missing_count: number of times the device not detected by driver
145  * @removal_flag: used to mark the device for removal
146  * @skip_search: used as a flag to include/exclude enclosure for search
147  * @init_complete: Whether the start of the day checks completed or not
148  */
149 struct enc_mapping_table {
150 	u64	enclosure_id;
151 	u32	start_index;
152 	u32	phy_bits;
153 	u16	dpm_entry_num;
154 	u16	enc_handle;
155 	u16	num_slots;
156 	u16	start_slot;
157 	u8	missing_count;
158 	u8	removal_flag;
159 	u8	skip_search;
160 	u8	init_complete;
161 };
162 
163 /**
164  * struct map_removal_table - entries to be removed from mapping table
165  * @dpm_entry_num: index of this device in device persistent map table
166  * @dev_handle: device handle for the device pointed by this entry
167  */
168 struct map_removal_table{
169 	u16	dpm_entry_num;
170 	u16	dev_handle;
171 };
172 
173 typedef struct mps_fw_diagnostic_buffer {
174 	size_t		size;
175 	uint8_t		extended_type;
176 	uint8_t		buffer_type;
177 	uint8_t		force_release;
178 	uint32_t	product_specific[23];
179 	uint8_t		immediate;
180 	uint8_t		enabled;
181 	uint8_t		valid_data;
182 	uint8_t		owned_by_firmware;
183 	uint32_t	unique_id;
184 } mps_fw_diagnostic_buffer_t;
185 
186 struct mps_softc;
187 struct mps_command;
188 struct mpssas_softc;
189 union ccb;
190 struct mpssas_target;
191 struct mps_column_map;
192 
193 MALLOC_DECLARE(M_MPT2);
194 
195 typedef void mps_evt_callback_t(struct mps_softc *, uintptr_t,
196     MPI2_EVENT_NOTIFICATION_REPLY *reply);
197 typedef void mps_command_callback_t(struct mps_softc *, struct mps_command *cm);
198 
199 struct mps_chain {
200 	TAILQ_ENTRY(mps_chain)		chain_link;
201 	MPI2_SGE_IO_UNION		*chain;
202 	uint32_t			chain_busaddr;
203 };
204 
205 /*
206  * This needs to be at least 2 to support SMP passthrough.
207  */
208 #define       MPS_IOVEC_COUNT 2
209 
210 struct mps_command {
211 	TAILQ_ENTRY(mps_command)	cm_link;
212 	TAILQ_ENTRY(mps_command)	cm_recovery;
213 	struct mps_softc		*cm_sc;
214 	union ccb			*cm_ccb;
215 	void				*cm_data;
216 	u_int				cm_length;
217 	u_int				cm_out_len;
218 	struct uio			cm_uio;
219 	struct iovec			cm_iovec[MPS_IOVEC_COUNT];
220 	u_int				cm_max_segs;
221 	u_int				cm_sglsize;
222 	MPI2_SGE_IO_UNION		*cm_sge;
223 	uint8_t				*cm_req;
224 	uint8_t				*cm_reply;
225 	uint32_t			cm_reply_data;
226 	mps_command_callback_t		*cm_complete;
227 	void				*cm_complete_data;
228 	struct mpssas_target		*cm_targ;
229 	MPI2_REQUEST_DESCRIPTOR_UNION	cm_desc;
230 	u_int	                	cm_lun;
231 	u_int				cm_flags;
232 #define MPS_CM_FLAGS_POLLED		(1 << 0)
233 #define MPS_CM_FLAGS_COMPLETE		(1 << 1)
234 #define MPS_CM_FLAGS_SGE_SIMPLE		(1 << 2)
235 #define MPS_CM_FLAGS_DATAOUT		(1 << 3)
236 #define MPS_CM_FLAGS_DATAIN		(1 << 4)
237 #define MPS_CM_FLAGS_WAKEUP		(1 << 5)
238 #define MPS_CM_FLAGS_DD_IO		(1 << 6)
239 #define MPS_CM_FLAGS_USE_UIO		(1 << 7)
240 #define MPS_CM_FLAGS_SMP_PASS		(1 << 8)
241 #define	MPS_CM_FLAGS_CHAIN_FAILED	(1 << 9)
242 #define	MPS_CM_FLAGS_ERROR_MASK		MPS_CM_FLAGS_CHAIN_FAILED
243 #define	MPS_CM_FLAGS_USE_CCB		(1 << 10)
244 #define	MPS_CM_FLAGS_SATA_ID_TIMEOUT	(1 << 11)
245 #define MPS_CM_FLAGS_ON_RECOVERY	(1 << 12)
246 #define MPS_CM_FLAGS_TIMEDOUT		(1 << 13)
247 	u_int				cm_state;
248 #define MPS_CM_STATE_FREE		0
249 #define MPS_CM_STATE_BUSY		1
250 #define MPS_CM_STATE_INQUEUE		2
251 	bus_dmamap_t			cm_dmamap;
252 	struct scsi_sense_data		*cm_sense;
253 	TAILQ_HEAD(, mps_chain)		cm_chain_list;
254 	uint32_t			cm_req_busaddr;
255 	uint32_t			cm_sense_busaddr;
256 	struct callout			cm_callout;
257 	mps_command_callback_t		*cm_timeout_handler;
258 };
259 
260 struct mps_column_map {
261 	uint16_t			dev_handle;
262 	uint8_t				phys_disk_num;
263 };
264 
265 struct mps_event_handle {
266 	TAILQ_ENTRY(mps_event_handle)	eh_list;
267 	mps_evt_callback_t		*callback;
268 	void				*data;
269 	u32				mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
270 };
271 
272 struct mps_busdma_context {
273 	int				completed;
274 	int				abandoned;
275 	int				error;
276 	bus_addr_t			*addr;
277 	struct mps_softc		*softc;
278 	bus_dmamap_t			buffer_dmamap;
279 	bus_dma_tag_t			buffer_dmat;
280 };
281 
282 struct mps_queue {
283 	struct mps_softc		*sc;
284 	int				qnum;
285 	MPI2_REPLY_DESCRIPTORS_UNION	*post_queue;
286 	int				replypostindex;
287 #ifdef notyet
288 	ck_ring_buffer_t		*ringmem;
289 	ck_ring_buffer_t		*chainmem;
290 	ck_ring_t			req_ring;
291 	ck_ring_t			chain_ring;
292 #endif
293 	bus_dma_tag_t			buffer_dmat;
294 	int				io_cmds_highwater;
295 	int				chain_free_lowwater;
296 	int				chain_alloc_fail;
297 	struct resource			*irq;
298 	void				*intrhand;
299 	int				irq_rid;
300 };
301 
302 struct mps_softc {
303 	device_t			mps_dev;
304 	struct cdev			*mps_cdev;
305 	u_int				mps_flags;
306 #define MPS_FLAGS_INTX		(1 << 0)
307 #define MPS_FLAGS_MSI		(1 << 1)
308 #define MPS_FLAGS_BUSY		(1 << 2)
309 #define MPS_FLAGS_SHUTDOWN	(1 << 3)
310 #define MPS_FLAGS_DIAGRESET	(1 << 4)
311 #define	MPS_FLAGS_ATTACH_DONE	(1 << 5)
312 #define	MPS_FLAGS_WD_AVAILABLE	(1 << 6)
313 #define	MPS_FLAGS_REALLOCATED	(1 << 7)
314 	u_int				mps_debug;
315 	u_int				msi_msgs;
316 	u_int				reqframesz;
317 	u_int				replyframesz;
318 	int				tm_cmds_active;
319 	int				io_cmds_active;
320 	int				io_cmds_highwater;
321 	int				chain_free;
322 	int				max_chains;
323 	int				max_io_pages;
324 	u_int				maxio;
325 	int				chain_free_lowwater;
326 	u_int				enable_ssu;
327 	int				spinup_wait_time;
328 	int				use_phynum;
329 	uint64_t			chain_alloc_fail;
330 	struct sysctl_ctx_list		sysctl_ctx;
331 	struct sysctl_oid		*sysctl_tree;
332 	char                            fw_version[16];
333 	char				msg_version[8];
334 	struct mps_command		*commands;
335 	struct mps_chain		*chains;
336 	struct callout			periodic;
337 	struct callout			device_check_callout;
338 	struct mps_queue		*queues;
339 
340 	struct mpssas_softc		*sassc;
341 	TAILQ_HEAD(, mps_command)	req_list;
342 	TAILQ_HEAD(, mps_command)	high_priority_req_list;
343 	TAILQ_HEAD(, mps_chain)		chain_list;
344 	TAILQ_HEAD(, mps_command)	tm_list;
345 	int				replypostindex;
346 	int				replyfreeindex;
347 
348 	struct resource			*mps_regs_resource;
349 	bus_space_handle_t		mps_bhandle;
350 	bus_space_tag_t			mps_btag;
351 	int				mps_regs_rid;
352 
353 	bus_dma_tag_t			mps_parent_dmat;
354 	bus_dma_tag_t			buffer_dmat;
355 
356 	MPI2_IOC_FACTS_REPLY		*facts;
357 	int				num_reqs;
358 	int				num_prireqs;
359 	int				num_replies;
360 	int				num_chains;
361 	int				fqdepth;	/* Free queue */
362 	int				pqdepth;	/* Post queue */
363 
364 	u32             event_mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
365 	TAILQ_HEAD(, mps_event_handle)	event_list;
366 	struct mps_event_handle		*mps_log_eh;
367 
368 	struct mtx			mps_mtx;
369 	struct intr_config_hook		mps_ich;
370 
371 	uint8_t				*req_frames;
372 	bus_addr_t			req_busaddr;
373 	bus_dma_tag_t			req_dmat;
374 	bus_dmamap_t			req_map;
375 
376 	uint8_t				*reply_frames;
377 	bus_addr_t			reply_busaddr;
378 	bus_dma_tag_t			reply_dmat;
379 	bus_dmamap_t			reply_map;
380 
381 	struct scsi_sense_data		*sense_frames;
382 	bus_addr_t			sense_busaddr;
383 	bus_dma_tag_t			sense_dmat;
384 	bus_dmamap_t			sense_map;
385 
386 	uint8_t				*chain_frames;
387 	bus_dma_tag_t			chain_dmat;
388 	bus_dmamap_t			chain_map;
389 
390 	MPI2_REPLY_DESCRIPTORS_UNION	*post_queue;
391 	bus_addr_t			post_busaddr;
392 	uint32_t			*free_queue;
393 	bus_addr_t			free_busaddr;
394 	bus_dma_tag_t			queues_dmat;
395 	bus_dmamap_t			queues_map;
396 
397 	uint8_t				*fw_diag_buffer;
398 	bus_addr_t			fw_diag_busaddr;
399 	bus_dma_tag_t			fw_diag_dmat;
400 	bus_dmamap_t			fw_diag_map;
401 
402 	uint8_t				ir_firmware;
403 
404 	/* static config pages */
405 	Mpi2IOCPage8_t			ioc_pg8;
406 
407 	/* host mapping support */
408 	struct dev_mapping_table	*mapping_table;
409 	struct enc_mapping_table	*enclosure_table;
410 	struct map_removal_table	*removal_table;
411 	uint8_t				*dpm_entry_used;
412 	uint8_t				*dpm_flush_entry;
413 	Mpi2DriverMappingPage0_t	*dpm_pg0;
414 	uint16_t			max_devices;
415 	uint16_t			max_enclosures;
416 	uint16_t			max_expanders;
417 	uint8_t				max_volumes;
418 	uint8_t				num_enc_table_entries;
419 	uint8_t				num_rsvd_entries;
420 	uint16_t			max_dpm_entries;
421 	uint8_t				is_dpm_enable;
422 	uint8_t				track_mapping_events;
423 	uint32_t			pending_map_events;
424 
425 	/* FW diag Buffer List */
426 	mps_fw_diagnostic_buffer_t
427 				fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT];
428 
429 	/* Event Recording IOCTL support */
430 	uint32_t			events_to_record[4];
431 	mps_event_entry_t		recorded_events[MPS_EVENT_QUEUE_SIZE];
432 	uint8_t				event_index;
433 	uint32_t			event_number;
434 
435 	/* EEDP and TLR support */
436 	uint8_t				eedp_enabled;
437 	uint8_t				control_TLR;
438 
439 	/* Shutdown Event Handler */
440 	eventhandler_tag		shutdown_eh;
441 
442 	/* To track topo events during reset */
443 #define	MPS_DIAG_RESET_TIMEOUT	300000
444 	uint8_t				wait_for_port_enable;
445 	uint8_t				port_enable_complete;
446 	uint8_t				msleep_fake_chan;
447 
448 	/* WD controller */
449 	uint8_t             WD_available;
450 	uint8_t				WD_valid_config;
451 	uint8_t				WD_hide_expose;
452 
453 	/* Direct Drive for WarpDrive */
454 	uint8_t				DD_num_phys_disks;
455 	uint16_t			DD_dev_handle;
456 	uint32_t			DD_stripe_size;
457 	uint32_t			DD_stripe_exponent;
458 	uint32_t			DD_block_size;
459 	uint16_t			DD_block_exponent;
460 	uint64_t			DD_max_lba;
461 	struct mps_column_map		DD_column_map[MPS_MAX_DISKS_IN_VOL];
462 
463 	/* StartStopUnit command handling at shutdown */
464 	uint32_t			SSU_refcount;
465 	uint8_t				SSU_started;
466 
467 	/* Configuration tunables */
468 	u_int				disable_msix;
469 	u_int				disable_msi;
470 	u_int				max_msix;
471 	u_int				max_reqframes;
472 	u_int				max_prireqframes;
473 	u_int				max_replyframes;
474 	u_int				max_evtframes;
475 	char				exclude_ids[80];
476 
477 	struct timeval			lastfail;
478 };
479 
480 struct mps_config_params {
481 	MPI2_CONFIG_EXT_PAGE_HEADER_UNION	hdr;
482 	u_int		action;
483 	u_int		page_address;	/* Attributes, not a phys address */
484 	u_int		status;
485 	void		*buffer;
486 	u_int		length;
487 	int		timeout;
488 	void		(*callback)(struct mps_softc *, struct mps_config_params *);
489 	void		*cbdata;
490 };
491 
492 struct scsi_read_capacity_eedp
493 {
494 	uint8_t addr[8];
495 	uint8_t length[4];
496 	uint8_t protect;
497 };
498 
499 static __inline uint32_t
500 mps_regread(struct mps_softc *sc, uint32_t offset)
501 {
502 	return (bus_space_read_4(sc->mps_btag, sc->mps_bhandle, offset));
503 }
504 
505 static __inline void
506 mps_regwrite(struct mps_softc *sc, uint32_t offset, uint32_t val)
507 {
508 	bus_space_write_4(sc->mps_btag, sc->mps_bhandle, offset, val);
509 }
510 
511 /* free_queue must have Little Endian address
512  * TODO- cm_reply_data is unwanted. We can remove it.
513  * */
514 static __inline void
515 mps_free_reply(struct mps_softc *sc, uint32_t busaddr)
516 {
517 	if (++sc->replyfreeindex >= sc->fqdepth)
518 		sc->replyfreeindex = 0;
519 	sc->free_queue[sc->replyfreeindex] = htole32(busaddr);
520 	mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
521 }
522 
523 static __inline struct mps_chain *
524 mps_alloc_chain(struct mps_softc *sc)
525 {
526 	struct mps_chain *chain;
527 
528 	if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) {
529 		TAILQ_REMOVE(&sc->chain_list, chain, chain_link);
530 		sc->chain_free--;
531 		if (sc->chain_free < sc->chain_free_lowwater)
532 			sc->chain_free_lowwater = sc->chain_free;
533 	} else
534 		sc->chain_alloc_fail++;
535 	return (chain);
536 }
537 
538 static __inline void
539 mps_free_chain(struct mps_softc *sc, struct mps_chain *chain)
540 {
541 	sc->chain_free++;
542 	TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link);
543 }
544 
545 static __inline void
546 mps_free_command(struct mps_softc *sc, struct mps_command *cm)
547 {
548 	struct mps_chain *chain, *chain_temp;
549 
550 	KASSERT(cm->cm_state == MPS_CM_STATE_BUSY,
551 	    ("state not busy: %d\n", cm->cm_state));
552 
553 	if (cm->cm_reply != NULL)
554 		mps_free_reply(sc, cm->cm_reply_data);
555 	cm->cm_reply = NULL;
556 	cm->cm_flags = 0;
557 	cm->cm_complete = NULL;
558 	cm->cm_complete_data = NULL;
559 	cm->cm_ccb = NULL;
560 	cm->cm_targ = NULL;
561 	cm->cm_max_segs = 0;
562 	cm->cm_lun = 0;
563 	cm->cm_state = MPS_CM_STATE_FREE;
564 	cm->cm_data = NULL;
565 	cm->cm_length = 0;
566 	cm->cm_out_len = 0;
567 	cm->cm_sglsize = 0;
568 	cm->cm_sge = NULL;
569 
570 	TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
571 		TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
572 		mps_free_chain(sc, chain);
573 	}
574 	TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link);
575 }
576 
577 static __inline struct mps_command *
578 mps_alloc_command(struct mps_softc *sc)
579 {
580 	struct mps_command *cm;
581 
582 	cm = TAILQ_FIRST(&sc->req_list);
583 	if (cm == NULL)
584 		return (NULL);
585 
586 	KASSERT(cm->cm_state == MPS_CM_STATE_FREE,
587 	    ("mps: Allocating busy command: %d\n", cm->cm_state));
588 
589 	TAILQ_REMOVE(&sc->req_list, cm, cm_link);
590 	cm->cm_state = MPS_CM_STATE_BUSY;
591 	cm->cm_timeout_handler = NULL;
592 	return (cm);
593 }
594 
595 static __inline void
596 mps_free_high_priority_command(struct mps_softc *sc, struct mps_command *cm)
597 {
598 	struct mps_chain *chain, *chain_temp;
599 
600 	KASSERT(cm->cm_state == MPS_CM_STATE_BUSY,
601 	    ("state not busy: %d\n", cm->cm_state));
602 
603 	if (cm->cm_reply != NULL)
604 		mps_free_reply(sc, cm->cm_reply_data);
605 	cm->cm_reply = NULL;
606 	cm->cm_flags = 0;
607 	cm->cm_complete = NULL;
608 	cm->cm_complete_data = NULL;
609 	cm->cm_ccb = NULL;
610 	cm->cm_targ = NULL;
611 	cm->cm_lun = 0;
612 	cm->cm_state = MPS_CM_STATE_FREE;
613 	TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
614 		TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
615 		mps_free_chain(sc, chain);
616 	}
617 	TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link);
618 }
619 
620 static __inline struct mps_command *
621 mps_alloc_high_priority_command(struct mps_softc *sc)
622 {
623 	struct mps_command *cm;
624 
625 	cm = TAILQ_FIRST(&sc->high_priority_req_list);
626 	if (cm == NULL)
627 		return (NULL);
628 
629 	KASSERT(cm->cm_state == MPS_CM_STATE_FREE,
630 	    ("mps: Allocating high priority busy command: %d\n", cm->cm_state));
631 
632 	TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link);
633 	cm->cm_state = MPS_CM_STATE_BUSY;
634 	cm->cm_timeout_handler = NULL;
635 	cm->cm_desc.HighPriority.RequestFlags =
636 	    MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
637 	return (cm);
638 }
639 
640 static __inline void
641 mps_lock(struct mps_softc *sc)
642 {
643 	mtx_lock(&sc->mps_mtx);
644 }
645 
646 static __inline void
647 mps_unlock(struct mps_softc *sc)
648 {
649 	mtx_unlock(&sc->mps_mtx);
650 }
651 
652 #define MPS_INFO	(1 << 0)	/* Basic info */
653 #define MPS_FAULT	(1 << 1)	/* Hardware faults */
654 #define MPS_EVENT	(1 << 2)	/* Event data from the controller */
655 #define MPS_LOG		(1 << 3)	/* Log data from the controller */
656 #define MPS_RECOVERY	(1 << 4)	/* Command error recovery tracing */
657 #define MPS_ERROR	(1 << 5)	/* Parameter errors, programming bugs */
658 #define MPS_INIT	(1 << 6)	/* Things related to system init */
659 #define MPS_XINFO	(1 << 7)	/* More detailed/noisy info */
660 #define MPS_USER	(1 << 8)	/* Trace user-generated commands */
661 #define MPS_MAPPING	(1 << 9)	/* Trace device mappings */
662 #define MPS_TRACE	(1 << 10)	/* Function-by-function trace */
663 
664 #define	MPS_SSU_DISABLE_SSD_DISABLE_HDD	0
665 #define	MPS_SSU_ENABLE_SSD_DISABLE_HDD	1
666 #define	MPS_SSU_DISABLE_SSD_ENABLE_HDD	2
667 #define	MPS_SSU_ENABLE_SSD_ENABLE_HDD	3
668 
669 #define mps_printf(sc, args...)				\
670 	device_printf((sc)->mps_dev, ##args)
671 
672 #define mps_print_field(sc, msg, args...)		\
673 	printf("\t" msg, ##args)
674 
675 #define mps_vprintf(sc, args...)			\
676 do {							\
677 	if (bootverbose)				\
678 		mps_printf(sc, ##args);			\
679 } while (0)
680 
681 #define mps_dprint(sc, level, msg, args...)		\
682 do {							\
683 	if ((sc)->mps_debug & (level))			\
684 		device_printf((sc)->mps_dev, msg, ##args);	\
685 } while (0)
686 
687 #define MPS_PRINTFIELD_START(sc, tag...)	\
688 	mps_printf((sc), ##tag);			\
689 	mps_print_field((sc), ":\n")
690 #define MPS_PRINTFIELD_END(sc, tag)		\
691 	mps_printf((sc), tag "\n")
692 #define MPS_PRINTFIELD(sc, facts, attr, fmt)	\
693 	mps_print_field((sc), #attr ": " #fmt "\n", (facts)->attr)
694 
695 #define MPS_FUNCTRACE(sc)			\
696 	mps_dprint((sc), MPS_TRACE, "%s\n", __func__)
697 
698 #define  CAN_SLEEP                      1
699 #define  NO_SLEEP                       0
700 
701 static __inline void
702 mps_from_u64(uint64_t data, U64 *mps)
703 {
704 	(mps)->High = htole32((uint32_t)((data) >> 32));
705 	(mps)->Low = htole32((uint32_t)((data) & 0xffffffff));
706 }
707 
708 static __inline uint64_t
709 mps_to_u64(U64 *data)
710 {
711 
712 	return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low));
713 }
714 
715 static __inline void
716 mps_mask_intr(struct mps_softc *sc)
717 {
718 	uint32_t mask;
719 
720 	mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
721 	mask |= MPI2_HIM_REPLY_INT_MASK;
722 	mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
723 }
724 
725 static __inline void
726 mps_unmask_intr(struct mps_softc *sc)
727 {
728 	uint32_t mask;
729 
730 	mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
731 	mask &= ~MPI2_HIM_REPLY_INT_MASK;
732 	mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
733 }
734 
735 int mps_pci_setup_interrupts(struct mps_softc *sc);
736 void mps_pci_free_interrupts(struct mps_softc *sc);
737 int mps_pci_restore(struct mps_softc *sc);
738 
739 void mps_get_tunables(struct mps_softc *sc);
740 int mps_attach(struct mps_softc *sc);
741 int mps_free(struct mps_softc *sc);
742 void mps_intr(void *);
743 void mps_intr_msi(void *);
744 void mps_intr_locked(void *);
745 int mps_register_events(struct mps_softc *, u32 *, mps_evt_callback_t *,
746     void *, struct mps_event_handle **);
747 int mps_restart(struct mps_softc *);
748 int mps_update_events(struct mps_softc *, struct mps_event_handle *, u32 *);
749 void mps_deregister_events(struct mps_softc *, struct mps_event_handle *);
750 int mps_push_sge(struct mps_command *, void *, size_t, int);
751 int mps_add_dmaseg(struct mps_command *, vm_paddr_t, size_t, u_int, int);
752 int mps_attach_sas(struct mps_softc *sc);
753 int mps_detach_sas(struct mps_softc *sc);
754 int mps_read_config_page(struct mps_softc *, struct mps_config_params *);
755 int mps_write_config_page(struct mps_softc *, struct mps_config_params *);
756 void mps_memaddr_cb(void *, bus_dma_segment_t *, int , int );
757 void mps_memaddr_wait_cb(void *, bus_dma_segment_t *, int , int );
758 void mpi_init_sge(struct mps_command *cm, void *req, void *sge);
759 int mps_attach_user(struct mps_softc *);
760 void mps_detach_user(struct mps_softc *);
761 void mpssas_record_event(struct mps_softc *sc,
762     MPI2_EVENT_NOTIFICATION_REPLY *event_reply);
763 
764 int mps_map_command(struct mps_softc *sc, struct mps_command *cm);
765 int mps_wait_command(struct mps_softc *sc, struct mps_command **cm, int timeout,
766     int sleep_flag);
767 
768 int mps_config_get_bios_pg3(struct mps_softc *sc, Mpi2ConfigReply_t
769     *mpi_reply, Mpi2BiosPage3_t *config_page);
770 int mps_config_get_raid_volume_pg0(struct mps_softc *sc, Mpi2ConfigReply_t
771     *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address);
772 int mps_config_get_ioc_pg8(struct mps_softc *sc, Mpi2ConfigReply_t *,
773     Mpi2IOCPage8_t *);
774 int mps_config_get_man_pg10(struct mps_softc *sc, Mpi2ConfigReply_t *mpi_reply);
775 int mps_config_get_sas_device_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
776     Mpi2SasDevicePage0_t *, u32 , u16 );
777 int mps_config_get_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
778     Mpi2DriverMappingPage0_t *, u16 );
779 int mps_config_get_raid_volume_pg1(struct mps_softc *sc,
780     Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
781     u16 handle);
782 int mps_config_get_volume_wwid(struct mps_softc *sc, u16 volume_handle,
783     u64 *wwid);
784 int mps_config_get_raid_pd_pg0(struct mps_softc *sc,
785     Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
786     u32 page_address);
787 void mpssas_ir_shutdown(struct mps_softc *sc, int howto);
788 
789 int mps_reinit(struct mps_softc *sc);
790 void mpssas_handle_reinit(struct mps_softc *sc);
791 
792 void mps_base_static_config_pages(struct mps_softc *sc);
793 void mps_wd_config_pages(struct mps_softc *sc);
794 
795 int mps_mapping_initialize(struct mps_softc *);
796 void mps_mapping_topology_change_event(struct mps_softc *,
797     Mpi2EventDataSasTopologyChangeList_t *);
798 void mps_mapping_free_memory(struct mps_softc *sc);
799 int mps_config_set_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
800     Mpi2DriverMappingPage0_t *, u16 );
801 void mps_mapping_exit(struct mps_softc *);
802 void mps_mapping_check_devices(void *);
803 int mps_mapping_allocate_memory(struct mps_softc *sc);
804 unsigned int mps_mapping_get_tid(struct mps_softc *, uint64_t , u16);
805 unsigned int mps_mapping_get_tid_from_handle(struct mps_softc *sc,
806     u16 handle);
807 unsigned int mps_mapping_get_raid_tid(struct mps_softc *sc, u64 wwid,
808      u16 volHandle);
809 unsigned int mps_mapping_get_raid_tid_from_handle(struct mps_softc *sc,
810     u16 volHandle);
811 void mps_mapping_enclosure_dev_status_change_event(struct mps_softc *,
812     Mpi2EventDataSasEnclDevStatusChange_t *event_data);
813 void mps_mapping_ir_config_change_event(struct mps_softc *sc,
814     Mpi2EventDataIrConfigChangeList_t *event_data);
815 int mps_mapping_dump(SYSCTL_HANDLER_ARGS);
816 int mps_mapping_encl_dump(SYSCTL_HANDLER_ARGS);
817 
818 void mpssas_evt_handler(struct mps_softc *sc, uintptr_t data,
819     MPI2_EVENT_NOTIFICATION_REPLY *event);
820 void mpssas_prepare_remove(struct mpssas_softc *sassc, uint16_t handle);
821 void mpssas_prepare_volume_remove(struct mpssas_softc *sassc, uint16_t handle);
822 int mpssas_startup(struct mps_softc *sc);
823 struct mpssas_target * mpssas_find_target_by_handle(struct mpssas_softc *, int, uint16_t);
824 void mpssas_realloc_targets(struct mps_softc *sc, int maxtargets);
825 struct mps_command * mpssas_alloc_tm(struct mps_softc *sc);
826 void mpssas_free_tm(struct mps_softc *sc, struct mps_command *tm);
827 void mpssas_release_simq_reinit(struct mpssas_softc *sassc);
828 int mpssas_send_reset(struct mps_softc *sc, struct mps_command *tm,
829     uint8_t type);
830 
831 SYSCTL_DECL(_hw_mps);
832 
833 /* Compatibility shims for different OS versions */
834 #define mps_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
835     kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg)
836 #define mps_kproc_exit(arg)	kproc_exit(arg)
837 
838 #if defined(CAM_PRIORITY_XPT)
839 #define MPS_PRIORITY_XPT	CAM_PRIORITY_XPT
840 #else
841 #define MPS_PRIORITY_XPT	5
842 #endif
843 
844 #endif
845