1 /*- 2 * Copyright (c) 2009 Yahoo! Inc. 3 * Copyright (c) 2011-2015 LSI Corp. 4 * Copyright (c) 2013-2015 Avago Technologies 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 29 * 30 * $FreeBSD$ 31 */ 32 33 #ifndef _MPSVAR_H 34 #define _MPSVAR_H 35 36 #define MPS_DRIVER_VERSION "21.02.00.00-fbsd" 37 38 #define MPS_DB_MAX_WAIT 2500 39 40 #define MPS_REQ_FRAMES 2048 41 #define MPS_PRI_REQ_FRAMES 128 42 #define MPS_EVT_REPLY_FRAMES 32 43 #define MPS_REPLY_FRAMES MPS_REQ_FRAMES 44 #define MPS_CHAIN_FRAMES 2048 45 #define MPS_MAXIO_PAGES (-1) 46 #define MPS_SENSE_LEN SSD_FULL_SIZE 47 #define MPS_MSI_MAX 1 48 #define MPS_MSIX_MAX 16 49 #define MPS_SGE64_SIZE 12 50 #define MPS_SGE32_SIZE 8 51 #define MPS_SGC_SIZE 8 52 53 #define CAN_SLEEP 1 54 #define NO_SLEEP 0 55 56 #define MPS_PERIODIC_DELAY 1 /* 1 second heartbeat/watchdog check */ 57 #define MPS_ATA_ID_TIMEOUT 5 /* 5 second timeout for SATA ID cmd */ 58 #define MPS_MISSING_CHECK_DELAY 10 /* 10 seconds between missing check */ 59 60 #define MPS_SCSI_RI_INVALID_FRAME (0x00000002) 61 62 #define DEFAULT_SPINUP_WAIT 3 /* seconds to wait for spinup */ 63 64 #include <sys/endian.h> 65 66 /* 67 * host mapping related macro definitions 68 */ 69 #define MPS_MAPTABLE_BAD_IDX 0xFFFFFFFF 70 #define MPS_DPM_BAD_IDX 0xFFFF 71 #define MPS_ENCTABLE_BAD_IDX 0xFF 72 #define MPS_MAX_MISSING_COUNT 0x0F 73 #define MPS_DEV_RESERVED 0x20000000 74 #define MPS_MAP_IN_USE 0x10000000 75 #define MPS_MAP_BAD_ID 0xFFFFFFFF 76 77 /* 78 * WarpDrive controller 79 */ 80 #define MPS_CHIP_WD_DEVICE_ID 0x007E 81 #define MPS_WD_LSI_OEM 0x80 82 #define MPS_WD_HIDE_EXPOSE_MASK 0x03 83 #define MPS_WD_HIDE_ALWAYS 0x00 84 #define MPS_WD_EXPOSE_ALWAYS 0x01 85 #define MPS_WD_HIDE_IF_VOLUME 0x02 86 #define MPS_WD_RETRY 0x01 87 #define MPS_MAN_PAGE10_SIZE 0x5C /* Hardcode for now */ 88 #define MPS_MAX_DISKS_IN_VOL 10 89 90 /* 91 * WarpDrive Event Logging 92 */ 93 #define MPI2_WD_LOG_ENTRY 0x8002 94 #define MPI2_WD_SSD_THROTTLING 0x0041 95 #define MPI2_WD_DRIVE_LIFE_WARN 0x0043 96 #define MPI2_WD_DRIVE_LIFE_DEAD 0x0044 97 #define MPI2_WD_RAIL_MON_FAIL 0x004D 98 99 typedef uint8_t u8; 100 typedef uint16_t u16; 101 typedef uint32_t u32; 102 typedef uint64_t u64; 103 104 /** 105 * struct dev_mapping_table - device mapping information 106 * @physical_id: SAS address for drives or WWID for RAID volumes 107 * @device_info: bitfield provides detailed info about the device 108 * @phy_bits: bitfields indicating controller phys 109 * @dpm_entry_num: index of this device in device persistent map table 110 * @dev_handle: device handle for the device pointed by this entry 111 * @id: target id 112 * @missing_count: number of times the device not detected by driver 113 * @hide_flag: Hide this physical disk/not (foreign configuration) 114 * @init_complete: Whether the start of the day checks completed or not 115 */ 116 struct dev_mapping_table { 117 u64 physical_id; 118 u32 device_info; 119 u32 phy_bits; 120 u16 dpm_entry_num; 121 u16 dev_handle; 122 u16 reserved1; 123 u16 id; 124 u8 missing_count; 125 u8 init_complete; 126 u8 TLR_bits; 127 u8 reserved2; 128 }; 129 130 /** 131 * struct enc_mapping_table - mapping information about an enclosure 132 * @enclosure_id: Logical ID of this enclosure 133 * @start_index: index to the entry in dev_mapping_table 134 * @phy_bits: bitfields indicating controller phys 135 * @dpm_entry_num: index of this enclosure in device persistent map table 136 * @enc_handle: device handle for the enclosure pointed by this entry 137 * @num_slots: number of slots in the enclosure 138 * @start_slot: Starting slot id 139 * @missing_count: number of times the device not detected by driver 140 * @removal_flag: used to mark the device for removal 141 * @skip_search: used as a flag to include/exclude enclosure for search 142 * @init_complete: Whether the start of the day checks completed or not 143 */ 144 struct enc_mapping_table { 145 u64 enclosure_id; 146 u32 start_index; 147 u32 phy_bits; 148 u16 dpm_entry_num; 149 u16 enc_handle; 150 u16 num_slots; 151 u16 start_slot; 152 u8 missing_count; 153 u8 removal_flag; 154 u8 skip_search; 155 u8 init_complete; 156 }; 157 158 /** 159 * struct map_removal_table - entries to be removed from mapping table 160 * @dpm_entry_num: index of this device in device persistent map table 161 * @dev_handle: device handle for the device pointed by this entry 162 */ 163 struct map_removal_table{ 164 u16 dpm_entry_num; 165 u16 dev_handle; 166 }; 167 168 typedef struct mps_fw_diagnostic_buffer { 169 size_t size; 170 uint8_t extended_type; 171 uint8_t buffer_type; 172 uint8_t force_release; 173 uint32_t product_specific[23]; 174 uint8_t immediate; 175 uint8_t enabled; 176 uint8_t valid_data; 177 uint8_t owned_by_firmware; 178 uint32_t unique_id; 179 } mps_fw_diagnostic_buffer_t; 180 181 struct mps_softc; 182 struct mps_command; 183 struct mpssas_softc; 184 union ccb; 185 struct mpssas_target; 186 struct mps_column_map; 187 188 MALLOC_DECLARE(M_MPT2); 189 190 typedef void mps_evt_callback_t(struct mps_softc *, uintptr_t, 191 MPI2_EVENT_NOTIFICATION_REPLY *reply); 192 typedef void mps_command_callback_t(struct mps_softc *, struct mps_command *cm); 193 194 struct mps_chain { 195 TAILQ_ENTRY(mps_chain) chain_link; 196 MPI2_SGE_IO_UNION *chain; 197 uint32_t chain_busaddr; 198 }; 199 200 /* 201 * This needs to be at least 2 to support SMP passthrough. 202 */ 203 #define MPS_IOVEC_COUNT 2 204 205 struct mps_command { 206 TAILQ_ENTRY(mps_command) cm_link; 207 TAILQ_ENTRY(mps_command) cm_recovery; 208 struct mps_softc *cm_sc; 209 union ccb *cm_ccb; 210 void *cm_data; 211 u_int cm_length; 212 u_int cm_out_len; 213 struct uio cm_uio; 214 struct iovec cm_iovec[MPS_IOVEC_COUNT]; 215 u_int cm_max_segs; 216 u_int cm_sglsize; 217 MPI2_SGE_IO_UNION *cm_sge; 218 uint8_t *cm_req; 219 uint8_t *cm_reply; 220 uint32_t cm_reply_data; 221 mps_command_callback_t *cm_complete; 222 void *cm_complete_data; 223 struct mpssas_target *cm_targ; 224 MPI2_REQUEST_DESCRIPTOR_UNION cm_desc; 225 u_int cm_lun; 226 u_int cm_flags; 227 #define MPS_CM_FLAGS_POLLED (1 << 0) 228 #define MPS_CM_FLAGS_COMPLETE (1 << 1) 229 #define MPS_CM_FLAGS_SGE_SIMPLE (1 << 2) 230 #define MPS_CM_FLAGS_DATAOUT (1 << 3) 231 #define MPS_CM_FLAGS_DATAIN (1 << 4) 232 #define MPS_CM_FLAGS_WAKEUP (1 << 5) 233 #define MPS_CM_FLAGS_DD_IO (1 << 6) 234 #define MPS_CM_FLAGS_USE_UIO (1 << 7) 235 #define MPS_CM_FLAGS_SMP_PASS (1 << 8) 236 #define MPS_CM_FLAGS_CHAIN_FAILED (1 << 9) 237 #define MPS_CM_FLAGS_ERROR_MASK MPS_CM_FLAGS_CHAIN_FAILED 238 #define MPS_CM_FLAGS_USE_CCB (1 << 10) 239 #define MPS_CM_FLAGS_SATA_ID_TIMEOUT (1 << 11) 240 u_int cm_state; 241 #define MPS_CM_STATE_FREE 0 242 #define MPS_CM_STATE_BUSY 1 243 #define MPS_CM_STATE_TIMEDOUT 2 244 bus_dmamap_t cm_dmamap; 245 struct scsi_sense_data *cm_sense; 246 TAILQ_HEAD(, mps_chain) cm_chain_list; 247 uint32_t cm_req_busaddr; 248 uint32_t cm_sense_busaddr; 249 struct callout cm_callout; 250 }; 251 252 struct mps_column_map { 253 uint16_t dev_handle; 254 uint8_t phys_disk_num; 255 }; 256 257 struct mps_event_handle { 258 TAILQ_ENTRY(mps_event_handle) eh_list; 259 mps_evt_callback_t *callback; 260 void *data; 261 u32 mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 262 }; 263 264 struct mps_queue { 265 struct mps_softc *sc; 266 int qnum; 267 MPI2_REPLY_DESCRIPTORS_UNION *post_queue; 268 int replypostindex; 269 #ifdef notyet 270 ck_ring_buffer_t *ringmem; 271 ck_ring_buffer_t *chainmem; 272 ck_ring_t req_ring; 273 ck_ring_t chain_ring; 274 #endif 275 bus_dma_tag_t buffer_dmat; 276 int io_cmds_highwater; 277 int chain_free_lowwater; 278 int chain_alloc_fail; 279 struct resource *irq; 280 void *intrhand; 281 int irq_rid; 282 }; 283 284 struct mps_softc { 285 device_t mps_dev; 286 struct cdev *mps_cdev; 287 u_int mps_flags; 288 #define MPS_FLAGS_INTX (1 << 0) 289 #define MPS_FLAGS_MSI (1 << 1) 290 #define MPS_FLAGS_BUSY (1 << 2) 291 #define MPS_FLAGS_SHUTDOWN (1 << 3) 292 #define MPS_FLAGS_DIAGRESET (1 << 4) 293 #define MPS_FLAGS_ATTACH_DONE (1 << 5) 294 #define MPS_FLAGS_WD_AVAILABLE (1 << 6) 295 #define MPS_FLAGS_REALLOCATED (1 << 7) 296 u_int mps_debug; 297 u_int msi_msgs; 298 int tm_cmds_active; 299 int io_cmds_active; 300 int io_cmds_highwater; 301 int chain_free; 302 int max_chains; 303 int max_io_pages; 304 int chain_free_lowwater; 305 u_int enable_ssu; 306 int spinup_wait_time; 307 int use_phynum; 308 uint64_t chain_alloc_fail; 309 struct sysctl_ctx_list sysctl_ctx; 310 struct sysctl_oid *sysctl_tree; 311 char fw_version[16]; 312 struct mps_command *commands; 313 struct mps_chain *chains; 314 struct callout periodic; 315 struct callout device_check_callout; 316 struct mps_queue *queues; 317 318 struct mpssas_softc *sassc; 319 TAILQ_HEAD(, mps_command) req_list; 320 TAILQ_HEAD(, mps_command) high_priority_req_list; 321 TAILQ_HEAD(, mps_chain) chain_list; 322 TAILQ_HEAD(, mps_command) tm_list; 323 int replypostindex; 324 int replyfreeindex; 325 326 struct resource *mps_regs_resource; 327 bus_space_handle_t mps_bhandle; 328 bus_space_tag_t mps_btag; 329 int mps_regs_rid; 330 331 bus_dma_tag_t mps_parent_dmat; 332 bus_dma_tag_t buffer_dmat; 333 334 MPI2_IOC_FACTS_REPLY *facts; 335 int num_reqs; 336 int num_replies; 337 int fqdepth; /* Free queue */ 338 int pqdepth; /* Post queue */ 339 340 u32 event_mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 341 TAILQ_HEAD(, mps_event_handle) event_list; 342 struct mps_event_handle *mps_log_eh; 343 344 struct mtx mps_mtx; 345 struct intr_config_hook mps_ich; 346 347 uint8_t *req_frames; 348 bus_addr_t req_busaddr; 349 bus_dma_tag_t req_dmat; 350 bus_dmamap_t req_map; 351 352 uint8_t *reply_frames; 353 bus_addr_t reply_busaddr; 354 bus_dma_tag_t reply_dmat; 355 bus_dmamap_t reply_map; 356 357 struct scsi_sense_data *sense_frames; 358 bus_addr_t sense_busaddr; 359 bus_dma_tag_t sense_dmat; 360 bus_dmamap_t sense_map; 361 362 uint8_t *chain_frames; 363 bus_addr_t chain_busaddr; 364 bus_dma_tag_t chain_dmat; 365 bus_dmamap_t chain_map; 366 367 MPI2_REPLY_DESCRIPTORS_UNION *post_queue; 368 bus_addr_t post_busaddr; 369 uint32_t *free_queue; 370 bus_addr_t free_busaddr; 371 bus_dma_tag_t queues_dmat; 372 bus_dmamap_t queues_map; 373 374 uint8_t *fw_diag_buffer; 375 bus_addr_t fw_diag_busaddr; 376 bus_dma_tag_t fw_diag_dmat; 377 bus_dmamap_t fw_diag_map; 378 379 uint8_t ir_firmware; 380 381 /* static config pages */ 382 Mpi2IOCPage8_t ioc_pg8; 383 384 /* host mapping support */ 385 struct dev_mapping_table *mapping_table; 386 struct enc_mapping_table *enclosure_table; 387 struct map_removal_table *removal_table; 388 uint8_t *dpm_entry_used; 389 uint8_t *dpm_flush_entry; 390 Mpi2DriverMappingPage0_t *dpm_pg0; 391 uint16_t max_devices; 392 uint16_t max_enclosures; 393 uint16_t max_expanders; 394 uint8_t max_volumes; 395 uint8_t num_enc_table_entries; 396 uint8_t num_rsvd_entries; 397 uint16_t max_dpm_entries; 398 uint8_t is_dpm_enable; 399 uint8_t track_mapping_events; 400 uint32_t pending_map_events; 401 402 /* FW diag Buffer List */ 403 mps_fw_diagnostic_buffer_t 404 fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT]; 405 406 /* Event Recording IOCTL support */ 407 uint32_t events_to_record[4]; 408 mps_event_entry_t recorded_events[MPS_EVENT_QUEUE_SIZE]; 409 uint8_t event_index; 410 uint32_t event_number; 411 412 /* EEDP and TLR support */ 413 uint8_t eedp_enabled; 414 uint8_t control_TLR; 415 416 /* Shutdown Event Handler */ 417 eventhandler_tag shutdown_eh; 418 419 /* To track topo events during reset */ 420 #define MPS_DIAG_RESET_TIMEOUT 300000 421 uint8_t wait_for_port_enable; 422 uint8_t port_enable_complete; 423 uint8_t msleep_fake_chan; 424 425 /* WD controller */ 426 uint8_t WD_available; 427 uint8_t WD_valid_config; 428 uint8_t WD_hide_expose; 429 430 /* Direct Drive for WarpDrive */ 431 uint8_t DD_num_phys_disks; 432 uint16_t DD_dev_handle; 433 uint32_t DD_stripe_size; 434 uint32_t DD_stripe_exponent; 435 uint32_t DD_block_size; 436 uint16_t DD_block_exponent; 437 uint64_t DD_max_lba; 438 struct mps_column_map DD_column_map[MPS_MAX_DISKS_IN_VOL]; 439 440 /* StartStopUnit command handling at shutdown */ 441 uint32_t SSU_refcount; 442 uint8_t SSU_started; 443 444 /* Configuration tunables */ 445 u_int disable_msix; 446 u_int disable_msi; 447 u_int max_msix; 448 u_int max_reqframes; 449 u_int max_prireqframes; 450 u_int max_replyframes; 451 u_int max_evtframes; 452 char exclude_ids[80]; 453 454 struct timeval lastfail; 455 }; 456 457 struct mps_config_params { 458 MPI2_CONFIG_EXT_PAGE_HEADER_UNION hdr; 459 u_int action; 460 u_int page_address; /* Attributes, not a phys address */ 461 u_int status; 462 void *buffer; 463 u_int length; 464 int timeout; 465 void (*callback)(struct mps_softc *, struct mps_config_params *); 466 void *cbdata; 467 }; 468 469 struct scsi_read_capacity_eedp 470 { 471 uint8_t addr[8]; 472 uint8_t length[4]; 473 uint8_t protect; 474 }; 475 476 static __inline uint32_t 477 mps_regread(struct mps_softc *sc, uint32_t offset) 478 { 479 return (bus_space_read_4(sc->mps_btag, sc->mps_bhandle, offset)); 480 } 481 482 static __inline void 483 mps_regwrite(struct mps_softc *sc, uint32_t offset, uint32_t val) 484 { 485 bus_space_write_4(sc->mps_btag, sc->mps_bhandle, offset, val); 486 } 487 488 /* free_queue must have Little Endian address 489 * TODO- cm_reply_data is unwanted. We can remove it. 490 * */ 491 static __inline void 492 mps_free_reply(struct mps_softc *sc, uint32_t busaddr) 493 { 494 if (++sc->replyfreeindex >= sc->fqdepth) 495 sc->replyfreeindex = 0; 496 sc->free_queue[sc->replyfreeindex] = htole32(busaddr); 497 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); 498 } 499 500 static __inline struct mps_chain * 501 mps_alloc_chain(struct mps_softc *sc) 502 { 503 struct mps_chain *chain; 504 505 if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) { 506 TAILQ_REMOVE(&sc->chain_list, chain, chain_link); 507 sc->chain_free--; 508 if (sc->chain_free < sc->chain_free_lowwater) 509 sc->chain_free_lowwater = sc->chain_free; 510 } else 511 sc->chain_alloc_fail++; 512 return (chain); 513 } 514 515 static __inline void 516 mps_free_chain(struct mps_softc *sc, struct mps_chain *chain) 517 { 518 sc->chain_free++; 519 TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link); 520 } 521 522 static __inline void 523 mps_free_command(struct mps_softc *sc, struct mps_command *cm) 524 { 525 struct mps_chain *chain, *chain_temp; 526 527 if (cm->cm_reply != NULL) 528 mps_free_reply(sc, cm->cm_reply_data); 529 cm->cm_reply = NULL; 530 cm->cm_flags = 0; 531 cm->cm_complete = NULL; 532 cm->cm_complete_data = NULL; 533 cm->cm_ccb = NULL; 534 cm->cm_targ = NULL; 535 cm->cm_max_segs = 0; 536 cm->cm_lun = 0; 537 cm->cm_state = MPS_CM_STATE_FREE; 538 cm->cm_data = NULL; 539 cm->cm_length = 0; 540 cm->cm_out_len = 0; 541 cm->cm_sglsize = 0; 542 cm->cm_sge = NULL; 543 544 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) { 545 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link); 546 mps_free_chain(sc, chain); 547 } 548 TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link); 549 } 550 551 static __inline struct mps_command * 552 mps_alloc_command(struct mps_softc *sc) 553 { 554 struct mps_command *cm; 555 556 cm = TAILQ_FIRST(&sc->req_list); 557 if (cm == NULL) 558 return (NULL); 559 560 TAILQ_REMOVE(&sc->req_list, cm, cm_link); 561 KASSERT(cm->cm_state == MPS_CM_STATE_FREE, ("mps: Allocating busy command\n")); 562 cm->cm_state = MPS_CM_STATE_BUSY; 563 return (cm); 564 } 565 566 static __inline void 567 mps_free_high_priority_command(struct mps_softc *sc, struct mps_command *cm) 568 { 569 struct mps_chain *chain, *chain_temp; 570 571 if (cm->cm_reply != NULL) 572 mps_free_reply(sc, cm->cm_reply_data); 573 cm->cm_reply = NULL; 574 cm->cm_flags = 0; 575 cm->cm_complete = NULL; 576 cm->cm_complete_data = NULL; 577 cm->cm_ccb = NULL; 578 cm->cm_targ = NULL; 579 cm->cm_lun = 0; 580 cm->cm_state = MPS_CM_STATE_FREE; 581 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) { 582 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link); 583 mps_free_chain(sc, chain); 584 } 585 TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link); 586 } 587 588 static __inline struct mps_command * 589 mps_alloc_high_priority_command(struct mps_softc *sc) 590 { 591 struct mps_command *cm; 592 593 cm = TAILQ_FIRST(&sc->high_priority_req_list); 594 if (cm == NULL) 595 return (NULL); 596 597 TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link); 598 KASSERT(cm->cm_state == MPS_CM_STATE_FREE, ("mps: Allocating busy command\n")); 599 cm->cm_state = MPS_CM_STATE_BUSY; 600 return (cm); 601 } 602 603 static __inline void 604 mps_lock(struct mps_softc *sc) 605 { 606 mtx_lock(&sc->mps_mtx); 607 } 608 609 static __inline void 610 mps_unlock(struct mps_softc *sc) 611 { 612 mtx_unlock(&sc->mps_mtx); 613 } 614 615 #define MPS_INFO (1 << 0) /* Basic info */ 616 #define MPS_FAULT (1 << 1) /* Hardware faults */ 617 #define MPS_EVENT (1 << 2) /* Event data from the controller */ 618 #define MPS_LOG (1 << 3) /* Log data from the controller */ 619 #define MPS_RECOVERY (1 << 4) /* Command error recovery tracing */ 620 #define MPS_ERROR (1 << 5) /* Parameter errors, programming bugs */ 621 #define MPS_INIT (1 << 6) /* Things related to system init */ 622 #define MPS_XINFO (1 << 7) /* More detailed/noisy info */ 623 #define MPS_USER (1 << 8) /* Trace user-generated commands */ 624 #define MPS_MAPPING (1 << 9) /* Trace device mappings */ 625 #define MPS_TRACE (1 << 10) /* Function-by-function trace */ 626 627 #define MPS_SSU_DISABLE_SSD_DISABLE_HDD 0 628 #define MPS_SSU_ENABLE_SSD_DISABLE_HDD 1 629 #define MPS_SSU_DISABLE_SSD_ENABLE_HDD 2 630 #define MPS_SSU_ENABLE_SSD_ENABLE_HDD 3 631 632 #define mps_printf(sc, args...) \ 633 device_printf((sc)->mps_dev, ##args) 634 635 #define mps_print_field(sc, msg, args...) \ 636 printf("\t" msg, ##args) 637 638 #define mps_vprintf(sc, args...) \ 639 do { \ 640 if (bootverbose) \ 641 mps_printf(sc, ##args); \ 642 } while (0) 643 644 #define mps_dprint(sc, level, msg, args...) \ 645 do { \ 646 if ((sc)->mps_debug & (level)) \ 647 device_printf((sc)->mps_dev, msg, ##args); \ 648 } while (0) 649 650 #define MPS_PRINTFIELD_START(sc, tag...) \ 651 mps_printf((sc), ##tag); \ 652 mps_print_field((sc), ":\n") 653 #define MPS_PRINTFIELD_END(sc, tag) \ 654 mps_printf((sc), tag "\n") 655 #define MPS_PRINTFIELD(sc, facts, attr, fmt) \ 656 mps_print_field((sc), #attr ": " #fmt "\n", (facts)->attr) 657 658 #define MPS_FUNCTRACE(sc) \ 659 mps_dprint((sc), MPS_TRACE, "%s\n", __func__) 660 661 #define CAN_SLEEP 1 662 #define NO_SLEEP 0 663 664 static __inline void 665 mps_from_u64(uint64_t data, U64 *mps) 666 { 667 (mps)->High = htole32((uint32_t)((data) >> 32)); 668 (mps)->Low = htole32((uint32_t)((data) & 0xffffffff)); 669 } 670 671 static __inline uint64_t 672 mps_to_u64(U64 *data) 673 { 674 675 return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low)); 676 } 677 678 static __inline void 679 mps_mask_intr(struct mps_softc *sc) 680 { 681 uint32_t mask; 682 683 mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET); 684 mask |= MPI2_HIM_REPLY_INT_MASK; 685 mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask); 686 } 687 688 static __inline void 689 mps_unmask_intr(struct mps_softc *sc) 690 { 691 uint32_t mask; 692 693 mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET); 694 mask &= ~MPI2_HIM_REPLY_INT_MASK; 695 mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask); 696 } 697 698 int mps_pci_setup_interrupts(struct mps_softc *sc); 699 void mps_pci_free_interrupts(struct mps_softc *sc); 700 int mps_pci_restore(struct mps_softc *sc); 701 702 void mps_get_tunables(struct mps_softc *sc); 703 int mps_attach(struct mps_softc *sc); 704 int mps_free(struct mps_softc *sc); 705 void mps_intr(void *); 706 void mps_intr_msi(void *); 707 void mps_intr_locked(void *); 708 int mps_register_events(struct mps_softc *, u32 *, mps_evt_callback_t *, 709 void *, struct mps_event_handle **); 710 int mps_restart(struct mps_softc *); 711 int mps_update_events(struct mps_softc *, struct mps_event_handle *, u32 *); 712 void mps_deregister_events(struct mps_softc *, struct mps_event_handle *); 713 int mps_push_sge(struct mps_command *, void *, size_t, int); 714 int mps_add_dmaseg(struct mps_command *, vm_paddr_t, size_t, u_int, int); 715 int mps_attach_sas(struct mps_softc *sc); 716 int mps_detach_sas(struct mps_softc *sc); 717 int mps_read_config_page(struct mps_softc *, struct mps_config_params *); 718 int mps_write_config_page(struct mps_softc *, struct mps_config_params *); 719 void mps_memaddr_cb(void *, bus_dma_segment_t *, int , int ); 720 void mpi_init_sge(struct mps_command *cm, void *req, void *sge); 721 int mps_attach_user(struct mps_softc *); 722 void mps_detach_user(struct mps_softc *); 723 void mpssas_record_event(struct mps_softc *sc, 724 MPI2_EVENT_NOTIFICATION_REPLY *event_reply); 725 726 int mps_map_command(struct mps_softc *sc, struct mps_command *cm); 727 int mps_wait_command(struct mps_softc *sc, struct mps_command **cm, int timeout, 728 int sleep_flag); 729 730 int mps_config_get_bios_pg3(struct mps_softc *sc, Mpi2ConfigReply_t 731 *mpi_reply, Mpi2BiosPage3_t *config_page); 732 int mps_config_get_raid_volume_pg0(struct mps_softc *sc, Mpi2ConfigReply_t 733 *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address); 734 int mps_config_get_ioc_pg8(struct mps_softc *sc, Mpi2ConfigReply_t *, 735 Mpi2IOCPage8_t *); 736 int mps_config_get_man_pg10(struct mps_softc *sc, Mpi2ConfigReply_t *mpi_reply); 737 int mps_config_get_sas_device_pg0(struct mps_softc *, Mpi2ConfigReply_t *, 738 Mpi2SasDevicePage0_t *, u32 , u16 ); 739 int mps_config_get_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *, 740 Mpi2DriverMappingPage0_t *, u16 ); 741 int mps_config_get_raid_volume_pg1(struct mps_softc *sc, 742 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form, 743 u16 handle); 744 int mps_config_get_volume_wwid(struct mps_softc *sc, u16 volume_handle, 745 u64 *wwid); 746 int mps_config_get_raid_pd_pg0(struct mps_softc *sc, 747 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page, 748 u32 page_address); 749 void mpssas_ir_shutdown(struct mps_softc *sc); 750 751 int mps_reinit(struct mps_softc *sc); 752 void mpssas_handle_reinit(struct mps_softc *sc); 753 754 void mps_base_static_config_pages(struct mps_softc *sc); 755 void mps_wd_config_pages(struct mps_softc *sc); 756 757 int mps_mapping_initialize(struct mps_softc *); 758 void mps_mapping_topology_change_event(struct mps_softc *, 759 Mpi2EventDataSasTopologyChangeList_t *); 760 void mps_mapping_free_memory(struct mps_softc *sc); 761 int mps_config_set_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *, 762 Mpi2DriverMappingPage0_t *, u16 ); 763 void mps_mapping_exit(struct mps_softc *); 764 void mps_mapping_check_devices(void *); 765 int mps_mapping_allocate_memory(struct mps_softc *sc); 766 unsigned int mps_mapping_get_tid(struct mps_softc *, uint64_t , u16); 767 unsigned int mps_mapping_get_tid_from_handle(struct mps_softc *sc, 768 u16 handle); 769 unsigned int mps_mapping_get_raid_tid(struct mps_softc *sc, u64 wwid, 770 u16 volHandle); 771 unsigned int mps_mapping_get_raid_tid_from_handle(struct mps_softc *sc, 772 u16 volHandle); 773 void mps_mapping_enclosure_dev_status_change_event(struct mps_softc *, 774 Mpi2EventDataSasEnclDevStatusChange_t *event_data); 775 void mps_mapping_ir_config_change_event(struct mps_softc *sc, 776 Mpi2EventDataIrConfigChangeList_t *event_data); 777 int mps_mapping_dump(SYSCTL_HANDLER_ARGS); 778 int mps_mapping_encl_dump(SYSCTL_HANDLER_ARGS); 779 780 void mpssas_evt_handler(struct mps_softc *sc, uintptr_t data, 781 MPI2_EVENT_NOTIFICATION_REPLY *event); 782 void mpssas_prepare_remove(struct mpssas_softc *sassc, uint16_t handle); 783 void mpssas_prepare_volume_remove(struct mpssas_softc *sassc, uint16_t handle); 784 int mpssas_startup(struct mps_softc *sc); 785 struct mpssas_target * mpssas_find_target_by_handle(struct mpssas_softc *, int, uint16_t); 786 void mpssas_realloc_targets(struct mps_softc *sc, int maxtargets); 787 struct mps_command * mpssas_alloc_tm(struct mps_softc *sc); 788 void mpssas_free_tm(struct mps_softc *sc, struct mps_command *tm); 789 void mpssas_release_simq_reinit(struct mpssas_softc *sassc); 790 int mpssas_send_reset(struct mps_softc *sc, struct mps_command *tm, 791 uint8_t type); 792 793 SYSCTL_DECL(_hw_mps); 794 795 /* Compatibility shims for different OS versions */ 796 #if __FreeBSD_version >= 800001 797 #define mps_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \ 798 kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) 799 #define mps_kproc_exit(arg) kproc_exit(arg) 800 #else 801 #define mps_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \ 802 kthread_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) 803 #define mps_kproc_exit(arg) kthread_exit(arg) 804 #endif 805 806 #if defined(CAM_PRIORITY_XPT) 807 #define MPS_PRIORITY_XPT CAM_PRIORITY_XPT 808 #else 809 #define MPS_PRIORITY_XPT 5 810 #endif 811 812 #if __FreeBSD_version < 800107 813 // Prior to FreeBSD-8.0 scp3_flags was not defined. 814 #define spc3_flags reserved 815 816 #define SPC3_SID_PROTECT 0x01 817 #define SPC3_SID_3PC 0x08 818 #define SPC3_SID_TPGS_MASK 0x30 819 #define SPC3_SID_TPGS_IMPLICIT 0x10 820 #define SPC3_SID_TPGS_EXPLICIT 0x20 821 #define SPC3_SID_ACC 0x40 822 #define SPC3_SID_SCCS 0x80 823 824 #define CAM_PRIORITY_NORMAL CAM_PRIORITY_NONE 825 #endif 826 827 #endif 828 829