1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2009 Yahoo! Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 /* PCI/PCI-X/PCIe bus interface for the Avago Tech (LSI) MPT2 controllers */ 33 34 /* TODO Move headers to mpsvar */ 35 #include <sys/types.h> 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/kernel.h> 39 #include <sys/module.h> 40 #include <sys/bus.h> 41 #include <sys/conf.h> 42 #include <sys/malloc.h> 43 #include <sys/sysctl.h> 44 #include <sys/uio.h> 45 46 #include <machine/bus.h> 47 #include <machine/resource.h> 48 #include <sys/rman.h> 49 50 #include <dev/pci/pcireg.h> 51 #include <dev/pci/pcivar.h> 52 #include <dev/pci/pci_private.h> 53 54 #include <dev/mps/mpi/mpi2_type.h> 55 #include <dev/mps/mpi/mpi2.h> 56 #include <dev/mps/mpi/mpi2_ioc.h> 57 #include <dev/mps/mpi/mpi2_cnfg.h> 58 #include <dev/mps/mpi/mpi2_tool.h> 59 60 #include <sys/queue.h> 61 #include <sys/kthread.h> 62 #include <dev/mps/mps_ioctl.h> 63 #include <dev/mps/mpsvar.h> 64 65 static int mps_pci_probe(device_t); 66 static int mps_pci_attach(device_t); 67 static int mps_pci_detach(device_t); 68 static int mps_pci_suspend(device_t); 69 static int mps_pci_resume(device_t); 70 static void mps_pci_free(struct mps_softc *); 71 static int mps_alloc_msix(struct mps_softc *sc, int msgs); 72 static int mps_alloc_msi(struct mps_softc *sc, int msgs); 73 static int mps_pci_alloc_interrupts(struct mps_softc *sc); 74 75 static device_method_t mps_methods[] = { 76 DEVMETHOD(device_probe, mps_pci_probe), 77 DEVMETHOD(device_attach, mps_pci_attach), 78 DEVMETHOD(device_detach, mps_pci_detach), 79 DEVMETHOD(device_suspend, mps_pci_suspend), 80 DEVMETHOD(device_resume, mps_pci_resume), 81 82 DEVMETHOD_END 83 }; 84 85 static driver_t mps_pci_driver = { 86 "mps", 87 mps_methods, 88 sizeof(struct mps_softc) 89 }; 90 91 static devclass_t mps_devclass; 92 DRIVER_MODULE(mps, pci, mps_pci_driver, mps_devclass, 0, 0); 93 MODULE_DEPEND(mps, cam, 1, 1, 1); 94 95 struct mps_ident { 96 uint16_t vendor; 97 uint16_t device; 98 uint16_t subvendor; 99 uint16_t subdevice; 100 u_int flags; 101 const char *desc; 102 } mps_identifiers[] = { 103 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2004, 104 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2004" }, 105 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2008, 106 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2008" }, 107 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_1, 108 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2108" }, 109 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_2, 110 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2108" }, 111 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_3, 112 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2108" }, 113 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_1, 114 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2116" }, 115 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_2, 116 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2116" }, 117 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_1, 118 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 119 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_2, 120 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 121 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_3, 122 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 123 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_4, 124 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 125 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_5, 126 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 127 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_6, 128 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 129 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_1, 130 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2308" }, 131 // Add Customer specific vender/subdevice id before generic 132 // (0xffff) vender/subdevice id. 133 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 134 0x8086, 0x3516, 0, "Intel(R) Integrated RAID Module RMS25JB080" }, 135 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 136 0x8086, 0x3517, 0, "Intel(R) Integrated RAID Module RMS25JB040" }, 137 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 138 0x8086, 0x3518, 0, "Intel(R) Integrated RAID Module RMS25KB080" }, 139 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 140 0x8086, 0x3519, 0, "Intel(R) Integrated RAID Module RMS25KB040" }, 141 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 142 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2308" }, 143 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_3, 144 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2308" }, 145 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SSS6200, 146 0xffff, 0xffff, 0, "Avago Technologies (LSI) SSS6200" }, 147 { 0, 0, 0, 0, 0, NULL } 148 }; 149 150 static struct mps_ident * 151 mps_find_ident(device_t dev) 152 { 153 struct mps_ident *m; 154 155 for (m = mps_identifiers; m->vendor != 0; m++) { 156 if (m->vendor != pci_get_vendor(dev)) 157 continue; 158 if (m->device != pci_get_device(dev)) 159 continue; 160 if ((m->subvendor != 0xffff) && 161 (m->subvendor != pci_get_subvendor(dev))) 162 continue; 163 if ((m->subdevice != 0xffff) && 164 (m->subdevice != pci_get_subdevice(dev))) 165 continue; 166 return (m); 167 } 168 169 return (NULL); 170 } 171 172 static int 173 mps_pci_probe(device_t dev) 174 { 175 struct mps_ident *id; 176 177 if ((id = mps_find_ident(dev)) != NULL) { 178 device_set_desc(dev, id->desc); 179 return (BUS_PROBE_DEFAULT); 180 } 181 return (ENXIO); 182 } 183 184 static int 185 mps_pci_attach(device_t dev) 186 { 187 struct mps_softc *sc; 188 struct mps_ident *m; 189 int error; 190 191 sc = device_get_softc(dev); 192 bzero(sc, sizeof(*sc)); 193 sc->mps_dev = dev; 194 m = mps_find_ident(dev); 195 sc->mps_flags = m->flags; 196 197 mps_get_tunables(sc); 198 199 /* Twiddle basic PCI config bits for a sanity check */ 200 pci_enable_busmaster(dev); 201 202 /* Allocate the System Interface Register Set */ 203 sc->mps_regs_rid = PCIR_BAR(1); 204 if ((sc->mps_regs_resource = bus_alloc_resource_any(dev, 205 SYS_RES_MEMORY, &sc->mps_regs_rid, RF_ACTIVE)) == NULL) { 206 mps_printf(sc, "Cannot allocate PCI registers\n"); 207 return (ENXIO); 208 } 209 sc->mps_btag = rman_get_bustag(sc->mps_regs_resource); 210 sc->mps_bhandle = rman_get_bushandle(sc->mps_regs_resource); 211 212 /* Allocate the parent DMA tag */ 213 if (bus_dma_tag_create( bus_get_dma_tag(dev), /* parent */ 214 1, 0, /* algnmnt, boundary */ 215 BUS_SPACE_MAXADDR, /* lowaddr */ 216 BUS_SPACE_MAXADDR, /* highaddr */ 217 NULL, NULL, /* filter, filterarg */ 218 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 219 BUS_SPACE_UNRESTRICTED, /* nsegments */ 220 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 221 0, /* flags */ 222 NULL, NULL, /* lockfunc, lockarg */ 223 &sc->mps_parent_dmat)) { 224 mps_printf(sc, "Cannot allocate parent DMA tag\n"); 225 mps_pci_free(sc); 226 return (ENOMEM); 227 } 228 229 if (((error = mps_pci_alloc_interrupts(sc)) != 0) || 230 ((error = mps_attach(sc)) != 0)) 231 mps_pci_free(sc); 232 233 return (error); 234 } 235 236 /* 237 * Allocate, but don't assign interrupts early. Doing it before requesting 238 * the IOCFacts message informs the firmware that we want to do MSI-X 239 * multiqueue. We might not use all of the available messages, but there's 240 * no reason to re-alloc if we don't. 241 */ 242 static int 243 mps_pci_alloc_interrupts(struct mps_softc *sc) 244 { 245 device_t dev; 246 int error, msgs; 247 248 dev = sc->mps_dev; 249 error = 0; 250 msgs = 0; 251 252 if (sc->disable_msix == 0) { 253 msgs = pci_msix_count(dev); 254 mps_dprint(sc, MPS_INIT, "Counted %d MSI-X messages\n", msgs); 255 msgs = min(msgs, sc->max_msix); 256 msgs = min(msgs, MPS_MSIX_MAX); 257 msgs = min(msgs, 1); /* XXX */ 258 if (msgs != 0) { 259 mps_dprint(sc, MPS_INIT, "Attempting to allocate %d " 260 "MSI-X messages\n", msgs); 261 error = mps_alloc_msix(sc, msgs); 262 } 263 } 264 if (((error != 0) || (msgs == 0)) && (sc->disable_msi == 0)) { 265 msgs = pci_msi_count(dev); 266 mps_dprint(sc, MPS_INIT, "Counted %d MSI messages\n", msgs); 267 msgs = min(msgs, MPS_MSI_MAX); 268 if (msgs != 0) { 269 mps_dprint(sc, MPS_INIT, "Attempting to allocate %d " 270 "MSI messages\n", MPS_MSI_MAX); 271 error = mps_alloc_msi(sc, MPS_MSI_MAX); 272 } 273 } 274 if ((error != 0) || (msgs == 0)) { 275 /* 276 * If neither MSI or MSI-X are avaiable, assume legacy INTx. 277 * This also implies that there will be only 1 queue. 278 */ 279 mps_dprint(sc, MPS_INIT, "Falling back to legacy INTx\n"); 280 sc->mps_flags |= MPS_FLAGS_INTX; 281 msgs = 1; 282 } else 283 sc->mps_flags |= MPS_FLAGS_MSI; 284 285 sc->msi_msgs = msgs; 286 mps_dprint(sc, MPS_INIT, "Allocated %d interrupts\n", msgs); 287 288 return (error); 289 } 290 291 int 292 mps_pci_setup_interrupts(struct mps_softc *sc) 293 { 294 device_t dev; 295 struct mps_queue *q; 296 void *ihandler; 297 int i, error, rid, initial_rid; 298 299 dev = sc->mps_dev; 300 error = ENXIO; 301 302 if (sc->mps_flags & MPS_FLAGS_INTX) { 303 initial_rid = 0; 304 ihandler = mps_intr; 305 } else if (sc->mps_flags & MPS_FLAGS_MSI) { 306 initial_rid = 1; 307 ihandler = mps_intr_msi; 308 } else { 309 mps_dprint(sc, MPS_ERROR|MPS_INIT, 310 "Unable to set up interrupts\n"); 311 return (EINVAL); 312 } 313 314 for (i = 0; i < sc->msi_msgs; i++) { 315 q = &sc->queues[i]; 316 rid = i + initial_rid; 317 q->irq_rid = rid; 318 q->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 319 &q->irq_rid, RF_ACTIVE); 320 if (q->irq == NULL) { 321 mps_dprint(sc, MPS_ERROR|MPS_INIT, 322 "Cannot allocate interrupt RID %d\n", rid); 323 sc->msi_msgs = i; 324 break; 325 } 326 error = bus_setup_intr(dev, q->irq, 327 INTR_TYPE_BIO | INTR_MPSAFE, NULL, ihandler, 328 sc, &q->intrhand); 329 if (error) { 330 mps_dprint(sc, MPS_ERROR|MPS_INIT, 331 "Cannot setup interrupt RID %d\n", rid); 332 sc->msi_msgs = i; 333 break; 334 } 335 } 336 337 mps_dprint(sc, MPS_INIT, "Set up %d interrupts\n", sc->msi_msgs); 338 339 return (error); 340 } 341 342 static int 343 mps_pci_detach(device_t dev) 344 { 345 struct mps_softc *sc; 346 int error; 347 348 sc = device_get_softc(dev); 349 350 if ((error = mps_free(sc)) != 0) 351 return (error); 352 353 mps_pci_free(sc); 354 return (0); 355 } 356 357 void 358 mps_pci_free_interrupts(struct mps_softc *sc) 359 { 360 struct mps_queue *q; 361 int i; 362 363 if (sc->queues == NULL) 364 return; 365 366 for (i = 0; i < sc->msi_msgs; i++) { 367 q = &sc->queues[i]; 368 if (q->irq != NULL) { 369 bus_teardown_intr(sc->mps_dev, q->irq, 370 q->intrhand); 371 bus_release_resource(sc->mps_dev, SYS_RES_IRQ, 372 q->irq_rid, q->irq); 373 } 374 } 375 } 376 377 static void 378 mps_pci_free(struct mps_softc *sc) 379 { 380 381 if (sc->mps_parent_dmat != NULL) { 382 bus_dma_tag_destroy(sc->mps_parent_dmat); 383 } 384 385 mps_pci_free_interrupts(sc); 386 387 if (sc->mps_flags & MPS_FLAGS_MSI) 388 pci_release_msi(sc->mps_dev); 389 390 if (sc->mps_regs_resource != NULL) { 391 bus_release_resource(sc->mps_dev, SYS_RES_MEMORY, 392 sc->mps_regs_rid, sc->mps_regs_resource); 393 } 394 395 return; 396 } 397 398 static int 399 mps_pci_suspend(device_t dev) 400 { 401 return (EINVAL); 402 } 403 404 static int 405 mps_pci_resume(device_t dev) 406 { 407 return (EINVAL); 408 } 409 410 static int 411 mps_alloc_msix(struct mps_softc *sc, int msgs) 412 { 413 int error; 414 415 error = pci_alloc_msix(sc->mps_dev, &msgs); 416 return (error); 417 } 418 419 static int 420 mps_alloc_msi(struct mps_softc *sc, int msgs) 421 { 422 int error; 423 424 error = pci_alloc_msi(sc->mps_dev, &msgs); 425 return (error); 426 } 427 428 int 429 mps_pci_restore(struct mps_softc *sc) 430 { 431 struct pci_devinfo *dinfo; 432 433 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 434 435 dinfo = device_get_ivars(sc->mps_dev); 436 if (dinfo == NULL) { 437 mps_dprint(sc, MPS_FAULT, "%s: NULL dinfo\n", __func__); 438 return (EINVAL); 439 } 440 441 pci_cfg_restore(sc->mps_dev, dinfo); 442 return (0); 443 } 444 445