1 /*- 2 * Copyright (c) 2009 Yahoo! Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 /* PCI/PCI-X/PCIe bus interface for the Avago Tech (LSI) MPT2 controllers */ 31 32 /* TODO Move headers to mpsvar */ 33 #include <sys/types.h> 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/module.h> 38 #include <sys/bus.h> 39 #include <sys/conf.h> 40 #include <sys/malloc.h> 41 #include <sys/sysctl.h> 42 #include <sys/uio.h> 43 44 #include <machine/bus.h> 45 #include <machine/resource.h> 46 #include <sys/rman.h> 47 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcivar.h> 50 #include <dev/pci/pci_private.h> 51 52 #include <dev/mps/mpi/mpi2_type.h> 53 #include <dev/mps/mpi/mpi2.h> 54 #include <dev/mps/mpi/mpi2_ioc.h> 55 #include <dev/mps/mpi/mpi2_cnfg.h> 56 #include <dev/mps/mpi/mpi2_tool.h> 57 58 #include <sys/queue.h> 59 #include <sys/kthread.h> 60 #include <dev/mps/mps_ioctl.h> 61 #include <dev/mps/mpsvar.h> 62 63 static int mps_pci_probe(device_t); 64 static int mps_pci_attach(device_t); 65 static int mps_pci_detach(device_t); 66 static int mps_pci_suspend(device_t); 67 static int mps_pci_resume(device_t); 68 static void mps_pci_free(struct mps_softc *); 69 static int mps_alloc_msix(struct mps_softc *sc, int msgs); 70 static int mps_alloc_msi(struct mps_softc *sc, int msgs); 71 static int mps_pci_alloc_interrupts(struct mps_softc *sc); 72 73 static device_method_t mps_methods[] = { 74 DEVMETHOD(device_probe, mps_pci_probe), 75 DEVMETHOD(device_attach, mps_pci_attach), 76 DEVMETHOD(device_detach, mps_pci_detach), 77 DEVMETHOD(device_suspend, mps_pci_suspend), 78 DEVMETHOD(device_resume, mps_pci_resume), 79 80 DEVMETHOD_END 81 }; 82 83 static driver_t mps_pci_driver = { 84 "mps", 85 mps_methods, 86 sizeof(struct mps_softc) 87 }; 88 89 static devclass_t mps_devclass; 90 DRIVER_MODULE(mps, pci, mps_pci_driver, mps_devclass, 0, 0); 91 MODULE_DEPEND(mps, cam, 1, 1, 1); 92 93 struct mps_ident { 94 uint16_t vendor; 95 uint16_t device; 96 uint16_t subvendor; 97 uint16_t subdevice; 98 u_int flags; 99 const char *desc; 100 } mps_identifiers[] = { 101 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2004, 102 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2004" }, 103 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2008, 104 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2008" }, 105 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_1, 106 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2108" }, 107 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_2, 108 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2108" }, 109 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_3, 110 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2108" }, 111 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_1, 112 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2116" }, 113 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_2, 114 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2116" }, 115 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_1, 116 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 117 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_2, 118 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 119 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_3, 120 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 121 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_4, 122 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 123 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_5, 124 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 125 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_6, 126 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 127 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_1, 128 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2308" }, 129 // Add Customer specific vender/subdevice id before generic 130 // (0xffff) vender/subdevice id. 131 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 132 0x8086, 0x3516, 0, "Intel(R) Integrated RAID Module RMS25JB080" }, 133 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 134 0x8086, 0x3517, 0, "Intel(R) Integrated RAID Module RMS25JB040" }, 135 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 136 0x8086, 0x3518, 0, "Intel(R) Integrated RAID Module RMS25KB080" }, 137 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 138 0x8086, 0x3519, 0, "Intel(R) Integrated RAID Module RMS25KB040" }, 139 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 140 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2308" }, 141 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_3, 142 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2308" }, 143 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SSS6200, 144 0xffff, 0xffff, 0, "Avago Technologies (LSI) SSS6200" }, 145 { 0, 0, 0, 0, 0, NULL } 146 }; 147 148 static struct mps_ident * 149 mps_find_ident(device_t dev) 150 { 151 struct mps_ident *m; 152 153 for (m = mps_identifiers; m->vendor != 0; m++) { 154 if (m->vendor != pci_get_vendor(dev)) 155 continue; 156 if (m->device != pci_get_device(dev)) 157 continue; 158 if ((m->subvendor != 0xffff) && 159 (m->subvendor != pci_get_subvendor(dev))) 160 continue; 161 if ((m->subdevice != 0xffff) && 162 (m->subdevice != pci_get_subdevice(dev))) 163 continue; 164 return (m); 165 } 166 167 return (NULL); 168 } 169 170 static int 171 mps_pci_probe(device_t dev) 172 { 173 struct mps_ident *id; 174 175 if ((id = mps_find_ident(dev)) != NULL) { 176 device_set_desc(dev, id->desc); 177 return (BUS_PROBE_DEFAULT); 178 } 179 return (ENXIO); 180 } 181 182 static int 183 mps_pci_attach(device_t dev) 184 { 185 struct mps_softc *sc; 186 struct mps_ident *m; 187 int error; 188 189 sc = device_get_softc(dev); 190 bzero(sc, sizeof(*sc)); 191 sc->mps_dev = dev; 192 m = mps_find_ident(dev); 193 sc->mps_flags = m->flags; 194 195 mps_get_tunables(sc); 196 197 /* Twiddle basic PCI config bits for a sanity check */ 198 pci_enable_busmaster(dev); 199 200 /* Allocate the System Interface Register Set */ 201 sc->mps_regs_rid = PCIR_BAR(1); 202 if ((sc->mps_regs_resource = bus_alloc_resource_any(dev, 203 SYS_RES_MEMORY, &sc->mps_regs_rid, RF_ACTIVE)) == NULL) { 204 mps_printf(sc, "Cannot allocate PCI registers\n"); 205 return (ENXIO); 206 } 207 sc->mps_btag = rman_get_bustag(sc->mps_regs_resource); 208 sc->mps_bhandle = rman_get_bushandle(sc->mps_regs_resource); 209 210 /* Allocate the parent DMA tag */ 211 if (bus_dma_tag_create( bus_get_dma_tag(dev), /* parent */ 212 1, 0, /* algnmnt, boundary */ 213 BUS_SPACE_MAXADDR, /* lowaddr */ 214 BUS_SPACE_MAXADDR, /* highaddr */ 215 NULL, NULL, /* filter, filterarg */ 216 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 217 BUS_SPACE_UNRESTRICTED, /* nsegments */ 218 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 219 0, /* flags */ 220 NULL, NULL, /* lockfunc, lockarg */ 221 &sc->mps_parent_dmat)) { 222 mps_printf(sc, "Cannot allocate parent DMA tag\n"); 223 mps_pci_free(sc); 224 return (ENOMEM); 225 } 226 227 if (((error = mps_pci_alloc_interrupts(sc)) != 0) || 228 ((error = mps_attach(sc)) != 0)) 229 mps_pci_free(sc); 230 231 return (error); 232 } 233 234 /* 235 * Allocate, but don't assign interrupts early. Doing it before requesting 236 * the IOCFacts message informs the firmware that we want to do MSI-X 237 * multiqueue. We might not use all of the available messages, but there's 238 * no reason to re-alloc if we don't. 239 */ 240 static int 241 mps_pci_alloc_interrupts(struct mps_softc *sc) 242 { 243 device_t dev; 244 int error, msgs; 245 246 dev = sc->mps_dev; 247 error = 0; 248 msgs = 0; 249 250 if (sc->disable_msix == 0) { 251 msgs = pci_msix_count(dev); 252 mps_dprint(sc, MPS_INIT, "Counted %d MSI-X messages\n", msgs); 253 msgs = min(msgs, sc->max_msix); 254 msgs = min(msgs, MPS_MSIX_MAX); 255 msgs = min(msgs, 1); /* XXX */ 256 if (msgs != 0) { 257 mps_dprint(sc, MPS_INIT, "Attempting to allocate %d " 258 "MSI-X messages\n", msgs); 259 error = mps_alloc_msix(sc, msgs); 260 } 261 } 262 if (((error != 0) || (msgs == 0)) && (sc->disable_msi == 0)) { 263 msgs = pci_msi_count(dev); 264 mps_dprint(sc, MPS_INIT, "Counted %d MSI messages\n", msgs); 265 msgs = min(msgs, MPS_MSI_MAX); 266 if (msgs != 0) { 267 mps_dprint(sc, MPS_INIT, "Attempting to allocate %d " 268 "MSI messages\n", MPS_MSI_MAX); 269 error = mps_alloc_msi(sc, MPS_MSI_MAX); 270 } 271 } 272 if ((error != 0) || (msgs == 0)) { 273 /* 274 * If neither MSI or MSI-X are avaiable, assume legacy INTx. 275 * This also implies that there will be only 1 queue. 276 */ 277 mps_dprint(sc, MPS_INIT, "Falling back to legacy INTx\n"); 278 sc->mps_flags |= MPS_FLAGS_INTX; 279 msgs = 1; 280 } else 281 sc->mps_flags |= MPS_FLAGS_MSI; 282 283 sc->msi_msgs = msgs; 284 mps_dprint(sc, MPS_INIT, "Allocated %d interrupts\n", msgs); 285 286 return (error); 287 } 288 289 int 290 mps_pci_setup_interrupts(struct mps_softc *sc) 291 { 292 device_t dev; 293 struct mps_queue *q; 294 void *ihandler; 295 int i, error, rid, initial_rid; 296 297 dev = sc->mps_dev; 298 error = ENXIO; 299 300 if (sc->mps_flags & MPS_FLAGS_INTX) { 301 initial_rid = 0; 302 ihandler = mps_intr; 303 } else if (sc->mps_flags & MPS_FLAGS_MSI) { 304 initial_rid = 1; 305 ihandler = mps_intr_msi; 306 } else { 307 mps_dprint(sc, MPS_ERROR|MPS_INIT, 308 "Unable to set up interrupts\n"); 309 return (EINVAL); 310 } 311 312 for (i = 0; i < sc->msi_msgs; i++) { 313 q = &sc->queues[i]; 314 rid = i + initial_rid; 315 q->irq_rid = rid; 316 q->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 317 &q->irq_rid, RF_ACTIVE); 318 if (q->irq == NULL) { 319 mps_dprint(sc, MPS_ERROR|MPS_INIT, 320 "Cannot allocate interrupt RID %d\n", rid); 321 sc->msi_msgs = i; 322 break; 323 } 324 error = bus_setup_intr(dev, q->irq, 325 INTR_TYPE_BIO | INTR_MPSAFE, NULL, ihandler, 326 sc, &q->intrhand); 327 if (error) { 328 mps_dprint(sc, MPS_ERROR|MPS_INIT, 329 "Cannot setup interrupt RID %d\n", rid); 330 sc->msi_msgs = i; 331 break; 332 } 333 } 334 335 mps_dprint(sc, MPS_INIT, "Set up %d interrupts\n", sc->msi_msgs); 336 337 return (error); 338 } 339 340 static int 341 mps_pci_detach(device_t dev) 342 { 343 struct mps_softc *sc; 344 int error; 345 346 sc = device_get_softc(dev); 347 348 if ((error = mps_free(sc)) != 0) 349 return (error); 350 351 mps_pci_free(sc); 352 return (0); 353 } 354 355 void 356 mps_pci_free_interrupts(struct mps_softc *sc) 357 { 358 struct mps_queue *q; 359 int i; 360 361 if (sc->queues == NULL) 362 return; 363 364 for (i = 0; i < sc->msi_msgs; i++) { 365 q = &sc->queues[i]; 366 if (q->irq != NULL) { 367 bus_teardown_intr(sc->mps_dev, q->irq, 368 q->intrhand); 369 bus_release_resource(sc->mps_dev, SYS_RES_IRQ, 370 q->irq_rid, q->irq); 371 } 372 } 373 } 374 375 static void 376 mps_pci_free(struct mps_softc *sc) 377 { 378 379 if (sc->mps_parent_dmat != NULL) { 380 bus_dma_tag_destroy(sc->mps_parent_dmat); 381 } 382 383 mps_pci_free_interrupts(sc); 384 385 if (sc->mps_flags & MPS_FLAGS_MSI) 386 pci_release_msi(sc->mps_dev); 387 388 if (sc->mps_regs_resource != NULL) { 389 bus_release_resource(sc->mps_dev, SYS_RES_MEMORY, 390 sc->mps_regs_rid, sc->mps_regs_resource); 391 } 392 393 return; 394 } 395 396 static int 397 mps_pci_suspend(device_t dev) 398 { 399 return (EINVAL); 400 } 401 402 static int 403 mps_pci_resume(device_t dev) 404 { 405 return (EINVAL); 406 } 407 408 static int 409 mps_alloc_msix(struct mps_softc *sc, int msgs) 410 { 411 int error; 412 413 error = pci_alloc_msix(sc->mps_dev, &msgs); 414 return (error); 415 } 416 417 static int 418 mps_alloc_msi(struct mps_softc *sc, int msgs) 419 { 420 int error; 421 422 error = pci_alloc_msi(sc->mps_dev, &msgs); 423 return (error); 424 } 425 426 int 427 mps_pci_restore(struct mps_softc *sc) 428 { 429 struct pci_devinfo *dinfo; 430 431 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 432 433 dinfo = device_get_ivars(sc->mps_dev); 434 if (dinfo == NULL) { 435 mps_dprint(sc, MPS_FAULT, "%s: NULL dinfo\n", __func__); 436 return (EINVAL); 437 } 438 439 pci_cfg_restore(sc->mps_dev, dinfo); 440 return (0); 441 } 442 443