1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2009 Yahoo! Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 /* PCI/PCI-X/PCIe bus interface for the Avago Tech (LSI) MPT2 controllers */ 33 34 /* TODO Move headers to mpsvar */ 35 #include <sys/types.h> 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/kernel.h> 39 #include <sys/module.h> 40 #include <sys/bus.h> 41 #include <sys/conf.h> 42 #include <sys/malloc.h> 43 #include <sys/sysctl.h> 44 #include <sys/uio.h> 45 46 #include <machine/bus.h> 47 #include <machine/resource.h> 48 #include <sys/rman.h> 49 50 #include <dev/pci/pcireg.h> 51 #include <dev/pci/pcivar.h> 52 #include <dev/pci/pci_private.h> 53 54 #include <dev/mps/mpi/mpi2_type.h> 55 #include <dev/mps/mpi/mpi2.h> 56 #include <dev/mps/mpi/mpi2_ioc.h> 57 #include <dev/mps/mpi/mpi2_cnfg.h> 58 #include <dev/mps/mpi/mpi2_tool.h> 59 60 #include <sys/queue.h> 61 #include <sys/kthread.h> 62 #include <dev/mps/mps_ioctl.h> 63 #include <dev/mps/mpsvar.h> 64 65 static int mps_pci_probe(device_t); 66 static int mps_pci_attach(device_t); 67 static int mps_pci_detach(device_t); 68 static int mps_pci_suspend(device_t); 69 static int mps_pci_resume(device_t); 70 static void mps_pci_free(struct mps_softc *); 71 static int mps_alloc_msix(struct mps_softc *sc, int msgs); 72 static int mps_alloc_msi(struct mps_softc *sc, int msgs); 73 static int mps_pci_alloc_interrupts(struct mps_softc *sc); 74 75 static device_method_t mps_methods[] = { 76 DEVMETHOD(device_probe, mps_pci_probe), 77 DEVMETHOD(device_attach, mps_pci_attach), 78 DEVMETHOD(device_detach, mps_pci_detach), 79 DEVMETHOD(device_suspend, mps_pci_suspend), 80 DEVMETHOD(device_resume, mps_pci_resume), 81 82 DEVMETHOD_END 83 }; 84 85 static driver_t mps_pci_driver = { 86 "mps", 87 mps_methods, 88 sizeof(struct mps_softc) 89 }; 90 91 struct mps_ident { 92 uint16_t vendor; 93 uint16_t device; 94 uint16_t subvendor; 95 uint16_t subdevice; 96 u_int flags; 97 const char *desc; 98 } mps_identifiers[] = { 99 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2004, 100 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2004" }, 101 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2008, 102 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2008" }, 103 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_1, 104 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2108" }, 105 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_2, 106 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2108" }, 107 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_3, 108 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2108" }, 109 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_1, 110 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2116" }, 111 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_2, 112 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2116" }, 113 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_1, 114 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 115 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_2, 116 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 117 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_3, 118 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 119 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_4, 120 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 121 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_5, 122 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 123 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_6, 124 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 125 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_1, 126 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2308" }, 127 // Add Customer specific vender/subdevice id before generic 128 // (0xffff) vender/subdevice id. 129 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 130 0x8086, 0x3516, 0, "Intel(R) Integrated RAID Module RMS25JB080" }, 131 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 132 0x8086, 0x3517, 0, "Intel(R) Integrated RAID Module RMS25JB040" }, 133 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 134 0x8086, 0x3518, 0, "Intel(R) Integrated RAID Module RMS25KB080" }, 135 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 136 0x8086, 0x3519, 0, "Intel(R) Integrated RAID Module RMS25KB040" }, 137 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 138 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2308" }, 139 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_3, 140 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2308" }, 141 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SSS6200, 142 0xffff, 0xffff, 0, "Avago Technologies (LSI) SSS6200" }, 143 { 0, 0, 0, 0, 0, NULL } 144 }; 145 146 static devclass_t mps_devclass; 147 DRIVER_MODULE(mps, pci, mps_pci_driver, mps_devclass, 0, 0); 148 MODULE_DEPEND(mps, cam, 1, 1, 1); 149 MODULE_PNP_INFO("U16:vendor;U16:device;U16:subvendor;U16:subdevice", pci, mps, 150 mps_identifiers, nitems(mps_identifiers) - 1); 151 static struct mps_ident * 152 mps_find_ident(device_t dev) 153 { 154 struct mps_ident *m; 155 156 for (m = mps_identifiers; m->vendor != 0; m++) { 157 if (m->vendor != pci_get_vendor(dev)) 158 continue; 159 if (m->device != pci_get_device(dev)) 160 continue; 161 if ((m->subvendor != 0xffff) && 162 (m->subvendor != pci_get_subvendor(dev))) 163 continue; 164 if ((m->subdevice != 0xffff) && 165 (m->subdevice != pci_get_subdevice(dev))) 166 continue; 167 return (m); 168 } 169 170 return (NULL); 171 } 172 173 static int 174 mps_pci_probe(device_t dev) 175 { 176 struct mps_ident *id; 177 178 if ((id = mps_find_ident(dev)) != NULL) { 179 device_set_desc(dev, id->desc); 180 return (BUS_PROBE_DEFAULT); 181 } 182 return (ENXIO); 183 } 184 185 static int 186 mps_pci_attach(device_t dev) 187 { 188 bus_dma_template_t t; 189 struct mps_softc *sc; 190 struct mps_ident *m; 191 int error; 192 193 sc = device_get_softc(dev); 194 bzero(sc, sizeof(*sc)); 195 sc->mps_dev = dev; 196 m = mps_find_ident(dev); 197 sc->mps_flags = m->flags; 198 199 mps_get_tunables(sc); 200 201 /* Twiddle basic PCI config bits for a sanity check */ 202 pci_enable_busmaster(dev); 203 204 /* Allocate the System Interface Register Set */ 205 sc->mps_regs_rid = PCIR_BAR(1); 206 if ((sc->mps_regs_resource = bus_alloc_resource_any(dev, 207 SYS_RES_MEMORY, &sc->mps_regs_rid, RF_ACTIVE)) == NULL) { 208 mps_printf(sc, "Cannot allocate PCI registers\n"); 209 return (ENXIO); 210 } 211 sc->mps_btag = rman_get_bustag(sc->mps_regs_resource); 212 sc->mps_bhandle = rman_get_bushandle(sc->mps_regs_resource); 213 214 /* Allocate the parent DMA tag */ 215 bus_dma_template_init(&t, bus_get_dma_tag(dev)); 216 if (bus_dma_template_tag(&t, &sc->mps_parent_dmat)) { 217 mps_printf(sc, "Cannot allocate parent DMA tag\n"); 218 mps_pci_free(sc); 219 return (ENOMEM); 220 } 221 222 if (((error = mps_pci_alloc_interrupts(sc)) != 0) || 223 ((error = mps_attach(sc)) != 0)) 224 mps_pci_free(sc); 225 226 return (error); 227 } 228 229 /* 230 * Allocate, but don't assign interrupts early. Doing it before requesting 231 * the IOCFacts message informs the firmware that we want to do MSI-X 232 * multiqueue. We might not use all of the available messages, but there's 233 * no reason to re-alloc if we don't. 234 */ 235 static int 236 mps_pci_alloc_interrupts(struct mps_softc *sc) 237 { 238 device_t dev; 239 int error, msgs; 240 241 dev = sc->mps_dev; 242 error = 0; 243 msgs = 0; 244 245 if (sc->disable_msix == 0) { 246 msgs = pci_msix_count(dev); 247 mps_dprint(sc, MPS_INIT, "Counted %d MSI-X messages\n", msgs); 248 msgs = min(msgs, sc->max_msix); 249 msgs = min(msgs, MPS_MSIX_MAX); 250 msgs = min(msgs, 1); /* XXX */ 251 if (msgs != 0) { 252 mps_dprint(sc, MPS_INIT, "Attempting to allocate %d " 253 "MSI-X messages\n", msgs); 254 error = mps_alloc_msix(sc, msgs); 255 } 256 } 257 if (((error != 0) || (msgs == 0)) && (sc->disable_msi == 0)) { 258 msgs = pci_msi_count(dev); 259 mps_dprint(sc, MPS_INIT, "Counted %d MSI messages\n", msgs); 260 msgs = min(msgs, MPS_MSI_MAX); 261 if (msgs != 0) { 262 mps_dprint(sc, MPS_INIT, "Attempting to allocate %d " 263 "MSI messages\n", MPS_MSI_MAX); 264 error = mps_alloc_msi(sc, MPS_MSI_MAX); 265 } 266 } 267 if ((error != 0) || (msgs == 0)) { 268 /* 269 * If neither MSI or MSI-X are avaiable, assume legacy INTx. 270 * This also implies that there will be only 1 queue. 271 */ 272 mps_dprint(sc, MPS_INIT, "Falling back to legacy INTx\n"); 273 sc->mps_flags |= MPS_FLAGS_INTX; 274 msgs = 1; 275 } else 276 sc->mps_flags |= MPS_FLAGS_MSI; 277 278 sc->msi_msgs = msgs; 279 mps_dprint(sc, MPS_INIT, "Allocated %d interrupts\n", msgs); 280 281 return (error); 282 } 283 284 int 285 mps_pci_setup_interrupts(struct mps_softc *sc) 286 { 287 device_t dev; 288 struct mps_queue *q; 289 void *ihandler; 290 int i, error, rid, initial_rid; 291 292 dev = sc->mps_dev; 293 error = ENXIO; 294 295 if (sc->mps_flags & MPS_FLAGS_INTX) { 296 initial_rid = 0; 297 ihandler = mps_intr; 298 } else if (sc->mps_flags & MPS_FLAGS_MSI) { 299 initial_rid = 1; 300 ihandler = mps_intr_msi; 301 } else { 302 mps_dprint(sc, MPS_ERROR|MPS_INIT, 303 "Unable to set up interrupts\n"); 304 return (EINVAL); 305 } 306 307 for (i = 0; i < sc->msi_msgs; i++) { 308 q = &sc->queues[i]; 309 rid = i + initial_rid; 310 q->irq_rid = rid; 311 q->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 312 &q->irq_rid, RF_ACTIVE); 313 if (q->irq == NULL) { 314 mps_dprint(sc, MPS_ERROR|MPS_INIT, 315 "Cannot allocate interrupt RID %d\n", rid); 316 sc->msi_msgs = i; 317 break; 318 } 319 error = bus_setup_intr(dev, q->irq, 320 INTR_TYPE_BIO | INTR_MPSAFE, NULL, ihandler, 321 sc, &q->intrhand); 322 if (error) { 323 mps_dprint(sc, MPS_ERROR|MPS_INIT, 324 "Cannot setup interrupt RID %d\n", rid); 325 sc->msi_msgs = i; 326 break; 327 } 328 } 329 330 mps_dprint(sc, MPS_INIT, "Set up %d interrupts\n", sc->msi_msgs); 331 332 return (error); 333 } 334 335 static int 336 mps_pci_detach(device_t dev) 337 { 338 struct mps_softc *sc; 339 int error; 340 341 sc = device_get_softc(dev); 342 343 if ((error = mps_free(sc)) != 0) 344 return (error); 345 346 mps_pci_free(sc); 347 return (0); 348 } 349 350 void 351 mps_pci_free_interrupts(struct mps_softc *sc) 352 { 353 struct mps_queue *q; 354 int i; 355 356 if (sc->queues == NULL) 357 return; 358 359 for (i = 0; i < sc->msi_msgs; i++) { 360 q = &sc->queues[i]; 361 if (q->irq != NULL) { 362 bus_teardown_intr(sc->mps_dev, q->irq, 363 q->intrhand); 364 bus_release_resource(sc->mps_dev, SYS_RES_IRQ, 365 q->irq_rid, q->irq); 366 } 367 } 368 } 369 370 static void 371 mps_pci_free(struct mps_softc *sc) 372 { 373 374 if (sc->mps_parent_dmat != NULL) { 375 bus_dma_tag_destroy(sc->mps_parent_dmat); 376 } 377 378 mps_pci_free_interrupts(sc); 379 380 if (sc->mps_flags & MPS_FLAGS_MSI) 381 pci_release_msi(sc->mps_dev); 382 383 if (sc->mps_regs_resource != NULL) { 384 bus_release_resource(sc->mps_dev, SYS_RES_MEMORY, 385 sc->mps_regs_rid, sc->mps_regs_resource); 386 } 387 388 return; 389 } 390 391 static int 392 mps_pci_suspend(device_t dev) 393 { 394 return (EINVAL); 395 } 396 397 static int 398 mps_pci_resume(device_t dev) 399 { 400 return (EINVAL); 401 } 402 403 static int 404 mps_alloc_msix(struct mps_softc *sc, int msgs) 405 { 406 int error; 407 408 error = pci_alloc_msix(sc->mps_dev, &msgs); 409 return (error); 410 } 411 412 static int 413 mps_alloc_msi(struct mps_softc *sc, int msgs) 414 { 415 int error; 416 417 error = pci_alloc_msi(sc->mps_dev, &msgs); 418 return (error); 419 } 420 421 int 422 mps_pci_restore(struct mps_softc *sc) 423 { 424 struct pci_devinfo *dinfo; 425 426 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 427 428 dinfo = device_get_ivars(sc->mps_dev); 429 if (dinfo == NULL) { 430 mps_dprint(sc, MPS_FAULT, "%s: NULL dinfo\n", __func__); 431 return (EINVAL); 432 } 433 434 pci_cfg_restore(sc->mps_dev, dinfo); 435 return (0); 436 } 437