xref: /freebsd/sys/dev/mps/mps_pci.c (revision 718cf2ccb9956613756ab15d7a0e28f2c8e91cab)
1d3c7b9a0SKenneth D. Merry /*-
2*718cf2ccSPedro F. Giffuni  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3*718cf2ccSPedro F. Giffuni  *
4d3c7b9a0SKenneth D. Merry  * Copyright (c) 2009 Yahoo! Inc.
5d3c7b9a0SKenneth D. Merry  * All rights reserved.
6d3c7b9a0SKenneth D. Merry  *
7d3c7b9a0SKenneth D. Merry  * Redistribution and use in source and binary forms, with or without
8d3c7b9a0SKenneth D. Merry  * modification, are permitted provided that the following conditions
9d3c7b9a0SKenneth D. Merry  * are met:
10d3c7b9a0SKenneth D. Merry  * 1. Redistributions of source code must retain the above copyright
11d3c7b9a0SKenneth D. Merry  *    notice, this list of conditions and the following disclaimer.
12d3c7b9a0SKenneth D. Merry  * 2. Redistributions in binary form must reproduce the above copyright
13d3c7b9a0SKenneth D. Merry  *    notice, this list of conditions and the following disclaimer in the
14d3c7b9a0SKenneth D. Merry  *    documentation and/or other materials provided with the distribution.
15d3c7b9a0SKenneth D. Merry  *
16d3c7b9a0SKenneth D. Merry  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17d3c7b9a0SKenneth D. Merry  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18d3c7b9a0SKenneth D. Merry  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19d3c7b9a0SKenneth D. Merry  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20d3c7b9a0SKenneth D. Merry  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21d3c7b9a0SKenneth D. Merry  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22d3c7b9a0SKenneth D. Merry  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23d3c7b9a0SKenneth D. Merry  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24d3c7b9a0SKenneth D. Merry  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25d3c7b9a0SKenneth D. Merry  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26d3c7b9a0SKenneth D. Merry  * SUCH DAMAGE.
27d3c7b9a0SKenneth D. Merry  */
28d3c7b9a0SKenneth D. Merry 
29d3c7b9a0SKenneth D. Merry #include <sys/cdefs.h>
30d3c7b9a0SKenneth D. Merry __FBSDID("$FreeBSD$");
31d3c7b9a0SKenneth D. Merry 
32ef065d89SStephen McConnell /* PCI/PCI-X/PCIe bus interface for the Avago Tech (LSI) MPT2 controllers */
33d3c7b9a0SKenneth D. Merry 
34d043c564SKenneth D. Merry /* TODO Move headers to mpsvar */
35d3c7b9a0SKenneth D. Merry #include <sys/types.h>
36d3c7b9a0SKenneth D. Merry #include <sys/param.h>
37d3c7b9a0SKenneth D. Merry #include <sys/systm.h>
38d3c7b9a0SKenneth D. Merry #include <sys/kernel.h>
39d3c7b9a0SKenneth D. Merry #include <sys/module.h>
40d3c7b9a0SKenneth D. Merry #include <sys/bus.h>
41d3c7b9a0SKenneth D. Merry #include <sys/conf.h>
42d3c7b9a0SKenneth D. Merry #include <sys/malloc.h>
43d3c7b9a0SKenneth D. Merry #include <sys/sysctl.h>
4406e79492SKenneth D. Merry #include <sys/uio.h>
45d3c7b9a0SKenneth D. Merry 
46d3c7b9a0SKenneth D. Merry #include <machine/bus.h>
47d3c7b9a0SKenneth D. Merry #include <machine/resource.h>
48d3c7b9a0SKenneth D. Merry #include <sys/rman.h>
49d3c7b9a0SKenneth D. Merry 
50d3c7b9a0SKenneth D. Merry #include <dev/pci/pcireg.h>
51d3c7b9a0SKenneth D. Merry #include <dev/pci/pcivar.h>
52d043c564SKenneth D. Merry #include <dev/pci/pci_private.h>
53d3c7b9a0SKenneth D. Merry 
54d3c7b9a0SKenneth D. Merry #include <dev/mps/mpi/mpi2_type.h>
55d3c7b9a0SKenneth D. Merry #include <dev/mps/mpi/mpi2.h>
56d3c7b9a0SKenneth D. Merry #include <dev/mps/mpi/mpi2_ioc.h>
57d3c7b9a0SKenneth D. Merry #include <dev/mps/mpi/mpi2_cnfg.h>
58d043c564SKenneth D. Merry #include <dev/mps/mpi/mpi2_tool.h>
59d3c7b9a0SKenneth D. Merry 
60d043c564SKenneth D. Merry #include <sys/queue.h>
61d043c564SKenneth D. Merry #include <sys/kthread.h>
62d043c564SKenneth D. Merry #include <dev/mps/mps_ioctl.h>
63d3c7b9a0SKenneth D. Merry #include <dev/mps/mpsvar.h>
64d3c7b9a0SKenneth D. Merry 
65d3c7b9a0SKenneth D. Merry static int	mps_pci_probe(device_t);
66d3c7b9a0SKenneth D. Merry static int	mps_pci_attach(device_t);
67d3c7b9a0SKenneth D. Merry static int	mps_pci_detach(device_t);
68d3c7b9a0SKenneth D. Merry static int	mps_pci_suspend(device_t);
69d3c7b9a0SKenneth D. Merry static int	mps_pci_resume(device_t);
70d3c7b9a0SKenneth D. Merry static void	mps_pci_free(struct mps_softc *);
71d3c7b9a0SKenneth D. Merry static int	mps_alloc_msix(struct mps_softc *sc, int msgs);
72d3c7b9a0SKenneth D. Merry static int	mps_alloc_msi(struct mps_softc *sc, int msgs);
73252b2b4fSScott Long static int	mps_pci_alloc_interrupts(struct mps_softc *sc);
74d3c7b9a0SKenneth D. Merry 
75d3c7b9a0SKenneth D. Merry static device_method_t mps_methods[] = {
76d3c7b9a0SKenneth D. Merry 	DEVMETHOD(device_probe,		mps_pci_probe),
77d3c7b9a0SKenneth D. Merry 	DEVMETHOD(device_attach,	mps_pci_attach),
78d3c7b9a0SKenneth D. Merry 	DEVMETHOD(device_detach,	mps_pci_detach),
79d3c7b9a0SKenneth D. Merry 	DEVMETHOD(device_suspend,	mps_pci_suspend),
80d3c7b9a0SKenneth D. Merry 	DEVMETHOD(device_resume,	mps_pci_resume),
814b7ec270SMarius Strobl 
824b7ec270SMarius Strobl 	DEVMETHOD_END
83d3c7b9a0SKenneth D. Merry };
84d3c7b9a0SKenneth D. Merry 
85d3c7b9a0SKenneth D. Merry static driver_t mps_pci_driver = {
86d3c7b9a0SKenneth D. Merry 	"mps",
87d3c7b9a0SKenneth D. Merry 	mps_methods,
88d3c7b9a0SKenneth D. Merry 	sizeof(struct mps_softc)
89d3c7b9a0SKenneth D. Merry };
90d3c7b9a0SKenneth D. Merry 
91d3c7b9a0SKenneth D. Merry static devclass_t	mps_devclass;
92d3c7b9a0SKenneth D. Merry DRIVER_MODULE(mps, pci, mps_pci_driver, mps_devclass, 0, 0);
9317a46b47SKenneth D. Merry MODULE_DEPEND(mps, cam, 1, 1, 1);
94d3c7b9a0SKenneth D. Merry 
95d3c7b9a0SKenneth D. Merry struct mps_ident {
96d3c7b9a0SKenneth D. Merry 	uint16_t	vendor;
97d3c7b9a0SKenneth D. Merry 	uint16_t	device;
98d3c7b9a0SKenneth D. Merry 	uint16_t	subvendor;
99d3c7b9a0SKenneth D. Merry 	uint16_t	subdevice;
100d3c7b9a0SKenneth D. Merry 	u_int		flags;
101d3c7b9a0SKenneth D. Merry 	const char	*desc;
102d3c7b9a0SKenneth D. Merry } mps_identifiers[] = {
103d3c7b9a0SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2004,
104ef065d89SStephen McConnell 	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2004" },
105d3c7b9a0SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2008,
106ef065d89SStephen McConnell 	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2008" },
107d3c7b9a0SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_1,
108ef065d89SStephen McConnell 	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2108" },
109d3c7b9a0SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_2,
110ef065d89SStephen McConnell 	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2108" },
111d3c7b9a0SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_3,
112ef065d89SStephen McConnell 	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2108" },
113d3c7b9a0SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_1,
114ef065d89SStephen McConnell 	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2116" },
115d3c7b9a0SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_2,
116ef065d89SStephen McConnell 	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2116" },
117d3c7b9a0SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_1,
118ef065d89SStephen McConnell 	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" },
119d3c7b9a0SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_2,
120ef065d89SStephen McConnell 	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" },
121d3c7b9a0SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_3,
122ef065d89SStephen McConnell 	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" },
123d3c7b9a0SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_4,
124ef065d89SStephen McConnell 	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" },
125d3c7b9a0SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_5,
126ef065d89SStephen McConnell 	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" },
127d3c7b9a0SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_6,
128ef065d89SStephen McConnell 	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" },
129d043c564SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_1,
130ef065d89SStephen McConnell 	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2308" },
131d043c564SKenneth D. Merry 	// Add Customer specific vender/subdevice id before generic
132d043c564SKenneth D. Merry 	// (0xffff) vender/subdevice id.
133d043c564SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
134d043c564SKenneth D. Merry 	    0x8086, 0x3516, 0, "Intel(R) Integrated RAID Module RMS25JB080" },
135d043c564SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
136d043c564SKenneth D. Merry 	    0x8086, 0x3517, 0, "Intel(R) Integrated RAID Module RMS25JB040" },
137d043c564SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
138d043c564SKenneth D. Merry 	    0x8086, 0x3518, 0, "Intel(R) Integrated RAID Module RMS25KB080" },
139d043c564SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
140d043c564SKenneth D. Merry 	    0x8086, 0x3519, 0, "Intel(R) Integrated RAID Module RMS25KB040" },
141d043c564SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
142ef065d89SStephen McConnell 	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2308" },
143d043c564SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_3,
144ef065d89SStephen McConnell 	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2308" },
145d043c564SKenneth D. Merry 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SSS6200,
146ef065d89SStephen McConnell 	    0xffff, 0xffff, 0, "Avago Technologies (LSI) SSS6200" },
147d3c7b9a0SKenneth D. Merry 	{ 0, 0, 0, 0, 0, NULL }
148d3c7b9a0SKenneth D. Merry };
149d3c7b9a0SKenneth D. Merry 
150d3c7b9a0SKenneth D. Merry static struct mps_ident *
151d3c7b9a0SKenneth D. Merry mps_find_ident(device_t dev)
152d3c7b9a0SKenneth D. Merry {
153d3c7b9a0SKenneth D. Merry 	struct mps_ident *m;
154d3c7b9a0SKenneth D. Merry 
155d3c7b9a0SKenneth D. Merry 	for (m = mps_identifiers; m->vendor != 0; m++) {
156d3c7b9a0SKenneth D. Merry 		if (m->vendor != pci_get_vendor(dev))
157d3c7b9a0SKenneth D. Merry 			continue;
158d3c7b9a0SKenneth D. Merry 		if (m->device != pci_get_device(dev))
159d3c7b9a0SKenneth D. Merry 			continue;
160d3c7b9a0SKenneth D. Merry 		if ((m->subvendor != 0xffff) &&
161d3c7b9a0SKenneth D. Merry 		    (m->subvendor != pci_get_subvendor(dev)))
162d3c7b9a0SKenneth D. Merry 			continue;
163d3c7b9a0SKenneth D. Merry 		if ((m->subdevice != 0xffff) &&
164d3c7b9a0SKenneth D. Merry 		    (m->subdevice != pci_get_subdevice(dev)))
165d3c7b9a0SKenneth D. Merry 			continue;
166d3c7b9a0SKenneth D. Merry 		return (m);
167d3c7b9a0SKenneth D. Merry 	}
168d3c7b9a0SKenneth D. Merry 
169d3c7b9a0SKenneth D. Merry 	return (NULL);
170d3c7b9a0SKenneth D. Merry }
171d3c7b9a0SKenneth D. Merry 
172d3c7b9a0SKenneth D. Merry static int
173d3c7b9a0SKenneth D. Merry mps_pci_probe(device_t dev)
174d3c7b9a0SKenneth D. Merry {
175d3c7b9a0SKenneth D. Merry 	struct mps_ident *id;
176d3c7b9a0SKenneth D. Merry 
177d3c7b9a0SKenneth D. Merry 	if ((id = mps_find_ident(dev)) != NULL) {
178d3c7b9a0SKenneth D. Merry 		device_set_desc(dev, id->desc);
179bab89358SKenneth D. Merry 		return (BUS_PROBE_DEFAULT);
180d3c7b9a0SKenneth D. Merry 	}
181d3c7b9a0SKenneth D. Merry 	return (ENXIO);
182d3c7b9a0SKenneth D. Merry }
183d3c7b9a0SKenneth D. Merry 
184d3c7b9a0SKenneth D. Merry static int
185d3c7b9a0SKenneth D. Merry mps_pci_attach(device_t dev)
186d3c7b9a0SKenneth D. Merry {
187d3c7b9a0SKenneth D. Merry 	struct mps_softc *sc;
188d3c7b9a0SKenneth D. Merry 	struct mps_ident *m;
189d3c7b9a0SKenneth D. Merry 	int error;
190d3c7b9a0SKenneth D. Merry 
191d3c7b9a0SKenneth D. Merry 	sc = device_get_softc(dev);
192d3c7b9a0SKenneth D. Merry 	bzero(sc, sizeof(*sc));
193d3c7b9a0SKenneth D. Merry 	sc->mps_dev = dev;
194d3c7b9a0SKenneth D. Merry 	m = mps_find_ident(dev);
195d3c7b9a0SKenneth D. Merry 	sc->mps_flags = m->flags;
196d3c7b9a0SKenneth D. Merry 
197252b2b4fSScott Long 	mps_get_tunables(sc);
198252b2b4fSScott Long 
199d3c7b9a0SKenneth D. Merry 	/* Twiddle basic PCI config bits for a sanity check */
200c68534f1SScott Long 	pci_enable_busmaster(dev);
201d3c7b9a0SKenneth D. Merry 
202d3c7b9a0SKenneth D. Merry 	/* Allocate the System Interface Register Set */
203d3c7b9a0SKenneth D. Merry 	sc->mps_regs_rid = PCIR_BAR(1);
204d3c7b9a0SKenneth D. Merry 	if ((sc->mps_regs_resource = bus_alloc_resource_any(dev,
205d3c7b9a0SKenneth D. Merry 	    SYS_RES_MEMORY, &sc->mps_regs_rid, RF_ACTIVE)) == NULL) {
2061610f95cSScott Long 		mps_printf(sc, "Cannot allocate PCI registers\n");
207d3c7b9a0SKenneth D. Merry 		return (ENXIO);
208d3c7b9a0SKenneth D. Merry 	}
209d3c7b9a0SKenneth D. Merry 	sc->mps_btag = rman_get_bustag(sc->mps_regs_resource);
210d3c7b9a0SKenneth D. Merry 	sc->mps_bhandle = rman_get_bushandle(sc->mps_regs_resource);
211d3c7b9a0SKenneth D. Merry 
212d3c7b9a0SKenneth D. Merry 	/* Allocate the parent DMA tag */
213d043c564SKenneth D. Merry 	if (bus_dma_tag_create( bus_get_dma_tag(dev),	/* parent */
214d3c7b9a0SKenneth D. Merry 				1, 0,			/* algnmnt, boundary */
215d3c7b9a0SKenneth D. Merry 				BUS_SPACE_MAXADDR,	/* lowaddr */
216d3c7b9a0SKenneth D. Merry 				BUS_SPACE_MAXADDR,	/* highaddr */
217d3c7b9a0SKenneth D. Merry 				NULL, NULL,		/* filter, filterarg */
218d3c7b9a0SKenneth D. Merry 				BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
219d3c7b9a0SKenneth D. Merry 				BUS_SPACE_UNRESTRICTED,	/* nsegments */
220d3c7b9a0SKenneth D. Merry 				BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
221d3c7b9a0SKenneth D. Merry 				0,			/* flags */
222d3c7b9a0SKenneth D. Merry 				NULL, NULL,		/* lockfunc, lockarg */
223d3c7b9a0SKenneth D. Merry 				&sc->mps_parent_dmat)) {
2241610f95cSScott Long 		mps_printf(sc, "Cannot allocate parent DMA tag\n");
225d3c7b9a0SKenneth D. Merry 		mps_pci_free(sc);
226d3c7b9a0SKenneth D. Merry 		return (ENOMEM);
227d3c7b9a0SKenneth D. Merry 	}
228d3c7b9a0SKenneth D. Merry 
229252b2b4fSScott Long 	if (((error = mps_pci_alloc_interrupts(sc)) != 0) ||
230252b2b4fSScott Long 	    ((error = mps_attach(sc)) != 0))
231d3c7b9a0SKenneth D. Merry 		mps_pci_free(sc);
232d3c7b9a0SKenneth D. Merry 
233d3c7b9a0SKenneth D. Merry 	return (error);
234d3c7b9a0SKenneth D. Merry }
235d3c7b9a0SKenneth D. Merry 
236252b2b4fSScott Long /*
237252b2b4fSScott Long  * Allocate, but don't assign interrupts early.  Doing it before requesting
238252b2b4fSScott Long  * the IOCFacts message informs the firmware that we want to do MSI-X
239252b2b4fSScott Long  * multiqueue.  We might not use all of the available messages, but there's
240252b2b4fSScott Long  * no reason to re-alloc if we don't.
241252b2b4fSScott Long  */
242252b2b4fSScott Long static int
243252b2b4fSScott Long mps_pci_alloc_interrupts(struct mps_softc *sc)
244252b2b4fSScott Long {
245252b2b4fSScott Long 	device_t dev;
246252b2b4fSScott Long 	int error, msgs;
247252b2b4fSScott Long 
248252b2b4fSScott Long 	dev = sc->mps_dev;
249252b2b4fSScott Long 	error = 0;
2502068b2aaSScott Long 	msgs = 0;
251252b2b4fSScott Long 
2523c5ac992SScott Long 	if (sc->disable_msix == 0) {
2533c5ac992SScott Long 		msgs = pci_msix_count(dev);
2543c5ac992SScott Long 		mps_dprint(sc, MPS_INIT, "Counted %d MSI-X messages\n", msgs);
2553c5ac992SScott Long 		msgs = min(msgs, sc->max_msix);
2563c5ac992SScott Long 		msgs = min(msgs, MPS_MSIX_MAX);
2573c5ac992SScott Long 		msgs = min(msgs, 1);	/* XXX */
2583c5ac992SScott Long 		if (msgs != 0) {
2597eed4c18SScott Long 			mps_dprint(sc, MPS_INIT, "Attempting to allocate %d "
2607eed4c18SScott Long 			    "MSI-X messages\n", msgs);
2613c5ac992SScott Long 			error = mps_alloc_msix(sc, msgs);
2623c5ac992SScott Long 		}
2633c5ac992SScott Long 	}
2643c5ac992SScott Long 	if (((error != 0) || (msgs == 0)) && (sc->disable_msi == 0)) {
2653c5ac992SScott Long 		msgs = pci_msi_count(dev);
2663c5ac992SScott Long 		mps_dprint(sc, MPS_INIT, "Counted %d MSI messages\n", msgs);
2673c5ac992SScott Long 		msgs = min(msgs, MPS_MSI_MAX);
2683c5ac992SScott Long 		if (msgs != 0) {
2697eed4c18SScott Long 			mps_dprint(sc, MPS_INIT, "Attempting to allocate %d "
2707eed4c18SScott Long 			    "MSI messages\n", MPS_MSI_MAX);
2713c5ac992SScott Long 			error = mps_alloc_msi(sc, MPS_MSI_MAX);
2723c5ac992SScott Long 		}
2733c5ac992SScott Long 	}
2743c5ac992SScott Long 	if ((error != 0) || (msgs == 0)) {
2753d96cd78SScott Long 		/*
2763d96cd78SScott Long 		 * If neither MSI or MSI-X are avaiable, assume legacy INTx.
2773d96cd78SScott Long 		 * This also implies that there will be only 1 queue.
2783d96cd78SScott Long 		 */
2793c5ac992SScott Long 		mps_dprint(sc, MPS_INIT, "Falling back to legacy INTx\n");
2803d96cd78SScott Long 		sc->mps_flags |= MPS_FLAGS_INTX;
2813d96cd78SScott Long 		msgs = 1;
2823c5ac992SScott Long 	} else
2833d96cd78SScott Long 		sc->mps_flags |= MPS_FLAGS_MSI;
284252b2b4fSScott Long 
285252b2b4fSScott Long 	sc->msi_msgs = msgs;
2863d96cd78SScott Long 	mps_dprint(sc, MPS_INIT, "Allocated %d interrupts\n", msgs);
2873d96cd78SScott Long 
288252b2b4fSScott Long 	return (error);
289252b2b4fSScott Long }
290252b2b4fSScott Long 
291d3c7b9a0SKenneth D. Merry int
292d3c7b9a0SKenneth D. Merry mps_pci_setup_interrupts(struct mps_softc *sc)
293d3c7b9a0SKenneth D. Merry {
294d3c7b9a0SKenneth D. Merry 	device_t dev;
295bec09074SScott Long 	struct mps_queue *q;
2963d96cd78SScott Long 	void *ihandler;
2973d96cd78SScott Long 	int i, error, rid, initial_rid;
298d3c7b9a0SKenneth D. Merry 
299d3c7b9a0SKenneth D. Merry 	dev = sc->mps_dev;
300d3c7b9a0SKenneth D. Merry 	error = ENXIO;
301d3c7b9a0SKenneth D. Merry 
3023d96cd78SScott Long 	if (sc->mps_flags & MPS_FLAGS_INTX) {
3033d96cd78SScott Long 		initial_rid = 0;
3043d96cd78SScott Long 		ihandler = mps_intr;
3053d96cd78SScott Long 	} else if (sc->mps_flags & MPS_FLAGS_MSI) {
3063d96cd78SScott Long 		initial_rid = 1;
3073d96cd78SScott Long 		ihandler = mps_intr_msi;
308d3c7b9a0SKenneth D. Merry 	} else {
3093d96cd78SScott Long 		mps_dprint(sc, MPS_ERROR|MPS_INIT,
3103d96cd78SScott Long 		    "Unable to set up interrupts\n");
3113d96cd78SScott Long 		return (EINVAL);
3123d96cd78SScott Long 	}
3133d96cd78SScott Long 
3143d96cd78SScott Long 	for (i = 0; i < sc->msi_msgs; i++) {
315bec09074SScott Long 		q = &sc->queues[i];
3163d96cd78SScott Long 		rid = i + initial_rid;
317bec09074SScott Long 		q->irq_rid = rid;
318bec09074SScott Long 		q->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
319bec09074SScott Long 		    &q->irq_rid, RF_ACTIVE);
320bec09074SScott Long 		if (q->irq == NULL) {
3213d96cd78SScott Long 			mps_dprint(sc, MPS_ERROR|MPS_INIT,
3223d96cd78SScott Long 			    "Cannot allocate interrupt RID %d\n", rid);
3233c5ac992SScott Long 			sc->msi_msgs = i;
3243d96cd78SScott Long 			break;
325d3c7b9a0SKenneth D. Merry 		}
326bec09074SScott Long 		error = bus_setup_intr(dev, q->irq,
3273d96cd78SScott Long 		    INTR_TYPE_BIO | INTR_MPSAFE, NULL, ihandler,
328bec09074SScott Long 		    sc, &q->intrhand);
329d3c7b9a0SKenneth D. Merry 		if (error) {
3303d96cd78SScott Long 			mps_dprint(sc, MPS_ERROR|MPS_INIT,
3313d96cd78SScott Long 			    "Cannot setup interrupt RID %d\n", rid);
3323c5ac992SScott Long 			sc->msi_msgs = i;
333d3c7b9a0SKenneth D. Merry 			break;
334d3c7b9a0SKenneth D. Merry 		}
335d3c7b9a0SKenneth D. Merry 	}
3363d96cd78SScott Long 
3373d96cd78SScott Long 	mps_dprint(sc, MPS_INIT, "Set up %d interrupts\n", sc->msi_msgs);
338d3c7b9a0SKenneth D. Merry 
339d3c7b9a0SKenneth D. Merry 	return (error);
340d3c7b9a0SKenneth D. Merry }
341d3c7b9a0SKenneth D. Merry 
342d3c7b9a0SKenneth D. Merry static int
343d3c7b9a0SKenneth D. Merry mps_pci_detach(device_t dev)
344d3c7b9a0SKenneth D. Merry {
345d3c7b9a0SKenneth D. Merry 	struct mps_softc *sc;
346d3c7b9a0SKenneth D. Merry 	int error;
347d3c7b9a0SKenneth D. Merry 
348d3c7b9a0SKenneth D. Merry 	sc = device_get_softc(dev);
349d3c7b9a0SKenneth D. Merry 
350d3c7b9a0SKenneth D. Merry 	if ((error = mps_free(sc)) != 0)
351d3c7b9a0SKenneth D. Merry 		return (error);
352d3c7b9a0SKenneth D. Merry 
353d3c7b9a0SKenneth D. Merry 	mps_pci_free(sc);
354d3c7b9a0SKenneth D. Merry 	return (0);
355d3c7b9a0SKenneth D. Merry }
356d3c7b9a0SKenneth D. Merry 
357bec09074SScott Long void
358bec09074SScott Long mps_pci_free_interrupts(struct mps_softc *sc)
359bec09074SScott Long {
360bec09074SScott Long 	struct mps_queue *q;
361bec09074SScott Long 	int i;
362bec09074SScott Long 
363bec09074SScott Long 	if (sc->queues == NULL)
364bec09074SScott Long 		return;
365bec09074SScott Long 
366bec09074SScott Long 	for (i = 0; i < sc->msi_msgs; i++) {
367bec09074SScott Long 		q = &sc->queues[i];
368bec09074SScott Long 		if (q->irq != NULL) {
369bec09074SScott Long 			bus_teardown_intr(sc->mps_dev, q->irq,
370bec09074SScott Long 			    q->intrhand);
371bec09074SScott Long 			bus_release_resource(sc->mps_dev, SYS_RES_IRQ,
372bec09074SScott Long 			    q->irq_rid, q->irq);
373bec09074SScott Long 		}
374bec09074SScott Long 	}
375bec09074SScott Long }
376bec09074SScott Long 
377d3c7b9a0SKenneth D. Merry static void
378d3c7b9a0SKenneth D. Merry mps_pci_free(struct mps_softc *sc)
379d3c7b9a0SKenneth D. Merry {
380d3c7b9a0SKenneth D. Merry 
381d3c7b9a0SKenneth D. Merry 	if (sc->mps_parent_dmat != NULL) {
382d3c7b9a0SKenneth D. Merry 		bus_dma_tag_destroy(sc->mps_parent_dmat);
383d3c7b9a0SKenneth D. Merry 	}
384d3c7b9a0SKenneth D. Merry 
385bec09074SScott Long 	mps_pci_free_interrupts(sc);
386d3c7b9a0SKenneth D. Merry 
3873d96cd78SScott Long 	if (sc->mps_flags & MPS_FLAGS_MSI)
3883d96cd78SScott Long 		pci_release_msi(sc->mps_dev);
389d3c7b9a0SKenneth D. Merry 
390d3c7b9a0SKenneth D. Merry 	if (sc->mps_regs_resource != NULL) {
391d3c7b9a0SKenneth D. Merry 		bus_release_resource(sc->mps_dev, SYS_RES_MEMORY,
392d3c7b9a0SKenneth D. Merry 		    sc->mps_regs_rid, sc->mps_regs_resource);
393d3c7b9a0SKenneth D. Merry 	}
394d3c7b9a0SKenneth D. Merry 
395d3c7b9a0SKenneth D. Merry 	return;
396d3c7b9a0SKenneth D. Merry }
397d3c7b9a0SKenneth D. Merry 
398d3c7b9a0SKenneth D. Merry static int
399d3c7b9a0SKenneth D. Merry mps_pci_suspend(device_t dev)
400d3c7b9a0SKenneth D. Merry {
401d3c7b9a0SKenneth D. Merry 	return (EINVAL);
402d3c7b9a0SKenneth D. Merry }
403d3c7b9a0SKenneth D. Merry 
404d3c7b9a0SKenneth D. Merry static int
405d3c7b9a0SKenneth D. Merry mps_pci_resume(device_t dev)
406d3c7b9a0SKenneth D. Merry {
407d3c7b9a0SKenneth D. Merry 	return (EINVAL);
408d3c7b9a0SKenneth D. Merry }
409d3c7b9a0SKenneth D. Merry 
410d3c7b9a0SKenneth D. Merry static int
411d3c7b9a0SKenneth D. Merry mps_alloc_msix(struct mps_softc *sc, int msgs)
412d3c7b9a0SKenneth D. Merry {
413d3c7b9a0SKenneth D. Merry 	int error;
414d3c7b9a0SKenneth D. Merry 
415d3c7b9a0SKenneth D. Merry 	error = pci_alloc_msix(sc->mps_dev, &msgs);
416d3c7b9a0SKenneth D. Merry 	return (error);
417d3c7b9a0SKenneth D. Merry }
418d3c7b9a0SKenneth D. Merry 
419d3c7b9a0SKenneth D. Merry static int
420d3c7b9a0SKenneth D. Merry mps_alloc_msi(struct mps_softc *sc, int msgs)
421d3c7b9a0SKenneth D. Merry {
422d3c7b9a0SKenneth D. Merry 	int error;
423d3c7b9a0SKenneth D. Merry 
424d3c7b9a0SKenneth D. Merry 	error = pci_alloc_msi(sc->mps_dev, &msgs);
425d3c7b9a0SKenneth D. Merry 	return (error);
426d3c7b9a0SKenneth D. Merry }
427d3c7b9a0SKenneth D. Merry 
428d043c564SKenneth D. Merry int
429d043c564SKenneth D. Merry mps_pci_restore(struct mps_softc *sc)
430d043c564SKenneth D. Merry {
431d043c564SKenneth D. Merry 	struct pci_devinfo *dinfo;
432d043c564SKenneth D. Merry 
433d043c564SKenneth D. Merry 	mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
434d043c564SKenneth D. Merry 
435d043c564SKenneth D. Merry 	dinfo = device_get_ivars(sc->mps_dev);
436d043c564SKenneth D. Merry 	if (dinfo == NULL) {
437d043c564SKenneth D. Merry 		mps_dprint(sc, MPS_FAULT, "%s: NULL dinfo\n", __func__);
438d043c564SKenneth D. Merry 		return (EINVAL);
439d043c564SKenneth D. Merry 	}
440d043c564SKenneth D. Merry 
441d043c564SKenneth D. Merry 	pci_cfg_restore(sc->mps_dev, dinfo);
442d043c564SKenneth D. Merry 	return (0);
443d043c564SKenneth D. Merry }
444d043c564SKenneth D. Merry 
445