1 /*- 2 * Copyright (c) 2009 Yahoo! Inc. 3 * Copyright (c) 2011-2015 LSI Corp. 4 * Copyright (c) 2013-2015 Avago Technologies 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 29 * 30 * $FreeBSD$ 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 /* Communications core for Avago Technologies (LSI) MPT2 */ 37 38 /* TODO Move headers to mpsvar */ 39 #include <sys/types.h> 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/selinfo.h> 44 #include <sys/lock.h> 45 #include <sys/mutex.h> 46 #include <sys/module.h> 47 #include <sys/bus.h> 48 #include <sys/conf.h> 49 #include <sys/bio.h> 50 #include <sys/malloc.h> 51 #include <sys/uio.h> 52 #include <sys/sysctl.h> 53 #include <sys/queue.h> 54 #include <sys/kthread.h> 55 #include <sys/taskqueue.h> 56 #include <sys/endian.h> 57 #include <sys/eventhandler.h> 58 59 #include <machine/bus.h> 60 #include <machine/resource.h> 61 #include <sys/rman.h> 62 #include <sys/proc.h> 63 64 #include <dev/pci/pcivar.h> 65 66 #include <cam/cam.h> 67 #include <cam/scsi/scsi_all.h> 68 69 #include <dev/mps/mpi/mpi2_type.h> 70 #include <dev/mps/mpi/mpi2.h> 71 #include <dev/mps/mpi/mpi2_ioc.h> 72 #include <dev/mps/mpi/mpi2_sas.h> 73 #include <dev/mps/mpi/mpi2_cnfg.h> 74 #include <dev/mps/mpi/mpi2_init.h> 75 #include <dev/mps/mpi/mpi2_tool.h> 76 #include <dev/mps/mps_ioctl.h> 77 #include <dev/mps/mpsvar.h> 78 #include <dev/mps/mps_table.h> 79 80 static int mps_diag_reset(struct mps_softc *sc, int sleep_flag); 81 static int mps_init_queues(struct mps_softc *sc); 82 static int mps_message_unit_reset(struct mps_softc *sc, int sleep_flag); 83 static int mps_transition_operational(struct mps_softc *sc); 84 static int mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching); 85 static void mps_iocfacts_free(struct mps_softc *sc); 86 static void mps_startup(void *arg); 87 static int mps_send_iocinit(struct mps_softc *sc); 88 static int mps_alloc_queues(struct mps_softc *sc); 89 static int mps_alloc_replies(struct mps_softc *sc); 90 static int mps_alloc_requests(struct mps_softc *sc); 91 static int mps_attach_log(struct mps_softc *sc); 92 static __inline void mps_complete_command(struct mps_softc *sc, 93 struct mps_command *cm); 94 static void mps_dispatch_event(struct mps_softc *sc, uintptr_t data, 95 MPI2_EVENT_NOTIFICATION_REPLY *reply); 96 static void mps_config_complete(struct mps_softc *sc, struct mps_command *cm); 97 static void mps_periodic(void *); 98 static int mps_reregister_events(struct mps_softc *sc); 99 static void mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm); 100 static int mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts); 101 static int mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag); 102 SYSCTL_NODE(_hw, OID_AUTO, mps, CTLFLAG_RD, 0, "MPS Driver Parameters"); 103 104 MALLOC_DEFINE(M_MPT2, "mps", "mpt2 driver memory"); 105 106 /* 107 * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of 108 * any state and back to its initialization state machine. 109 */ 110 static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d }; 111 112 /* Added this union to smoothly convert le64toh cm->cm_desc.Words. 113 * Compiler only support unint64_t to be passed as argument. 114 * Otherwise it will through below error 115 * "aggregate value used where an integer was expected" 116 */ 117 118 typedef union _reply_descriptor { 119 u64 word; 120 struct { 121 u32 low; 122 u32 high; 123 } u; 124 }reply_descriptor,address_descriptor; 125 126 /* Rate limit chain-fail messages to 1 per minute */ 127 static struct timeval mps_chainfail_interval = { 60, 0 }; 128 129 /* 130 * sleep_flag can be either CAN_SLEEP or NO_SLEEP. 131 * If this function is called from process context, it can sleep 132 * and there is no harm to sleep, in case if this fuction is called 133 * from Interrupt handler, we can not sleep and need NO_SLEEP flag set. 134 * based on sleep flags driver will call either msleep, pause or DELAY. 135 * msleep and pause are of same variant, but pause is used when mps_mtx 136 * is not hold by driver. 137 * 138 */ 139 static int 140 mps_diag_reset(struct mps_softc *sc,int sleep_flag) 141 { 142 uint32_t reg; 143 int i, error, tries = 0; 144 uint8_t first_wait_done = FALSE; 145 146 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 147 148 /* Clear any pending interrupts */ 149 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 150 151 /*Force NO_SLEEP for threads prohibited to sleep 152 * e.a Thread from interrupt handler are prohibited to sleep. 153 */ 154 if (curthread->td_no_sleeping != 0) 155 sleep_flag = NO_SLEEP; 156 157 /* Push the magic sequence */ 158 error = ETIMEDOUT; 159 while (tries++ < 20) { 160 for (i = 0; i < sizeof(mpt2_reset_magic); i++) 161 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 162 mpt2_reset_magic[i]); 163 /* wait 100 msec */ 164 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 165 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 166 "mpsdiag", hz/10); 167 else if (sleep_flag == CAN_SLEEP) 168 pause("mpsdiag", hz/10); 169 else 170 DELAY(100 * 1000); 171 172 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 173 if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) { 174 error = 0; 175 break; 176 } 177 } 178 if (error) 179 return (error); 180 181 /* Send the actual reset. XXX need to refresh the reg? */ 182 mps_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET, 183 reg | MPI2_DIAG_RESET_ADAPTER); 184 185 /* Wait up to 300 seconds in 50ms intervals */ 186 error = ETIMEDOUT; 187 for (i = 0; i < 6000; i++) { 188 /* 189 * Wait 50 msec. If this is the first time through, wait 256 190 * msec to satisfy Diag Reset timing requirements. 191 */ 192 if (first_wait_done) { 193 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 194 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 195 "mpsdiag", hz/20); 196 else if (sleep_flag == CAN_SLEEP) 197 pause("mpsdiag", hz/20); 198 else 199 DELAY(50 * 1000); 200 } else { 201 DELAY(256 * 1000); 202 first_wait_done = TRUE; 203 } 204 /* 205 * Check for the RESET_ADAPTER bit to be cleared first, then 206 * wait for the RESET state to be cleared, which takes a little 207 * longer. 208 */ 209 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 210 if (reg & MPI2_DIAG_RESET_ADAPTER) { 211 continue; 212 } 213 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 214 if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) { 215 error = 0; 216 break; 217 } 218 } 219 if (error) 220 return (error); 221 222 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0); 223 224 return (0); 225 } 226 227 static int 228 mps_message_unit_reset(struct mps_softc *sc, int sleep_flag) 229 { 230 231 MPS_FUNCTRACE(sc); 232 233 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, 234 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET << 235 MPI2_DOORBELL_FUNCTION_SHIFT); 236 237 if (mps_wait_db_ack(sc, 5, sleep_flag) != 0) { 238 mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed : <%s>\n", 239 __func__); 240 return (ETIMEDOUT); 241 } 242 243 return (0); 244 } 245 246 static int 247 mps_transition_ready(struct mps_softc *sc) 248 { 249 uint32_t reg, state; 250 int error, tries = 0; 251 int sleep_flags; 252 253 MPS_FUNCTRACE(sc); 254 /* If we are in attach call, do not sleep */ 255 sleep_flags = (sc->mps_flags & MPS_FLAGS_ATTACH_DONE) 256 ? CAN_SLEEP:NO_SLEEP; 257 error = 0; 258 while (tries++ < 1200) { 259 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 260 mps_dprint(sc, MPS_INIT, "Doorbell= 0x%x\n", reg); 261 262 /* 263 * Ensure the IOC is ready to talk. If it's not, try 264 * resetting it. 265 */ 266 if (reg & MPI2_DOORBELL_USED) { 267 mps_diag_reset(sc, sleep_flags); 268 DELAY(50000); 269 continue; 270 } 271 272 /* Is the adapter owned by another peer? */ 273 if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) == 274 (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) { 275 device_printf(sc->mps_dev, "IOC is under the control " 276 "of another peer host, aborting initialization.\n"); 277 return (ENXIO); 278 } 279 280 state = reg & MPI2_IOC_STATE_MASK; 281 if (state == MPI2_IOC_STATE_READY) { 282 /* Ready to go! */ 283 error = 0; 284 break; 285 } else if (state == MPI2_IOC_STATE_FAULT) { 286 mps_dprint(sc, MPS_FAULT, "IOC in fault state 0x%x, resetting\n", 287 state & MPI2_DOORBELL_FAULT_CODE_MASK); 288 mps_diag_reset(sc, sleep_flags); 289 } else if (state == MPI2_IOC_STATE_OPERATIONAL) { 290 /* Need to take ownership */ 291 mps_message_unit_reset(sc, sleep_flags); 292 } else if (state == MPI2_IOC_STATE_RESET) { 293 /* Wait a bit, IOC might be in transition */ 294 mps_dprint(sc, MPS_FAULT, 295 "IOC in unexpected reset state\n"); 296 } else { 297 mps_dprint(sc, MPS_FAULT, 298 "IOC in unknown state 0x%x\n", state); 299 error = EINVAL; 300 break; 301 } 302 303 /* Wait 50ms for things to settle down. */ 304 DELAY(50000); 305 } 306 307 if (error) 308 device_printf(sc->mps_dev, "Cannot transition IOC to ready\n"); 309 310 return (error); 311 } 312 313 static int 314 mps_transition_operational(struct mps_softc *sc) 315 { 316 uint32_t reg, state; 317 int error; 318 319 MPS_FUNCTRACE(sc); 320 321 error = 0; 322 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 323 mps_dprint(sc, MPS_INIT, "Doorbell= 0x%x\n", reg); 324 325 state = reg & MPI2_IOC_STATE_MASK; 326 if (state != MPI2_IOC_STATE_READY) { 327 if ((error = mps_transition_ready(sc)) != 0) { 328 mps_dprint(sc, MPS_FAULT, 329 "%s failed to transition ready\n", __func__); 330 return (error); 331 } 332 } 333 334 error = mps_send_iocinit(sc); 335 return (error); 336 } 337 338 /* 339 * This is called during attach and when re-initializing due to a Diag Reset. 340 * IOC Facts is used to allocate many of the structures needed by the driver. 341 * If called from attach, de-allocation is not required because the driver has 342 * not allocated any structures yet, but if called from a Diag Reset, previously 343 * allocated structures based on IOC Facts will need to be freed and re- 344 * allocated bases on the latest IOC Facts. 345 */ 346 static int 347 mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching) 348 { 349 int error; 350 Mpi2IOCFactsReply_t saved_facts; 351 uint8_t saved_mode, reallocating; 352 353 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 354 355 /* Save old IOC Facts and then only reallocate if Facts have changed */ 356 if (!attaching) { 357 bcopy(sc->facts, &saved_facts, sizeof(MPI2_IOC_FACTS_REPLY)); 358 } 359 360 /* 361 * Get IOC Facts. In all cases throughout this function, panic if doing 362 * a re-initialization and only return the error if attaching so the OS 363 * can handle it. 364 */ 365 if ((error = mps_get_iocfacts(sc, sc->facts)) != 0) { 366 if (attaching) { 367 mps_dprint(sc, MPS_FAULT, "%s failed to get IOC Facts " 368 "with error %d\n", __func__, error); 369 return (error); 370 } else { 371 panic("%s failed to get IOC Facts with error %d\n", 372 __func__, error); 373 } 374 } 375 376 mps_print_iocfacts(sc, sc->facts); 377 378 snprintf(sc->fw_version, sizeof(sc->fw_version), 379 "%02d.%02d.%02d.%02d", 380 sc->facts->FWVersion.Struct.Major, 381 sc->facts->FWVersion.Struct.Minor, 382 sc->facts->FWVersion.Struct.Unit, 383 sc->facts->FWVersion.Struct.Dev); 384 385 mps_printf(sc, "Firmware: %s, Driver: %s\n", sc->fw_version, 386 MPS_DRIVER_VERSION); 387 mps_printf(sc, "IOCCapabilities: %b\n", sc->facts->IOCCapabilities, 388 "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf" 389 "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR" 390 "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc"); 391 392 /* 393 * If the chip doesn't support event replay then a hard reset will be 394 * required to trigger a full discovery. Do the reset here then 395 * retransition to Ready. A hard reset might have already been done, 396 * but it doesn't hurt to do it again. Only do this if attaching, not 397 * for a Diag Reset. 398 */ 399 if (attaching) { 400 if ((sc->facts->IOCCapabilities & 401 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0) { 402 mps_diag_reset(sc, NO_SLEEP); 403 if ((error = mps_transition_ready(sc)) != 0) { 404 mps_dprint(sc, MPS_FAULT, "%s failed to " 405 "transition to ready with error %d\n", 406 __func__, error); 407 return (error); 408 } 409 } 410 } 411 412 /* 413 * Set flag if IR Firmware is loaded. If the RAID Capability has 414 * changed from the previous IOC Facts, log a warning, but only if 415 * checking this after a Diag Reset and not during attach. 416 */ 417 saved_mode = sc->ir_firmware; 418 if (sc->facts->IOCCapabilities & 419 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) 420 sc->ir_firmware = 1; 421 if (!attaching) { 422 if (sc->ir_firmware != saved_mode) { 423 mps_dprint(sc, MPS_FAULT, "%s new IR/IT mode in IOC " 424 "Facts does not match previous mode\n", __func__); 425 } 426 } 427 428 /* Only deallocate and reallocate if relevant IOC Facts have changed */ 429 reallocating = FALSE; 430 if ((!attaching) && 431 ((saved_facts.MsgVersion != sc->facts->MsgVersion) || 432 (saved_facts.HeaderVersion != sc->facts->HeaderVersion) || 433 (saved_facts.MaxChainDepth != sc->facts->MaxChainDepth) || 434 (saved_facts.RequestCredit != sc->facts->RequestCredit) || 435 (saved_facts.ProductID != sc->facts->ProductID) || 436 (saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) || 437 (saved_facts.IOCRequestFrameSize != 438 sc->facts->IOCRequestFrameSize) || 439 (saved_facts.MaxTargets != sc->facts->MaxTargets) || 440 (saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) || 441 (saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) || 442 (saved_facts.HighPriorityCredit != sc->facts->HighPriorityCredit) || 443 (saved_facts.MaxReplyDescriptorPostQueueDepth != 444 sc->facts->MaxReplyDescriptorPostQueueDepth) || 445 (saved_facts.ReplyFrameSize != sc->facts->ReplyFrameSize) || 446 (saved_facts.MaxVolumes != sc->facts->MaxVolumes) || 447 (saved_facts.MaxPersistentEntries != 448 sc->facts->MaxPersistentEntries))) { 449 reallocating = TRUE; 450 } 451 452 /* 453 * Some things should be done if attaching or re-allocating after a Diag 454 * Reset, but are not needed after a Diag Reset if the FW has not 455 * changed. 456 */ 457 if (attaching || reallocating) { 458 /* 459 * Check if controller supports FW diag buffers and set flag to 460 * enable each type. 461 */ 462 if (sc->facts->IOCCapabilities & 463 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) 464 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE]. 465 enabled = TRUE; 466 if (sc->facts->IOCCapabilities & 467 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) 468 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT]. 469 enabled = TRUE; 470 if (sc->facts->IOCCapabilities & 471 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) 472 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED]. 473 enabled = TRUE; 474 475 /* 476 * Set flag if EEDP is supported and if TLR is supported. 477 */ 478 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) 479 sc->eedp_enabled = TRUE; 480 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) 481 sc->control_TLR = TRUE; 482 483 /* 484 * Size the queues. Since the reply queues always need one free 485 * entry, we'll just deduct one reply message here. 486 */ 487 sc->num_reqs = MIN(MPS_REQ_FRAMES, sc->facts->RequestCredit); 488 sc->num_replies = MIN(MPS_REPLY_FRAMES + MPS_EVT_REPLY_FRAMES, 489 sc->facts->MaxReplyDescriptorPostQueueDepth) - 1; 490 491 /* 492 * Initialize all Tail Queues 493 */ 494 TAILQ_INIT(&sc->req_list); 495 TAILQ_INIT(&sc->high_priority_req_list); 496 TAILQ_INIT(&sc->chain_list); 497 TAILQ_INIT(&sc->tm_list); 498 } 499 500 /* 501 * If doing a Diag Reset and the FW is significantly different 502 * (reallocating will be set above in IOC Facts comparison), then all 503 * buffers based on the IOC Facts will need to be freed before they are 504 * reallocated. 505 */ 506 if (reallocating) { 507 mps_iocfacts_free(sc); 508 mpssas_realloc_targets(sc, saved_facts.MaxTargets + 509 saved_facts.MaxVolumes); 510 } 511 512 /* 513 * Any deallocation has been completed. Now start reallocating 514 * if needed. Will only need to reallocate if attaching or if the new 515 * IOC Facts are different from the previous IOC Facts after a Diag 516 * Reset. Targets have already been allocated above if needed. 517 */ 518 if (attaching || reallocating) { 519 if (((error = mps_alloc_queues(sc)) != 0) || 520 ((error = mps_alloc_replies(sc)) != 0) || 521 ((error = mps_alloc_requests(sc)) != 0)) { 522 if (attaching ) { 523 mps_dprint(sc, MPS_FAULT, "%s failed to alloc " 524 "queues with error %d\n", __func__, error); 525 mps_free(sc); 526 return (error); 527 } else { 528 panic("%s failed to alloc queues with error " 529 "%d\n", __func__, error); 530 } 531 } 532 } 533 534 /* Always initialize the queues */ 535 bzero(sc->free_queue, sc->fqdepth * 4); 536 mps_init_queues(sc); 537 538 /* 539 * Always get the chip out of the reset state, but only panic if not 540 * attaching. If attaching and there is an error, that is handled by 541 * the OS. 542 */ 543 error = mps_transition_operational(sc); 544 if (error != 0) { 545 if (attaching) { 546 mps_printf(sc, "%s failed to transition to operational " 547 "with error %d\n", __func__, error); 548 mps_free(sc); 549 return (error); 550 } else { 551 panic("%s failed to transition to operational with " 552 "error %d\n", __func__, error); 553 } 554 } 555 556 /* 557 * Finish the queue initialization. 558 * These are set here instead of in mps_init_queues() because the 559 * IOC resets these values during the state transition in 560 * mps_transition_operational(). The free index is set to 1 561 * because the corresponding index in the IOC is set to 0, and the 562 * IOC treats the queues as full if both are set to the same value. 563 * Hence the reason that the queue can't hold all of the possible 564 * replies. 565 */ 566 sc->replypostindex = 0; 567 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); 568 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0); 569 570 /* 571 * Attach the subsystems so they can prepare their event masks. 572 */ 573 /* XXX Should be dynamic so that IM/IR and user modules can attach */ 574 if (attaching) { 575 if (((error = mps_attach_log(sc)) != 0) || 576 ((error = mps_attach_sas(sc)) != 0) || 577 ((error = mps_attach_user(sc)) != 0)) { 578 mps_printf(sc, "%s failed to attach all subsystems: " 579 "error %d\n", __func__, error); 580 mps_free(sc); 581 return (error); 582 } 583 584 if ((error = mps_pci_setup_interrupts(sc)) != 0) { 585 mps_printf(sc, "%s failed to setup interrupts\n", 586 __func__); 587 mps_free(sc); 588 return (error); 589 } 590 } 591 592 /* 593 * Set flag if this is a WD controller. This shouldn't ever change, but 594 * reset it after a Diag Reset, just in case. 595 */ 596 sc->WD_available = FALSE; 597 if (pci_get_device(sc->mps_dev) == MPI2_MFGPAGE_DEVID_SSS6200) 598 sc->WD_available = TRUE; 599 600 return (error); 601 } 602 603 /* 604 * This is called if memory is being free (during detach for example) and when 605 * buffers need to be reallocated due to a Diag Reset. 606 */ 607 static void 608 mps_iocfacts_free(struct mps_softc *sc) 609 { 610 struct mps_command *cm; 611 int i; 612 613 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 614 615 if (sc->free_busaddr != 0) 616 bus_dmamap_unload(sc->queues_dmat, sc->queues_map); 617 if (sc->free_queue != NULL) 618 bus_dmamem_free(sc->queues_dmat, sc->free_queue, 619 sc->queues_map); 620 if (sc->queues_dmat != NULL) 621 bus_dma_tag_destroy(sc->queues_dmat); 622 623 if (sc->chain_busaddr != 0) 624 bus_dmamap_unload(sc->chain_dmat, sc->chain_map); 625 if (sc->chain_frames != NULL) 626 bus_dmamem_free(sc->chain_dmat, sc->chain_frames, 627 sc->chain_map); 628 if (sc->chain_dmat != NULL) 629 bus_dma_tag_destroy(sc->chain_dmat); 630 631 if (sc->sense_busaddr != 0) 632 bus_dmamap_unload(sc->sense_dmat, sc->sense_map); 633 if (sc->sense_frames != NULL) 634 bus_dmamem_free(sc->sense_dmat, sc->sense_frames, 635 sc->sense_map); 636 if (sc->sense_dmat != NULL) 637 bus_dma_tag_destroy(sc->sense_dmat); 638 639 if (sc->reply_busaddr != 0) 640 bus_dmamap_unload(sc->reply_dmat, sc->reply_map); 641 if (sc->reply_frames != NULL) 642 bus_dmamem_free(sc->reply_dmat, sc->reply_frames, 643 sc->reply_map); 644 if (sc->reply_dmat != NULL) 645 bus_dma_tag_destroy(sc->reply_dmat); 646 647 if (sc->req_busaddr != 0) 648 bus_dmamap_unload(sc->req_dmat, sc->req_map); 649 if (sc->req_frames != NULL) 650 bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map); 651 if (sc->req_dmat != NULL) 652 bus_dma_tag_destroy(sc->req_dmat); 653 654 if (sc->chains != NULL) 655 free(sc->chains, M_MPT2); 656 if (sc->commands != NULL) { 657 for (i = 1; i < sc->num_reqs; i++) { 658 cm = &sc->commands[i]; 659 bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap); 660 } 661 free(sc->commands, M_MPT2); 662 } 663 if (sc->buffer_dmat != NULL) 664 bus_dma_tag_destroy(sc->buffer_dmat); 665 } 666 667 /* 668 * The terms diag reset and hard reset are used interchangeably in the MPI 669 * docs to mean resetting the controller chip. In this code diag reset 670 * cleans everything up, and the hard reset function just sends the reset 671 * sequence to the chip. This should probably be refactored so that every 672 * subsystem gets a reset notification of some sort, and can clean up 673 * appropriately. 674 */ 675 int 676 mps_reinit(struct mps_softc *sc) 677 { 678 int error; 679 struct mpssas_softc *sassc; 680 681 sassc = sc->sassc; 682 683 MPS_FUNCTRACE(sc); 684 685 mtx_assert(&sc->mps_mtx, MA_OWNED); 686 687 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) { 688 mps_dprint(sc, MPS_INIT, "%s reset already in progress\n", 689 __func__); 690 return 0; 691 } 692 693 mps_dprint(sc, MPS_INFO, "Reinitializing controller,\n"); 694 /* make sure the completion callbacks can recognize they're getting 695 * a NULL cm_reply due to a reset. 696 */ 697 sc->mps_flags |= MPS_FLAGS_DIAGRESET; 698 699 /* 700 * Mask interrupts here. 701 */ 702 mps_dprint(sc, MPS_INIT, "%s mask interrupts\n", __func__); 703 mps_mask_intr(sc); 704 705 error = mps_diag_reset(sc, CAN_SLEEP); 706 if (error != 0) { 707 /* XXXSL No need to panic here */ 708 panic("%s hard reset failed with error %d\n", 709 __func__, error); 710 } 711 712 /* Restore the PCI state, including the MSI-X registers */ 713 mps_pci_restore(sc); 714 715 /* Give the I/O subsystem special priority to get itself prepared */ 716 mpssas_handle_reinit(sc); 717 718 /* 719 * Get IOC Facts and allocate all structures based on this information. 720 * The attach function will also call mps_iocfacts_allocate at startup. 721 * If relevant values have changed in IOC Facts, this function will free 722 * all of the memory based on IOC Facts and reallocate that memory. 723 */ 724 if ((error = mps_iocfacts_allocate(sc, FALSE)) != 0) { 725 panic("%s IOC Facts based allocation failed with error %d\n", 726 __func__, error); 727 } 728 729 /* 730 * Mapping structures will be re-allocated after getting IOC Page8, so 731 * free these structures here. 732 */ 733 mps_mapping_exit(sc); 734 735 /* 736 * The static page function currently read is IOC Page8. Others can be 737 * added in future. It's possible that the values in IOC Page8 have 738 * changed after a Diag Reset due to user modification, so always read 739 * these. Interrupts are masked, so unmask them before getting config 740 * pages. 741 */ 742 mps_unmask_intr(sc); 743 sc->mps_flags &= ~MPS_FLAGS_DIAGRESET; 744 mps_base_static_config_pages(sc); 745 746 /* 747 * Some mapping info is based in IOC Page8 data, so re-initialize the 748 * mapping tables. 749 */ 750 mps_mapping_initialize(sc); 751 752 /* 753 * Restart will reload the event masks clobbered by the reset, and 754 * then enable the port. 755 */ 756 mps_reregister_events(sc); 757 758 /* the end of discovery will release the simq, so we're done. */ 759 mps_dprint(sc, MPS_INFO, "%s finished sc %p post %u free %u\n", 760 __func__, sc, sc->replypostindex, sc->replyfreeindex); 761 762 mpssas_release_simq_reinit(sassc); 763 764 return 0; 765 } 766 767 /* Wait for the chip to ACK a word that we've put into its FIFO 768 * Wait for <timeout> seconds. In single loop wait for busy loop 769 * for 500 microseconds. 770 * Total is [ 0.5 * (2000 * <timeout>) ] in miliseconds. 771 * */ 772 static int 773 mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag) 774 { 775 776 u32 cntdn, count; 777 u32 int_status; 778 u32 doorbell; 779 780 count = 0; 781 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 782 do { 783 int_status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 784 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 785 mps_dprint(sc, MPS_INIT, 786 "%s: successful count(%d), timeout(%d)\n", 787 __func__, count, timeout); 788 return 0; 789 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 790 doorbell = mps_regread(sc, MPI2_DOORBELL_OFFSET); 791 if ((doorbell & MPI2_IOC_STATE_MASK) == 792 MPI2_IOC_STATE_FAULT) { 793 mps_dprint(sc, MPS_FAULT, 794 "fault_state(0x%04x)!\n", doorbell); 795 return (EFAULT); 796 } 797 } else if (int_status == 0xFFFFFFFF) 798 goto out; 799 800 /* If it can sleep, sleep for 1 milisecond, else busy loop for 801 * 0.5 milisecond */ 802 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 803 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 804 "mpsdba", hz/1000); 805 else if (sleep_flag == CAN_SLEEP) 806 pause("mpsdba", hz/1000); 807 else 808 DELAY(500); 809 count++; 810 } while (--cntdn); 811 812 out: 813 mps_dprint(sc, MPS_FAULT, "%s: failed due to timeout count(%d), " 814 "int_status(%x)!\n", __func__, count, int_status); 815 return (ETIMEDOUT); 816 817 } 818 819 /* Wait for the chip to signal that the next word in its FIFO can be fetched */ 820 static int 821 mps_wait_db_int(struct mps_softc *sc) 822 { 823 int retry; 824 825 for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) { 826 if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) & 827 MPI2_HIS_IOC2SYS_DB_STATUS) != 0) 828 return (0); 829 DELAY(2000); 830 } 831 return (ETIMEDOUT); 832 } 833 834 /* Step through the synchronous command state machine, i.e. "Doorbell mode" */ 835 static int 836 mps_request_sync(struct mps_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply, 837 int req_sz, int reply_sz, int timeout) 838 { 839 uint32_t *data32; 840 uint16_t *data16; 841 int i, count, ioc_sz, residual; 842 int sleep_flags = CAN_SLEEP; 843 844 if (curthread->td_no_sleeping != 0) 845 sleep_flags = NO_SLEEP; 846 847 /* Step 1 */ 848 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 849 850 /* Step 2 */ 851 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 852 return (EBUSY); 853 854 /* Step 3 855 * Announce that a message is coming through the doorbell. Messages 856 * are pushed at 32bit words, so round up if needed. 857 */ 858 count = (req_sz + 3) / 4; 859 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, 860 (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) | 861 (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT)); 862 863 /* Step 4 */ 864 if (mps_wait_db_int(sc) || 865 (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) { 866 mps_dprint(sc, MPS_FAULT, "Doorbell failed to activate\n"); 867 return (ENXIO); 868 } 869 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 870 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) { 871 mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed\n"); 872 return (ENXIO); 873 } 874 875 /* Step 5 */ 876 /* Clock out the message data synchronously in 32-bit dwords*/ 877 data32 = (uint32_t *)req; 878 for (i = 0; i < count; i++) { 879 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i])); 880 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) { 881 mps_dprint(sc, MPS_FAULT, 882 "Timeout while writing doorbell\n"); 883 return (ENXIO); 884 } 885 } 886 887 /* Step 6 */ 888 /* Clock in the reply in 16-bit words. The total length of the 889 * message is always in the 4th byte, so clock out the first 2 words 890 * manually, then loop the rest. 891 */ 892 data16 = (uint16_t *)reply; 893 if (mps_wait_db_int(sc) != 0) { 894 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 0\n"); 895 return (ENXIO); 896 } 897 data16[0] = 898 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 899 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 900 if (mps_wait_db_int(sc) != 0) { 901 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 1\n"); 902 return (ENXIO); 903 } 904 data16[1] = 905 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 906 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 907 908 /* Number of 32bit words in the message */ 909 ioc_sz = reply->MsgLength; 910 911 /* 912 * Figure out how many 16bit words to clock in without overrunning. 913 * The precision loss with dividing reply_sz can safely be 914 * ignored because the messages can only be multiples of 32bits. 915 */ 916 residual = 0; 917 count = MIN((reply_sz / 4), ioc_sz) * 2; 918 if (count < ioc_sz * 2) { 919 residual = ioc_sz * 2 - count; 920 mps_dprint(sc, MPS_ERROR, "Driver error, throwing away %d " 921 "residual message words\n", residual); 922 } 923 924 for (i = 2; i < count; i++) { 925 if (mps_wait_db_int(sc) != 0) { 926 mps_dprint(sc, MPS_FAULT, 927 "Timeout reading doorbell %d\n", i); 928 return (ENXIO); 929 } 930 data16[i] = mps_regread(sc, MPI2_DOORBELL_OFFSET) & 931 MPI2_DOORBELL_DATA_MASK; 932 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 933 } 934 935 /* 936 * Pull out residual words that won't fit into the provided buffer. 937 * This keeps the chip from hanging due to a driver programming 938 * error. 939 */ 940 while (residual--) { 941 if (mps_wait_db_int(sc) != 0) { 942 mps_dprint(sc, MPS_FAULT, 943 "Timeout reading doorbell\n"); 944 return (ENXIO); 945 } 946 (void)mps_regread(sc, MPI2_DOORBELL_OFFSET); 947 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 948 } 949 950 /* Step 7 */ 951 if (mps_wait_db_int(sc) != 0) { 952 mps_dprint(sc, MPS_FAULT, "Timeout waiting to exit doorbell\n"); 953 return (ENXIO); 954 } 955 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 956 mps_dprint(sc, MPS_FAULT, "Warning, doorbell still active\n"); 957 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 958 959 return (0); 960 } 961 962 static void 963 mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm) 964 { 965 reply_descriptor rd; 966 MPS_FUNCTRACE(sc); 967 mps_dprint(sc, MPS_TRACE, "SMID %u cm %p ccb %p\n", 968 cm->cm_desc.Default.SMID, cm, cm->cm_ccb); 969 970 if (sc->mps_flags & MPS_FLAGS_ATTACH_DONE && !(sc->mps_flags & MPS_FLAGS_SHUTDOWN)) 971 mtx_assert(&sc->mps_mtx, MA_OWNED); 972 973 if (++sc->io_cmds_active > sc->io_cmds_highwater) 974 sc->io_cmds_highwater++; 975 rd.u.low = cm->cm_desc.Words.Low; 976 rd.u.high = cm->cm_desc.Words.High; 977 rd.word = htole64(rd.word); 978 /* TODO-We may need to make below regwrite atomic */ 979 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET, 980 rd.u.low); 981 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET, 982 rd.u.high); 983 } 984 985 /* 986 * Just the FACTS, ma'am. 987 */ 988 static int 989 mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts) 990 { 991 MPI2_DEFAULT_REPLY *reply; 992 MPI2_IOC_FACTS_REQUEST request; 993 int error, req_sz, reply_sz; 994 995 MPS_FUNCTRACE(sc); 996 997 req_sz = sizeof(MPI2_IOC_FACTS_REQUEST); 998 reply_sz = sizeof(MPI2_IOC_FACTS_REPLY); 999 reply = (MPI2_DEFAULT_REPLY *)facts; 1000 1001 bzero(&request, req_sz); 1002 request.Function = MPI2_FUNCTION_IOC_FACTS; 1003 error = mps_request_sync(sc, &request, reply, req_sz, reply_sz, 5); 1004 1005 return (error); 1006 } 1007 1008 static int 1009 mps_send_iocinit(struct mps_softc *sc) 1010 { 1011 MPI2_IOC_INIT_REQUEST init; 1012 MPI2_DEFAULT_REPLY reply; 1013 int req_sz, reply_sz, error; 1014 struct timeval now; 1015 uint64_t time_in_msec; 1016 1017 MPS_FUNCTRACE(sc); 1018 1019 req_sz = sizeof(MPI2_IOC_INIT_REQUEST); 1020 reply_sz = sizeof(MPI2_IOC_INIT_REPLY); 1021 bzero(&init, req_sz); 1022 bzero(&reply, reply_sz); 1023 1024 /* 1025 * Fill in the init block. Note that most addresses are 1026 * deliberately in the lower 32bits of memory. This is a micro- 1027 * optimzation for PCI/PCIX, though it's not clear if it helps PCIe. 1028 */ 1029 init.Function = MPI2_FUNCTION_IOC_INIT; 1030 init.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 1031 init.MsgVersion = htole16(MPI2_VERSION); 1032 init.HeaderVersion = htole16(MPI2_HEADER_VERSION); 1033 init.SystemRequestFrameSize = htole16(sc->facts->IOCRequestFrameSize); 1034 init.ReplyDescriptorPostQueueDepth = htole16(sc->pqdepth); 1035 init.ReplyFreeQueueDepth = htole16(sc->fqdepth); 1036 init.SenseBufferAddressHigh = 0; 1037 init.SystemReplyAddressHigh = 0; 1038 init.SystemRequestFrameBaseAddress.High = 0; 1039 init.SystemRequestFrameBaseAddress.Low = htole32((uint32_t)sc->req_busaddr); 1040 init.ReplyDescriptorPostQueueAddress.High = 0; 1041 init.ReplyDescriptorPostQueueAddress.Low = htole32((uint32_t)sc->post_busaddr); 1042 init.ReplyFreeQueueAddress.High = 0; 1043 init.ReplyFreeQueueAddress.Low = htole32((uint32_t)sc->free_busaddr); 1044 getmicrotime(&now); 1045 time_in_msec = (now.tv_sec * 1000 + now.tv_usec/1000); 1046 init.TimeStamp.High = htole32((time_in_msec >> 32) & 0xFFFFFFFF); 1047 init.TimeStamp.Low = htole32(time_in_msec & 0xFFFFFFFF); 1048 1049 error = mps_request_sync(sc, &init, &reply, req_sz, reply_sz, 5); 1050 if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 1051 error = ENXIO; 1052 1053 mps_dprint(sc, MPS_INIT, "IOCInit status= 0x%x\n", reply.IOCStatus); 1054 return (error); 1055 } 1056 1057 void 1058 mps_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1059 { 1060 bus_addr_t *addr; 1061 1062 addr = arg; 1063 *addr = segs[0].ds_addr; 1064 } 1065 1066 static int 1067 mps_alloc_queues(struct mps_softc *sc) 1068 { 1069 bus_addr_t queues_busaddr; 1070 uint8_t *queues; 1071 int qsize, fqsize, pqsize; 1072 1073 /* 1074 * The reply free queue contains 4 byte entries in multiples of 16 and 1075 * aligned on a 16 byte boundary. There must always be an unused entry. 1076 * This queue supplies fresh reply frames for the firmware to use. 1077 * 1078 * The reply descriptor post queue contains 8 byte entries in 1079 * multiples of 16 and aligned on a 16 byte boundary. This queue 1080 * contains filled-in reply frames sent from the firmware to the host. 1081 * 1082 * These two queues are allocated together for simplicity. 1083 */ 1084 sc->fqdepth = roundup2(sc->num_replies + 1, 16); 1085 sc->pqdepth = roundup2(sc->num_replies + 1, 16); 1086 fqsize= sc->fqdepth * 4; 1087 pqsize = sc->pqdepth * 8; 1088 qsize = fqsize + pqsize; 1089 1090 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1091 16, 0, /* algnmnt, boundary */ 1092 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1093 BUS_SPACE_MAXADDR, /* highaddr */ 1094 NULL, NULL, /* filter, filterarg */ 1095 qsize, /* maxsize */ 1096 1, /* nsegments */ 1097 qsize, /* maxsegsize */ 1098 0, /* flags */ 1099 NULL, NULL, /* lockfunc, lockarg */ 1100 &sc->queues_dmat)) { 1101 device_printf(sc->mps_dev, "Cannot allocate queues DMA tag\n"); 1102 return (ENOMEM); 1103 } 1104 if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT, 1105 &sc->queues_map)) { 1106 device_printf(sc->mps_dev, "Cannot allocate queues memory\n"); 1107 return (ENOMEM); 1108 } 1109 bzero(queues, qsize); 1110 bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize, 1111 mps_memaddr_cb, &queues_busaddr, 0); 1112 1113 sc->free_queue = (uint32_t *)queues; 1114 sc->free_busaddr = queues_busaddr; 1115 sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize); 1116 sc->post_busaddr = queues_busaddr + fqsize; 1117 1118 return (0); 1119 } 1120 1121 static int 1122 mps_alloc_replies(struct mps_softc *sc) 1123 { 1124 int rsize, num_replies; 1125 1126 /* 1127 * sc->num_replies should be one less than sc->fqdepth. We need to 1128 * allocate space for sc->fqdepth replies, but only sc->num_replies 1129 * replies can be used at once. 1130 */ 1131 num_replies = max(sc->fqdepth, sc->num_replies); 1132 1133 rsize = sc->facts->ReplyFrameSize * num_replies * 4; 1134 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1135 4, 0, /* algnmnt, boundary */ 1136 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1137 BUS_SPACE_MAXADDR, /* highaddr */ 1138 NULL, NULL, /* filter, filterarg */ 1139 rsize, /* maxsize */ 1140 1, /* nsegments */ 1141 rsize, /* maxsegsize */ 1142 0, /* flags */ 1143 NULL, NULL, /* lockfunc, lockarg */ 1144 &sc->reply_dmat)) { 1145 device_printf(sc->mps_dev, "Cannot allocate replies DMA tag\n"); 1146 return (ENOMEM); 1147 } 1148 if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames, 1149 BUS_DMA_NOWAIT, &sc->reply_map)) { 1150 device_printf(sc->mps_dev, "Cannot allocate replies memory\n"); 1151 return (ENOMEM); 1152 } 1153 bzero(sc->reply_frames, rsize); 1154 bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize, 1155 mps_memaddr_cb, &sc->reply_busaddr, 0); 1156 1157 return (0); 1158 } 1159 1160 static int 1161 mps_alloc_requests(struct mps_softc *sc) 1162 { 1163 struct mps_command *cm; 1164 struct mps_chain *chain; 1165 int i, rsize, nsegs; 1166 1167 rsize = sc->facts->IOCRequestFrameSize * sc->num_reqs * 4; 1168 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1169 16, 0, /* algnmnt, boundary */ 1170 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1171 BUS_SPACE_MAXADDR, /* highaddr */ 1172 NULL, NULL, /* filter, filterarg */ 1173 rsize, /* maxsize */ 1174 1, /* nsegments */ 1175 rsize, /* maxsegsize */ 1176 0, /* flags */ 1177 NULL, NULL, /* lockfunc, lockarg */ 1178 &sc->req_dmat)) { 1179 device_printf(sc->mps_dev, "Cannot allocate request DMA tag\n"); 1180 return (ENOMEM); 1181 } 1182 if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames, 1183 BUS_DMA_NOWAIT, &sc->req_map)) { 1184 device_printf(sc->mps_dev, "Cannot allocate request memory\n"); 1185 return (ENOMEM); 1186 } 1187 bzero(sc->req_frames, rsize); 1188 bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize, 1189 mps_memaddr_cb, &sc->req_busaddr, 0); 1190 1191 rsize = sc->facts->IOCRequestFrameSize * sc->max_chains * 4; 1192 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1193 16, 0, /* algnmnt, boundary */ 1194 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1195 BUS_SPACE_MAXADDR, /* highaddr */ 1196 NULL, NULL, /* filter, filterarg */ 1197 rsize, /* maxsize */ 1198 1, /* nsegments */ 1199 rsize, /* maxsegsize */ 1200 0, /* flags */ 1201 NULL, NULL, /* lockfunc, lockarg */ 1202 &sc->chain_dmat)) { 1203 device_printf(sc->mps_dev, "Cannot allocate chain DMA tag\n"); 1204 return (ENOMEM); 1205 } 1206 if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames, 1207 BUS_DMA_NOWAIT, &sc->chain_map)) { 1208 device_printf(sc->mps_dev, "Cannot allocate chain memory\n"); 1209 return (ENOMEM); 1210 } 1211 bzero(sc->chain_frames, rsize); 1212 bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, rsize, 1213 mps_memaddr_cb, &sc->chain_busaddr, 0); 1214 1215 rsize = MPS_SENSE_LEN * sc->num_reqs; 1216 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1217 1, 0, /* algnmnt, boundary */ 1218 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1219 BUS_SPACE_MAXADDR, /* highaddr */ 1220 NULL, NULL, /* filter, filterarg */ 1221 rsize, /* maxsize */ 1222 1, /* nsegments */ 1223 rsize, /* maxsegsize */ 1224 0, /* flags */ 1225 NULL, NULL, /* lockfunc, lockarg */ 1226 &sc->sense_dmat)) { 1227 device_printf(sc->mps_dev, "Cannot allocate sense DMA tag\n"); 1228 return (ENOMEM); 1229 } 1230 if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames, 1231 BUS_DMA_NOWAIT, &sc->sense_map)) { 1232 device_printf(sc->mps_dev, "Cannot allocate sense memory\n"); 1233 return (ENOMEM); 1234 } 1235 bzero(sc->sense_frames, rsize); 1236 bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize, 1237 mps_memaddr_cb, &sc->sense_busaddr, 0); 1238 1239 sc->chains = malloc(sizeof(struct mps_chain) * sc->max_chains, M_MPT2, 1240 M_WAITOK | M_ZERO); 1241 if(!sc->chains) { 1242 device_printf(sc->mps_dev, 1243 "Cannot allocate chains memory %s %d\n", 1244 __func__, __LINE__); 1245 return (ENOMEM); 1246 } 1247 for (i = 0; i < sc->max_chains; i++) { 1248 chain = &sc->chains[i]; 1249 chain->chain = (MPI2_SGE_IO_UNION *)(sc->chain_frames + 1250 i * sc->facts->IOCRequestFrameSize * 4); 1251 chain->chain_busaddr = sc->chain_busaddr + 1252 i * sc->facts->IOCRequestFrameSize * 4; 1253 mps_free_chain(sc, chain); 1254 sc->chain_free_lowwater++; 1255 } 1256 1257 /* XXX Need to pick a more precise value */ 1258 nsegs = (MAXPHYS / PAGE_SIZE) + 1; 1259 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1260 1, 0, /* algnmnt, boundary */ 1261 BUS_SPACE_MAXADDR, /* lowaddr */ 1262 BUS_SPACE_MAXADDR, /* highaddr */ 1263 NULL, NULL, /* filter, filterarg */ 1264 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 1265 nsegs, /* nsegments */ 1266 BUS_SPACE_MAXSIZE_24BIT,/* maxsegsize */ 1267 BUS_DMA_ALLOCNOW, /* flags */ 1268 busdma_lock_mutex, /* lockfunc */ 1269 &sc->mps_mtx, /* lockarg */ 1270 &sc->buffer_dmat)) { 1271 device_printf(sc->mps_dev, "Cannot allocate buffer DMA tag\n"); 1272 return (ENOMEM); 1273 } 1274 1275 /* 1276 * SMID 0 cannot be used as a free command per the firmware spec. 1277 * Just drop that command instead of risking accounting bugs. 1278 */ 1279 sc->commands = malloc(sizeof(struct mps_command) * sc->num_reqs, 1280 M_MPT2, M_WAITOK | M_ZERO); 1281 if(!sc->commands) { 1282 device_printf(sc->mps_dev, "Cannot allocate memory %s %d\n", 1283 __func__, __LINE__); 1284 return (ENOMEM); 1285 } 1286 for (i = 1; i < sc->num_reqs; i++) { 1287 cm = &sc->commands[i]; 1288 cm->cm_req = sc->req_frames + 1289 i * sc->facts->IOCRequestFrameSize * 4; 1290 cm->cm_req_busaddr = sc->req_busaddr + 1291 i * sc->facts->IOCRequestFrameSize * 4; 1292 cm->cm_sense = &sc->sense_frames[i]; 1293 cm->cm_sense_busaddr = sc->sense_busaddr + i * MPS_SENSE_LEN; 1294 cm->cm_desc.Default.SMID = i; 1295 cm->cm_sc = sc; 1296 TAILQ_INIT(&cm->cm_chain_list); 1297 callout_init_mtx(&cm->cm_callout, &sc->mps_mtx, 0); 1298 1299 /* XXX Is a failure here a critical problem? */ 1300 if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0) 1301 if (i <= sc->facts->HighPriorityCredit) 1302 mps_free_high_priority_command(sc, cm); 1303 else 1304 mps_free_command(sc, cm); 1305 else { 1306 panic("failed to allocate command %d\n", i); 1307 sc->num_reqs = i; 1308 break; 1309 } 1310 } 1311 1312 return (0); 1313 } 1314 1315 static int 1316 mps_init_queues(struct mps_softc *sc) 1317 { 1318 int i; 1319 1320 memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8); 1321 1322 /* 1323 * According to the spec, we need to use one less reply than we 1324 * have space for on the queue. So sc->num_replies (the number we 1325 * use) should be less than sc->fqdepth (allocated size). 1326 */ 1327 if (sc->num_replies >= sc->fqdepth) 1328 return (EINVAL); 1329 1330 /* 1331 * Initialize all of the free queue entries. 1332 */ 1333 for (i = 0; i < sc->fqdepth; i++) 1334 sc->free_queue[i] = sc->reply_busaddr + (i * sc->facts->ReplyFrameSize * 4); 1335 sc->replyfreeindex = sc->num_replies; 1336 1337 return (0); 1338 } 1339 1340 /* Get the driver parameter tunables. Lowest priority are the driver defaults. 1341 * Next are the global settings, if they exist. Highest are the per-unit 1342 * settings, if they exist. 1343 */ 1344 static void 1345 mps_get_tunables(struct mps_softc *sc) 1346 { 1347 char tmpstr[80]; 1348 1349 /* XXX default to some debugging for now */ 1350 sc->mps_debug = MPS_INFO|MPS_FAULT; 1351 sc->disable_msix = 0; 1352 sc->disable_msi = 0; 1353 sc->max_chains = MPS_CHAIN_FRAMES; 1354 sc->max_io_pages = MPS_MAXIO_PAGES; 1355 sc->enable_ssu = MPS_SSU_ENABLE_SSD_DISABLE_HDD; 1356 sc->spinup_wait_time = DEFAULT_SPINUP_WAIT; 1357 sc->use_phynum = 1; 1358 1359 /* 1360 * Grab the global variables. 1361 */ 1362 TUNABLE_INT_FETCH("hw.mps.debug_level", &sc->mps_debug); 1363 TUNABLE_INT_FETCH("hw.mps.disable_msix", &sc->disable_msix); 1364 TUNABLE_INT_FETCH("hw.mps.disable_msi", &sc->disable_msi); 1365 TUNABLE_INT_FETCH("hw.mps.max_chains", &sc->max_chains); 1366 TUNABLE_INT_FETCH("hw.mps.max_io_pages", &sc->max_io_pages); 1367 TUNABLE_INT_FETCH("hw.mps.enable_ssu", &sc->enable_ssu); 1368 TUNABLE_INT_FETCH("hw.mps.spinup_wait_time", &sc->spinup_wait_time); 1369 TUNABLE_INT_FETCH("hw.mps.use_phy_num", &sc->use_phynum); 1370 1371 /* Grab the unit-instance variables */ 1372 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.debug_level", 1373 device_get_unit(sc->mps_dev)); 1374 TUNABLE_INT_FETCH(tmpstr, &sc->mps_debug); 1375 1376 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msix", 1377 device_get_unit(sc->mps_dev)); 1378 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix); 1379 1380 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msi", 1381 device_get_unit(sc->mps_dev)); 1382 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi); 1383 1384 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_chains", 1385 device_get_unit(sc->mps_dev)); 1386 TUNABLE_INT_FETCH(tmpstr, &sc->max_chains); 1387 1388 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_io_pages", 1389 device_get_unit(sc->mps_dev)); 1390 TUNABLE_INT_FETCH(tmpstr, &sc->max_io_pages); 1391 1392 bzero(sc->exclude_ids, sizeof(sc->exclude_ids)); 1393 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.exclude_ids", 1394 device_get_unit(sc->mps_dev)); 1395 TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids)); 1396 1397 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.enable_ssu", 1398 device_get_unit(sc->mps_dev)); 1399 TUNABLE_INT_FETCH(tmpstr, &sc->enable_ssu); 1400 1401 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.spinup_wait_time", 1402 device_get_unit(sc->mps_dev)); 1403 TUNABLE_INT_FETCH(tmpstr, &sc->spinup_wait_time); 1404 1405 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.use_phy_num", 1406 device_get_unit(sc->mps_dev)); 1407 TUNABLE_INT_FETCH(tmpstr, &sc->use_phynum); 1408 } 1409 1410 static void 1411 mps_setup_sysctl(struct mps_softc *sc) 1412 { 1413 struct sysctl_ctx_list *sysctl_ctx = NULL; 1414 struct sysctl_oid *sysctl_tree = NULL; 1415 char tmpstr[80], tmpstr2[80]; 1416 1417 /* 1418 * Setup the sysctl variable so the user can change the debug level 1419 * on the fly. 1420 */ 1421 snprintf(tmpstr, sizeof(tmpstr), "MPS controller %d", 1422 device_get_unit(sc->mps_dev)); 1423 snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mps_dev)); 1424 1425 sysctl_ctx = device_get_sysctl_ctx(sc->mps_dev); 1426 if (sysctl_ctx != NULL) 1427 sysctl_tree = device_get_sysctl_tree(sc->mps_dev); 1428 1429 if (sysctl_tree == NULL) { 1430 sysctl_ctx_init(&sc->sysctl_ctx); 1431 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx, 1432 SYSCTL_STATIC_CHILDREN(_hw_mps), OID_AUTO, tmpstr2, 1433 CTLFLAG_RD, 0, tmpstr); 1434 if (sc->sysctl_tree == NULL) 1435 return; 1436 sysctl_ctx = &sc->sysctl_ctx; 1437 sysctl_tree = sc->sysctl_tree; 1438 } 1439 1440 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1441 OID_AUTO, "debug_level", CTLFLAG_RW, &sc->mps_debug, 0, 1442 "mps debug level"); 1443 1444 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1445 OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0, 1446 "Disable the use of MSI-X interrupts"); 1447 1448 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1449 OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0, 1450 "Disable the use of MSI interrupts"); 1451 1452 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1453 OID_AUTO, "firmware_version", CTLFLAG_RW, sc->fw_version, 1454 strlen(sc->fw_version), "firmware version"); 1455 1456 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1457 OID_AUTO, "driver_version", CTLFLAG_RW, MPS_DRIVER_VERSION, 1458 strlen(MPS_DRIVER_VERSION), "driver version"); 1459 1460 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1461 OID_AUTO, "io_cmds_active", CTLFLAG_RD, 1462 &sc->io_cmds_active, 0, "number of currently active commands"); 1463 1464 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1465 OID_AUTO, "io_cmds_highwater", CTLFLAG_RD, 1466 &sc->io_cmds_highwater, 0, "maximum active commands seen"); 1467 1468 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1469 OID_AUTO, "chain_free", CTLFLAG_RD, 1470 &sc->chain_free, 0, "number of free chain elements"); 1471 1472 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1473 OID_AUTO, "chain_free_lowwater", CTLFLAG_RD, 1474 &sc->chain_free_lowwater, 0,"lowest number of free chain elements"); 1475 1476 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1477 OID_AUTO, "max_chains", CTLFLAG_RD, 1478 &sc->max_chains, 0,"maximum chain frames that will be allocated"); 1479 1480 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1481 OID_AUTO, "max_io_pages", CTLFLAG_RD, 1482 &sc->max_io_pages, 0,"maximum pages to allow per I/O (if <1 use " 1483 "IOCFacts)"); 1484 1485 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1486 OID_AUTO, "enable_ssu", CTLFLAG_RW, &sc->enable_ssu, 0, 1487 "enable SSU to SATA SSD/HDD at shutdown"); 1488 1489 SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1490 OID_AUTO, "chain_alloc_fail", CTLFLAG_RD, 1491 &sc->chain_alloc_fail, "chain allocation failures"); 1492 1493 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1494 OID_AUTO, "spinup_wait_time", CTLFLAG_RD, 1495 &sc->spinup_wait_time, DEFAULT_SPINUP_WAIT, "seconds to wait for " 1496 "spinup after SATA ID error"); 1497 1498 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1499 OID_AUTO, "mapping_table_dump", CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 1500 mps_mapping_dump, "A", "Mapping Table Dump"); 1501 1502 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1503 OID_AUTO, "encl_table_dump", CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 1504 mps_mapping_encl_dump, "A", "Enclosure Table Dump"); 1505 1506 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1507 OID_AUTO, "use_phy_num", CTLFLAG_RD, &sc->use_phynum, 0, 1508 "Use the phy number for enumeration"); 1509 } 1510 1511 int 1512 mps_attach(struct mps_softc *sc) 1513 { 1514 int error; 1515 1516 mps_get_tunables(sc); 1517 1518 MPS_FUNCTRACE(sc); 1519 1520 mtx_init(&sc->mps_mtx, "MPT2SAS lock", NULL, MTX_DEF); 1521 callout_init_mtx(&sc->periodic, &sc->mps_mtx, 0); 1522 callout_init_mtx(&sc->device_check_callout, &sc->mps_mtx, 0); 1523 TAILQ_INIT(&sc->event_list); 1524 timevalclear(&sc->lastfail); 1525 1526 if ((error = mps_transition_ready(sc)) != 0) { 1527 mps_printf(sc, "%s failed to transition ready\n", __func__); 1528 return (error); 1529 } 1530 1531 sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPT2, 1532 M_ZERO|M_NOWAIT); 1533 if(!sc->facts) { 1534 device_printf(sc->mps_dev, "Cannot allocate memory %s %d\n", 1535 __func__, __LINE__); 1536 return (ENOMEM); 1537 } 1538 1539 /* 1540 * Get IOC Facts and allocate all structures based on this information. 1541 * A Diag Reset will also call mps_iocfacts_allocate and re-read the IOC 1542 * Facts. If relevant values have changed in IOC Facts, this function 1543 * will free all of the memory based on IOC Facts and reallocate that 1544 * memory. If this fails, any allocated memory should already be freed. 1545 */ 1546 if ((error = mps_iocfacts_allocate(sc, TRUE)) != 0) { 1547 mps_dprint(sc, MPS_FAULT, "%s IOC Facts based allocation " 1548 "failed with error %d\n", __func__, error); 1549 return (error); 1550 } 1551 1552 /* Start the periodic watchdog check on the IOC Doorbell */ 1553 mps_periodic(sc); 1554 1555 /* 1556 * The portenable will kick off discovery events that will drive the 1557 * rest of the initialization process. The CAM/SAS module will 1558 * hold up the boot sequence until discovery is complete. 1559 */ 1560 sc->mps_ich.ich_func = mps_startup; 1561 sc->mps_ich.ich_arg = sc; 1562 if (config_intrhook_establish(&sc->mps_ich) != 0) { 1563 mps_dprint(sc, MPS_ERROR, "Cannot establish MPS config hook\n"); 1564 error = EINVAL; 1565 } 1566 1567 /* 1568 * Allow IR to shutdown gracefully when shutdown occurs. 1569 */ 1570 sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final, 1571 mpssas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT); 1572 1573 if (sc->shutdown_eh == NULL) 1574 mps_dprint(sc, MPS_ERROR, "shutdown event registration " 1575 "failed\n"); 1576 1577 mps_setup_sysctl(sc); 1578 1579 sc->mps_flags |= MPS_FLAGS_ATTACH_DONE; 1580 1581 return (error); 1582 } 1583 1584 /* Run through any late-start handlers. */ 1585 static void 1586 mps_startup(void *arg) 1587 { 1588 struct mps_softc *sc; 1589 1590 sc = (struct mps_softc *)arg; 1591 1592 mps_lock(sc); 1593 mps_unmask_intr(sc); 1594 1595 /* initialize device mapping tables */ 1596 mps_base_static_config_pages(sc); 1597 mps_mapping_initialize(sc); 1598 mpssas_startup(sc); 1599 mps_unlock(sc); 1600 } 1601 1602 /* Periodic watchdog. Is called with the driver lock already held. */ 1603 static void 1604 mps_periodic(void *arg) 1605 { 1606 struct mps_softc *sc; 1607 uint32_t db; 1608 1609 sc = (struct mps_softc *)arg; 1610 if (sc->mps_flags & MPS_FLAGS_SHUTDOWN) 1611 return; 1612 1613 db = mps_regread(sc, MPI2_DOORBELL_OFFSET); 1614 if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 1615 mps_dprint(sc, MPS_FAULT, "IOC Fault 0x%08x, Resetting\n", db); 1616 mps_reinit(sc); 1617 } 1618 1619 callout_reset(&sc->periodic, MPS_PERIODIC_DELAY * hz, mps_periodic, sc); 1620 } 1621 1622 static void 1623 mps_log_evt_handler(struct mps_softc *sc, uintptr_t data, 1624 MPI2_EVENT_NOTIFICATION_REPLY *event) 1625 { 1626 MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry; 1627 1628 mps_print_event(sc, event); 1629 1630 switch (event->Event) { 1631 case MPI2_EVENT_LOG_DATA: 1632 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_DATA:\n"); 1633 if (sc->mps_debug & MPS_EVENT) 1634 hexdump(event->EventData, event->EventDataLength, NULL, 0); 1635 break; 1636 case MPI2_EVENT_LOG_ENTRY_ADDED: 1637 entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData; 1638 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_ENTRY_ADDED event " 1639 "0x%x Sequence %d:\n", entry->LogEntryQualifier, 1640 entry->LogSequence); 1641 break; 1642 default: 1643 break; 1644 } 1645 return; 1646 } 1647 1648 static int 1649 mps_attach_log(struct mps_softc *sc) 1650 { 1651 u32 events[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 1652 1653 bzero(events, 16); 1654 setbit(events, MPI2_EVENT_LOG_DATA); 1655 setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED); 1656 1657 mps_register_events(sc, events, mps_log_evt_handler, NULL, 1658 &sc->mps_log_eh); 1659 1660 return (0); 1661 } 1662 1663 static int 1664 mps_detach_log(struct mps_softc *sc) 1665 { 1666 1667 if (sc->mps_log_eh != NULL) 1668 mps_deregister_events(sc, sc->mps_log_eh); 1669 return (0); 1670 } 1671 1672 /* 1673 * Free all of the driver resources and detach submodules. Should be called 1674 * without the lock held. 1675 */ 1676 int 1677 mps_free(struct mps_softc *sc) 1678 { 1679 int error; 1680 1681 /* Turn off the watchdog */ 1682 mps_lock(sc); 1683 sc->mps_flags |= MPS_FLAGS_SHUTDOWN; 1684 mps_unlock(sc); 1685 /* Lock must not be held for this */ 1686 callout_drain(&sc->periodic); 1687 callout_drain(&sc->device_check_callout); 1688 1689 if (((error = mps_detach_log(sc)) != 0) || 1690 ((error = mps_detach_sas(sc)) != 0)) 1691 return (error); 1692 1693 mps_detach_user(sc); 1694 1695 /* Put the IOC back in the READY state. */ 1696 mps_lock(sc); 1697 if ((error = mps_transition_ready(sc)) != 0) { 1698 mps_unlock(sc); 1699 return (error); 1700 } 1701 mps_unlock(sc); 1702 1703 if (sc->facts != NULL) 1704 free(sc->facts, M_MPT2); 1705 1706 /* 1707 * Free all buffers that are based on IOC Facts. A Diag Reset may need 1708 * to free these buffers too. 1709 */ 1710 mps_iocfacts_free(sc); 1711 1712 if (sc->sysctl_tree != NULL) 1713 sysctl_ctx_free(&sc->sysctl_ctx); 1714 1715 /* Deregister the shutdown function */ 1716 if (sc->shutdown_eh != NULL) 1717 EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh); 1718 1719 mtx_destroy(&sc->mps_mtx); 1720 1721 return (0); 1722 } 1723 1724 static __inline void 1725 mps_complete_command(struct mps_softc *sc, struct mps_command *cm) 1726 { 1727 MPS_FUNCTRACE(sc); 1728 1729 if (cm == NULL) { 1730 mps_dprint(sc, MPS_ERROR, "Completing NULL command\n"); 1731 return; 1732 } 1733 1734 if (cm->cm_flags & MPS_CM_FLAGS_POLLED) 1735 cm->cm_flags |= MPS_CM_FLAGS_COMPLETE; 1736 1737 if (cm->cm_complete != NULL) { 1738 mps_dprint(sc, MPS_TRACE, 1739 "%s cm %p calling cm_complete %p data %p reply %p\n", 1740 __func__, cm, cm->cm_complete, cm->cm_complete_data, 1741 cm->cm_reply); 1742 cm->cm_complete(sc, cm); 1743 } 1744 1745 if (cm->cm_flags & MPS_CM_FLAGS_WAKEUP) { 1746 mps_dprint(sc, MPS_TRACE, "waking up %p\n", cm); 1747 wakeup(cm); 1748 } 1749 1750 if (cm->cm_sc->io_cmds_active != 0) { 1751 cm->cm_sc->io_cmds_active--; 1752 } else { 1753 mps_dprint(sc, MPS_ERROR, "Warning: io_cmds_active is " 1754 "out of sync - resynching to 0\n"); 1755 } 1756 } 1757 1758 1759 static void 1760 mps_sas_log_info(struct mps_softc *sc , u32 log_info) 1761 { 1762 union loginfo_type { 1763 u32 loginfo; 1764 struct { 1765 u32 subcode:16; 1766 u32 code:8; 1767 u32 originator:4; 1768 u32 bus_type:4; 1769 } dw; 1770 }; 1771 union loginfo_type sas_loginfo; 1772 char *originator_str = NULL; 1773 1774 sas_loginfo.loginfo = log_info; 1775 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 1776 return; 1777 1778 /* each nexus loss loginfo */ 1779 if (log_info == 0x31170000) 1780 return; 1781 1782 /* eat the loginfos associated with task aborts */ 1783 if ((log_info == 30050000 || log_info == 1784 0x31140000 || log_info == 0x31130000)) 1785 return; 1786 1787 switch (sas_loginfo.dw.originator) { 1788 case 0: 1789 originator_str = "IOP"; 1790 break; 1791 case 1: 1792 originator_str = "PL"; 1793 break; 1794 case 2: 1795 originator_str = "IR"; 1796 break; 1797 } 1798 1799 mps_dprint(sc, MPS_LOG, "log_info(0x%08x): originator(%s), " 1800 "code(0x%02x), sub_code(0x%04x)\n", log_info, 1801 originator_str, sas_loginfo.dw.code, 1802 sas_loginfo.dw.subcode); 1803 } 1804 1805 static void 1806 mps_display_reply_info(struct mps_softc *sc, uint8_t *reply) 1807 { 1808 MPI2DefaultReply_t *mpi_reply; 1809 u16 sc_status; 1810 1811 mpi_reply = (MPI2DefaultReply_t*)reply; 1812 sc_status = le16toh(mpi_reply->IOCStatus); 1813 if (sc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 1814 mps_sas_log_info(sc, le32toh(mpi_reply->IOCLogInfo)); 1815 } 1816 void 1817 mps_intr(void *data) 1818 { 1819 struct mps_softc *sc; 1820 uint32_t status; 1821 1822 sc = (struct mps_softc *)data; 1823 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 1824 1825 /* 1826 * Check interrupt status register to flush the bus. This is 1827 * needed for both INTx interrupts and driver-driven polling 1828 */ 1829 status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 1830 if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0) 1831 return; 1832 1833 mps_lock(sc); 1834 mps_intr_locked(data); 1835 mps_unlock(sc); 1836 return; 1837 } 1838 1839 /* 1840 * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the 1841 * chip. Hopefully this theory is correct. 1842 */ 1843 void 1844 mps_intr_msi(void *data) 1845 { 1846 struct mps_softc *sc; 1847 1848 sc = (struct mps_softc *)data; 1849 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 1850 mps_lock(sc); 1851 mps_intr_locked(data); 1852 mps_unlock(sc); 1853 return; 1854 } 1855 1856 /* 1857 * The locking is overly broad and simplistic, but easy to deal with for now. 1858 */ 1859 void 1860 mps_intr_locked(void *data) 1861 { 1862 MPI2_REPLY_DESCRIPTORS_UNION *desc; 1863 struct mps_softc *sc; 1864 struct mps_command *cm = NULL; 1865 uint8_t flags; 1866 u_int pq; 1867 MPI2_DIAG_RELEASE_REPLY *rel_rep; 1868 mps_fw_diagnostic_buffer_t *pBuffer; 1869 1870 sc = (struct mps_softc *)data; 1871 1872 pq = sc->replypostindex; 1873 mps_dprint(sc, MPS_TRACE, 1874 "%s sc %p starting with replypostindex %u\n", 1875 __func__, sc, sc->replypostindex); 1876 1877 for ( ;; ) { 1878 cm = NULL; 1879 desc = &sc->post_queue[sc->replypostindex]; 1880 flags = desc->Default.ReplyFlags & 1881 MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 1882 if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 1883 || (le32toh(desc->Words.High) == 0xffffffff)) 1884 break; 1885 1886 /* increment the replypostindex now, so that event handlers 1887 * and cm completion handlers which decide to do a diag 1888 * reset can zero it without it getting incremented again 1889 * afterwards, and we break out of this loop on the next 1890 * iteration since the reply post queue has been cleared to 1891 * 0xFF and all descriptors look unused (which they are). 1892 */ 1893 if (++sc->replypostindex >= sc->pqdepth) 1894 sc->replypostindex = 0; 1895 1896 switch (flags) { 1897 case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS: 1898 cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)]; 1899 cm->cm_reply = NULL; 1900 break; 1901 case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY: 1902 { 1903 uint32_t baddr; 1904 uint8_t *reply; 1905 1906 /* 1907 * Re-compose the reply address from the address 1908 * sent back from the chip. The ReplyFrameAddress 1909 * is the lower 32 bits of the physical address of 1910 * particular reply frame. Convert that address to 1911 * host format, and then use that to provide the 1912 * offset against the virtual address base 1913 * (sc->reply_frames). 1914 */ 1915 baddr = le32toh(desc->AddressReply.ReplyFrameAddress); 1916 reply = sc->reply_frames + 1917 (baddr - ((uint32_t)sc->reply_busaddr)); 1918 /* 1919 * Make sure the reply we got back is in a valid 1920 * range. If not, go ahead and panic here, since 1921 * we'll probably panic as soon as we deference the 1922 * reply pointer anyway. 1923 */ 1924 if ((reply < sc->reply_frames) 1925 || (reply > (sc->reply_frames + 1926 (sc->fqdepth * sc->facts->ReplyFrameSize * 4)))) { 1927 printf("%s: WARNING: reply %p out of range!\n", 1928 __func__, reply); 1929 printf("%s: reply_frames %p, fqdepth %d, " 1930 "frame size %d\n", __func__, 1931 sc->reply_frames, sc->fqdepth, 1932 sc->facts->ReplyFrameSize * 4); 1933 printf("%s: baddr %#x,\n", __func__, baddr); 1934 /* LSI-TODO. See Linux Code. Need Graceful exit*/ 1935 panic("Reply address out of range"); 1936 } 1937 if (le16toh(desc->AddressReply.SMID) == 0) { 1938 if (((MPI2_DEFAULT_REPLY *)reply)->Function == 1939 MPI2_FUNCTION_DIAG_BUFFER_POST) { 1940 /* 1941 * If SMID is 0 for Diag Buffer Post, 1942 * this implies that the reply is due to 1943 * a release function with a status that 1944 * the buffer has been released. Set 1945 * the buffer flags accordingly. 1946 */ 1947 rel_rep = 1948 (MPI2_DIAG_RELEASE_REPLY *)reply; 1949 if ((le16toh(rel_rep->IOCStatus) & 1950 MPI2_IOCSTATUS_MASK) == 1951 MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED) 1952 { 1953 pBuffer = 1954 &sc->fw_diag_buffer_list[ 1955 rel_rep->BufferType]; 1956 pBuffer->valid_data = TRUE; 1957 pBuffer->owned_by_firmware = 1958 FALSE; 1959 pBuffer->immediate = FALSE; 1960 } 1961 } else 1962 mps_dispatch_event(sc, baddr, 1963 (MPI2_EVENT_NOTIFICATION_REPLY *) 1964 reply); 1965 } else { 1966 cm = &sc->commands[le16toh(desc->AddressReply.SMID)]; 1967 cm->cm_reply = reply; 1968 cm->cm_reply_data = 1969 le32toh(desc->AddressReply.ReplyFrameAddress); 1970 } 1971 break; 1972 } 1973 case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS: 1974 case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER: 1975 case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS: 1976 default: 1977 /* Unhandled */ 1978 mps_dprint(sc, MPS_ERROR, "Unhandled reply 0x%x\n", 1979 desc->Default.ReplyFlags); 1980 cm = NULL; 1981 break; 1982 } 1983 1984 1985 if (cm != NULL) { 1986 // Print Error reply frame 1987 if (cm->cm_reply) 1988 mps_display_reply_info(sc,cm->cm_reply); 1989 mps_complete_command(sc, cm); 1990 } 1991 1992 desc->Words.Low = 0xffffffff; 1993 desc->Words.High = 0xffffffff; 1994 } 1995 1996 if (pq != sc->replypostindex) { 1997 mps_dprint(sc, MPS_TRACE, 1998 "%s sc %p writing postindex %d\n", 1999 __func__, sc, sc->replypostindex); 2000 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, sc->replypostindex); 2001 } 2002 2003 return; 2004 } 2005 2006 static void 2007 mps_dispatch_event(struct mps_softc *sc, uintptr_t data, 2008 MPI2_EVENT_NOTIFICATION_REPLY *reply) 2009 { 2010 struct mps_event_handle *eh; 2011 int event, handled = 0; 2012 2013 event = le16toh(reply->Event); 2014 TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2015 if (isset(eh->mask, event)) { 2016 eh->callback(sc, data, reply); 2017 handled++; 2018 } 2019 } 2020 2021 if (handled == 0) 2022 mps_dprint(sc, MPS_EVENT, "Unhandled event 0x%x\n", le16toh(event)); 2023 2024 /* 2025 * This is the only place that the event/reply should be freed. 2026 * Anything wanting to hold onto the event data should have 2027 * already copied it into their own storage. 2028 */ 2029 mps_free_reply(sc, data); 2030 } 2031 2032 static void 2033 mps_reregister_events_complete(struct mps_softc *sc, struct mps_command *cm) 2034 { 2035 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2036 2037 if (cm->cm_reply) 2038 mps_print_event(sc, 2039 (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply); 2040 2041 mps_free_command(sc, cm); 2042 2043 /* next, send a port enable */ 2044 mpssas_startup(sc); 2045 } 2046 2047 /* 2048 * For both register_events and update_events, the caller supplies a bitmap 2049 * of events that it _wants_. These functions then turn that into a bitmask 2050 * suitable for the controller. 2051 */ 2052 int 2053 mps_register_events(struct mps_softc *sc, u32 *mask, 2054 mps_evt_callback_t *cb, void *data, struct mps_event_handle **handle) 2055 { 2056 struct mps_event_handle *eh; 2057 int error = 0; 2058 2059 eh = malloc(sizeof(struct mps_event_handle), M_MPT2, M_WAITOK|M_ZERO); 2060 if(!eh) { 2061 device_printf(sc->mps_dev, "Cannot allocate memory %s %d\n", 2062 __func__, __LINE__); 2063 return (ENOMEM); 2064 } 2065 eh->callback = cb; 2066 eh->data = data; 2067 TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list); 2068 if (mask != NULL) 2069 error = mps_update_events(sc, eh, mask); 2070 *handle = eh; 2071 2072 return (error); 2073 } 2074 2075 int 2076 mps_update_events(struct mps_softc *sc, struct mps_event_handle *handle, 2077 u32 *mask) 2078 { 2079 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2080 MPI2_EVENT_NOTIFICATION_REPLY *reply; 2081 struct mps_command *cm; 2082 int error, i; 2083 2084 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2085 2086 if ((mask != NULL) && (handle != NULL)) 2087 bcopy(mask, &handle->mask[0], sizeof(u32) * 2088 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2089 2090 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2091 sc->event_mask[i] = -1; 2092 2093 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2094 sc->event_mask[i] &= ~handle->mask[i]; 2095 2096 2097 if ((cm = mps_alloc_command(sc)) == NULL) 2098 return (EBUSY); 2099 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2100 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2101 evtreq->MsgFlags = 0; 2102 evtreq->SASBroadcastPrimitiveMasks = 0; 2103 #ifdef MPS_DEBUG_ALL_EVENTS 2104 { 2105 u_char fullmask[16]; 2106 memset(fullmask, 0x00, 16); 2107 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) * 2108 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2109 } 2110 #else 2111 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2112 evtreq->EventMasks[i] = 2113 htole32(sc->event_mask[i]); 2114 #endif 2115 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2116 cm->cm_data = NULL; 2117 2118 error = mps_wait_command(sc, cm, 60, 0); 2119 reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply; 2120 if ((reply == NULL) || 2121 (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 2122 error = ENXIO; 2123 mps_print_event(sc, reply); 2124 mps_dprint(sc, MPS_TRACE, "%s finished error %d\n", __func__, error); 2125 2126 mps_free_command(sc, cm); 2127 return (error); 2128 } 2129 2130 static int 2131 mps_reregister_events(struct mps_softc *sc) 2132 { 2133 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2134 struct mps_command *cm; 2135 struct mps_event_handle *eh; 2136 int error, i; 2137 2138 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2139 2140 /* first, reregister events */ 2141 2142 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2143 sc->event_mask[i] = -1; 2144 2145 TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2146 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2147 sc->event_mask[i] &= ~eh->mask[i]; 2148 } 2149 2150 if ((cm = mps_alloc_command(sc)) == NULL) 2151 return (EBUSY); 2152 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2153 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2154 evtreq->MsgFlags = 0; 2155 evtreq->SASBroadcastPrimitiveMasks = 0; 2156 #ifdef MPS_DEBUG_ALL_EVENTS 2157 { 2158 u_char fullmask[16]; 2159 memset(fullmask, 0x00, 16); 2160 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) * 2161 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2162 } 2163 #else 2164 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2165 evtreq->EventMasks[i] = 2166 htole32(sc->event_mask[i]); 2167 #endif 2168 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2169 cm->cm_data = NULL; 2170 cm->cm_complete = mps_reregister_events_complete; 2171 2172 error = mps_map_command(sc, cm); 2173 2174 mps_dprint(sc, MPS_TRACE, "%s finished with error %d\n", __func__, 2175 error); 2176 return (error); 2177 } 2178 2179 void 2180 mps_deregister_events(struct mps_softc *sc, struct mps_event_handle *handle) 2181 { 2182 2183 TAILQ_REMOVE(&sc->event_list, handle, eh_list); 2184 free(handle, M_MPT2); 2185 } 2186 2187 /* 2188 * Add a chain element as the next SGE for the specified command. 2189 * Reset cm_sge and cm_sgesize to indicate all the available space. 2190 */ 2191 static int 2192 mps_add_chain(struct mps_command *cm) 2193 { 2194 MPI2_SGE_CHAIN32 *sgc; 2195 struct mps_chain *chain; 2196 int space; 2197 2198 if (cm->cm_sglsize < MPS_SGC_SIZE) 2199 panic("MPS: Need SGE Error Code\n"); 2200 2201 chain = mps_alloc_chain(cm->cm_sc); 2202 if (chain == NULL) 2203 return (ENOBUFS); 2204 2205 space = (int)cm->cm_sc->facts->IOCRequestFrameSize * 4; 2206 2207 /* 2208 * Note: a double-linked list is used to make it easier to 2209 * walk for debugging. 2210 */ 2211 TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link); 2212 2213 sgc = (MPI2_SGE_CHAIN32 *)&cm->cm_sge->MpiChain; 2214 sgc->Length = htole16(space); 2215 sgc->NextChainOffset = 0; 2216 /* TODO Looks like bug in Setting sgc->Flags. 2217 * sgc->Flags = ( MPI2_SGE_FLAGS_CHAIN_ELEMENT | MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 2218 * MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT 2219 * This is fine.. because we are not using simple element. In case of 2220 * MPI2_SGE_CHAIN32, we have separate Length and Flags feild. 2221 */ 2222 sgc->Flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT; 2223 sgc->Address = htole32(chain->chain_busaddr); 2224 2225 cm->cm_sge = (MPI2_SGE_IO_UNION *)&chain->chain->MpiSimple; 2226 cm->cm_sglsize = space; 2227 return (0); 2228 } 2229 2230 /* 2231 * Add one scatter-gather element (chain, simple, transaction context) 2232 * to the scatter-gather list for a command. Maintain cm_sglsize and 2233 * cm_sge as the remaining size and pointer to the next SGE to fill 2234 * in, respectively. 2235 */ 2236 int 2237 mps_push_sge(struct mps_command *cm, void *sgep, size_t len, int segsleft) 2238 { 2239 MPI2_SGE_TRANSACTION_UNION *tc = sgep; 2240 MPI2_SGE_SIMPLE64 *sge = sgep; 2241 int error, type; 2242 uint32_t saved_buf_len, saved_address_low, saved_address_high; 2243 2244 type = (tc->Flags & MPI2_SGE_FLAGS_ELEMENT_MASK); 2245 2246 #ifdef INVARIANTS 2247 switch (type) { 2248 case MPI2_SGE_FLAGS_TRANSACTION_ELEMENT: { 2249 if (len != tc->DetailsLength + 4) 2250 panic("TC %p length %u or %zu?", tc, 2251 tc->DetailsLength + 4, len); 2252 } 2253 break; 2254 case MPI2_SGE_FLAGS_CHAIN_ELEMENT: 2255 /* Driver only uses 32-bit chain elements */ 2256 if (len != MPS_SGC_SIZE) 2257 panic("CHAIN %p length %u or %zu?", sgep, 2258 MPS_SGC_SIZE, len); 2259 break; 2260 case MPI2_SGE_FLAGS_SIMPLE_ELEMENT: 2261 /* Driver only uses 64-bit SGE simple elements */ 2262 if (len != MPS_SGE64_SIZE) 2263 panic("SGE simple %p length %u or %zu?", sge, 2264 MPS_SGE64_SIZE, len); 2265 if (((le32toh(sge->FlagsLength) >> MPI2_SGE_FLAGS_SHIFT) & 2266 MPI2_SGE_FLAGS_ADDRESS_SIZE) == 0) 2267 panic("SGE simple %p not marked 64-bit?", sge); 2268 2269 break; 2270 default: 2271 panic("Unexpected SGE %p, flags %02x", tc, tc->Flags); 2272 } 2273 #endif 2274 2275 /* 2276 * case 1: 1 more segment, enough room for it 2277 * case 2: 2 more segments, enough room for both 2278 * case 3: >=2 more segments, only enough room for 1 and a chain 2279 * case 4: >=1 more segment, enough room for only a chain 2280 * case 5: >=1 more segment, no room for anything (error) 2281 */ 2282 2283 /* 2284 * There should be room for at least a chain element, or this 2285 * code is buggy. Case (5). 2286 */ 2287 if (cm->cm_sglsize < MPS_SGC_SIZE) 2288 panic("MPS: Need SGE Error Code\n"); 2289 2290 if (segsleft >= 2 && 2291 cm->cm_sglsize < len + MPS_SGC_SIZE + MPS_SGE64_SIZE) { 2292 /* 2293 * There are 2 or more segments left to add, and only 2294 * enough room for 1 and a chain. Case (3). 2295 * 2296 * Mark as last element in this chain if necessary. 2297 */ 2298 if (type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { 2299 sge->FlagsLength |= htole32( 2300 MPI2_SGE_FLAGS_LAST_ELEMENT << MPI2_SGE_FLAGS_SHIFT); 2301 } 2302 2303 /* 2304 * Add the item then a chain. Do the chain now, 2305 * rather than on the next iteration, to simplify 2306 * understanding the code. 2307 */ 2308 cm->cm_sglsize -= len; 2309 bcopy(sgep, cm->cm_sge, len); 2310 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2311 return (mps_add_chain(cm)); 2312 } 2313 2314 if (segsleft >= 1 && cm->cm_sglsize < len + MPS_SGC_SIZE) { 2315 /* 2316 * 1 or more segment, enough room for only a chain. 2317 * Hope the previous element wasn't a Simple entry 2318 * that needed to be marked with 2319 * MPI2_SGE_FLAGS_LAST_ELEMENT. Case (4). 2320 */ 2321 if ((error = mps_add_chain(cm)) != 0) 2322 return (error); 2323 } 2324 2325 #ifdef INVARIANTS 2326 /* Case 1: 1 more segment, enough room for it. */ 2327 if (segsleft == 1 && cm->cm_sglsize < len) 2328 panic("1 seg left and no room? %u versus %zu", 2329 cm->cm_sglsize, len); 2330 2331 /* Case 2: 2 more segments, enough room for both */ 2332 if (segsleft == 2 && cm->cm_sglsize < len + MPS_SGE64_SIZE) 2333 panic("2 segs left and no room? %u versus %zu", 2334 cm->cm_sglsize, len); 2335 #endif 2336 2337 if (segsleft == 1 && type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { 2338 /* 2339 * If this is a bi-directional request, need to account for that 2340 * here. Save the pre-filled sge values. These will be used 2341 * either for the 2nd SGL or for a single direction SGL. If 2342 * cm_out_len is non-zero, this is a bi-directional request, so 2343 * fill in the OUT SGL first, then the IN SGL, otherwise just 2344 * fill in the IN SGL. Note that at this time, when filling in 2345 * 2 SGL's for a bi-directional request, they both use the same 2346 * DMA buffer (same cm command). 2347 */ 2348 saved_buf_len = le32toh(sge->FlagsLength) & 0x00FFFFFF; 2349 saved_address_low = sge->Address.Low; 2350 saved_address_high = sge->Address.High; 2351 if (cm->cm_out_len) { 2352 sge->FlagsLength = htole32(cm->cm_out_len | 2353 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2354 MPI2_SGE_FLAGS_END_OF_BUFFER | 2355 MPI2_SGE_FLAGS_HOST_TO_IOC | 2356 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2357 MPI2_SGE_FLAGS_SHIFT)); 2358 cm->cm_sglsize -= len; 2359 bcopy(sgep, cm->cm_sge, len); 2360 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge 2361 + len); 2362 } 2363 saved_buf_len |= 2364 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2365 MPI2_SGE_FLAGS_END_OF_BUFFER | 2366 MPI2_SGE_FLAGS_LAST_ELEMENT | 2367 MPI2_SGE_FLAGS_END_OF_LIST | 2368 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2369 MPI2_SGE_FLAGS_SHIFT); 2370 if (cm->cm_flags & MPS_CM_FLAGS_DATAIN) { 2371 saved_buf_len |= 2372 ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) << 2373 MPI2_SGE_FLAGS_SHIFT); 2374 } else { 2375 saved_buf_len |= 2376 ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) << 2377 MPI2_SGE_FLAGS_SHIFT); 2378 } 2379 sge->FlagsLength = htole32(saved_buf_len); 2380 sge->Address.Low = saved_address_low; 2381 sge->Address.High = saved_address_high; 2382 } 2383 2384 cm->cm_sglsize -= len; 2385 bcopy(sgep, cm->cm_sge, len); 2386 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2387 return (0); 2388 } 2389 2390 /* 2391 * Add one dma segment to the scatter-gather list for a command. 2392 */ 2393 int 2394 mps_add_dmaseg(struct mps_command *cm, vm_paddr_t pa, size_t len, u_int flags, 2395 int segsleft) 2396 { 2397 MPI2_SGE_SIMPLE64 sge; 2398 2399 /* 2400 * This driver always uses 64-bit address elements for simplicity. 2401 */ 2402 bzero(&sge, sizeof(sge)); 2403 flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2404 MPI2_SGE_FLAGS_64_BIT_ADDRESSING; 2405 sge.FlagsLength = htole32(len | (flags << MPI2_SGE_FLAGS_SHIFT)); 2406 mps_from_u64(pa, &sge.Address); 2407 2408 return (mps_push_sge(cm, &sge, sizeof sge, segsleft)); 2409 } 2410 2411 static void 2412 mps_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 2413 { 2414 struct mps_softc *sc; 2415 struct mps_command *cm; 2416 u_int i, dir, sflags; 2417 2418 cm = (struct mps_command *)arg; 2419 sc = cm->cm_sc; 2420 2421 /* 2422 * In this case, just print out a warning and let the chip tell the 2423 * user they did the wrong thing. 2424 */ 2425 if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) { 2426 mps_dprint(sc, MPS_ERROR, 2427 "%s: warning: busdma returned %d segments, " 2428 "more than the %d allowed\n", __func__, nsegs, 2429 cm->cm_max_segs); 2430 } 2431 2432 /* 2433 * Set up DMA direction flags. Bi-directional requests are also handled 2434 * here. In that case, both direction flags will be set. 2435 */ 2436 sflags = 0; 2437 if (cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) { 2438 /* 2439 * We have to add a special case for SMP passthrough, there 2440 * is no easy way to generically handle it. The first 2441 * S/G element is used for the command (therefore the 2442 * direction bit needs to be set). The second one is used 2443 * for the reply. We'll leave it to the caller to make 2444 * sure we only have two buffers. 2445 */ 2446 /* 2447 * Even though the busdma man page says it doesn't make 2448 * sense to have both direction flags, it does in this case. 2449 * We have one s/g element being accessed in each direction. 2450 */ 2451 dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD; 2452 2453 /* 2454 * Set the direction flag on the first buffer in the SMP 2455 * passthrough request. We'll clear it for the second one. 2456 */ 2457 sflags |= MPI2_SGE_FLAGS_DIRECTION | 2458 MPI2_SGE_FLAGS_END_OF_BUFFER; 2459 } else if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) { 2460 sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC; 2461 dir = BUS_DMASYNC_PREWRITE; 2462 } else 2463 dir = BUS_DMASYNC_PREREAD; 2464 2465 for (i = 0; i < nsegs; i++) { 2466 if ((cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) && (i != 0)) { 2467 sflags &= ~MPI2_SGE_FLAGS_DIRECTION; 2468 } 2469 error = mps_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len, 2470 sflags, nsegs - i); 2471 if (error != 0) { 2472 /* Resource shortage, roll back! */ 2473 if (ratecheck(&sc->lastfail, &mps_chainfail_interval)) 2474 mps_dprint(sc, MPS_INFO, "Out of chain frames, " 2475 "consider increasing hw.mps.max_chains.\n"); 2476 cm->cm_flags |= MPS_CM_FLAGS_CHAIN_FAILED; 2477 mps_complete_command(sc, cm); 2478 return; 2479 } 2480 } 2481 2482 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir); 2483 mps_enqueue_request(sc, cm); 2484 2485 return; 2486 } 2487 2488 static void 2489 mps_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize, 2490 int error) 2491 { 2492 mps_data_cb(arg, segs, nsegs, error); 2493 } 2494 2495 /* 2496 * This is the routine to enqueue commands ansynchronously. 2497 * Note that the only error path here is from bus_dmamap_load(), which can 2498 * return EINPROGRESS if it is waiting for resources. Other than this, it's 2499 * assumed that if you have a command in-hand, then you have enough credits 2500 * to use it. 2501 */ 2502 int 2503 mps_map_command(struct mps_softc *sc, struct mps_command *cm) 2504 { 2505 int error = 0; 2506 2507 if (cm->cm_flags & MPS_CM_FLAGS_USE_UIO) { 2508 error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap, 2509 &cm->cm_uio, mps_data_cb2, cm, 0); 2510 } else if (cm->cm_flags & MPS_CM_FLAGS_USE_CCB) { 2511 error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap, 2512 cm->cm_data, mps_data_cb, cm, 0); 2513 } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) { 2514 error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap, 2515 cm->cm_data, cm->cm_length, mps_data_cb, cm, 0); 2516 } else { 2517 /* Add a zero-length element as needed */ 2518 if (cm->cm_sge != NULL) 2519 mps_add_dmaseg(cm, 0, 0, 0, 1); 2520 mps_enqueue_request(sc, cm); 2521 } 2522 2523 return (error); 2524 } 2525 2526 /* 2527 * This is the routine to enqueue commands synchronously. An error of 2528 * EINPROGRESS from mps_map_command() is ignored since the command will 2529 * be executed and enqueued automatically. Other errors come from msleep(). 2530 */ 2531 int 2532 mps_wait_command(struct mps_softc *sc, struct mps_command *cm, int timeout, 2533 int sleep_flag) 2534 { 2535 int error, rc; 2536 struct timeval cur_time, start_time; 2537 2538 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) 2539 return EBUSY; 2540 2541 cm->cm_complete = NULL; 2542 cm->cm_flags |= MPS_CM_FLAGS_POLLED; 2543 error = mps_map_command(sc, cm); 2544 if ((error != 0) && (error != EINPROGRESS)) 2545 return (error); 2546 2547 /* 2548 * Check for context and wait for 50 mSec at a time until time has 2549 * expired or the command has finished. If msleep can't be used, need 2550 * to poll. 2551 */ 2552 if (curthread->td_no_sleeping != 0) 2553 sleep_flag = NO_SLEEP; 2554 getmicrotime(&start_time); 2555 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) { 2556 cm->cm_flags |= MPS_CM_FLAGS_WAKEUP; 2557 error = msleep(cm, &sc->mps_mtx, 0, "mpswait", timeout*hz); 2558 } else { 2559 while ((cm->cm_flags & MPS_CM_FLAGS_COMPLETE) == 0) { 2560 mps_intr_locked(sc); 2561 if (sleep_flag == CAN_SLEEP) 2562 pause("mpswait", hz/20); 2563 else 2564 DELAY(50000); 2565 2566 getmicrotime(&cur_time); 2567 if ((cur_time.tv_sec - start_time.tv_sec) > timeout) { 2568 error = EWOULDBLOCK; 2569 break; 2570 } 2571 } 2572 } 2573 2574 if (error == EWOULDBLOCK) { 2575 mps_dprint(sc, MPS_FAULT, "Calling Reinit from %s\n", __func__); 2576 rc = mps_reinit(sc); 2577 mps_dprint(sc, MPS_FAULT, "Reinit %s\n", (rc == 0) ? "success" : 2578 "failed"); 2579 error = ETIMEDOUT; 2580 } 2581 return (error); 2582 } 2583 2584 /* 2585 * The MPT driver had a verbose interface for config pages. In this driver, 2586 * reduce it to much simpler terms, similar to the Linux driver. 2587 */ 2588 int 2589 mps_read_config_page(struct mps_softc *sc, struct mps_config_params *params) 2590 { 2591 MPI2_CONFIG_REQUEST *req; 2592 struct mps_command *cm; 2593 int error; 2594 2595 if (sc->mps_flags & MPS_FLAGS_BUSY) { 2596 return (EBUSY); 2597 } 2598 2599 cm = mps_alloc_command(sc); 2600 if (cm == NULL) { 2601 return (EBUSY); 2602 } 2603 2604 req = (MPI2_CONFIG_REQUEST *)cm->cm_req; 2605 req->Function = MPI2_FUNCTION_CONFIG; 2606 req->Action = params->action; 2607 req->SGLFlags = 0; 2608 req->ChainOffset = 0; 2609 req->PageAddress = params->page_address; 2610 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 2611 MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr; 2612 2613 hdr = ¶ms->hdr.Ext; 2614 req->ExtPageType = hdr->ExtPageType; 2615 req->ExtPageLength = hdr->ExtPageLength; 2616 req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED; 2617 req->Header.PageLength = 0; /* Must be set to zero */ 2618 req->Header.PageNumber = hdr->PageNumber; 2619 req->Header.PageVersion = hdr->PageVersion; 2620 } else { 2621 MPI2_CONFIG_PAGE_HEADER *hdr; 2622 2623 hdr = ¶ms->hdr.Struct; 2624 req->Header.PageType = hdr->PageType; 2625 req->Header.PageNumber = hdr->PageNumber; 2626 req->Header.PageLength = hdr->PageLength; 2627 req->Header.PageVersion = hdr->PageVersion; 2628 } 2629 2630 cm->cm_data = params->buffer; 2631 cm->cm_length = params->length; 2632 if (cm->cm_data != NULL) { 2633 cm->cm_sge = &req->PageBufferSGE; 2634 cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION); 2635 cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_DATAIN; 2636 } else 2637 cm->cm_sge = NULL; 2638 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2639 2640 cm->cm_complete_data = params; 2641 if (params->callback != NULL) { 2642 cm->cm_complete = mps_config_complete; 2643 return (mps_map_command(sc, cm)); 2644 } else { 2645 error = mps_wait_command(sc, cm, 0, CAN_SLEEP); 2646 if (error) { 2647 mps_dprint(sc, MPS_FAULT, 2648 "Error %d reading config page\n", error); 2649 mps_free_command(sc, cm); 2650 return (error); 2651 } 2652 mps_config_complete(sc, cm); 2653 } 2654 2655 return (0); 2656 } 2657 2658 int 2659 mps_write_config_page(struct mps_softc *sc, struct mps_config_params *params) 2660 { 2661 return (EINVAL); 2662 } 2663 2664 static void 2665 mps_config_complete(struct mps_softc *sc, struct mps_command *cm) 2666 { 2667 MPI2_CONFIG_REPLY *reply; 2668 struct mps_config_params *params; 2669 2670 MPS_FUNCTRACE(sc); 2671 params = cm->cm_complete_data; 2672 2673 if (cm->cm_data != NULL) { 2674 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, 2675 BUS_DMASYNC_POSTREAD); 2676 bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap); 2677 } 2678 2679 /* 2680 * XXX KDM need to do more error recovery? This results in the 2681 * device in question not getting probed. 2682 */ 2683 if ((cm->cm_flags & MPS_CM_FLAGS_ERROR_MASK) != 0) { 2684 params->status = MPI2_IOCSTATUS_BUSY; 2685 goto done; 2686 } 2687 2688 reply = (MPI2_CONFIG_REPLY *)cm->cm_reply; 2689 if (reply == NULL) { 2690 params->status = MPI2_IOCSTATUS_BUSY; 2691 goto done; 2692 } 2693 params->status = reply->IOCStatus; 2694 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 2695 params->hdr.Ext.ExtPageType = reply->ExtPageType; 2696 params->hdr.Ext.ExtPageLength = reply->ExtPageLength; 2697 params->hdr.Ext.PageType = reply->Header.PageType; 2698 params->hdr.Ext.PageNumber = reply->Header.PageNumber; 2699 params->hdr.Ext.PageVersion = reply->Header.PageVersion; 2700 } else { 2701 params->hdr.Struct.PageType = reply->Header.PageType; 2702 params->hdr.Struct.PageNumber = reply->Header.PageNumber; 2703 params->hdr.Struct.PageLength = reply->Header.PageLength; 2704 params->hdr.Struct.PageVersion = reply->Header.PageVersion; 2705 } 2706 2707 done: 2708 mps_free_command(sc, cm); 2709 if (params->callback != NULL) 2710 params->callback(sc, params); 2711 2712 return; 2713 } 2714