1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2009 Yahoo! Inc. 5 * Copyright (c) 2011-2015 LSI Corp. 6 * Copyright (c) 2013-2015 Avago Technologies 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 31 * 32 * $FreeBSD$ 33 */ 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD$"); 37 38 /* Communications core for Avago Technologies (LSI) MPT2 */ 39 40 /* TODO Move headers to mpsvar */ 41 #include <sys/types.h> 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/selinfo.h> 46 #include <sys/lock.h> 47 #include <sys/mutex.h> 48 #include <sys/module.h> 49 #include <sys/bus.h> 50 #include <sys/conf.h> 51 #include <sys/bio.h> 52 #include <sys/malloc.h> 53 #include <sys/uio.h> 54 #include <sys/sysctl.h> 55 #include <sys/smp.h> 56 #include <sys/queue.h> 57 #include <sys/kthread.h> 58 #include <sys/taskqueue.h> 59 #include <sys/endian.h> 60 #include <sys/eventhandler.h> 61 #include <sys/sbuf.h> 62 #include <sys/priv.h> 63 64 #include <machine/bus.h> 65 #include <machine/resource.h> 66 #include <sys/rman.h> 67 #include <sys/proc.h> 68 69 #include <dev/pci/pcivar.h> 70 71 #include <cam/cam.h> 72 #include <cam/scsi/scsi_all.h> 73 74 #include <dev/mps/mpi/mpi2_type.h> 75 #include <dev/mps/mpi/mpi2.h> 76 #include <dev/mps/mpi/mpi2_ioc.h> 77 #include <dev/mps/mpi/mpi2_sas.h> 78 #include <dev/mps/mpi/mpi2_cnfg.h> 79 #include <dev/mps/mpi/mpi2_init.h> 80 #include <dev/mps/mpi/mpi2_tool.h> 81 #include <dev/mps/mps_ioctl.h> 82 #include <dev/mps/mpsvar.h> 83 #include <dev/mps/mps_table.h> 84 85 static int mps_diag_reset(struct mps_softc *sc, int sleep_flag); 86 static int mps_init_queues(struct mps_softc *sc); 87 static void mps_resize_queues(struct mps_softc *sc); 88 static int mps_message_unit_reset(struct mps_softc *sc, int sleep_flag); 89 static int mps_transition_operational(struct mps_softc *sc); 90 static int mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching); 91 static void mps_iocfacts_free(struct mps_softc *sc); 92 static void mps_startup(void *arg); 93 static int mps_send_iocinit(struct mps_softc *sc); 94 static int mps_alloc_queues(struct mps_softc *sc); 95 static int mps_alloc_hw_queues(struct mps_softc *sc); 96 static int mps_alloc_replies(struct mps_softc *sc); 97 static int mps_alloc_requests(struct mps_softc *sc); 98 static int mps_attach_log(struct mps_softc *sc); 99 static __inline void mps_complete_command(struct mps_softc *sc, 100 struct mps_command *cm); 101 static void mps_dispatch_event(struct mps_softc *sc, uintptr_t data, 102 MPI2_EVENT_NOTIFICATION_REPLY *reply); 103 static void mps_config_complete(struct mps_softc *sc, struct mps_command *cm); 104 static void mps_periodic(void *); 105 static int mps_reregister_events(struct mps_softc *sc); 106 static void mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm); 107 static int mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts); 108 static int mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag); 109 static int mps_debug_sysctl(SYSCTL_HANDLER_ARGS); 110 static int mps_dump_reqs(SYSCTL_HANDLER_ARGS); 111 static void mps_parse_debug(struct mps_softc *sc, char *list); 112 113 SYSCTL_NODE(_hw, OID_AUTO, mps, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, 114 "MPS Driver Parameters"); 115 116 MALLOC_DEFINE(M_MPT2, "mps", "mpt2 driver memory"); 117 MALLOC_DECLARE(M_MPSUSER); 118 119 /* 120 * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of 121 * any state and back to its initialization state machine. 122 */ 123 static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d }; 124 125 /* Added this union to smoothly convert le64toh cm->cm_desc.Words. 126 * Compiler only support unint64_t to be passed as argument. 127 * Otherwise it will throw below error 128 * "aggregate value used where an integer was expected" 129 */ 130 131 typedef union { 132 u64 word; 133 struct { 134 u32 low; 135 u32 high; 136 } u; 137 } request_descriptor_t; 138 139 /* Rate limit chain-fail messages to 1 per minute */ 140 static struct timeval mps_chainfail_interval = { 60, 0 }; 141 142 /* 143 * sleep_flag can be either CAN_SLEEP or NO_SLEEP. 144 * If this function is called from process context, it can sleep 145 * and there is no harm to sleep, in case if this fuction is called 146 * from Interrupt handler, we can not sleep and need NO_SLEEP flag set. 147 * based on sleep flags driver will call either msleep, pause or DELAY. 148 * msleep and pause are of same variant, but pause is used when mps_mtx 149 * is not hold by driver. 150 * 151 */ 152 static int 153 mps_diag_reset(struct mps_softc *sc,int sleep_flag) 154 { 155 uint32_t reg; 156 int i, error, tries = 0; 157 uint8_t first_wait_done = FALSE; 158 159 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 160 161 /* Clear any pending interrupts */ 162 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 163 164 /* 165 * Force NO_SLEEP for threads prohibited to sleep 166 * e.a Thread from interrupt handler are prohibited to sleep. 167 */ 168 if (curthread->td_no_sleeping != 0) 169 sleep_flag = NO_SLEEP; 170 171 mps_dprint(sc, MPS_INIT, "sequence start, sleep_flag= %d\n", sleep_flag); 172 173 /* Push the magic sequence */ 174 error = ETIMEDOUT; 175 while (tries++ < 20) { 176 for (i = 0; i < sizeof(mpt2_reset_magic); i++) 177 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 178 mpt2_reset_magic[i]); 179 /* wait 100 msec */ 180 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 181 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 182 "mpsdiag", hz/10); 183 else if (sleep_flag == CAN_SLEEP) 184 pause("mpsdiag", hz/10); 185 else 186 DELAY(100 * 1000); 187 188 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 189 if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) { 190 error = 0; 191 break; 192 } 193 } 194 if (error) { 195 mps_dprint(sc, MPS_INIT, "sequence failed, error=%d, exit\n", 196 error); 197 return (error); 198 } 199 200 /* Send the actual reset. XXX need to refresh the reg? */ 201 reg |= MPI2_DIAG_RESET_ADAPTER; 202 mps_dprint(sc, MPS_INIT, "sequence success, sending reset, reg= 0x%x\n", 203 reg); 204 mps_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET, reg); 205 206 /* Wait up to 300 seconds in 50ms intervals */ 207 error = ETIMEDOUT; 208 for (i = 0; i < 6000; i++) { 209 /* 210 * Wait 50 msec. If this is the first time through, wait 256 211 * msec to satisfy Diag Reset timing requirements. 212 */ 213 if (first_wait_done) { 214 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 215 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 216 "mpsdiag", hz/20); 217 else if (sleep_flag == CAN_SLEEP) 218 pause("mpsdiag", hz/20); 219 else 220 DELAY(50 * 1000); 221 } else { 222 DELAY(256 * 1000); 223 first_wait_done = TRUE; 224 } 225 /* 226 * Check for the RESET_ADAPTER bit to be cleared first, then 227 * wait for the RESET state to be cleared, which takes a little 228 * longer. 229 */ 230 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 231 if (reg & MPI2_DIAG_RESET_ADAPTER) { 232 continue; 233 } 234 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 235 if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) { 236 error = 0; 237 break; 238 } 239 } 240 if (error) { 241 mps_dprint(sc, MPS_INIT, "reset failed, error= %d, exit\n", 242 error); 243 return (error); 244 } 245 246 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0); 247 mps_dprint(sc, MPS_INIT, "diag reset success, exit\n"); 248 249 return (0); 250 } 251 252 static int 253 mps_message_unit_reset(struct mps_softc *sc, int sleep_flag) 254 { 255 int error; 256 257 MPS_FUNCTRACE(sc); 258 259 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 260 261 error = 0; 262 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, 263 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET << 264 MPI2_DOORBELL_FUNCTION_SHIFT); 265 266 if (mps_wait_db_ack(sc, 5, sleep_flag) != 0) { 267 mps_dprint(sc, MPS_INIT|MPS_FAULT, 268 "Doorbell handshake failed\n"); 269 error = ETIMEDOUT; 270 } 271 272 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 273 return (error); 274 } 275 276 static int 277 mps_transition_ready(struct mps_softc *sc) 278 { 279 uint32_t reg, state; 280 int error, tries = 0; 281 int sleep_flags; 282 283 MPS_FUNCTRACE(sc); 284 /* If we are in attach call, do not sleep */ 285 sleep_flags = (sc->mps_flags & MPS_FLAGS_ATTACH_DONE) 286 ? CAN_SLEEP:NO_SLEEP; 287 error = 0; 288 289 mps_dprint(sc, MPS_INIT, "%s entered, sleep_flags= %d\n", 290 __func__, sleep_flags); 291 292 while (tries++ < 1200) { 293 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 294 mps_dprint(sc, MPS_INIT, " Doorbell= 0x%x\n", reg); 295 296 /* 297 * Ensure the IOC is ready to talk. If it's not, try 298 * resetting it. 299 */ 300 if (reg & MPI2_DOORBELL_USED) { 301 mps_dprint(sc, MPS_INIT, " Not ready, sending diag " 302 "reset\n"); 303 mps_diag_reset(sc, sleep_flags); 304 DELAY(50000); 305 continue; 306 } 307 308 /* Is the adapter owned by another peer? */ 309 if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) == 310 (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) { 311 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC is under the " 312 "control of another peer host, aborting " 313 "initialization.\n"); 314 error = ENXIO; 315 break; 316 } 317 318 state = reg & MPI2_IOC_STATE_MASK; 319 if (state == MPI2_IOC_STATE_READY) { 320 /* Ready to go! */ 321 error = 0; 322 break; 323 } else if (state == MPI2_IOC_STATE_FAULT) { 324 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC in fault " 325 "state 0x%x, resetting\n", 326 state & MPI2_DOORBELL_FAULT_CODE_MASK); 327 mps_diag_reset(sc, sleep_flags); 328 } else if (state == MPI2_IOC_STATE_OPERATIONAL) { 329 /* Need to take ownership */ 330 mps_message_unit_reset(sc, sleep_flags); 331 } else if (state == MPI2_IOC_STATE_RESET) { 332 /* Wait a bit, IOC might be in transition */ 333 mps_dprint(sc, MPS_INIT|MPS_FAULT, 334 "IOC in unexpected reset state\n"); 335 } else { 336 mps_dprint(sc, MPS_INIT|MPS_FAULT, 337 "IOC in unknown state 0x%x\n", state); 338 error = EINVAL; 339 break; 340 } 341 342 /* Wait 50ms for things to settle down. */ 343 DELAY(50000); 344 } 345 346 if (error) 347 mps_dprint(sc, MPS_INIT|MPS_FAULT, 348 "Cannot transition IOC to ready\n"); 349 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 350 351 return (error); 352 } 353 354 static int 355 mps_transition_operational(struct mps_softc *sc) 356 { 357 uint32_t reg, state; 358 int error; 359 360 MPS_FUNCTRACE(sc); 361 362 error = 0; 363 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 364 mps_dprint(sc, MPS_INIT, "%s entered, Doorbell= 0x%x\n", __func__, reg); 365 366 state = reg & MPI2_IOC_STATE_MASK; 367 if (state != MPI2_IOC_STATE_READY) { 368 mps_dprint(sc, MPS_INIT, "IOC not ready\n"); 369 if ((error = mps_transition_ready(sc)) != 0) { 370 mps_dprint(sc, MPS_INIT|MPS_FAULT, 371 "failed to transition ready, exit\n"); 372 return (error); 373 } 374 } 375 376 error = mps_send_iocinit(sc); 377 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 378 379 return (error); 380 } 381 382 static void 383 mps_resize_queues(struct mps_softc *sc) 384 { 385 u_int reqcr, prireqcr, maxio, sges_per_frame; 386 387 /* 388 * Size the queues. Since the reply queues always need one free 389 * entry, we'll deduct one reply message here. The LSI documents 390 * suggest instead to add a count to the request queue, but I think 391 * that it's better to deduct from reply queue. 392 */ 393 prireqcr = MAX(1, sc->max_prireqframes); 394 prireqcr = MIN(prireqcr, sc->facts->HighPriorityCredit); 395 396 reqcr = MAX(2, sc->max_reqframes); 397 reqcr = MIN(reqcr, sc->facts->RequestCredit); 398 399 sc->num_reqs = prireqcr + reqcr; 400 sc->num_prireqs = prireqcr; 401 sc->num_replies = MIN(sc->max_replyframes + sc->max_evtframes, 402 sc->facts->MaxReplyDescriptorPostQueueDepth) - 1; 403 404 /* Store the request frame size in bytes rather than as 32bit words */ 405 sc->reqframesz = sc->facts->IOCRequestFrameSize * 4; 406 407 /* 408 * Max IO Size is Page Size * the following: 409 * ((SGEs per frame - 1 for chain element) * Max Chain Depth) 410 * + 1 for no chain needed in last frame 411 * 412 * If user suggests a Max IO size to use, use the smaller of the 413 * user's value and the calculated value as long as the user's 414 * value is larger than 0. The user's value is in pages. 415 */ 416 sges_per_frame = sc->reqframesz / sizeof(MPI2_SGE_SIMPLE64) - 1; 417 maxio = (sges_per_frame * sc->facts->MaxChainDepth + 1) * PAGE_SIZE; 418 419 /* 420 * If I/O size limitation requested, then use it and pass up to CAM. 421 * If not, use maxphys as an optimization hint, but report HW limit. 422 */ 423 if (sc->max_io_pages > 0) { 424 maxio = min(maxio, sc->max_io_pages * PAGE_SIZE); 425 sc->maxio = maxio; 426 } else { 427 sc->maxio = maxio; 428 maxio = min(maxio, maxphys); 429 } 430 431 sc->num_chains = (maxio / PAGE_SIZE + sges_per_frame - 2) / 432 sges_per_frame * reqcr; 433 if (sc->max_chains > 0 && sc->max_chains < sc->num_chains) 434 sc->num_chains = sc->max_chains; 435 436 /* 437 * Figure out the number of MSIx-based queues. If the firmware or 438 * user has done something crazy and not allowed enough credit for 439 * the queues to be useful then don't enable multi-queue. 440 */ 441 if (sc->facts->MaxMSIxVectors < 2) 442 sc->msi_msgs = 1; 443 444 if (sc->msi_msgs > 1) { 445 sc->msi_msgs = MIN(sc->msi_msgs, mp_ncpus); 446 sc->msi_msgs = MIN(sc->msi_msgs, sc->facts->MaxMSIxVectors); 447 if (sc->num_reqs / sc->msi_msgs < 2) 448 sc->msi_msgs = 1; 449 } 450 451 mps_dprint(sc, MPS_INIT, "Sized queues to q=%d reqs=%d replies=%d\n", 452 sc->msi_msgs, sc->num_reqs, sc->num_replies); 453 } 454 455 /* 456 * This is called during attach and when re-initializing due to a Diag Reset. 457 * IOC Facts is used to allocate many of the structures needed by the driver. 458 * If called from attach, de-allocation is not required because the driver has 459 * not allocated any structures yet, but if called from a Diag Reset, previously 460 * allocated structures based on IOC Facts will need to be freed and re- 461 * allocated bases on the latest IOC Facts. 462 */ 463 static int 464 mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching) 465 { 466 int error; 467 Mpi2IOCFactsReply_t saved_facts; 468 uint8_t saved_mode, reallocating; 469 470 mps_dprint(sc, MPS_INIT|MPS_TRACE, "%s entered\n", __func__); 471 472 /* Save old IOC Facts and then only reallocate if Facts have changed */ 473 if (!attaching) { 474 bcopy(sc->facts, &saved_facts, sizeof(MPI2_IOC_FACTS_REPLY)); 475 } 476 477 /* 478 * Get IOC Facts. In all cases throughout this function, panic if doing 479 * a re-initialization and only return the error if attaching so the OS 480 * can handle it. 481 */ 482 if ((error = mps_get_iocfacts(sc, sc->facts)) != 0) { 483 if (attaching) { 484 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to get " 485 "IOC Facts with error %d, exit\n", error); 486 return (error); 487 } else { 488 panic("%s failed to get IOC Facts with error %d\n", 489 __func__, error); 490 } 491 } 492 493 MPS_DPRINT_PAGE(sc, MPS_XINFO, iocfacts, sc->facts); 494 495 snprintf(sc->fw_version, sizeof(sc->fw_version), 496 "%02d.%02d.%02d.%02d", 497 sc->facts->FWVersion.Struct.Major, 498 sc->facts->FWVersion.Struct.Minor, 499 sc->facts->FWVersion.Struct.Unit, 500 sc->facts->FWVersion.Struct.Dev); 501 502 snprintf(sc->msg_version, sizeof(sc->msg_version), "%d.%d", 503 (sc->facts->MsgVersion & MPI2_IOCFACTS_MSGVERSION_MAJOR_MASK) >> 504 MPI2_IOCFACTS_MSGVERSION_MAJOR_SHIFT, 505 (sc->facts->MsgVersion & MPI2_IOCFACTS_MSGVERSION_MINOR_MASK) >> 506 MPI2_IOCFACTS_MSGVERSION_MINOR_SHIFT); 507 508 mps_dprint(sc, MPS_INFO, "Firmware: %s, Driver: %s\n", sc->fw_version, 509 MPS_DRIVER_VERSION); 510 mps_dprint(sc, MPS_INFO, "IOCCapabilities: %b\n", 511 sc->facts->IOCCapabilities, 512 "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf" 513 "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR" 514 "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc"); 515 516 /* 517 * If the chip doesn't support event replay then a hard reset will be 518 * required to trigger a full discovery. Do the reset here then 519 * retransition to Ready. A hard reset might have already been done, 520 * but it doesn't hurt to do it again. Only do this if attaching, not 521 * for a Diag Reset. 522 */ 523 if (attaching && ((sc->facts->IOCCapabilities & 524 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0)) { 525 mps_dprint(sc, MPS_INIT, "No event replay, reseting\n"); 526 mps_diag_reset(sc, NO_SLEEP); 527 if ((error = mps_transition_ready(sc)) != 0) { 528 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to " 529 "transition to ready with error %d, exit\n", 530 error); 531 return (error); 532 } 533 } 534 535 /* 536 * Set flag if IR Firmware is loaded. If the RAID Capability has 537 * changed from the previous IOC Facts, log a warning, but only if 538 * checking this after a Diag Reset and not during attach. 539 */ 540 saved_mode = sc->ir_firmware; 541 if (sc->facts->IOCCapabilities & 542 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) 543 sc->ir_firmware = 1; 544 if (!attaching) { 545 if (sc->ir_firmware != saved_mode) { 546 mps_dprint(sc, MPS_INIT|MPS_FAULT, "new IR/IT mode " 547 "in IOC Facts does not match previous mode\n"); 548 } 549 } 550 551 /* Only deallocate and reallocate if relevant IOC Facts have changed */ 552 reallocating = FALSE; 553 sc->mps_flags &= ~MPS_FLAGS_REALLOCATED; 554 555 if ((!attaching) && 556 ((saved_facts.MsgVersion != sc->facts->MsgVersion) || 557 (saved_facts.HeaderVersion != sc->facts->HeaderVersion) || 558 (saved_facts.MaxChainDepth != sc->facts->MaxChainDepth) || 559 (saved_facts.RequestCredit != sc->facts->RequestCredit) || 560 (saved_facts.ProductID != sc->facts->ProductID) || 561 (saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) || 562 (saved_facts.IOCRequestFrameSize != 563 sc->facts->IOCRequestFrameSize) || 564 (saved_facts.MaxTargets != sc->facts->MaxTargets) || 565 (saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) || 566 (saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) || 567 (saved_facts.HighPriorityCredit != sc->facts->HighPriorityCredit) || 568 (saved_facts.MaxReplyDescriptorPostQueueDepth != 569 sc->facts->MaxReplyDescriptorPostQueueDepth) || 570 (saved_facts.ReplyFrameSize != sc->facts->ReplyFrameSize) || 571 (saved_facts.MaxVolumes != sc->facts->MaxVolumes) || 572 (saved_facts.MaxPersistentEntries != 573 sc->facts->MaxPersistentEntries))) { 574 reallocating = TRUE; 575 576 /* Record that we reallocated everything */ 577 sc->mps_flags |= MPS_FLAGS_REALLOCATED; 578 } 579 580 /* 581 * Some things should be done if attaching or re-allocating after a Diag 582 * Reset, but are not needed after a Diag Reset if the FW has not 583 * changed. 584 */ 585 if (attaching || reallocating) { 586 /* 587 * Check if controller supports FW diag buffers and set flag to 588 * enable each type. 589 */ 590 if (sc->facts->IOCCapabilities & 591 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) 592 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE]. 593 enabled = TRUE; 594 if (sc->facts->IOCCapabilities & 595 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) 596 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT]. 597 enabled = TRUE; 598 if (sc->facts->IOCCapabilities & 599 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) 600 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED]. 601 enabled = TRUE; 602 603 /* 604 * Set flag if EEDP is supported and if TLR is supported. 605 */ 606 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) 607 sc->eedp_enabled = TRUE; 608 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) 609 sc->control_TLR = TRUE; 610 611 mps_resize_queues(sc); 612 613 /* 614 * Initialize all Tail Queues 615 */ 616 TAILQ_INIT(&sc->req_list); 617 TAILQ_INIT(&sc->high_priority_req_list); 618 TAILQ_INIT(&sc->chain_list); 619 TAILQ_INIT(&sc->tm_list); 620 } 621 622 /* 623 * If doing a Diag Reset and the FW is significantly different 624 * (reallocating will be set above in IOC Facts comparison), then all 625 * buffers based on the IOC Facts will need to be freed before they are 626 * reallocated. 627 */ 628 if (reallocating) { 629 mps_iocfacts_free(sc); 630 mpssas_realloc_targets(sc, saved_facts.MaxTargets + 631 saved_facts.MaxVolumes); 632 } 633 634 /* 635 * Any deallocation has been completed. Now start reallocating 636 * if needed. Will only need to reallocate if attaching or if the new 637 * IOC Facts are different from the previous IOC Facts after a Diag 638 * Reset. Targets have already been allocated above if needed. 639 */ 640 error = 0; 641 while (attaching || reallocating) { 642 if ((error = mps_alloc_hw_queues(sc)) != 0) 643 break; 644 if ((error = mps_alloc_replies(sc)) != 0) 645 break; 646 if ((error = mps_alloc_requests(sc)) != 0) 647 break; 648 if ((error = mps_alloc_queues(sc)) != 0) 649 break; 650 651 break; 652 } 653 if (error) { 654 mps_dprint(sc, MPS_INIT|MPS_FAULT, 655 "Failed to alloc queues with error %d\n", error); 656 mps_free(sc); 657 return (error); 658 } 659 660 /* Always initialize the queues */ 661 bzero(sc->free_queue, sc->fqdepth * 4); 662 mps_init_queues(sc); 663 664 /* 665 * Always get the chip out of the reset state, but only panic if not 666 * attaching. If attaching and there is an error, that is handled by 667 * the OS. 668 */ 669 error = mps_transition_operational(sc); 670 if (error != 0) { 671 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to " 672 "transition to operational with error %d\n", error); 673 mps_free(sc); 674 return (error); 675 } 676 677 /* 678 * Finish the queue initialization. 679 * These are set here instead of in mps_init_queues() because the 680 * IOC resets these values during the state transition in 681 * mps_transition_operational(). The free index is set to 1 682 * because the corresponding index in the IOC is set to 0, and the 683 * IOC treats the queues as full if both are set to the same value. 684 * Hence the reason that the queue can't hold all of the possible 685 * replies. 686 */ 687 sc->replypostindex = 0; 688 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); 689 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0); 690 691 /* 692 * Attach the subsystems so they can prepare their event masks. 693 * XXX Should be dynamic so that IM/IR and user modules can attach 694 */ 695 error = 0; 696 while (attaching) { 697 mps_dprint(sc, MPS_INIT, "Attaching subsystems\n"); 698 if ((error = mps_attach_log(sc)) != 0) 699 break; 700 if ((error = mps_attach_sas(sc)) != 0) 701 break; 702 if ((error = mps_attach_user(sc)) != 0) 703 break; 704 break; 705 } 706 if (error) { 707 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to attach all " 708 "subsystems: error %d\n", error); 709 mps_free(sc); 710 return (error); 711 } 712 713 /* 714 * XXX If the number of MSI-X vectors changes during re-init, this 715 * won't see it and adjust. 716 */ 717 if (attaching && (error = mps_pci_setup_interrupts(sc)) != 0) { 718 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to setup " 719 "interrupts\n"); 720 mps_free(sc); 721 return (error); 722 } 723 724 /* 725 * Set flag if this is a WD controller. This shouldn't ever change, but 726 * reset it after a Diag Reset, just in case. 727 */ 728 sc->WD_available = FALSE; 729 if (pci_get_device(sc->mps_dev) == MPI2_MFGPAGE_DEVID_SSS6200) 730 sc->WD_available = TRUE; 731 732 return (error); 733 } 734 735 /* 736 * This is called if memory is being free (during detach for example) and when 737 * buffers need to be reallocated due to a Diag Reset. 738 */ 739 static void 740 mps_iocfacts_free(struct mps_softc *sc) 741 { 742 struct mps_command *cm; 743 int i; 744 745 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 746 747 if (sc->free_busaddr != 0) 748 bus_dmamap_unload(sc->queues_dmat, sc->queues_map); 749 if (sc->free_queue != NULL) 750 bus_dmamem_free(sc->queues_dmat, sc->free_queue, 751 sc->queues_map); 752 if (sc->queues_dmat != NULL) 753 bus_dma_tag_destroy(sc->queues_dmat); 754 755 if (sc->chain_frames != NULL) { 756 bus_dmamap_unload(sc->chain_dmat, sc->chain_map); 757 bus_dmamem_free(sc->chain_dmat, sc->chain_frames, 758 sc->chain_map); 759 } 760 if (sc->chain_dmat != NULL) 761 bus_dma_tag_destroy(sc->chain_dmat); 762 763 if (sc->sense_busaddr != 0) 764 bus_dmamap_unload(sc->sense_dmat, sc->sense_map); 765 if (sc->sense_frames != NULL) 766 bus_dmamem_free(sc->sense_dmat, sc->sense_frames, 767 sc->sense_map); 768 if (sc->sense_dmat != NULL) 769 bus_dma_tag_destroy(sc->sense_dmat); 770 771 if (sc->reply_busaddr != 0) 772 bus_dmamap_unload(sc->reply_dmat, sc->reply_map); 773 if (sc->reply_frames != NULL) 774 bus_dmamem_free(sc->reply_dmat, sc->reply_frames, 775 sc->reply_map); 776 if (sc->reply_dmat != NULL) 777 bus_dma_tag_destroy(sc->reply_dmat); 778 779 if (sc->req_busaddr != 0) 780 bus_dmamap_unload(sc->req_dmat, sc->req_map); 781 if (sc->req_frames != NULL) 782 bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map); 783 if (sc->req_dmat != NULL) 784 bus_dma_tag_destroy(sc->req_dmat); 785 786 if (sc->chains != NULL) 787 free(sc->chains, M_MPT2); 788 if (sc->commands != NULL) { 789 for (i = 1; i < sc->num_reqs; i++) { 790 cm = &sc->commands[i]; 791 bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap); 792 } 793 free(sc->commands, M_MPT2); 794 } 795 if (sc->buffer_dmat != NULL) 796 bus_dma_tag_destroy(sc->buffer_dmat); 797 798 mps_pci_free_interrupts(sc); 799 free(sc->queues, M_MPT2); 800 sc->queues = NULL; 801 } 802 803 /* 804 * The terms diag reset and hard reset are used interchangeably in the MPI 805 * docs to mean resetting the controller chip. In this code diag reset 806 * cleans everything up, and the hard reset function just sends the reset 807 * sequence to the chip. This should probably be refactored so that every 808 * subsystem gets a reset notification of some sort, and can clean up 809 * appropriately. 810 */ 811 int 812 mps_reinit(struct mps_softc *sc) 813 { 814 int error; 815 struct mpssas_softc *sassc; 816 817 sassc = sc->sassc; 818 819 MPS_FUNCTRACE(sc); 820 821 mtx_assert(&sc->mps_mtx, MA_OWNED); 822 823 mps_dprint(sc, MPS_INIT|MPS_INFO, "Reinitializing controller\n"); 824 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) { 825 mps_dprint(sc, MPS_INIT, "Reset already in progress\n"); 826 return 0; 827 } 828 829 /* make sure the completion callbacks can recognize they're getting 830 * a NULL cm_reply due to a reset. 831 */ 832 sc->mps_flags |= MPS_FLAGS_DIAGRESET; 833 834 /* 835 * Mask interrupts here. 836 */ 837 mps_dprint(sc, MPS_INIT, "masking interrupts and resetting\n"); 838 mps_mask_intr(sc); 839 840 error = mps_diag_reset(sc, CAN_SLEEP); 841 if (error != 0) { 842 /* XXXSL No need to panic here */ 843 panic("%s hard reset failed with error %d\n", 844 __func__, error); 845 } 846 847 /* Restore the PCI state, including the MSI-X registers */ 848 mps_pci_restore(sc); 849 850 /* Give the I/O subsystem special priority to get itself prepared */ 851 mpssas_handle_reinit(sc); 852 853 /* 854 * Get IOC Facts and allocate all structures based on this information. 855 * The attach function will also call mps_iocfacts_allocate at startup. 856 * If relevant values have changed in IOC Facts, this function will free 857 * all of the memory based on IOC Facts and reallocate that memory. 858 */ 859 if ((error = mps_iocfacts_allocate(sc, FALSE)) != 0) { 860 panic("%s IOC Facts based allocation failed with error %d\n", 861 __func__, error); 862 } 863 864 /* 865 * Mapping structures will be re-allocated after getting IOC Page8, so 866 * free these structures here. 867 */ 868 mps_mapping_exit(sc); 869 870 /* 871 * The static page function currently read is IOC Page8. Others can be 872 * added in future. It's possible that the values in IOC Page8 have 873 * changed after a Diag Reset due to user modification, so always read 874 * these. Interrupts are masked, so unmask them before getting config 875 * pages. 876 */ 877 mps_unmask_intr(sc); 878 sc->mps_flags &= ~MPS_FLAGS_DIAGRESET; 879 mps_base_static_config_pages(sc); 880 881 /* 882 * Some mapping info is based in IOC Page8 data, so re-initialize the 883 * mapping tables. 884 */ 885 mps_mapping_initialize(sc); 886 887 /* 888 * Restart will reload the event masks clobbered by the reset, and 889 * then enable the port. 890 */ 891 mps_reregister_events(sc); 892 893 /* the end of discovery will release the simq, so we're done. */ 894 mps_dprint(sc, MPS_INIT|MPS_XINFO, "Finished sc %p post %u free %u\n", 895 sc, sc->replypostindex, sc->replyfreeindex); 896 897 mpssas_release_simq_reinit(sassc); 898 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 899 900 return 0; 901 } 902 903 /* Wait for the chip to ACK a word that we've put into its FIFO 904 * Wait for <timeout> seconds. In single loop wait for busy loop 905 * for 500 microseconds. 906 * Total is [ 0.5 * (2000 * <timeout>) ] in miliseconds. 907 * */ 908 static int 909 mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag) 910 { 911 912 u32 cntdn, count; 913 u32 int_status; 914 u32 doorbell; 915 916 count = 0; 917 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 918 do { 919 int_status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 920 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 921 mps_dprint(sc, MPS_TRACE, 922 "%s: successful count(%d), timeout(%d)\n", 923 __func__, count, timeout); 924 return 0; 925 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 926 doorbell = mps_regread(sc, MPI2_DOORBELL_OFFSET); 927 if ((doorbell & MPI2_IOC_STATE_MASK) == 928 MPI2_IOC_STATE_FAULT) { 929 mps_dprint(sc, MPS_FAULT, 930 "fault_state(0x%04x)!\n", doorbell); 931 return (EFAULT); 932 } 933 } else if (int_status == 0xFFFFFFFF) 934 goto out; 935 936 /* If it can sleep, sleep for 1 milisecond, else busy loop for 937 * 0.5 milisecond */ 938 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 939 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 940 "mpsdba", hz/1000); 941 else if (sleep_flag == CAN_SLEEP) 942 pause("mpsdba", hz/1000); 943 else 944 DELAY(500); 945 count++; 946 } while (--cntdn); 947 948 out: 949 mps_dprint(sc, MPS_FAULT, "%s: failed due to timeout count(%d), " 950 "int_status(%x)!\n", __func__, count, int_status); 951 return (ETIMEDOUT); 952 953 } 954 955 /* Wait for the chip to signal that the next word in its FIFO can be fetched */ 956 static int 957 mps_wait_db_int(struct mps_softc *sc) 958 { 959 int retry; 960 961 for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) { 962 if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) & 963 MPI2_HIS_IOC2SYS_DB_STATUS) != 0) 964 return (0); 965 DELAY(2000); 966 } 967 return (ETIMEDOUT); 968 } 969 970 /* Step through the synchronous command state machine, i.e. "Doorbell mode" */ 971 static int 972 mps_request_sync(struct mps_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply, 973 int req_sz, int reply_sz, int timeout) 974 { 975 uint32_t *data32; 976 uint16_t *data16; 977 int i, count, ioc_sz, residual; 978 int sleep_flags = CAN_SLEEP; 979 980 if (curthread->td_no_sleeping != 0) 981 sleep_flags = NO_SLEEP; 982 983 /* Step 1 */ 984 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 985 986 /* Step 2 */ 987 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 988 return (EBUSY); 989 990 /* Step 3 991 * Announce that a message is coming through the doorbell. Messages 992 * are pushed at 32bit words, so round up if needed. 993 */ 994 count = (req_sz + 3) / 4; 995 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, 996 (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) | 997 (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT)); 998 999 /* Step 4 */ 1000 if (mps_wait_db_int(sc) || 1001 (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) { 1002 mps_dprint(sc, MPS_FAULT, "Doorbell failed to activate\n"); 1003 return (ENXIO); 1004 } 1005 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1006 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) { 1007 mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed\n"); 1008 return (ENXIO); 1009 } 1010 1011 /* Step 5 */ 1012 /* Clock out the message data synchronously in 32-bit dwords*/ 1013 data32 = (uint32_t *)req; 1014 for (i = 0; i < count; i++) { 1015 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i])); 1016 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) { 1017 mps_dprint(sc, MPS_FAULT, 1018 "Timeout while writing doorbell\n"); 1019 return (ENXIO); 1020 } 1021 } 1022 1023 /* Step 6 */ 1024 /* Clock in the reply in 16-bit words. The total length of the 1025 * message is always in the 4th byte, so clock out the first 2 words 1026 * manually, then loop the rest. 1027 */ 1028 data16 = (uint16_t *)reply; 1029 if (mps_wait_db_int(sc) != 0) { 1030 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 0\n"); 1031 return (ENXIO); 1032 } 1033 data16[0] = 1034 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 1035 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1036 if (mps_wait_db_int(sc) != 0) { 1037 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 1\n"); 1038 return (ENXIO); 1039 } 1040 data16[1] = 1041 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 1042 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1043 1044 /* Number of 32bit words in the message */ 1045 ioc_sz = reply->MsgLength; 1046 1047 /* 1048 * Figure out how many 16bit words to clock in without overrunning. 1049 * The precision loss with dividing reply_sz can safely be 1050 * ignored because the messages can only be multiples of 32bits. 1051 */ 1052 residual = 0; 1053 count = MIN((reply_sz / 4), ioc_sz) * 2; 1054 if (count < ioc_sz * 2) { 1055 residual = ioc_sz * 2 - count; 1056 mps_dprint(sc, MPS_ERROR, "Driver error, throwing away %d " 1057 "residual message words\n", residual); 1058 } 1059 1060 for (i = 2; i < count; i++) { 1061 if (mps_wait_db_int(sc) != 0) { 1062 mps_dprint(sc, MPS_FAULT, 1063 "Timeout reading doorbell %d\n", i); 1064 return (ENXIO); 1065 } 1066 data16[i] = mps_regread(sc, MPI2_DOORBELL_OFFSET) & 1067 MPI2_DOORBELL_DATA_MASK; 1068 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1069 } 1070 1071 /* 1072 * Pull out residual words that won't fit into the provided buffer. 1073 * This keeps the chip from hanging due to a driver programming 1074 * error. 1075 */ 1076 while (residual--) { 1077 if (mps_wait_db_int(sc) != 0) { 1078 mps_dprint(sc, MPS_FAULT, 1079 "Timeout reading doorbell\n"); 1080 return (ENXIO); 1081 } 1082 (void)mps_regread(sc, MPI2_DOORBELL_OFFSET); 1083 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1084 } 1085 1086 /* Step 7 */ 1087 if (mps_wait_db_int(sc) != 0) { 1088 mps_dprint(sc, MPS_FAULT, "Timeout waiting to exit doorbell\n"); 1089 return (ENXIO); 1090 } 1091 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 1092 mps_dprint(sc, MPS_FAULT, "Warning, doorbell still active\n"); 1093 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1094 1095 return (0); 1096 } 1097 1098 static void 1099 mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm) 1100 { 1101 request_descriptor_t rd; 1102 MPS_FUNCTRACE(sc); 1103 mps_dprint(sc, MPS_TRACE, "SMID %u cm %p ccb %p\n", 1104 cm->cm_desc.Default.SMID, cm, cm->cm_ccb); 1105 1106 if (sc->mps_flags & MPS_FLAGS_ATTACH_DONE && !(sc->mps_flags & MPS_FLAGS_SHUTDOWN)) 1107 mtx_assert(&sc->mps_mtx, MA_OWNED); 1108 1109 if (++sc->io_cmds_active > sc->io_cmds_highwater) 1110 sc->io_cmds_highwater++; 1111 rd.u.low = cm->cm_desc.Words.Low; 1112 rd.u.high = cm->cm_desc.Words.High; 1113 rd.word = htole64(rd.word); 1114 1115 KASSERT(cm->cm_state == MPS_CM_STATE_BUSY, ("command not busy\n")); 1116 cm->cm_state = MPS_CM_STATE_INQUEUE; 1117 1118 /* TODO-We may need to make below regwrite atomic */ 1119 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET, 1120 rd.u.low); 1121 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET, 1122 rd.u.high); 1123 } 1124 1125 /* 1126 * Just the FACTS, ma'am. 1127 */ 1128 static int 1129 mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts) 1130 { 1131 MPI2_DEFAULT_REPLY *reply; 1132 MPI2_IOC_FACTS_REQUEST request; 1133 int error, req_sz, reply_sz; 1134 1135 MPS_FUNCTRACE(sc); 1136 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1137 1138 req_sz = sizeof(MPI2_IOC_FACTS_REQUEST); 1139 reply_sz = sizeof(MPI2_IOC_FACTS_REPLY); 1140 reply = (MPI2_DEFAULT_REPLY *)facts; 1141 1142 bzero(&request, req_sz); 1143 request.Function = MPI2_FUNCTION_IOC_FACTS; 1144 error = mps_request_sync(sc, &request, reply, req_sz, reply_sz, 5); 1145 mps_dprint(sc, MPS_INIT, "%s exit error= %d\n", __func__, error); 1146 1147 return (error); 1148 } 1149 1150 static int 1151 mps_send_iocinit(struct mps_softc *sc) 1152 { 1153 MPI2_IOC_INIT_REQUEST init; 1154 MPI2_DEFAULT_REPLY reply; 1155 int req_sz, reply_sz, error; 1156 struct timeval now; 1157 uint64_t time_in_msec; 1158 1159 MPS_FUNCTRACE(sc); 1160 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1161 1162 /* Do a quick sanity check on proper initialization */ 1163 if ((sc->pqdepth == 0) || (sc->fqdepth == 0) || (sc->reqframesz == 0) 1164 || (sc->replyframesz == 0)) { 1165 mps_dprint(sc, MPS_INIT|MPS_ERROR, 1166 "Driver not fully initialized for IOCInit\n"); 1167 return (EINVAL); 1168 } 1169 1170 req_sz = sizeof(MPI2_IOC_INIT_REQUEST); 1171 reply_sz = sizeof(MPI2_IOC_INIT_REPLY); 1172 bzero(&init, req_sz); 1173 bzero(&reply, reply_sz); 1174 1175 /* 1176 * Fill in the init block. Note that most addresses are 1177 * deliberately in the lower 32bits of memory. This is a micro- 1178 * optimzation for PCI/PCIX, though it's not clear if it helps PCIe. 1179 */ 1180 init.Function = MPI2_FUNCTION_IOC_INIT; 1181 init.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 1182 init.MsgVersion = htole16(MPI2_VERSION); 1183 init.HeaderVersion = htole16(MPI2_HEADER_VERSION); 1184 init.SystemRequestFrameSize = htole16((uint16_t)(sc->reqframesz / 4)); 1185 init.ReplyDescriptorPostQueueDepth = htole16(sc->pqdepth); 1186 init.ReplyFreeQueueDepth = htole16(sc->fqdepth); 1187 init.SenseBufferAddressHigh = 0; 1188 init.SystemReplyAddressHigh = 0; 1189 init.SystemRequestFrameBaseAddress.High = 0; 1190 init.SystemRequestFrameBaseAddress.Low = htole32((uint32_t)sc->req_busaddr); 1191 init.ReplyDescriptorPostQueueAddress.High = 0; 1192 init.ReplyDescriptorPostQueueAddress.Low = htole32((uint32_t)sc->post_busaddr); 1193 init.ReplyFreeQueueAddress.High = 0; 1194 init.ReplyFreeQueueAddress.Low = htole32((uint32_t)sc->free_busaddr); 1195 getmicrotime(&now); 1196 time_in_msec = (now.tv_sec * 1000 + now.tv_usec/1000); 1197 init.TimeStamp.High = htole32((time_in_msec >> 32) & 0xFFFFFFFF); 1198 init.TimeStamp.Low = htole32(time_in_msec & 0xFFFFFFFF); 1199 1200 error = mps_request_sync(sc, &init, &reply, req_sz, reply_sz, 5); 1201 if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 1202 error = ENXIO; 1203 1204 mps_dprint(sc, MPS_INIT, "IOCInit status= 0x%x\n", reply.IOCStatus); 1205 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 1206 return (error); 1207 } 1208 1209 void 1210 mps_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1211 { 1212 bus_addr_t *addr; 1213 1214 addr = arg; 1215 *addr = segs[0].ds_addr; 1216 } 1217 1218 void 1219 mps_memaddr_wait_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1220 { 1221 struct mps_busdma_context *ctx; 1222 int need_unload, need_free; 1223 1224 ctx = (struct mps_busdma_context *)arg; 1225 need_unload = 0; 1226 need_free = 0; 1227 1228 mps_lock(ctx->softc); 1229 ctx->error = error; 1230 ctx->completed = 1; 1231 if ((error == 0) && (ctx->abandoned == 0)) { 1232 *ctx->addr = segs[0].ds_addr; 1233 } else { 1234 if (nsegs != 0) 1235 need_unload = 1; 1236 if (ctx->abandoned != 0) 1237 need_free = 1; 1238 } 1239 if (need_free == 0) 1240 wakeup(ctx); 1241 1242 mps_unlock(ctx->softc); 1243 1244 if (need_unload != 0) { 1245 bus_dmamap_unload(ctx->buffer_dmat, 1246 ctx->buffer_dmamap); 1247 *ctx->addr = 0; 1248 } 1249 1250 if (need_free != 0) 1251 free(ctx, M_MPSUSER); 1252 } 1253 1254 static int 1255 mps_alloc_queues(struct mps_softc *sc) 1256 { 1257 struct mps_queue *q; 1258 u_int nq, i; 1259 1260 nq = sc->msi_msgs; 1261 mps_dprint(sc, MPS_INIT|MPS_XINFO, "Allocating %d I/O queues\n", nq); 1262 1263 sc->queues = malloc(sizeof(struct mps_queue) * nq, M_MPT2, 1264 M_NOWAIT|M_ZERO); 1265 if (sc->queues == NULL) 1266 return (ENOMEM); 1267 1268 for (i = 0; i < nq; i++) { 1269 q = &sc->queues[i]; 1270 mps_dprint(sc, MPS_INIT, "Configuring queue %d %p\n", i, q); 1271 q->sc = sc; 1272 q->qnum = i; 1273 } 1274 1275 return (0); 1276 } 1277 1278 static int 1279 mps_alloc_hw_queues(struct mps_softc *sc) 1280 { 1281 bus_dma_template_t t; 1282 bus_addr_t queues_busaddr; 1283 uint8_t *queues; 1284 int qsize, fqsize, pqsize; 1285 1286 /* 1287 * The reply free queue contains 4 byte entries in multiples of 16 and 1288 * aligned on a 16 byte boundary. There must always be an unused entry. 1289 * This queue supplies fresh reply frames for the firmware to use. 1290 * 1291 * The reply descriptor post queue contains 8 byte entries in 1292 * multiples of 16 and aligned on a 16 byte boundary. This queue 1293 * contains filled-in reply frames sent from the firmware to the host. 1294 * 1295 * These two queues are allocated together for simplicity. 1296 */ 1297 sc->fqdepth = roundup2(sc->num_replies + 1, 16); 1298 sc->pqdepth = roundup2(sc->num_replies + 1, 16); 1299 fqsize= sc->fqdepth * 4; 1300 pqsize = sc->pqdepth * 8; 1301 qsize = fqsize + pqsize; 1302 1303 bus_dma_template_init(&t, sc->mps_parent_dmat); 1304 BUS_DMA_TEMPLATE_FILL(&t, BD_ALIGNMENT(16), BD_MAXSIZE(qsize), 1305 BD_MAXSEGSIZE(qsize), BD_NSEGMENTS(1), 1306 BD_LOWADDR(BUS_SPACE_MAXADDR_32BIT)); 1307 if (bus_dma_template_tag(&t, &sc->queues_dmat)) { 1308 mps_dprint(sc, MPS_ERROR, "Cannot allocate queues DMA tag\n"); 1309 return (ENOMEM); 1310 } 1311 if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT, 1312 &sc->queues_map)) { 1313 mps_dprint(sc, MPS_ERROR, "Cannot allocate queues memory\n"); 1314 return (ENOMEM); 1315 } 1316 bzero(queues, qsize); 1317 bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize, 1318 mps_memaddr_cb, &queues_busaddr, 0); 1319 1320 sc->free_queue = (uint32_t *)queues; 1321 sc->free_busaddr = queues_busaddr; 1322 sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize); 1323 sc->post_busaddr = queues_busaddr + fqsize; 1324 mps_dprint(sc, MPS_INIT, "free queue busaddr= %#016jx size= %d\n", 1325 (uintmax_t)sc->free_busaddr, fqsize); 1326 mps_dprint(sc, MPS_INIT, "reply queue busaddr= %#016jx size= %d\n", 1327 (uintmax_t)sc->post_busaddr, pqsize); 1328 1329 return (0); 1330 } 1331 1332 static int 1333 mps_alloc_replies(struct mps_softc *sc) 1334 { 1335 bus_dma_template_t t; 1336 int rsize, num_replies; 1337 1338 /* Store the reply frame size in bytes rather than as 32bit words */ 1339 sc->replyframesz = sc->facts->ReplyFrameSize * 4; 1340 1341 /* 1342 * sc->num_replies should be one less than sc->fqdepth. We need to 1343 * allocate space for sc->fqdepth replies, but only sc->num_replies 1344 * replies can be used at once. 1345 */ 1346 num_replies = max(sc->fqdepth, sc->num_replies); 1347 1348 rsize = sc->replyframesz * num_replies; 1349 bus_dma_template_init(&t, sc->mps_parent_dmat); 1350 BUS_DMA_TEMPLATE_FILL(&t, BD_ALIGNMENT(4), BD_MAXSIZE(rsize), 1351 BD_MAXSEGSIZE(rsize), BD_NSEGMENTS(1), 1352 BD_LOWADDR(BUS_SPACE_MAXADDR_32BIT)); 1353 if (bus_dma_template_tag(&t, &sc->reply_dmat)) { 1354 mps_dprint(sc, MPS_ERROR, "Cannot allocate replies DMA tag\n"); 1355 return (ENOMEM); 1356 } 1357 if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames, 1358 BUS_DMA_NOWAIT, &sc->reply_map)) { 1359 mps_dprint(sc, MPS_ERROR, "Cannot allocate replies memory\n"); 1360 return (ENOMEM); 1361 } 1362 bzero(sc->reply_frames, rsize); 1363 bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize, 1364 mps_memaddr_cb, &sc->reply_busaddr, 0); 1365 1366 mps_dprint(sc, MPS_INIT, "reply frames busaddr= %#016jx size= %d\n", 1367 (uintmax_t)sc->reply_busaddr, rsize); 1368 1369 return (0); 1370 } 1371 1372 static void 1373 mps_load_chains_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1374 { 1375 struct mps_softc *sc = arg; 1376 struct mps_chain *chain; 1377 bus_size_t bo; 1378 int i, o, s; 1379 1380 if (error != 0) 1381 return; 1382 1383 for (i = 0, o = 0, s = 0; s < nsegs; s++) { 1384 for (bo = 0; bo + sc->reqframesz <= segs[s].ds_len; 1385 bo += sc->reqframesz) { 1386 chain = &sc->chains[i++]; 1387 chain->chain =(MPI2_SGE_IO_UNION *)(sc->chain_frames+o); 1388 chain->chain_busaddr = segs[s].ds_addr + bo; 1389 o += sc->reqframesz; 1390 mps_free_chain(sc, chain); 1391 } 1392 if (bo != segs[s].ds_len) 1393 o += segs[s].ds_len - bo; 1394 } 1395 sc->chain_free_lowwater = i; 1396 } 1397 1398 static int 1399 mps_alloc_requests(struct mps_softc *sc) 1400 { 1401 bus_dma_template_t t; 1402 struct mps_command *cm; 1403 int i, rsize, nsegs; 1404 1405 rsize = sc->reqframesz * sc->num_reqs; 1406 bus_dma_template_init(&t, sc->mps_parent_dmat); 1407 BUS_DMA_TEMPLATE_FILL(&t, BD_ALIGNMENT(16), BD_MAXSIZE(rsize), 1408 BD_MAXSEGSIZE(rsize), BD_NSEGMENTS(1), 1409 BD_LOWADDR(BUS_SPACE_MAXADDR_32BIT)); 1410 if (bus_dma_template_tag(&t, &sc->req_dmat)) { 1411 mps_dprint(sc, MPS_ERROR, "Cannot allocate request DMA tag\n"); 1412 return (ENOMEM); 1413 } 1414 if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames, 1415 BUS_DMA_NOWAIT, &sc->req_map)) { 1416 mps_dprint(sc, MPS_ERROR, "Cannot allocate request memory\n"); 1417 return (ENOMEM); 1418 } 1419 bzero(sc->req_frames, rsize); 1420 bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize, 1421 mps_memaddr_cb, &sc->req_busaddr, 0); 1422 mps_dprint(sc, MPS_INIT, "request frames busaddr= %#016jx size= %d\n", 1423 (uintmax_t)sc->req_busaddr, rsize); 1424 1425 sc->chains = malloc(sizeof(struct mps_chain) * sc->num_chains, M_MPT2, 1426 M_NOWAIT | M_ZERO); 1427 if (!sc->chains) { 1428 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain memory\n"); 1429 return (ENOMEM); 1430 } 1431 rsize = sc->reqframesz * sc->num_chains; 1432 bus_dma_template_clone(&t, sc->req_dmat); 1433 BUS_DMA_TEMPLATE_FILL(&t, BD_MAXSIZE(rsize), BD_MAXSEGSIZE(rsize), 1434 BD_NSEGMENTS(howmany(rsize, PAGE_SIZE))); 1435 if (bus_dma_template_tag(&t, &sc->chain_dmat)) { 1436 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain DMA tag\n"); 1437 return (ENOMEM); 1438 } 1439 if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames, 1440 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->chain_map)) { 1441 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain memory\n"); 1442 return (ENOMEM); 1443 } 1444 if (bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, 1445 rsize, mps_load_chains_cb, sc, BUS_DMA_NOWAIT)) { 1446 mps_dprint(sc, MPS_ERROR, "Cannot load chain memory\n"); 1447 bus_dmamem_free(sc->chain_dmat, sc->chain_frames, 1448 sc->chain_map); 1449 return (ENOMEM); 1450 } 1451 1452 rsize = MPS_SENSE_LEN * sc->num_reqs; 1453 bus_dma_template_clone(&t, sc->req_dmat); 1454 BUS_DMA_TEMPLATE_FILL(&t, BD_ALIGNMENT(1), BD_MAXSIZE(rsize), 1455 BD_MAXSEGSIZE(rsize)); 1456 if (bus_dma_template_tag(&t, &sc->sense_dmat)) { 1457 mps_dprint(sc, MPS_ERROR, "Cannot allocate sense DMA tag\n"); 1458 return (ENOMEM); 1459 } 1460 if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames, 1461 BUS_DMA_NOWAIT, &sc->sense_map)) { 1462 mps_dprint(sc, MPS_ERROR, "Cannot allocate sense memory\n"); 1463 return (ENOMEM); 1464 } 1465 bzero(sc->sense_frames, rsize); 1466 bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize, 1467 mps_memaddr_cb, &sc->sense_busaddr, 0); 1468 mps_dprint(sc, MPS_INIT, "sense frames busaddr= %#016jx size= %d\n", 1469 (uintmax_t)sc->sense_busaddr, rsize); 1470 1471 nsegs = (sc->maxio / PAGE_SIZE) + 1; 1472 bus_dma_template_init(&t, sc->mps_parent_dmat); 1473 BUS_DMA_TEMPLATE_FILL(&t, BD_MAXSIZE(BUS_SPACE_MAXSIZE_32BIT), 1474 BD_NSEGMENTS(nsegs), BD_MAXSEGSIZE(BUS_SPACE_MAXSIZE_24BIT), 1475 BD_FLAGS(BUS_DMA_ALLOCNOW), BD_LOCKFUNC(busdma_lock_mutex), 1476 BD_LOCKFUNCARG(&sc->mps_mtx)); 1477 if (bus_dma_template_tag(&t, &sc->buffer_dmat)) { 1478 mps_dprint(sc, MPS_ERROR, "Cannot allocate buffer DMA tag\n"); 1479 return (ENOMEM); 1480 } 1481 1482 /* 1483 * SMID 0 cannot be used as a free command per the firmware spec. 1484 * Just drop that command instead of risking accounting bugs. 1485 */ 1486 sc->commands = malloc(sizeof(struct mps_command) * sc->num_reqs, 1487 M_MPT2, M_WAITOK | M_ZERO); 1488 for (i = 1; i < sc->num_reqs; i++) { 1489 cm = &sc->commands[i]; 1490 cm->cm_req = sc->req_frames + i * sc->reqframesz; 1491 cm->cm_req_busaddr = sc->req_busaddr + i * sc->reqframesz; 1492 cm->cm_sense = &sc->sense_frames[i]; 1493 cm->cm_sense_busaddr = sc->sense_busaddr + i * MPS_SENSE_LEN; 1494 cm->cm_desc.Default.SMID = i; 1495 cm->cm_sc = sc; 1496 cm->cm_state = MPS_CM_STATE_BUSY; 1497 TAILQ_INIT(&cm->cm_chain_list); 1498 callout_init_mtx(&cm->cm_callout, &sc->mps_mtx, 0); 1499 1500 /* XXX Is a failure here a critical problem? */ 1501 if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0) 1502 if (i <= sc->num_prireqs) 1503 mps_free_high_priority_command(sc, cm); 1504 else 1505 mps_free_command(sc, cm); 1506 else { 1507 panic("failed to allocate command %d\n", i); 1508 sc->num_reqs = i; 1509 break; 1510 } 1511 } 1512 1513 return (0); 1514 } 1515 1516 static int 1517 mps_init_queues(struct mps_softc *sc) 1518 { 1519 int i; 1520 1521 memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8); 1522 1523 /* 1524 * According to the spec, we need to use one less reply than we 1525 * have space for on the queue. So sc->num_replies (the number we 1526 * use) should be less than sc->fqdepth (allocated size). 1527 */ 1528 if (sc->num_replies >= sc->fqdepth) 1529 return (EINVAL); 1530 1531 /* 1532 * Initialize all of the free queue entries. 1533 */ 1534 for (i = 0; i < sc->fqdepth; i++) 1535 sc->free_queue[i] = sc->reply_busaddr + (i * sc->replyframesz); 1536 sc->replyfreeindex = sc->num_replies; 1537 1538 return (0); 1539 } 1540 1541 /* Get the driver parameter tunables. Lowest priority are the driver defaults. 1542 * Next are the global settings, if they exist. Highest are the per-unit 1543 * settings, if they exist. 1544 */ 1545 void 1546 mps_get_tunables(struct mps_softc *sc) 1547 { 1548 char tmpstr[80], mps_debug[80]; 1549 1550 /* XXX default to some debugging for now */ 1551 sc->mps_debug = MPS_INFO|MPS_FAULT; 1552 sc->disable_msix = 0; 1553 sc->disable_msi = 0; 1554 sc->max_msix = MPS_MSIX_MAX; 1555 sc->max_chains = MPS_CHAIN_FRAMES; 1556 sc->max_io_pages = MPS_MAXIO_PAGES; 1557 sc->enable_ssu = MPS_SSU_ENABLE_SSD_DISABLE_HDD; 1558 sc->spinup_wait_time = DEFAULT_SPINUP_WAIT; 1559 sc->use_phynum = 1; 1560 sc->max_reqframes = MPS_REQ_FRAMES; 1561 sc->max_prireqframes = MPS_PRI_REQ_FRAMES; 1562 sc->max_replyframes = MPS_REPLY_FRAMES; 1563 sc->max_evtframes = MPS_EVT_REPLY_FRAMES; 1564 1565 /* 1566 * Grab the global variables. 1567 */ 1568 bzero(mps_debug, 80); 1569 if (TUNABLE_STR_FETCH("hw.mps.debug_level", mps_debug, 80) != 0) 1570 mps_parse_debug(sc, mps_debug); 1571 TUNABLE_INT_FETCH("hw.mps.disable_msix", &sc->disable_msix); 1572 TUNABLE_INT_FETCH("hw.mps.disable_msi", &sc->disable_msi); 1573 TUNABLE_INT_FETCH("hw.mps.max_msix", &sc->max_msix); 1574 TUNABLE_INT_FETCH("hw.mps.max_chains", &sc->max_chains); 1575 TUNABLE_INT_FETCH("hw.mps.max_io_pages", &sc->max_io_pages); 1576 TUNABLE_INT_FETCH("hw.mps.enable_ssu", &sc->enable_ssu); 1577 TUNABLE_INT_FETCH("hw.mps.spinup_wait_time", &sc->spinup_wait_time); 1578 TUNABLE_INT_FETCH("hw.mps.use_phy_num", &sc->use_phynum); 1579 TUNABLE_INT_FETCH("hw.mps.max_reqframes", &sc->max_reqframes); 1580 TUNABLE_INT_FETCH("hw.mps.max_prireqframes", &sc->max_prireqframes); 1581 TUNABLE_INT_FETCH("hw.mps.max_replyframes", &sc->max_replyframes); 1582 TUNABLE_INT_FETCH("hw.mps.max_evtframes", &sc->max_evtframes); 1583 1584 /* Grab the unit-instance variables */ 1585 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.debug_level", 1586 device_get_unit(sc->mps_dev)); 1587 bzero(mps_debug, 80); 1588 if (TUNABLE_STR_FETCH(tmpstr, mps_debug, 80) != 0) 1589 mps_parse_debug(sc, mps_debug); 1590 1591 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msix", 1592 device_get_unit(sc->mps_dev)); 1593 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix); 1594 1595 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msi", 1596 device_get_unit(sc->mps_dev)); 1597 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi); 1598 1599 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_msix", 1600 device_get_unit(sc->mps_dev)); 1601 TUNABLE_INT_FETCH(tmpstr, &sc->max_msix); 1602 1603 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_chains", 1604 device_get_unit(sc->mps_dev)); 1605 TUNABLE_INT_FETCH(tmpstr, &sc->max_chains); 1606 1607 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_io_pages", 1608 device_get_unit(sc->mps_dev)); 1609 TUNABLE_INT_FETCH(tmpstr, &sc->max_io_pages); 1610 1611 bzero(sc->exclude_ids, sizeof(sc->exclude_ids)); 1612 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.exclude_ids", 1613 device_get_unit(sc->mps_dev)); 1614 TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids)); 1615 1616 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.enable_ssu", 1617 device_get_unit(sc->mps_dev)); 1618 TUNABLE_INT_FETCH(tmpstr, &sc->enable_ssu); 1619 1620 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.spinup_wait_time", 1621 device_get_unit(sc->mps_dev)); 1622 TUNABLE_INT_FETCH(tmpstr, &sc->spinup_wait_time); 1623 1624 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.use_phy_num", 1625 device_get_unit(sc->mps_dev)); 1626 TUNABLE_INT_FETCH(tmpstr, &sc->use_phynum); 1627 1628 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_reqframes", 1629 device_get_unit(sc->mps_dev)); 1630 TUNABLE_INT_FETCH(tmpstr, &sc->max_reqframes); 1631 1632 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_prireqframes", 1633 device_get_unit(sc->mps_dev)); 1634 TUNABLE_INT_FETCH(tmpstr, &sc->max_prireqframes); 1635 1636 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_replyframes", 1637 device_get_unit(sc->mps_dev)); 1638 TUNABLE_INT_FETCH(tmpstr, &sc->max_replyframes); 1639 1640 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_evtframes", 1641 device_get_unit(sc->mps_dev)); 1642 TUNABLE_INT_FETCH(tmpstr, &sc->max_evtframes); 1643 1644 } 1645 1646 static void 1647 mps_setup_sysctl(struct mps_softc *sc) 1648 { 1649 struct sysctl_ctx_list *sysctl_ctx = NULL; 1650 struct sysctl_oid *sysctl_tree = NULL; 1651 char tmpstr[80], tmpstr2[80]; 1652 1653 /* 1654 * Setup the sysctl variable so the user can change the debug level 1655 * on the fly. 1656 */ 1657 snprintf(tmpstr, sizeof(tmpstr), "MPS controller %d", 1658 device_get_unit(sc->mps_dev)); 1659 snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mps_dev)); 1660 1661 sysctl_ctx = device_get_sysctl_ctx(sc->mps_dev); 1662 if (sysctl_ctx != NULL) 1663 sysctl_tree = device_get_sysctl_tree(sc->mps_dev); 1664 1665 if (sysctl_tree == NULL) { 1666 sysctl_ctx_init(&sc->sysctl_ctx); 1667 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx, 1668 SYSCTL_STATIC_CHILDREN(_hw_mps), OID_AUTO, tmpstr2, 1669 CTLFLAG_RD | CTLFLAG_MPSAFE, 0, tmpstr); 1670 if (sc->sysctl_tree == NULL) 1671 return; 1672 sysctl_ctx = &sc->sysctl_ctx; 1673 sysctl_tree = sc->sysctl_tree; 1674 } 1675 1676 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1677 OID_AUTO, "debug_level", CTLTYPE_STRING | CTLFLAG_RW |CTLFLAG_MPSAFE, 1678 sc, 0, mps_debug_sysctl, "A", "mps debug level"); 1679 1680 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1681 OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0, 1682 "Disable the use of MSI-X interrupts"); 1683 1684 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1685 OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0, 1686 "Disable the use of MSI interrupts"); 1687 1688 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1689 OID_AUTO, "max_msix", CTLFLAG_RD, &sc->max_msix, 0, 1690 "User-defined maximum number of MSIX queues"); 1691 1692 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1693 OID_AUTO, "msix_msgs", CTLFLAG_RD, &sc->msi_msgs, 0, 1694 "Negotiated number of MSIX queues"); 1695 1696 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1697 OID_AUTO, "max_reqframes", CTLFLAG_RD, &sc->max_reqframes, 0, 1698 "Total number of allocated request frames"); 1699 1700 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1701 OID_AUTO, "max_prireqframes", CTLFLAG_RD, &sc->max_prireqframes, 0, 1702 "Total number of allocated high priority request frames"); 1703 1704 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1705 OID_AUTO, "max_replyframes", CTLFLAG_RD, &sc->max_replyframes, 0, 1706 "Total number of allocated reply frames"); 1707 1708 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1709 OID_AUTO, "max_evtframes", CTLFLAG_RD, &sc->max_evtframes, 0, 1710 "Total number of event frames allocated"); 1711 1712 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1713 OID_AUTO, "firmware_version", CTLFLAG_RD, sc->fw_version, 1714 strlen(sc->fw_version), "firmware version"); 1715 1716 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1717 OID_AUTO, "driver_version", CTLFLAG_RD, MPS_DRIVER_VERSION, 1718 strlen(MPS_DRIVER_VERSION), "driver version"); 1719 1720 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1721 OID_AUTO, "msg_version", CTLFLAG_RD, sc->msg_version, 1722 strlen(sc->msg_version), "message interface version"); 1723 1724 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1725 OID_AUTO, "io_cmds_active", CTLFLAG_RD, 1726 &sc->io_cmds_active, 0, "number of currently active commands"); 1727 1728 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1729 OID_AUTO, "io_cmds_highwater", CTLFLAG_RD, 1730 &sc->io_cmds_highwater, 0, "maximum active commands seen"); 1731 1732 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1733 OID_AUTO, "chain_free", CTLFLAG_RD, 1734 &sc->chain_free, 0, "number of free chain elements"); 1735 1736 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1737 OID_AUTO, "chain_free_lowwater", CTLFLAG_RD, 1738 &sc->chain_free_lowwater, 0,"lowest number of free chain elements"); 1739 1740 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1741 OID_AUTO, "max_chains", CTLFLAG_RD, 1742 &sc->max_chains, 0,"maximum chain frames that will be allocated"); 1743 1744 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1745 OID_AUTO, "max_io_pages", CTLFLAG_RD, 1746 &sc->max_io_pages, 0,"maximum pages to allow per I/O (if <1 use " 1747 "IOCFacts)"); 1748 1749 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1750 OID_AUTO, "enable_ssu", CTLFLAG_RW, &sc->enable_ssu, 0, 1751 "enable SSU to SATA SSD/HDD at shutdown"); 1752 1753 SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1754 OID_AUTO, "chain_alloc_fail", CTLFLAG_RD, 1755 &sc->chain_alloc_fail, "chain allocation failures"); 1756 1757 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1758 OID_AUTO, "spinup_wait_time", CTLFLAG_RD, 1759 &sc->spinup_wait_time, DEFAULT_SPINUP_WAIT, "seconds to wait for " 1760 "spinup after SATA ID error"); 1761 1762 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1763 OID_AUTO, "mapping_table_dump", 1764 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0, 1765 mps_mapping_dump, "A", "Mapping Table Dump"); 1766 1767 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1768 OID_AUTO, "encl_table_dump", 1769 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0, 1770 mps_mapping_encl_dump, "A", "Enclosure Table Dump"); 1771 1772 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1773 OID_AUTO, "dump_reqs", 1774 CTLTYPE_OPAQUE | CTLFLAG_RD | CTLFLAG_SKIP | CTLFLAG_NEEDGIANT, 1775 sc, 0, mps_dump_reqs, "I", "Dump Active Requests"); 1776 1777 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1778 OID_AUTO, "use_phy_num", CTLFLAG_RD, &sc->use_phynum, 0, 1779 "Use the phy number for enumeration"); 1780 } 1781 1782 static struct mps_debug_string { 1783 char *name; 1784 int flag; 1785 } mps_debug_strings[] = { 1786 {"info", MPS_INFO}, 1787 {"fault", MPS_FAULT}, 1788 {"event", MPS_EVENT}, 1789 {"log", MPS_LOG}, 1790 {"recovery", MPS_RECOVERY}, 1791 {"error", MPS_ERROR}, 1792 {"init", MPS_INIT}, 1793 {"xinfo", MPS_XINFO}, 1794 {"user", MPS_USER}, 1795 {"mapping", MPS_MAPPING}, 1796 {"trace", MPS_TRACE} 1797 }; 1798 1799 enum mps_debug_level_combiner { 1800 COMB_NONE, 1801 COMB_ADD, 1802 COMB_SUB 1803 }; 1804 1805 static int 1806 mps_debug_sysctl(SYSCTL_HANDLER_ARGS) 1807 { 1808 struct mps_softc *sc; 1809 struct mps_debug_string *string; 1810 struct sbuf *sbuf; 1811 char *buffer; 1812 size_t sz; 1813 int i, len, debug, error; 1814 1815 sc = (struct mps_softc *)arg1; 1816 1817 error = sysctl_wire_old_buffer(req, 0); 1818 if (error != 0) 1819 return (error); 1820 1821 sbuf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 1822 debug = sc->mps_debug; 1823 1824 sbuf_printf(sbuf, "%#x", debug); 1825 1826 sz = sizeof(mps_debug_strings) / sizeof(mps_debug_strings[0]); 1827 for (i = 0; i < sz; i++) { 1828 string = &mps_debug_strings[i]; 1829 if (debug & string->flag) 1830 sbuf_printf(sbuf, ",%s", string->name); 1831 } 1832 1833 error = sbuf_finish(sbuf); 1834 sbuf_delete(sbuf); 1835 1836 if (error || req->newptr == NULL) 1837 return (error); 1838 1839 len = req->newlen - req->newidx; 1840 if (len == 0) 1841 return (0); 1842 1843 buffer = malloc(len, M_MPT2, M_ZERO|M_WAITOK); 1844 error = SYSCTL_IN(req, buffer, len); 1845 1846 mps_parse_debug(sc, buffer); 1847 1848 free(buffer, M_MPT2); 1849 return (error); 1850 } 1851 1852 static void 1853 mps_parse_debug(struct mps_softc *sc, char *list) 1854 { 1855 struct mps_debug_string *string; 1856 enum mps_debug_level_combiner op; 1857 char *token, *endtoken; 1858 size_t sz; 1859 int flags, i; 1860 1861 if (list == NULL || *list == '\0') 1862 return; 1863 1864 if (*list == '+') { 1865 op = COMB_ADD; 1866 list++; 1867 } else if (*list == '-') { 1868 op = COMB_SUB; 1869 list++; 1870 } else 1871 op = COMB_NONE; 1872 if (*list == '\0') 1873 return; 1874 1875 flags = 0; 1876 sz = sizeof(mps_debug_strings) / sizeof(mps_debug_strings[0]); 1877 while ((token = strsep(&list, ":,")) != NULL) { 1878 /* Handle integer flags */ 1879 flags |= strtol(token, &endtoken, 0); 1880 if (token != endtoken) 1881 continue; 1882 1883 /* Handle text flags */ 1884 for (i = 0; i < sz; i++) { 1885 string = &mps_debug_strings[i]; 1886 if (strcasecmp(token, string->name) == 0) { 1887 flags |= string->flag; 1888 break; 1889 } 1890 } 1891 } 1892 1893 switch (op) { 1894 case COMB_NONE: 1895 sc->mps_debug = flags; 1896 break; 1897 case COMB_ADD: 1898 sc->mps_debug |= flags; 1899 break; 1900 case COMB_SUB: 1901 sc->mps_debug &= (~flags); 1902 break; 1903 } 1904 1905 return; 1906 } 1907 1908 struct mps_dumpreq_hdr { 1909 uint32_t smid; 1910 uint32_t state; 1911 uint32_t numframes; 1912 uint32_t deschi; 1913 uint32_t desclo; 1914 }; 1915 1916 static int 1917 mps_dump_reqs(SYSCTL_HANDLER_ARGS) 1918 { 1919 struct mps_softc *sc; 1920 struct mps_chain *chain, *chain1; 1921 struct mps_command *cm; 1922 struct mps_dumpreq_hdr hdr; 1923 struct sbuf *sb; 1924 uint32_t smid, state; 1925 int i, numreqs, error = 0; 1926 1927 sc = (struct mps_softc *)arg1; 1928 1929 if ((error = priv_check(curthread, PRIV_DRIVER)) != 0) { 1930 printf("priv check error %d\n", error); 1931 return (error); 1932 } 1933 1934 state = MPS_CM_STATE_INQUEUE; 1935 smid = 1; 1936 numreqs = sc->num_reqs; 1937 1938 if (req->newptr != NULL) 1939 return (EINVAL); 1940 1941 if (smid == 0 || smid > sc->num_reqs) 1942 return (EINVAL); 1943 if (numreqs <= 0 || (numreqs + smid > sc->num_reqs)) 1944 numreqs = sc->num_reqs; 1945 sb = sbuf_new_for_sysctl(NULL, NULL, 4096, req); 1946 1947 /* Best effort, no locking */ 1948 for (i = smid; i < numreqs; i++) { 1949 cm = &sc->commands[i]; 1950 if (cm->cm_state != state) 1951 continue; 1952 hdr.smid = i; 1953 hdr.state = cm->cm_state; 1954 hdr.numframes = 1; 1955 hdr.deschi = cm->cm_desc.Words.High; 1956 hdr.desclo = cm->cm_desc.Words.Low; 1957 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, 1958 chain1) 1959 hdr.numframes++; 1960 sbuf_bcat(sb, &hdr, sizeof(hdr)); 1961 sbuf_bcat(sb, cm->cm_req, 128); 1962 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, 1963 chain1) 1964 sbuf_bcat(sb, chain->chain, 128); 1965 } 1966 1967 error = sbuf_finish(sb); 1968 sbuf_delete(sb); 1969 return (error); 1970 } 1971 1972 int 1973 mps_attach(struct mps_softc *sc) 1974 { 1975 int error; 1976 1977 MPS_FUNCTRACE(sc); 1978 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1979 1980 mtx_init(&sc->mps_mtx, "MPT2SAS lock", NULL, MTX_DEF); 1981 callout_init_mtx(&sc->periodic, &sc->mps_mtx, 0); 1982 callout_init_mtx(&sc->device_check_callout, &sc->mps_mtx, 0); 1983 TAILQ_INIT(&sc->event_list); 1984 timevalclear(&sc->lastfail); 1985 1986 if ((error = mps_transition_ready(sc)) != 0) { 1987 mps_dprint(sc, MPS_INIT|MPS_FAULT, "failed to transition " 1988 "ready\n"); 1989 return (error); 1990 } 1991 1992 sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPT2, 1993 M_ZERO|M_NOWAIT); 1994 if(!sc->facts) { 1995 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Cannot allocate memory, " 1996 "exit\n"); 1997 return (ENOMEM); 1998 } 1999 2000 /* 2001 * Get IOC Facts and allocate all structures based on this information. 2002 * A Diag Reset will also call mps_iocfacts_allocate and re-read the IOC 2003 * Facts. If relevant values have changed in IOC Facts, this function 2004 * will free all of the memory based on IOC Facts and reallocate that 2005 * memory. If this fails, any allocated memory should already be freed. 2006 */ 2007 if ((error = mps_iocfacts_allocate(sc, TRUE)) != 0) { 2008 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC Facts based allocation " 2009 "failed with error %d, exit\n", error); 2010 return (error); 2011 } 2012 2013 /* Start the periodic watchdog check on the IOC Doorbell */ 2014 mps_periodic(sc); 2015 2016 /* 2017 * The portenable will kick off discovery events that will drive the 2018 * rest of the initialization process. The CAM/SAS module will 2019 * hold up the boot sequence until discovery is complete. 2020 */ 2021 sc->mps_ich.ich_func = mps_startup; 2022 sc->mps_ich.ich_arg = sc; 2023 if (config_intrhook_establish(&sc->mps_ich) != 0) { 2024 mps_dprint(sc, MPS_INIT|MPS_ERROR, 2025 "Cannot establish MPS config hook\n"); 2026 error = EINVAL; 2027 } 2028 2029 /* 2030 * Allow IR to shutdown gracefully when shutdown occurs. 2031 */ 2032 sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final, 2033 mpssas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT); 2034 2035 if (sc->shutdown_eh == NULL) 2036 mps_dprint(sc, MPS_INIT|MPS_ERROR, 2037 "shutdown event registration failed\n"); 2038 2039 mps_setup_sysctl(sc); 2040 2041 sc->mps_flags |= MPS_FLAGS_ATTACH_DONE; 2042 mps_dprint(sc, MPS_INIT, "%s exit error= %d\n", __func__, error); 2043 2044 return (error); 2045 } 2046 2047 /* Run through any late-start handlers. */ 2048 static void 2049 mps_startup(void *arg) 2050 { 2051 struct mps_softc *sc; 2052 2053 sc = (struct mps_softc *)arg; 2054 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 2055 2056 mps_lock(sc); 2057 mps_unmask_intr(sc); 2058 2059 /* initialize device mapping tables */ 2060 mps_base_static_config_pages(sc); 2061 mps_mapping_initialize(sc); 2062 mpssas_startup(sc); 2063 mps_unlock(sc); 2064 2065 mps_dprint(sc, MPS_INIT, "disestablish config intrhook\n"); 2066 config_intrhook_disestablish(&sc->mps_ich); 2067 sc->mps_ich.ich_arg = NULL; 2068 2069 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 2070 } 2071 2072 /* Periodic watchdog. Is called with the driver lock already held. */ 2073 static void 2074 mps_periodic(void *arg) 2075 { 2076 struct mps_softc *sc; 2077 uint32_t db; 2078 2079 sc = (struct mps_softc *)arg; 2080 if (sc->mps_flags & MPS_FLAGS_SHUTDOWN) 2081 return; 2082 2083 db = mps_regread(sc, MPI2_DOORBELL_OFFSET); 2084 if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 2085 mps_dprint(sc, MPS_FAULT, "IOC Fault 0x%08x, Resetting\n", db); 2086 mps_reinit(sc); 2087 } 2088 2089 callout_reset(&sc->periodic, MPS_PERIODIC_DELAY * hz, mps_periodic, sc); 2090 } 2091 2092 static void 2093 mps_log_evt_handler(struct mps_softc *sc, uintptr_t data, 2094 MPI2_EVENT_NOTIFICATION_REPLY *event) 2095 { 2096 MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry; 2097 2098 MPS_DPRINT_EVENT(sc, generic, event); 2099 2100 switch (event->Event) { 2101 case MPI2_EVENT_LOG_DATA: 2102 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_DATA:\n"); 2103 if (sc->mps_debug & MPS_EVENT) 2104 hexdump(event->EventData, event->EventDataLength, NULL, 0); 2105 break; 2106 case MPI2_EVENT_LOG_ENTRY_ADDED: 2107 entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData; 2108 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_ENTRY_ADDED event " 2109 "0x%x Sequence %d:\n", entry->LogEntryQualifier, 2110 entry->LogSequence); 2111 break; 2112 default: 2113 break; 2114 } 2115 return; 2116 } 2117 2118 static int 2119 mps_attach_log(struct mps_softc *sc) 2120 { 2121 u32 events[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 2122 2123 bzero(events, 16); 2124 setbit(events, MPI2_EVENT_LOG_DATA); 2125 setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED); 2126 2127 mps_register_events(sc, events, mps_log_evt_handler, NULL, 2128 &sc->mps_log_eh); 2129 2130 return (0); 2131 } 2132 2133 static int 2134 mps_detach_log(struct mps_softc *sc) 2135 { 2136 2137 if (sc->mps_log_eh != NULL) 2138 mps_deregister_events(sc, sc->mps_log_eh); 2139 return (0); 2140 } 2141 2142 /* 2143 * Free all of the driver resources and detach submodules. Should be called 2144 * without the lock held. 2145 */ 2146 int 2147 mps_free(struct mps_softc *sc) 2148 { 2149 int error; 2150 2151 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 2152 /* Turn off the watchdog */ 2153 mps_lock(sc); 2154 sc->mps_flags |= MPS_FLAGS_SHUTDOWN; 2155 mps_unlock(sc); 2156 /* Lock must not be held for this */ 2157 callout_drain(&sc->periodic); 2158 callout_drain(&sc->device_check_callout); 2159 2160 if (((error = mps_detach_log(sc)) != 0) || 2161 ((error = mps_detach_sas(sc)) != 0)) { 2162 mps_dprint(sc, MPS_INIT|MPS_FAULT, "failed to detach " 2163 "subsystems, exit\n"); 2164 return (error); 2165 } 2166 2167 mps_detach_user(sc); 2168 2169 /* Put the IOC back in the READY state. */ 2170 mps_lock(sc); 2171 if ((error = mps_transition_ready(sc)) != 0) { 2172 mps_unlock(sc); 2173 return (error); 2174 } 2175 mps_unlock(sc); 2176 2177 if (sc->facts != NULL) 2178 free(sc->facts, M_MPT2); 2179 2180 /* 2181 * Free all buffers that are based on IOC Facts. A Diag Reset may need 2182 * to free these buffers too. 2183 */ 2184 mps_iocfacts_free(sc); 2185 2186 if (sc->sysctl_tree != NULL) 2187 sysctl_ctx_free(&sc->sysctl_ctx); 2188 2189 /* Deregister the shutdown function */ 2190 if (sc->shutdown_eh != NULL) 2191 EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh); 2192 2193 mtx_destroy(&sc->mps_mtx); 2194 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 2195 2196 return (0); 2197 } 2198 2199 static __inline void 2200 mps_complete_command(struct mps_softc *sc, struct mps_command *cm) 2201 { 2202 MPS_FUNCTRACE(sc); 2203 2204 if (cm == NULL) { 2205 mps_dprint(sc, MPS_ERROR, "Completing NULL command\n"); 2206 return; 2207 } 2208 2209 if (cm->cm_flags & MPS_CM_FLAGS_POLLED) 2210 cm->cm_flags |= MPS_CM_FLAGS_COMPLETE; 2211 2212 if (cm->cm_complete != NULL) { 2213 mps_dprint(sc, MPS_TRACE, 2214 "%s cm %p calling cm_complete %p data %p reply %p\n", 2215 __func__, cm, cm->cm_complete, cm->cm_complete_data, 2216 cm->cm_reply); 2217 cm->cm_complete(sc, cm); 2218 } 2219 2220 if (cm->cm_flags & MPS_CM_FLAGS_WAKEUP) { 2221 mps_dprint(sc, MPS_TRACE, "waking up %p\n", cm); 2222 wakeup(cm); 2223 } 2224 2225 if (cm->cm_sc->io_cmds_active != 0) { 2226 cm->cm_sc->io_cmds_active--; 2227 } else { 2228 mps_dprint(sc, MPS_ERROR, "Warning: io_cmds_active is " 2229 "out of sync - resynching to 0\n"); 2230 } 2231 } 2232 2233 static void 2234 mps_sas_log_info(struct mps_softc *sc , u32 log_info) 2235 { 2236 union loginfo_type { 2237 u32 loginfo; 2238 struct { 2239 u32 subcode:16; 2240 u32 code:8; 2241 u32 originator:4; 2242 u32 bus_type:4; 2243 } dw; 2244 }; 2245 union loginfo_type sas_loginfo; 2246 char *originator_str = NULL; 2247 2248 sas_loginfo.loginfo = log_info; 2249 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 2250 return; 2251 2252 /* each nexus loss loginfo */ 2253 if (log_info == 0x31170000) 2254 return; 2255 2256 /* eat the loginfos associated with task aborts */ 2257 if ((log_info == 30050000 || log_info == 2258 0x31140000 || log_info == 0x31130000)) 2259 return; 2260 2261 switch (sas_loginfo.dw.originator) { 2262 case 0: 2263 originator_str = "IOP"; 2264 break; 2265 case 1: 2266 originator_str = "PL"; 2267 break; 2268 case 2: 2269 originator_str = "IR"; 2270 break; 2271 } 2272 2273 mps_dprint(sc, MPS_LOG, "log_info(0x%08x): originator(%s), " 2274 "code(0x%02x), sub_code(0x%04x)\n", log_info, 2275 originator_str, sas_loginfo.dw.code, 2276 sas_loginfo.dw.subcode); 2277 } 2278 2279 static void 2280 mps_display_reply_info(struct mps_softc *sc, uint8_t *reply) 2281 { 2282 MPI2DefaultReply_t *mpi_reply; 2283 u16 sc_status; 2284 2285 mpi_reply = (MPI2DefaultReply_t*)reply; 2286 sc_status = le16toh(mpi_reply->IOCStatus); 2287 if (sc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 2288 mps_sas_log_info(sc, le32toh(mpi_reply->IOCLogInfo)); 2289 } 2290 void 2291 mps_intr(void *data) 2292 { 2293 struct mps_softc *sc; 2294 uint32_t status; 2295 2296 sc = (struct mps_softc *)data; 2297 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2298 2299 /* 2300 * Check interrupt status register to flush the bus. This is 2301 * needed for both INTx interrupts and driver-driven polling 2302 */ 2303 status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 2304 if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0) 2305 return; 2306 2307 mps_lock(sc); 2308 mps_intr_locked(data); 2309 mps_unlock(sc); 2310 return; 2311 } 2312 2313 /* 2314 * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the 2315 * chip. Hopefully this theory is correct. 2316 */ 2317 void 2318 mps_intr_msi(void *data) 2319 { 2320 struct mps_softc *sc; 2321 2322 sc = (struct mps_softc *)data; 2323 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2324 mps_lock(sc); 2325 mps_intr_locked(data); 2326 mps_unlock(sc); 2327 return; 2328 } 2329 2330 /* 2331 * The locking is overly broad and simplistic, but easy to deal with for now. 2332 */ 2333 void 2334 mps_intr_locked(void *data) 2335 { 2336 MPI2_REPLY_DESCRIPTORS_UNION *desc; 2337 MPI2_DIAG_RELEASE_REPLY *rel_rep; 2338 mps_fw_diagnostic_buffer_t *pBuffer; 2339 struct mps_softc *sc; 2340 struct mps_command *cm = NULL; 2341 uint64_t tdesc; 2342 uint8_t flags; 2343 u_int pq; 2344 2345 sc = (struct mps_softc *)data; 2346 2347 pq = sc->replypostindex; 2348 mps_dprint(sc, MPS_TRACE, 2349 "%s sc %p starting with replypostindex %u\n", 2350 __func__, sc, sc->replypostindex); 2351 2352 for ( ;; ) { 2353 cm = NULL; 2354 desc = &sc->post_queue[sc->replypostindex]; 2355 2356 /* 2357 * Copy and clear out the descriptor so that any reentry will 2358 * immediately know that this descriptor has already been 2359 * looked at. There is unfortunate casting magic because the 2360 * MPI API doesn't have a cardinal 64bit type. 2361 */ 2362 tdesc = 0xffffffffffffffff; 2363 tdesc = atomic_swap_64((uint64_t *)desc, tdesc); 2364 desc = (MPI2_REPLY_DESCRIPTORS_UNION *)&tdesc; 2365 2366 flags = desc->Default.ReplyFlags & 2367 MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 2368 if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 2369 || (le32toh(desc->Words.High) == 0xffffffff)) 2370 break; 2371 2372 /* increment the replypostindex now, so that event handlers 2373 * and cm completion handlers which decide to do a diag 2374 * reset can zero it without it getting incremented again 2375 * afterwards, and we break out of this loop on the next 2376 * iteration since the reply post queue has been cleared to 2377 * 0xFF and all descriptors look unused (which they are). 2378 */ 2379 if (++sc->replypostindex >= sc->pqdepth) 2380 sc->replypostindex = 0; 2381 2382 switch (flags) { 2383 case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS: 2384 cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)]; 2385 KASSERT(cm->cm_state == MPS_CM_STATE_INQUEUE, 2386 ("command not inqueue\n")); 2387 cm->cm_state = MPS_CM_STATE_BUSY; 2388 cm->cm_reply = NULL; 2389 break; 2390 case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY: 2391 { 2392 uint32_t baddr; 2393 uint8_t *reply; 2394 2395 /* 2396 * Re-compose the reply address from the address 2397 * sent back from the chip. The ReplyFrameAddress 2398 * is the lower 32 bits of the physical address of 2399 * particular reply frame. Convert that address to 2400 * host format, and then use that to provide the 2401 * offset against the virtual address base 2402 * (sc->reply_frames). 2403 */ 2404 baddr = le32toh(desc->AddressReply.ReplyFrameAddress); 2405 reply = sc->reply_frames + 2406 (baddr - ((uint32_t)sc->reply_busaddr)); 2407 /* 2408 * Make sure the reply we got back is in a valid 2409 * range. If not, go ahead and panic here, since 2410 * we'll probably panic as soon as we deference the 2411 * reply pointer anyway. 2412 */ 2413 if ((reply < sc->reply_frames) 2414 || (reply > (sc->reply_frames + 2415 (sc->fqdepth * sc->replyframesz)))) { 2416 printf("%s: WARNING: reply %p out of range!\n", 2417 __func__, reply); 2418 printf("%s: reply_frames %p, fqdepth %d, " 2419 "frame size %d\n", __func__, 2420 sc->reply_frames, sc->fqdepth, 2421 sc->replyframesz); 2422 printf("%s: baddr %#x,\n", __func__, baddr); 2423 /* LSI-TODO. See Linux Code for Graceful exit */ 2424 panic("Reply address out of range"); 2425 } 2426 if (le16toh(desc->AddressReply.SMID) == 0) { 2427 if (((MPI2_DEFAULT_REPLY *)reply)->Function == 2428 MPI2_FUNCTION_DIAG_BUFFER_POST) { 2429 /* 2430 * If SMID is 0 for Diag Buffer Post, 2431 * this implies that the reply is due to 2432 * a release function with a status that 2433 * the buffer has been released. Set 2434 * the buffer flags accordingly. 2435 */ 2436 rel_rep = 2437 (MPI2_DIAG_RELEASE_REPLY *)reply; 2438 if ((le16toh(rel_rep->IOCStatus) & 2439 MPI2_IOCSTATUS_MASK) == 2440 MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED) 2441 { 2442 pBuffer = 2443 &sc->fw_diag_buffer_list[ 2444 rel_rep->BufferType]; 2445 pBuffer->valid_data = TRUE; 2446 pBuffer->owned_by_firmware = 2447 FALSE; 2448 pBuffer->immediate = FALSE; 2449 } 2450 } else 2451 mps_dispatch_event(sc, baddr, 2452 (MPI2_EVENT_NOTIFICATION_REPLY *) 2453 reply); 2454 } else { 2455 /* 2456 * Ignore commands not in INQUEUE state 2457 * since they've already been completed 2458 * via another path. 2459 */ 2460 cm = &sc->commands[ 2461 le16toh(desc->AddressReply.SMID)]; 2462 if (cm->cm_state == MPS_CM_STATE_INQUEUE) { 2463 cm->cm_state = MPS_CM_STATE_BUSY; 2464 cm->cm_reply = reply; 2465 cm->cm_reply_data = le32toh( 2466 desc->AddressReply.ReplyFrameAddress); 2467 } else { 2468 mps_dprint(sc, MPS_RECOVERY, 2469 "Bad state for ADDRESS_REPLY status," 2470 " ignoring state %d cm %p\n", 2471 cm->cm_state, cm); 2472 } 2473 } 2474 break; 2475 } 2476 case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS: 2477 case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER: 2478 case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS: 2479 default: 2480 /* Unhandled */ 2481 mps_dprint(sc, MPS_ERROR, "Unhandled reply 0x%x\n", 2482 desc->Default.ReplyFlags); 2483 cm = NULL; 2484 break; 2485 } 2486 2487 2488 if (cm != NULL) { 2489 // Print Error reply frame 2490 if (cm->cm_reply) 2491 mps_display_reply_info(sc,cm->cm_reply); 2492 mps_complete_command(sc, cm); 2493 } 2494 } 2495 2496 if (pq != sc->replypostindex) { 2497 mps_dprint(sc, MPS_TRACE, "%s sc %p writing postindex %d\n", 2498 __func__, sc, sc->replypostindex); 2499 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 2500 sc->replypostindex); 2501 } 2502 2503 return; 2504 } 2505 2506 static void 2507 mps_dispatch_event(struct mps_softc *sc, uintptr_t data, 2508 MPI2_EVENT_NOTIFICATION_REPLY *reply) 2509 { 2510 struct mps_event_handle *eh; 2511 int event, handled = 0; 2512 2513 event = le16toh(reply->Event); 2514 TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2515 if (isset(eh->mask, event)) { 2516 eh->callback(sc, data, reply); 2517 handled++; 2518 } 2519 } 2520 2521 if (handled == 0) 2522 mps_dprint(sc, MPS_EVENT, "Unhandled event 0x%x\n", le16toh(event)); 2523 2524 /* 2525 * This is the only place that the event/reply should be freed. 2526 * Anything wanting to hold onto the event data should have 2527 * already copied it into their own storage. 2528 */ 2529 mps_free_reply(sc, data); 2530 } 2531 2532 static void 2533 mps_reregister_events_complete(struct mps_softc *sc, struct mps_command *cm) 2534 { 2535 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2536 2537 if (cm->cm_reply) 2538 MPS_DPRINT_EVENT(sc, generic, 2539 (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply); 2540 2541 mps_free_command(sc, cm); 2542 2543 /* next, send a port enable */ 2544 mpssas_startup(sc); 2545 } 2546 2547 /* 2548 * For both register_events and update_events, the caller supplies a bitmap 2549 * of events that it _wants_. These functions then turn that into a bitmask 2550 * suitable for the controller. 2551 */ 2552 int 2553 mps_register_events(struct mps_softc *sc, u32 *mask, 2554 mps_evt_callback_t *cb, void *data, struct mps_event_handle **handle) 2555 { 2556 struct mps_event_handle *eh; 2557 int error = 0; 2558 2559 eh = malloc(sizeof(struct mps_event_handle), M_MPT2, M_WAITOK|M_ZERO); 2560 eh->callback = cb; 2561 eh->data = data; 2562 TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list); 2563 if (mask != NULL) 2564 error = mps_update_events(sc, eh, mask); 2565 *handle = eh; 2566 2567 return (error); 2568 } 2569 2570 int 2571 mps_update_events(struct mps_softc *sc, struct mps_event_handle *handle, 2572 u32 *mask) 2573 { 2574 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2575 MPI2_EVENT_NOTIFICATION_REPLY *reply = NULL; 2576 struct mps_command *cm; 2577 int error, i; 2578 2579 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2580 2581 if ((mask != NULL) && (handle != NULL)) 2582 bcopy(mask, &handle->mask[0], sizeof(u32) * 2583 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2584 2585 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2586 sc->event_mask[i] = -1; 2587 2588 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2589 sc->event_mask[i] &= ~handle->mask[i]; 2590 2591 if ((cm = mps_alloc_command(sc)) == NULL) 2592 return (EBUSY); 2593 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2594 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2595 evtreq->MsgFlags = 0; 2596 evtreq->SASBroadcastPrimitiveMasks = 0; 2597 #ifdef MPS_DEBUG_ALL_EVENTS 2598 { 2599 u_char fullmask[16]; 2600 memset(fullmask, 0x00, 16); 2601 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) * 2602 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2603 } 2604 #else 2605 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2606 evtreq->EventMasks[i] = 2607 htole32(sc->event_mask[i]); 2608 #endif 2609 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2610 cm->cm_data = NULL; 2611 2612 error = mps_wait_command(sc, &cm, 60, 0); 2613 if (cm != NULL) 2614 reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply; 2615 if ((reply == NULL) || 2616 (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 2617 error = ENXIO; 2618 2619 if (reply) 2620 MPS_DPRINT_EVENT(sc, generic, reply); 2621 2622 mps_dprint(sc, MPS_TRACE, "%s finished error %d\n", __func__, error); 2623 2624 if (cm != NULL) 2625 mps_free_command(sc, cm); 2626 return (error); 2627 } 2628 2629 static int 2630 mps_reregister_events(struct mps_softc *sc) 2631 { 2632 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2633 struct mps_command *cm; 2634 struct mps_event_handle *eh; 2635 int error, i; 2636 2637 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2638 2639 /* first, reregister events */ 2640 2641 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2642 sc->event_mask[i] = -1; 2643 2644 TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2645 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2646 sc->event_mask[i] &= ~eh->mask[i]; 2647 } 2648 2649 if ((cm = mps_alloc_command(sc)) == NULL) 2650 return (EBUSY); 2651 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2652 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2653 evtreq->MsgFlags = 0; 2654 evtreq->SASBroadcastPrimitiveMasks = 0; 2655 #ifdef MPS_DEBUG_ALL_EVENTS 2656 { 2657 u_char fullmask[16]; 2658 memset(fullmask, 0x00, 16); 2659 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) * 2660 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2661 } 2662 #else 2663 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2664 evtreq->EventMasks[i] = 2665 htole32(sc->event_mask[i]); 2666 #endif 2667 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2668 cm->cm_data = NULL; 2669 cm->cm_complete = mps_reregister_events_complete; 2670 2671 error = mps_map_command(sc, cm); 2672 2673 mps_dprint(sc, MPS_TRACE, "%s finished with error %d\n", __func__, 2674 error); 2675 return (error); 2676 } 2677 2678 void 2679 mps_deregister_events(struct mps_softc *sc, struct mps_event_handle *handle) 2680 { 2681 2682 TAILQ_REMOVE(&sc->event_list, handle, eh_list); 2683 free(handle, M_MPT2); 2684 } 2685 2686 /* 2687 * Add a chain element as the next SGE for the specified command. 2688 * Reset cm_sge and cm_sgesize to indicate all the available space. 2689 */ 2690 static int 2691 mps_add_chain(struct mps_command *cm) 2692 { 2693 MPI2_SGE_CHAIN32 *sgc; 2694 struct mps_chain *chain; 2695 u_int space; 2696 2697 if (cm->cm_sglsize < MPS_SGC_SIZE) 2698 panic("MPS: Need SGE Error Code\n"); 2699 2700 chain = mps_alloc_chain(cm->cm_sc); 2701 if (chain == NULL) 2702 return (ENOBUFS); 2703 2704 space = cm->cm_sc->reqframesz; 2705 2706 /* 2707 * Note: a double-linked list is used to make it easier to 2708 * walk for debugging. 2709 */ 2710 TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link); 2711 2712 sgc = (MPI2_SGE_CHAIN32 *)&cm->cm_sge->MpiChain; 2713 sgc->Length = htole16(space); 2714 sgc->NextChainOffset = 0; 2715 /* TODO Looks like bug in Setting sgc->Flags. 2716 * sgc->Flags = ( MPI2_SGE_FLAGS_CHAIN_ELEMENT | MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 2717 * MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT 2718 * This is fine.. because we are not using simple element. In case of 2719 * MPI2_SGE_CHAIN32, we have separate Length and Flags feild. 2720 */ 2721 sgc->Flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT; 2722 sgc->Address = htole32(chain->chain_busaddr); 2723 2724 cm->cm_sge = (MPI2_SGE_IO_UNION *)&chain->chain->MpiSimple; 2725 cm->cm_sglsize = space; 2726 return (0); 2727 } 2728 2729 /* 2730 * Add one scatter-gather element (chain, simple, transaction context) 2731 * to the scatter-gather list for a command. Maintain cm_sglsize and 2732 * cm_sge as the remaining size and pointer to the next SGE to fill 2733 * in, respectively. 2734 */ 2735 int 2736 mps_push_sge(struct mps_command *cm, void *sgep, size_t len, int segsleft) 2737 { 2738 MPI2_SGE_TRANSACTION_UNION *tc = sgep; 2739 MPI2_SGE_SIMPLE64 *sge = sgep; 2740 int error, type; 2741 uint32_t saved_buf_len, saved_address_low, saved_address_high; 2742 2743 type = (tc->Flags & MPI2_SGE_FLAGS_ELEMENT_MASK); 2744 2745 #ifdef INVARIANTS 2746 switch (type) { 2747 case MPI2_SGE_FLAGS_TRANSACTION_ELEMENT: { 2748 if (len != tc->DetailsLength + 4) 2749 panic("TC %p length %u or %zu?", tc, 2750 tc->DetailsLength + 4, len); 2751 } 2752 break; 2753 case MPI2_SGE_FLAGS_CHAIN_ELEMENT: 2754 /* Driver only uses 32-bit chain elements */ 2755 if (len != MPS_SGC_SIZE) 2756 panic("CHAIN %p length %u or %zu?", sgep, 2757 MPS_SGC_SIZE, len); 2758 break; 2759 case MPI2_SGE_FLAGS_SIMPLE_ELEMENT: 2760 /* Driver only uses 64-bit SGE simple elements */ 2761 if (len != MPS_SGE64_SIZE) 2762 panic("SGE simple %p length %u or %zu?", sge, 2763 MPS_SGE64_SIZE, len); 2764 if (((le32toh(sge->FlagsLength) >> MPI2_SGE_FLAGS_SHIFT) & 2765 MPI2_SGE_FLAGS_ADDRESS_SIZE) == 0) 2766 panic("SGE simple %p not marked 64-bit?", sge); 2767 2768 break; 2769 default: 2770 panic("Unexpected SGE %p, flags %02x", tc, tc->Flags); 2771 } 2772 #endif 2773 2774 /* 2775 * case 1: 1 more segment, enough room for it 2776 * case 2: 2 more segments, enough room for both 2777 * case 3: >=2 more segments, only enough room for 1 and a chain 2778 * case 4: >=1 more segment, enough room for only a chain 2779 * case 5: >=1 more segment, no room for anything (error) 2780 */ 2781 2782 /* 2783 * There should be room for at least a chain element, or this 2784 * code is buggy. Case (5). 2785 */ 2786 if (cm->cm_sglsize < MPS_SGC_SIZE) 2787 panic("MPS: Need SGE Error Code\n"); 2788 2789 if (segsleft >= 1 && cm->cm_sglsize < len + MPS_SGC_SIZE) { 2790 /* 2791 * 1 or more segment, enough room for only a chain. 2792 * Hope the previous element wasn't a Simple entry 2793 * that needed to be marked with 2794 * MPI2_SGE_FLAGS_LAST_ELEMENT. Case (4). 2795 */ 2796 if ((error = mps_add_chain(cm)) != 0) 2797 return (error); 2798 } 2799 2800 if (segsleft >= 2 && 2801 cm->cm_sglsize < len + MPS_SGC_SIZE + MPS_SGE64_SIZE) { 2802 /* 2803 * There are 2 or more segments left to add, and only 2804 * enough room for 1 and a chain. Case (3). 2805 * 2806 * Mark as last element in this chain if necessary. 2807 */ 2808 if (type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { 2809 sge->FlagsLength |= htole32( 2810 MPI2_SGE_FLAGS_LAST_ELEMENT << MPI2_SGE_FLAGS_SHIFT); 2811 } 2812 2813 /* 2814 * Add the item then a chain. Do the chain now, 2815 * rather than on the next iteration, to simplify 2816 * understanding the code. 2817 */ 2818 cm->cm_sglsize -= len; 2819 bcopy(sgep, cm->cm_sge, len); 2820 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2821 return (mps_add_chain(cm)); 2822 } 2823 2824 #ifdef INVARIANTS 2825 /* Case 1: 1 more segment, enough room for it. */ 2826 if (segsleft == 1 && cm->cm_sglsize < len) 2827 panic("1 seg left and no room? %u versus %zu", 2828 cm->cm_sglsize, len); 2829 2830 /* Case 2: 2 more segments, enough room for both */ 2831 if (segsleft == 2 && cm->cm_sglsize < len + MPS_SGE64_SIZE) 2832 panic("2 segs left and no room? %u versus %zu", 2833 cm->cm_sglsize, len); 2834 #endif 2835 2836 if (segsleft == 1 && type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { 2837 /* 2838 * If this is a bi-directional request, need to account for that 2839 * here. Save the pre-filled sge values. These will be used 2840 * either for the 2nd SGL or for a single direction SGL. If 2841 * cm_out_len is non-zero, this is a bi-directional request, so 2842 * fill in the OUT SGL first, then the IN SGL, otherwise just 2843 * fill in the IN SGL. Note that at this time, when filling in 2844 * 2 SGL's for a bi-directional request, they both use the same 2845 * DMA buffer (same cm command). 2846 */ 2847 saved_buf_len = le32toh(sge->FlagsLength) & 0x00FFFFFF; 2848 saved_address_low = sge->Address.Low; 2849 saved_address_high = sge->Address.High; 2850 if (cm->cm_out_len) { 2851 sge->FlagsLength = htole32(cm->cm_out_len | 2852 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2853 MPI2_SGE_FLAGS_END_OF_BUFFER | 2854 MPI2_SGE_FLAGS_HOST_TO_IOC | 2855 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2856 MPI2_SGE_FLAGS_SHIFT)); 2857 cm->cm_sglsize -= len; 2858 bcopy(sgep, cm->cm_sge, len); 2859 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge 2860 + len); 2861 } 2862 saved_buf_len |= 2863 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2864 MPI2_SGE_FLAGS_END_OF_BUFFER | 2865 MPI2_SGE_FLAGS_LAST_ELEMENT | 2866 MPI2_SGE_FLAGS_END_OF_LIST | 2867 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2868 MPI2_SGE_FLAGS_SHIFT); 2869 if (cm->cm_flags & MPS_CM_FLAGS_DATAIN) { 2870 saved_buf_len |= 2871 ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) << 2872 MPI2_SGE_FLAGS_SHIFT); 2873 } else { 2874 saved_buf_len |= 2875 ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) << 2876 MPI2_SGE_FLAGS_SHIFT); 2877 } 2878 sge->FlagsLength = htole32(saved_buf_len); 2879 sge->Address.Low = saved_address_low; 2880 sge->Address.High = saved_address_high; 2881 } 2882 2883 cm->cm_sglsize -= len; 2884 bcopy(sgep, cm->cm_sge, len); 2885 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2886 return (0); 2887 } 2888 2889 /* 2890 * Add one dma segment to the scatter-gather list for a command. 2891 */ 2892 int 2893 mps_add_dmaseg(struct mps_command *cm, vm_paddr_t pa, size_t len, u_int flags, 2894 int segsleft) 2895 { 2896 MPI2_SGE_SIMPLE64 sge; 2897 2898 /* 2899 * This driver always uses 64-bit address elements for simplicity. 2900 */ 2901 bzero(&sge, sizeof(sge)); 2902 flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2903 MPI2_SGE_FLAGS_64_BIT_ADDRESSING; 2904 sge.FlagsLength = htole32(len | (flags << MPI2_SGE_FLAGS_SHIFT)); 2905 mps_from_u64(pa, &sge.Address); 2906 2907 return (mps_push_sge(cm, &sge, sizeof sge, segsleft)); 2908 } 2909 2910 static void 2911 mps_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 2912 { 2913 struct mps_softc *sc; 2914 struct mps_command *cm; 2915 u_int i, dir, sflags; 2916 2917 cm = (struct mps_command *)arg; 2918 sc = cm->cm_sc; 2919 2920 /* 2921 * In this case, just print out a warning and let the chip tell the 2922 * user they did the wrong thing. 2923 */ 2924 if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) { 2925 mps_dprint(sc, MPS_ERROR, 2926 "%s: warning: busdma returned %d segments, " 2927 "more than the %d allowed\n", __func__, nsegs, 2928 cm->cm_max_segs); 2929 } 2930 2931 /* 2932 * Set up DMA direction flags. Bi-directional requests are also handled 2933 * here. In that case, both direction flags will be set. 2934 */ 2935 sflags = 0; 2936 if (cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) { 2937 /* 2938 * We have to add a special case for SMP passthrough, there 2939 * is no easy way to generically handle it. The first 2940 * S/G element is used for the command (therefore the 2941 * direction bit needs to be set). The second one is used 2942 * for the reply. We'll leave it to the caller to make 2943 * sure we only have two buffers. 2944 */ 2945 /* 2946 * Even though the busdma man page says it doesn't make 2947 * sense to have both direction flags, it does in this case. 2948 * We have one s/g element being accessed in each direction. 2949 */ 2950 dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD; 2951 2952 /* 2953 * Set the direction flag on the first buffer in the SMP 2954 * passthrough request. We'll clear it for the second one. 2955 */ 2956 sflags |= MPI2_SGE_FLAGS_DIRECTION | 2957 MPI2_SGE_FLAGS_END_OF_BUFFER; 2958 } else if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) { 2959 sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC; 2960 dir = BUS_DMASYNC_PREWRITE; 2961 } else 2962 dir = BUS_DMASYNC_PREREAD; 2963 2964 for (i = 0; i < nsegs; i++) { 2965 if ((cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) && (i != 0)) { 2966 sflags &= ~MPI2_SGE_FLAGS_DIRECTION; 2967 } 2968 error = mps_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len, 2969 sflags, nsegs - i); 2970 if (error != 0) { 2971 /* Resource shortage, roll back! */ 2972 if (ratecheck(&sc->lastfail, &mps_chainfail_interval)) 2973 mps_dprint(sc, MPS_INFO, "Out of chain frames, " 2974 "consider increasing hw.mps.max_chains.\n"); 2975 cm->cm_flags |= MPS_CM_FLAGS_CHAIN_FAILED; 2976 mps_complete_command(sc, cm); 2977 return; 2978 } 2979 } 2980 2981 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir); 2982 mps_enqueue_request(sc, cm); 2983 2984 return; 2985 } 2986 2987 static void 2988 mps_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize, 2989 int error) 2990 { 2991 mps_data_cb(arg, segs, nsegs, error); 2992 } 2993 2994 /* 2995 * This is the routine to enqueue commands ansynchronously. 2996 * Note that the only error path here is from bus_dmamap_load(), which can 2997 * return EINPROGRESS if it is waiting for resources. Other than this, it's 2998 * assumed that if you have a command in-hand, then you have enough credits 2999 * to use it. 3000 */ 3001 int 3002 mps_map_command(struct mps_softc *sc, struct mps_command *cm) 3003 { 3004 int error = 0; 3005 3006 if (cm->cm_flags & MPS_CM_FLAGS_USE_UIO) { 3007 error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap, 3008 &cm->cm_uio, mps_data_cb2, cm, 0); 3009 } else if (cm->cm_flags & MPS_CM_FLAGS_USE_CCB) { 3010 error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap, 3011 cm->cm_data, mps_data_cb, cm, 0); 3012 } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) { 3013 error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap, 3014 cm->cm_data, cm->cm_length, mps_data_cb, cm, 0); 3015 } else { 3016 /* Add a zero-length element as needed */ 3017 if (cm->cm_sge != NULL) 3018 mps_add_dmaseg(cm, 0, 0, 0, 1); 3019 mps_enqueue_request(sc, cm); 3020 } 3021 3022 return (error); 3023 } 3024 3025 /* 3026 * This is the routine to enqueue commands synchronously. An error of 3027 * EINPROGRESS from mps_map_command() is ignored since the command will 3028 * be executed and enqueued automatically. Other errors come from msleep(). 3029 */ 3030 int 3031 mps_wait_command(struct mps_softc *sc, struct mps_command **cmp, int timeout, 3032 int sleep_flag) 3033 { 3034 int error, rc; 3035 struct timeval cur_time, start_time; 3036 struct mps_command *cm = *cmp; 3037 3038 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) 3039 return EBUSY; 3040 3041 cm->cm_complete = NULL; 3042 cm->cm_flags |= MPS_CM_FLAGS_POLLED; 3043 error = mps_map_command(sc, cm); 3044 if ((error != 0) && (error != EINPROGRESS)) 3045 return (error); 3046 3047 /* 3048 * Check for context and wait for 50 mSec at a time until time has 3049 * expired or the command has finished. If msleep can't be used, need 3050 * to poll. 3051 */ 3052 if (curthread->td_no_sleeping != 0) 3053 sleep_flag = NO_SLEEP; 3054 getmicrouptime(&start_time); 3055 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) { 3056 cm->cm_flags |= MPS_CM_FLAGS_WAKEUP; 3057 error = msleep(cm, &sc->mps_mtx, 0, "mpswait", timeout*hz); 3058 if (error == EWOULDBLOCK) { 3059 /* 3060 * Record the actual elapsed time in the case of a 3061 * timeout for the message below. 3062 */ 3063 getmicrouptime(&cur_time); 3064 timevalsub(&cur_time, &start_time); 3065 } 3066 } else { 3067 while ((cm->cm_flags & MPS_CM_FLAGS_COMPLETE) == 0) { 3068 mps_intr_locked(sc); 3069 if (sleep_flag == CAN_SLEEP) 3070 pause("mpswait", hz/20); 3071 else 3072 DELAY(50000); 3073 3074 getmicrouptime(&cur_time); 3075 timevalsub(&cur_time, &start_time); 3076 if (cur_time.tv_sec > timeout) { 3077 error = EWOULDBLOCK; 3078 break; 3079 } 3080 } 3081 } 3082 3083 if (error == EWOULDBLOCK) { 3084 if (cm->cm_timeout_handler == NULL) { 3085 mps_dprint(sc, MPS_FAULT, "Calling Reinit from %s, timeout=%d," 3086 " elapsed=%jd\n", __func__, timeout, 3087 (intmax_t)cur_time.tv_sec); 3088 rc = mps_reinit(sc); 3089 mps_dprint(sc, MPS_FAULT, "Reinit %s\n", (rc == 0) ? "success" : 3090 "failed"); 3091 } else 3092 cm->cm_timeout_handler(sc, cm); 3093 if (sc->mps_flags & MPS_FLAGS_REALLOCATED) { 3094 /* 3095 * Tell the caller that we freed the command in a 3096 * reinit. 3097 */ 3098 *cmp = NULL; 3099 } 3100 error = ETIMEDOUT; 3101 } 3102 return (error); 3103 } 3104 3105 /* 3106 * The MPT driver had a verbose interface for config pages. In this driver, 3107 * reduce it to much simpler terms, similar to the Linux driver. 3108 */ 3109 int 3110 mps_read_config_page(struct mps_softc *sc, struct mps_config_params *params) 3111 { 3112 MPI2_CONFIG_REQUEST *req; 3113 struct mps_command *cm; 3114 int error; 3115 3116 if (sc->mps_flags & MPS_FLAGS_BUSY) { 3117 return (EBUSY); 3118 } 3119 3120 cm = mps_alloc_command(sc); 3121 if (cm == NULL) { 3122 return (EBUSY); 3123 } 3124 3125 req = (MPI2_CONFIG_REQUEST *)cm->cm_req; 3126 req->Function = MPI2_FUNCTION_CONFIG; 3127 req->Action = params->action; 3128 req->SGLFlags = 0; 3129 req->ChainOffset = 0; 3130 req->PageAddress = params->page_address; 3131 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 3132 MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr; 3133 3134 hdr = ¶ms->hdr.Ext; 3135 req->ExtPageType = hdr->ExtPageType; 3136 req->ExtPageLength = hdr->ExtPageLength; 3137 req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED; 3138 req->Header.PageLength = 0; /* Must be set to zero */ 3139 req->Header.PageNumber = hdr->PageNumber; 3140 req->Header.PageVersion = hdr->PageVersion; 3141 } else { 3142 MPI2_CONFIG_PAGE_HEADER *hdr; 3143 3144 hdr = ¶ms->hdr.Struct; 3145 req->Header.PageType = hdr->PageType; 3146 req->Header.PageNumber = hdr->PageNumber; 3147 req->Header.PageLength = hdr->PageLength; 3148 req->Header.PageVersion = hdr->PageVersion; 3149 } 3150 3151 cm->cm_data = params->buffer; 3152 cm->cm_length = params->length; 3153 if (cm->cm_data != NULL) { 3154 cm->cm_sge = &req->PageBufferSGE; 3155 cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION); 3156 cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_DATAIN; 3157 } else 3158 cm->cm_sge = NULL; 3159 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 3160 3161 cm->cm_complete_data = params; 3162 if (params->callback != NULL) { 3163 cm->cm_complete = mps_config_complete; 3164 return (mps_map_command(sc, cm)); 3165 } else { 3166 error = mps_wait_command(sc, &cm, 0, CAN_SLEEP); 3167 if (error) { 3168 mps_dprint(sc, MPS_FAULT, 3169 "Error %d reading config page\n", error); 3170 if (cm != NULL) 3171 mps_free_command(sc, cm); 3172 return (error); 3173 } 3174 mps_config_complete(sc, cm); 3175 } 3176 3177 return (0); 3178 } 3179 3180 int 3181 mps_write_config_page(struct mps_softc *sc, struct mps_config_params *params) 3182 { 3183 return (EINVAL); 3184 } 3185 3186 static void 3187 mps_config_complete(struct mps_softc *sc, struct mps_command *cm) 3188 { 3189 MPI2_CONFIG_REPLY *reply; 3190 struct mps_config_params *params; 3191 3192 MPS_FUNCTRACE(sc); 3193 params = cm->cm_complete_data; 3194 3195 if (cm->cm_data != NULL) { 3196 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, 3197 BUS_DMASYNC_POSTREAD); 3198 bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap); 3199 } 3200 3201 /* 3202 * XXX KDM need to do more error recovery? This results in the 3203 * device in question not getting probed. 3204 */ 3205 if ((cm->cm_flags & MPS_CM_FLAGS_ERROR_MASK) != 0) { 3206 params->status = MPI2_IOCSTATUS_BUSY; 3207 goto done; 3208 } 3209 3210 reply = (MPI2_CONFIG_REPLY *)cm->cm_reply; 3211 if (reply == NULL) { 3212 params->status = MPI2_IOCSTATUS_BUSY; 3213 goto done; 3214 } 3215 params->status = reply->IOCStatus; 3216 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 3217 params->hdr.Ext.ExtPageType = reply->ExtPageType; 3218 params->hdr.Ext.ExtPageLength = reply->ExtPageLength; 3219 params->hdr.Ext.PageType = reply->Header.PageType; 3220 params->hdr.Ext.PageNumber = reply->Header.PageNumber; 3221 params->hdr.Ext.PageVersion = reply->Header.PageVersion; 3222 } else { 3223 params->hdr.Struct.PageType = reply->Header.PageType; 3224 params->hdr.Struct.PageNumber = reply->Header.PageNumber; 3225 params->hdr.Struct.PageLength = reply->Header.PageLength; 3226 params->hdr.Struct.PageVersion = reply->Header.PageVersion; 3227 } 3228 3229 done: 3230 mps_free_command(sc, cm); 3231 if (params->callback != NULL) 3232 params->callback(sc, params); 3233 3234 return; 3235 } 3236