1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2009 Yahoo! Inc. 5 * Copyright (c) 2011-2015 LSI Corp. 6 * Copyright (c) 2013-2015 Avago Technologies 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 31 * 32 * $FreeBSD$ 33 */ 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD$"); 37 38 /* Communications core for Avago Technologies (LSI) MPT2 */ 39 40 /* TODO Move headers to mpsvar */ 41 #include <sys/types.h> 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/selinfo.h> 46 #include <sys/lock.h> 47 #include <sys/mutex.h> 48 #include <sys/module.h> 49 #include <sys/bus.h> 50 #include <sys/conf.h> 51 #include <sys/bio.h> 52 #include <sys/malloc.h> 53 #include <sys/uio.h> 54 #include <sys/sysctl.h> 55 #include <sys/smp.h> 56 #include <sys/queue.h> 57 #include <sys/kthread.h> 58 #include <sys/taskqueue.h> 59 #include <sys/endian.h> 60 #include <sys/eventhandler.h> 61 #include <sys/sbuf.h> 62 63 #include <machine/bus.h> 64 #include <machine/resource.h> 65 #include <sys/rman.h> 66 #include <sys/proc.h> 67 68 #include <dev/pci/pcivar.h> 69 70 #include <cam/cam.h> 71 #include <cam/scsi/scsi_all.h> 72 73 #include <dev/mps/mpi/mpi2_type.h> 74 #include <dev/mps/mpi/mpi2.h> 75 #include <dev/mps/mpi/mpi2_ioc.h> 76 #include <dev/mps/mpi/mpi2_sas.h> 77 #include <dev/mps/mpi/mpi2_cnfg.h> 78 #include <dev/mps/mpi/mpi2_init.h> 79 #include <dev/mps/mpi/mpi2_tool.h> 80 #include <dev/mps/mps_ioctl.h> 81 #include <dev/mps/mpsvar.h> 82 #include <dev/mps/mps_table.h> 83 84 static int mps_diag_reset(struct mps_softc *sc, int sleep_flag); 85 static int mps_init_queues(struct mps_softc *sc); 86 static void mps_resize_queues(struct mps_softc *sc); 87 static int mps_message_unit_reset(struct mps_softc *sc, int sleep_flag); 88 static int mps_transition_operational(struct mps_softc *sc); 89 static int mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching); 90 static void mps_iocfacts_free(struct mps_softc *sc); 91 static void mps_startup(void *arg); 92 static int mps_send_iocinit(struct mps_softc *sc); 93 static int mps_alloc_queues(struct mps_softc *sc); 94 static int mps_alloc_hw_queues(struct mps_softc *sc); 95 static int mps_alloc_replies(struct mps_softc *sc); 96 static int mps_alloc_requests(struct mps_softc *sc); 97 static int mps_attach_log(struct mps_softc *sc); 98 static __inline void mps_complete_command(struct mps_softc *sc, 99 struct mps_command *cm); 100 static void mps_dispatch_event(struct mps_softc *sc, uintptr_t data, 101 MPI2_EVENT_NOTIFICATION_REPLY *reply); 102 static void mps_config_complete(struct mps_softc *sc, struct mps_command *cm); 103 static void mps_periodic(void *); 104 static int mps_reregister_events(struct mps_softc *sc); 105 static void mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm); 106 static int mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts); 107 static int mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag); 108 static int mps_debug_sysctl(SYSCTL_HANDLER_ARGS); 109 static void mps_parse_debug(struct mps_softc *sc, char *list); 110 111 SYSCTL_NODE(_hw, OID_AUTO, mps, CTLFLAG_RD, 0, "MPS Driver Parameters"); 112 113 MALLOC_DEFINE(M_MPT2, "mps", "mpt2 driver memory"); 114 MALLOC_DECLARE(M_MPSUSER); 115 116 /* 117 * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of 118 * any state and back to its initialization state machine. 119 */ 120 static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d }; 121 122 /* Added this union to smoothly convert le64toh cm->cm_desc.Words. 123 * Compiler only support unint64_t to be passed as argument. 124 * Otherwise it will throw below error 125 * "aggregate value used where an integer was expected" 126 */ 127 128 typedef union _reply_descriptor { 129 u64 word; 130 struct { 131 u32 low; 132 u32 high; 133 } u; 134 }reply_descriptor,address_descriptor; 135 136 /* Rate limit chain-fail messages to 1 per minute */ 137 static struct timeval mps_chainfail_interval = { 60, 0 }; 138 139 /* 140 * sleep_flag can be either CAN_SLEEP or NO_SLEEP. 141 * If this function is called from process context, it can sleep 142 * and there is no harm to sleep, in case if this fuction is called 143 * from Interrupt handler, we can not sleep and need NO_SLEEP flag set. 144 * based on sleep flags driver will call either msleep, pause or DELAY. 145 * msleep and pause are of same variant, but pause is used when mps_mtx 146 * is not hold by driver. 147 * 148 */ 149 static int 150 mps_diag_reset(struct mps_softc *sc,int sleep_flag) 151 { 152 uint32_t reg; 153 int i, error, tries = 0; 154 uint8_t first_wait_done = FALSE; 155 156 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 157 158 /* Clear any pending interrupts */ 159 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 160 161 /* 162 * Force NO_SLEEP for threads prohibited to sleep 163 * e.a Thread from interrupt handler are prohibited to sleep. 164 */ 165 if (curthread->td_no_sleeping != 0) 166 sleep_flag = NO_SLEEP; 167 168 mps_dprint(sc, MPS_INIT, "sequence start, sleep_flag= %d\n", sleep_flag); 169 170 /* Push the magic sequence */ 171 error = ETIMEDOUT; 172 while (tries++ < 20) { 173 for (i = 0; i < sizeof(mpt2_reset_magic); i++) 174 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 175 mpt2_reset_magic[i]); 176 /* wait 100 msec */ 177 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 178 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 179 "mpsdiag", hz/10); 180 else if (sleep_flag == CAN_SLEEP) 181 pause("mpsdiag", hz/10); 182 else 183 DELAY(100 * 1000); 184 185 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 186 if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) { 187 error = 0; 188 break; 189 } 190 } 191 if (error) { 192 mps_dprint(sc, MPS_INIT, "sequence failed, error=%d, exit\n", 193 error); 194 return (error); 195 } 196 197 /* Send the actual reset. XXX need to refresh the reg? */ 198 reg |= MPI2_DIAG_RESET_ADAPTER; 199 mps_dprint(sc, MPS_INIT, "sequence success, sending reset, reg= 0x%x\n", 200 reg); 201 mps_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET, reg); 202 203 /* Wait up to 300 seconds in 50ms intervals */ 204 error = ETIMEDOUT; 205 for (i = 0; i < 6000; i++) { 206 /* 207 * Wait 50 msec. If this is the first time through, wait 256 208 * msec to satisfy Diag Reset timing requirements. 209 */ 210 if (first_wait_done) { 211 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 212 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 213 "mpsdiag", hz/20); 214 else if (sleep_flag == CAN_SLEEP) 215 pause("mpsdiag", hz/20); 216 else 217 DELAY(50 * 1000); 218 } else { 219 DELAY(256 * 1000); 220 first_wait_done = TRUE; 221 } 222 /* 223 * Check for the RESET_ADAPTER bit to be cleared first, then 224 * wait for the RESET state to be cleared, which takes a little 225 * longer. 226 */ 227 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 228 if (reg & MPI2_DIAG_RESET_ADAPTER) { 229 continue; 230 } 231 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 232 if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) { 233 error = 0; 234 break; 235 } 236 } 237 if (error) { 238 mps_dprint(sc, MPS_INIT, "reset failed, error= %d, exit\n", 239 error); 240 return (error); 241 } 242 243 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0); 244 mps_dprint(sc, MPS_INIT, "diag reset success, exit\n"); 245 246 return (0); 247 } 248 249 static int 250 mps_message_unit_reset(struct mps_softc *sc, int sleep_flag) 251 { 252 int error; 253 254 MPS_FUNCTRACE(sc); 255 256 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 257 258 error = 0; 259 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, 260 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET << 261 MPI2_DOORBELL_FUNCTION_SHIFT); 262 263 if (mps_wait_db_ack(sc, 5, sleep_flag) != 0) { 264 mps_dprint(sc, MPS_INIT|MPS_FAULT, 265 "Doorbell handshake failed\n"); 266 error = ETIMEDOUT; 267 } 268 269 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 270 return (error); 271 } 272 273 static int 274 mps_transition_ready(struct mps_softc *sc) 275 { 276 uint32_t reg, state; 277 int error, tries = 0; 278 int sleep_flags; 279 280 MPS_FUNCTRACE(sc); 281 /* If we are in attach call, do not sleep */ 282 sleep_flags = (sc->mps_flags & MPS_FLAGS_ATTACH_DONE) 283 ? CAN_SLEEP:NO_SLEEP; 284 error = 0; 285 286 mps_dprint(sc, MPS_INIT, "%s entered, sleep_flags= %d\n", 287 __func__, sleep_flags); 288 289 while (tries++ < 1200) { 290 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 291 mps_dprint(sc, MPS_INIT, " Doorbell= 0x%x\n", reg); 292 293 /* 294 * Ensure the IOC is ready to talk. If it's not, try 295 * resetting it. 296 */ 297 if (reg & MPI2_DOORBELL_USED) { 298 mps_dprint(sc, MPS_INIT, " Not ready, sending diag " 299 "reset\n"); 300 mps_diag_reset(sc, sleep_flags); 301 DELAY(50000); 302 continue; 303 } 304 305 /* Is the adapter owned by another peer? */ 306 if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) == 307 (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) { 308 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC is under the " 309 "control of another peer host, aborting " 310 "initialization.\n"); 311 error = ENXIO; 312 break; 313 } 314 315 state = reg & MPI2_IOC_STATE_MASK; 316 if (state == MPI2_IOC_STATE_READY) { 317 /* Ready to go! */ 318 error = 0; 319 break; 320 } else if (state == MPI2_IOC_STATE_FAULT) { 321 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC in fault " 322 "state 0x%x, resetting\n", 323 state & MPI2_DOORBELL_FAULT_CODE_MASK); 324 mps_diag_reset(sc, sleep_flags); 325 } else if (state == MPI2_IOC_STATE_OPERATIONAL) { 326 /* Need to take ownership */ 327 mps_message_unit_reset(sc, sleep_flags); 328 } else if (state == MPI2_IOC_STATE_RESET) { 329 /* Wait a bit, IOC might be in transition */ 330 mps_dprint(sc, MPS_INIT|MPS_FAULT, 331 "IOC in unexpected reset state\n"); 332 } else { 333 mps_dprint(sc, MPS_INIT|MPS_FAULT, 334 "IOC in unknown state 0x%x\n", state); 335 error = EINVAL; 336 break; 337 } 338 339 /* Wait 50ms for things to settle down. */ 340 DELAY(50000); 341 } 342 343 if (error) 344 mps_dprint(sc, MPS_INIT|MPS_FAULT, 345 "Cannot transition IOC to ready\n"); 346 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 347 348 return (error); 349 } 350 351 static int 352 mps_transition_operational(struct mps_softc *sc) 353 { 354 uint32_t reg, state; 355 int error; 356 357 MPS_FUNCTRACE(sc); 358 359 error = 0; 360 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 361 mps_dprint(sc, MPS_INIT, "%s entered, Doorbell= 0x%x\n", __func__, reg); 362 363 state = reg & MPI2_IOC_STATE_MASK; 364 if (state != MPI2_IOC_STATE_READY) { 365 mps_dprint(sc, MPS_INIT, "IOC not ready\n"); 366 if ((error = mps_transition_ready(sc)) != 0) { 367 mps_dprint(sc, MPS_INIT|MPS_FAULT, 368 "failed to transition ready, exit\n"); 369 return (error); 370 } 371 } 372 373 error = mps_send_iocinit(sc); 374 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 375 376 return (error); 377 } 378 379 static void 380 mps_resize_queues(struct mps_softc *sc) 381 { 382 u_int reqcr, prireqcr, maxio, sges_per_frame; 383 384 /* 385 * Size the queues. Since the reply queues always need one free 386 * entry, we'll deduct one reply message here. The LSI documents 387 * suggest instead to add a count to the request queue, but I think 388 * that it's better to deduct from reply queue. 389 */ 390 prireqcr = MAX(1, sc->max_prireqframes); 391 prireqcr = MIN(prireqcr, sc->facts->HighPriorityCredit); 392 393 reqcr = MAX(2, sc->max_reqframes); 394 reqcr = MIN(reqcr, sc->facts->RequestCredit); 395 396 sc->num_reqs = prireqcr + reqcr; 397 sc->num_prireqs = prireqcr; 398 sc->num_replies = MIN(sc->max_replyframes + sc->max_evtframes, 399 sc->facts->MaxReplyDescriptorPostQueueDepth) - 1; 400 401 /* Store the request frame size in bytes rather than as 32bit words */ 402 sc->reqframesz = sc->facts->IOCRequestFrameSize * 4; 403 404 /* 405 * Max IO Size is Page Size * the following: 406 * ((SGEs per frame - 1 for chain element) * Max Chain Depth) 407 * + 1 for no chain needed in last frame 408 * 409 * If user suggests a Max IO size to use, use the smaller of the 410 * user's value and the calculated value as long as the user's 411 * value is larger than 0. The user's value is in pages. 412 */ 413 sges_per_frame = sc->reqframesz / sizeof(MPI2_SGE_SIMPLE64) - 1; 414 maxio = (sges_per_frame * sc->facts->MaxChainDepth + 1) * PAGE_SIZE; 415 416 /* 417 * If I/O size limitation requested, then use it and pass up to CAM. 418 * If not, use MAXPHYS as an optimization hint, but report HW limit. 419 */ 420 if (sc->max_io_pages > 0) { 421 maxio = min(maxio, sc->max_io_pages * PAGE_SIZE); 422 sc->maxio = maxio; 423 } else { 424 sc->maxio = maxio; 425 maxio = min(maxio, MAXPHYS); 426 } 427 428 sc->num_chains = (maxio / PAGE_SIZE + sges_per_frame - 2) / 429 sges_per_frame * reqcr; 430 if (sc->max_chains > 0 && sc->max_chains < sc->num_chains) 431 sc->num_chains = sc->max_chains; 432 433 /* 434 * Figure out the number of MSIx-based queues. If the firmware or 435 * user has done something crazy and not allowed enough credit for 436 * the queues to be useful then don't enable multi-queue. 437 */ 438 if (sc->facts->MaxMSIxVectors < 2) 439 sc->msi_msgs = 1; 440 441 if (sc->msi_msgs > 1) { 442 sc->msi_msgs = MIN(sc->msi_msgs, mp_ncpus); 443 sc->msi_msgs = MIN(sc->msi_msgs, sc->facts->MaxMSIxVectors); 444 if (sc->num_reqs / sc->msi_msgs < 2) 445 sc->msi_msgs = 1; 446 } 447 448 mps_dprint(sc, MPS_INIT, "Sized queues to q=%d reqs=%d replies=%d\n", 449 sc->msi_msgs, sc->num_reqs, sc->num_replies); 450 } 451 452 /* 453 * This is called during attach and when re-initializing due to a Diag Reset. 454 * IOC Facts is used to allocate many of the structures needed by the driver. 455 * If called from attach, de-allocation is not required because the driver has 456 * not allocated any structures yet, but if called from a Diag Reset, previously 457 * allocated structures based on IOC Facts will need to be freed and re- 458 * allocated bases on the latest IOC Facts. 459 */ 460 static int 461 mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching) 462 { 463 int error; 464 Mpi2IOCFactsReply_t saved_facts; 465 uint8_t saved_mode, reallocating; 466 467 mps_dprint(sc, MPS_INIT|MPS_TRACE, "%s entered\n", __func__); 468 469 /* Save old IOC Facts and then only reallocate if Facts have changed */ 470 if (!attaching) { 471 bcopy(sc->facts, &saved_facts, sizeof(MPI2_IOC_FACTS_REPLY)); 472 } 473 474 /* 475 * Get IOC Facts. In all cases throughout this function, panic if doing 476 * a re-initialization and only return the error if attaching so the OS 477 * can handle it. 478 */ 479 if ((error = mps_get_iocfacts(sc, sc->facts)) != 0) { 480 if (attaching) { 481 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to get " 482 "IOC Facts with error %d, exit\n", error); 483 return (error); 484 } else { 485 panic("%s failed to get IOC Facts with error %d\n", 486 __func__, error); 487 } 488 } 489 490 MPS_DPRINT_PAGE(sc, MPS_XINFO, iocfacts, sc->facts); 491 492 snprintf(sc->fw_version, sizeof(sc->fw_version), 493 "%02d.%02d.%02d.%02d", 494 sc->facts->FWVersion.Struct.Major, 495 sc->facts->FWVersion.Struct.Minor, 496 sc->facts->FWVersion.Struct.Unit, 497 sc->facts->FWVersion.Struct.Dev); 498 499 mps_dprint(sc, MPS_INFO, "Firmware: %s, Driver: %s\n", sc->fw_version, 500 MPS_DRIVER_VERSION); 501 mps_dprint(sc, MPS_INFO, "IOCCapabilities: %b\n", 502 sc->facts->IOCCapabilities, 503 "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf" 504 "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR" 505 "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc"); 506 507 /* 508 * If the chip doesn't support event replay then a hard reset will be 509 * required to trigger a full discovery. Do the reset here then 510 * retransition to Ready. A hard reset might have already been done, 511 * but it doesn't hurt to do it again. Only do this if attaching, not 512 * for a Diag Reset. 513 */ 514 if (attaching && ((sc->facts->IOCCapabilities & 515 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0)) { 516 mps_dprint(sc, MPS_INIT, "No event replay, reseting\n"); 517 mps_diag_reset(sc, NO_SLEEP); 518 if ((error = mps_transition_ready(sc)) != 0) { 519 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to " 520 "transition to ready with error %d, exit\n", 521 error); 522 return (error); 523 } 524 } 525 526 /* 527 * Set flag if IR Firmware is loaded. If the RAID Capability has 528 * changed from the previous IOC Facts, log a warning, but only if 529 * checking this after a Diag Reset and not during attach. 530 */ 531 saved_mode = sc->ir_firmware; 532 if (sc->facts->IOCCapabilities & 533 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) 534 sc->ir_firmware = 1; 535 if (!attaching) { 536 if (sc->ir_firmware != saved_mode) { 537 mps_dprint(sc, MPS_INIT|MPS_FAULT, "new IR/IT mode " 538 "in IOC Facts does not match previous mode\n"); 539 } 540 } 541 542 /* Only deallocate and reallocate if relevant IOC Facts have changed */ 543 reallocating = FALSE; 544 sc->mps_flags &= ~MPS_FLAGS_REALLOCATED; 545 546 if ((!attaching) && 547 ((saved_facts.MsgVersion != sc->facts->MsgVersion) || 548 (saved_facts.HeaderVersion != sc->facts->HeaderVersion) || 549 (saved_facts.MaxChainDepth != sc->facts->MaxChainDepth) || 550 (saved_facts.RequestCredit != sc->facts->RequestCredit) || 551 (saved_facts.ProductID != sc->facts->ProductID) || 552 (saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) || 553 (saved_facts.IOCRequestFrameSize != 554 sc->facts->IOCRequestFrameSize) || 555 (saved_facts.MaxTargets != sc->facts->MaxTargets) || 556 (saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) || 557 (saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) || 558 (saved_facts.HighPriorityCredit != sc->facts->HighPriorityCredit) || 559 (saved_facts.MaxReplyDescriptorPostQueueDepth != 560 sc->facts->MaxReplyDescriptorPostQueueDepth) || 561 (saved_facts.ReplyFrameSize != sc->facts->ReplyFrameSize) || 562 (saved_facts.MaxVolumes != sc->facts->MaxVolumes) || 563 (saved_facts.MaxPersistentEntries != 564 sc->facts->MaxPersistentEntries))) { 565 reallocating = TRUE; 566 567 /* Record that we reallocated everything */ 568 sc->mps_flags |= MPS_FLAGS_REALLOCATED; 569 } 570 571 /* 572 * Some things should be done if attaching or re-allocating after a Diag 573 * Reset, but are not needed after a Diag Reset if the FW has not 574 * changed. 575 */ 576 if (attaching || reallocating) { 577 /* 578 * Check if controller supports FW diag buffers and set flag to 579 * enable each type. 580 */ 581 if (sc->facts->IOCCapabilities & 582 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) 583 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE]. 584 enabled = TRUE; 585 if (sc->facts->IOCCapabilities & 586 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) 587 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT]. 588 enabled = TRUE; 589 if (sc->facts->IOCCapabilities & 590 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) 591 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED]. 592 enabled = TRUE; 593 594 /* 595 * Set flag if EEDP is supported and if TLR is supported. 596 */ 597 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) 598 sc->eedp_enabled = TRUE; 599 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) 600 sc->control_TLR = TRUE; 601 602 mps_resize_queues(sc); 603 604 /* 605 * Initialize all Tail Queues 606 */ 607 TAILQ_INIT(&sc->req_list); 608 TAILQ_INIT(&sc->high_priority_req_list); 609 TAILQ_INIT(&sc->chain_list); 610 TAILQ_INIT(&sc->tm_list); 611 } 612 613 /* 614 * If doing a Diag Reset and the FW is significantly different 615 * (reallocating will be set above in IOC Facts comparison), then all 616 * buffers based on the IOC Facts will need to be freed before they are 617 * reallocated. 618 */ 619 if (reallocating) { 620 mps_iocfacts_free(sc); 621 mpssas_realloc_targets(sc, saved_facts.MaxTargets + 622 saved_facts.MaxVolumes); 623 } 624 625 /* 626 * Any deallocation has been completed. Now start reallocating 627 * if needed. Will only need to reallocate if attaching or if the new 628 * IOC Facts are different from the previous IOC Facts after a Diag 629 * Reset. Targets have already been allocated above if needed. 630 */ 631 error = 0; 632 while (attaching || reallocating) { 633 if ((error = mps_alloc_hw_queues(sc)) != 0) 634 break; 635 if ((error = mps_alloc_replies(sc)) != 0) 636 break; 637 if ((error = mps_alloc_requests(sc)) != 0) 638 break; 639 if ((error = mps_alloc_queues(sc)) != 0) 640 break; 641 642 break; 643 } 644 if (error) { 645 mps_dprint(sc, MPS_INIT|MPS_FAULT, 646 "Failed to alloc queues with error %d\n", error); 647 mps_free(sc); 648 return (error); 649 } 650 651 /* Always initialize the queues */ 652 bzero(sc->free_queue, sc->fqdepth * 4); 653 mps_init_queues(sc); 654 655 /* 656 * Always get the chip out of the reset state, but only panic if not 657 * attaching. If attaching and there is an error, that is handled by 658 * the OS. 659 */ 660 error = mps_transition_operational(sc); 661 if (error != 0) { 662 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to " 663 "transition to operational with error %d\n", error); 664 mps_free(sc); 665 return (error); 666 } 667 668 /* 669 * Finish the queue initialization. 670 * These are set here instead of in mps_init_queues() because the 671 * IOC resets these values during the state transition in 672 * mps_transition_operational(). The free index is set to 1 673 * because the corresponding index in the IOC is set to 0, and the 674 * IOC treats the queues as full if both are set to the same value. 675 * Hence the reason that the queue can't hold all of the possible 676 * replies. 677 */ 678 sc->replypostindex = 0; 679 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); 680 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0); 681 682 /* 683 * Attach the subsystems so they can prepare their event masks. 684 * XXX Should be dynamic so that IM/IR and user modules can attach 685 */ 686 error = 0; 687 while (attaching) { 688 mps_dprint(sc, MPS_INIT, "Attaching subsystems\n"); 689 if ((error = mps_attach_log(sc)) != 0) 690 break; 691 if ((error = mps_attach_sas(sc)) != 0) 692 break; 693 if ((error = mps_attach_user(sc)) != 0) 694 break; 695 break; 696 } 697 if (error) { 698 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to attach all " 699 "subsystems: error %d\n", error); 700 mps_free(sc); 701 return (error); 702 } 703 704 /* 705 * XXX If the number of MSI-X vectors changes during re-init, this 706 * won't see it and adjust. 707 */ 708 if (attaching && (error = mps_pci_setup_interrupts(sc)) != 0) { 709 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to setup " 710 "interrupts\n"); 711 mps_free(sc); 712 return (error); 713 } 714 715 /* 716 * Set flag if this is a WD controller. This shouldn't ever change, but 717 * reset it after a Diag Reset, just in case. 718 */ 719 sc->WD_available = FALSE; 720 if (pci_get_device(sc->mps_dev) == MPI2_MFGPAGE_DEVID_SSS6200) 721 sc->WD_available = TRUE; 722 723 return (error); 724 } 725 726 /* 727 * This is called if memory is being free (during detach for example) and when 728 * buffers need to be reallocated due to a Diag Reset. 729 */ 730 static void 731 mps_iocfacts_free(struct mps_softc *sc) 732 { 733 struct mps_command *cm; 734 int i; 735 736 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 737 738 if (sc->free_busaddr != 0) 739 bus_dmamap_unload(sc->queues_dmat, sc->queues_map); 740 if (sc->free_queue != NULL) 741 bus_dmamem_free(sc->queues_dmat, sc->free_queue, 742 sc->queues_map); 743 if (sc->queues_dmat != NULL) 744 bus_dma_tag_destroy(sc->queues_dmat); 745 746 if (sc->chain_busaddr != 0) 747 bus_dmamap_unload(sc->chain_dmat, sc->chain_map); 748 if (sc->chain_frames != NULL) 749 bus_dmamem_free(sc->chain_dmat, sc->chain_frames, 750 sc->chain_map); 751 if (sc->chain_dmat != NULL) 752 bus_dma_tag_destroy(sc->chain_dmat); 753 754 if (sc->sense_busaddr != 0) 755 bus_dmamap_unload(sc->sense_dmat, sc->sense_map); 756 if (sc->sense_frames != NULL) 757 bus_dmamem_free(sc->sense_dmat, sc->sense_frames, 758 sc->sense_map); 759 if (sc->sense_dmat != NULL) 760 bus_dma_tag_destroy(sc->sense_dmat); 761 762 if (sc->reply_busaddr != 0) 763 bus_dmamap_unload(sc->reply_dmat, sc->reply_map); 764 if (sc->reply_frames != NULL) 765 bus_dmamem_free(sc->reply_dmat, sc->reply_frames, 766 sc->reply_map); 767 if (sc->reply_dmat != NULL) 768 bus_dma_tag_destroy(sc->reply_dmat); 769 770 if (sc->req_busaddr != 0) 771 bus_dmamap_unload(sc->req_dmat, sc->req_map); 772 if (sc->req_frames != NULL) 773 bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map); 774 if (sc->req_dmat != NULL) 775 bus_dma_tag_destroy(sc->req_dmat); 776 777 if (sc->chains != NULL) 778 free(sc->chains, M_MPT2); 779 if (sc->commands != NULL) { 780 for (i = 1; i < sc->num_reqs; i++) { 781 cm = &sc->commands[i]; 782 bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap); 783 } 784 free(sc->commands, M_MPT2); 785 } 786 if (sc->buffer_dmat != NULL) 787 bus_dma_tag_destroy(sc->buffer_dmat); 788 789 mps_pci_free_interrupts(sc); 790 free(sc->queues, M_MPT2); 791 sc->queues = NULL; 792 } 793 794 /* 795 * The terms diag reset and hard reset are used interchangeably in the MPI 796 * docs to mean resetting the controller chip. In this code diag reset 797 * cleans everything up, and the hard reset function just sends the reset 798 * sequence to the chip. This should probably be refactored so that every 799 * subsystem gets a reset notification of some sort, and can clean up 800 * appropriately. 801 */ 802 int 803 mps_reinit(struct mps_softc *sc) 804 { 805 int error; 806 struct mpssas_softc *sassc; 807 808 sassc = sc->sassc; 809 810 MPS_FUNCTRACE(sc); 811 812 mtx_assert(&sc->mps_mtx, MA_OWNED); 813 814 mps_dprint(sc, MPS_INIT|MPS_INFO, "Reinitializing controller\n"); 815 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) { 816 mps_dprint(sc, MPS_INIT, "Reset already in progress\n"); 817 return 0; 818 } 819 820 /* make sure the completion callbacks can recognize they're getting 821 * a NULL cm_reply due to a reset. 822 */ 823 sc->mps_flags |= MPS_FLAGS_DIAGRESET; 824 825 /* 826 * Mask interrupts here. 827 */ 828 mps_dprint(sc, MPS_INIT, "masking interrupts and resetting\n"); 829 mps_mask_intr(sc); 830 831 error = mps_diag_reset(sc, CAN_SLEEP); 832 if (error != 0) { 833 /* XXXSL No need to panic here */ 834 panic("%s hard reset failed with error %d\n", 835 __func__, error); 836 } 837 838 /* Restore the PCI state, including the MSI-X registers */ 839 mps_pci_restore(sc); 840 841 /* Give the I/O subsystem special priority to get itself prepared */ 842 mpssas_handle_reinit(sc); 843 844 /* 845 * Get IOC Facts and allocate all structures based on this information. 846 * The attach function will also call mps_iocfacts_allocate at startup. 847 * If relevant values have changed in IOC Facts, this function will free 848 * all of the memory based on IOC Facts and reallocate that memory. 849 */ 850 if ((error = mps_iocfacts_allocate(sc, FALSE)) != 0) { 851 panic("%s IOC Facts based allocation failed with error %d\n", 852 __func__, error); 853 } 854 855 /* 856 * Mapping structures will be re-allocated after getting IOC Page8, so 857 * free these structures here. 858 */ 859 mps_mapping_exit(sc); 860 861 /* 862 * The static page function currently read is IOC Page8. Others can be 863 * added in future. It's possible that the values in IOC Page8 have 864 * changed after a Diag Reset due to user modification, so always read 865 * these. Interrupts are masked, so unmask them before getting config 866 * pages. 867 */ 868 mps_unmask_intr(sc); 869 sc->mps_flags &= ~MPS_FLAGS_DIAGRESET; 870 mps_base_static_config_pages(sc); 871 872 /* 873 * Some mapping info is based in IOC Page8 data, so re-initialize the 874 * mapping tables. 875 */ 876 mps_mapping_initialize(sc); 877 878 /* 879 * Restart will reload the event masks clobbered by the reset, and 880 * then enable the port. 881 */ 882 mps_reregister_events(sc); 883 884 /* the end of discovery will release the simq, so we're done. */ 885 mps_dprint(sc, MPS_INIT|MPS_XINFO, "Finished sc %p post %u free %u\n", 886 sc, sc->replypostindex, sc->replyfreeindex); 887 888 mpssas_release_simq_reinit(sassc); 889 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 890 891 return 0; 892 } 893 894 /* Wait for the chip to ACK a word that we've put into its FIFO 895 * Wait for <timeout> seconds. In single loop wait for busy loop 896 * for 500 microseconds. 897 * Total is [ 0.5 * (2000 * <timeout>) ] in miliseconds. 898 * */ 899 static int 900 mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag) 901 { 902 903 u32 cntdn, count; 904 u32 int_status; 905 u32 doorbell; 906 907 count = 0; 908 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 909 do { 910 int_status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 911 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 912 mps_dprint(sc, MPS_TRACE, 913 "%s: successful count(%d), timeout(%d)\n", 914 __func__, count, timeout); 915 return 0; 916 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 917 doorbell = mps_regread(sc, MPI2_DOORBELL_OFFSET); 918 if ((doorbell & MPI2_IOC_STATE_MASK) == 919 MPI2_IOC_STATE_FAULT) { 920 mps_dprint(sc, MPS_FAULT, 921 "fault_state(0x%04x)!\n", doorbell); 922 return (EFAULT); 923 } 924 } else if (int_status == 0xFFFFFFFF) 925 goto out; 926 927 /* If it can sleep, sleep for 1 milisecond, else busy loop for 928 * 0.5 milisecond */ 929 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 930 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 931 "mpsdba", hz/1000); 932 else if (sleep_flag == CAN_SLEEP) 933 pause("mpsdba", hz/1000); 934 else 935 DELAY(500); 936 count++; 937 } while (--cntdn); 938 939 out: 940 mps_dprint(sc, MPS_FAULT, "%s: failed due to timeout count(%d), " 941 "int_status(%x)!\n", __func__, count, int_status); 942 return (ETIMEDOUT); 943 944 } 945 946 /* Wait for the chip to signal that the next word in its FIFO can be fetched */ 947 static int 948 mps_wait_db_int(struct mps_softc *sc) 949 { 950 int retry; 951 952 for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) { 953 if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) & 954 MPI2_HIS_IOC2SYS_DB_STATUS) != 0) 955 return (0); 956 DELAY(2000); 957 } 958 return (ETIMEDOUT); 959 } 960 961 /* Step through the synchronous command state machine, i.e. "Doorbell mode" */ 962 static int 963 mps_request_sync(struct mps_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply, 964 int req_sz, int reply_sz, int timeout) 965 { 966 uint32_t *data32; 967 uint16_t *data16; 968 int i, count, ioc_sz, residual; 969 int sleep_flags = CAN_SLEEP; 970 971 if (curthread->td_no_sleeping != 0) 972 sleep_flags = NO_SLEEP; 973 974 /* Step 1 */ 975 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 976 977 /* Step 2 */ 978 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 979 return (EBUSY); 980 981 /* Step 3 982 * Announce that a message is coming through the doorbell. Messages 983 * are pushed at 32bit words, so round up if needed. 984 */ 985 count = (req_sz + 3) / 4; 986 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, 987 (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) | 988 (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT)); 989 990 /* Step 4 */ 991 if (mps_wait_db_int(sc) || 992 (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) { 993 mps_dprint(sc, MPS_FAULT, "Doorbell failed to activate\n"); 994 return (ENXIO); 995 } 996 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 997 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) { 998 mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed\n"); 999 return (ENXIO); 1000 } 1001 1002 /* Step 5 */ 1003 /* Clock out the message data synchronously in 32-bit dwords*/ 1004 data32 = (uint32_t *)req; 1005 for (i = 0; i < count; i++) { 1006 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i])); 1007 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) { 1008 mps_dprint(sc, MPS_FAULT, 1009 "Timeout while writing doorbell\n"); 1010 return (ENXIO); 1011 } 1012 } 1013 1014 /* Step 6 */ 1015 /* Clock in the reply in 16-bit words. The total length of the 1016 * message is always in the 4th byte, so clock out the first 2 words 1017 * manually, then loop the rest. 1018 */ 1019 data16 = (uint16_t *)reply; 1020 if (mps_wait_db_int(sc) != 0) { 1021 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 0\n"); 1022 return (ENXIO); 1023 } 1024 data16[0] = 1025 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 1026 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1027 if (mps_wait_db_int(sc) != 0) { 1028 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 1\n"); 1029 return (ENXIO); 1030 } 1031 data16[1] = 1032 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 1033 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1034 1035 /* Number of 32bit words in the message */ 1036 ioc_sz = reply->MsgLength; 1037 1038 /* 1039 * Figure out how many 16bit words to clock in without overrunning. 1040 * The precision loss with dividing reply_sz can safely be 1041 * ignored because the messages can only be multiples of 32bits. 1042 */ 1043 residual = 0; 1044 count = MIN((reply_sz / 4), ioc_sz) * 2; 1045 if (count < ioc_sz * 2) { 1046 residual = ioc_sz * 2 - count; 1047 mps_dprint(sc, MPS_ERROR, "Driver error, throwing away %d " 1048 "residual message words\n", residual); 1049 } 1050 1051 for (i = 2; i < count; i++) { 1052 if (mps_wait_db_int(sc) != 0) { 1053 mps_dprint(sc, MPS_FAULT, 1054 "Timeout reading doorbell %d\n", i); 1055 return (ENXIO); 1056 } 1057 data16[i] = mps_regread(sc, MPI2_DOORBELL_OFFSET) & 1058 MPI2_DOORBELL_DATA_MASK; 1059 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1060 } 1061 1062 /* 1063 * Pull out residual words that won't fit into the provided buffer. 1064 * This keeps the chip from hanging due to a driver programming 1065 * error. 1066 */ 1067 while (residual--) { 1068 if (mps_wait_db_int(sc) != 0) { 1069 mps_dprint(sc, MPS_FAULT, 1070 "Timeout reading doorbell\n"); 1071 return (ENXIO); 1072 } 1073 (void)mps_regread(sc, MPI2_DOORBELL_OFFSET); 1074 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1075 } 1076 1077 /* Step 7 */ 1078 if (mps_wait_db_int(sc) != 0) { 1079 mps_dprint(sc, MPS_FAULT, "Timeout waiting to exit doorbell\n"); 1080 return (ENXIO); 1081 } 1082 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 1083 mps_dprint(sc, MPS_FAULT, "Warning, doorbell still active\n"); 1084 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1085 1086 return (0); 1087 } 1088 1089 static void 1090 mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm) 1091 { 1092 reply_descriptor rd; 1093 MPS_FUNCTRACE(sc); 1094 mps_dprint(sc, MPS_TRACE, "SMID %u cm %p ccb %p\n", 1095 cm->cm_desc.Default.SMID, cm, cm->cm_ccb); 1096 1097 if (sc->mps_flags & MPS_FLAGS_ATTACH_DONE && !(sc->mps_flags & MPS_FLAGS_SHUTDOWN)) 1098 mtx_assert(&sc->mps_mtx, MA_OWNED); 1099 1100 if (++sc->io_cmds_active > sc->io_cmds_highwater) 1101 sc->io_cmds_highwater++; 1102 rd.u.low = cm->cm_desc.Words.Low; 1103 rd.u.high = cm->cm_desc.Words.High; 1104 rd.word = htole64(rd.word); 1105 /* TODO-We may need to make below regwrite atomic */ 1106 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET, 1107 rd.u.low); 1108 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET, 1109 rd.u.high); 1110 } 1111 1112 /* 1113 * Just the FACTS, ma'am. 1114 */ 1115 static int 1116 mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts) 1117 { 1118 MPI2_DEFAULT_REPLY *reply; 1119 MPI2_IOC_FACTS_REQUEST request; 1120 int error, req_sz, reply_sz; 1121 1122 MPS_FUNCTRACE(sc); 1123 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1124 1125 req_sz = sizeof(MPI2_IOC_FACTS_REQUEST); 1126 reply_sz = sizeof(MPI2_IOC_FACTS_REPLY); 1127 reply = (MPI2_DEFAULT_REPLY *)facts; 1128 1129 bzero(&request, req_sz); 1130 request.Function = MPI2_FUNCTION_IOC_FACTS; 1131 error = mps_request_sync(sc, &request, reply, req_sz, reply_sz, 5); 1132 mps_dprint(sc, MPS_INIT, "%s exit error= %d\n", __func__, error); 1133 1134 return (error); 1135 } 1136 1137 static int 1138 mps_send_iocinit(struct mps_softc *sc) 1139 { 1140 MPI2_IOC_INIT_REQUEST init; 1141 MPI2_DEFAULT_REPLY reply; 1142 int req_sz, reply_sz, error; 1143 struct timeval now; 1144 uint64_t time_in_msec; 1145 1146 MPS_FUNCTRACE(sc); 1147 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1148 1149 /* Do a quick sanity check on proper initialization */ 1150 if ((sc->pqdepth == 0) || (sc->fqdepth == 0) || (sc->reqframesz == 0) 1151 || (sc->replyframesz == 0)) { 1152 mps_dprint(sc, MPS_INIT|MPS_ERROR, 1153 "Driver not fully initialized for IOCInit\n"); 1154 return (EINVAL); 1155 } 1156 1157 req_sz = sizeof(MPI2_IOC_INIT_REQUEST); 1158 reply_sz = sizeof(MPI2_IOC_INIT_REPLY); 1159 bzero(&init, req_sz); 1160 bzero(&reply, reply_sz); 1161 1162 /* 1163 * Fill in the init block. Note that most addresses are 1164 * deliberately in the lower 32bits of memory. This is a micro- 1165 * optimzation for PCI/PCIX, though it's not clear if it helps PCIe. 1166 */ 1167 init.Function = MPI2_FUNCTION_IOC_INIT; 1168 init.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 1169 init.MsgVersion = htole16(MPI2_VERSION); 1170 init.HeaderVersion = htole16(MPI2_HEADER_VERSION); 1171 init.SystemRequestFrameSize = htole16((uint16_t)(sc->reqframesz / 4)); 1172 init.ReplyDescriptorPostQueueDepth = htole16(sc->pqdepth); 1173 init.ReplyFreeQueueDepth = htole16(sc->fqdepth); 1174 init.SenseBufferAddressHigh = 0; 1175 init.SystemReplyAddressHigh = 0; 1176 init.SystemRequestFrameBaseAddress.High = 0; 1177 init.SystemRequestFrameBaseAddress.Low = htole32((uint32_t)sc->req_busaddr); 1178 init.ReplyDescriptorPostQueueAddress.High = 0; 1179 init.ReplyDescriptorPostQueueAddress.Low = htole32((uint32_t)sc->post_busaddr); 1180 init.ReplyFreeQueueAddress.High = 0; 1181 init.ReplyFreeQueueAddress.Low = htole32((uint32_t)sc->free_busaddr); 1182 getmicrotime(&now); 1183 time_in_msec = (now.tv_sec * 1000 + now.tv_usec/1000); 1184 init.TimeStamp.High = htole32((time_in_msec >> 32) & 0xFFFFFFFF); 1185 init.TimeStamp.Low = htole32(time_in_msec & 0xFFFFFFFF); 1186 1187 error = mps_request_sync(sc, &init, &reply, req_sz, reply_sz, 5); 1188 if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 1189 error = ENXIO; 1190 1191 mps_dprint(sc, MPS_INIT, "IOCInit status= 0x%x\n", reply.IOCStatus); 1192 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 1193 return (error); 1194 } 1195 1196 void 1197 mps_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1198 { 1199 bus_addr_t *addr; 1200 1201 addr = arg; 1202 *addr = segs[0].ds_addr; 1203 } 1204 1205 void 1206 mps_memaddr_wait_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1207 { 1208 struct mps_busdma_context *ctx; 1209 int need_unload, need_free; 1210 1211 ctx = (struct mps_busdma_context *)arg; 1212 need_unload = 0; 1213 need_free = 0; 1214 1215 mps_lock(ctx->softc); 1216 ctx->error = error; 1217 ctx->completed = 1; 1218 if ((error == 0) && (ctx->abandoned == 0)) { 1219 *ctx->addr = segs[0].ds_addr; 1220 } else { 1221 if (nsegs != 0) 1222 need_unload = 1; 1223 if (ctx->abandoned != 0) 1224 need_free = 1; 1225 } 1226 if (need_free == 0) 1227 wakeup(ctx); 1228 1229 mps_unlock(ctx->softc); 1230 1231 if (need_unload != 0) { 1232 bus_dmamap_unload(ctx->buffer_dmat, 1233 ctx->buffer_dmamap); 1234 *ctx->addr = 0; 1235 } 1236 1237 if (need_free != 0) 1238 free(ctx, M_MPSUSER); 1239 } 1240 1241 static int 1242 mps_alloc_queues(struct mps_softc *sc) 1243 { 1244 struct mps_queue *q; 1245 u_int nq, i; 1246 1247 nq = sc->msi_msgs; 1248 mps_dprint(sc, MPS_INIT|MPS_XINFO, "Allocating %d I/O queues\n", nq); 1249 1250 sc->queues = malloc(sizeof(struct mps_queue) * nq, M_MPT2, 1251 M_NOWAIT|M_ZERO); 1252 if (sc->queues == NULL) 1253 return (ENOMEM); 1254 1255 for (i = 0; i < nq; i++) { 1256 q = &sc->queues[i]; 1257 mps_dprint(sc, MPS_INIT, "Configuring queue %d %p\n", i, q); 1258 q->sc = sc; 1259 q->qnum = i; 1260 } 1261 1262 return (0); 1263 } 1264 1265 static int 1266 mps_alloc_hw_queues(struct mps_softc *sc) 1267 { 1268 bus_addr_t queues_busaddr; 1269 uint8_t *queues; 1270 int qsize, fqsize, pqsize; 1271 1272 /* 1273 * The reply free queue contains 4 byte entries in multiples of 16 and 1274 * aligned on a 16 byte boundary. There must always be an unused entry. 1275 * This queue supplies fresh reply frames for the firmware to use. 1276 * 1277 * The reply descriptor post queue contains 8 byte entries in 1278 * multiples of 16 and aligned on a 16 byte boundary. This queue 1279 * contains filled-in reply frames sent from the firmware to the host. 1280 * 1281 * These two queues are allocated together for simplicity. 1282 */ 1283 sc->fqdepth = roundup2(sc->num_replies + 1, 16); 1284 sc->pqdepth = roundup2(sc->num_replies + 1, 16); 1285 fqsize= sc->fqdepth * 4; 1286 pqsize = sc->pqdepth * 8; 1287 qsize = fqsize + pqsize; 1288 1289 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1290 16, 0, /* algnmnt, boundary */ 1291 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1292 BUS_SPACE_MAXADDR, /* highaddr */ 1293 NULL, NULL, /* filter, filterarg */ 1294 qsize, /* maxsize */ 1295 1, /* nsegments */ 1296 qsize, /* maxsegsize */ 1297 0, /* flags */ 1298 NULL, NULL, /* lockfunc, lockarg */ 1299 &sc->queues_dmat)) { 1300 mps_dprint(sc, MPS_ERROR, "Cannot allocate queues DMA tag\n"); 1301 return (ENOMEM); 1302 } 1303 if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT, 1304 &sc->queues_map)) { 1305 mps_dprint(sc, MPS_ERROR, "Cannot allocate queues memory\n"); 1306 return (ENOMEM); 1307 } 1308 bzero(queues, qsize); 1309 bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize, 1310 mps_memaddr_cb, &queues_busaddr, 0); 1311 1312 sc->free_queue = (uint32_t *)queues; 1313 sc->free_busaddr = queues_busaddr; 1314 sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize); 1315 sc->post_busaddr = queues_busaddr + fqsize; 1316 mps_dprint(sc, MPS_INIT, "free queue busaddr= %#016jx size= %d\n", 1317 (uintmax_t)sc->free_busaddr, fqsize); 1318 mps_dprint(sc, MPS_INIT, "reply queue busaddr= %#016jx size= %d\n", 1319 (uintmax_t)sc->post_busaddr, pqsize); 1320 1321 return (0); 1322 } 1323 1324 static int 1325 mps_alloc_replies(struct mps_softc *sc) 1326 { 1327 int rsize, num_replies; 1328 1329 /* Store the reply frame size in bytes rather than as 32bit words */ 1330 sc->replyframesz = sc->facts->ReplyFrameSize * 4; 1331 1332 /* 1333 * sc->num_replies should be one less than sc->fqdepth. We need to 1334 * allocate space for sc->fqdepth replies, but only sc->num_replies 1335 * replies can be used at once. 1336 */ 1337 num_replies = max(sc->fqdepth, sc->num_replies); 1338 1339 rsize = sc->replyframesz * num_replies; 1340 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1341 4, 0, /* algnmnt, boundary */ 1342 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1343 BUS_SPACE_MAXADDR, /* highaddr */ 1344 NULL, NULL, /* filter, filterarg */ 1345 rsize, /* maxsize */ 1346 1, /* nsegments */ 1347 rsize, /* maxsegsize */ 1348 0, /* flags */ 1349 NULL, NULL, /* lockfunc, lockarg */ 1350 &sc->reply_dmat)) { 1351 mps_dprint(sc, MPS_ERROR, "Cannot allocate replies DMA tag\n"); 1352 return (ENOMEM); 1353 } 1354 if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames, 1355 BUS_DMA_NOWAIT, &sc->reply_map)) { 1356 mps_dprint(sc, MPS_ERROR, "Cannot allocate replies memory\n"); 1357 return (ENOMEM); 1358 } 1359 bzero(sc->reply_frames, rsize); 1360 bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize, 1361 mps_memaddr_cb, &sc->reply_busaddr, 0); 1362 1363 mps_dprint(sc, MPS_INIT, "reply frames busaddr= %#016jx size= %d\n", 1364 (uintmax_t)sc->reply_busaddr, rsize); 1365 1366 return (0); 1367 } 1368 1369 static int 1370 mps_alloc_requests(struct mps_softc *sc) 1371 { 1372 struct mps_command *cm; 1373 struct mps_chain *chain; 1374 int i, rsize, nsegs; 1375 1376 rsize = sc->reqframesz * sc->num_reqs; 1377 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1378 16, 0, /* algnmnt, boundary */ 1379 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1380 BUS_SPACE_MAXADDR, /* highaddr */ 1381 NULL, NULL, /* filter, filterarg */ 1382 rsize, /* maxsize */ 1383 1, /* nsegments */ 1384 rsize, /* maxsegsize */ 1385 0, /* flags */ 1386 NULL, NULL, /* lockfunc, lockarg */ 1387 &sc->req_dmat)) { 1388 mps_dprint(sc, MPS_ERROR, "Cannot allocate request DMA tag\n"); 1389 return (ENOMEM); 1390 } 1391 if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames, 1392 BUS_DMA_NOWAIT, &sc->req_map)) { 1393 mps_dprint(sc, MPS_ERROR, "Cannot allocate request memory\n"); 1394 return (ENOMEM); 1395 } 1396 bzero(sc->req_frames, rsize); 1397 bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize, 1398 mps_memaddr_cb, &sc->req_busaddr, 0); 1399 mps_dprint(sc, MPS_INIT, "request frames busaddr= %#016jx size= %d\n", 1400 (uintmax_t)sc->req_busaddr, rsize); 1401 1402 rsize = sc->reqframesz * sc->num_chains; 1403 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1404 16, 0, /* algnmnt, boundary */ 1405 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1406 BUS_SPACE_MAXADDR, /* highaddr */ 1407 NULL, NULL, /* filter, filterarg */ 1408 rsize, /* maxsize */ 1409 1, /* nsegments */ 1410 rsize, /* maxsegsize */ 1411 0, /* flags */ 1412 NULL, NULL, /* lockfunc, lockarg */ 1413 &sc->chain_dmat)) { 1414 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain DMA tag\n"); 1415 return (ENOMEM); 1416 } 1417 if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames, 1418 BUS_DMA_NOWAIT, &sc->chain_map)) { 1419 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain memory\n"); 1420 return (ENOMEM); 1421 } 1422 bzero(sc->chain_frames, rsize); 1423 bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, rsize, 1424 mps_memaddr_cb, &sc->chain_busaddr, 0); 1425 mps_dprint(sc, MPS_INIT, "chain frames busaddr= %#016jx size= %d\n", 1426 (uintmax_t)sc->chain_busaddr, rsize); 1427 1428 rsize = MPS_SENSE_LEN * sc->num_reqs; 1429 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1430 1, 0, /* algnmnt, boundary */ 1431 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1432 BUS_SPACE_MAXADDR, /* highaddr */ 1433 NULL, NULL, /* filter, filterarg */ 1434 rsize, /* maxsize */ 1435 1, /* nsegments */ 1436 rsize, /* maxsegsize */ 1437 0, /* flags */ 1438 NULL, NULL, /* lockfunc, lockarg */ 1439 &sc->sense_dmat)) { 1440 mps_dprint(sc, MPS_ERROR, "Cannot allocate sense DMA tag\n"); 1441 return (ENOMEM); 1442 } 1443 if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames, 1444 BUS_DMA_NOWAIT, &sc->sense_map)) { 1445 mps_dprint(sc, MPS_ERROR, "Cannot allocate sense memory\n"); 1446 return (ENOMEM); 1447 } 1448 bzero(sc->sense_frames, rsize); 1449 bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize, 1450 mps_memaddr_cb, &sc->sense_busaddr, 0); 1451 mps_dprint(sc, MPS_INIT, "sense frames busaddr= %#016jx size= %d\n", 1452 (uintmax_t)sc->sense_busaddr, rsize); 1453 1454 sc->chains = malloc(sizeof(struct mps_chain) * sc->num_chains, M_MPT2, 1455 M_WAITOK | M_ZERO); 1456 if(!sc->chains) { 1457 mps_dprint(sc, MPS_ERROR, "Cannot allocate chains memory\n"); 1458 return (ENOMEM); 1459 } 1460 for (i = 0; i < sc->num_chains; i++) { 1461 chain = &sc->chains[i]; 1462 chain->chain = (MPI2_SGE_IO_UNION *)(sc->chain_frames + 1463 i * sc->reqframesz); 1464 chain->chain_busaddr = sc->chain_busaddr + 1465 i * sc->reqframesz; 1466 mps_free_chain(sc, chain); 1467 sc->chain_free_lowwater++; 1468 } 1469 1470 nsegs = (sc->maxio / PAGE_SIZE) + 1; 1471 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1472 1, 0, /* algnmnt, boundary */ 1473 BUS_SPACE_MAXADDR, /* lowaddr */ 1474 BUS_SPACE_MAXADDR, /* highaddr */ 1475 NULL, NULL, /* filter, filterarg */ 1476 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 1477 nsegs, /* nsegments */ 1478 BUS_SPACE_MAXSIZE_24BIT,/* maxsegsize */ 1479 BUS_DMA_ALLOCNOW, /* flags */ 1480 busdma_lock_mutex, /* lockfunc */ 1481 &sc->mps_mtx, /* lockarg */ 1482 &sc->buffer_dmat)) { 1483 mps_dprint(sc, MPS_ERROR, "Cannot allocate buffer DMA tag\n"); 1484 return (ENOMEM); 1485 } 1486 1487 /* 1488 * SMID 0 cannot be used as a free command per the firmware spec. 1489 * Just drop that command instead of risking accounting bugs. 1490 */ 1491 sc->commands = malloc(sizeof(struct mps_command) * sc->num_reqs, 1492 M_MPT2, M_WAITOK | M_ZERO); 1493 if(!sc->commands) { 1494 mps_dprint(sc, MPS_ERROR, "Cannot allocate command memory\n"); 1495 return (ENOMEM); 1496 } 1497 for (i = 1; i < sc->num_reqs; i++) { 1498 cm = &sc->commands[i]; 1499 cm->cm_req = sc->req_frames + i * sc->reqframesz; 1500 cm->cm_req_busaddr = sc->req_busaddr + i * sc->reqframesz; 1501 cm->cm_sense = &sc->sense_frames[i]; 1502 cm->cm_sense_busaddr = sc->sense_busaddr + i * MPS_SENSE_LEN; 1503 cm->cm_desc.Default.SMID = i; 1504 cm->cm_sc = sc; 1505 TAILQ_INIT(&cm->cm_chain_list); 1506 callout_init_mtx(&cm->cm_callout, &sc->mps_mtx, 0); 1507 1508 /* XXX Is a failure here a critical problem? */ 1509 if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0) 1510 if (i <= sc->num_prireqs) 1511 mps_free_high_priority_command(sc, cm); 1512 else 1513 mps_free_command(sc, cm); 1514 else { 1515 panic("failed to allocate command %d\n", i); 1516 sc->num_reqs = i; 1517 break; 1518 } 1519 } 1520 1521 return (0); 1522 } 1523 1524 static int 1525 mps_init_queues(struct mps_softc *sc) 1526 { 1527 int i; 1528 1529 memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8); 1530 1531 /* 1532 * According to the spec, we need to use one less reply than we 1533 * have space for on the queue. So sc->num_replies (the number we 1534 * use) should be less than sc->fqdepth (allocated size). 1535 */ 1536 if (sc->num_replies >= sc->fqdepth) 1537 return (EINVAL); 1538 1539 /* 1540 * Initialize all of the free queue entries. 1541 */ 1542 for (i = 0; i < sc->fqdepth; i++) 1543 sc->free_queue[i] = sc->reply_busaddr + (i * sc->replyframesz); 1544 sc->replyfreeindex = sc->num_replies; 1545 1546 return (0); 1547 } 1548 1549 /* Get the driver parameter tunables. Lowest priority are the driver defaults. 1550 * Next are the global settings, if they exist. Highest are the per-unit 1551 * settings, if they exist. 1552 */ 1553 void 1554 mps_get_tunables(struct mps_softc *sc) 1555 { 1556 char tmpstr[80], mps_debug[80]; 1557 1558 /* XXX default to some debugging for now */ 1559 sc->mps_debug = MPS_INFO|MPS_FAULT; 1560 sc->disable_msix = 0; 1561 sc->disable_msi = 0; 1562 sc->max_msix = MPS_MSIX_MAX; 1563 sc->max_chains = MPS_CHAIN_FRAMES; 1564 sc->max_io_pages = MPS_MAXIO_PAGES; 1565 sc->enable_ssu = MPS_SSU_ENABLE_SSD_DISABLE_HDD; 1566 sc->spinup_wait_time = DEFAULT_SPINUP_WAIT; 1567 sc->use_phynum = 1; 1568 sc->max_reqframes = MPS_REQ_FRAMES; 1569 sc->max_prireqframes = MPS_PRI_REQ_FRAMES; 1570 sc->max_replyframes = MPS_REPLY_FRAMES; 1571 sc->max_evtframes = MPS_EVT_REPLY_FRAMES; 1572 1573 /* 1574 * Grab the global variables. 1575 */ 1576 bzero(mps_debug, 80); 1577 if (TUNABLE_STR_FETCH("hw.mps.debug_level", mps_debug, 80) != 0) 1578 mps_parse_debug(sc, mps_debug); 1579 TUNABLE_INT_FETCH("hw.mps.disable_msix", &sc->disable_msix); 1580 TUNABLE_INT_FETCH("hw.mps.disable_msi", &sc->disable_msi); 1581 TUNABLE_INT_FETCH("hw.mps.max_msix", &sc->max_msix); 1582 TUNABLE_INT_FETCH("hw.mps.max_chains", &sc->max_chains); 1583 TUNABLE_INT_FETCH("hw.mps.max_io_pages", &sc->max_io_pages); 1584 TUNABLE_INT_FETCH("hw.mps.enable_ssu", &sc->enable_ssu); 1585 TUNABLE_INT_FETCH("hw.mps.spinup_wait_time", &sc->spinup_wait_time); 1586 TUNABLE_INT_FETCH("hw.mps.use_phy_num", &sc->use_phynum); 1587 TUNABLE_INT_FETCH("hw.mps.max_reqframes", &sc->max_reqframes); 1588 TUNABLE_INT_FETCH("hw.mps.max_prireqframes", &sc->max_prireqframes); 1589 TUNABLE_INT_FETCH("hw.mps.max_replyframes", &sc->max_replyframes); 1590 TUNABLE_INT_FETCH("hw.mps.max_evtframes", &sc->max_evtframes); 1591 1592 /* Grab the unit-instance variables */ 1593 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.debug_level", 1594 device_get_unit(sc->mps_dev)); 1595 bzero(mps_debug, 80); 1596 if (TUNABLE_STR_FETCH(tmpstr, mps_debug, 80) != 0) 1597 mps_parse_debug(sc, mps_debug); 1598 1599 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msix", 1600 device_get_unit(sc->mps_dev)); 1601 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix); 1602 1603 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msi", 1604 device_get_unit(sc->mps_dev)); 1605 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi); 1606 1607 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_msix", 1608 device_get_unit(sc->mps_dev)); 1609 TUNABLE_INT_FETCH(tmpstr, &sc->max_msix); 1610 1611 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_chains", 1612 device_get_unit(sc->mps_dev)); 1613 TUNABLE_INT_FETCH(tmpstr, &sc->max_chains); 1614 1615 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_io_pages", 1616 device_get_unit(sc->mps_dev)); 1617 TUNABLE_INT_FETCH(tmpstr, &sc->max_io_pages); 1618 1619 bzero(sc->exclude_ids, sizeof(sc->exclude_ids)); 1620 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.exclude_ids", 1621 device_get_unit(sc->mps_dev)); 1622 TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids)); 1623 1624 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.enable_ssu", 1625 device_get_unit(sc->mps_dev)); 1626 TUNABLE_INT_FETCH(tmpstr, &sc->enable_ssu); 1627 1628 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.spinup_wait_time", 1629 device_get_unit(sc->mps_dev)); 1630 TUNABLE_INT_FETCH(tmpstr, &sc->spinup_wait_time); 1631 1632 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.use_phy_num", 1633 device_get_unit(sc->mps_dev)); 1634 TUNABLE_INT_FETCH(tmpstr, &sc->use_phynum); 1635 1636 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_reqframes", 1637 device_get_unit(sc->mps_dev)); 1638 TUNABLE_INT_FETCH(tmpstr, &sc->max_reqframes); 1639 1640 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_prireqframes", 1641 device_get_unit(sc->mps_dev)); 1642 TUNABLE_INT_FETCH(tmpstr, &sc->max_prireqframes); 1643 1644 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_replyframes", 1645 device_get_unit(sc->mps_dev)); 1646 TUNABLE_INT_FETCH(tmpstr, &sc->max_replyframes); 1647 1648 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_evtframes", 1649 device_get_unit(sc->mps_dev)); 1650 TUNABLE_INT_FETCH(tmpstr, &sc->max_evtframes); 1651 1652 } 1653 1654 static void 1655 mps_setup_sysctl(struct mps_softc *sc) 1656 { 1657 struct sysctl_ctx_list *sysctl_ctx = NULL; 1658 struct sysctl_oid *sysctl_tree = NULL; 1659 char tmpstr[80], tmpstr2[80]; 1660 1661 /* 1662 * Setup the sysctl variable so the user can change the debug level 1663 * on the fly. 1664 */ 1665 snprintf(tmpstr, sizeof(tmpstr), "MPS controller %d", 1666 device_get_unit(sc->mps_dev)); 1667 snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mps_dev)); 1668 1669 sysctl_ctx = device_get_sysctl_ctx(sc->mps_dev); 1670 if (sysctl_ctx != NULL) 1671 sysctl_tree = device_get_sysctl_tree(sc->mps_dev); 1672 1673 if (sysctl_tree == NULL) { 1674 sysctl_ctx_init(&sc->sysctl_ctx); 1675 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx, 1676 SYSCTL_STATIC_CHILDREN(_hw_mps), OID_AUTO, tmpstr2, 1677 CTLFLAG_RD, 0, tmpstr); 1678 if (sc->sysctl_tree == NULL) 1679 return; 1680 sysctl_ctx = &sc->sysctl_ctx; 1681 sysctl_tree = sc->sysctl_tree; 1682 } 1683 1684 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1685 OID_AUTO, "debug_level", CTLTYPE_STRING | CTLFLAG_RW |CTLFLAG_MPSAFE, 1686 sc, 0, mps_debug_sysctl, "A", "mps debug level"); 1687 1688 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1689 OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0, 1690 "Disable the use of MSI-X interrupts"); 1691 1692 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1693 OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0, 1694 "Disable the use of MSI interrupts"); 1695 1696 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1697 OID_AUTO, "max_msix", CTLFLAG_RD, &sc->max_msix, 0, 1698 "User-defined maximum number of MSIX queues"); 1699 1700 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1701 OID_AUTO, "msix_msgs", CTLFLAG_RD, &sc->msi_msgs, 0, 1702 "Negotiated number of MSIX queues"); 1703 1704 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1705 OID_AUTO, "max_reqframes", CTLFLAG_RD, &sc->max_reqframes, 0, 1706 "Total number of allocated request frames"); 1707 1708 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1709 OID_AUTO, "max_prireqframes", CTLFLAG_RD, &sc->max_prireqframes, 0, 1710 "Total number of allocated high priority request frames"); 1711 1712 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1713 OID_AUTO, "max_replyframes", CTLFLAG_RD, &sc->max_replyframes, 0, 1714 "Total number of allocated reply frames"); 1715 1716 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1717 OID_AUTO, "max_evtframes", CTLFLAG_RD, &sc->max_evtframes, 0, 1718 "Total number of event frames allocated"); 1719 1720 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1721 OID_AUTO, "firmware_version", CTLFLAG_RW, sc->fw_version, 1722 strlen(sc->fw_version), "firmware version"); 1723 1724 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1725 OID_AUTO, "driver_version", CTLFLAG_RW, MPS_DRIVER_VERSION, 1726 strlen(MPS_DRIVER_VERSION), "driver version"); 1727 1728 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1729 OID_AUTO, "io_cmds_active", CTLFLAG_RD, 1730 &sc->io_cmds_active, 0, "number of currently active commands"); 1731 1732 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1733 OID_AUTO, "io_cmds_highwater", CTLFLAG_RD, 1734 &sc->io_cmds_highwater, 0, "maximum active commands seen"); 1735 1736 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1737 OID_AUTO, "chain_free", CTLFLAG_RD, 1738 &sc->chain_free, 0, "number of free chain elements"); 1739 1740 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1741 OID_AUTO, "chain_free_lowwater", CTLFLAG_RD, 1742 &sc->chain_free_lowwater, 0,"lowest number of free chain elements"); 1743 1744 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1745 OID_AUTO, "max_chains", CTLFLAG_RD, 1746 &sc->max_chains, 0,"maximum chain frames that will be allocated"); 1747 1748 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1749 OID_AUTO, "max_io_pages", CTLFLAG_RD, 1750 &sc->max_io_pages, 0,"maximum pages to allow per I/O (if <1 use " 1751 "IOCFacts)"); 1752 1753 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1754 OID_AUTO, "enable_ssu", CTLFLAG_RW, &sc->enable_ssu, 0, 1755 "enable SSU to SATA SSD/HDD at shutdown"); 1756 1757 SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1758 OID_AUTO, "chain_alloc_fail", CTLFLAG_RD, 1759 &sc->chain_alloc_fail, "chain allocation failures"); 1760 1761 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1762 OID_AUTO, "spinup_wait_time", CTLFLAG_RD, 1763 &sc->spinup_wait_time, DEFAULT_SPINUP_WAIT, "seconds to wait for " 1764 "spinup after SATA ID error"); 1765 1766 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1767 OID_AUTO, "mapping_table_dump", CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 1768 mps_mapping_dump, "A", "Mapping Table Dump"); 1769 1770 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1771 OID_AUTO, "encl_table_dump", CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 1772 mps_mapping_encl_dump, "A", "Enclosure Table Dump"); 1773 1774 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1775 OID_AUTO, "use_phy_num", CTLFLAG_RD, &sc->use_phynum, 0, 1776 "Use the phy number for enumeration"); 1777 } 1778 1779 static struct mps_debug_string { 1780 char *name; 1781 int flag; 1782 } mps_debug_strings[] = { 1783 {"info", MPS_INFO}, 1784 {"fault", MPS_FAULT}, 1785 {"event", MPS_EVENT}, 1786 {"log", MPS_LOG}, 1787 {"recovery", MPS_RECOVERY}, 1788 {"error", MPS_ERROR}, 1789 {"init", MPS_INIT}, 1790 {"xinfo", MPS_XINFO}, 1791 {"user", MPS_USER}, 1792 {"mapping", MPS_MAPPING}, 1793 {"trace", MPS_TRACE} 1794 }; 1795 1796 enum mps_debug_level_combiner { 1797 COMB_NONE, 1798 COMB_ADD, 1799 COMB_SUB 1800 }; 1801 1802 static int 1803 mps_debug_sysctl(SYSCTL_HANDLER_ARGS) 1804 { 1805 struct mps_softc *sc; 1806 struct mps_debug_string *string; 1807 struct sbuf *sbuf; 1808 char *buffer; 1809 size_t sz; 1810 int i, len, debug, error; 1811 1812 sc = (struct mps_softc *)arg1; 1813 1814 error = sysctl_wire_old_buffer(req, 0); 1815 if (error != 0) 1816 return (error); 1817 1818 sbuf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 1819 debug = sc->mps_debug; 1820 1821 sbuf_printf(sbuf, "%#x", debug); 1822 1823 sz = sizeof(mps_debug_strings) / sizeof(mps_debug_strings[0]); 1824 for (i = 0; i < sz; i++) { 1825 string = &mps_debug_strings[i]; 1826 if (debug & string->flag) 1827 sbuf_printf(sbuf, ",%s", string->name); 1828 } 1829 1830 error = sbuf_finish(sbuf); 1831 sbuf_delete(sbuf); 1832 1833 if (error || req->newptr == NULL) 1834 return (error); 1835 1836 len = req->newlen - req->newidx; 1837 if (len == 0) 1838 return (0); 1839 1840 buffer = malloc(len, M_MPT2, M_ZERO|M_WAITOK); 1841 error = SYSCTL_IN(req, buffer, len); 1842 1843 mps_parse_debug(sc, buffer); 1844 1845 free(buffer, M_MPT2); 1846 return (error); 1847 } 1848 1849 static void 1850 mps_parse_debug(struct mps_softc *sc, char *list) 1851 { 1852 struct mps_debug_string *string; 1853 enum mps_debug_level_combiner op; 1854 char *token, *endtoken; 1855 size_t sz; 1856 int flags, i; 1857 1858 if (list == NULL || *list == '\0') 1859 return; 1860 1861 if (*list == '+') { 1862 op = COMB_ADD; 1863 list++; 1864 } else if (*list == '-') { 1865 op = COMB_SUB; 1866 list++; 1867 } else 1868 op = COMB_NONE; 1869 if (*list == '\0') 1870 return; 1871 1872 flags = 0; 1873 sz = sizeof(mps_debug_strings) / sizeof(mps_debug_strings[0]); 1874 while ((token = strsep(&list, ":,")) != NULL) { 1875 1876 /* Handle integer flags */ 1877 flags |= strtol(token, &endtoken, 0); 1878 if (token != endtoken) 1879 continue; 1880 1881 /* Handle text flags */ 1882 for (i = 0; i < sz; i++) { 1883 string = &mps_debug_strings[i]; 1884 if (strcasecmp(token, string->name) == 0) { 1885 flags |= string->flag; 1886 break; 1887 } 1888 } 1889 } 1890 1891 switch (op) { 1892 case COMB_NONE: 1893 sc->mps_debug = flags; 1894 break; 1895 case COMB_ADD: 1896 sc->mps_debug |= flags; 1897 break; 1898 case COMB_SUB: 1899 sc->mps_debug &= (~flags); 1900 break; 1901 } 1902 1903 return; 1904 } 1905 1906 int 1907 mps_attach(struct mps_softc *sc) 1908 { 1909 int error; 1910 1911 MPS_FUNCTRACE(sc); 1912 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1913 1914 mtx_init(&sc->mps_mtx, "MPT2SAS lock", NULL, MTX_DEF); 1915 callout_init_mtx(&sc->periodic, &sc->mps_mtx, 0); 1916 callout_init_mtx(&sc->device_check_callout, &sc->mps_mtx, 0); 1917 TAILQ_INIT(&sc->event_list); 1918 timevalclear(&sc->lastfail); 1919 1920 if ((error = mps_transition_ready(sc)) != 0) { 1921 mps_dprint(sc, MPS_INIT|MPS_FAULT, "failed to transition " 1922 "ready\n"); 1923 return (error); 1924 } 1925 1926 sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPT2, 1927 M_ZERO|M_NOWAIT); 1928 if(!sc->facts) { 1929 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Cannot allocate memory, " 1930 "exit\n"); 1931 return (ENOMEM); 1932 } 1933 1934 /* 1935 * Get IOC Facts and allocate all structures based on this information. 1936 * A Diag Reset will also call mps_iocfacts_allocate and re-read the IOC 1937 * Facts. If relevant values have changed in IOC Facts, this function 1938 * will free all of the memory based on IOC Facts and reallocate that 1939 * memory. If this fails, any allocated memory should already be freed. 1940 */ 1941 if ((error = mps_iocfacts_allocate(sc, TRUE)) != 0) { 1942 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC Facts based allocation " 1943 "failed with error %d, exit\n", error); 1944 return (error); 1945 } 1946 1947 /* Start the periodic watchdog check on the IOC Doorbell */ 1948 mps_periodic(sc); 1949 1950 /* 1951 * The portenable will kick off discovery events that will drive the 1952 * rest of the initialization process. The CAM/SAS module will 1953 * hold up the boot sequence until discovery is complete. 1954 */ 1955 sc->mps_ich.ich_func = mps_startup; 1956 sc->mps_ich.ich_arg = sc; 1957 if (config_intrhook_establish(&sc->mps_ich) != 0) { 1958 mps_dprint(sc, MPS_INIT|MPS_ERROR, 1959 "Cannot establish MPS config hook\n"); 1960 error = EINVAL; 1961 } 1962 1963 /* 1964 * Allow IR to shutdown gracefully when shutdown occurs. 1965 */ 1966 sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final, 1967 mpssas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT); 1968 1969 if (sc->shutdown_eh == NULL) 1970 mps_dprint(sc, MPS_INIT|MPS_ERROR, 1971 "shutdown event registration failed\n"); 1972 1973 mps_setup_sysctl(sc); 1974 1975 sc->mps_flags |= MPS_FLAGS_ATTACH_DONE; 1976 mps_dprint(sc, MPS_INIT, "%s exit error= %d\n", __func__, error); 1977 1978 return (error); 1979 } 1980 1981 /* Run through any late-start handlers. */ 1982 static void 1983 mps_startup(void *arg) 1984 { 1985 struct mps_softc *sc; 1986 1987 sc = (struct mps_softc *)arg; 1988 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1989 1990 mps_lock(sc); 1991 mps_unmask_intr(sc); 1992 1993 /* initialize device mapping tables */ 1994 mps_base_static_config_pages(sc); 1995 mps_mapping_initialize(sc); 1996 mpssas_startup(sc); 1997 mps_unlock(sc); 1998 1999 mps_dprint(sc, MPS_INIT, "disestablish config intrhook\n"); 2000 config_intrhook_disestablish(&sc->mps_ich); 2001 sc->mps_ich.ich_arg = NULL; 2002 2003 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 2004 } 2005 2006 /* Periodic watchdog. Is called with the driver lock already held. */ 2007 static void 2008 mps_periodic(void *arg) 2009 { 2010 struct mps_softc *sc; 2011 uint32_t db; 2012 2013 sc = (struct mps_softc *)arg; 2014 if (sc->mps_flags & MPS_FLAGS_SHUTDOWN) 2015 return; 2016 2017 db = mps_regread(sc, MPI2_DOORBELL_OFFSET); 2018 if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 2019 mps_dprint(sc, MPS_FAULT, "IOC Fault 0x%08x, Resetting\n", db); 2020 mps_reinit(sc); 2021 } 2022 2023 callout_reset(&sc->periodic, MPS_PERIODIC_DELAY * hz, mps_periodic, sc); 2024 } 2025 2026 static void 2027 mps_log_evt_handler(struct mps_softc *sc, uintptr_t data, 2028 MPI2_EVENT_NOTIFICATION_REPLY *event) 2029 { 2030 MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry; 2031 2032 MPS_DPRINT_EVENT(sc, generic, event); 2033 2034 switch (event->Event) { 2035 case MPI2_EVENT_LOG_DATA: 2036 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_DATA:\n"); 2037 if (sc->mps_debug & MPS_EVENT) 2038 hexdump(event->EventData, event->EventDataLength, NULL, 0); 2039 break; 2040 case MPI2_EVENT_LOG_ENTRY_ADDED: 2041 entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData; 2042 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_ENTRY_ADDED event " 2043 "0x%x Sequence %d:\n", entry->LogEntryQualifier, 2044 entry->LogSequence); 2045 break; 2046 default: 2047 break; 2048 } 2049 return; 2050 } 2051 2052 static int 2053 mps_attach_log(struct mps_softc *sc) 2054 { 2055 u32 events[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 2056 2057 bzero(events, 16); 2058 setbit(events, MPI2_EVENT_LOG_DATA); 2059 setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED); 2060 2061 mps_register_events(sc, events, mps_log_evt_handler, NULL, 2062 &sc->mps_log_eh); 2063 2064 return (0); 2065 } 2066 2067 static int 2068 mps_detach_log(struct mps_softc *sc) 2069 { 2070 2071 if (sc->mps_log_eh != NULL) 2072 mps_deregister_events(sc, sc->mps_log_eh); 2073 return (0); 2074 } 2075 2076 /* 2077 * Free all of the driver resources and detach submodules. Should be called 2078 * without the lock held. 2079 */ 2080 int 2081 mps_free(struct mps_softc *sc) 2082 { 2083 int error; 2084 2085 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 2086 /* Turn off the watchdog */ 2087 mps_lock(sc); 2088 sc->mps_flags |= MPS_FLAGS_SHUTDOWN; 2089 mps_unlock(sc); 2090 /* Lock must not be held for this */ 2091 callout_drain(&sc->periodic); 2092 callout_drain(&sc->device_check_callout); 2093 2094 if (((error = mps_detach_log(sc)) != 0) || 2095 ((error = mps_detach_sas(sc)) != 0)) { 2096 mps_dprint(sc, MPS_INIT|MPS_FAULT, "failed to detach " 2097 "subsystems, exit\n"); 2098 return (error); 2099 } 2100 2101 mps_detach_user(sc); 2102 2103 /* Put the IOC back in the READY state. */ 2104 mps_lock(sc); 2105 if ((error = mps_transition_ready(sc)) != 0) { 2106 mps_unlock(sc); 2107 return (error); 2108 } 2109 mps_unlock(sc); 2110 2111 if (sc->facts != NULL) 2112 free(sc->facts, M_MPT2); 2113 2114 /* 2115 * Free all buffers that are based on IOC Facts. A Diag Reset may need 2116 * to free these buffers too. 2117 */ 2118 mps_iocfacts_free(sc); 2119 2120 if (sc->sysctl_tree != NULL) 2121 sysctl_ctx_free(&sc->sysctl_ctx); 2122 2123 /* Deregister the shutdown function */ 2124 if (sc->shutdown_eh != NULL) 2125 EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh); 2126 2127 mtx_destroy(&sc->mps_mtx); 2128 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 2129 2130 return (0); 2131 } 2132 2133 static __inline void 2134 mps_complete_command(struct mps_softc *sc, struct mps_command *cm) 2135 { 2136 MPS_FUNCTRACE(sc); 2137 2138 if (cm == NULL) { 2139 mps_dprint(sc, MPS_ERROR, "Completing NULL command\n"); 2140 return; 2141 } 2142 2143 if (cm->cm_flags & MPS_CM_FLAGS_POLLED) 2144 cm->cm_flags |= MPS_CM_FLAGS_COMPLETE; 2145 2146 if (cm->cm_complete != NULL) { 2147 mps_dprint(sc, MPS_TRACE, 2148 "%s cm %p calling cm_complete %p data %p reply %p\n", 2149 __func__, cm, cm->cm_complete, cm->cm_complete_data, 2150 cm->cm_reply); 2151 cm->cm_complete(sc, cm); 2152 } 2153 2154 if (cm->cm_flags & MPS_CM_FLAGS_WAKEUP) { 2155 mps_dprint(sc, MPS_TRACE, "waking up %p\n", cm); 2156 wakeup(cm); 2157 } 2158 2159 if (cm->cm_sc->io_cmds_active != 0) { 2160 cm->cm_sc->io_cmds_active--; 2161 } else { 2162 mps_dprint(sc, MPS_ERROR, "Warning: io_cmds_active is " 2163 "out of sync - resynching to 0\n"); 2164 } 2165 } 2166 2167 2168 static void 2169 mps_sas_log_info(struct mps_softc *sc , u32 log_info) 2170 { 2171 union loginfo_type { 2172 u32 loginfo; 2173 struct { 2174 u32 subcode:16; 2175 u32 code:8; 2176 u32 originator:4; 2177 u32 bus_type:4; 2178 } dw; 2179 }; 2180 union loginfo_type sas_loginfo; 2181 char *originator_str = NULL; 2182 2183 sas_loginfo.loginfo = log_info; 2184 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 2185 return; 2186 2187 /* each nexus loss loginfo */ 2188 if (log_info == 0x31170000) 2189 return; 2190 2191 /* eat the loginfos associated with task aborts */ 2192 if ((log_info == 30050000 || log_info == 2193 0x31140000 || log_info == 0x31130000)) 2194 return; 2195 2196 switch (sas_loginfo.dw.originator) { 2197 case 0: 2198 originator_str = "IOP"; 2199 break; 2200 case 1: 2201 originator_str = "PL"; 2202 break; 2203 case 2: 2204 originator_str = "IR"; 2205 break; 2206 } 2207 2208 mps_dprint(sc, MPS_LOG, "log_info(0x%08x): originator(%s), " 2209 "code(0x%02x), sub_code(0x%04x)\n", log_info, 2210 originator_str, sas_loginfo.dw.code, 2211 sas_loginfo.dw.subcode); 2212 } 2213 2214 static void 2215 mps_display_reply_info(struct mps_softc *sc, uint8_t *reply) 2216 { 2217 MPI2DefaultReply_t *mpi_reply; 2218 u16 sc_status; 2219 2220 mpi_reply = (MPI2DefaultReply_t*)reply; 2221 sc_status = le16toh(mpi_reply->IOCStatus); 2222 if (sc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 2223 mps_sas_log_info(sc, le32toh(mpi_reply->IOCLogInfo)); 2224 } 2225 void 2226 mps_intr(void *data) 2227 { 2228 struct mps_softc *sc; 2229 uint32_t status; 2230 2231 sc = (struct mps_softc *)data; 2232 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2233 2234 /* 2235 * Check interrupt status register to flush the bus. This is 2236 * needed for both INTx interrupts and driver-driven polling 2237 */ 2238 status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 2239 if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0) 2240 return; 2241 2242 mps_lock(sc); 2243 mps_intr_locked(data); 2244 mps_unlock(sc); 2245 return; 2246 } 2247 2248 /* 2249 * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the 2250 * chip. Hopefully this theory is correct. 2251 */ 2252 void 2253 mps_intr_msi(void *data) 2254 { 2255 struct mps_softc *sc; 2256 2257 sc = (struct mps_softc *)data; 2258 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2259 mps_lock(sc); 2260 mps_intr_locked(data); 2261 mps_unlock(sc); 2262 return; 2263 } 2264 2265 /* 2266 * The locking is overly broad and simplistic, but easy to deal with for now. 2267 */ 2268 void 2269 mps_intr_locked(void *data) 2270 { 2271 MPI2_REPLY_DESCRIPTORS_UNION *desc; 2272 struct mps_softc *sc; 2273 struct mps_command *cm = NULL; 2274 uint8_t flags; 2275 u_int pq; 2276 MPI2_DIAG_RELEASE_REPLY *rel_rep; 2277 mps_fw_diagnostic_buffer_t *pBuffer; 2278 2279 sc = (struct mps_softc *)data; 2280 2281 pq = sc->replypostindex; 2282 mps_dprint(sc, MPS_TRACE, 2283 "%s sc %p starting with replypostindex %u\n", 2284 __func__, sc, sc->replypostindex); 2285 2286 for ( ;; ) { 2287 cm = NULL; 2288 desc = &sc->post_queue[sc->replypostindex]; 2289 flags = desc->Default.ReplyFlags & 2290 MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 2291 if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 2292 || (le32toh(desc->Words.High) == 0xffffffff)) 2293 break; 2294 2295 /* increment the replypostindex now, so that event handlers 2296 * and cm completion handlers which decide to do a diag 2297 * reset can zero it without it getting incremented again 2298 * afterwards, and we break out of this loop on the next 2299 * iteration since the reply post queue has been cleared to 2300 * 0xFF and all descriptors look unused (which they are). 2301 */ 2302 if (++sc->replypostindex >= sc->pqdepth) 2303 sc->replypostindex = 0; 2304 2305 switch (flags) { 2306 case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS: 2307 cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)]; 2308 cm->cm_reply = NULL; 2309 break; 2310 case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY: 2311 { 2312 uint32_t baddr; 2313 uint8_t *reply; 2314 2315 /* 2316 * Re-compose the reply address from the address 2317 * sent back from the chip. The ReplyFrameAddress 2318 * is the lower 32 bits of the physical address of 2319 * particular reply frame. Convert that address to 2320 * host format, and then use that to provide the 2321 * offset against the virtual address base 2322 * (sc->reply_frames). 2323 */ 2324 baddr = le32toh(desc->AddressReply.ReplyFrameAddress); 2325 reply = sc->reply_frames + 2326 (baddr - ((uint32_t)sc->reply_busaddr)); 2327 /* 2328 * Make sure the reply we got back is in a valid 2329 * range. If not, go ahead and panic here, since 2330 * we'll probably panic as soon as we deference the 2331 * reply pointer anyway. 2332 */ 2333 if ((reply < sc->reply_frames) 2334 || (reply > (sc->reply_frames + 2335 (sc->fqdepth * sc->replyframesz)))) { 2336 printf("%s: WARNING: reply %p out of range!\n", 2337 __func__, reply); 2338 printf("%s: reply_frames %p, fqdepth %d, " 2339 "frame size %d\n", __func__, 2340 sc->reply_frames, sc->fqdepth, 2341 sc->replyframesz); 2342 printf("%s: baddr %#x,\n", __func__, baddr); 2343 /* LSI-TODO. See Linux Code. Need Graceful exit*/ 2344 panic("Reply address out of range"); 2345 } 2346 if (le16toh(desc->AddressReply.SMID) == 0) { 2347 if (((MPI2_DEFAULT_REPLY *)reply)->Function == 2348 MPI2_FUNCTION_DIAG_BUFFER_POST) { 2349 /* 2350 * If SMID is 0 for Diag Buffer Post, 2351 * this implies that the reply is due to 2352 * a release function with a status that 2353 * the buffer has been released. Set 2354 * the buffer flags accordingly. 2355 */ 2356 rel_rep = 2357 (MPI2_DIAG_RELEASE_REPLY *)reply; 2358 if ((le16toh(rel_rep->IOCStatus) & 2359 MPI2_IOCSTATUS_MASK) == 2360 MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED) 2361 { 2362 pBuffer = 2363 &sc->fw_diag_buffer_list[ 2364 rel_rep->BufferType]; 2365 pBuffer->valid_data = TRUE; 2366 pBuffer->owned_by_firmware = 2367 FALSE; 2368 pBuffer->immediate = FALSE; 2369 } 2370 } else 2371 mps_dispatch_event(sc, baddr, 2372 (MPI2_EVENT_NOTIFICATION_REPLY *) 2373 reply); 2374 } else { 2375 cm = &sc->commands[le16toh(desc->AddressReply.SMID)]; 2376 cm->cm_reply = reply; 2377 cm->cm_reply_data = 2378 le32toh(desc->AddressReply.ReplyFrameAddress); 2379 } 2380 break; 2381 } 2382 case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS: 2383 case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER: 2384 case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS: 2385 default: 2386 /* Unhandled */ 2387 mps_dprint(sc, MPS_ERROR, "Unhandled reply 0x%x\n", 2388 desc->Default.ReplyFlags); 2389 cm = NULL; 2390 break; 2391 } 2392 2393 2394 if (cm != NULL) { 2395 // Print Error reply frame 2396 if (cm->cm_reply) 2397 mps_display_reply_info(sc,cm->cm_reply); 2398 mps_complete_command(sc, cm); 2399 } 2400 2401 desc->Words.Low = 0xffffffff; 2402 desc->Words.High = 0xffffffff; 2403 } 2404 2405 if (pq != sc->replypostindex) { 2406 mps_dprint(sc, MPS_TRACE, 2407 "%s sc %p writing postindex %d\n", 2408 __func__, sc, sc->replypostindex); 2409 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, sc->replypostindex); 2410 } 2411 2412 return; 2413 } 2414 2415 static void 2416 mps_dispatch_event(struct mps_softc *sc, uintptr_t data, 2417 MPI2_EVENT_NOTIFICATION_REPLY *reply) 2418 { 2419 struct mps_event_handle *eh; 2420 int event, handled = 0; 2421 2422 event = le16toh(reply->Event); 2423 TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2424 if (isset(eh->mask, event)) { 2425 eh->callback(sc, data, reply); 2426 handled++; 2427 } 2428 } 2429 2430 if (handled == 0) 2431 mps_dprint(sc, MPS_EVENT, "Unhandled event 0x%x\n", le16toh(event)); 2432 2433 /* 2434 * This is the only place that the event/reply should be freed. 2435 * Anything wanting to hold onto the event data should have 2436 * already copied it into their own storage. 2437 */ 2438 mps_free_reply(sc, data); 2439 } 2440 2441 static void 2442 mps_reregister_events_complete(struct mps_softc *sc, struct mps_command *cm) 2443 { 2444 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2445 2446 if (cm->cm_reply) 2447 MPS_DPRINT_EVENT(sc, generic, 2448 (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply); 2449 2450 mps_free_command(sc, cm); 2451 2452 /* next, send a port enable */ 2453 mpssas_startup(sc); 2454 } 2455 2456 /* 2457 * For both register_events and update_events, the caller supplies a bitmap 2458 * of events that it _wants_. These functions then turn that into a bitmask 2459 * suitable for the controller. 2460 */ 2461 int 2462 mps_register_events(struct mps_softc *sc, u32 *mask, 2463 mps_evt_callback_t *cb, void *data, struct mps_event_handle **handle) 2464 { 2465 struct mps_event_handle *eh; 2466 int error = 0; 2467 2468 eh = malloc(sizeof(struct mps_event_handle), M_MPT2, M_WAITOK|M_ZERO); 2469 if(!eh) { 2470 mps_dprint(sc, MPS_ERROR, "Cannot allocate event memory\n"); 2471 return (ENOMEM); 2472 } 2473 eh->callback = cb; 2474 eh->data = data; 2475 TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list); 2476 if (mask != NULL) 2477 error = mps_update_events(sc, eh, mask); 2478 *handle = eh; 2479 2480 return (error); 2481 } 2482 2483 int 2484 mps_update_events(struct mps_softc *sc, struct mps_event_handle *handle, 2485 u32 *mask) 2486 { 2487 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2488 MPI2_EVENT_NOTIFICATION_REPLY *reply = NULL; 2489 struct mps_command *cm; 2490 int error, i; 2491 2492 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2493 2494 if ((mask != NULL) && (handle != NULL)) 2495 bcopy(mask, &handle->mask[0], sizeof(u32) * 2496 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2497 2498 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2499 sc->event_mask[i] = -1; 2500 2501 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2502 sc->event_mask[i] &= ~handle->mask[i]; 2503 2504 2505 if ((cm = mps_alloc_command(sc)) == NULL) 2506 return (EBUSY); 2507 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2508 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2509 evtreq->MsgFlags = 0; 2510 evtreq->SASBroadcastPrimitiveMasks = 0; 2511 #ifdef MPS_DEBUG_ALL_EVENTS 2512 { 2513 u_char fullmask[16]; 2514 memset(fullmask, 0x00, 16); 2515 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) * 2516 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2517 } 2518 #else 2519 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2520 evtreq->EventMasks[i] = 2521 htole32(sc->event_mask[i]); 2522 #endif 2523 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2524 cm->cm_data = NULL; 2525 2526 error = mps_wait_command(sc, &cm, 60, 0); 2527 if (cm != NULL) 2528 reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply; 2529 if ((reply == NULL) || 2530 (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 2531 error = ENXIO; 2532 2533 if (reply) 2534 MPS_DPRINT_EVENT(sc, generic, reply); 2535 2536 mps_dprint(sc, MPS_TRACE, "%s finished error %d\n", __func__, error); 2537 2538 if (cm != NULL) 2539 mps_free_command(sc, cm); 2540 return (error); 2541 } 2542 2543 static int 2544 mps_reregister_events(struct mps_softc *sc) 2545 { 2546 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2547 struct mps_command *cm; 2548 struct mps_event_handle *eh; 2549 int error, i; 2550 2551 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2552 2553 /* first, reregister events */ 2554 2555 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2556 sc->event_mask[i] = -1; 2557 2558 TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2559 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2560 sc->event_mask[i] &= ~eh->mask[i]; 2561 } 2562 2563 if ((cm = mps_alloc_command(sc)) == NULL) 2564 return (EBUSY); 2565 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2566 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2567 evtreq->MsgFlags = 0; 2568 evtreq->SASBroadcastPrimitiveMasks = 0; 2569 #ifdef MPS_DEBUG_ALL_EVENTS 2570 { 2571 u_char fullmask[16]; 2572 memset(fullmask, 0x00, 16); 2573 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) * 2574 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2575 } 2576 #else 2577 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2578 evtreq->EventMasks[i] = 2579 htole32(sc->event_mask[i]); 2580 #endif 2581 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2582 cm->cm_data = NULL; 2583 cm->cm_complete = mps_reregister_events_complete; 2584 2585 error = mps_map_command(sc, cm); 2586 2587 mps_dprint(sc, MPS_TRACE, "%s finished with error %d\n", __func__, 2588 error); 2589 return (error); 2590 } 2591 2592 void 2593 mps_deregister_events(struct mps_softc *sc, struct mps_event_handle *handle) 2594 { 2595 2596 TAILQ_REMOVE(&sc->event_list, handle, eh_list); 2597 free(handle, M_MPT2); 2598 } 2599 2600 /* 2601 * Add a chain element as the next SGE for the specified command. 2602 * Reset cm_sge and cm_sgesize to indicate all the available space. 2603 */ 2604 static int 2605 mps_add_chain(struct mps_command *cm) 2606 { 2607 MPI2_SGE_CHAIN32 *sgc; 2608 struct mps_chain *chain; 2609 u_int space; 2610 2611 if (cm->cm_sglsize < MPS_SGC_SIZE) 2612 panic("MPS: Need SGE Error Code\n"); 2613 2614 chain = mps_alloc_chain(cm->cm_sc); 2615 if (chain == NULL) 2616 return (ENOBUFS); 2617 2618 space = cm->cm_sc->reqframesz; 2619 2620 /* 2621 * Note: a double-linked list is used to make it easier to 2622 * walk for debugging. 2623 */ 2624 TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link); 2625 2626 sgc = (MPI2_SGE_CHAIN32 *)&cm->cm_sge->MpiChain; 2627 sgc->Length = htole16(space); 2628 sgc->NextChainOffset = 0; 2629 /* TODO Looks like bug in Setting sgc->Flags. 2630 * sgc->Flags = ( MPI2_SGE_FLAGS_CHAIN_ELEMENT | MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 2631 * MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT 2632 * This is fine.. because we are not using simple element. In case of 2633 * MPI2_SGE_CHAIN32, we have separate Length and Flags feild. 2634 */ 2635 sgc->Flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT; 2636 sgc->Address = htole32(chain->chain_busaddr); 2637 2638 cm->cm_sge = (MPI2_SGE_IO_UNION *)&chain->chain->MpiSimple; 2639 cm->cm_sglsize = space; 2640 return (0); 2641 } 2642 2643 /* 2644 * Add one scatter-gather element (chain, simple, transaction context) 2645 * to the scatter-gather list for a command. Maintain cm_sglsize and 2646 * cm_sge as the remaining size and pointer to the next SGE to fill 2647 * in, respectively. 2648 */ 2649 int 2650 mps_push_sge(struct mps_command *cm, void *sgep, size_t len, int segsleft) 2651 { 2652 MPI2_SGE_TRANSACTION_UNION *tc = sgep; 2653 MPI2_SGE_SIMPLE64 *sge = sgep; 2654 int error, type; 2655 uint32_t saved_buf_len, saved_address_low, saved_address_high; 2656 2657 type = (tc->Flags & MPI2_SGE_FLAGS_ELEMENT_MASK); 2658 2659 #ifdef INVARIANTS 2660 switch (type) { 2661 case MPI2_SGE_FLAGS_TRANSACTION_ELEMENT: { 2662 if (len != tc->DetailsLength + 4) 2663 panic("TC %p length %u or %zu?", tc, 2664 tc->DetailsLength + 4, len); 2665 } 2666 break; 2667 case MPI2_SGE_FLAGS_CHAIN_ELEMENT: 2668 /* Driver only uses 32-bit chain elements */ 2669 if (len != MPS_SGC_SIZE) 2670 panic("CHAIN %p length %u or %zu?", sgep, 2671 MPS_SGC_SIZE, len); 2672 break; 2673 case MPI2_SGE_FLAGS_SIMPLE_ELEMENT: 2674 /* Driver only uses 64-bit SGE simple elements */ 2675 if (len != MPS_SGE64_SIZE) 2676 panic("SGE simple %p length %u or %zu?", sge, 2677 MPS_SGE64_SIZE, len); 2678 if (((le32toh(sge->FlagsLength) >> MPI2_SGE_FLAGS_SHIFT) & 2679 MPI2_SGE_FLAGS_ADDRESS_SIZE) == 0) 2680 panic("SGE simple %p not marked 64-bit?", sge); 2681 2682 break; 2683 default: 2684 panic("Unexpected SGE %p, flags %02x", tc, tc->Flags); 2685 } 2686 #endif 2687 2688 /* 2689 * case 1: 1 more segment, enough room for it 2690 * case 2: 2 more segments, enough room for both 2691 * case 3: >=2 more segments, only enough room for 1 and a chain 2692 * case 4: >=1 more segment, enough room for only a chain 2693 * case 5: >=1 more segment, no room for anything (error) 2694 */ 2695 2696 /* 2697 * There should be room for at least a chain element, or this 2698 * code is buggy. Case (5). 2699 */ 2700 if (cm->cm_sglsize < MPS_SGC_SIZE) 2701 panic("MPS: Need SGE Error Code\n"); 2702 2703 if (segsleft >= 1 && cm->cm_sglsize < len + MPS_SGC_SIZE) { 2704 /* 2705 * 1 or more segment, enough room for only a chain. 2706 * Hope the previous element wasn't a Simple entry 2707 * that needed to be marked with 2708 * MPI2_SGE_FLAGS_LAST_ELEMENT. Case (4). 2709 */ 2710 if ((error = mps_add_chain(cm)) != 0) 2711 return (error); 2712 } 2713 2714 if (segsleft >= 2 && 2715 cm->cm_sglsize < len + MPS_SGC_SIZE + MPS_SGE64_SIZE) { 2716 /* 2717 * There are 2 or more segments left to add, and only 2718 * enough room for 1 and a chain. Case (3). 2719 * 2720 * Mark as last element in this chain if necessary. 2721 */ 2722 if (type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { 2723 sge->FlagsLength |= htole32( 2724 MPI2_SGE_FLAGS_LAST_ELEMENT << MPI2_SGE_FLAGS_SHIFT); 2725 } 2726 2727 /* 2728 * Add the item then a chain. Do the chain now, 2729 * rather than on the next iteration, to simplify 2730 * understanding the code. 2731 */ 2732 cm->cm_sglsize -= len; 2733 bcopy(sgep, cm->cm_sge, len); 2734 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2735 return (mps_add_chain(cm)); 2736 } 2737 2738 #ifdef INVARIANTS 2739 /* Case 1: 1 more segment, enough room for it. */ 2740 if (segsleft == 1 && cm->cm_sglsize < len) 2741 panic("1 seg left and no room? %u versus %zu", 2742 cm->cm_sglsize, len); 2743 2744 /* Case 2: 2 more segments, enough room for both */ 2745 if (segsleft == 2 && cm->cm_sglsize < len + MPS_SGE64_SIZE) 2746 panic("2 segs left and no room? %u versus %zu", 2747 cm->cm_sglsize, len); 2748 #endif 2749 2750 if (segsleft == 1 && type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { 2751 /* 2752 * If this is a bi-directional request, need to account for that 2753 * here. Save the pre-filled sge values. These will be used 2754 * either for the 2nd SGL or for a single direction SGL. If 2755 * cm_out_len is non-zero, this is a bi-directional request, so 2756 * fill in the OUT SGL first, then the IN SGL, otherwise just 2757 * fill in the IN SGL. Note that at this time, when filling in 2758 * 2 SGL's for a bi-directional request, they both use the same 2759 * DMA buffer (same cm command). 2760 */ 2761 saved_buf_len = le32toh(sge->FlagsLength) & 0x00FFFFFF; 2762 saved_address_low = sge->Address.Low; 2763 saved_address_high = sge->Address.High; 2764 if (cm->cm_out_len) { 2765 sge->FlagsLength = htole32(cm->cm_out_len | 2766 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2767 MPI2_SGE_FLAGS_END_OF_BUFFER | 2768 MPI2_SGE_FLAGS_HOST_TO_IOC | 2769 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2770 MPI2_SGE_FLAGS_SHIFT)); 2771 cm->cm_sglsize -= len; 2772 bcopy(sgep, cm->cm_sge, len); 2773 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge 2774 + len); 2775 } 2776 saved_buf_len |= 2777 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2778 MPI2_SGE_FLAGS_END_OF_BUFFER | 2779 MPI2_SGE_FLAGS_LAST_ELEMENT | 2780 MPI2_SGE_FLAGS_END_OF_LIST | 2781 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2782 MPI2_SGE_FLAGS_SHIFT); 2783 if (cm->cm_flags & MPS_CM_FLAGS_DATAIN) { 2784 saved_buf_len |= 2785 ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) << 2786 MPI2_SGE_FLAGS_SHIFT); 2787 } else { 2788 saved_buf_len |= 2789 ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) << 2790 MPI2_SGE_FLAGS_SHIFT); 2791 } 2792 sge->FlagsLength = htole32(saved_buf_len); 2793 sge->Address.Low = saved_address_low; 2794 sge->Address.High = saved_address_high; 2795 } 2796 2797 cm->cm_sglsize -= len; 2798 bcopy(sgep, cm->cm_sge, len); 2799 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2800 return (0); 2801 } 2802 2803 /* 2804 * Add one dma segment to the scatter-gather list for a command. 2805 */ 2806 int 2807 mps_add_dmaseg(struct mps_command *cm, vm_paddr_t pa, size_t len, u_int flags, 2808 int segsleft) 2809 { 2810 MPI2_SGE_SIMPLE64 sge; 2811 2812 /* 2813 * This driver always uses 64-bit address elements for simplicity. 2814 */ 2815 bzero(&sge, sizeof(sge)); 2816 flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2817 MPI2_SGE_FLAGS_64_BIT_ADDRESSING; 2818 sge.FlagsLength = htole32(len | (flags << MPI2_SGE_FLAGS_SHIFT)); 2819 mps_from_u64(pa, &sge.Address); 2820 2821 return (mps_push_sge(cm, &sge, sizeof sge, segsleft)); 2822 } 2823 2824 static void 2825 mps_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 2826 { 2827 struct mps_softc *sc; 2828 struct mps_command *cm; 2829 u_int i, dir, sflags; 2830 2831 cm = (struct mps_command *)arg; 2832 sc = cm->cm_sc; 2833 2834 /* 2835 * In this case, just print out a warning and let the chip tell the 2836 * user they did the wrong thing. 2837 */ 2838 if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) { 2839 mps_dprint(sc, MPS_ERROR, 2840 "%s: warning: busdma returned %d segments, " 2841 "more than the %d allowed\n", __func__, nsegs, 2842 cm->cm_max_segs); 2843 } 2844 2845 /* 2846 * Set up DMA direction flags. Bi-directional requests are also handled 2847 * here. In that case, both direction flags will be set. 2848 */ 2849 sflags = 0; 2850 if (cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) { 2851 /* 2852 * We have to add a special case for SMP passthrough, there 2853 * is no easy way to generically handle it. The first 2854 * S/G element is used for the command (therefore the 2855 * direction bit needs to be set). The second one is used 2856 * for the reply. We'll leave it to the caller to make 2857 * sure we only have two buffers. 2858 */ 2859 /* 2860 * Even though the busdma man page says it doesn't make 2861 * sense to have both direction flags, it does in this case. 2862 * We have one s/g element being accessed in each direction. 2863 */ 2864 dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD; 2865 2866 /* 2867 * Set the direction flag on the first buffer in the SMP 2868 * passthrough request. We'll clear it for the second one. 2869 */ 2870 sflags |= MPI2_SGE_FLAGS_DIRECTION | 2871 MPI2_SGE_FLAGS_END_OF_BUFFER; 2872 } else if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) { 2873 sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC; 2874 dir = BUS_DMASYNC_PREWRITE; 2875 } else 2876 dir = BUS_DMASYNC_PREREAD; 2877 2878 for (i = 0; i < nsegs; i++) { 2879 if ((cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) && (i != 0)) { 2880 sflags &= ~MPI2_SGE_FLAGS_DIRECTION; 2881 } 2882 error = mps_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len, 2883 sflags, nsegs - i); 2884 if (error != 0) { 2885 /* Resource shortage, roll back! */ 2886 if (ratecheck(&sc->lastfail, &mps_chainfail_interval)) 2887 mps_dprint(sc, MPS_INFO, "Out of chain frames, " 2888 "consider increasing hw.mps.max_chains.\n"); 2889 cm->cm_flags |= MPS_CM_FLAGS_CHAIN_FAILED; 2890 mps_complete_command(sc, cm); 2891 return; 2892 } 2893 } 2894 2895 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir); 2896 mps_enqueue_request(sc, cm); 2897 2898 return; 2899 } 2900 2901 static void 2902 mps_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize, 2903 int error) 2904 { 2905 mps_data_cb(arg, segs, nsegs, error); 2906 } 2907 2908 /* 2909 * This is the routine to enqueue commands ansynchronously. 2910 * Note that the only error path here is from bus_dmamap_load(), which can 2911 * return EINPROGRESS if it is waiting for resources. Other than this, it's 2912 * assumed that if you have a command in-hand, then you have enough credits 2913 * to use it. 2914 */ 2915 int 2916 mps_map_command(struct mps_softc *sc, struct mps_command *cm) 2917 { 2918 int error = 0; 2919 2920 if (cm->cm_flags & MPS_CM_FLAGS_USE_UIO) { 2921 error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap, 2922 &cm->cm_uio, mps_data_cb2, cm, 0); 2923 } else if (cm->cm_flags & MPS_CM_FLAGS_USE_CCB) { 2924 error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap, 2925 cm->cm_data, mps_data_cb, cm, 0); 2926 } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) { 2927 error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap, 2928 cm->cm_data, cm->cm_length, mps_data_cb, cm, 0); 2929 } else { 2930 /* Add a zero-length element as needed */ 2931 if (cm->cm_sge != NULL) 2932 mps_add_dmaseg(cm, 0, 0, 0, 1); 2933 mps_enqueue_request(sc, cm); 2934 } 2935 2936 return (error); 2937 } 2938 2939 /* 2940 * This is the routine to enqueue commands synchronously. An error of 2941 * EINPROGRESS from mps_map_command() is ignored since the command will 2942 * be executed and enqueued automatically. Other errors come from msleep(). 2943 */ 2944 int 2945 mps_wait_command(struct mps_softc *sc, struct mps_command **cmp, int timeout, 2946 int sleep_flag) 2947 { 2948 int error, rc; 2949 struct timeval cur_time, start_time; 2950 struct mps_command *cm = *cmp; 2951 2952 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) 2953 return EBUSY; 2954 2955 cm->cm_complete = NULL; 2956 cm->cm_flags |= MPS_CM_FLAGS_POLLED; 2957 error = mps_map_command(sc, cm); 2958 if ((error != 0) && (error != EINPROGRESS)) 2959 return (error); 2960 2961 /* 2962 * Check for context and wait for 50 mSec at a time until time has 2963 * expired or the command has finished. If msleep can't be used, need 2964 * to poll. 2965 */ 2966 if (curthread->td_no_sleeping != 0) 2967 sleep_flag = NO_SLEEP; 2968 getmicrouptime(&start_time); 2969 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) { 2970 cm->cm_flags |= MPS_CM_FLAGS_WAKEUP; 2971 error = msleep(cm, &sc->mps_mtx, 0, "mpswait", timeout*hz); 2972 if (error == EWOULDBLOCK) { 2973 /* 2974 * Record the actual elapsed time in the case of a 2975 * timeout for the message below. 2976 */ 2977 getmicrouptime(&cur_time); 2978 timevalsub(&cur_time, &start_time); 2979 } 2980 } else { 2981 while ((cm->cm_flags & MPS_CM_FLAGS_COMPLETE) == 0) { 2982 mps_intr_locked(sc); 2983 if (sleep_flag == CAN_SLEEP) 2984 pause("mpswait", hz/20); 2985 else 2986 DELAY(50000); 2987 2988 getmicrouptime(&cur_time); 2989 timevalsub(&cur_time, &start_time); 2990 if (cur_time.tv_sec > timeout) { 2991 error = EWOULDBLOCK; 2992 break; 2993 } 2994 } 2995 } 2996 2997 if (error == EWOULDBLOCK) { 2998 mps_dprint(sc, MPS_FAULT, "Calling Reinit from %s, timeout=%d," 2999 " elapsed=%jd\n", __func__, timeout, 3000 (intmax_t)cur_time.tv_sec); 3001 rc = mps_reinit(sc); 3002 mps_dprint(sc, MPS_FAULT, "Reinit %s\n", (rc == 0) ? "success" : 3003 "failed"); 3004 if (sc->mps_flags & MPS_FLAGS_REALLOCATED) { 3005 /* 3006 * Tell the caller that we freed the command in a 3007 * reinit. 3008 */ 3009 *cmp = NULL; 3010 } 3011 error = ETIMEDOUT; 3012 } 3013 return (error); 3014 } 3015 3016 /* 3017 * The MPT driver had a verbose interface for config pages. In this driver, 3018 * reduce it to much simpler terms, similar to the Linux driver. 3019 */ 3020 int 3021 mps_read_config_page(struct mps_softc *sc, struct mps_config_params *params) 3022 { 3023 MPI2_CONFIG_REQUEST *req; 3024 struct mps_command *cm; 3025 int error; 3026 3027 if (sc->mps_flags & MPS_FLAGS_BUSY) { 3028 return (EBUSY); 3029 } 3030 3031 cm = mps_alloc_command(sc); 3032 if (cm == NULL) { 3033 return (EBUSY); 3034 } 3035 3036 req = (MPI2_CONFIG_REQUEST *)cm->cm_req; 3037 req->Function = MPI2_FUNCTION_CONFIG; 3038 req->Action = params->action; 3039 req->SGLFlags = 0; 3040 req->ChainOffset = 0; 3041 req->PageAddress = params->page_address; 3042 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 3043 MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr; 3044 3045 hdr = ¶ms->hdr.Ext; 3046 req->ExtPageType = hdr->ExtPageType; 3047 req->ExtPageLength = hdr->ExtPageLength; 3048 req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED; 3049 req->Header.PageLength = 0; /* Must be set to zero */ 3050 req->Header.PageNumber = hdr->PageNumber; 3051 req->Header.PageVersion = hdr->PageVersion; 3052 } else { 3053 MPI2_CONFIG_PAGE_HEADER *hdr; 3054 3055 hdr = ¶ms->hdr.Struct; 3056 req->Header.PageType = hdr->PageType; 3057 req->Header.PageNumber = hdr->PageNumber; 3058 req->Header.PageLength = hdr->PageLength; 3059 req->Header.PageVersion = hdr->PageVersion; 3060 } 3061 3062 cm->cm_data = params->buffer; 3063 cm->cm_length = params->length; 3064 if (cm->cm_data != NULL) { 3065 cm->cm_sge = &req->PageBufferSGE; 3066 cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION); 3067 cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_DATAIN; 3068 } else 3069 cm->cm_sge = NULL; 3070 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 3071 3072 cm->cm_complete_data = params; 3073 if (params->callback != NULL) { 3074 cm->cm_complete = mps_config_complete; 3075 return (mps_map_command(sc, cm)); 3076 } else { 3077 error = mps_wait_command(sc, &cm, 0, CAN_SLEEP); 3078 if (error) { 3079 mps_dprint(sc, MPS_FAULT, 3080 "Error %d reading config page\n", error); 3081 if (cm != NULL) 3082 mps_free_command(sc, cm); 3083 return (error); 3084 } 3085 mps_config_complete(sc, cm); 3086 } 3087 3088 return (0); 3089 } 3090 3091 int 3092 mps_write_config_page(struct mps_softc *sc, struct mps_config_params *params) 3093 { 3094 return (EINVAL); 3095 } 3096 3097 static void 3098 mps_config_complete(struct mps_softc *sc, struct mps_command *cm) 3099 { 3100 MPI2_CONFIG_REPLY *reply; 3101 struct mps_config_params *params; 3102 3103 MPS_FUNCTRACE(sc); 3104 params = cm->cm_complete_data; 3105 3106 if (cm->cm_data != NULL) { 3107 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, 3108 BUS_DMASYNC_POSTREAD); 3109 bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap); 3110 } 3111 3112 /* 3113 * XXX KDM need to do more error recovery? This results in the 3114 * device in question not getting probed. 3115 */ 3116 if ((cm->cm_flags & MPS_CM_FLAGS_ERROR_MASK) != 0) { 3117 params->status = MPI2_IOCSTATUS_BUSY; 3118 goto done; 3119 } 3120 3121 reply = (MPI2_CONFIG_REPLY *)cm->cm_reply; 3122 if (reply == NULL) { 3123 params->status = MPI2_IOCSTATUS_BUSY; 3124 goto done; 3125 } 3126 params->status = reply->IOCStatus; 3127 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 3128 params->hdr.Ext.ExtPageType = reply->ExtPageType; 3129 params->hdr.Ext.ExtPageLength = reply->ExtPageLength; 3130 params->hdr.Ext.PageType = reply->Header.PageType; 3131 params->hdr.Ext.PageNumber = reply->Header.PageNumber; 3132 params->hdr.Ext.PageVersion = reply->Header.PageVersion; 3133 } else { 3134 params->hdr.Struct.PageType = reply->Header.PageType; 3135 params->hdr.Struct.PageNumber = reply->Header.PageNumber; 3136 params->hdr.Struct.PageLength = reply->Header.PageLength; 3137 params->hdr.Struct.PageVersion = reply->Header.PageVersion; 3138 } 3139 3140 done: 3141 mps_free_command(sc, cm); 3142 if (params->callback != NULL) 3143 params->callback(sc, params); 3144 3145 return; 3146 } 3147