1 /*- 2 * Copyright (c) 2009 Yahoo! Inc. 3 * Copyright (c) 2011-2015 LSI Corp. 4 * Copyright (c) 2013-2015 Avago Technologies 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 29 * 30 * $FreeBSD$ 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 /* Communications core for Avago Technologies (LSI) MPT2 */ 37 38 /* TODO Move headers to mpsvar */ 39 #include <sys/types.h> 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/selinfo.h> 44 #include <sys/lock.h> 45 #include <sys/mutex.h> 46 #include <sys/module.h> 47 #include <sys/bus.h> 48 #include <sys/conf.h> 49 #include <sys/bio.h> 50 #include <sys/malloc.h> 51 #include <sys/uio.h> 52 #include <sys/sysctl.h> 53 #include <sys/smp.h> 54 #include <sys/queue.h> 55 #include <sys/kthread.h> 56 #include <sys/taskqueue.h> 57 #include <sys/endian.h> 58 #include <sys/eventhandler.h> 59 60 #include <machine/bus.h> 61 #include <machine/resource.h> 62 #include <sys/rman.h> 63 #include <sys/proc.h> 64 65 #include <dev/pci/pcivar.h> 66 67 #include <cam/cam.h> 68 #include <cam/scsi/scsi_all.h> 69 70 #include <dev/mps/mpi/mpi2_type.h> 71 #include <dev/mps/mpi/mpi2.h> 72 #include <dev/mps/mpi/mpi2_ioc.h> 73 #include <dev/mps/mpi/mpi2_sas.h> 74 #include <dev/mps/mpi/mpi2_cnfg.h> 75 #include <dev/mps/mpi/mpi2_init.h> 76 #include <dev/mps/mpi/mpi2_tool.h> 77 #include <dev/mps/mps_ioctl.h> 78 #include <dev/mps/mpsvar.h> 79 #include <dev/mps/mps_table.h> 80 81 static int mps_diag_reset(struct mps_softc *sc, int sleep_flag); 82 static int mps_init_queues(struct mps_softc *sc); 83 static void mps_resize_queues(struct mps_softc *sc); 84 static int mps_message_unit_reset(struct mps_softc *sc, int sleep_flag); 85 static int mps_transition_operational(struct mps_softc *sc); 86 static int mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching); 87 static void mps_iocfacts_free(struct mps_softc *sc); 88 static void mps_startup(void *arg); 89 static int mps_send_iocinit(struct mps_softc *sc); 90 static int mps_alloc_queues(struct mps_softc *sc); 91 static int mps_alloc_hw_queues(struct mps_softc *sc); 92 static int mps_alloc_replies(struct mps_softc *sc); 93 static int mps_alloc_requests(struct mps_softc *sc); 94 static int mps_attach_log(struct mps_softc *sc); 95 static __inline void mps_complete_command(struct mps_softc *sc, 96 struct mps_command *cm); 97 static void mps_dispatch_event(struct mps_softc *sc, uintptr_t data, 98 MPI2_EVENT_NOTIFICATION_REPLY *reply); 99 static void mps_config_complete(struct mps_softc *sc, struct mps_command *cm); 100 static void mps_periodic(void *); 101 static int mps_reregister_events(struct mps_softc *sc); 102 static void mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm); 103 static int mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts); 104 static int mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag); 105 SYSCTL_NODE(_hw, OID_AUTO, mps, CTLFLAG_RD, 0, "MPS Driver Parameters"); 106 107 MALLOC_DEFINE(M_MPT2, "mps", "mpt2 driver memory"); 108 109 /* 110 * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of 111 * any state and back to its initialization state machine. 112 */ 113 static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d }; 114 115 /* Added this union to smoothly convert le64toh cm->cm_desc.Words. 116 * Compiler only support unint64_t to be passed as argument. 117 * Otherwise it will throw below error 118 * "aggregate value used where an integer was expected" 119 */ 120 121 typedef union _reply_descriptor { 122 u64 word; 123 struct { 124 u32 low; 125 u32 high; 126 } u; 127 }reply_descriptor,address_descriptor; 128 129 /* Rate limit chain-fail messages to 1 per minute */ 130 static struct timeval mps_chainfail_interval = { 60, 0 }; 131 132 /* 133 * sleep_flag can be either CAN_SLEEP or NO_SLEEP. 134 * If this function is called from process context, it can sleep 135 * and there is no harm to sleep, in case if this fuction is called 136 * from Interrupt handler, we can not sleep and need NO_SLEEP flag set. 137 * based on sleep flags driver will call either msleep, pause or DELAY. 138 * msleep and pause are of same variant, but pause is used when mps_mtx 139 * is not hold by driver. 140 * 141 */ 142 static int 143 mps_diag_reset(struct mps_softc *sc,int sleep_flag) 144 { 145 uint32_t reg; 146 int i, error, tries = 0; 147 uint8_t first_wait_done = FALSE; 148 149 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 150 151 /* Clear any pending interrupts */ 152 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 153 154 /* 155 * Force NO_SLEEP for threads prohibited to sleep 156 * e.a Thread from interrupt handler are prohibited to sleep. 157 */ 158 if (curthread->td_no_sleeping != 0) 159 sleep_flag = NO_SLEEP; 160 161 mps_dprint(sc, MPS_INIT, "sequence start, sleep_flag= %d\n", sleep_flag); 162 163 /* Push the magic sequence */ 164 error = ETIMEDOUT; 165 while (tries++ < 20) { 166 for (i = 0; i < sizeof(mpt2_reset_magic); i++) 167 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 168 mpt2_reset_magic[i]); 169 /* wait 100 msec */ 170 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 171 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 172 "mpsdiag", hz/10); 173 else if (sleep_flag == CAN_SLEEP) 174 pause("mpsdiag", hz/10); 175 else 176 DELAY(100 * 1000); 177 178 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 179 if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) { 180 error = 0; 181 break; 182 } 183 } 184 if (error) { 185 mps_dprint(sc, MPS_INIT, "sequence failed, error=%d, exit\n", 186 error); 187 return (error); 188 } 189 190 /* Send the actual reset. XXX need to refresh the reg? */ 191 reg |= MPI2_DIAG_RESET_ADAPTER; 192 mps_dprint(sc, MPS_INIT, "sequence success, sending reset, reg= 0x%x\n", 193 reg); 194 mps_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET, reg); 195 196 /* Wait up to 300 seconds in 50ms intervals */ 197 error = ETIMEDOUT; 198 for (i = 0; i < 6000; i++) { 199 /* 200 * Wait 50 msec. If this is the first time through, wait 256 201 * msec to satisfy Diag Reset timing requirements. 202 */ 203 if (first_wait_done) { 204 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 205 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 206 "mpsdiag", hz/20); 207 else if (sleep_flag == CAN_SLEEP) 208 pause("mpsdiag", hz/20); 209 else 210 DELAY(50 * 1000); 211 } else { 212 DELAY(256 * 1000); 213 first_wait_done = TRUE; 214 } 215 /* 216 * Check for the RESET_ADAPTER bit to be cleared first, then 217 * wait for the RESET state to be cleared, which takes a little 218 * longer. 219 */ 220 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 221 if (reg & MPI2_DIAG_RESET_ADAPTER) { 222 continue; 223 } 224 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 225 if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) { 226 error = 0; 227 break; 228 } 229 } 230 if (error) { 231 mps_dprint(sc, MPS_INIT, "reset failed, error= %d, exit\n", 232 error); 233 return (error); 234 } 235 236 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0); 237 mps_dprint(sc, MPS_INIT, "diag reset success, exit\n"); 238 239 return (0); 240 } 241 242 static int 243 mps_message_unit_reset(struct mps_softc *sc, int sleep_flag) 244 { 245 int error; 246 247 MPS_FUNCTRACE(sc); 248 249 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 250 251 error = 0; 252 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, 253 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET << 254 MPI2_DOORBELL_FUNCTION_SHIFT); 255 256 if (mps_wait_db_ack(sc, 5, sleep_flag) != 0) { 257 mps_dprint(sc, MPS_INIT|MPS_FAULT, 258 "Doorbell handshake failed\n"); 259 error = ETIMEDOUT; 260 } 261 262 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 263 return (error); 264 } 265 266 static int 267 mps_transition_ready(struct mps_softc *sc) 268 { 269 uint32_t reg, state; 270 int error, tries = 0; 271 int sleep_flags; 272 273 MPS_FUNCTRACE(sc); 274 /* If we are in attach call, do not sleep */ 275 sleep_flags = (sc->mps_flags & MPS_FLAGS_ATTACH_DONE) 276 ? CAN_SLEEP:NO_SLEEP; 277 error = 0; 278 279 mps_dprint(sc, MPS_INIT, "%s entered, sleep_flags= %d\n", 280 __func__, sleep_flags); 281 282 while (tries++ < 1200) { 283 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 284 mps_dprint(sc, MPS_INIT, " Doorbell= 0x%x\n", reg); 285 286 /* 287 * Ensure the IOC is ready to talk. If it's not, try 288 * resetting it. 289 */ 290 if (reg & MPI2_DOORBELL_USED) { 291 mps_dprint(sc, MPS_INIT, " Not ready, sending diag " 292 "reset\n"); 293 mps_diag_reset(sc, sleep_flags); 294 DELAY(50000); 295 continue; 296 } 297 298 /* Is the adapter owned by another peer? */ 299 if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) == 300 (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) { 301 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC is under the " 302 "control of another peer host, aborting " 303 "initialization.\n"); 304 error = ENXIO; 305 break; 306 } 307 308 state = reg & MPI2_IOC_STATE_MASK; 309 if (state == MPI2_IOC_STATE_READY) { 310 /* Ready to go! */ 311 error = 0; 312 break; 313 } else if (state == MPI2_IOC_STATE_FAULT) { 314 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC in fault " 315 "state 0x%x, resetting\n", 316 state & MPI2_DOORBELL_FAULT_CODE_MASK); 317 mps_diag_reset(sc, sleep_flags); 318 } else if (state == MPI2_IOC_STATE_OPERATIONAL) { 319 /* Need to take ownership */ 320 mps_message_unit_reset(sc, sleep_flags); 321 } else if (state == MPI2_IOC_STATE_RESET) { 322 /* Wait a bit, IOC might be in transition */ 323 mps_dprint(sc, MPS_INIT|MPS_FAULT, 324 "IOC in unexpected reset state\n"); 325 } else { 326 mps_dprint(sc, MPS_INIT|MPS_FAULT, 327 "IOC in unknown state 0x%x\n", state); 328 error = EINVAL; 329 break; 330 } 331 332 /* Wait 50ms for things to settle down. */ 333 DELAY(50000); 334 } 335 336 if (error) 337 mps_dprint(sc, MPS_INIT|MPS_FAULT, 338 "Cannot transition IOC to ready\n"); 339 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 340 341 return (error); 342 } 343 344 static int 345 mps_transition_operational(struct mps_softc *sc) 346 { 347 uint32_t reg, state; 348 int error; 349 350 MPS_FUNCTRACE(sc); 351 352 error = 0; 353 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 354 mps_dprint(sc, MPS_INIT, "%s entered, Doorbell= 0x%x\n", __func__, reg); 355 356 state = reg & MPI2_IOC_STATE_MASK; 357 if (state != MPI2_IOC_STATE_READY) { 358 mps_dprint(sc, MPS_INIT, "IOC not ready\n"); 359 if ((error = mps_transition_ready(sc)) != 0) { 360 mps_dprint(sc, MPS_INIT|MPS_FAULT, 361 "failed to transition ready, exit\n"); 362 return (error); 363 } 364 } 365 366 error = mps_send_iocinit(sc); 367 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 368 369 return (error); 370 } 371 372 static void 373 mps_resize_queues(struct mps_softc *sc) 374 { 375 int reqcr, prireqcr; 376 377 /* 378 * Size the queues. Since the reply queues always need one free 379 * entry, we'll deduct one reply message here. The LSI documents 380 * suggest instead to add a count to the request queue, but I think 381 * that it's better to deduct from reply queue. 382 */ 383 prireqcr = MAX(1, sc->max_prireqframes); 384 prireqcr = MIN(prireqcr, sc->facts->HighPriorityCredit); 385 386 reqcr = MAX(2, sc->max_reqframes); 387 reqcr = MIN(reqcr, sc->facts->RequestCredit); 388 389 sc->num_reqs = prireqcr + reqcr; 390 sc->num_replies = MIN(sc->max_replyframes + sc->max_evtframes, 391 sc->facts->MaxReplyDescriptorPostQueueDepth) - 1; 392 393 /* 394 * Figure out the number of MSIx-based queues. If the firmware or 395 * user has done something crazy and not allowed enough credit for 396 * the queues to be useful then don't enable multi-queue. 397 */ 398 if (sc->facts->MaxMSIxVectors < 2) 399 sc->msi_msgs = 1; 400 401 if (sc->msi_msgs > 1) { 402 sc->msi_msgs = MIN(sc->msi_msgs, mp_ncpus); 403 sc->msi_msgs = MIN(sc->msi_msgs, sc->facts->MaxMSIxVectors); 404 if (sc->num_reqs / sc->msi_msgs < 2) 405 sc->msi_msgs = 1; 406 } 407 408 mps_dprint(sc, MPS_INIT, "Sized queues to q=%d reqs=%d replies=%d\n", 409 sc->msi_msgs, sc->num_reqs, sc->num_replies); 410 } 411 412 /* 413 * This is called during attach and when re-initializing due to a Diag Reset. 414 * IOC Facts is used to allocate many of the structures needed by the driver. 415 * If called from attach, de-allocation is not required because the driver has 416 * not allocated any structures yet, but if called from a Diag Reset, previously 417 * allocated structures based on IOC Facts will need to be freed and re- 418 * allocated bases on the latest IOC Facts. 419 */ 420 static int 421 mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching) 422 { 423 int error; 424 Mpi2IOCFactsReply_t saved_facts; 425 uint8_t saved_mode, reallocating; 426 427 mps_dprint(sc, MPS_INIT|MPS_TRACE, "%s entered\n", __func__); 428 429 /* Save old IOC Facts and then only reallocate if Facts have changed */ 430 if (!attaching) { 431 bcopy(sc->facts, &saved_facts, sizeof(MPI2_IOC_FACTS_REPLY)); 432 } 433 434 /* 435 * Get IOC Facts. In all cases throughout this function, panic if doing 436 * a re-initialization and only return the error if attaching so the OS 437 * can handle it. 438 */ 439 if ((error = mps_get_iocfacts(sc, sc->facts)) != 0) { 440 if (attaching) { 441 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to get " 442 "IOC Facts with error %d, exit\n", error); 443 return (error); 444 } else { 445 panic("%s failed to get IOC Facts with error %d\n", 446 __func__, error); 447 } 448 } 449 450 MPS_DPRINT_PAGE(sc, MPS_XINFO, iocfacts, sc->facts); 451 452 snprintf(sc->fw_version, sizeof(sc->fw_version), 453 "%02d.%02d.%02d.%02d", 454 sc->facts->FWVersion.Struct.Major, 455 sc->facts->FWVersion.Struct.Minor, 456 sc->facts->FWVersion.Struct.Unit, 457 sc->facts->FWVersion.Struct.Dev); 458 459 mps_dprint(sc, MPS_INFO, "Firmware: %s, Driver: %s\n", sc->fw_version, 460 MPS_DRIVER_VERSION); 461 mps_dprint(sc, MPS_INFO, "IOCCapabilities: %b\n", 462 sc->facts->IOCCapabilities, 463 "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf" 464 "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR" 465 "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc"); 466 467 /* 468 * If the chip doesn't support event replay then a hard reset will be 469 * required to trigger a full discovery. Do the reset here then 470 * retransition to Ready. A hard reset might have already been done, 471 * but it doesn't hurt to do it again. Only do this if attaching, not 472 * for a Diag Reset. 473 */ 474 if (attaching && ((sc->facts->IOCCapabilities & 475 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0)) { 476 mps_dprint(sc, MPS_INIT, "No event replay, reseting\n"); 477 mps_diag_reset(sc, NO_SLEEP); 478 if ((error = mps_transition_ready(sc)) != 0) { 479 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to " 480 "transition to ready with error %d, exit\n", 481 error); 482 return (error); 483 } 484 } 485 486 /* 487 * Set flag if IR Firmware is loaded. If the RAID Capability has 488 * changed from the previous IOC Facts, log a warning, but only if 489 * checking this after a Diag Reset and not during attach. 490 */ 491 saved_mode = sc->ir_firmware; 492 if (sc->facts->IOCCapabilities & 493 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) 494 sc->ir_firmware = 1; 495 if (!attaching) { 496 if (sc->ir_firmware != saved_mode) { 497 mps_dprint(sc, MPS_INIT|MPS_FAULT, "new IR/IT mode " 498 "in IOC Facts does not match previous mode\n"); 499 } 500 } 501 502 /* Only deallocate and reallocate if relevant IOC Facts have changed */ 503 reallocating = FALSE; 504 sc->mps_flags &= ~MPS_FLAGS_REALLOCATED; 505 506 if ((!attaching) && 507 ((saved_facts.MsgVersion != sc->facts->MsgVersion) || 508 (saved_facts.HeaderVersion != sc->facts->HeaderVersion) || 509 (saved_facts.MaxChainDepth != sc->facts->MaxChainDepth) || 510 (saved_facts.RequestCredit != sc->facts->RequestCredit) || 511 (saved_facts.ProductID != sc->facts->ProductID) || 512 (saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) || 513 (saved_facts.IOCRequestFrameSize != 514 sc->facts->IOCRequestFrameSize) || 515 (saved_facts.MaxTargets != sc->facts->MaxTargets) || 516 (saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) || 517 (saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) || 518 (saved_facts.HighPriorityCredit != sc->facts->HighPriorityCredit) || 519 (saved_facts.MaxReplyDescriptorPostQueueDepth != 520 sc->facts->MaxReplyDescriptorPostQueueDepth) || 521 (saved_facts.ReplyFrameSize != sc->facts->ReplyFrameSize) || 522 (saved_facts.MaxVolumes != sc->facts->MaxVolumes) || 523 (saved_facts.MaxPersistentEntries != 524 sc->facts->MaxPersistentEntries))) { 525 reallocating = TRUE; 526 527 /* Record that we reallocated everything */ 528 sc->mps_flags |= MPS_FLAGS_REALLOCATED; 529 } 530 531 /* 532 * Some things should be done if attaching or re-allocating after a Diag 533 * Reset, but are not needed after a Diag Reset if the FW has not 534 * changed. 535 */ 536 if (attaching || reallocating) { 537 /* 538 * Check if controller supports FW diag buffers and set flag to 539 * enable each type. 540 */ 541 if (sc->facts->IOCCapabilities & 542 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) 543 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE]. 544 enabled = TRUE; 545 if (sc->facts->IOCCapabilities & 546 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) 547 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT]. 548 enabled = TRUE; 549 if (sc->facts->IOCCapabilities & 550 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) 551 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED]. 552 enabled = TRUE; 553 554 /* 555 * Set flag if EEDP is supported and if TLR is supported. 556 */ 557 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) 558 sc->eedp_enabled = TRUE; 559 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) 560 sc->control_TLR = TRUE; 561 562 mps_resize_queues(sc); 563 564 /* 565 * Initialize all Tail Queues 566 */ 567 TAILQ_INIT(&sc->req_list); 568 TAILQ_INIT(&sc->high_priority_req_list); 569 TAILQ_INIT(&sc->chain_list); 570 TAILQ_INIT(&sc->tm_list); 571 } 572 573 /* 574 * If doing a Diag Reset and the FW is significantly different 575 * (reallocating will be set above in IOC Facts comparison), then all 576 * buffers based on the IOC Facts will need to be freed before they are 577 * reallocated. 578 */ 579 if (reallocating) { 580 mps_iocfacts_free(sc); 581 mpssas_realloc_targets(sc, saved_facts.MaxTargets + 582 saved_facts.MaxVolumes); 583 } 584 585 /* 586 * Any deallocation has been completed. Now start reallocating 587 * if needed. Will only need to reallocate if attaching or if the new 588 * IOC Facts are different from the previous IOC Facts after a Diag 589 * Reset. Targets have already been allocated above if needed. 590 */ 591 error = 0; 592 while (attaching || reallocating) { 593 if ((error = mps_alloc_hw_queues(sc)) != 0) 594 break; 595 if ((error = mps_alloc_replies(sc)) != 0) 596 break; 597 if ((error = mps_alloc_requests(sc)) != 0) 598 break; 599 if ((error = mps_alloc_queues(sc)) != 0) 600 break; 601 602 break; 603 } 604 if (error) { 605 mps_dprint(sc, MPS_INIT|MPS_FAULT, 606 "Failed to alloc queues with error %d\n", error); 607 mps_free(sc); 608 return (error); 609 } 610 611 /* Always initialize the queues */ 612 bzero(sc->free_queue, sc->fqdepth * 4); 613 mps_init_queues(sc); 614 615 /* 616 * Always get the chip out of the reset state, but only panic if not 617 * attaching. If attaching and there is an error, that is handled by 618 * the OS. 619 */ 620 error = mps_transition_operational(sc); 621 if (error != 0) { 622 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to " 623 "transition to operational with error %d\n", error); 624 mps_free(sc); 625 return (error); 626 } 627 628 /* 629 * Finish the queue initialization. 630 * These are set here instead of in mps_init_queues() because the 631 * IOC resets these values during the state transition in 632 * mps_transition_operational(). The free index is set to 1 633 * because the corresponding index in the IOC is set to 0, and the 634 * IOC treats the queues as full if both are set to the same value. 635 * Hence the reason that the queue can't hold all of the possible 636 * replies. 637 */ 638 sc->replypostindex = 0; 639 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); 640 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0); 641 642 /* 643 * Attach the subsystems so they can prepare their event masks. 644 * XXX Should be dynamic so that IM/IR and user modules can attach 645 */ 646 error = 0; 647 while (attaching) { 648 mps_dprint(sc, MPS_INIT, "Attaching subsystems\n"); 649 if ((error = mps_attach_log(sc)) != 0) 650 break; 651 if ((error = mps_attach_sas(sc)) != 0) 652 break; 653 if ((error = mps_attach_user(sc)) != 0) 654 break; 655 break; 656 } 657 if (error) { 658 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to attach all " 659 "subsystems: error %d\n", error); 660 mps_free(sc); 661 return (error); 662 } 663 664 if ((error = mps_pci_setup_interrupts(sc)) != 0) { 665 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to setup " 666 "interrupts\n"); 667 mps_free(sc); 668 return (error); 669 } 670 671 /* 672 * Set flag if this is a WD controller. This shouldn't ever change, but 673 * reset it after a Diag Reset, just in case. 674 */ 675 sc->WD_available = FALSE; 676 if (pci_get_device(sc->mps_dev) == MPI2_MFGPAGE_DEVID_SSS6200) 677 sc->WD_available = TRUE; 678 679 return (error); 680 } 681 682 /* 683 * This is called if memory is being free (during detach for example) and when 684 * buffers need to be reallocated due to a Diag Reset. 685 */ 686 static void 687 mps_iocfacts_free(struct mps_softc *sc) 688 { 689 struct mps_command *cm; 690 int i; 691 692 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 693 694 if (sc->free_busaddr != 0) 695 bus_dmamap_unload(sc->queues_dmat, sc->queues_map); 696 if (sc->free_queue != NULL) 697 bus_dmamem_free(sc->queues_dmat, sc->free_queue, 698 sc->queues_map); 699 if (sc->queues_dmat != NULL) 700 bus_dma_tag_destroy(sc->queues_dmat); 701 702 if (sc->chain_busaddr != 0) 703 bus_dmamap_unload(sc->chain_dmat, sc->chain_map); 704 if (sc->chain_frames != NULL) 705 bus_dmamem_free(sc->chain_dmat, sc->chain_frames, 706 sc->chain_map); 707 if (sc->chain_dmat != NULL) 708 bus_dma_tag_destroy(sc->chain_dmat); 709 710 if (sc->sense_busaddr != 0) 711 bus_dmamap_unload(sc->sense_dmat, sc->sense_map); 712 if (sc->sense_frames != NULL) 713 bus_dmamem_free(sc->sense_dmat, sc->sense_frames, 714 sc->sense_map); 715 if (sc->sense_dmat != NULL) 716 bus_dma_tag_destroy(sc->sense_dmat); 717 718 if (sc->reply_busaddr != 0) 719 bus_dmamap_unload(sc->reply_dmat, sc->reply_map); 720 if (sc->reply_frames != NULL) 721 bus_dmamem_free(sc->reply_dmat, sc->reply_frames, 722 sc->reply_map); 723 if (sc->reply_dmat != NULL) 724 bus_dma_tag_destroy(sc->reply_dmat); 725 726 if (sc->req_busaddr != 0) 727 bus_dmamap_unload(sc->req_dmat, sc->req_map); 728 if (sc->req_frames != NULL) 729 bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map); 730 if (sc->req_dmat != NULL) 731 bus_dma_tag_destroy(sc->req_dmat); 732 733 if (sc->chains != NULL) 734 free(sc->chains, M_MPT2); 735 if (sc->commands != NULL) { 736 for (i = 1; i < sc->num_reqs; i++) { 737 cm = &sc->commands[i]; 738 bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap); 739 } 740 free(sc->commands, M_MPT2); 741 } 742 if (sc->buffer_dmat != NULL) 743 bus_dma_tag_destroy(sc->buffer_dmat); 744 745 mps_pci_free_interrupts(sc); 746 free(sc->queues, M_MPT2); 747 sc->queues = NULL; 748 } 749 750 /* 751 * The terms diag reset and hard reset are used interchangeably in the MPI 752 * docs to mean resetting the controller chip. In this code diag reset 753 * cleans everything up, and the hard reset function just sends the reset 754 * sequence to the chip. This should probably be refactored so that every 755 * subsystem gets a reset notification of some sort, and can clean up 756 * appropriately. 757 */ 758 int 759 mps_reinit(struct mps_softc *sc) 760 { 761 int error; 762 struct mpssas_softc *sassc; 763 764 sassc = sc->sassc; 765 766 MPS_FUNCTRACE(sc); 767 768 mtx_assert(&sc->mps_mtx, MA_OWNED); 769 770 mps_dprint(sc, MPS_INIT|MPS_INFO, "Reinitializing controller\n"); 771 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) { 772 mps_dprint(sc, MPS_INIT, "Reset already in progress\n"); 773 return 0; 774 } 775 776 /* make sure the completion callbacks can recognize they're getting 777 * a NULL cm_reply due to a reset. 778 */ 779 sc->mps_flags |= MPS_FLAGS_DIAGRESET; 780 781 /* 782 * Mask interrupts here. 783 */ 784 mps_dprint(sc, MPS_INIT, "masking interrupts and resetting\n"); 785 mps_mask_intr(sc); 786 787 error = mps_diag_reset(sc, CAN_SLEEP); 788 if (error != 0) { 789 /* XXXSL No need to panic here */ 790 panic("%s hard reset failed with error %d\n", 791 __func__, error); 792 } 793 794 /* Restore the PCI state, including the MSI-X registers */ 795 mps_pci_restore(sc); 796 797 /* Give the I/O subsystem special priority to get itself prepared */ 798 mpssas_handle_reinit(sc); 799 800 /* 801 * Get IOC Facts and allocate all structures based on this information. 802 * The attach function will also call mps_iocfacts_allocate at startup. 803 * If relevant values have changed in IOC Facts, this function will free 804 * all of the memory based on IOC Facts and reallocate that memory. 805 */ 806 if ((error = mps_iocfacts_allocate(sc, FALSE)) != 0) { 807 panic("%s IOC Facts based allocation failed with error %d\n", 808 __func__, error); 809 } 810 811 /* 812 * Mapping structures will be re-allocated after getting IOC Page8, so 813 * free these structures here. 814 */ 815 mps_mapping_exit(sc); 816 817 /* 818 * The static page function currently read is IOC Page8. Others can be 819 * added in future. It's possible that the values in IOC Page8 have 820 * changed after a Diag Reset due to user modification, so always read 821 * these. Interrupts are masked, so unmask them before getting config 822 * pages. 823 */ 824 mps_unmask_intr(sc); 825 sc->mps_flags &= ~MPS_FLAGS_DIAGRESET; 826 mps_base_static_config_pages(sc); 827 828 /* 829 * Some mapping info is based in IOC Page8 data, so re-initialize the 830 * mapping tables. 831 */ 832 mps_mapping_initialize(sc); 833 834 /* 835 * Restart will reload the event masks clobbered by the reset, and 836 * then enable the port. 837 */ 838 mps_reregister_events(sc); 839 840 /* the end of discovery will release the simq, so we're done. */ 841 mps_dprint(sc, MPS_INIT|MPS_XINFO, "Finished sc %p post %u free %u\n", 842 sc, sc->replypostindex, sc->replyfreeindex); 843 844 mpssas_release_simq_reinit(sassc); 845 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 846 847 return 0; 848 } 849 850 /* Wait for the chip to ACK a word that we've put into its FIFO 851 * Wait for <timeout> seconds. In single loop wait for busy loop 852 * for 500 microseconds. 853 * Total is [ 0.5 * (2000 * <timeout>) ] in miliseconds. 854 * */ 855 static int 856 mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag) 857 { 858 859 u32 cntdn, count; 860 u32 int_status; 861 u32 doorbell; 862 863 count = 0; 864 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 865 do { 866 int_status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 867 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 868 mps_dprint(sc, MPS_TRACE, 869 "%s: successful count(%d), timeout(%d)\n", 870 __func__, count, timeout); 871 return 0; 872 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 873 doorbell = mps_regread(sc, MPI2_DOORBELL_OFFSET); 874 if ((doorbell & MPI2_IOC_STATE_MASK) == 875 MPI2_IOC_STATE_FAULT) { 876 mps_dprint(sc, MPS_FAULT, 877 "fault_state(0x%04x)!\n", doorbell); 878 return (EFAULT); 879 } 880 } else if (int_status == 0xFFFFFFFF) 881 goto out; 882 883 /* If it can sleep, sleep for 1 milisecond, else busy loop for 884 * 0.5 milisecond */ 885 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 886 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 887 "mpsdba", hz/1000); 888 else if (sleep_flag == CAN_SLEEP) 889 pause("mpsdba", hz/1000); 890 else 891 DELAY(500); 892 count++; 893 } while (--cntdn); 894 895 out: 896 mps_dprint(sc, MPS_FAULT, "%s: failed due to timeout count(%d), " 897 "int_status(%x)!\n", __func__, count, int_status); 898 return (ETIMEDOUT); 899 900 } 901 902 /* Wait for the chip to signal that the next word in its FIFO can be fetched */ 903 static int 904 mps_wait_db_int(struct mps_softc *sc) 905 { 906 int retry; 907 908 for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) { 909 if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) & 910 MPI2_HIS_IOC2SYS_DB_STATUS) != 0) 911 return (0); 912 DELAY(2000); 913 } 914 return (ETIMEDOUT); 915 } 916 917 /* Step through the synchronous command state machine, i.e. "Doorbell mode" */ 918 static int 919 mps_request_sync(struct mps_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply, 920 int req_sz, int reply_sz, int timeout) 921 { 922 uint32_t *data32; 923 uint16_t *data16; 924 int i, count, ioc_sz, residual; 925 int sleep_flags = CAN_SLEEP; 926 927 if (curthread->td_no_sleeping != 0) 928 sleep_flags = NO_SLEEP; 929 930 /* Step 1 */ 931 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 932 933 /* Step 2 */ 934 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 935 return (EBUSY); 936 937 /* Step 3 938 * Announce that a message is coming through the doorbell. Messages 939 * are pushed at 32bit words, so round up if needed. 940 */ 941 count = (req_sz + 3) / 4; 942 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, 943 (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) | 944 (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT)); 945 946 /* Step 4 */ 947 if (mps_wait_db_int(sc) || 948 (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) { 949 mps_dprint(sc, MPS_FAULT, "Doorbell failed to activate\n"); 950 return (ENXIO); 951 } 952 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 953 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) { 954 mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed\n"); 955 return (ENXIO); 956 } 957 958 /* Step 5 */ 959 /* Clock out the message data synchronously in 32-bit dwords*/ 960 data32 = (uint32_t *)req; 961 for (i = 0; i < count; i++) { 962 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i])); 963 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) { 964 mps_dprint(sc, MPS_FAULT, 965 "Timeout while writing doorbell\n"); 966 return (ENXIO); 967 } 968 } 969 970 /* Step 6 */ 971 /* Clock in the reply in 16-bit words. The total length of the 972 * message is always in the 4th byte, so clock out the first 2 words 973 * manually, then loop the rest. 974 */ 975 data16 = (uint16_t *)reply; 976 if (mps_wait_db_int(sc) != 0) { 977 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 0\n"); 978 return (ENXIO); 979 } 980 data16[0] = 981 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 982 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 983 if (mps_wait_db_int(sc) != 0) { 984 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 1\n"); 985 return (ENXIO); 986 } 987 data16[1] = 988 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 989 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 990 991 /* Number of 32bit words in the message */ 992 ioc_sz = reply->MsgLength; 993 994 /* 995 * Figure out how many 16bit words to clock in without overrunning. 996 * The precision loss with dividing reply_sz can safely be 997 * ignored because the messages can only be multiples of 32bits. 998 */ 999 residual = 0; 1000 count = MIN((reply_sz / 4), ioc_sz) * 2; 1001 if (count < ioc_sz * 2) { 1002 residual = ioc_sz * 2 - count; 1003 mps_dprint(sc, MPS_ERROR, "Driver error, throwing away %d " 1004 "residual message words\n", residual); 1005 } 1006 1007 for (i = 2; i < count; i++) { 1008 if (mps_wait_db_int(sc) != 0) { 1009 mps_dprint(sc, MPS_FAULT, 1010 "Timeout reading doorbell %d\n", i); 1011 return (ENXIO); 1012 } 1013 data16[i] = mps_regread(sc, MPI2_DOORBELL_OFFSET) & 1014 MPI2_DOORBELL_DATA_MASK; 1015 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1016 } 1017 1018 /* 1019 * Pull out residual words that won't fit into the provided buffer. 1020 * This keeps the chip from hanging due to a driver programming 1021 * error. 1022 */ 1023 while (residual--) { 1024 if (mps_wait_db_int(sc) != 0) { 1025 mps_dprint(sc, MPS_FAULT, 1026 "Timeout reading doorbell\n"); 1027 return (ENXIO); 1028 } 1029 (void)mps_regread(sc, MPI2_DOORBELL_OFFSET); 1030 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1031 } 1032 1033 /* Step 7 */ 1034 if (mps_wait_db_int(sc) != 0) { 1035 mps_dprint(sc, MPS_FAULT, "Timeout waiting to exit doorbell\n"); 1036 return (ENXIO); 1037 } 1038 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 1039 mps_dprint(sc, MPS_FAULT, "Warning, doorbell still active\n"); 1040 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1041 1042 return (0); 1043 } 1044 1045 static void 1046 mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm) 1047 { 1048 reply_descriptor rd; 1049 MPS_FUNCTRACE(sc); 1050 mps_dprint(sc, MPS_TRACE, "SMID %u cm %p ccb %p\n", 1051 cm->cm_desc.Default.SMID, cm, cm->cm_ccb); 1052 1053 if (sc->mps_flags & MPS_FLAGS_ATTACH_DONE && !(sc->mps_flags & MPS_FLAGS_SHUTDOWN)) 1054 mtx_assert(&sc->mps_mtx, MA_OWNED); 1055 1056 if (++sc->io_cmds_active > sc->io_cmds_highwater) 1057 sc->io_cmds_highwater++; 1058 rd.u.low = cm->cm_desc.Words.Low; 1059 rd.u.high = cm->cm_desc.Words.High; 1060 rd.word = htole64(rd.word); 1061 /* TODO-We may need to make below regwrite atomic */ 1062 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET, 1063 rd.u.low); 1064 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET, 1065 rd.u.high); 1066 } 1067 1068 /* 1069 * Just the FACTS, ma'am. 1070 */ 1071 static int 1072 mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts) 1073 { 1074 MPI2_DEFAULT_REPLY *reply; 1075 MPI2_IOC_FACTS_REQUEST request; 1076 int error, req_sz, reply_sz; 1077 1078 MPS_FUNCTRACE(sc); 1079 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1080 1081 req_sz = sizeof(MPI2_IOC_FACTS_REQUEST); 1082 reply_sz = sizeof(MPI2_IOC_FACTS_REPLY); 1083 reply = (MPI2_DEFAULT_REPLY *)facts; 1084 1085 bzero(&request, req_sz); 1086 request.Function = MPI2_FUNCTION_IOC_FACTS; 1087 error = mps_request_sync(sc, &request, reply, req_sz, reply_sz, 5); 1088 mps_dprint(sc, MPS_INIT, "%s exit error= %d\n", __func__, error); 1089 1090 return (error); 1091 } 1092 1093 static int 1094 mps_send_iocinit(struct mps_softc *sc) 1095 { 1096 MPI2_IOC_INIT_REQUEST init; 1097 MPI2_DEFAULT_REPLY reply; 1098 int req_sz, reply_sz, error; 1099 struct timeval now; 1100 uint64_t time_in_msec; 1101 1102 MPS_FUNCTRACE(sc); 1103 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1104 1105 req_sz = sizeof(MPI2_IOC_INIT_REQUEST); 1106 reply_sz = sizeof(MPI2_IOC_INIT_REPLY); 1107 bzero(&init, req_sz); 1108 bzero(&reply, reply_sz); 1109 1110 /* 1111 * Fill in the init block. Note that most addresses are 1112 * deliberately in the lower 32bits of memory. This is a micro- 1113 * optimzation for PCI/PCIX, though it's not clear if it helps PCIe. 1114 */ 1115 init.Function = MPI2_FUNCTION_IOC_INIT; 1116 init.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 1117 init.MsgVersion = htole16(MPI2_VERSION); 1118 init.HeaderVersion = htole16(MPI2_HEADER_VERSION); 1119 init.SystemRequestFrameSize = htole16(sc->facts->IOCRequestFrameSize); 1120 init.ReplyDescriptorPostQueueDepth = htole16(sc->pqdepth); 1121 init.ReplyFreeQueueDepth = htole16(sc->fqdepth); 1122 init.SenseBufferAddressHigh = 0; 1123 init.SystemReplyAddressHigh = 0; 1124 init.SystemRequestFrameBaseAddress.High = 0; 1125 init.SystemRequestFrameBaseAddress.Low = htole32((uint32_t)sc->req_busaddr); 1126 init.ReplyDescriptorPostQueueAddress.High = 0; 1127 init.ReplyDescriptorPostQueueAddress.Low = htole32((uint32_t)sc->post_busaddr); 1128 init.ReplyFreeQueueAddress.High = 0; 1129 init.ReplyFreeQueueAddress.Low = htole32((uint32_t)sc->free_busaddr); 1130 getmicrotime(&now); 1131 time_in_msec = (now.tv_sec * 1000 + now.tv_usec/1000); 1132 init.TimeStamp.High = htole32((time_in_msec >> 32) & 0xFFFFFFFF); 1133 init.TimeStamp.Low = htole32(time_in_msec & 0xFFFFFFFF); 1134 1135 error = mps_request_sync(sc, &init, &reply, req_sz, reply_sz, 5); 1136 if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 1137 error = ENXIO; 1138 1139 mps_dprint(sc, MPS_INIT, "IOCInit status= 0x%x\n", reply.IOCStatus); 1140 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 1141 return (error); 1142 } 1143 1144 void 1145 mps_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1146 { 1147 bus_addr_t *addr; 1148 1149 addr = arg; 1150 *addr = segs[0].ds_addr; 1151 } 1152 1153 static int 1154 mps_alloc_queues(struct mps_softc *sc) 1155 { 1156 struct mps_queue *q; 1157 int nq, i; 1158 1159 nq = sc->msi_msgs; 1160 mps_dprint(sc, MPS_INIT|MPS_XINFO, "Allocating %d I/O queues\n", nq); 1161 1162 sc->queues = malloc(sizeof(struct mps_queue) * nq, M_MPT2, 1163 M_NOWAIT|M_ZERO); 1164 if (sc->queues == NULL) 1165 return (ENOMEM); 1166 1167 for (i = 0; i < nq; i++) { 1168 q = &sc->queues[i]; 1169 mps_dprint(sc, MPS_INIT, "Configuring queue %d %p\n", i, q); 1170 q->sc = sc; 1171 q->qnum = i; 1172 } 1173 1174 return (0); 1175 } 1176 1177 static int 1178 mps_alloc_hw_queues(struct mps_softc *sc) 1179 { 1180 bus_addr_t queues_busaddr; 1181 uint8_t *queues; 1182 int qsize, fqsize, pqsize; 1183 1184 /* 1185 * The reply free queue contains 4 byte entries in multiples of 16 and 1186 * aligned on a 16 byte boundary. There must always be an unused entry. 1187 * This queue supplies fresh reply frames for the firmware to use. 1188 * 1189 * The reply descriptor post queue contains 8 byte entries in 1190 * multiples of 16 and aligned on a 16 byte boundary. This queue 1191 * contains filled-in reply frames sent from the firmware to the host. 1192 * 1193 * These two queues are allocated together for simplicity. 1194 */ 1195 sc->fqdepth = roundup2(sc->num_replies + 1, 16); 1196 sc->pqdepth = roundup2(sc->num_replies + 1, 16); 1197 fqsize= sc->fqdepth * 4; 1198 pqsize = sc->pqdepth * 8; 1199 qsize = fqsize + pqsize; 1200 1201 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1202 16, 0, /* algnmnt, boundary */ 1203 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1204 BUS_SPACE_MAXADDR, /* highaddr */ 1205 NULL, NULL, /* filter, filterarg */ 1206 qsize, /* maxsize */ 1207 1, /* nsegments */ 1208 qsize, /* maxsegsize */ 1209 0, /* flags */ 1210 NULL, NULL, /* lockfunc, lockarg */ 1211 &sc->queues_dmat)) { 1212 mps_dprint(sc, MPS_ERROR, "Cannot allocate queues DMA tag\n"); 1213 return (ENOMEM); 1214 } 1215 if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT, 1216 &sc->queues_map)) { 1217 mps_dprint(sc, MPS_ERROR, "Cannot allocate queues memory\n"); 1218 return (ENOMEM); 1219 } 1220 bzero(queues, qsize); 1221 bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize, 1222 mps_memaddr_cb, &queues_busaddr, 0); 1223 1224 sc->free_queue = (uint32_t *)queues; 1225 sc->free_busaddr = queues_busaddr; 1226 sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize); 1227 sc->post_busaddr = queues_busaddr + fqsize; 1228 1229 return (0); 1230 } 1231 1232 static int 1233 mps_alloc_replies(struct mps_softc *sc) 1234 { 1235 int rsize, num_replies; 1236 1237 /* 1238 * sc->num_replies should be one less than sc->fqdepth. We need to 1239 * allocate space for sc->fqdepth replies, but only sc->num_replies 1240 * replies can be used at once. 1241 */ 1242 num_replies = max(sc->fqdepth, sc->num_replies); 1243 1244 rsize = sc->facts->ReplyFrameSize * num_replies * 4; 1245 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1246 4, 0, /* algnmnt, boundary */ 1247 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1248 BUS_SPACE_MAXADDR, /* highaddr */ 1249 NULL, NULL, /* filter, filterarg */ 1250 rsize, /* maxsize */ 1251 1, /* nsegments */ 1252 rsize, /* maxsegsize */ 1253 0, /* flags */ 1254 NULL, NULL, /* lockfunc, lockarg */ 1255 &sc->reply_dmat)) { 1256 mps_dprint(sc, MPS_ERROR, "Cannot allocate replies DMA tag\n"); 1257 return (ENOMEM); 1258 } 1259 if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames, 1260 BUS_DMA_NOWAIT, &sc->reply_map)) { 1261 mps_dprint(sc, MPS_ERROR, "Cannot allocate replies memory\n"); 1262 return (ENOMEM); 1263 } 1264 bzero(sc->reply_frames, rsize); 1265 bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize, 1266 mps_memaddr_cb, &sc->reply_busaddr, 0); 1267 1268 return (0); 1269 } 1270 1271 static int 1272 mps_alloc_requests(struct mps_softc *sc) 1273 { 1274 struct mps_command *cm; 1275 struct mps_chain *chain; 1276 int i, rsize, nsegs; 1277 1278 rsize = sc->facts->IOCRequestFrameSize * sc->num_reqs * 4; 1279 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1280 16, 0, /* algnmnt, boundary */ 1281 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1282 BUS_SPACE_MAXADDR, /* highaddr */ 1283 NULL, NULL, /* filter, filterarg */ 1284 rsize, /* maxsize */ 1285 1, /* nsegments */ 1286 rsize, /* maxsegsize */ 1287 0, /* flags */ 1288 NULL, NULL, /* lockfunc, lockarg */ 1289 &sc->req_dmat)) { 1290 mps_dprint(sc, MPS_ERROR, "Cannot allocate request DMA tag\n"); 1291 return (ENOMEM); 1292 } 1293 if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames, 1294 BUS_DMA_NOWAIT, &sc->req_map)) { 1295 mps_dprint(sc, MPS_ERROR, "Cannot allocate request memory\n"); 1296 return (ENOMEM); 1297 } 1298 bzero(sc->req_frames, rsize); 1299 bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize, 1300 mps_memaddr_cb, &sc->req_busaddr, 0); 1301 1302 rsize = sc->facts->IOCRequestFrameSize * sc->max_chains * 4; 1303 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1304 16, 0, /* algnmnt, boundary */ 1305 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1306 BUS_SPACE_MAXADDR, /* highaddr */ 1307 NULL, NULL, /* filter, filterarg */ 1308 rsize, /* maxsize */ 1309 1, /* nsegments */ 1310 rsize, /* maxsegsize */ 1311 0, /* flags */ 1312 NULL, NULL, /* lockfunc, lockarg */ 1313 &sc->chain_dmat)) { 1314 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain DMA tag\n"); 1315 return (ENOMEM); 1316 } 1317 if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames, 1318 BUS_DMA_NOWAIT, &sc->chain_map)) { 1319 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain memory\n"); 1320 return (ENOMEM); 1321 } 1322 bzero(sc->chain_frames, rsize); 1323 bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, rsize, 1324 mps_memaddr_cb, &sc->chain_busaddr, 0); 1325 1326 rsize = MPS_SENSE_LEN * sc->num_reqs; 1327 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1328 1, 0, /* algnmnt, boundary */ 1329 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1330 BUS_SPACE_MAXADDR, /* highaddr */ 1331 NULL, NULL, /* filter, filterarg */ 1332 rsize, /* maxsize */ 1333 1, /* nsegments */ 1334 rsize, /* maxsegsize */ 1335 0, /* flags */ 1336 NULL, NULL, /* lockfunc, lockarg */ 1337 &sc->sense_dmat)) { 1338 mps_dprint(sc, MPS_ERROR, "Cannot allocate sense DMA tag\n"); 1339 return (ENOMEM); 1340 } 1341 if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames, 1342 BUS_DMA_NOWAIT, &sc->sense_map)) { 1343 mps_dprint(sc, MPS_ERROR, "Cannot allocate sense memory\n"); 1344 return (ENOMEM); 1345 } 1346 bzero(sc->sense_frames, rsize); 1347 bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize, 1348 mps_memaddr_cb, &sc->sense_busaddr, 0); 1349 1350 sc->chains = malloc(sizeof(struct mps_chain) * sc->max_chains, M_MPT2, 1351 M_WAITOK | M_ZERO); 1352 if(!sc->chains) { 1353 mps_dprint(sc, MPS_ERROR, "Cannot allocate chains memory\n"); 1354 return (ENOMEM); 1355 } 1356 for (i = 0; i < sc->max_chains; i++) { 1357 chain = &sc->chains[i]; 1358 chain->chain = (MPI2_SGE_IO_UNION *)(sc->chain_frames + 1359 i * sc->facts->IOCRequestFrameSize * 4); 1360 chain->chain_busaddr = sc->chain_busaddr + 1361 i * sc->facts->IOCRequestFrameSize * 4; 1362 mps_free_chain(sc, chain); 1363 sc->chain_free_lowwater++; 1364 } 1365 1366 /* XXX Need to pick a more precise value */ 1367 nsegs = (MAXPHYS / PAGE_SIZE) + 1; 1368 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1369 1, 0, /* algnmnt, boundary */ 1370 BUS_SPACE_MAXADDR, /* lowaddr */ 1371 BUS_SPACE_MAXADDR, /* highaddr */ 1372 NULL, NULL, /* filter, filterarg */ 1373 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 1374 nsegs, /* nsegments */ 1375 BUS_SPACE_MAXSIZE_24BIT,/* maxsegsize */ 1376 BUS_DMA_ALLOCNOW, /* flags */ 1377 busdma_lock_mutex, /* lockfunc */ 1378 &sc->mps_mtx, /* lockarg */ 1379 &sc->buffer_dmat)) { 1380 mps_dprint(sc, MPS_ERROR, "Cannot allocate buffer DMA tag\n"); 1381 return (ENOMEM); 1382 } 1383 1384 /* 1385 * SMID 0 cannot be used as a free command per the firmware spec. 1386 * Just drop that command instead of risking accounting bugs. 1387 */ 1388 sc->commands = malloc(sizeof(struct mps_command) * sc->num_reqs, 1389 M_MPT2, M_WAITOK | M_ZERO); 1390 if(!sc->commands) { 1391 mps_dprint(sc, MPS_ERROR, "Cannot allocate command memory\n"); 1392 return (ENOMEM); 1393 } 1394 for (i = 1; i < sc->num_reqs; i++) { 1395 cm = &sc->commands[i]; 1396 cm->cm_req = sc->req_frames + 1397 i * sc->facts->IOCRequestFrameSize * 4; 1398 cm->cm_req_busaddr = sc->req_busaddr + 1399 i * sc->facts->IOCRequestFrameSize * 4; 1400 cm->cm_sense = &sc->sense_frames[i]; 1401 cm->cm_sense_busaddr = sc->sense_busaddr + i * MPS_SENSE_LEN; 1402 cm->cm_desc.Default.SMID = i; 1403 cm->cm_sc = sc; 1404 TAILQ_INIT(&cm->cm_chain_list); 1405 callout_init_mtx(&cm->cm_callout, &sc->mps_mtx, 0); 1406 1407 /* XXX Is a failure here a critical problem? */ 1408 if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0) 1409 if (i <= sc->facts->HighPriorityCredit) 1410 mps_free_high_priority_command(sc, cm); 1411 else 1412 mps_free_command(sc, cm); 1413 else { 1414 panic("failed to allocate command %d\n", i); 1415 sc->num_reqs = i; 1416 break; 1417 } 1418 } 1419 1420 return (0); 1421 } 1422 1423 static int 1424 mps_init_queues(struct mps_softc *sc) 1425 { 1426 int i; 1427 1428 memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8); 1429 1430 /* 1431 * According to the spec, we need to use one less reply than we 1432 * have space for on the queue. So sc->num_replies (the number we 1433 * use) should be less than sc->fqdepth (allocated size). 1434 */ 1435 if (sc->num_replies >= sc->fqdepth) 1436 return (EINVAL); 1437 1438 /* 1439 * Initialize all of the free queue entries. 1440 */ 1441 for (i = 0; i < sc->fqdepth; i++) 1442 sc->free_queue[i] = sc->reply_busaddr + (i * sc->facts->ReplyFrameSize * 4); 1443 sc->replyfreeindex = sc->num_replies; 1444 1445 return (0); 1446 } 1447 1448 /* Get the driver parameter tunables. Lowest priority are the driver defaults. 1449 * Next are the global settings, if they exist. Highest are the per-unit 1450 * settings, if they exist. 1451 */ 1452 void 1453 mps_get_tunables(struct mps_softc *sc) 1454 { 1455 char tmpstr[80]; 1456 1457 /* XXX default to some debugging for now */ 1458 sc->mps_debug = MPS_INFO|MPS_FAULT; 1459 sc->disable_msix = 0; 1460 sc->disable_msi = 0; 1461 sc->max_msix = MPS_MSIX_MAX; 1462 sc->max_chains = MPS_CHAIN_FRAMES; 1463 sc->max_io_pages = MPS_MAXIO_PAGES; 1464 sc->enable_ssu = MPS_SSU_ENABLE_SSD_DISABLE_HDD; 1465 sc->spinup_wait_time = DEFAULT_SPINUP_WAIT; 1466 sc->use_phynum = 1; 1467 sc->max_reqframes = MPS_REQ_FRAMES; 1468 sc->max_prireqframes = MPS_PRI_REQ_FRAMES; 1469 sc->max_replyframes = MPS_REPLY_FRAMES; 1470 sc->max_evtframes = MPS_EVT_REPLY_FRAMES; 1471 1472 /* 1473 * Grab the global variables. 1474 */ 1475 TUNABLE_INT_FETCH("hw.mps.debug_level", &sc->mps_debug); 1476 TUNABLE_INT_FETCH("hw.mps.disable_msix", &sc->disable_msix); 1477 TUNABLE_INT_FETCH("hw.mps.disable_msi", &sc->disable_msi); 1478 TUNABLE_INT_FETCH("hw.mps.max_msix", &sc->max_msix); 1479 TUNABLE_INT_FETCH("hw.mps.max_chains", &sc->max_chains); 1480 TUNABLE_INT_FETCH("hw.mps.max_io_pages", &sc->max_io_pages); 1481 TUNABLE_INT_FETCH("hw.mps.enable_ssu", &sc->enable_ssu); 1482 TUNABLE_INT_FETCH("hw.mps.spinup_wait_time", &sc->spinup_wait_time); 1483 TUNABLE_INT_FETCH("hw.mps.use_phy_num", &sc->use_phynum); 1484 TUNABLE_INT_FETCH("hw.mps.max_reqframes", &sc->max_reqframes); 1485 TUNABLE_INT_FETCH("hw.mps.max_prireqframes", &sc->max_prireqframes); 1486 TUNABLE_INT_FETCH("hw.mps.max_replyframes", &sc->max_replyframes); 1487 TUNABLE_INT_FETCH("hw.mps.max_evtframes", &sc->max_evtframes); 1488 1489 /* Grab the unit-instance variables */ 1490 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.debug_level", 1491 device_get_unit(sc->mps_dev)); 1492 TUNABLE_INT_FETCH(tmpstr, &sc->mps_debug); 1493 1494 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msix", 1495 device_get_unit(sc->mps_dev)); 1496 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix); 1497 1498 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msi", 1499 device_get_unit(sc->mps_dev)); 1500 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi); 1501 1502 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_msix", 1503 device_get_unit(sc->mps_dev)); 1504 TUNABLE_INT_FETCH(tmpstr, &sc->max_msix); 1505 1506 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_chains", 1507 device_get_unit(sc->mps_dev)); 1508 TUNABLE_INT_FETCH(tmpstr, &sc->max_chains); 1509 1510 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_io_pages", 1511 device_get_unit(sc->mps_dev)); 1512 TUNABLE_INT_FETCH(tmpstr, &sc->max_io_pages); 1513 1514 bzero(sc->exclude_ids, sizeof(sc->exclude_ids)); 1515 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.exclude_ids", 1516 device_get_unit(sc->mps_dev)); 1517 TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids)); 1518 1519 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.enable_ssu", 1520 device_get_unit(sc->mps_dev)); 1521 TUNABLE_INT_FETCH(tmpstr, &sc->enable_ssu); 1522 1523 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.spinup_wait_time", 1524 device_get_unit(sc->mps_dev)); 1525 TUNABLE_INT_FETCH(tmpstr, &sc->spinup_wait_time); 1526 1527 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.use_phy_num", 1528 device_get_unit(sc->mps_dev)); 1529 TUNABLE_INT_FETCH(tmpstr, &sc->use_phynum); 1530 1531 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_reqframes", 1532 device_get_unit(sc->mps_dev)); 1533 TUNABLE_INT_FETCH(tmpstr, &sc->max_reqframes); 1534 1535 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_prireqframes", 1536 device_get_unit(sc->mps_dev)); 1537 TUNABLE_INT_FETCH(tmpstr, &sc->max_prireqframes); 1538 1539 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_replyframes", 1540 device_get_unit(sc->mps_dev)); 1541 TUNABLE_INT_FETCH(tmpstr, &sc->max_replyframes); 1542 1543 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_evtframes", 1544 device_get_unit(sc->mps_dev)); 1545 TUNABLE_INT_FETCH(tmpstr, &sc->max_evtframes); 1546 1547 } 1548 1549 static void 1550 mps_setup_sysctl(struct mps_softc *sc) 1551 { 1552 struct sysctl_ctx_list *sysctl_ctx = NULL; 1553 struct sysctl_oid *sysctl_tree = NULL; 1554 char tmpstr[80], tmpstr2[80]; 1555 1556 /* 1557 * Setup the sysctl variable so the user can change the debug level 1558 * on the fly. 1559 */ 1560 snprintf(tmpstr, sizeof(tmpstr), "MPS controller %d", 1561 device_get_unit(sc->mps_dev)); 1562 snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mps_dev)); 1563 1564 sysctl_ctx = device_get_sysctl_ctx(sc->mps_dev); 1565 if (sysctl_ctx != NULL) 1566 sysctl_tree = device_get_sysctl_tree(sc->mps_dev); 1567 1568 if (sysctl_tree == NULL) { 1569 sysctl_ctx_init(&sc->sysctl_ctx); 1570 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx, 1571 SYSCTL_STATIC_CHILDREN(_hw_mps), OID_AUTO, tmpstr2, 1572 CTLFLAG_RD, 0, tmpstr); 1573 if (sc->sysctl_tree == NULL) 1574 return; 1575 sysctl_ctx = &sc->sysctl_ctx; 1576 sysctl_tree = sc->sysctl_tree; 1577 } 1578 1579 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1580 OID_AUTO, "debug_level", CTLFLAG_RW, &sc->mps_debug, 0, 1581 "mps debug level"); 1582 1583 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1584 OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0, 1585 "Disable the use of MSI-X interrupts"); 1586 1587 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1588 OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0, 1589 "Disable the use of MSI interrupts"); 1590 1591 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1592 OID_AUTO, "max_msix", CTLFLAG_RD, &sc->max_msix, 0, 1593 "User-defined maximum number of MSIX queues"); 1594 1595 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1596 OID_AUTO, "msix_msgs", CTLFLAG_RD, &sc->msi_msgs, 0, 1597 "Negotiated number of MSIX queues"); 1598 1599 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1600 OID_AUTO, "max_reqframes", CTLFLAG_RD, &sc->max_reqframes, 0, 1601 "Total number of allocated request frames"); 1602 1603 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1604 OID_AUTO, "max_prireqframes", CTLFLAG_RD, &sc->max_prireqframes, 0, 1605 "Total number of allocated high priority request frames"); 1606 1607 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1608 OID_AUTO, "max_replyframes", CTLFLAG_RD, &sc->max_replyframes, 0, 1609 "Total number of allocated reply frames"); 1610 1611 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1612 OID_AUTO, "max_evtframes", CTLFLAG_RD, &sc->max_evtframes, 0, 1613 "Total number of event frames allocated"); 1614 1615 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1616 OID_AUTO, "firmware_version", CTLFLAG_RW, sc->fw_version, 1617 strlen(sc->fw_version), "firmware version"); 1618 1619 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1620 OID_AUTO, "driver_version", CTLFLAG_RW, MPS_DRIVER_VERSION, 1621 strlen(MPS_DRIVER_VERSION), "driver version"); 1622 1623 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1624 OID_AUTO, "io_cmds_active", CTLFLAG_RD, 1625 &sc->io_cmds_active, 0, "number of currently active commands"); 1626 1627 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1628 OID_AUTO, "io_cmds_highwater", CTLFLAG_RD, 1629 &sc->io_cmds_highwater, 0, "maximum active commands seen"); 1630 1631 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1632 OID_AUTO, "chain_free", CTLFLAG_RD, 1633 &sc->chain_free, 0, "number of free chain elements"); 1634 1635 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1636 OID_AUTO, "chain_free_lowwater", CTLFLAG_RD, 1637 &sc->chain_free_lowwater, 0,"lowest number of free chain elements"); 1638 1639 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1640 OID_AUTO, "max_chains", CTLFLAG_RD, 1641 &sc->max_chains, 0,"maximum chain frames that will be allocated"); 1642 1643 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1644 OID_AUTO, "max_io_pages", CTLFLAG_RD, 1645 &sc->max_io_pages, 0,"maximum pages to allow per I/O (if <1 use " 1646 "IOCFacts)"); 1647 1648 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1649 OID_AUTO, "enable_ssu", CTLFLAG_RW, &sc->enable_ssu, 0, 1650 "enable SSU to SATA SSD/HDD at shutdown"); 1651 1652 SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1653 OID_AUTO, "chain_alloc_fail", CTLFLAG_RD, 1654 &sc->chain_alloc_fail, "chain allocation failures"); 1655 1656 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1657 OID_AUTO, "spinup_wait_time", CTLFLAG_RD, 1658 &sc->spinup_wait_time, DEFAULT_SPINUP_WAIT, "seconds to wait for " 1659 "spinup after SATA ID error"); 1660 1661 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1662 OID_AUTO, "mapping_table_dump", CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 1663 mps_mapping_dump, "A", "Mapping Table Dump"); 1664 1665 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1666 OID_AUTO, "encl_table_dump", CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 1667 mps_mapping_encl_dump, "A", "Enclosure Table Dump"); 1668 1669 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1670 OID_AUTO, "use_phy_num", CTLFLAG_RD, &sc->use_phynum, 0, 1671 "Use the phy number for enumeration"); 1672 } 1673 1674 int 1675 mps_attach(struct mps_softc *sc) 1676 { 1677 int error; 1678 1679 MPS_FUNCTRACE(sc); 1680 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1681 1682 mtx_init(&sc->mps_mtx, "MPT2SAS lock", NULL, MTX_DEF); 1683 callout_init_mtx(&sc->periodic, &sc->mps_mtx, 0); 1684 callout_init_mtx(&sc->device_check_callout, &sc->mps_mtx, 0); 1685 TAILQ_INIT(&sc->event_list); 1686 timevalclear(&sc->lastfail); 1687 1688 if ((error = mps_transition_ready(sc)) != 0) { 1689 mps_dprint(sc, MPS_INIT|MPS_FAULT, "failed to transition " 1690 "ready\n"); 1691 return (error); 1692 } 1693 1694 sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPT2, 1695 M_ZERO|M_NOWAIT); 1696 if(!sc->facts) { 1697 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Cannot allocate memory, " 1698 "exit\n"); 1699 return (ENOMEM); 1700 } 1701 1702 /* 1703 * Get IOC Facts and allocate all structures based on this information. 1704 * A Diag Reset will also call mps_iocfacts_allocate and re-read the IOC 1705 * Facts. If relevant values have changed in IOC Facts, this function 1706 * will free all of the memory based on IOC Facts and reallocate that 1707 * memory. If this fails, any allocated memory should already be freed. 1708 */ 1709 if ((error = mps_iocfacts_allocate(sc, TRUE)) != 0) { 1710 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC Facts based allocation " 1711 "failed with error %d, exit\n", error); 1712 return (error); 1713 } 1714 1715 /* Start the periodic watchdog check on the IOC Doorbell */ 1716 mps_periodic(sc); 1717 1718 /* 1719 * The portenable will kick off discovery events that will drive the 1720 * rest of the initialization process. The CAM/SAS module will 1721 * hold up the boot sequence until discovery is complete. 1722 */ 1723 sc->mps_ich.ich_func = mps_startup; 1724 sc->mps_ich.ich_arg = sc; 1725 if (config_intrhook_establish(&sc->mps_ich) != 0) { 1726 mps_dprint(sc, MPS_INIT|MPS_ERROR, 1727 "Cannot establish MPS config hook\n"); 1728 error = EINVAL; 1729 } 1730 1731 /* 1732 * Allow IR to shutdown gracefully when shutdown occurs. 1733 */ 1734 sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final, 1735 mpssas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT); 1736 1737 if (sc->shutdown_eh == NULL) 1738 mps_dprint(sc, MPS_INIT|MPS_ERROR, 1739 "shutdown event registration failed\n"); 1740 1741 mps_setup_sysctl(sc); 1742 1743 sc->mps_flags |= MPS_FLAGS_ATTACH_DONE; 1744 mps_dprint(sc, MPS_INIT, "%s exit error= %d\n", __func__, error); 1745 1746 return (error); 1747 } 1748 1749 /* Run through any late-start handlers. */ 1750 static void 1751 mps_startup(void *arg) 1752 { 1753 struct mps_softc *sc; 1754 1755 sc = (struct mps_softc *)arg; 1756 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1757 1758 mps_lock(sc); 1759 mps_unmask_intr(sc); 1760 1761 /* initialize device mapping tables */ 1762 mps_base_static_config_pages(sc); 1763 mps_mapping_initialize(sc); 1764 mpssas_startup(sc); 1765 mps_unlock(sc); 1766 1767 mps_dprint(sc, MPS_INIT, "disestablish config intrhook\n"); 1768 config_intrhook_disestablish(&sc->mps_ich); 1769 sc->mps_ich.ich_arg = NULL; 1770 1771 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 1772 } 1773 1774 /* Periodic watchdog. Is called with the driver lock already held. */ 1775 static void 1776 mps_periodic(void *arg) 1777 { 1778 struct mps_softc *sc; 1779 uint32_t db; 1780 1781 sc = (struct mps_softc *)arg; 1782 if (sc->mps_flags & MPS_FLAGS_SHUTDOWN) 1783 return; 1784 1785 db = mps_regread(sc, MPI2_DOORBELL_OFFSET); 1786 if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 1787 mps_dprint(sc, MPS_FAULT, "IOC Fault 0x%08x, Resetting\n", db); 1788 mps_reinit(sc); 1789 } 1790 1791 callout_reset(&sc->periodic, MPS_PERIODIC_DELAY * hz, mps_periodic, sc); 1792 } 1793 1794 static void 1795 mps_log_evt_handler(struct mps_softc *sc, uintptr_t data, 1796 MPI2_EVENT_NOTIFICATION_REPLY *event) 1797 { 1798 MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry; 1799 1800 MPS_DPRINT_EVENT(sc, generic, event); 1801 1802 switch (event->Event) { 1803 case MPI2_EVENT_LOG_DATA: 1804 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_DATA:\n"); 1805 if (sc->mps_debug & MPS_EVENT) 1806 hexdump(event->EventData, event->EventDataLength, NULL, 0); 1807 break; 1808 case MPI2_EVENT_LOG_ENTRY_ADDED: 1809 entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData; 1810 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_ENTRY_ADDED event " 1811 "0x%x Sequence %d:\n", entry->LogEntryQualifier, 1812 entry->LogSequence); 1813 break; 1814 default: 1815 break; 1816 } 1817 return; 1818 } 1819 1820 static int 1821 mps_attach_log(struct mps_softc *sc) 1822 { 1823 u32 events[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 1824 1825 bzero(events, 16); 1826 setbit(events, MPI2_EVENT_LOG_DATA); 1827 setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED); 1828 1829 mps_register_events(sc, events, mps_log_evt_handler, NULL, 1830 &sc->mps_log_eh); 1831 1832 return (0); 1833 } 1834 1835 static int 1836 mps_detach_log(struct mps_softc *sc) 1837 { 1838 1839 if (sc->mps_log_eh != NULL) 1840 mps_deregister_events(sc, sc->mps_log_eh); 1841 return (0); 1842 } 1843 1844 /* 1845 * Free all of the driver resources and detach submodules. Should be called 1846 * without the lock held. 1847 */ 1848 int 1849 mps_free(struct mps_softc *sc) 1850 { 1851 int error; 1852 1853 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1854 /* Turn off the watchdog */ 1855 mps_lock(sc); 1856 sc->mps_flags |= MPS_FLAGS_SHUTDOWN; 1857 mps_unlock(sc); 1858 /* Lock must not be held for this */ 1859 callout_drain(&sc->periodic); 1860 callout_drain(&sc->device_check_callout); 1861 1862 if (((error = mps_detach_log(sc)) != 0) || 1863 ((error = mps_detach_sas(sc)) != 0)) { 1864 mps_dprint(sc, MPS_INIT|MPS_FAULT, "failed to detach " 1865 "subsystems, exit\n"); 1866 return (error); 1867 } 1868 1869 mps_detach_user(sc); 1870 1871 /* Put the IOC back in the READY state. */ 1872 mps_lock(sc); 1873 if ((error = mps_transition_ready(sc)) != 0) { 1874 mps_unlock(sc); 1875 return (error); 1876 } 1877 mps_unlock(sc); 1878 1879 if (sc->facts != NULL) 1880 free(sc->facts, M_MPT2); 1881 1882 /* 1883 * Free all buffers that are based on IOC Facts. A Diag Reset may need 1884 * to free these buffers too. 1885 */ 1886 mps_iocfacts_free(sc); 1887 1888 if (sc->sysctl_tree != NULL) 1889 sysctl_ctx_free(&sc->sysctl_ctx); 1890 1891 /* Deregister the shutdown function */ 1892 if (sc->shutdown_eh != NULL) 1893 EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh); 1894 1895 mtx_destroy(&sc->mps_mtx); 1896 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 1897 1898 return (0); 1899 } 1900 1901 static __inline void 1902 mps_complete_command(struct mps_softc *sc, struct mps_command *cm) 1903 { 1904 MPS_FUNCTRACE(sc); 1905 1906 if (cm == NULL) { 1907 mps_dprint(sc, MPS_ERROR, "Completing NULL command\n"); 1908 return; 1909 } 1910 1911 if (cm->cm_flags & MPS_CM_FLAGS_POLLED) 1912 cm->cm_flags |= MPS_CM_FLAGS_COMPLETE; 1913 1914 if (cm->cm_complete != NULL) { 1915 mps_dprint(sc, MPS_TRACE, 1916 "%s cm %p calling cm_complete %p data %p reply %p\n", 1917 __func__, cm, cm->cm_complete, cm->cm_complete_data, 1918 cm->cm_reply); 1919 cm->cm_complete(sc, cm); 1920 } 1921 1922 if (cm->cm_flags & MPS_CM_FLAGS_WAKEUP) { 1923 mps_dprint(sc, MPS_TRACE, "waking up %p\n", cm); 1924 wakeup(cm); 1925 } 1926 1927 if (cm->cm_sc->io_cmds_active != 0) { 1928 cm->cm_sc->io_cmds_active--; 1929 } else { 1930 mps_dprint(sc, MPS_ERROR, "Warning: io_cmds_active is " 1931 "out of sync - resynching to 0\n"); 1932 } 1933 } 1934 1935 1936 static void 1937 mps_sas_log_info(struct mps_softc *sc , u32 log_info) 1938 { 1939 union loginfo_type { 1940 u32 loginfo; 1941 struct { 1942 u32 subcode:16; 1943 u32 code:8; 1944 u32 originator:4; 1945 u32 bus_type:4; 1946 } dw; 1947 }; 1948 union loginfo_type sas_loginfo; 1949 char *originator_str = NULL; 1950 1951 sas_loginfo.loginfo = log_info; 1952 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 1953 return; 1954 1955 /* each nexus loss loginfo */ 1956 if (log_info == 0x31170000) 1957 return; 1958 1959 /* eat the loginfos associated with task aborts */ 1960 if ((log_info == 30050000 || log_info == 1961 0x31140000 || log_info == 0x31130000)) 1962 return; 1963 1964 switch (sas_loginfo.dw.originator) { 1965 case 0: 1966 originator_str = "IOP"; 1967 break; 1968 case 1: 1969 originator_str = "PL"; 1970 break; 1971 case 2: 1972 originator_str = "IR"; 1973 break; 1974 } 1975 1976 mps_dprint(sc, MPS_LOG, "log_info(0x%08x): originator(%s), " 1977 "code(0x%02x), sub_code(0x%04x)\n", log_info, 1978 originator_str, sas_loginfo.dw.code, 1979 sas_loginfo.dw.subcode); 1980 } 1981 1982 static void 1983 mps_display_reply_info(struct mps_softc *sc, uint8_t *reply) 1984 { 1985 MPI2DefaultReply_t *mpi_reply; 1986 u16 sc_status; 1987 1988 mpi_reply = (MPI2DefaultReply_t*)reply; 1989 sc_status = le16toh(mpi_reply->IOCStatus); 1990 if (sc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 1991 mps_sas_log_info(sc, le32toh(mpi_reply->IOCLogInfo)); 1992 } 1993 void 1994 mps_intr(void *data) 1995 { 1996 struct mps_softc *sc; 1997 uint32_t status; 1998 1999 sc = (struct mps_softc *)data; 2000 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2001 2002 /* 2003 * Check interrupt status register to flush the bus. This is 2004 * needed for both INTx interrupts and driver-driven polling 2005 */ 2006 status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 2007 if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0) 2008 return; 2009 2010 mps_lock(sc); 2011 mps_intr_locked(data); 2012 mps_unlock(sc); 2013 return; 2014 } 2015 2016 /* 2017 * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the 2018 * chip. Hopefully this theory is correct. 2019 */ 2020 void 2021 mps_intr_msi(void *data) 2022 { 2023 struct mps_softc *sc; 2024 2025 sc = (struct mps_softc *)data; 2026 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2027 mps_lock(sc); 2028 mps_intr_locked(data); 2029 mps_unlock(sc); 2030 return; 2031 } 2032 2033 /* 2034 * The locking is overly broad and simplistic, but easy to deal with for now. 2035 */ 2036 void 2037 mps_intr_locked(void *data) 2038 { 2039 MPI2_REPLY_DESCRIPTORS_UNION *desc; 2040 struct mps_softc *sc; 2041 struct mps_command *cm = NULL; 2042 uint8_t flags; 2043 u_int pq; 2044 MPI2_DIAG_RELEASE_REPLY *rel_rep; 2045 mps_fw_diagnostic_buffer_t *pBuffer; 2046 2047 sc = (struct mps_softc *)data; 2048 2049 pq = sc->replypostindex; 2050 mps_dprint(sc, MPS_TRACE, 2051 "%s sc %p starting with replypostindex %u\n", 2052 __func__, sc, sc->replypostindex); 2053 2054 for ( ;; ) { 2055 cm = NULL; 2056 desc = &sc->post_queue[sc->replypostindex]; 2057 flags = desc->Default.ReplyFlags & 2058 MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 2059 if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 2060 || (le32toh(desc->Words.High) == 0xffffffff)) 2061 break; 2062 2063 /* increment the replypostindex now, so that event handlers 2064 * and cm completion handlers which decide to do a diag 2065 * reset can zero it without it getting incremented again 2066 * afterwards, and we break out of this loop on the next 2067 * iteration since the reply post queue has been cleared to 2068 * 0xFF and all descriptors look unused (which they are). 2069 */ 2070 if (++sc->replypostindex >= sc->pqdepth) 2071 sc->replypostindex = 0; 2072 2073 switch (flags) { 2074 case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS: 2075 cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)]; 2076 cm->cm_reply = NULL; 2077 break; 2078 case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY: 2079 { 2080 uint32_t baddr; 2081 uint8_t *reply; 2082 2083 /* 2084 * Re-compose the reply address from the address 2085 * sent back from the chip. The ReplyFrameAddress 2086 * is the lower 32 bits of the physical address of 2087 * particular reply frame. Convert that address to 2088 * host format, and then use that to provide the 2089 * offset against the virtual address base 2090 * (sc->reply_frames). 2091 */ 2092 baddr = le32toh(desc->AddressReply.ReplyFrameAddress); 2093 reply = sc->reply_frames + 2094 (baddr - ((uint32_t)sc->reply_busaddr)); 2095 /* 2096 * Make sure the reply we got back is in a valid 2097 * range. If not, go ahead and panic here, since 2098 * we'll probably panic as soon as we deference the 2099 * reply pointer anyway. 2100 */ 2101 if ((reply < sc->reply_frames) 2102 || (reply > (sc->reply_frames + 2103 (sc->fqdepth * sc->facts->ReplyFrameSize * 4)))) { 2104 printf("%s: WARNING: reply %p out of range!\n", 2105 __func__, reply); 2106 printf("%s: reply_frames %p, fqdepth %d, " 2107 "frame size %d\n", __func__, 2108 sc->reply_frames, sc->fqdepth, 2109 sc->facts->ReplyFrameSize * 4); 2110 printf("%s: baddr %#x,\n", __func__, baddr); 2111 /* LSI-TODO. See Linux Code. Need Graceful exit*/ 2112 panic("Reply address out of range"); 2113 } 2114 if (le16toh(desc->AddressReply.SMID) == 0) { 2115 if (((MPI2_DEFAULT_REPLY *)reply)->Function == 2116 MPI2_FUNCTION_DIAG_BUFFER_POST) { 2117 /* 2118 * If SMID is 0 for Diag Buffer Post, 2119 * this implies that the reply is due to 2120 * a release function with a status that 2121 * the buffer has been released. Set 2122 * the buffer flags accordingly. 2123 */ 2124 rel_rep = 2125 (MPI2_DIAG_RELEASE_REPLY *)reply; 2126 if ((le16toh(rel_rep->IOCStatus) & 2127 MPI2_IOCSTATUS_MASK) == 2128 MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED) 2129 { 2130 pBuffer = 2131 &sc->fw_diag_buffer_list[ 2132 rel_rep->BufferType]; 2133 pBuffer->valid_data = TRUE; 2134 pBuffer->owned_by_firmware = 2135 FALSE; 2136 pBuffer->immediate = FALSE; 2137 } 2138 } else 2139 mps_dispatch_event(sc, baddr, 2140 (MPI2_EVENT_NOTIFICATION_REPLY *) 2141 reply); 2142 } else { 2143 cm = &sc->commands[le16toh(desc->AddressReply.SMID)]; 2144 cm->cm_reply = reply; 2145 cm->cm_reply_data = 2146 le32toh(desc->AddressReply.ReplyFrameAddress); 2147 } 2148 break; 2149 } 2150 case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS: 2151 case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER: 2152 case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS: 2153 default: 2154 /* Unhandled */ 2155 mps_dprint(sc, MPS_ERROR, "Unhandled reply 0x%x\n", 2156 desc->Default.ReplyFlags); 2157 cm = NULL; 2158 break; 2159 } 2160 2161 2162 if (cm != NULL) { 2163 // Print Error reply frame 2164 if (cm->cm_reply) 2165 mps_display_reply_info(sc,cm->cm_reply); 2166 mps_complete_command(sc, cm); 2167 } 2168 2169 desc->Words.Low = 0xffffffff; 2170 desc->Words.High = 0xffffffff; 2171 } 2172 2173 if (pq != sc->replypostindex) { 2174 mps_dprint(sc, MPS_TRACE, 2175 "%s sc %p writing postindex %d\n", 2176 __func__, sc, sc->replypostindex); 2177 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, sc->replypostindex); 2178 } 2179 2180 return; 2181 } 2182 2183 static void 2184 mps_dispatch_event(struct mps_softc *sc, uintptr_t data, 2185 MPI2_EVENT_NOTIFICATION_REPLY *reply) 2186 { 2187 struct mps_event_handle *eh; 2188 int event, handled = 0; 2189 2190 event = le16toh(reply->Event); 2191 TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2192 if (isset(eh->mask, event)) { 2193 eh->callback(sc, data, reply); 2194 handled++; 2195 } 2196 } 2197 2198 if (handled == 0) 2199 mps_dprint(sc, MPS_EVENT, "Unhandled event 0x%x\n", le16toh(event)); 2200 2201 /* 2202 * This is the only place that the event/reply should be freed. 2203 * Anything wanting to hold onto the event data should have 2204 * already copied it into their own storage. 2205 */ 2206 mps_free_reply(sc, data); 2207 } 2208 2209 static void 2210 mps_reregister_events_complete(struct mps_softc *sc, struct mps_command *cm) 2211 { 2212 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2213 2214 if (cm->cm_reply) 2215 MPS_DPRINT_EVENT(sc, generic, 2216 (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply); 2217 2218 mps_free_command(sc, cm); 2219 2220 /* next, send a port enable */ 2221 mpssas_startup(sc); 2222 } 2223 2224 /* 2225 * For both register_events and update_events, the caller supplies a bitmap 2226 * of events that it _wants_. These functions then turn that into a bitmask 2227 * suitable for the controller. 2228 */ 2229 int 2230 mps_register_events(struct mps_softc *sc, u32 *mask, 2231 mps_evt_callback_t *cb, void *data, struct mps_event_handle **handle) 2232 { 2233 struct mps_event_handle *eh; 2234 int error = 0; 2235 2236 eh = malloc(sizeof(struct mps_event_handle), M_MPT2, M_WAITOK|M_ZERO); 2237 if(!eh) { 2238 mps_dprint(sc, MPS_ERROR, "Cannot allocate event memory\n"); 2239 return (ENOMEM); 2240 } 2241 eh->callback = cb; 2242 eh->data = data; 2243 TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list); 2244 if (mask != NULL) 2245 error = mps_update_events(sc, eh, mask); 2246 *handle = eh; 2247 2248 return (error); 2249 } 2250 2251 int 2252 mps_update_events(struct mps_softc *sc, struct mps_event_handle *handle, 2253 u32 *mask) 2254 { 2255 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2256 MPI2_EVENT_NOTIFICATION_REPLY *reply = NULL; 2257 struct mps_command *cm; 2258 int error, i; 2259 2260 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2261 2262 if ((mask != NULL) && (handle != NULL)) 2263 bcopy(mask, &handle->mask[0], sizeof(u32) * 2264 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2265 2266 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2267 sc->event_mask[i] = -1; 2268 2269 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2270 sc->event_mask[i] &= ~handle->mask[i]; 2271 2272 2273 if ((cm = mps_alloc_command(sc)) == NULL) 2274 return (EBUSY); 2275 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2276 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2277 evtreq->MsgFlags = 0; 2278 evtreq->SASBroadcastPrimitiveMasks = 0; 2279 #ifdef MPS_DEBUG_ALL_EVENTS 2280 { 2281 u_char fullmask[16]; 2282 memset(fullmask, 0x00, 16); 2283 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) * 2284 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2285 } 2286 #else 2287 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2288 evtreq->EventMasks[i] = 2289 htole32(sc->event_mask[i]); 2290 #endif 2291 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2292 cm->cm_data = NULL; 2293 2294 error = mps_wait_command(sc, &cm, 60, 0); 2295 if (cm != NULL) 2296 reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply; 2297 if ((reply == NULL) || 2298 (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 2299 error = ENXIO; 2300 2301 if (reply) 2302 MPS_DPRINT_EVENT(sc, generic, reply); 2303 2304 mps_dprint(sc, MPS_TRACE, "%s finished error %d\n", __func__, error); 2305 2306 if (cm != NULL) 2307 mps_free_command(sc, cm); 2308 return (error); 2309 } 2310 2311 static int 2312 mps_reregister_events(struct mps_softc *sc) 2313 { 2314 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2315 struct mps_command *cm; 2316 struct mps_event_handle *eh; 2317 int error, i; 2318 2319 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2320 2321 /* first, reregister events */ 2322 2323 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2324 sc->event_mask[i] = -1; 2325 2326 TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2327 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2328 sc->event_mask[i] &= ~eh->mask[i]; 2329 } 2330 2331 if ((cm = mps_alloc_command(sc)) == NULL) 2332 return (EBUSY); 2333 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2334 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2335 evtreq->MsgFlags = 0; 2336 evtreq->SASBroadcastPrimitiveMasks = 0; 2337 #ifdef MPS_DEBUG_ALL_EVENTS 2338 { 2339 u_char fullmask[16]; 2340 memset(fullmask, 0x00, 16); 2341 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) * 2342 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2343 } 2344 #else 2345 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2346 evtreq->EventMasks[i] = 2347 htole32(sc->event_mask[i]); 2348 #endif 2349 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2350 cm->cm_data = NULL; 2351 cm->cm_complete = mps_reregister_events_complete; 2352 2353 error = mps_map_command(sc, cm); 2354 2355 mps_dprint(sc, MPS_TRACE, "%s finished with error %d\n", __func__, 2356 error); 2357 return (error); 2358 } 2359 2360 void 2361 mps_deregister_events(struct mps_softc *sc, struct mps_event_handle *handle) 2362 { 2363 2364 TAILQ_REMOVE(&sc->event_list, handle, eh_list); 2365 free(handle, M_MPT2); 2366 } 2367 2368 /* 2369 * Add a chain element as the next SGE for the specified command. 2370 * Reset cm_sge and cm_sgesize to indicate all the available space. 2371 */ 2372 static int 2373 mps_add_chain(struct mps_command *cm) 2374 { 2375 MPI2_SGE_CHAIN32 *sgc; 2376 struct mps_chain *chain; 2377 int space; 2378 2379 if (cm->cm_sglsize < MPS_SGC_SIZE) 2380 panic("MPS: Need SGE Error Code\n"); 2381 2382 chain = mps_alloc_chain(cm->cm_sc); 2383 if (chain == NULL) 2384 return (ENOBUFS); 2385 2386 space = (int)cm->cm_sc->facts->IOCRequestFrameSize * 4; 2387 2388 /* 2389 * Note: a double-linked list is used to make it easier to 2390 * walk for debugging. 2391 */ 2392 TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link); 2393 2394 sgc = (MPI2_SGE_CHAIN32 *)&cm->cm_sge->MpiChain; 2395 sgc->Length = htole16(space); 2396 sgc->NextChainOffset = 0; 2397 /* TODO Looks like bug in Setting sgc->Flags. 2398 * sgc->Flags = ( MPI2_SGE_FLAGS_CHAIN_ELEMENT | MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 2399 * MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT 2400 * This is fine.. because we are not using simple element. In case of 2401 * MPI2_SGE_CHAIN32, we have separate Length and Flags feild. 2402 */ 2403 sgc->Flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT; 2404 sgc->Address = htole32(chain->chain_busaddr); 2405 2406 cm->cm_sge = (MPI2_SGE_IO_UNION *)&chain->chain->MpiSimple; 2407 cm->cm_sglsize = space; 2408 return (0); 2409 } 2410 2411 /* 2412 * Add one scatter-gather element (chain, simple, transaction context) 2413 * to the scatter-gather list for a command. Maintain cm_sglsize and 2414 * cm_sge as the remaining size and pointer to the next SGE to fill 2415 * in, respectively. 2416 */ 2417 int 2418 mps_push_sge(struct mps_command *cm, void *sgep, size_t len, int segsleft) 2419 { 2420 MPI2_SGE_TRANSACTION_UNION *tc = sgep; 2421 MPI2_SGE_SIMPLE64 *sge = sgep; 2422 int error, type; 2423 uint32_t saved_buf_len, saved_address_low, saved_address_high; 2424 2425 type = (tc->Flags & MPI2_SGE_FLAGS_ELEMENT_MASK); 2426 2427 #ifdef INVARIANTS 2428 switch (type) { 2429 case MPI2_SGE_FLAGS_TRANSACTION_ELEMENT: { 2430 if (len != tc->DetailsLength + 4) 2431 panic("TC %p length %u or %zu?", tc, 2432 tc->DetailsLength + 4, len); 2433 } 2434 break; 2435 case MPI2_SGE_FLAGS_CHAIN_ELEMENT: 2436 /* Driver only uses 32-bit chain elements */ 2437 if (len != MPS_SGC_SIZE) 2438 panic("CHAIN %p length %u or %zu?", sgep, 2439 MPS_SGC_SIZE, len); 2440 break; 2441 case MPI2_SGE_FLAGS_SIMPLE_ELEMENT: 2442 /* Driver only uses 64-bit SGE simple elements */ 2443 if (len != MPS_SGE64_SIZE) 2444 panic("SGE simple %p length %u or %zu?", sge, 2445 MPS_SGE64_SIZE, len); 2446 if (((le32toh(sge->FlagsLength) >> MPI2_SGE_FLAGS_SHIFT) & 2447 MPI2_SGE_FLAGS_ADDRESS_SIZE) == 0) 2448 panic("SGE simple %p not marked 64-bit?", sge); 2449 2450 break; 2451 default: 2452 panic("Unexpected SGE %p, flags %02x", tc, tc->Flags); 2453 } 2454 #endif 2455 2456 /* 2457 * case 1: 1 more segment, enough room for it 2458 * case 2: 2 more segments, enough room for both 2459 * case 3: >=2 more segments, only enough room for 1 and a chain 2460 * case 4: >=1 more segment, enough room for only a chain 2461 * case 5: >=1 more segment, no room for anything (error) 2462 */ 2463 2464 /* 2465 * There should be room for at least a chain element, or this 2466 * code is buggy. Case (5). 2467 */ 2468 if (cm->cm_sglsize < MPS_SGC_SIZE) 2469 panic("MPS: Need SGE Error Code\n"); 2470 2471 if (segsleft >= 2 && 2472 cm->cm_sglsize < len + MPS_SGC_SIZE + MPS_SGE64_SIZE) { 2473 /* 2474 * There are 2 or more segments left to add, and only 2475 * enough room for 1 and a chain. Case (3). 2476 * 2477 * Mark as last element in this chain if necessary. 2478 */ 2479 if (type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { 2480 sge->FlagsLength |= htole32( 2481 MPI2_SGE_FLAGS_LAST_ELEMENT << MPI2_SGE_FLAGS_SHIFT); 2482 } 2483 2484 /* 2485 * Add the item then a chain. Do the chain now, 2486 * rather than on the next iteration, to simplify 2487 * understanding the code. 2488 */ 2489 cm->cm_sglsize -= len; 2490 bcopy(sgep, cm->cm_sge, len); 2491 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2492 return (mps_add_chain(cm)); 2493 } 2494 2495 if (segsleft >= 1 && cm->cm_sglsize < len + MPS_SGC_SIZE) { 2496 /* 2497 * 1 or more segment, enough room for only a chain. 2498 * Hope the previous element wasn't a Simple entry 2499 * that needed to be marked with 2500 * MPI2_SGE_FLAGS_LAST_ELEMENT. Case (4). 2501 */ 2502 if ((error = mps_add_chain(cm)) != 0) 2503 return (error); 2504 } 2505 2506 #ifdef INVARIANTS 2507 /* Case 1: 1 more segment, enough room for it. */ 2508 if (segsleft == 1 && cm->cm_sglsize < len) 2509 panic("1 seg left and no room? %u versus %zu", 2510 cm->cm_sglsize, len); 2511 2512 /* Case 2: 2 more segments, enough room for both */ 2513 if (segsleft == 2 && cm->cm_sglsize < len + MPS_SGE64_SIZE) 2514 panic("2 segs left and no room? %u versus %zu", 2515 cm->cm_sglsize, len); 2516 #endif 2517 2518 if (segsleft == 1 && type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { 2519 /* 2520 * If this is a bi-directional request, need to account for that 2521 * here. Save the pre-filled sge values. These will be used 2522 * either for the 2nd SGL or for a single direction SGL. If 2523 * cm_out_len is non-zero, this is a bi-directional request, so 2524 * fill in the OUT SGL first, then the IN SGL, otherwise just 2525 * fill in the IN SGL. Note that at this time, when filling in 2526 * 2 SGL's for a bi-directional request, they both use the same 2527 * DMA buffer (same cm command). 2528 */ 2529 saved_buf_len = le32toh(sge->FlagsLength) & 0x00FFFFFF; 2530 saved_address_low = sge->Address.Low; 2531 saved_address_high = sge->Address.High; 2532 if (cm->cm_out_len) { 2533 sge->FlagsLength = htole32(cm->cm_out_len | 2534 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2535 MPI2_SGE_FLAGS_END_OF_BUFFER | 2536 MPI2_SGE_FLAGS_HOST_TO_IOC | 2537 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2538 MPI2_SGE_FLAGS_SHIFT)); 2539 cm->cm_sglsize -= len; 2540 bcopy(sgep, cm->cm_sge, len); 2541 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge 2542 + len); 2543 } 2544 saved_buf_len |= 2545 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2546 MPI2_SGE_FLAGS_END_OF_BUFFER | 2547 MPI2_SGE_FLAGS_LAST_ELEMENT | 2548 MPI2_SGE_FLAGS_END_OF_LIST | 2549 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2550 MPI2_SGE_FLAGS_SHIFT); 2551 if (cm->cm_flags & MPS_CM_FLAGS_DATAIN) { 2552 saved_buf_len |= 2553 ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) << 2554 MPI2_SGE_FLAGS_SHIFT); 2555 } else { 2556 saved_buf_len |= 2557 ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) << 2558 MPI2_SGE_FLAGS_SHIFT); 2559 } 2560 sge->FlagsLength = htole32(saved_buf_len); 2561 sge->Address.Low = saved_address_low; 2562 sge->Address.High = saved_address_high; 2563 } 2564 2565 cm->cm_sglsize -= len; 2566 bcopy(sgep, cm->cm_sge, len); 2567 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2568 return (0); 2569 } 2570 2571 /* 2572 * Add one dma segment to the scatter-gather list for a command. 2573 */ 2574 int 2575 mps_add_dmaseg(struct mps_command *cm, vm_paddr_t pa, size_t len, u_int flags, 2576 int segsleft) 2577 { 2578 MPI2_SGE_SIMPLE64 sge; 2579 2580 /* 2581 * This driver always uses 64-bit address elements for simplicity. 2582 */ 2583 bzero(&sge, sizeof(sge)); 2584 flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2585 MPI2_SGE_FLAGS_64_BIT_ADDRESSING; 2586 sge.FlagsLength = htole32(len | (flags << MPI2_SGE_FLAGS_SHIFT)); 2587 mps_from_u64(pa, &sge.Address); 2588 2589 return (mps_push_sge(cm, &sge, sizeof sge, segsleft)); 2590 } 2591 2592 static void 2593 mps_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 2594 { 2595 struct mps_softc *sc; 2596 struct mps_command *cm; 2597 u_int i, dir, sflags; 2598 2599 cm = (struct mps_command *)arg; 2600 sc = cm->cm_sc; 2601 2602 /* 2603 * In this case, just print out a warning and let the chip tell the 2604 * user they did the wrong thing. 2605 */ 2606 if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) { 2607 mps_dprint(sc, MPS_ERROR, 2608 "%s: warning: busdma returned %d segments, " 2609 "more than the %d allowed\n", __func__, nsegs, 2610 cm->cm_max_segs); 2611 } 2612 2613 /* 2614 * Set up DMA direction flags. Bi-directional requests are also handled 2615 * here. In that case, both direction flags will be set. 2616 */ 2617 sflags = 0; 2618 if (cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) { 2619 /* 2620 * We have to add a special case for SMP passthrough, there 2621 * is no easy way to generically handle it. The first 2622 * S/G element is used for the command (therefore the 2623 * direction bit needs to be set). The second one is used 2624 * for the reply. We'll leave it to the caller to make 2625 * sure we only have two buffers. 2626 */ 2627 /* 2628 * Even though the busdma man page says it doesn't make 2629 * sense to have both direction flags, it does in this case. 2630 * We have one s/g element being accessed in each direction. 2631 */ 2632 dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD; 2633 2634 /* 2635 * Set the direction flag on the first buffer in the SMP 2636 * passthrough request. We'll clear it for the second one. 2637 */ 2638 sflags |= MPI2_SGE_FLAGS_DIRECTION | 2639 MPI2_SGE_FLAGS_END_OF_BUFFER; 2640 } else if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) { 2641 sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC; 2642 dir = BUS_DMASYNC_PREWRITE; 2643 } else 2644 dir = BUS_DMASYNC_PREREAD; 2645 2646 for (i = 0; i < nsegs; i++) { 2647 if ((cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) && (i != 0)) { 2648 sflags &= ~MPI2_SGE_FLAGS_DIRECTION; 2649 } 2650 error = mps_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len, 2651 sflags, nsegs - i); 2652 if (error != 0) { 2653 /* Resource shortage, roll back! */ 2654 if (ratecheck(&sc->lastfail, &mps_chainfail_interval)) 2655 mps_dprint(sc, MPS_INFO, "Out of chain frames, " 2656 "consider increasing hw.mps.max_chains.\n"); 2657 cm->cm_flags |= MPS_CM_FLAGS_CHAIN_FAILED; 2658 mps_complete_command(sc, cm); 2659 return; 2660 } 2661 } 2662 2663 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir); 2664 mps_enqueue_request(sc, cm); 2665 2666 return; 2667 } 2668 2669 static void 2670 mps_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize, 2671 int error) 2672 { 2673 mps_data_cb(arg, segs, nsegs, error); 2674 } 2675 2676 /* 2677 * This is the routine to enqueue commands ansynchronously. 2678 * Note that the only error path here is from bus_dmamap_load(), which can 2679 * return EINPROGRESS if it is waiting for resources. Other than this, it's 2680 * assumed that if you have a command in-hand, then you have enough credits 2681 * to use it. 2682 */ 2683 int 2684 mps_map_command(struct mps_softc *sc, struct mps_command *cm) 2685 { 2686 int error = 0; 2687 2688 if (cm->cm_flags & MPS_CM_FLAGS_USE_UIO) { 2689 error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap, 2690 &cm->cm_uio, mps_data_cb2, cm, 0); 2691 } else if (cm->cm_flags & MPS_CM_FLAGS_USE_CCB) { 2692 error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap, 2693 cm->cm_data, mps_data_cb, cm, 0); 2694 } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) { 2695 error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap, 2696 cm->cm_data, cm->cm_length, mps_data_cb, cm, 0); 2697 } else { 2698 /* Add a zero-length element as needed */ 2699 if (cm->cm_sge != NULL) 2700 mps_add_dmaseg(cm, 0, 0, 0, 1); 2701 mps_enqueue_request(sc, cm); 2702 } 2703 2704 return (error); 2705 } 2706 2707 /* 2708 * This is the routine to enqueue commands synchronously. An error of 2709 * EINPROGRESS from mps_map_command() is ignored since the command will 2710 * be executed and enqueued automatically. Other errors come from msleep(). 2711 */ 2712 int 2713 mps_wait_command(struct mps_softc *sc, struct mps_command **cmp, int timeout, 2714 int sleep_flag) 2715 { 2716 int error, rc; 2717 struct timeval cur_time, start_time; 2718 struct mps_command *cm = *cmp; 2719 2720 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) 2721 return EBUSY; 2722 2723 cm->cm_complete = NULL; 2724 cm->cm_flags |= MPS_CM_FLAGS_POLLED; 2725 error = mps_map_command(sc, cm); 2726 if ((error != 0) && (error != EINPROGRESS)) 2727 return (error); 2728 2729 /* 2730 * Check for context and wait for 50 mSec at a time until time has 2731 * expired or the command has finished. If msleep can't be used, need 2732 * to poll. 2733 */ 2734 if (curthread->td_no_sleeping != 0) 2735 sleep_flag = NO_SLEEP; 2736 getmicrouptime(&start_time); 2737 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) { 2738 cm->cm_flags |= MPS_CM_FLAGS_WAKEUP; 2739 error = msleep(cm, &sc->mps_mtx, 0, "mpswait", timeout*hz); 2740 if (error == EWOULDBLOCK) { 2741 /* 2742 * Record the actual elapsed time in the case of a 2743 * timeout for the message below. 2744 */ 2745 getmicrouptime(&cur_time); 2746 timevalsub(&cur_time, &start_time); 2747 } 2748 } else { 2749 while ((cm->cm_flags & MPS_CM_FLAGS_COMPLETE) == 0) { 2750 mps_intr_locked(sc); 2751 if (sleep_flag == CAN_SLEEP) 2752 pause("mpswait", hz/20); 2753 else 2754 DELAY(50000); 2755 2756 getmicrouptime(&cur_time); 2757 timevalsub(&cur_time, &start_time); 2758 if (cur_time.tv_sec > timeout) { 2759 error = EWOULDBLOCK; 2760 break; 2761 } 2762 } 2763 } 2764 2765 if (error == EWOULDBLOCK) { 2766 mps_dprint(sc, MPS_FAULT, "Calling Reinit from %s, timeout=%d," 2767 " elapsed=%jd\n", __func__, timeout, 2768 (intmax_t)cur_time.tv_sec); 2769 rc = mps_reinit(sc); 2770 mps_dprint(sc, MPS_FAULT, "Reinit %s\n", (rc == 0) ? "success" : 2771 "failed"); 2772 if (sc->mps_flags & MPS_FLAGS_REALLOCATED) { 2773 /* 2774 * Tell the caller that we freed the command in a 2775 * reinit. 2776 */ 2777 *cmp = NULL; 2778 } 2779 error = ETIMEDOUT; 2780 } 2781 return (error); 2782 } 2783 2784 /* 2785 * The MPT driver had a verbose interface for config pages. In this driver, 2786 * reduce it to much simpler terms, similar to the Linux driver. 2787 */ 2788 int 2789 mps_read_config_page(struct mps_softc *sc, struct mps_config_params *params) 2790 { 2791 MPI2_CONFIG_REQUEST *req; 2792 struct mps_command *cm; 2793 int error; 2794 2795 if (sc->mps_flags & MPS_FLAGS_BUSY) { 2796 return (EBUSY); 2797 } 2798 2799 cm = mps_alloc_command(sc); 2800 if (cm == NULL) { 2801 return (EBUSY); 2802 } 2803 2804 req = (MPI2_CONFIG_REQUEST *)cm->cm_req; 2805 req->Function = MPI2_FUNCTION_CONFIG; 2806 req->Action = params->action; 2807 req->SGLFlags = 0; 2808 req->ChainOffset = 0; 2809 req->PageAddress = params->page_address; 2810 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 2811 MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr; 2812 2813 hdr = ¶ms->hdr.Ext; 2814 req->ExtPageType = hdr->ExtPageType; 2815 req->ExtPageLength = hdr->ExtPageLength; 2816 req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED; 2817 req->Header.PageLength = 0; /* Must be set to zero */ 2818 req->Header.PageNumber = hdr->PageNumber; 2819 req->Header.PageVersion = hdr->PageVersion; 2820 } else { 2821 MPI2_CONFIG_PAGE_HEADER *hdr; 2822 2823 hdr = ¶ms->hdr.Struct; 2824 req->Header.PageType = hdr->PageType; 2825 req->Header.PageNumber = hdr->PageNumber; 2826 req->Header.PageLength = hdr->PageLength; 2827 req->Header.PageVersion = hdr->PageVersion; 2828 } 2829 2830 cm->cm_data = params->buffer; 2831 cm->cm_length = params->length; 2832 if (cm->cm_data != NULL) { 2833 cm->cm_sge = &req->PageBufferSGE; 2834 cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION); 2835 cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_DATAIN; 2836 } else 2837 cm->cm_sge = NULL; 2838 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2839 2840 cm->cm_complete_data = params; 2841 if (params->callback != NULL) { 2842 cm->cm_complete = mps_config_complete; 2843 return (mps_map_command(sc, cm)); 2844 } else { 2845 error = mps_wait_command(sc, &cm, 0, CAN_SLEEP); 2846 if (error) { 2847 mps_dprint(sc, MPS_FAULT, 2848 "Error %d reading config page\n", error); 2849 if (cm != NULL) 2850 mps_free_command(sc, cm); 2851 return (error); 2852 } 2853 mps_config_complete(sc, cm); 2854 } 2855 2856 return (0); 2857 } 2858 2859 int 2860 mps_write_config_page(struct mps_softc *sc, struct mps_config_params *params) 2861 { 2862 return (EINVAL); 2863 } 2864 2865 static void 2866 mps_config_complete(struct mps_softc *sc, struct mps_command *cm) 2867 { 2868 MPI2_CONFIG_REPLY *reply; 2869 struct mps_config_params *params; 2870 2871 MPS_FUNCTRACE(sc); 2872 params = cm->cm_complete_data; 2873 2874 if (cm->cm_data != NULL) { 2875 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, 2876 BUS_DMASYNC_POSTREAD); 2877 bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap); 2878 } 2879 2880 /* 2881 * XXX KDM need to do more error recovery? This results in the 2882 * device in question not getting probed. 2883 */ 2884 if ((cm->cm_flags & MPS_CM_FLAGS_ERROR_MASK) != 0) { 2885 params->status = MPI2_IOCSTATUS_BUSY; 2886 goto done; 2887 } 2888 2889 reply = (MPI2_CONFIG_REPLY *)cm->cm_reply; 2890 if (reply == NULL) { 2891 params->status = MPI2_IOCSTATUS_BUSY; 2892 goto done; 2893 } 2894 params->status = reply->IOCStatus; 2895 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 2896 params->hdr.Ext.ExtPageType = reply->ExtPageType; 2897 params->hdr.Ext.ExtPageLength = reply->ExtPageLength; 2898 params->hdr.Ext.PageType = reply->Header.PageType; 2899 params->hdr.Ext.PageNumber = reply->Header.PageNumber; 2900 params->hdr.Ext.PageVersion = reply->Header.PageVersion; 2901 } else { 2902 params->hdr.Struct.PageType = reply->Header.PageType; 2903 params->hdr.Struct.PageNumber = reply->Header.PageNumber; 2904 params->hdr.Struct.PageLength = reply->Header.PageLength; 2905 params->hdr.Struct.PageVersion = reply->Header.PageVersion; 2906 } 2907 2908 done: 2909 mps_free_command(sc, cm); 2910 if (params->callback != NULL) 2911 params->callback(sc, params); 2912 2913 return; 2914 } 2915