1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2009 Yahoo! Inc. 5 * Copyright (c) 2011-2015 LSI Corp. 6 * Copyright (c) 2013-2015 Avago Technologies 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 31 * 32 * $FreeBSD$ 33 */ 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD$"); 37 38 /* Communications core for Avago Technologies (LSI) MPT2 */ 39 40 /* TODO Move headers to mpsvar */ 41 #include <sys/types.h> 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/selinfo.h> 46 #include <sys/lock.h> 47 #include <sys/mutex.h> 48 #include <sys/module.h> 49 #include <sys/bus.h> 50 #include <sys/conf.h> 51 #include <sys/bio.h> 52 #include <sys/malloc.h> 53 #include <sys/uio.h> 54 #include <sys/sysctl.h> 55 #include <sys/smp.h> 56 #include <sys/queue.h> 57 #include <sys/kthread.h> 58 #include <sys/taskqueue.h> 59 #include <sys/endian.h> 60 #include <sys/eventhandler.h> 61 #include <sys/sbuf.h> 62 #include <sys/priv.h> 63 64 #include <machine/bus.h> 65 #include <machine/resource.h> 66 #include <sys/rman.h> 67 #include <sys/proc.h> 68 69 #include <dev/pci/pcivar.h> 70 71 #include <cam/cam.h> 72 #include <cam/scsi/scsi_all.h> 73 74 #include <dev/mps/mpi/mpi2_type.h> 75 #include <dev/mps/mpi/mpi2.h> 76 #include <dev/mps/mpi/mpi2_ioc.h> 77 #include <dev/mps/mpi/mpi2_sas.h> 78 #include <dev/mps/mpi/mpi2_cnfg.h> 79 #include <dev/mps/mpi/mpi2_init.h> 80 #include <dev/mps/mpi/mpi2_tool.h> 81 #include <dev/mps/mps_ioctl.h> 82 #include <dev/mps/mpsvar.h> 83 #include <dev/mps/mps_table.h> 84 85 static int mps_diag_reset(struct mps_softc *sc, int sleep_flag); 86 static int mps_init_queues(struct mps_softc *sc); 87 static void mps_resize_queues(struct mps_softc *sc); 88 static int mps_message_unit_reset(struct mps_softc *sc, int sleep_flag); 89 static int mps_transition_operational(struct mps_softc *sc); 90 static int mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching); 91 static void mps_iocfacts_free(struct mps_softc *sc); 92 static void mps_startup(void *arg); 93 static int mps_send_iocinit(struct mps_softc *sc); 94 static int mps_alloc_queues(struct mps_softc *sc); 95 static int mps_alloc_hw_queues(struct mps_softc *sc); 96 static int mps_alloc_replies(struct mps_softc *sc); 97 static int mps_alloc_requests(struct mps_softc *sc); 98 static int mps_attach_log(struct mps_softc *sc); 99 static __inline void mps_complete_command(struct mps_softc *sc, 100 struct mps_command *cm); 101 static void mps_dispatch_event(struct mps_softc *sc, uintptr_t data, 102 MPI2_EVENT_NOTIFICATION_REPLY *reply); 103 static void mps_config_complete(struct mps_softc *sc, struct mps_command *cm); 104 static void mps_periodic(void *); 105 static int mps_reregister_events(struct mps_softc *sc); 106 static void mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm); 107 static int mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts); 108 static int mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag); 109 static int mps_debug_sysctl(SYSCTL_HANDLER_ARGS); 110 static int mps_dump_reqs(SYSCTL_HANDLER_ARGS); 111 static void mps_parse_debug(struct mps_softc *sc, char *list); 112 113 SYSCTL_NODE(_hw, OID_AUTO, mps, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, 114 "MPS Driver Parameters"); 115 116 MALLOC_DEFINE(M_MPT2, "mps", "mpt2 driver memory"); 117 MALLOC_DECLARE(M_MPSUSER); 118 119 /* 120 * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of 121 * any state and back to its initialization state machine. 122 */ 123 static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d }; 124 125 /* Added this union to smoothly convert le64toh cm->cm_desc.Words. 126 * Compiler only support unint64_t to be passed as argument. 127 * Otherwise it will throw below error 128 * "aggregate value used where an integer was expected" 129 */ 130 131 typedef union _reply_descriptor { 132 u64 word; 133 struct { 134 u32 low; 135 u32 high; 136 } u; 137 }reply_descriptor,address_descriptor; 138 139 /* Rate limit chain-fail messages to 1 per minute */ 140 static struct timeval mps_chainfail_interval = { 60, 0 }; 141 142 /* 143 * sleep_flag can be either CAN_SLEEP or NO_SLEEP. 144 * If this function is called from process context, it can sleep 145 * and there is no harm to sleep, in case if this fuction is called 146 * from Interrupt handler, we can not sleep and need NO_SLEEP flag set. 147 * based on sleep flags driver will call either msleep, pause or DELAY. 148 * msleep and pause are of same variant, but pause is used when mps_mtx 149 * is not hold by driver. 150 * 151 */ 152 static int 153 mps_diag_reset(struct mps_softc *sc,int sleep_flag) 154 { 155 uint32_t reg; 156 int i, error, tries = 0; 157 uint8_t first_wait_done = FALSE; 158 159 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 160 161 /* Clear any pending interrupts */ 162 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 163 164 /* 165 * Force NO_SLEEP for threads prohibited to sleep 166 * e.a Thread from interrupt handler are prohibited to sleep. 167 */ 168 if (curthread->td_no_sleeping != 0) 169 sleep_flag = NO_SLEEP; 170 171 mps_dprint(sc, MPS_INIT, "sequence start, sleep_flag= %d\n", sleep_flag); 172 173 /* Push the magic sequence */ 174 error = ETIMEDOUT; 175 while (tries++ < 20) { 176 for (i = 0; i < sizeof(mpt2_reset_magic); i++) 177 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 178 mpt2_reset_magic[i]); 179 /* wait 100 msec */ 180 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 181 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 182 "mpsdiag", hz/10); 183 else if (sleep_flag == CAN_SLEEP) 184 pause("mpsdiag", hz/10); 185 else 186 DELAY(100 * 1000); 187 188 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 189 if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) { 190 error = 0; 191 break; 192 } 193 } 194 if (error) { 195 mps_dprint(sc, MPS_INIT, "sequence failed, error=%d, exit\n", 196 error); 197 return (error); 198 } 199 200 /* Send the actual reset. XXX need to refresh the reg? */ 201 reg |= MPI2_DIAG_RESET_ADAPTER; 202 mps_dprint(sc, MPS_INIT, "sequence success, sending reset, reg= 0x%x\n", 203 reg); 204 mps_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET, reg); 205 206 /* Wait up to 300 seconds in 50ms intervals */ 207 error = ETIMEDOUT; 208 for (i = 0; i < 6000; i++) { 209 /* 210 * Wait 50 msec. If this is the first time through, wait 256 211 * msec to satisfy Diag Reset timing requirements. 212 */ 213 if (first_wait_done) { 214 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 215 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 216 "mpsdiag", hz/20); 217 else if (sleep_flag == CAN_SLEEP) 218 pause("mpsdiag", hz/20); 219 else 220 DELAY(50 * 1000); 221 } else { 222 DELAY(256 * 1000); 223 first_wait_done = TRUE; 224 } 225 /* 226 * Check for the RESET_ADAPTER bit to be cleared first, then 227 * wait for the RESET state to be cleared, which takes a little 228 * longer. 229 */ 230 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 231 if (reg & MPI2_DIAG_RESET_ADAPTER) { 232 continue; 233 } 234 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 235 if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) { 236 error = 0; 237 break; 238 } 239 } 240 if (error) { 241 mps_dprint(sc, MPS_INIT, "reset failed, error= %d, exit\n", 242 error); 243 return (error); 244 } 245 246 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0); 247 mps_dprint(sc, MPS_INIT, "diag reset success, exit\n"); 248 249 return (0); 250 } 251 252 static int 253 mps_message_unit_reset(struct mps_softc *sc, int sleep_flag) 254 { 255 int error; 256 257 MPS_FUNCTRACE(sc); 258 259 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 260 261 error = 0; 262 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, 263 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET << 264 MPI2_DOORBELL_FUNCTION_SHIFT); 265 266 if (mps_wait_db_ack(sc, 5, sleep_flag) != 0) { 267 mps_dprint(sc, MPS_INIT|MPS_FAULT, 268 "Doorbell handshake failed\n"); 269 error = ETIMEDOUT; 270 } 271 272 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 273 return (error); 274 } 275 276 static int 277 mps_transition_ready(struct mps_softc *sc) 278 { 279 uint32_t reg, state; 280 int error, tries = 0; 281 int sleep_flags; 282 283 MPS_FUNCTRACE(sc); 284 /* If we are in attach call, do not sleep */ 285 sleep_flags = (sc->mps_flags & MPS_FLAGS_ATTACH_DONE) 286 ? CAN_SLEEP:NO_SLEEP; 287 error = 0; 288 289 mps_dprint(sc, MPS_INIT, "%s entered, sleep_flags= %d\n", 290 __func__, sleep_flags); 291 292 while (tries++ < 1200) { 293 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 294 mps_dprint(sc, MPS_INIT, " Doorbell= 0x%x\n", reg); 295 296 /* 297 * Ensure the IOC is ready to talk. If it's not, try 298 * resetting it. 299 */ 300 if (reg & MPI2_DOORBELL_USED) { 301 mps_dprint(sc, MPS_INIT, " Not ready, sending diag " 302 "reset\n"); 303 mps_diag_reset(sc, sleep_flags); 304 DELAY(50000); 305 continue; 306 } 307 308 /* Is the adapter owned by another peer? */ 309 if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) == 310 (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) { 311 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC is under the " 312 "control of another peer host, aborting " 313 "initialization.\n"); 314 error = ENXIO; 315 break; 316 } 317 318 state = reg & MPI2_IOC_STATE_MASK; 319 if (state == MPI2_IOC_STATE_READY) { 320 /* Ready to go! */ 321 error = 0; 322 break; 323 } else if (state == MPI2_IOC_STATE_FAULT) { 324 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC in fault " 325 "state 0x%x, resetting\n", 326 state & MPI2_DOORBELL_FAULT_CODE_MASK); 327 mps_diag_reset(sc, sleep_flags); 328 } else if (state == MPI2_IOC_STATE_OPERATIONAL) { 329 /* Need to take ownership */ 330 mps_message_unit_reset(sc, sleep_flags); 331 } else if (state == MPI2_IOC_STATE_RESET) { 332 /* Wait a bit, IOC might be in transition */ 333 mps_dprint(sc, MPS_INIT|MPS_FAULT, 334 "IOC in unexpected reset state\n"); 335 } else { 336 mps_dprint(sc, MPS_INIT|MPS_FAULT, 337 "IOC in unknown state 0x%x\n", state); 338 error = EINVAL; 339 break; 340 } 341 342 /* Wait 50ms for things to settle down. */ 343 DELAY(50000); 344 } 345 346 if (error) 347 mps_dprint(sc, MPS_INIT|MPS_FAULT, 348 "Cannot transition IOC to ready\n"); 349 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 350 351 return (error); 352 } 353 354 static int 355 mps_transition_operational(struct mps_softc *sc) 356 { 357 uint32_t reg, state; 358 int error; 359 360 MPS_FUNCTRACE(sc); 361 362 error = 0; 363 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 364 mps_dprint(sc, MPS_INIT, "%s entered, Doorbell= 0x%x\n", __func__, reg); 365 366 state = reg & MPI2_IOC_STATE_MASK; 367 if (state != MPI2_IOC_STATE_READY) { 368 mps_dprint(sc, MPS_INIT, "IOC not ready\n"); 369 if ((error = mps_transition_ready(sc)) != 0) { 370 mps_dprint(sc, MPS_INIT|MPS_FAULT, 371 "failed to transition ready, exit\n"); 372 return (error); 373 } 374 } 375 376 error = mps_send_iocinit(sc); 377 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 378 379 return (error); 380 } 381 382 static void 383 mps_resize_queues(struct mps_softc *sc) 384 { 385 u_int reqcr, prireqcr, maxio, sges_per_frame; 386 387 /* 388 * Size the queues. Since the reply queues always need one free 389 * entry, we'll deduct one reply message here. The LSI documents 390 * suggest instead to add a count to the request queue, but I think 391 * that it's better to deduct from reply queue. 392 */ 393 prireqcr = MAX(1, sc->max_prireqframes); 394 prireqcr = MIN(prireqcr, sc->facts->HighPriorityCredit); 395 396 reqcr = MAX(2, sc->max_reqframes); 397 reqcr = MIN(reqcr, sc->facts->RequestCredit); 398 399 sc->num_reqs = prireqcr + reqcr; 400 sc->num_prireqs = prireqcr; 401 sc->num_replies = MIN(sc->max_replyframes + sc->max_evtframes, 402 sc->facts->MaxReplyDescriptorPostQueueDepth) - 1; 403 404 /* Store the request frame size in bytes rather than as 32bit words */ 405 sc->reqframesz = sc->facts->IOCRequestFrameSize * 4; 406 407 /* 408 * Max IO Size is Page Size * the following: 409 * ((SGEs per frame - 1 for chain element) * Max Chain Depth) 410 * + 1 for no chain needed in last frame 411 * 412 * If user suggests a Max IO size to use, use the smaller of the 413 * user's value and the calculated value as long as the user's 414 * value is larger than 0. The user's value is in pages. 415 */ 416 sges_per_frame = sc->reqframesz / sizeof(MPI2_SGE_SIMPLE64) - 1; 417 maxio = (sges_per_frame * sc->facts->MaxChainDepth + 1) * PAGE_SIZE; 418 419 /* 420 * If I/O size limitation requested, then use it and pass up to CAM. 421 * If not, use MAXPHYS as an optimization hint, but report HW limit. 422 */ 423 if (sc->max_io_pages > 0) { 424 maxio = min(maxio, sc->max_io_pages * PAGE_SIZE); 425 sc->maxio = maxio; 426 } else { 427 sc->maxio = maxio; 428 maxio = min(maxio, MAXPHYS); 429 } 430 431 sc->num_chains = (maxio / PAGE_SIZE + sges_per_frame - 2) / 432 sges_per_frame * reqcr; 433 if (sc->max_chains > 0 && sc->max_chains < sc->num_chains) 434 sc->num_chains = sc->max_chains; 435 436 /* 437 * Figure out the number of MSIx-based queues. If the firmware or 438 * user has done something crazy and not allowed enough credit for 439 * the queues to be useful then don't enable multi-queue. 440 */ 441 if (sc->facts->MaxMSIxVectors < 2) 442 sc->msi_msgs = 1; 443 444 if (sc->msi_msgs > 1) { 445 sc->msi_msgs = MIN(sc->msi_msgs, mp_ncpus); 446 sc->msi_msgs = MIN(sc->msi_msgs, sc->facts->MaxMSIxVectors); 447 if (sc->num_reqs / sc->msi_msgs < 2) 448 sc->msi_msgs = 1; 449 } 450 451 mps_dprint(sc, MPS_INIT, "Sized queues to q=%d reqs=%d replies=%d\n", 452 sc->msi_msgs, sc->num_reqs, sc->num_replies); 453 } 454 455 /* 456 * This is called during attach and when re-initializing due to a Diag Reset. 457 * IOC Facts is used to allocate many of the structures needed by the driver. 458 * If called from attach, de-allocation is not required because the driver has 459 * not allocated any structures yet, but if called from a Diag Reset, previously 460 * allocated structures based on IOC Facts will need to be freed and re- 461 * allocated bases on the latest IOC Facts. 462 */ 463 static int 464 mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching) 465 { 466 int error; 467 Mpi2IOCFactsReply_t saved_facts; 468 uint8_t saved_mode, reallocating; 469 470 mps_dprint(sc, MPS_INIT|MPS_TRACE, "%s entered\n", __func__); 471 472 /* Save old IOC Facts and then only reallocate if Facts have changed */ 473 if (!attaching) { 474 bcopy(sc->facts, &saved_facts, sizeof(MPI2_IOC_FACTS_REPLY)); 475 } 476 477 /* 478 * Get IOC Facts. In all cases throughout this function, panic if doing 479 * a re-initialization and only return the error if attaching so the OS 480 * can handle it. 481 */ 482 if ((error = mps_get_iocfacts(sc, sc->facts)) != 0) { 483 if (attaching) { 484 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to get " 485 "IOC Facts with error %d, exit\n", error); 486 return (error); 487 } else { 488 panic("%s failed to get IOC Facts with error %d\n", 489 __func__, error); 490 } 491 } 492 493 MPS_DPRINT_PAGE(sc, MPS_XINFO, iocfacts, sc->facts); 494 495 snprintf(sc->fw_version, sizeof(sc->fw_version), 496 "%02d.%02d.%02d.%02d", 497 sc->facts->FWVersion.Struct.Major, 498 sc->facts->FWVersion.Struct.Minor, 499 sc->facts->FWVersion.Struct.Unit, 500 sc->facts->FWVersion.Struct.Dev); 501 502 snprintf(sc->msg_version, sizeof(sc->msg_version), "%d.%d", 503 (sc->facts->MsgVersion & MPI2_IOCFACTS_MSGVERSION_MAJOR_MASK) >> 504 MPI2_IOCFACTS_MSGVERSION_MAJOR_SHIFT, 505 (sc->facts->MsgVersion & MPI2_IOCFACTS_MSGVERSION_MINOR_MASK) >> 506 MPI2_IOCFACTS_MSGVERSION_MINOR_SHIFT); 507 508 mps_dprint(sc, MPS_INFO, "Firmware: %s, Driver: %s\n", sc->fw_version, 509 MPS_DRIVER_VERSION); 510 mps_dprint(sc, MPS_INFO, "IOCCapabilities: %b\n", 511 sc->facts->IOCCapabilities, 512 "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf" 513 "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR" 514 "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc"); 515 516 /* 517 * If the chip doesn't support event replay then a hard reset will be 518 * required to trigger a full discovery. Do the reset here then 519 * retransition to Ready. A hard reset might have already been done, 520 * but it doesn't hurt to do it again. Only do this if attaching, not 521 * for a Diag Reset. 522 */ 523 if (attaching && ((sc->facts->IOCCapabilities & 524 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0)) { 525 mps_dprint(sc, MPS_INIT, "No event replay, reseting\n"); 526 mps_diag_reset(sc, NO_SLEEP); 527 if ((error = mps_transition_ready(sc)) != 0) { 528 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to " 529 "transition to ready with error %d, exit\n", 530 error); 531 return (error); 532 } 533 } 534 535 /* 536 * Set flag if IR Firmware is loaded. If the RAID Capability has 537 * changed from the previous IOC Facts, log a warning, but only if 538 * checking this after a Diag Reset and not during attach. 539 */ 540 saved_mode = sc->ir_firmware; 541 if (sc->facts->IOCCapabilities & 542 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) 543 sc->ir_firmware = 1; 544 if (!attaching) { 545 if (sc->ir_firmware != saved_mode) { 546 mps_dprint(sc, MPS_INIT|MPS_FAULT, "new IR/IT mode " 547 "in IOC Facts does not match previous mode\n"); 548 } 549 } 550 551 /* Only deallocate and reallocate if relevant IOC Facts have changed */ 552 reallocating = FALSE; 553 sc->mps_flags &= ~MPS_FLAGS_REALLOCATED; 554 555 if ((!attaching) && 556 ((saved_facts.MsgVersion != sc->facts->MsgVersion) || 557 (saved_facts.HeaderVersion != sc->facts->HeaderVersion) || 558 (saved_facts.MaxChainDepth != sc->facts->MaxChainDepth) || 559 (saved_facts.RequestCredit != sc->facts->RequestCredit) || 560 (saved_facts.ProductID != sc->facts->ProductID) || 561 (saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) || 562 (saved_facts.IOCRequestFrameSize != 563 sc->facts->IOCRequestFrameSize) || 564 (saved_facts.MaxTargets != sc->facts->MaxTargets) || 565 (saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) || 566 (saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) || 567 (saved_facts.HighPriorityCredit != sc->facts->HighPriorityCredit) || 568 (saved_facts.MaxReplyDescriptorPostQueueDepth != 569 sc->facts->MaxReplyDescriptorPostQueueDepth) || 570 (saved_facts.ReplyFrameSize != sc->facts->ReplyFrameSize) || 571 (saved_facts.MaxVolumes != sc->facts->MaxVolumes) || 572 (saved_facts.MaxPersistentEntries != 573 sc->facts->MaxPersistentEntries))) { 574 reallocating = TRUE; 575 576 /* Record that we reallocated everything */ 577 sc->mps_flags |= MPS_FLAGS_REALLOCATED; 578 } 579 580 /* 581 * Some things should be done if attaching or re-allocating after a Diag 582 * Reset, but are not needed after a Diag Reset if the FW has not 583 * changed. 584 */ 585 if (attaching || reallocating) { 586 /* 587 * Check if controller supports FW diag buffers and set flag to 588 * enable each type. 589 */ 590 if (sc->facts->IOCCapabilities & 591 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) 592 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE]. 593 enabled = TRUE; 594 if (sc->facts->IOCCapabilities & 595 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) 596 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT]. 597 enabled = TRUE; 598 if (sc->facts->IOCCapabilities & 599 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) 600 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED]. 601 enabled = TRUE; 602 603 /* 604 * Set flag if EEDP is supported and if TLR is supported. 605 */ 606 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) 607 sc->eedp_enabled = TRUE; 608 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) 609 sc->control_TLR = TRUE; 610 611 mps_resize_queues(sc); 612 613 /* 614 * Initialize all Tail Queues 615 */ 616 TAILQ_INIT(&sc->req_list); 617 TAILQ_INIT(&sc->high_priority_req_list); 618 TAILQ_INIT(&sc->chain_list); 619 TAILQ_INIT(&sc->tm_list); 620 } 621 622 /* 623 * If doing a Diag Reset and the FW is significantly different 624 * (reallocating will be set above in IOC Facts comparison), then all 625 * buffers based on the IOC Facts will need to be freed before they are 626 * reallocated. 627 */ 628 if (reallocating) { 629 mps_iocfacts_free(sc); 630 mpssas_realloc_targets(sc, saved_facts.MaxTargets + 631 saved_facts.MaxVolumes); 632 } 633 634 /* 635 * Any deallocation has been completed. Now start reallocating 636 * if needed. Will only need to reallocate if attaching or if the new 637 * IOC Facts are different from the previous IOC Facts after a Diag 638 * Reset. Targets have already been allocated above if needed. 639 */ 640 error = 0; 641 while (attaching || reallocating) { 642 if ((error = mps_alloc_hw_queues(sc)) != 0) 643 break; 644 if ((error = mps_alloc_replies(sc)) != 0) 645 break; 646 if ((error = mps_alloc_requests(sc)) != 0) 647 break; 648 if ((error = mps_alloc_queues(sc)) != 0) 649 break; 650 651 break; 652 } 653 if (error) { 654 mps_dprint(sc, MPS_INIT|MPS_FAULT, 655 "Failed to alloc queues with error %d\n", error); 656 mps_free(sc); 657 return (error); 658 } 659 660 /* Always initialize the queues */ 661 bzero(sc->free_queue, sc->fqdepth * 4); 662 mps_init_queues(sc); 663 664 /* 665 * Always get the chip out of the reset state, but only panic if not 666 * attaching. If attaching and there is an error, that is handled by 667 * the OS. 668 */ 669 error = mps_transition_operational(sc); 670 if (error != 0) { 671 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to " 672 "transition to operational with error %d\n", error); 673 mps_free(sc); 674 return (error); 675 } 676 677 /* 678 * Finish the queue initialization. 679 * These are set here instead of in mps_init_queues() because the 680 * IOC resets these values during the state transition in 681 * mps_transition_operational(). The free index is set to 1 682 * because the corresponding index in the IOC is set to 0, and the 683 * IOC treats the queues as full if both are set to the same value. 684 * Hence the reason that the queue can't hold all of the possible 685 * replies. 686 */ 687 sc->replypostindex = 0; 688 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); 689 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0); 690 691 /* 692 * Attach the subsystems so they can prepare their event masks. 693 * XXX Should be dynamic so that IM/IR and user modules can attach 694 */ 695 error = 0; 696 while (attaching) { 697 mps_dprint(sc, MPS_INIT, "Attaching subsystems\n"); 698 if ((error = mps_attach_log(sc)) != 0) 699 break; 700 if ((error = mps_attach_sas(sc)) != 0) 701 break; 702 if ((error = mps_attach_user(sc)) != 0) 703 break; 704 break; 705 } 706 if (error) { 707 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to attach all " 708 "subsystems: error %d\n", error); 709 mps_free(sc); 710 return (error); 711 } 712 713 /* 714 * XXX If the number of MSI-X vectors changes during re-init, this 715 * won't see it and adjust. 716 */ 717 if (attaching && (error = mps_pci_setup_interrupts(sc)) != 0) { 718 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to setup " 719 "interrupts\n"); 720 mps_free(sc); 721 return (error); 722 } 723 724 /* 725 * Set flag if this is a WD controller. This shouldn't ever change, but 726 * reset it after a Diag Reset, just in case. 727 */ 728 sc->WD_available = FALSE; 729 if (pci_get_device(sc->mps_dev) == MPI2_MFGPAGE_DEVID_SSS6200) 730 sc->WD_available = TRUE; 731 732 return (error); 733 } 734 735 /* 736 * This is called if memory is being free (during detach for example) and when 737 * buffers need to be reallocated due to a Diag Reset. 738 */ 739 static void 740 mps_iocfacts_free(struct mps_softc *sc) 741 { 742 struct mps_command *cm; 743 int i; 744 745 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 746 747 if (sc->free_busaddr != 0) 748 bus_dmamap_unload(sc->queues_dmat, sc->queues_map); 749 if (sc->free_queue != NULL) 750 bus_dmamem_free(sc->queues_dmat, sc->free_queue, 751 sc->queues_map); 752 if (sc->queues_dmat != NULL) 753 bus_dma_tag_destroy(sc->queues_dmat); 754 755 if (sc->chain_frames != NULL) { 756 bus_dmamap_unload(sc->chain_dmat, sc->chain_map); 757 bus_dmamem_free(sc->chain_dmat, sc->chain_frames, 758 sc->chain_map); 759 } 760 if (sc->chain_dmat != NULL) 761 bus_dma_tag_destroy(sc->chain_dmat); 762 763 if (sc->sense_busaddr != 0) 764 bus_dmamap_unload(sc->sense_dmat, sc->sense_map); 765 if (sc->sense_frames != NULL) 766 bus_dmamem_free(sc->sense_dmat, sc->sense_frames, 767 sc->sense_map); 768 if (sc->sense_dmat != NULL) 769 bus_dma_tag_destroy(sc->sense_dmat); 770 771 if (sc->reply_busaddr != 0) 772 bus_dmamap_unload(sc->reply_dmat, sc->reply_map); 773 if (sc->reply_frames != NULL) 774 bus_dmamem_free(sc->reply_dmat, sc->reply_frames, 775 sc->reply_map); 776 if (sc->reply_dmat != NULL) 777 bus_dma_tag_destroy(sc->reply_dmat); 778 779 if (sc->req_busaddr != 0) 780 bus_dmamap_unload(sc->req_dmat, sc->req_map); 781 if (sc->req_frames != NULL) 782 bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map); 783 if (sc->req_dmat != NULL) 784 bus_dma_tag_destroy(sc->req_dmat); 785 786 if (sc->chains != NULL) 787 free(sc->chains, M_MPT2); 788 if (sc->commands != NULL) { 789 for (i = 1; i < sc->num_reqs; i++) { 790 cm = &sc->commands[i]; 791 bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap); 792 } 793 free(sc->commands, M_MPT2); 794 } 795 if (sc->buffer_dmat != NULL) 796 bus_dma_tag_destroy(sc->buffer_dmat); 797 798 mps_pci_free_interrupts(sc); 799 free(sc->queues, M_MPT2); 800 sc->queues = NULL; 801 } 802 803 /* 804 * The terms diag reset and hard reset are used interchangeably in the MPI 805 * docs to mean resetting the controller chip. In this code diag reset 806 * cleans everything up, and the hard reset function just sends the reset 807 * sequence to the chip. This should probably be refactored so that every 808 * subsystem gets a reset notification of some sort, and can clean up 809 * appropriately. 810 */ 811 int 812 mps_reinit(struct mps_softc *sc) 813 { 814 int error; 815 struct mpssas_softc *sassc; 816 817 sassc = sc->sassc; 818 819 MPS_FUNCTRACE(sc); 820 821 mtx_assert(&sc->mps_mtx, MA_OWNED); 822 823 mps_dprint(sc, MPS_INIT|MPS_INFO, "Reinitializing controller\n"); 824 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) { 825 mps_dprint(sc, MPS_INIT, "Reset already in progress\n"); 826 return 0; 827 } 828 829 /* make sure the completion callbacks can recognize they're getting 830 * a NULL cm_reply due to a reset. 831 */ 832 sc->mps_flags |= MPS_FLAGS_DIAGRESET; 833 834 /* 835 * Mask interrupts here. 836 */ 837 mps_dprint(sc, MPS_INIT, "masking interrupts and resetting\n"); 838 mps_mask_intr(sc); 839 840 error = mps_diag_reset(sc, CAN_SLEEP); 841 if (error != 0) { 842 /* XXXSL No need to panic here */ 843 panic("%s hard reset failed with error %d\n", 844 __func__, error); 845 } 846 847 /* Restore the PCI state, including the MSI-X registers */ 848 mps_pci_restore(sc); 849 850 /* Give the I/O subsystem special priority to get itself prepared */ 851 mpssas_handle_reinit(sc); 852 853 /* 854 * Get IOC Facts and allocate all structures based on this information. 855 * The attach function will also call mps_iocfacts_allocate at startup. 856 * If relevant values have changed in IOC Facts, this function will free 857 * all of the memory based on IOC Facts and reallocate that memory. 858 */ 859 if ((error = mps_iocfacts_allocate(sc, FALSE)) != 0) { 860 panic("%s IOC Facts based allocation failed with error %d\n", 861 __func__, error); 862 } 863 864 /* 865 * Mapping structures will be re-allocated after getting IOC Page8, so 866 * free these structures here. 867 */ 868 mps_mapping_exit(sc); 869 870 /* 871 * The static page function currently read is IOC Page8. Others can be 872 * added in future. It's possible that the values in IOC Page8 have 873 * changed after a Diag Reset due to user modification, so always read 874 * these. Interrupts are masked, so unmask them before getting config 875 * pages. 876 */ 877 mps_unmask_intr(sc); 878 sc->mps_flags &= ~MPS_FLAGS_DIAGRESET; 879 mps_base_static_config_pages(sc); 880 881 /* 882 * Some mapping info is based in IOC Page8 data, so re-initialize the 883 * mapping tables. 884 */ 885 mps_mapping_initialize(sc); 886 887 /* 888 * Restart will reload the event masks clobbered by the reset, and 889 * then enable the port. 890 */ 891 mps_reregister_events(sc); 892 893 /* the end of discovery will release the simq, so we're done. */ 894 mps_dprint(sc, MPS_INIT|MPS_XINFO, "Finished sc %p post %u free %u\n", 895 sc, sc->replypostindex, sc->replyfreeindex); 896 897 mpssas_release_simq_reinit(sassc); 898 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 899 900 return 0; 901 } 902 903 /* Wait for the chip to ACK a word that we've put into its FIFO 904 * Wait for <timeout> seconds. In single loop wait for busy loop 905 * for 500 microseconds. 906 * Total is [ 0.5 * (2000 * <timeout>) ] in miliseconds. 907 * */ 908 static int 909 mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag) 910 { 911 912 u32 cntdn, count; 913 u32 int_status; 914 u32 doorbell; 915 916 count = 0; 917 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 918 do { 919 int_status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 920 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 921 mps_dprint(sc, MPS_TRACE, 922 "%s: successful count(%d), timeout(%d)\n", 923 __func__, count, timeout); 924 return 0; 925 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 926 doorbell = mps_regread(sc, MPI2_DOORBELL_OFFSET); 927 if ((doorbell & MPI2_IOC_STATE_MASK) == 928 MPI2_IOC_STATE_FAULT) { 929 mps_dprint(sc, MPS_FAULT, 930 "fault_state(0x%04x)!\n", doorbell); 931 return (EFAULT); 932 } 933 } else if (int_status == 0xFFFFFFFF) 934 goto out; 935 936 /* If it can sleep, sleep for 1 milisecond, else busy loop for 937 * 0.5 milisecond */ 938 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 939 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 940 "mpsdba", hz/1000); 941 else if (sleep_flag == CAN_SLEEP) 942 pause("mpsdba", hz/1000); 943 else 944 DELAY(500); 945 count++; 946 } while (--cntdn); 947 948 out: 949 mps_dprint(sc, MPS_FAULT, "%s: failed due to timeout count(%d), " 950 "int_status(%x)!\n", __func__, count, int_status); 951 return (ETIMEDOUT); 952 953 } 954 955 /* Wait for the chip to signal that the next word in its FIFO can be fetched */ 956 static int 957 mps_wait_db_int(struct mps_softc *sc) 958 { 959 int retry; 960 961 for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) { 962 if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) & 963 MPI2_HIS_IOC2SYS_DB_STATUS) != 0) 964 return (0); 965 DELAY(2000); 966 } 967 return (ETIMEDOUT); 968 } 969 970 /* Step through the synchronous command state machine, i.e. "Doorbell mode" */ 971 static int 972 mps_request_sync(struct mps_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply, 973 int req_sz, int reply_sz, int timeout) 974 { 975 uint32_t *data32; 976 uint16_t *data16; 977 int i, count, ioc_sz, residual; 978 int sleep_flags = CAN_SLEEP; 979 980 if (curthread->td_no_sleeping != 0) 981 sleep_flags = NO_SLEEP; 982 983 /* Step 1 */ 984 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 985 986 /* Step 2 */ 987 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 988 return (EBUSY); 989 990 /* Step 3 991 * Announce that a message is coming through the doorbell. Messages 992 * are pushed at 32bit words, so round up if needed. 993 */ 994 count = (req_sz + 3) / 4; 995 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, 996 (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) | 997 (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT)); 998 999 /* Step 4 */ 1000 if (mps_wait_db_int(sc) || 1001 (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) { 1002 mps_dprint(sc, MPS_FAULT, "Doorbell failed to activate\n"); 1003 return (ENXIO); 1004 } 1005 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1006 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) { 1007 mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed\n"); 1008 return (ENXIO); 1009 } 1010 1011 /* Step 5 */ 1012 /* Clock out the message data synchronously in 32-bit dwords*/ 1013 data32 = (uint32_t *)req; 1014 for (i = 0; i < count; i++) { 1015 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i])); 1016 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) { 1017 mps_dprint(sc, MPS_FAULT, 1018 "Timeout while writing doorbell\n"); 1019 return (ENXIO); 1020 } 1021 } 1022 1023 /* Step 6 */ 1024 /* Clock in the reply in 16-bit words. The total length of the 1025 * message is always in the 4th byte, so clock out the first 2 words 1026 * manually, then loop the rest. 1027 */ 1028 data16 = (uint16_t *)reply; 1029 if (mps_wait_db_int(sc) != 0) { 1030 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 0\n"); 1031 return (ENXIO); 1032 } 1033 data16[0] = 1034 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 1035 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1036 if (mps_wait_db_int(sc) != 0) { 1037 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 1\n"); 1038 return (ENXIO); 1039 } 1040 data16[1] = 1041 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 1042 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1043 1044 /* Number of 32bit words in the message */ 1045 ioc_sz = reply->MsgLength; 1046 1047 /* 1048 * Figure out how many 16bit words to clock in without overrunning. 1049 * The precision loss with dividing reply_sz can safely be 1050 * ignored because the messages can only be multiples of 32bits. 1051 */ 1052 residual = 0; 1053 count = MIN((reply_sz / 4), ioc_sz) * 2; 1054 if (count < ioc_sz * 2) { 1055 residual = ioc_sz * 2 - count; 1056 mps_dprint(sc, MPS_ERROR, "Driver error, throwing away %d " 1057 "residual message words\n", residual); 1058 } 1059 1060 for (i = 2; i < count; i++) { 1061 if (mps_wait_db_int(sc) != 0) { 1062 mps_dprint(sc, MPS_FAULT, 1063 "Timeout reading doorbell %d\n", i); 1064 return (ENXIO); 1065 } 1066 data16[i] = mps_regread(sc, MPI2_DOORBELL_OFFSET) & 1067 MPI2_DOORBELL_DATA_MASK; 1068 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1069 } 1070 1071 /* 1072 * Pull out residual words that won't fit into the provided buffer. 1073 * This keeps the chip from hanging due to a driver programming 1074 * error. 1075 */ 1076 while (residual--) { 1077 if (mps_wait_db_int(sc) != 0) { 1078 mps_dprint(sc, MPS_FAULT, 1079 "Timeout reading doorbell\n"); 1080 return (ENXIO); 1081 } 1082 (void)mps_regread(sc, MPI2_DOORBELL_OFFSET); 1083 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1084 } 1085 1086 /* Step 7 */ 1087 if (mps_wait_db_int(sc) != 0) { 1088 mps_dprint(sc, MPS_FAULT, "Timeout waiting to exit doorbell\n"); 1089 return (ENXIO); 1090 } 1091 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 1092 mps_dprint(sc, MPS_FAULT, "Warning, doorbell still active\n"); 1093 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1094 1095 return (0); 1096 } 1097 1098 static void 1099 mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm) 1100 { 1101 reply_descriptor rd; 1102 MPS_FUNCTRACE(sc); 1103 mps_dprint(sc, MPS_TRACE, "SMID %u cm %p ccb %p\n", 1104 cm->cm_desc.Default.SMID, cm, cm->cm_ccb); 1105 1106 if (sc->mps_flags & MPS_FLAGS_ATTACH_DONE && !(sc->mps_flags & MPS_FLAGS_SHUTDOWN)) 1107 mtx_assert(&sc->mps_mtx, MA_OWNED); 1108 1109 if (++sc->io_cmds_active > sc->io_cmds_highwater) 1110 sc->io_cmds_highwater++; 1111 rd.u.low = cm->cm_desc.Words.Low; 1112 rd.u.high = cm->cm_desc.Words.High; 1113 rd.word = htole64(rd.word); 1114 1115 KASSERT(cm->cm_state == MPS_CM_STATE_BUSY, ("command not busy\n")); 1116 cm->cm_state = MPS_CM_STATE_INQUEUE; 1117 1118 /* TODO-We may need to make below regwrite atomic */ 1119 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET, 1120 rd.u.low); 1121 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET, 1122 rd.u.high); 1123 } 1124 1125 /* 1126 * Just the FACTS, ma'am. 1127 */ 1128 static int 1129 mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts) 1130 { 1131 MPI2_DEFAULT_REPLY *reply; 1132 MPI2_IOC_FACTS_REQUEST request; 1133 int error, req_sz, reply_sz; 1134 1135 MPS_FUNCTRACE(sc); 1136 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1137 1138 req_sz = sizeof(MPI2_IOC_FACTS_REQUEST); 1139 reply_sz = sizeof(MPI2_IOC_FACTS_REPLY); 1140 reply = (MPI2_DEFAULT_REPLY *)facts; 1141 1142 bzero(&request, req_sz); 1143 request.Function = MPI2_FUNCTION_IOC_FACTS; 1144 error = mps_request_sync(sc, &request, reply, req_sz, reply_sz, 5); 1145 mps_dprint(sc, MPS_INIT, "%s exit error= %d\n", __func__, error); 1146 1147 return (error); 1148 } 1149 1150 static int 1151 mps_send_iocinit(struct mps_softc *sc) 1152 { 1153 MPI2_IOC_INIT_REQUEST init; 1154 MPI2_DEFAULT_REPLY reply; 1155 int req_sz, reply_sz, error; 1156 struct timeval now; 1157 uint64_t time_in_msec; 1158 1159 MPS_FUNCTRACE(sc); 1160 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1161 1162 /* Do a quick sanity check on proper initialization */ 1163 if ((sc->pqdepth == 0) || (sc->fqdepth == 0) || (sc->reqframesz == 0) 1164 || (sc->replyframesz == 0)) { 1165 mps_dprint(sc, MPS_INIT|MPS_ERROR, 1166 "Driver not fully initialized for IOCInit\n"); 1167 return (EINVAL); 1168 } 1169 1170 req_sz = sizeof(MPI2_IOC_INIT_REQUEST); 1171 reply_sz = sizeof(MPI2_IOC_INIT_REPLY); 1172 bzero(&init, req_sz); 1173 bzero(&reply, reply_sz); 1174 1175 /* 1176 * Fill in the init block. Note that most addresses are 1177 * deliberately in the lower 32bits of memory. This is a micro- 1178 * optimzation for PCI/PCIX, though it's not clear if it helps PCIe. 1179 */ 1180 init.Function = MPI2_FUNCTION_IOC_INIT; 1181 init.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 1182 init.MsgVersion = htole16(MPI2_VERSION); 1183 init.HeaderVersion = htole16(MPI2_HEADER_VERSION); 1184 init.SystemRequestFrameSize = htole16((uint16_t)(sc->reqframesz / 4)); 1185 init.ReplyDescriptorPostQueueDepth = htole16(sc->pqdepth); 1186 init.ReplyFreeQueueDepth = htole16(sc->fqdepth); 1187 init.SenseBufferAddressHigh = 0; 1188 init.SystemReplyAddressHigh = 0; 1189 init.SystemRequestFrameBaseAddress.High = 0; 1190 init.SystemRequestFrameBaseAddress.Low = htole32((uint32_t)sc->req_busaddr); 1191 init.ReplyDescriptorPostQueueAddress.High = 0; 1192 init.ReplyDescriptorPostQueueAddress.Low = htole32((uint32_t)sc->post_busaddr); 1193 init.ReplyFreeQueueAddress.High = 0; 1194 init.ReplyFreeQueueAddress.Low = htole32((uint32_t)sc->free_busaddr); 1195 getmicrotime(&now); 1196 time_in_msec = (now.tv_sec * 1000 + now.tv_usec/1000); 1197 init.TimeStamp.High = htole32((time_in_msec >> 32) & 0xFFFFFFFF); 1198 init.TimeStamp.Low = htole32(time_in_msec & 0xFFFFFFFF); 1199 1200 error = mps_request_sync(sc, &init, &reply, req_sz, reply_sz, 5); 1201 if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 1202 error = ENXIO; 1203 1204 mps_dprint(sc, MPS_INIT, "IOCInit status= 0x%x\n", reply.IOCStatus); 1205 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 1206 return (error); 1207 } 1208 1209 void 1210 mps_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1211 { 1212 bus_addr_t *addr; 1213 1214 addr = arg; 1215 *addr = segs[0].ds_addr; 1216 } 1217 1218 void 1219 mps_memaddr_wait_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1220 { 1221 struct mps_busdma_context *ctx; 1222 int need_unload, need_free; 1223 1224 ctx = (struct mps_busdma_context *)arg; 1225 need_unload = 0; 1226 need_free = 0; 1227 1228 mps_lock(ctx->softc); 1229 ctx->error = error; 1230 ctx->completed = 1; 1231 if ((error == 0) && (ctx->abandoned == 0)) { 1232 *ctx->addr = segs[0].ds_addr; 1233 } else { 1234 if (nsegs != 0) 1235 need_unload = 1; 1236 if (ctx->abandoned != 0) 1237 need_free = 1; 1238 } 1239 if (need_free == 0) 1240 wakeup(ctx); 1241 1242 mps_unlock(ctx->softc); 1243 1244 if (need_unload != 0) { 1245 bus_dmamap_unload(ctx->buffer_dmat, 1246 ctx->buffer_dmamap); 1247 *ctx->addr = 0; 1248 } 1249 1250 if (need_free != 0) 1251 free(ctx, M_MPSUSER); 1252 } 1253 1254 static int 1255 mps_alloc_queues(struct mps_softc *sc) 1256 { 1257 struct mps_queue *q; 1258 u_int nq, i; 1259 1260 nq = sc->msi_msgs; 1261 mps_dprint(sc, MPS_INIT|MPS_XINFO, "Allocating %d I/O queues\n", nq); 1262 1263 sc->queues = malloc(sizeof(struct mps_queue) * nq, M_MPT2, 1264 M_NOWAIT|M_ZERO); 1265 if (sc->queues == NULL) 1266 return (ENOMEM); 1267 1268 for (i = 0; i < nq; i++) { 1269 q = &sc->queues[i]; 1270 mps_dprint(sc, MPS_INIT, "Configuring queue %d %p\n", i, q); 1271 q->sc = sc; 1272 q->qnum = i; 1273 } 1274 1275 return (0); 1276 } 1277 1278 static int 1279 mps_alloc_hw_queues(struct mps_softc *sc) 1280 { 1281 bus_addr_t queues_busaddr; 1282 uint8_t *queues; 1283 int qsize, fqsize, pqsize; 1284 1285 /* 1286 * The reply free queue contains 4 byte entries in multiples of 16 and 1287 * aligned on a 16 byte boundary. There must always be an unused entry. 1288 * This queue supplies fresh reply frames for the firmware to use. 1289 * 1290 * The reply descriptor post queue contains 8 byte entries in 1291 * multiples of 16 and aligned on a 16 byte boundary. This queue 1292 * contains filled-in reply frames sent from the firmware to the host. 1293 * 1294 * These two queues are allocated together for simplicity. 1295 */ 1296 sc->fqdepth = roundup2(sc->num_replies + 1, 16); 1297 sc->pqdepth = roundup2(sc->num_replies + 1, 16); 1298 fqsize= sc->fqdepth * 4; 1299 pqsize = sc->pqdepth * 8; 1300 qsize = fqsize + pqsize; 1301 1302 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1303 16, 0, /* algnmnt, boundary */ 1304 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1305 BUS_SPACE_MAXADDR, /* highaddr */ 1306 NULL, NULL, /* filter, filterarg */ 1307 qsize, /* maxsize */ 1308 1, /* nsegments */ 1309 qsize, /* maxsegsize */ 1310 0, /* flags */ 1311 NULL, NULL, /* lockfunc, lockarg */ 1312 &sc->queues_dmat)) { 1313 mps_dprint(sc, MPS_ERROR, "Cannot allocate queues DMA tag\n"); 1314 return (ENOMEM); 1315 } 1316 if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT, 1317 &sc->queues_map)) { 1318 mps_dprint(sc, MPS_ERROR, "Cannot allocate queues memory\n"); 1319 return (ENOMEM); 1320 } 1321 bzero(queues, qsize); 1322 bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize, 1323 mps_memaddr_cb, &queues_busaddr, 0); 1324 1325 sc->free_queue = (uint32_t *)queues; 1326 sc->free_busaddr = queues_busaddr; 1327 sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize); 1328 sc->post_busaddr = queues_busaddr + fqsize; 1329 mps_dprint(sc, MPS_INIT, "free queue busaddr= %#016jx size= %d\n", 1330 (uintmax_t)sc->free_busaddr, fqsize); 1331 mps_dprint(sc, MPS_INIT, "reply queue busaddr= %#016jx size= %d\n", 1332 (uintmax_t)sc->post_busaddr, pqsize); 1333 1334 return (0); 1335 } 1336 1337 static int 1338 mps_alloc_replies(struct mps_softc *sc) 1339 { 1340 int rsize, num_replies; 1341 1342 /* Store the reply frame size in bytes rather than as 32bit words */ 1343 sc->replyframesz = sc->facts->ReplyFrameSize * 4; 1344 1345 /* 1346 * sc->num_replies should be one less than sc->fqdepth. We need to 1347 * allocate space for sc->fqdepth replies, but only sc->num_replies 1348 * replies can be used at once. 1349 */ 1350 num_replies = max(sc->fqdepth, sc->num_replies); 1351 1352 rsize = sc->replyframesz * num_replies; 1353 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1354 4, 0, /* algnmnt, boundary */ 1355 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1356 BUS_SPACE_MAXADDR, /* highaddr */ 1357 NULL, NULL, /* filter, filterarg */ 1358 rsize, /* maxsize */ 1359 1, /* nsegments */ 1360 rsize, /* maxsegsize */ 1361 0, /* flags */ 1362 NULL, NULL, /* lockfunc, lockarg */ 1363 &sc->reply_dmat)) { 1364 mps_dprint(sc, MPS_ERROR, "Cannot allocate replies DMA tag\n"); 1365 return (ENOMEM); 1366 } 1367 if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames, 1368 BUS_DMA_NOWAIT, &sc->reply_map)) { 1369 mps_dprint(sc, MPS_ERROR, "Cannot allocate replies memory\n"); 1370 return (ENOMEM); 1371 } 1372 bzero(sc->reply_frames, rsize); 1373 bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize, 1374 mps_memaddr_cb, &sc->reply_busaddr, 0); 1375 1376 mps_dprint(sc, MPS_INIT, "reply frames busaddr= %#016jx size= %d\n", 1377 (uintmax_t)sc->reply_busaddr, rsize); 1378 1379 return (0); 1380 } 1381 1382 static void 1383 mps_load_chains_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1384 { 1385 struct mps_softc *sc = arg; 1386 struct mps_chain *chain; 1387 bus_size_t bo; 1388 int i, o, s; 1389 1390 if (error != 0) 1391 return; 1392 1393 for (i = 0, o = 0, s = 0; s < nsegs; s++) { 1394 for (bo = 0; bo + sc->reqframesz <= segs[s].ds_len; 1395 bo += sc->reqframesz) { 1396 chain = &sc->chains[i++]; 1397 chain->chain =(MPI2_SGE_IO_UNION *)(sc->chain_frames+o); 1398 chain->chain_busaddr = segs[s].ds_addr + bo; 1399 o += sc->reqframesz; 1400 mps_free_chain(sc, chain); 1401 } 1402 if (bo != segs[s].ds_len) 1403 o += segs[s].ds_len - bo; 1404 } 1405 sc->chain_free_lowwater = i; 1406 } 1407 1408 static int 1409 mps_alloc_requests(struct mps_softc *sc) 1410 { 1411 struct mps_command *cm; 1412 int i, rsize, nsegs; 1413 1414 rsize = sc->reqframesz * sc->num_reqs; 1415 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1416 16, 0, /* algnmnt, boundary */ 1417 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1418 BUS_SPACE_MAXADDR, /* highaddr */ 1419 NULL, NULL, /* filter, filterarg */ 1420 rsize, /* maxsize */ 1421 1, /* nsegments */ 1422 rsize, /* maxsegsize */ 1423 0, /* flags */ 1424 NULL, NULL, /* lockfunc, lockarg */ 1425 &sc->req_dmat)) { 1426 mps_dprint(sc, MPS_ERROR, "Cannot allocate request DMA tag\n"); 1427 return (ENOMEM); 1428 } 1429 if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames, 1430 BUS_DMA_NOWAIT, &sc->req_map)) { 1431 mps_dprint(sc, MPS_ERROR, "Cannot allocate request memory\n"); 1432 return (ENOMEM); 1433 } 1434 bzero(sc->req_frames, rsize); 1435 bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize, 1436 mps_memaddr_cb, &sc->req_busaddr, 0); 1437 mps_dprint(sc, MPS_INIT, "request frames busaddr= %#016jx size= %d\n", 1438 (uintmax_t)sc->req_busaddr, rsize); 1439 1440 sc->chains = malloc(sizeof(struct mps_chain) * sc->num_chains, M_MPT2, 1441 M_NOWAIT | M_ZERO); 1442 if (!sc->chains) { 1443 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain memory\n"); 1444 return (ENOMEM); 1445 } 1446 rsize = sc->reqframesz * sc->num_chains; 1447 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1448 16, 0, /* algnmnt, boundary */ 1449 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1450 BUS_SPACE_MAXADDR, /* highaddr */ 1451 NULL, NULL, /* filter, filterarg */ 1452 rsize, /* maxsize */ 1453 howmany(rsize, PAGE_SIZE), /* nsegments */ 1454 rsize, /* maxsegsize */ 1455 0, /* flags */ 1456 NULL, NULL, /* lockfunc, lockarg */ 1457 &sc->chain_dmat)) { 1458 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain DMA tag\n"); 1459 return (ENOMEM); 1460 } 1461 if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames, 1462 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->chain_map)) { 1463 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain memory\n"); 1464 return (ENOMEM); 1465 } 1466 if (bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, 1467 rsize, mps_load_chains_cb, sc, BUS_DMA_NOWAIT)) { 1468 mps_dprint(sc, MPS_ERROR, "Cannot load chain memory\n"); 1469 bus_dmamem_free(sc->chain_dmat, sc->chain_frames, 1470 sc->chain_map); 1471 return (ENOMEM); 1472 } 1473 1474 rsize = MPS_SENSE_LEN * sc->num_reqs; 1475 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1476 1, 0, /* algnmnt, boundary */ 1477 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1478 BUS_SPACE_MAXADDR, /* highaddr */ 1479 NULL, NULL, /* filter, filterarg */ 1480 rsize, /* maxsize */ 1481 1, /* nsegments */ 1482 rsize, /* maxsegsize */ 1483 0, /* flags */ 1484 NULL, NULL, /* lockfunc, lockarg */ 1485 &sc->sense_dmat)) { 1486 mps_dprint(sc, MPS_ERROR, "Cannot allocate sense DMA tag\n"); 1487 return (ENOMEM); 1488 } 1489 if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames, 1490 BUS_DMA_NOWAIT, &sc->sense_map)) { 1491 mps_dprint(sc, MPS_ERROR, "Cannot allocate sense memory\n"); 1492 return (ENOMEM); 1493 } 1494 bzero(sc->sense_frames, rsize); 1495 bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize, 1496 mps_memaddr_cb, &sc->sense_busaddr, 0); 1497 mps_dprint(sc, MPS_INIT, "sense frames busaddr= %#016jx size= %d\n", 1498 (uintmax_t)sc->sense_busaddr, rsize); 1499 1500 nsegs = (sc->maxio / PAGE_SIZE) + 1; 1501 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1502 1, 0, /* algnmnt, boundary */ 1503 BUS_SPACE_MAXADDR, /* lowaddr */ 1504 BUS_SPACE_MAXADDR, /* highaddr */ 1505 NULL, NULL, /* filter, filterarg */ 1506 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 1507 nsegs, /* nsegments */ 1508 BUS_SPACE_MAXSIZE_24BIT,/* maxsegsize */ 1509 BUS_DMA_ALLOCNOW, /* flags */ 1510 busdma_lock_mutex, /* lockfunc */ 1511 &sc->mps_mtx, /* lockarg */ 1512 &sc->buffer_dmat)) { 1513 mps_dprint(sc, MPS_ERROR, "Cannot allocate buffer DMA tag\n"); 1514 return (ENOMEM); 1515 } 1516 1517 /* 1518 * SMID 0 cannot be used as a free command per the firmware spec. 1519 * Just drop that command instead of risking accounting bugs. 1520 */ 1521 sc->commands = malloc(sizeof(struct mps_command) * sc->num_reqs, 1522 M_MPT2, M_WAITOK | M_ZERO); 1523 for (i = 1; i < sc->num_reqs; i++) { 1524 cm = &sc->commands[i]; 1525 cm->cm_req = sc->req_frames + i * sc->reqframesz; 1526 cm->cm_req_busaddr = sc->req_busaddr + i * sc->reqframesz; 1527 cm->cm_sense = &sc->sense_frames[i]; 1528 cm->cm_sense_busaddr = sc->sense_busaddr + i * MPS_SENSE_LEN; 1529 cm->cm_desc.Default.SMID = i; 1530 cm->cm_sc = sc; 1531 cm->cm_state = MPS_CM_STATE_BUSY; 1532 TAILQ_INIT(&cm->cm_chain_list); 1533 callout_init_mtx(&cm->cm_callout, &sc->mps_mtx, 0); 1534 1535 /* XXX Is a failure here a critical problem? */ 1536 if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0) 1537 if (i <= sc->num_prireqs) 1538 mps_free_high_priority_command(sc, cm); 1539 else 1540 mps_free_command(sc, cm); 1541 else { 1542 panic("failed to allocate command %d\n", i); 1543 sc->num_reqs = i; 1544 break; 1545 } 1546 } 1547 1548 return (0); 1549 } 1550 1551 static int 1552 mps_init_queues(struct mps_softc *sc) 1553 { 1554 int i; 1555 1556 memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8); 1557 1558 /* 1559 * According to the spec, we need to use one less reply than we 1560 * have space for on the queue. So sc->num_replies (the number we 1561 * use) should be less than sc->fqdepth (allocated size). 1562 */ 1563 if (sc->num_replies >= sc->fqdepth) 1564 return (EINVAL); 1565 1566 /* 1567 * Initialize all of the free queue entries. 1568 */ 1569 for (i = 0; i < sc->fqdepth; i++) 1570 sc->free_queue[i] = sc->reply_busaddr + (i * sc->replyframesz); 1571 sc->replyfreeindex = sc->num_replies; 1572 1573 return (0); 1574 } 1575 1576 /* Get the driver parameter tunables. Lowest priority are the driver defaults. 1577 * Next are the global settings, if they exist. Highest are the per-unit 1578 * settings, if they exist. 1579 */ 1580 void 1581 mps_get_tunables(struct mps_softc *sc) 1582 { 1583 char tmpstr[80], mps_debug[80]; 1584 1585 /* XXX default to some debugging for now */ 1586 sc->mps_debug = MPS_INFO|MPS_FAULT; 1587 sc->disable_msix = 0; 1588 sc->disable_msi = 0; 1589 sc->max_msix = MPS_MSIX_MAX; 1590 sc->max_chains = MPS_CHAIN_FRAMES; 1591 sc->max_io_pages = MPS_MAXIO_PAGES; 1592 sc->enable_ssu = MPS_SSU_ENABLE_SSD_DISABLE_HDD; 1593 sc->spinup_wait_time = DEFAULT_SPINUP_WAIT; 1594 sc->use_phynum = 1; 1595 sc->max_reqframes = MPS_REQ_FRAMES; 1596 sc->max_prireqframes = MPS_PRI_REQ_FRAMES; 1597 sc->max_replyframes = MPS_REPLY_FRAMES; 1598 sc->max_evtframes = MPS_EVT_REPLY_FRAMES; 1599 1600 /* 1601 * Grab the global variables. 1602 */ 1603 bzero(mps_debug, 80); 1604 if (TUNABLE_STR_FETCH("hw.mps.debug_level", mps_debug, 80) != 0) 1605 mps_parse_debug(sc, mps_debug); 1606 TUNABLE_INT_FETCH("hw.mps.disable_msix", &sc->disable_msix); 1607 TUNABLE_INT_FETCH("hw.mps.disable_msi", &sc->disable_msi); 1608 TUNABLE_INT_FETCH("hw.mps.max_msix", &sc->max_msix); 1609 TUNABLE_INT_FETCH("hw.mps.max_chains", &sc->max_chains); 1610 TUNABLE_INT_FETCH("hw.mps.max_io_pages", &sc->max_io_pages); 1611 TUNABLE_INT_FETCH("hw.mps.enable_ssu", &sc->enable_ssu); 1612 TUNABLE_INT_FETCH("hw.mps.spinup_wait_time", &sc->spinup_wait_time); 1613 TUNABLE_INT_FETCH("hw.mps.use_phy_num", &sc->use_phynum); 1614 TUNABLE_INT_FETCH("hw.mps.max_reqframes", &sc->max_reqframes); 1615 TUNABLE_INT_FETCH("hw.mps.max_prireqframes", &sc->max_prireqframes); 1616 TUNABLE_INT_FETCH("hw.mps.max_replyframes", &sc->max_replyframes); 1617 TUNABLE_INT_FETCH("hw.mps.max_evtframes", &sc->max_evtframes); 1618 1619 /* Grab the unit-instance variables */ 1620 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.debug_level", 1621 device_get_unit(sc->mps_dev)); 1622 bzero(mps_debug, 80); 1623 if (TUNABLE_STR_FETCH(tmpstr, mps_debug, 80) != 0) 1624 mps_parse_debug(sc, mps_debug); 1625 1626 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msix", 1627 device_get_unit(sc->mps_dev)); 1628 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix); 1629 1630 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msi", 1631 device_get_unit(sc->mps_dev)); 1632 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi); 1633 1634 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_msix", 1635 device_get_unit(sc->mps_dev)); 1636 TUNABLE_INT_FETCH(tmpstr, &sc->max_msix); 1637 1638 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_chains", 1639 device_get_unit(sc->mps_dev)); 1640 TUNABLE_INT_FETCH(tmpstr, &sc->max_chains); 1641 1642 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_io_pages", 1643 device_get_unit(sc->mps_dev)); 1644 TUNABLE_INT_FETCH(tmpstr, &sc->max_io_pages); 1645 1646 bzero(sc->exclude_ids, sizeof(sc->exclude_ids)); 1647 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.exclude_ids", 1648 device_get_unit(sc->mps_dev)); 1649 TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids)); 1650 1651 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.enable_ssu", 1652 device_get_unit(sc->mps_dev)); 1653 TUNABLE_INT_FETCH(tmpstr, &sc->enable_ssu); 1654 1655 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.spinup_wait_time", 1656 device_get_unit(sc->mps_dev)); 1657 TUNABLE_INT_FETCH(tmpstr, &sc->spinup_wait_time); 1658 1659 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.use_phy_num", 1660 device_get_unit(sc->mps_dev)); 1661 TUNABLE_INT_FETCH(tmpstr, &sc->use_phynum); 1662 1663 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_reqframes", 1664 device_get_unit(sc->mps_dev)); 1665 TUNABLE_INT_FETCH(tmpstr, &sc->max_reqframes); 1666 1667 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_prireqframes", 1668 device_get_unit(sc->mps_dev)); 1669 TUNABLE_INT_FETCH(tmpstr, &sc->max_prireqframes); 1670 1671 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_replyframes", 1672 device_get_unit(sc->mps_dev)); 1673 TUNABLE_INT_FETCH(tmpstr, &sc->max_replyframes); 1674 1675 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_evtframes", 1676 device_get_unit(sc->mps_dev)); 1677 TUNABLE_INT_FETCH(tmpstr, &sc->max_evtframes); 1678 1679 } 1680 1681 static void 1682 mps_setup_sysctl(struct mps_softc *sc) 1683 { 1684 struct sysctl_ctx_list *sysctl_ctx = NULL; 1685 struct sysctl_oid *sysctl_tree = NULL; 1686 char tmpstr[80], tmpstr2[80]; 1687 1688 /* 1689 * Setup the sysctl variable so the user can change the debug level 1690 * on the fly. 1691 */ 1692 snprintf(tmpstr, sizeof(tmpstr), "MPS controller %d", 1693 device_get_unit(sc->mps_dev)); 1694 snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mps_dev)); 1695 1696 sysctl_ctx = device_get_sysctl_ctx(sc->mps_dev); 1697 if (sysctl_ctx != NULL) 1698 sysctl_tree = device_get_sysctl_tree(sc->mps_dev); 1699 1700 if (sysctl_tree == NULL) { 1701 sysctl_ctx_init(&sc->sysctl_ctx); 1702 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx, 1703 SYSCTL_STATIC_CHILDREN(_hw_mps), OID_AUTO, tmpstr2, 1704 CTLFLAG_RD | CTLFLAG_MPSAFE, 0, tmpstr); 1705 if (sc->sysctl_tree == NULL) 1706 return; 1707 sysctl_ctx = &sc->sysctl_ctx; 1708 sysctl_tree = sc->sysctl_tree; 1709 } 1710 1711 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1712 OID_AUTO, "debug_level", CTLTYPE_STRING | CTLFLAG_RW |CTLFLAG_MPSAFE, 1713 sc, 0, mps_debug_sysctl, "A", "mps debug level"); 1714 1715 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1716 OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0, 1717 "Disable the use of MSI-X interrupts"); 1718 1719 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1720 OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0, 1721 "Disable the use of MSI interrupts"); 1722 1723 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1724 OID_AUTO, "max_msix", CTLFLAG_RD, &sc->max_msix, 0, 1725 "User-defined maximum number of MSIX queues"); 1726 1727 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1728 OID_AUTO, "msix_msgs", CTLFLAG_RD, &sc->msi_msgs, 0, 1729 "Negotiated number of MSIX queues"); 1730 1731 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1732 OID_AUTO, "max_reqframes", CTLFLAG_RD, &sc->max_reqframes, 0, 1733 "Total number of allocated request frames"); 1734 1735 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1736 OID_AUTO, "max_prireqframes", CTLFLAG_RD, &sc->max_prireqframes, 0, 1737 "Total number of allocated high priority request frames"); 1738 1739 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1740 OID_AUTO, "max_replyframes", CTLFLAG_RD, &sc->max_replyframes, 0, 1741 "Total number of allocated reply frames"); 1742 1743 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1744 OID_AUTO, "max_evtframes", CTLFLAG_RD, &sc->max_evtframes, 0, 1745 "Total number of event frames allocated"); 1746 1747 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1748 OID_AUTO, "firmware_version", CTLFLAG_RD, sc->fw_version, 1749 strlen(sc->fw_version), "firmware version"); 1750 1751 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1752 OID_AUTO, "driver_version", CTLFLAG_RD, MPS_DRIVER_VERSION, 1753 strlen(MPS_DRIVER_VERSION), "driver version"); 1754 1755 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1756 OID_AUTO, "msg_version", CTLFLAG_RD, sc->msg_version, 1757 strlen(sc->msg_version), "message interface version"); 1758 1759 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1760 OID_AUTO, "io_cmds_active", CTLFLAG_RD, 1761 &sc->io_cmds_active, 0, "number of currently active commands"); 1762 1763 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1764 OID_AUTO, "io_cmds_highwater", CTLFLAG_RD, 1765 &sc->io_cmds_highwater, 0, "maximum active commands seen"); 1766 1767 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1768 OID_AUTO, "chain_free", CTLFLAG_RD, 1769 &sc->chain_free, 0, "number of free chain elements"); 1770 1771 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1772 OID_AUTO, "chain_free_lowwater", CTLFLAG_RD, 1773 &sc->chain_free_lowwater, 0,"lowest number of free chain elements"); 1774 1775 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1776 OID_AUTO, "max_chains", CTLFLAG_RD, 1777 &sc->max_chains, 0,"maximum chain frames that will be allocated"); 1778 1779 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1780 OID_AUTO, "max_io_pages", CTLFLAG_RD, 1781 &sc->max_io_pages, 0,"maximum pages to allow per I/O (if <1 use " 1782 "IOCFacts)"); 1783 1784 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1785 OID_AUTO, "enable_ssu", CTLFLAG_RW, &sc->enable_ssu, 0, 1786 "enable SSU to SATA SSD/HDD at shutdown"); 1787 1788 SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1789 OID_AUTO, "chain_alloc_fail", CTLFLAG_RD, 1790 &sc->chain_alloc_fail, "chain allocation failures"); 1791 1792 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1793 OID_AUTO, "spinup_wait_time", CTLFLAG_RD, 1794 &sc->spinup_wait_time, DEFAULT_SPINUP_WAIT, "seconds to wait for " 1795 "spinup after SATA ID error"); 1796 1797 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1798 OID_AUTO, "mapping_table_dump", 1799 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0, 1800 mps_mapping_dump, "A", "Mapping Table Dump"); 1801 1802 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1803 OID_AUTO, "encl_table_dump", 1804 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0, 1805 mps_mapping_encl_dump, "A", "Enclosure Table Dump"); 1806 1807 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1808 OID_AUTO, "dump_reqs", 1809 CTLTYPE_OPAQUE | CTLFLAG_RD | CTLFLAG_SKIP | CTLFLAG_NEEDGIANT, 1810 sc, 0, mps_dump_reqs, "I", "Dump Active Requests"); 1811 1812 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1813 OID_AUTO, "use_phy_num", CTLFLAG_RD, &sc->use_phynum, 0, 1814 "Use the phy number for enumeration"); 1815 } 1816 1817 static struct mps_debug_string { 1818 char *name; 1819 int flag; 1820 } mps_debug_strings[] = { 1821 {"info", MPS_INFO}, 1822 {"fault", MPS_FAULT}, 1823 {"event", MPS_EVENT}, 1824 {"log", MPS_LOG}, 1825 {"recovery", MPS_RECOVERY}, 1826 {"error", MPS_ERROR}, 1827 {"init", MPS_INIT}, 1828 {"xinfo", MPS_XINFO}, 1829 {"user", MPS_USER}, 1830 {"mapping", MPS_MAPPING}, 1831 {"trace", MPS_TRACE} 1832 }; 1833 1834 enum mps_debug_level_combiner { 1835 COMB_NONE, 1836 COMB_ADD, 1837 COMB_SUB 1838 }; 1839 1840 static int 1841 mps_debug_sysctl(SYSCTL_HANDLER_ARGS) 1842 { 1843 struct mps_softc *sc; 1844 struct mps_debug_string *string; 1845 struct sbuf *sbuf; 1846 char *buffer; 1847 size_t sz; 1848 int i, len, debug, error; 1849 1850 sc = (struct mps_softc *)arg1; 1851 1852 error = sysctl_wire_old_buffer(req, 0); 1853 if (error != 0) 1854 return (error); 1855 1856 sbuf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 1857 debug = sc->mps_debug; 1858 1859 sbuf_printf(sbuf, "%#x", debug); 1860 1861 sz = sizeof(mps_debug_strings) / sizeof(mps_debug_strings[0]); 1862 for (i = 0; i < sz; i++) { 1863 string = &mps_debug_strings[i]; 1864 if (debug & string->flag) 1865 sbuf_printf(sbuf, ",%s", string->name); 1866 } 1867 1868 error = sbuf_finish(sbuf); 1869 sbuf_delete(sbuf); 1870 1871 if (error || req->newptr == NULL) 1872 return (error); 1873 1874 len = req->newlen - req->newidx; 1875 if (len == 0) 1876 return (0); 1877 1878 buffer = malloc(len, M_MPT2, M_ZERO|M_WAITOK); 1879 error = SYSCTL_IN(req, buffer, len); 1880 1881 mps_parse_debug(sc, buffer); 1882 1883 free(buffer, M_MPT2); 1884 return (error); 1885 } 1886 1887 static void 1888 mps_parse_debug(struct mps_softc *sc, char *list) 1889 { 1890 struct mps_debug_string *string; 1891 enum mps_debug_level_combiner op; 1892 char *token, *endtoken; 1893 size_t sz; 1894 int flags, i; 1895 1896 if (list == NULL || *list == '\0') 1897 return; 1898 1899 if (*list == '+') { 1900 op = COMB_ADD; 1901 list++; 1902 } else if (*list == '-') { 1903 op = COMB_SUB; 1904 list++; 1905 } else 1906 op = COMB_NONE; 1907 if (*list == '\0') 1908 return; 1909 1910 flags = 0; 1911 sz = sizeof(mps_debug_strings) / sizeof(mps_debug_strings[0]); 1912 while ((token = strsep(&list, ":,")) != NULL) { 1913 /* Handle integer flags */ 1914 flags |= strtol(token, &endtoken, 0); 1915 if (token != endtoken) 1916 continue; 1917 1918 /* Handle text flags */ 1919 for (i = 0; i < sz; i++) { 1920 string = &mps_debug_strings[i]; 1921 if (strcasecmp(token, string->name) == 0) { 1922 flags |= string->flag; 1923 break; 1924 } 1925 } 1926 } 1927 1928 switch (op) { 1929 case COMB_NONE: 1930 sc->mps_debug = flags; 1931 break; 1932 case COMB_ADD: 1933 sc->mps_debug |= flags; 1934 break; 1935 case COMB_SUB: 1936 sc->mps_debug &= (~flags); 1937 break; 1938 } 1939 1940 return; 1941 } 1942 1943 struct mps_dumpreq_hdr { 1944 uint32_t smid; 1945 uint32_t state; 1946 uint32_t numframes; 1947 uint32_t deschi; 1948 uint32_t desclo; 1949 }; 1950 1951 static int 1952 mps_dump_reqs(SYSCTL_HANDLER_ARGS) 1953 { 1954 struct mps_softc *sc; 1955 struct mps_chain *chain, *chain1; 1956 struct mps_command *cm; 1957 struct mps_dumpreq_hdr hdr; 1958 struct sbuf *sb; 1959 uint32_t smid, state; 1960 int i, numreqs, error = 0; 1961 1962 sc = (struct mps_softc *)arg1; 1963 1964 if ((error = priv_check(curthread, PRIV_DRIVER)) != 0) { 1965 printf("priv check error %d\n", error); 1966 return (error); 1967 } 1968 1969 state = MPS_CM_STATE_INQUEUE; 1970 smid = 1; 1971 numreqs = sc->num_reqs; 1972 1973 if (req->newptr != NULL) 1974 return (EINVAL); 1975 1976 if (smid == 0 || smid > sc->num_reqs) 1977 return (EINVAL); 1978 if (numreqs <= 0 || (numreqs + smid > sc->num_reqs)) 1979 numreqs = sc->num_reqs; 1980 sb = sbuf_new_for_sysctl(NULL, NULL, 4096, req); 1981 1982 /* Best effort, no locking */ 1983 for (i = smid; i < numreqs; i++) { 1984 cm = &sc->commands[i]; 1985 if (cm->cm_state != state) 1986 continue; 1987 hdr.smid = i; 1988 hdr.state = cm->cm_state; 1989 hdr.numframes = 1; 1990 hdr.deschi = cm->cm_desc.Words.High; 1991 hdr.desclo = cm->cm_desc.Words.Low; 1992 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, 1993 chain1) 1994 hdr.numframes++; 1995 sbuf_bcat(sb, &hdr, sizeof(hdr)); 1996 sbuf_bcat(sb, cm->cm_req, 128); 1997 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, 1998 chain1) 1999 sbuf_bcat(sb, chain->chain, 128); 2000 } 2001 2002 error = sbuf_finish(sb); 2003 sbuf_delete(sb); 2004 return (error); 2005 } 2006 2007 int 2008 mps_attach(struct mps_softc *sc) 2009 { 2010 int error; 2011 2012 MPS_FUNCTRACE(sc); 2013 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 2014 2015 mtx_init(&sc->mps_mtx, "MPT2SAS lock", NULL, MTX_DEF); 2016 callout_init_mtx(&sc->periodic, &sc->mps_mtx, 0); 2017 callout_init_mtx(&sc->device_check_callout, &sc->mps_mtx, 0); 2018 TAILQ_INIT(&sc->event_list); 2019 timevalclear(&sc->lastfail); 2020 2021 if ((error = mps_transition_ready(sc)) != 0) { 2022 mps_dprint(sc, MPS_INIT|MPS_FAULT, "failed to transition " 2023 "ready\n"); 2024 return (error); 2025 } 2026 2027 sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPT2, 2028 M_ZERO|M_NOWAIT); 2029 if(!sc->facts) { 2030 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Cannot allocate memory, " 2031 "exit\n"); 2032 return (ENOMEM); 2033 } 2034 2035 /* 2036 * Get IOC Facts and allocate all structures based on this information. 2037 * A Diag Reset will also call mps_iocfacts_allocate and re-read the IOC 2038 * Facts. If relevant values have changed in IOC Facts, this function 2039 * will free all of the memory based on IOC Facts and reallocate that 2040 * memory. If this fails, any allocated memory should already be freed. 2041 */ 2042 if ((error = mps_iocfacts_allocate(sc, TRUE)) != 0) { 2043 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC Facts based allocation " 2044 "failed with error %d, exit\n", error); 2045 return (error); 2046 } 2047 2048 /* Start the periodic watchdog check on the IOC Doorbell */ 2049 mps_periodic(sc); 2050 2051 /* 2052 * The portenable will kick off discovery events that will drive the 2053 * rest of the initialization process. The CAM/SAS module will 2054 * hold up the boot sequence until discovery is complete. 2055 */ 2056 sc->mps_ich.ich_func = mps_startup; 2057 sc->mps_ich.ich_arg = sc; 2058 if (config_intrhook_establish(&sc->mps_ich) != 0) { 2059 mps_dprint(sc, MPS_INIT|MPS_ERROR, 2060 "Cannot establish MPS config hook\n"); 2061 error = EINVAL; 2062 } 2063 2064 /* 2065 * Allow IR to shutdown gracefully when shutdown occurs. 2066 */ 2067 sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final, 2068 mpssas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT); 2069 2070 if (sc->shutdown_eh == NULL) 2071 mps_dprint(sc, MPS_INIT|MPS_ERROR, 2072 "shutdown event registration failed\n"); 2073 2074 mps_setup_sysctl(sc); 2075 2076 sc->mps_flags |= MPS_FLAGS_ATTACH_DONE; 2077 mps_dprint(sc, MPS_INIT, "%s exit error= %d\n", __func__, error); 2078 2079 return (error); 2080 } 2081 2082 /* Run through any late-start handlers. */ 2083 static void 2084 mps_startup(void *arg) 2085 { 2086 struct mps_softc *sc; 2087 2088 sc = (struct mps_softc *)arg; 2089 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 2090 2091 mps_lock(sc); 2092 mps_unmask_intr(sc); 2093 2094 /* initialize device mapping tables */ 2095 mps_base_static_config_pages(sc); 2096 mps_mapping_initialize(sc); 2097 mpssas_startup(sc); 2098 mps_unlock(sc); 2099 2100 mps_dprint(sc, MPS_INIT, "disestablish config intrhook\n"); 2101 config_intrhook_disestablish(&sc->mps_ich); 2102 sc->mps_ich.ich_arg = NULL; 2103 2104 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 2105 } 2106 2107 /* Periodic watchdog. Is called with the driver lock already held. */ 2108 static void 2109 mps_periodic(void *arg) 2110 { 2111 struct mps_softc *sc; 2112 uint32_t db; 2113 2114 sc = (struct mps_softc *)arg; 2115 if (sc->mps_flags & MPS_FLAGS_SHUTDOWN) 2116 return; 2117 2118 db = mps_regread(sc, MPI2_DOORBELL_OFFSET); 2119 if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 2120 mps_dprint(sc, MPS_FAULT, "IOC Fault 0x%08x, Resetting\n", db); 2121 mps_reinit(sc); 2122 } 2123 2124 callout_reset(&sc->periodic, MPS_PERIODIC_DELAY * hz, mps_periodic, sc); 2125 } 2126 2127 static void 2128 mps_log_evt_handler(struct mps_softc *sc, uintptr_t data, 2129 MPI2_EVENT_NOTIFICATION_REPLY *event) 2130 { 2131 MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry; 2132 2133 MPS_DPRINT_EVENT(sc, generic, event); 2134 2135 switch (event->Event) { 2136 case MPI2_EVENT_LOG_DATA: 2137 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_DATA:\n"); 2138 if (sc->mps_debug & MPS_EVENT) 2139 hexdump(event->EventData, event->EventDataLength, NULL, 0); 2140 break; 2141 case MPI2_EVENT_LOG_ENTRY_ADDED: 2142 entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData; 2143 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_ENTRY_ADDED event " 2144 "0x%x Sequence %d:\n", entry->LogEntryQualifier, 2145 entry->LogSequence); 2146 break; 2147 default: 2148 break; 2149 } 2150 return; 2151 } 2152 2153 static int 2154 mps_attach_log(struct mps_softc *sc) 2155 { 2156 u32 events[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 2157 2158 bzero(events, 16); 2159 setbit(events, MPI2_EVENT_LOG_DATA); 2160 setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED); 2161 2162 mps_register_events(sc, events, mps_log_evt_handler, NULL, 2163 &sc->mps_log_eh); 2164 2165 return (0); 2166 } 2167 2168 static int 2169 mps_detach_log(struct mps_softc *sc) 2170 { 2171 2172 if (sc->mps_log_eh != NULL) 2173 mps_deregister_events(sc, sc->mps_log_eh); 2174 return (0); 2175 } 2176 2177 /* 2178 * Free all of the driver resources and detach submodules. Should be called 2179 * without the lock held. 2180 */ 2181 int 2182 mps_free(struct mps_softc *sc) 2183 { 2184 int error; 2185 2186 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 2187 /* Turn off the watchdog */ 2188 mps_lock(sc); 2189 sc->mps_flags |= MPS_FLAGS_SHUTDOWN; 2190 mps_unlock(sc); 2191 /* Lock must not be held for this */ 2192 callout_drain(&sc->periodic); 2193 callout_drain(&sc->device_check_callout); 2194 2195 if (((error = mps_detach_log(sc)) != 0) || 2196 ((error = mps_detach_sas(sc)) != 0)) { 2197 mps_dprint(sc, MPS_INIT|MPS_FAULT, "failed to detach " 2198 "subsystems, exit\n"); 2199 return (error); 2200 } 2201 2202 mps_detach_user(sc); 2203 2204 /* Put the IOC back in the READY state. */ 2205 mps_lock(sc); 2206 if ((error = mps_transition_ready(sc)) != 0) { 2207 mps_unlock(sc); 2208 return (error); 2209 } 2210 mps_unlock(sc); 2211 2212 if (sc->facts != NULL) 2213 free(sc->facts, M_MPT2); 2214 2215 /* 2216 * Free all buffers that are based on IOC Facts. A Diag Reset may need 2217 * to free these buffers too. 2218 */ 2219 mps_iocfacts_free(sc); 2220 2221 if (sc->sysctl_tree != NULL) 2222 sysctl_ctx_free(&sc->sysctl_ctx); 2223 2224 /* Deregister the shutdown function */ 2225 if (sc->shutdown_eh != NULL) 2226 EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh); 2227 2228 mtx_destroy(&sc->mps_mtx); 2229 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 2230 2231 return (0); 2232 } 2233 2234 static __inline void 2235 mps_complete_command(struct mps_softc *sc, struct mps_command *cm) 2236 { 2237 MPS_FUNCTRACE(sc); 2238 2239 if (cm == NULL) { 2240 mps_dprint(sc, MPS_ERROR, "Completing NULL command\n"); 2241 return; 2242 } 2243 2244 if (cm->cm_flags & MPS_CM_FLAGS_POLLED) 2245 cm->cm_flags |= MPS_CM_FLAGS_COMPLETE; 2246 2247 if (cm->cm_complete != NULL) { 2248 mps_dprint(sc, MPS_TRACE, 2249 "%s cm %p calling cm_complete %p data %p reply %p\n", 2250 __func__, cm, cm->cm_complete, cm->cm_complete_data, 2251 cm->cm_reply); 2252 cm->cm_complete(sc, cm); 2253 } 2254 2255 if (cm->cm_flags & MPS_CM_FLAGS_WAKEUP) { 2256 mps_dprint(sc, MPS_TRACE, "waking up %p\n", cm); 2257 wakeup(cm); 2258 } 2259 2260 if (cm->cm_sc->io_cmds_active != 0) { 2261 cm->cm_sc->io_cmds_active--; 2262 } else { 2263 mps_dprint(sc, MPS_ERROR, "Warning: io_cmds_active is " 2264 "out of sync - resynching to 0\n"); 2265 } 2266 } 2267 2268 static void 2269 mps_sas_log_info(struct mps_softc *sc , u32 log_info) 2270 { 2271 union loginfo_type { 2272 u32 loginfo; 2273 struct { 2274 u32 subcode:16; 2275 u32 code:8; 2276 u32 originator:4; 2277 u32 bus_type:4; 2278 } dw; 2279 }; 2280 union loginfo_type sas_loginfo; 2281 char *originator_str = NULL; 2282 2283 sas_loginfo.loginfo = log_info; 2284 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 2285 return; 2286 2287 /* each nexus loss loginfo */ 2288 if (log_info == 0x31170000) 2289 return; 2290 2291 /* eat the loginfos associated with task aborts */ 2292 if ((log_info == 30050000 || log_info == 2293 0x31140000 || log_info == 0x31130000)) 2294 return; 2295 2296 switch (sas_loginfo.dw.originator) { 2297 case 0: 2298 originator_str = "IOP"; 2299 break; 2300 case 1: 2301 originator_str = "PL"; 2302 break; 2303 case 2: 2304 originator_str = "IR"; 2305 break; 2306 } 2307 2308 mps_dprint(sc, MPS_LOG, "log_info(0x%08x): originator(%s), " 2309 "code(0x%02x), sub_code(0x%04x)\n", log_info, 2310 originator_str, sas_loginfo.dw.code, 2311 sas_loginfo.dw.subcode); 2312 } 2313 2314 static void 2315 mps_display_reply_info(struct mps_softc *sc, uint8_t *reply) 2316 { 2317 MPI2DefaultReply_t *mpi_reply; 2318 u16 sc_status; 2319 2320 mpi_reply = (MPI2DefaultReply_t*)reply; 2321 sc_status = le16toh(mpi_reply->IOCStatus); 2322 if (sc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 2323 mps_sas_log_info(sc, le32toh(mpi_reply->IOCLogInfo)); 2324 } 2325 void 2326 mps_intr(void *data) 2327 { 2328 struct mps_softc *sc; 2329 uint32_t status; 2330 2331 sc = (struct mps_softc *)data; 2332 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2333 2334 /* 2335 * Check interrupt status register to flush the bus. This is 2336 * needed for both INTx interrupts and driver-driven polling 2337 */ 2338 status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 2339 if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0) 2340 return; 2341 2342 mps_lock(sc); 2343 mps_intr_locked(data); 2344 mps_unlock(sc); 2345 return; 2346 } 2347 2348 /* 2349 * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the 2350 * chip. Hopefully this theory is correct. 2351 */ 2352 void 2353 mps_intr_msi(void *data) 2354 { 2355 struct mps_softc *sc; 2356 2357 sc = (struct mps_softc *)data; 2358 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2359 mps_lock(sc); 2360 mps_intr_locked(data); 2361 mps_unlock(sc); 2362 return; 2363 } 2364 2365 /* 2366 * The locking is overly broad and simplistic, but easy to deal with for now. 2367 */ 2368 void 2369 mps_intr_locked(void *data) 2370 { 2371 MPI2_REPLY_DESCRIPTORS_UNION *desc; 2372 MPI2_DIAG_RELEASE_REPLY *rel_rep; 2373 mps_fw_diagnostic_buffer_t *pBuffer; 2374 struct mps_softc *sc; 2375 struct mps_command *cm = NULL; 2376 uint64_t tdesc; 2377 uint8_t flags; 2378 u_int pq; 2379 2380 sc = (struct mps_softc *)data; 2381 2382 pq = sc->replypostindex; 2383 mps_dprint(sc, MPS_TRACE, 2384 "%s sc %p starting with replypostindex %u\n", 2385 __func__, sc, sc->replypostindex); 2386 2387 for ( ;; ) { 2388 cm = NULL; 2389 desc = &sc->post_queue[sc->replypostindex]; 2390 2391 /* 2392 * Copy and clear out the descriptor so that any reentry will 2393 * immediately know that this descriptor has already been 2394 * looked at. There is unfortunate casting magic because the 2395 * MPI API doesn't have a cardinal 64bit type. 2396 */ 2397 tdesc = 0xffffffffffffffff; 2398 tdesc = atomic_swap_64((uint64_t *)desc, tdesc); 2399 desc = (MPI2_REPLY_DESCRIPTORS_UNION *)&tdesc; 2400 2401 flags = desc->Default.ReplyFlags & 2402 MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 2403 if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 2404 || (le32toh(desc->Words.High) == 0xffffffff)) 2405 break; 2406 2407 /* increment the replypostindex now, so that event handlers 2408 * and cm completion handlers which decide to do a diag 2409 * reset can zero it without it getting incremented again 2410 * afterwards, and we break out of this loop on the next 2411 * iteration since the reply post queue has been cleared to 2412 * 0xFF and all descriptors look unused (which they are). 2413 */ 2414 if (++sc->replypostindex >= sc->pqdepth) 2415 sc->replypostindex = 0; 2416 2417 switch (flags) { 2418 case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS: 2419 cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)]; 2420 KASSERT(cm->cm_state == MPS_CM_STATE_INQUEUE, 2421 ("command not inqueue\n")); 2422 cm->cm_state = MPS_CM_STATE_BUSY; 2423 cm->cm_reply = NULL; 2424 break; 2425 case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY: 2426 { 2427 uint32_t baddr; 2428 uint8_t *reply; 2429 2430 /* 2431 * Re-compose the reply address from the address 2432 * sent back from the chip. The ReplyFrameAddress 2433 * is the lower 32 bits of the physical address of 2434 * particular reply frame. Convert that address to 2435 * host format, and then use that to provide the 2436 * offset against the virtual address base 2437 * (sc->reply_frames). 2438 */ 2439 baddr = le32toh(desc->AddressReply.ReplyFrameAddress); 2440 reply = sc->reply_frames + 2441 (baddr - ((uint32_t)sc->reply_busaddr)); 2442 /* 2443 * Make sure the reply we got back is in a valid 2444 * range. If not, go ahead and panic here, since 2445 * we'll probably panic as soon as we deference the 2446 * reply pointer anyway. 2447 */ 2448 if ((reply < sc->reply_frames) 2449 || (reply > (sc->reply_frames + 2450 (sc->fqdepth * sc->replyframesz)))) { 2451 printf("%s: WARNING: reply %p out of range!\n", 2452 __func__, reply); 2453 printf("%s: reply_frames %p, fqdepth %d, " 2454 "frame size %d\n", __func__, 2455 sc->reply_frames, sc->fqdepth, 2456 sc->replyframesz); 2457 printf("%s: baddr %#x,\n", __func__, baddr); 2458 /* LSI-TODO. See Linux Code for Graceful exit */ 2459 panic("Reply address out of range"); 2460 } 2461 if (le16toh(desc->AddressReply.SMID) == 0) { 2462 if (((MPI2_DEFAULT_REPLY *)reply)->Function == 2463 MPI2_FUNCTION_DIAG_BUFFER_POST) { 2464 /* 2465 * If SMID is 0 for Diag Buffer Post, 2466 * this implies that the reply is due to 2467 * a release function with a status that 2468 * the buffer has been released. Set 2469 * the buffer flags accordingly. 2470 */ 2471 rel_rep = 2472 (MPI2_DIAG_RELEASE_REPLY *)reply; 2473 if ((le16toh(rel_rep->IOCStatus) & 2474 MPI2_IOCSTATUS_MASK) == 2475 MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED) 2476 { 2477 pBuffer = 2478 &sc->fw_diag_buffer_list[ 2479 rel_rep->BufferType]; 2480 pBuffer->valid_data = TRUE; 2481 pBuffer->owned_by_firmware = 2482 FALSE; 2483 pBuffer->immediate = FALSE; 2484 } 2485 } else 2486 mps_dispatch_event(sc, baddr, 2487 (MPI2_EVENT_NOTIFICATION_REPLY *) 2488 reply); 2489 } else { 2490 /* 2491 * Ignore commands not in INQUEUE state 2492 * since they've already been completed 2493 * via another path. 2494 */ 2495 cm = &sc->commands[ 2496 le16toh(desc->AddressReply.SMID)]; 2497 if (cm->cm_state == MPS_CM_STATE_INQUEUE) { 2498 cm->cm_state = MPS_CM_STATE_BUSY; 2499 cm->cm_reply = reply; 2500 cm->cm_reply_data = le32toh( 2501 desc->AddressReply.ReplyFrameAddress); 2502 } else { 2503 mps_dprint(sc, MPS_RECOVERY, 2504 "Bad state for ADDRESS_REPLY status," 2505 " ignoring state %d cm %p\n", 2506 cm->cm_state, cm); 2507 } 2508 } 2509 break; 2510 } 2511 case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS: 2512 case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER: 2513 case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS: 2514 default: 2515 /* Unhandled */ 2516 mps_dprint(sc, MPS_ERROR, "Unhandled reply 0x%x\n", 2517 desc->Default.ReplyFlags); 2518 cm = NULL; 2519 break; 2520 } 2521 2522 2523 if (cm != NULL) { 2524 // Print Error reply frame 2525 if (cm->cm_reply) 2526 mps_display_reply_info(sc,cm->cm_reply); 2527 mps_complete_command(sc, cm); 2528 } 2529 } 2530 2531 if (pq != sc->replypostindex) { 2532 mps_dprint(sc, MPS_TRACE, "%s sc %p writing postindex %d\n", 2533 __func__, sc, sc->replypostindex); 2534 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 2535 sc->replypostindex); 2536 } 2537 2538 return; 2539 } 2540 2541 static void 2542 mps_dispatch_event(struct mps_softc *sc, uintptr_t data, 2543 MPI2_EVENT_NOTIFICATION_REPLY *reply) 2544 { 2545 struct mps_event_handle *eh; 2546 int event, handled = 0; 2547 2548 event = le16toh(reply->Event); 2549 TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2550 if (isset(eh->mask, event)) { 2551 eh->callback(sc, data, reply); 2552 handled++; 2553 } 2554 } 2555 2556 if (handled == 0) 2557 mps_dprint(sc, MPS_EVENT, "Unhandled event 0x%x\n", le16toh(event)); 2558 2559 /* 2560 * This is the only place that the event/reply should be freed. 2561 * Anything wanting to hold onto the event data should have 2562 * already copied it into their own storage. 2563 */ 2564 mps_free_reply(sc, data); 2565 } 2566 2567 static void 2568 mps_reregister_events_complete(struct mps_softc *sc, struct mps_command *cm) 2569 { 2570 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2571 2572 if (cm->cm_reply) 2573 MPS_DPRINT_EVENT(sc, generic, 2574 (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply); 2575 2576 mps_free_command(sc, cm); 2577 2578 /* next, send a port enable */ 2579 mpssas_startup(sc); 2580 } 2581 2582 /* 2583 * For both register_events and update_events, the caller supplies a bitmap 2584 * of events that it _wants_. These functions then turn that into a bitmask 2585 * suitable for the controller. 2586 */ 2587 int 2588 mps_register_events(struct mps_softc *sc, u32 *mask, 2589 mps_evt_callback_t *cb, void *data, struct mps_event_handle **handle) 2590 { 2591 struct mps_event_handle *eh; 2592 int error = 0; 2593 2594 eh = malloc(sizeof(struct mps_event_handle), M_MPT2, M_WAITOK|M_ZERO); 2595 eh->callback = cb; 2596 eh->data = data; 2597 TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list); 2598 if (mask != NULL) 2599 error = mps_update_events(sc, eh, mask); 2600 *handle = eh; 2601 2602 return (error); 2603 } 2604 2605 int 2606 mps_update_events(struct mps_softc *sc, struct mps_event_handle *handle, 2607 u32 *mask) 2608 { 2609 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2610 MPI2_EVENT_NOTIFICATION_REPLY *reply = NULL; 2611 struct mps_command *cm; 2612 int error, i; 2613 2614 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2615 2616 if ((mask != NULL) && (handle != NULL)) 2617 bcopy(mask, &handle->mask[0], sizeof(u32) * 2618 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2619 2620 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2621 sc->event_mask[i] = -1; 2622 2623 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2624 sc->event_mask[i] &= ~handle->mask[i]; 2625 2626 if ((cm = mps_alloc_command(sc)) == NULL) 2627 return (EBUSY); 2628 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2629 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2630 evtreq->MsgFlags = 0; 2631 evtreq->SASBroadcastPrimitiveMasks = 0; 2632 #ifdef MPS_DEBUG_ALL_EVENTS 2633 { 2634 u_char fullmask[16]; 2635 memset(fullmask, 0x00, 16); 2636 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) * 2637 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2638 } 2639 #else 2640 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2641 evtreq->EventMasks[i] = 2642 htole32(sc->event_mask[i]); 2643 #endif 2644 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2645 cm->cm_data = NULL; 2646 2647 error = mps_wait_command(sc, &cm, 60, 0); 2648 if (cm != NULL) 2649 reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply; 2650 if ((reply == NULL) || 2651 (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 2652 error = ENXIO; 2653 2654 if (reply) 2655 MPS_DPRINT_EVENT(sc, generic, reply); 2656 2657 mps_dprint(sc, MPS_TRACE, "%s finished error %d\n", __func__, error); 2658 2659 if (cm != NULL) 2660 mps_free_command(sc, cm); 2661 return (error); 2662 } 2663 2664 static int 2665 mps_reregister_events(struct mps_softc *sc) 2666 { 2667 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2668 struct mps_command *cm; 2669 struct mps_event_handle *eh; 2670 int error, i; 2671 2672 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2673 2674 /* first, reregister events */ 2675 2676 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2677 sc->event_mask[i] = -1; 2678 2679 TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2680 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2681 sc->event_mask[i] &= ~eh->mask[i]; 2682 } 2683 2684 if ((cm = mps_alloc_command(sc)) == NULL) 2685 return (EBUSY); 2686 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2687 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2688 evtreq->MsgFlags = 0; 2689 evtreq->SASBroadcastPrimitiveMasks = 0; 2690 #ifdef MPS_DEBUG_ALL_EVENTS 2691 { 2692 u_char fullmask[16]; 2693 memset(fullmask, 0x00, 16); 2694 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) * 2695 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2696 } 2697 #else 2698 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2699 evtreq->EventMasks[i] = 2700 htole32(sc->event_mask[i]); 2701 #endif 2702 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2703 cm->cm_data = NULL; 2704 cm->cm_complete = mps_reregister_events_complete; 2705 2706 error = mps_map_command(sc, cm); 2707 2708 mps_dprint(sc, MPS_TRACE, "%s finished with error %d\n", __func__, 2709 error); 2710 return (error); 2711 } 2712 2713 void 2714 mps_deregister_events(struct mps_softc *sc, struct mps_event_handle *handle) 2715 { 2716 2717 TAILQ_REMOVE(&sc->event_list, handle, eh_list); 2718 free(handle, M_MPT2); 2719 } 2720 2721 /* 2722 * Add a chain element as the next SGE for the specified command. 2723 * Reset cm_sge and cm_sgesize to indicate all the available space. 2724 */ 2725 static int 2726 mps_add_chain(struct mps_command *cm) 2727 { 2728 MPI2_SGE_CHAIN32 *sgc; 2729 struct mps_chain *chain; 2730 u_int space; 2731 2732 if (cm->cm_sglsize < MPS_SGC_SIZE) 2733 panic("MPS: Need SGE Error Code\n"); 2734 2735 chain = mps_alloc_chain(cm->cm_sc); 2736 if (chain == NULL) 2737 return (ENOBUFS); 2738 2739 space = cm->cm_sc->reqframesz; 2740 2741 /* 2742 * Note: a double-linked list is used to make it easier to 2743 * walk for debugging. 2744 */ 2745 TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link); 2746 2747 sgc = (MPI2_SGE_CHAIN32 *)&cm->cm_sge->MpiChain; 2748 sgc->Length = htole16(space); 2749 sgc->NextChainOffset = 0; 2750 /* TODO Looks like bug in Setting sgc->Flags. 2751 * sgc->Flags = ( MPI2_SGE_FLAGS_CHAIN_ELEMENT | MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 2752 * MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT 2753 * This is fine.. because we are not using simple element. In case of 2754 * MPI2_SGE_CHAIN32, we have separate Length and Flags feild. 2755 */ 2756 sgc->Flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT; 2757 sgc->Address = htole32(chain->chain_busaddr); 2758 2759 cm->cm_sge = (MPI2_SGE_IO_UNION *)&chain->chain->MpiSimple; 2760 cm->cm_sglsize = space; 2761 return (0); 2762 } 2763 2764 /* 2765 * Add one scatter-gather element (chain, simple, transaction context) 2766 * to the scatter-gather list for a command. Maintain cm_sglsize and 2767 * cm_sge as the remaining size and pointer to the next SGE to fill 2768 * in, respectively. 2769 */ 2770 int 2771 mps_push_sge(struct mps_command *cm, void *sgep, size_t len, int segsleft) 2772 { 2773 MPI2_SGE_TRANSACTION_UNION *tc = sgep; 2774 MPI2_SGE_SIMPLE64 *sge = sgep; 2775 int error, type; 2776 uint32_t saved_buf_len, saved_address_low, saved_address_high; 2777 2778 type = (tc->Flags & MPI2_SGE_FLAGS_ELEMENT_MASK); 2779 2780 #ifdef INVARIANTS 2781 switch (type) { 2782 case MPI2_SGE_FLAGS_TRANSACTION_ELEMENT: { 2783 if (len != tc->DetailsLength + 4) 2784 panic("TC %p length %u or %zu?", tc, 2785 tc->DetailsLength + 4, len); 2786 } 2787 break; 2788 case MPI2_SGE_FLAGS_CHAIN_ELEMENT: 2789 /* Driver only uses 32-bit chain elements */ 2790 if (len != MPS_SGC_SIZE) 2791 panic("CHAIN %p length %u or %zu?", sgep, 2792 MPS_SGC_SIZE, len); 2793 break; 2794 case MPI2_SGE_FLAGS_SIMPLE_ELEMENT: 2795 /* Driver only uses 64-bit SGE simple elements */ 2796 if (len != MPS_SGE64_SIZE) 2797 panic("SGE simple %p length %u or %zu?", sge, 2798 MPS_SGE64_SIZE, len); 2799 if (((le32toh(sge->FlagsLength) >> MPI2_SGE_FLAGS_SHIFT) & 2800 MPI2_SGE_FLAGS_ADDRESS_SIZE) == 0) 2801 panic("SGE simple %p not marked 64-bit?", sge); 2802 2803 break; 2804 default: 2805 panic("Unexpected SGE %p, flags %02x", tc, tc->Flags); 2806 } 2807 #endif 2808 2809 /* 2810 * case 1: 1 more segment, enough room for it 2811 * case 2: 2 more segments, enough room for both 2812 * case 3: >=2 more segments, only enough room for 1 and a chain 2813 * case 4: >=1 more segment, enough room for only a chain 2814 * case 5: >=1 more segment, no room for anything (error) 2815 */ 2816 2817 /* 2818 * There should be room for at least a chain element, or this 2819 * code is buggy. Case (5). 2820 */ 2821 if (cm->cm_sglsize < MPS_SGC_SIZE) 2822 panic("MPS: Need SGE Error Code\n"); 2823 2824 if (segsleft >= 1 && cm->cm_sglsize < len + MPS_SGC_SIZE) { 2825 /* 2826 * 1 or more segment, enough room for only a chain. 2827 * Hope the previous element wasn't a Simple entry 2828 * that needed to be marked with 2829 * MPI2_SGE_FLAGS_LAST_ELEMENT. Case (4). 2830 */ 2831 if ((error = mps_add_chain(cm)) != 0) 2832 return (error); 2833 } 2834 2835 if (segsleft >= 2 && 2836 cm->cm_sglsize < len + MPS_SGC_SIZE + MPS_SGE64_SIZE) { 2837 /* 2838 * There are 2 or more segments left to add, and only 2839 * enough room for 1 and a chain. Case (3). 2840 * 2841 * Mark as last element in this chain if necessary. 2842 */ 2843 if (type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { 2844 sge->FlagsLength |= htole32( 2845 MPI2_SGE_FLAGS_LAST_ELEMENT << MPI2_SGE_FLAGS_SHIFT); 2846 } 2847 2848 /* 2849 * Add the item then a chain. Do the chain now, 2850 * rather than on the next iteration, to simplify 2851 * understanding the code. 2852 */ 2853 cm->cm_sglsize -= len; 2854 bcopy(sgep, cm->cm_sge, len); 2855 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2856 return (mps_add_chain(cm)); 2857 } 2858 2859 #ifdef INVARIANTS 2860 /* Case 1: 1 more segment, enough room for it. */ 2861 if (segsleft == 1 && cm->cm_sglsize < len) 2862 panic("1 seg left and no room? %u versus %zu", 2863 cm->cm_sglsize, len); 2864 2865 /* Case 2: 2 more segments, enough room for both */ 2866 if (segsleft == 2 && cm->cm_sglsize < len + MPS_SGE64_SIZE) 2867 panic("2 segs left and no room? %u versus %zu", 2868 cm->cm_sglsize, len); 2869 #endif 2870 2871 if (segsleft == 1 && type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { 2872 /* 2873 * If this is a bi-directional request, need to account for that 2874 * here. Save the pre-filled sge values. These will be used 2875 * either for the 2nd SGL or for a single direction SGL. If 2876 * cm_out_len is non-zero, this is a bi-directional request, so 2877 * fill in the OUT SGL first, then the IN SGL, otherwise just 2878 * fill in the IN SGL. Note that at this time, when filling in 2879 * 2 SGL's for a bi-directional request, they both use the same 2880 * DMA buffer (same cm command). 2881 */ 2882 saved_buf_len = le32toh(sge->FlagsLength) & 0x00FFFFFF; 2883 saved_address_low = sge->Address.Low; 2884 saved_address_high = sge->Address.High; 2885 if (cm->cm_out_len) { 2886 sge->FlagsLength = htole32(cm->cm_out_len | 2887 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2888 MPI2_SGE_FLAGS_END_OF_BUFFER | 2889 MPI2_SGE_FLAGS_HOST_TO_IOC | 2890 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2891 MPI2_SGE_FLAGS_SHIFT)); 2892 cm->cm_sglsize -= len; 2893 bcopy(sgep, cm->cm_sge, len); 2894 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge 2895 + len); 2896 } 2897 saved_buf_len |= 2898 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2899 MPI2_SGE_FLAGS_END_OF_BUFFER | 2900 MPI2_SGE_FLAGS_LAST_ELEMENT | 2901 MPI2_SGE_FLAGS_END_OF_LIST | 2902 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2903 MPI2_SGE_FLAGS_SHIFT); 2904 if (cm->cm_flags & MPS_CM_FLAGS_DATAIN) { 2905 saved_buf_len |= 2906 ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) << 2907 MPI2_SGE_FLAGS_SHIFT); 2908 } else { 2909 saved_buf_len |= 2910 ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) << 2911 MPI2_SGE_FLAGS_SHIFT); 2912 } 2913 sge->FlagsLength = htole32(saved_buf_len); 2914 sge->Address.Low = saved_address_low; 2915 sge->Address.High = saved_address_high; 2916 } 2917 2918 cm->cm_sglsize -= len; 2919 bcopy(sgep, cm->cm_sge, len); 2920 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2921 return (0); 2922 } 2923 2924 /* 2925 * Add one dma segment to the scatter-gather list for a command. 2926 */ 2927 int 2928 mps_add_dmaseg(struct mps_command *cm, vm_paddr_t pa, size_t len, u_int flags, 2929 int segsleft) 2930 { 2931 MPI2_SGE_SIMPLE64 sge; 2932 2933 /* 2934 * This driver always uses 64-bit address elements for simplicity. 2935 */ 2936 bzero(&sge, sizeof(sge)); 2937 flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2938 MPI2_SGE_FLAGS_64_BIT_ADDRESSING; 2939 sge.FlagsLength = htole32(len | (flags << MPI2_SGE_FLAGS_SHIFT)); 2940 mps_from_u64(pa, &sge.Address); 2941 2942 return (mps_push_sge(cm, &sge, sizeof sge, segsleft)); 2943 } 2944 2945 static void 2946 mps_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 2947 { 2948 struct mps_softc *sc; 2949 struct mps_command *cm; 2950 u_int i, dir, sflags; 2951 2952 cm = (struct mps_command *)arg; 2953 sc = cm->cm_sc; 2954 2955 /* 2956 * In this case, just print out a warning and let the chip tell the 2957 * user they did the wrong thing. 2958 */ 2959 if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) { 2960 mps_dprint(sc, MPS_ERROR, 2961 "%s: warning: busdma returned %d segments, " 2962 "more than the %d allowed\n", __func__, nsegs, 2963 cm->cm_max_segs); 2964 } 2965 2966 /* 2967 * Set up DMA direction flags. Bi-directional requests are also handled 2968 * here. In that case, both direction flags will be set. 2969 */ 2970 sflags = 0; 2971 if (cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) { 2972 /* 2973 * We have to add a special case for SMP passthrough, there 2974 * is no easy way to generically handle it. The first 2975 * S/G element is used for the command (therefore the 2976 * direction bit needs to be set). The second one is used 2977 * for the reply. We'll leave it to the caller to make 2978 * sure we only have two buffers. 2979 */ 2980 /* 2981 * Even though the busdma man page says it doesn't make 2982 * sense to have both direction flags, it does in this case. 2983 * We have one s/g element being accessed in each direction. 2984 */ 2985 dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD; 2986 2987 /* 2988 * Set the direction flag on the first buffer in the SMP 2989 * passthrough request. We'll clear it for the second one. 2990 */ 2991 sflags |= MPI2_SGE_FLAGS_DIRECTION | 2992 MPI2_SGE_FLAGS_END_OF_BUFFER; 2993 } else if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) { 2994 sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC; 2995 dir = BUS_DMASYNC_PREWRITE; 2996 } else 2997 dir = BUS_DMASYNC_PREREAD; 2998 2999 for (i = 0; i < nsegs; i++) { 3000 if ((cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) && (i != 0)) { 3001 sflags &= ~MPI2_SGE_FLAGS_DIRECTION; 3002 } 3003 error = mps_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len, 3004 sflags, nsegs - i); 3005 if (error != 0) { 3006 /* Resource shortage, roll back! */ 3007 if (ratecheck(&sc->lastfail, &mps_chainfail_interval)) 3008 mps_dprint(sc, MPS_INFO, "Out of chain frames, " 3009 "consider increasing hw.mps.max_chains.\n"); 3010 cm->cm_flags |= MPS_CM_FLAGS_CHAIN_FAILED; 3011 mps_complete_command(sc, cm); 3012 return; 3013 } 3014 } 3015 3016 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir); 3017 mps_enqueue_request(sc, cm); 3018 3019 return; 3020 } 3021 3022 static void 3023 mps_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize, 3024 int error) 3025 { 3026 mps_data_cb(arg, segs, nsegs, error); 3027 } 3028 3029 /* 3030 * This is the routine to enqueue commands ansynchronously. 3031 * Note that the only error path here is from bus_dmamap_load(), which can 3032 * return EINPROGRESS if it is waiting for resources. Other than this, it's 3033 * assumed that if you have a command in-hand, then you have enough credits 3034 * to use it. 3035 */ 3036 int 3037 mps_map_command(struct mps_softc *sc, struct mps_command *cm) 3038 { 3039 int error = 0; 3040 3041 if (cm->cm_flags & MPS_CM_FLAGS_USE_UIO) { 3042 error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap, 3043 &cm->cm_uio, mps_data_cb2, cm, 0); 3044 } else if (cm->cm_flags & MPS_CM_FLAGS_USE_CCB) { 3045 error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap, 3046 cm->cm_data, mps_data_cb, cm, 0); 3047 } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) { 3048 error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap, 3049 cm->cm_data, cm->cm_length, mps_data_cb, cm, 0); 3050 } else { 3051 /* Add a zero-length element as needed */ 3052 if (cm->cm_sge != NULL) 3053 mps_add_dmaseg(cm, 0, 0, 0, 1); 3054 mps_enqueue_request(sc, cm); 3055 } 3056 3057 return (error); 3058 } 3059 3060 /* 3061 * This is the routine to enqueue commands synchronously. An error of 3062 * EINPROGRESS from mps_map_command() is ignored since the command will 3063 * be executed and enqueued automatically. Other errors come from msleep(). 3064 */ 3065 int 3066 mps_wait_command(struct mps_softc *sc, struct mps_command **cmp, int timeout, 3067 int sleep_flag) 3068 { 3069 int error, rc; 3070 struct timeval cur_time, start_time; 3071 struct mps_command *cm = *cmp; 3072 3073 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) 3074 return EBUSY; 3075 3076 cm->cm_complete = NULL; 3077 cm->cm_flags |= MPS_CM_FLAGS_POLLED; 3078 error = mps_map_command(sc, cm); 3079 if ((error != 0) && (error != EINPROGRESS)) 3080 return (error); 3081 3082 /* 3083 * Check for context and wait for 50 mSec at a time until time has 3084 * expired or the command has finished. If msleep can't be used, need 3085 * to poll. 3086 */ 3087 if (curthread->td_no_sleeping != 0) 3088 sleep_flag = NO_SLEEP; 3089 getmicrouptime(&start_time); 3090 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) { 3091 cm->cm_flags |= MPS_CM_FLAGS_WAKEUP; 3092 error = msleep(cm, &sc->mps_mtx, 0, "mpswait", timeout*hz); 3093 if (error == EWOULDBLOCK) { 3094 /* 3095 * Record the actual elapsed time in the case of a 3096 * timeout for the message below. 3097 */ 3098 getmicrouptime(&cur_time); 3099 timevalsub(&cur_time, &start_time); 3100 } 3101 } else { 3102 while ((cm->cm_flags & MPS_CM_FLAGS_COMPLETE) == 0) { 3103 mps_intr_locked(sc); 3104 if (sleep_flag == CAN_SLEEP) 3105 pause("mpswait", hz/20); 3106 else 3107 DELAY(50000); 3108 3109 getmicrouptime(&cur_time); 3110 timevalsub(&cur_time, &start_time); 3111 if (cur_time.tv_sec > timeout) { 3112 error = EWOULDBLOCK; 3113 break; 3114 } 3115 } 3116 } 3117 3118 if (error == EWOULDBLOCK) { 3119 if (cm->cm_timeout_handler == NULL) { 3120 mps_dprint(sc, MPS_FAULT, "Calling Reinit from %s, timeout=%d," 3121 " elapsed=%jd\n", __func__, timeout, 3122 (intmax_t)cur_time.tv_sec); 3123 rc = mps_reinit(sc); 3124 mps_dprint(sc, MPS_FAULT, "Reinit %s\n", (rc == 0) ? "success" : 3125 "failed"); 3126 } else 3127 cm->cm_timeout_handler(sc, cm); 3128 if (sc->mps_flags & MPS_FLAGS_REALLOCATED) { 3129 /* 3130 * Tell the caller that we freed the command in a 3131 * reinit. 3132 */ 3133 *cmp = NULL; 3134 } 3135 error = ETIMEDOUT; 3136 } 3137 return (error); 3138 } 3139 3140 /* 3141 * The MPT driver had a verbose interface for config pages. In this driver, 3142 * reduce it to much simpler terms, similar to the Linux driver. 3143 */ 3144 int 3145 mps_read_config_page(struct mps_softc *sc, struct mps_config_params *params) 3146 { 3147 MPI2_CONFIG_REQUEST *req; 3148 struct mps_command *cm; 3149 int error; 3150 3151 if (sc->mps_flags & MPS_FLAGS_BUSY) { 3152 return (EBUSY); 3153 } 3154 3155 cm = mps_alloc_command(sc); 3156 if (cm == NULL) { 3157 return (EBUSY); 3158 } 3159 3160 req = (MPI2_CONFIG_REQUEST *)cm->cm_req; 3161 req->Function = MPI2_FUNCTION_CONFIG; 3162 req->Action = params->action; 3163 req->SGLFlags = 0; 3164 req->ChainOffset = 0; 3165 req->PageAddress = params->page_address; 3166 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 3167 MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr; 3168 3169 hdr = ¶ms->hdr.Ext; 3170 req->ExtPageType = hdr->ExtPageType; 3171 req->ExtPageLength = hdr->ExtPageLength; 3172 req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED; 3173 req->Header.PageLength = 0; /* Must be set to zero */ 3174 req->Header.PageNumber = hdr->PageNumber; 3175 req->Header.PageVersion = hdr->PageVersion; 3176 } else { 3177 MPI2_CONFIG_PAGE_HEADER *hdr; 3178 3179 hdr = ¶ms->hdr.Struct; 3180 req->Header.PageType = hdr->PageType; 3181 req->Header.PageNumber = hdr->PageNumber; 3182 req->Header.PageLength = hdr->PageLength; 3183 req->Header.PageVersion = hdr->PageVersion; 3184 } 3185 3186 cm->cm_data = params->buffer; 3187 cm->cm_length = params->length; 3188 if (cm->cm_data != NULL) { 3189 cm->cm_sge = &req->PageBufferSGE; 3190 cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION); 3191 cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_DATAIN; 3192 } else 3193 cm->cm_sge = NULL; 3194 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 3195 3196 cm->cm_complete_data = params; 3197 if (params->callback != NULL) { 3198 cm->cm_complete = mps_config_complete; 3199 return (mps_map_command(sc, cm)); 3200 } else { 3201 error = mps_wait_command(sc, &cm, 0, CAN_SLEEP); 3202 if (error) { 3203 mps_dprint(sc, MPS_FAULT, 3204 "Error %d reading config page\n", error); 3205 if (cm != NULL) 3206 mps_free_command(sc, cm); 3207 return (error); 3208 } 3209 mps_config_complete(sc, cm); 3210 } 3211 3212 return (0); 3213 } 3214 3215 int 3216 mps_write_config_page(struct mps_softc *sc, struct mps_config_params *params) 3217 { 3218 return (EINVAL); 3219 } 3220 3221 static void 3222 mps_config_complete(struct mps_softc *sc, struct mps_command *cm) 3223 { 3224 MPI2_CONFIG_REPLY *reply; 3225 struct mps_config_params *params; 3226 3227 MPS_FUNCTRACE(sc); 3228 params = cm->cm_complete_data; 3229 3230 if (cm->cm_data != NULL) { 3231 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, 3232 BUS_DMASYNC_POSTREAD); 3233 bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap); 3234 } 3235 3236 /* 3237 * XXX KDM need to do more error recovery? This results in the 3238 * device in question not getting probed. 3239 */ 3240 if ((cm->cm_flags & MPS_CM_FLAGS_ERROR_MASK) != 0) { 3241 params->status = MPI2_IOCSTATUS_BUSY; 3242 goto done; 3243 } 3244 3245 reply = (MPI2_CONFIG_REPLY *)cm->cm_reply; 3246 if (reply == NULL) { 3247 params->status = MPI2_IOCSTATUS_BUSY; 3248 goto done; 3249 } 3250 params->status = reply->IOCStatus; 3251 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 3252 params->hdr.Ext.ExtPageType = reply->ExtPageType; 3253 params->hdr.Ext.ExtPageLength = reply->ExtPageLength; 3254 params->hdr.Ext.PageType = reply->Header.PageType; 3255 params->hdr.Ext.PageNumber = reply->Header.PageNumber; 3256 params->hdr.Ext.PageVersion = reply->Header.PageVersion; 3257 } else { 3258 params->hdr.Struct.PageType = reply->Header.PageType; 3259 params->hdr.Struct.PageNumber = reply->Header.PageNumber; 3260 params->hdr.Struct.PageLength = reply->Header.PageLength; 3261 params->hdr.Struct.PageVersion = reply->Header.PageVersion; 3262 } 3263 3264 done: 3265 mps_free_command(sc, cm); 3266 if (params->callback != NULL) 3267 params->callback(sc, params); 3268 3269 return; 3270 } 3271