1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2009 Yahoo! Inc. 5 * Copyright (c) 2011-2015 LSI Corp. 6 * Copyright (c) 2013-2015 Avago Technologies 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 31 * 32 * $FreeBSD$ 33 */ 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD$"); 37 38 /* Communications core for Avago Technologies (LSI) MPT2 */ 39 40 /* TODO Move headers to mpsvar */ 41 #include <sys/types.h> 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/selinfo.h> 46 #include <sys/lock.h> 47 #include <sys/mutex.h> 48 #include <sys/module.h> 49 #include <sys/bus.h> 50 #include <sys/conf.h> 51 #include <sys/bio.h> 52 #include <sys/malloc.h> 53 #include <sys/uio.h> 54 #include <sys/sysctl.h> 55 #include <sys/smp.h> 56 #include <sys/queue.h> 57 #include <sys/kthread.h> 58 #include <sys/taskqueue.h> 59 #include <sys/endian.h> 60 #include <sys/eventhandler.h> 61 #include <sys/sbuf.h> 62 63 #include <machine/bus.h> 64 #include <machine/resource.h> 65 #include <sys/rman.h> 66 #include <sys/proc.h> 67 68 #include <dev/pci/pcivar.h> 69 70 #include <cam/cam.h> 71 #include <cam/scsi/scsi_all.h> 72 73 #include <dev/mps/mpi/mpi2_type.h> 74 #include <dev/mps/mpi/mpi2.h> 75 #include <dev/mps/mpi/mpi2_ioc.h> 76 #include <dev/mps/mpi/mpi2_sas.h> 77 #include <dev/mps/mpi/mpi2_cnfg.h> 78 #include <dev/mps/mpi/mpi2_init.h> 79 #include <dev/mps/mpi/mpi2_tool.h> 80 #include <dev/mps/mps_ioctl.h> 81 #include <dev/mps/mpsvar.h> 82 #include <dev/mps/mps_table.h> 83 84 static int mps_diag_reset(struct mps_softc *sc, int sleep_flag); 85 static int mps_init_queues(struct mps_softc *sc); 86 static void mps_resize_queues(struct mps_softc *sc); 87 static int mps_message_unit_reset(struct mps_softc *sc, int sleep_flag); 88 static int mps_transition_operational(struct mps_softc *sc); 89 static int mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching); 90 static void mps_iocfacts_free(struct mps_softc *sc); 91 static void mps_startup(void *arg); 92 static int mps_send_iocinit(struct mps_softc *sc); 93 static int mps_alloc_queues(struct mps_softc *sc); 94 static int mps_alloc_hw_queues(struct mps_softc *sc); 95 static int mps_alloc_replies(struct mps_softc *sc); 96 static int mps_alloc_requests(struct mps_softc *sc); 97 static int mps_attach_log(struct mps_softc *sc); 98 static __inline void mps_complete_command(struct mps_softc *sc, 99 struct mps_command *cm); 100 static void mps_dispatch_event(struct mps_softc *sc, uintptr_t data, 101 MPI2_EVENT_NOTIFICATION_REPLY *reply); 102 static void mps_config_complete(struct mps_softc *sc, struct mps_command *cm); 103 static void mps_periodic(void *); 104 static int mps_reregister_events(struct mps_softc *sc); 105 static void mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm); 106 static int mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts); 107 static int mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag); 108 static int mps_debug_sysctl(SYSCTL_HANDLER_ARGS); 109 static void mps_parse_debug(struct mps_softc *sc, char *list); 110 111 SYSCTL_NODE(_hw, OID_AUTO, mps, CTLFLAG_RD, 0, "MPS Driver Parameters"); 112 113 MALLOC_DEFINE(M_MPT2, "mps", "mpt2 driver memory"); 114 MALLOC_DECLARE(M_MPSUSER); 115 116 /* 117 * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of 118 * any state and back to its initialization state machine. 119 */ 120 static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d }; 121 122 /* Added this union to smoothly convert le64toh cm->cm_desc.Words. 123 * Compiler only support unint64_t to be passed as argument. 124 * Otherwise it will throw below error 125 * "aggregate value used where an integer was expected" 126 */ 127 128 typedef union _reply_descriptor { 129 u64 word; 130 struct { 131 u32 low; 132 u32 high; 133 } u; 134 }reply_descriptor,address_descriptor; 135 136 /* Rate limit chain-fail messages to 1 per minute */ 137 static struct timeval mps_chainfail_interval = { 60, 0 }; 138 139 /* 140 * sleep_flag can be either CAN_SLEEP or NO_SLEEP. 141 * If this function is called from process context, it can sleep 142 * and there is no harm to sleep, in case if this fuction is called 143 * from Interrupt handler, we can not sleep and need NO_SLEEP flag set. 144 * based on sleep flags driver will call either msleep, pause or DELAY. 145 * msleep and pause are of same variant, but pause is used when mps_mtx 146 * is not hold by driver. 147 * 148 */ 149 static int 150 mps_diag_reset(struct mps_softc *sc,int sleep_flag) 151 { 152 uint32_t reg; 153 int i, error, tries = 0; 154 uint8_t first_wait_done = FALSE; 155 156 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 157 158 /* Clear any pending interrupts */ 159 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 160 161 /* 162 * Force NO_SLEEP for threads prohibited to sleep 163 * e.a Thread from interrupt handler are prohibited to sleep. 164 */ 165 if (curthread->td_no_sleeping != 0) 166 sleep_flag = NO_SLEEP; 167 168 mps_dprint(sc, MPS_INIT, "sequence start, sleep_flag= %d\n", sleep_flag); 169 170 /* Push the magic sequence */ 171 error = ETIMEDOUT; 172 while (tries++ < 20) { 173 for (i = 0; i < sizeof(mpt2_reset_magic); i++) 174 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 175 mpt2_reset_magic[i]); 176 /* wait 100 msec */ 177 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 178 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 179 "mpsdiag", hz/10); 180 else if (sleep_flag == CAN_SLEEP) 181 pause("mpsdiag", hz/10); 182 else 183 DELAY(100 * 1000); 184 185 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 186 if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) { 187 error = 0; 188 break; 189 } 190 } 191 if (error) { 192 mps_dprint(sc, MPS_INIT, "sequence failed, error=%d, exit\n", 193 error); 194 return (error); 195 } 196 197 /* Send the actual reset. XXX need to refresh the reg? */ 198 reg |= MPI2_DIAG_RESET_ADAPTER; 199 mps_dprint(sc, MPS_INIT, "sequence success, sending reset, reg= 0x%x\n", 200 reg); 201 mps_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET, reg); 202 203 /* Wait up to 300 seconds in 50ms intervals */ 204 error = ETIMEDOUT; 205 for (i = 0; i < 6000; i++) { 206 /* 207 * Wait 50 msec. If this is the first time through, wait 256 208 * msec to satisfy Diag Reset timing requirements. 209 */ 210 if (first_wait_done) { 211 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 212 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 213 "mpsdiag", hz/20); 214 else if (sleep_flag == CAN_SLEEP) 215 pause("mpsdiag", hz/20); 216 else 217 DELAY(50 * 1000); 218 } else { 219 DELAY(256 * 1000); 220 first_wait_done = TRUE; 221 } 222 /* 223 * Check for the RESET_ADAPTER bit to be cleared first, then 224 * wait for the RESET state to be cleared, which takes a little 225 * longer. 226 */ 227 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 228 if (reg & MPI2_DIAG_RESET_ADAPTER) { 229 continue; 230 } 231 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 232 if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) { 233 error = 0; 234 break; 235 } 236 } 237 if (error) { 238 mps_dprint(sc, MPS_INIT, "reset failed, error= %d, exit\n", 239 error); 240 return (error); 241 } 242 243 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0); 244 mps_dprint(sc, MPS_INIT, "diag reset success, exit\n"); 245 246 return (0); 247 } 248 249 static int 250 mps_message_unit_reset(struct mps_softc *sc, int sleep_flag) 251 { 252 int error; 253 254 MPS_FUNCTRACE(sc); 255 256 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 257 258 error = 0; 259 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, 260 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET << 261 MPI2_DOORBELL_FUNCTION_SHIFT); 262 263 if (mps_wait_db_ack(sc, 5, sleep_flag) != 0) { 264 mps_dprint(sc, MPS_INIT|MPS_FAULT, 265 "Doorbell handshake failed\n"); 266 error = ETIMEDOUT; 267 } 268 269 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 270 return (error); 271 } 272 273 static int 274 mps_transition_ready(struct mps_softc *sc) 275 { 276 uint32_t reg, state; 277 int error, tries = 0; 278 int sleep_flags; 279 280 MPS_FUNCTRACE(sc); 281 /* If we are in attach call, do not sleep */ 282 sleep_flags = (sc->mps_flags & MPS_FLAGS_ATTACH_DONE) 283 ? CAN_SLEEP:NO_SLEEP; 284 error = 0; 285 286 mps_dprint(sc, MPS_INIT, "%s entered, sleep_flags= %d\n", 287 __func__, sleep_flags); 288 289 while (tries++ < 1200) { 290 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 291 mps_dprint(sc, MPS_INIT, " Doorbell= 0x%x\n", reg); 292 293 /* 294 * Ensure the IOC is ready to talk. If it's not, try 295 * resetting it. 296 */ 297 if (reg & MPI2_DOORBELL_USED) { 298 mps_dprint(sc, MPS_INIT, " Not ready, sending diag " 299 "reset\n"); 300 mps_diag_reset(sc, sleep_flags); 301 DELAY(50000); 302 continue; 303 } 304 305 /* Is the adapter owned by another peer? */ 306 if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) == 307 (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) { 308 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC is under the " 309 "control of another peer host, aborting " 310 "initialization.\n"); 311 error = ENXIO; 312 break; 313 } 314 315 state = reg & MPI2_IOC_STATE_MASK; 316 if (state == MPI2_IOC_STATE_READY) { 317 /* Ready to go! */ 318 error = 0; 319 break; 320 } else if (state == MPI2_IOC_STATE_FAULT) { 321 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC in fault " 322 "state 0x%x, resetting\n", 323 state & MPI2_DOORBELL_FAULT_CODE_MASK); 324 mps_diag_reset(sc, sleep_flags); 325 } else if (state == MPI2_IOC_STATE_OPERATIONAL) { 326 /* Need to take ownership */ 327 mps_message_unit_reset(sc, sleep_flags); 328 } else if (state == MPI2_IOC_STATE_RESET) { 329 /* Wait a bit, IOC might be in transition */ 330 mps_dprint(sc, MPS_INIT|MPS_FAULT, 331 "IOC in unexpected reset state\n"); 332 } else { 333 mps_dprint(sc, MPS_INIT|MPS_FAULT, 334 "IOC in unknown state 0x%x\n", state); 335 error = EINVAL; 336 break; 337 } 338 339 /* Wait 50ms for things to settle down. */ 340 DELAY(50000); 341 } 342 343 if (error) 344 mps_dprint(sc, MPS_INIT|MPS_FAULT, 345 "Cannot transition IOC to ready\n"); 346 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 347 348 return (error); 349 } 350 351 static int 352 mps_transition_operational(struct mps_softc *sc) 353 { 354 uint32_t reg, state; 355 int error; 356 357 MPS_FUNCTRACE(sc); 358 359 error = 0; 360 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 361 mps_dprint(sc, MPS_INIT, "%s entered, Doorbell= 0x%x\n", __func__, reg); 362 363 state = reg & MPI2_IOC_STATE_MASK; 364 if (state != MPI2_IOC_STATE_READY) { 365 mps_dprint(sc, MPS_INIT, "IOC not ready\n"); 366 if ((error = mps_transition_ready(sc)) != 0) { 367 mps_dprint(sc, MPS_INIT|MPS_FAULT, 368 "failed to transition ready, exit\n"); 369 return (error); 370 } 371 } 372 373 error = mps_send_iocinit(sc); 374 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 375 376 return (error); 377 } 378 379 static void 380 mps_resize_queues(struct mps_softc *sc) 381 { 382 u_int reqcr, prireqcr, maxio, sges_per_frame; 383 384 /* 385 * Size the queues. Since the reply queues always need one free 386 * entry, we'll deduct one reply message here. The LSI documents 387 * suggest instead to add a count to the request queue, but I think 388 * that it's better to deduct from reply queue. 389 */ 390 prireqcr = MAX(1, sc->max_prireqframes); 391 prireqcr = MIN(prireqcr, sc->facts->HighPriorityCredit); 392 393 reqcr = MAX(2, sc->max_reqframes); 394 reqcr = MIN(reqcr, sc->facts->RequestCredit); 395 396 sc->num_reqs = prireqcr + reqcr; 397 sc->num_prireqs = prireqcr; 398 sc->num_replies = MIN(sc->max_replyframes + sc->max_evtframes, 399 sc->facts->MaxReplyDescriptorPostQueueDepth) - 1; 400 401 /* Store the request frame size in bytes rather than as 32bit words */ 402 sc->reqframesz = sc->facts->IOCRequestFrameSize * 4; 403 404 /* 405 * Max IO Size is Page Size * the following: 406 * ((SGEs per frame - 1 for chain element) * Max Chain Depth) 407 * + 1 for no chain needed in last frame 408 * 409 * If user suggests a Max IO size to use, use the smaller of the 410 * user's value and the calculated value as long as the user's 411 * value is larger than 0. The user's value is in pages. 412 */ 413 sges_per_frame = sc->reqframesz / sizeof(MPI2_SGE_SIMPLE64) - 1; 414 maxio = (sges_per_frame * sc->facts->MaxChainDepth + 1) * PAGE_SIZE; 415 416 /* 417 * If I/O size limitation requested, then use it and pass up to CAM. 418 * If not, use MAXPHYS as an optimization hint, but report HW limit. 419 */ 420 if (sc->max_io_pages > 0) { 421 maxio = min(maxio, sc->max_io_pages * PAGE_SIZE); 422 sc->maxio = maxio; 423 } else { 424 sc->maxio = maxio; 425 maxio = min(maxio, MAXPHYS); 426 } 427 428 sc->num_chains = (maxio / PAGE_SIZE + sges_per_frame - 2) / 429 sges_per_frame * reqcr; 430 if (sc->max_chains > 0 && sc->max_chains < sc->num_chains) 431 sc->num_chains = sc->max_chains; 432 433 /* 434 * Figure out the number of MSIx-based queues. If the firmware or 435 * user has done something crazy and not allowed enough credit for 436 * the queues to be useful then don't enable multi-queue. 437 */ 438 if (sc->facts->MaxMSIxVectors < 2) 439 sc->msi_msgs = 1; 440 441 if (sc->msi_msgs > 1) { 442 sc->msi_msgs = MIN(sc->msi_msgs, mp_ncpus); 443 sc->msi_msgs = MIN(sc->msi_msgs, sc->facts->MaxMSIxVectors); 444 if (sc->num_reqs / sc->msi_msgs < 2) 445 sc->msi_msgs = 1; 446 } 447 448 mps_dprint(sc, MPS_INIT, "Sized queues to q=%d reqs=%d replies=%d\n", 449 sc->msi_msgs, sc->num_reqs, sc->num_replies); 450 } 451 452 /* 453 * This is called during attach and when re-initializing due to a Diag Reset. 454 * IOC Facts is used to allocate many of the structures needed by the driver. 455 * If called from attach, de-allocation is not required because the driver has 456 * not allocated any structures yet, but if called from a Diag Reset, previously 457 * allocated structures based on IOC Facts will need to be freed and re- 458 * allocated bases on the latest IOC Facts. 459 */ 460 static int 461 mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching) 462 { 463 int error; 464 Mpi2IOCFactsReply_t saved_facts; 465 uint8_t saved_mode, reallocating; 466 467 mps_dprint(sc, MPS_INIT|MPS_TRACE, "%s entered\n", __func__); 468 469 /* Save old IOC Facts and then only reallocate if Facts have changed */ 470 if (!attaching) { 471 bcopy(sc->facts, &saved_facts, sizeof(MPI2_IOC_FACTS_REPLY)); 472 } 473 474 /* 475 * Get IOC Facts. In all cases throughout this function, panic if doing 476 * a re-initialization and only return the error if attaching so the OS 477 * can handle it. 478 */ 479 if ((error = mps_get_iocfacts(sc, sc->facts)) != 0) { 480 if (attaching) { 481 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to get " 482 "IOC Facts with error %d, exit\n", error); 483 return (error); 484 } else { 485 panic("%s failed to get IOC Facts with error %d\n", 486 __func__, error); 487 } 488 } 489 490 MPS_DPRINT_PAGE(sc, MPS_XINFO, iocfacts, sc->facts); 491 492 snprintf(sc->fw_version, sizeof(sc->fw_version), 493 "%02d.%02d.%02d.%02d", 494 sc->facts->FWVersion.Struct.Major, 495 sc->facts->FWVersion.Struct.Minor, 496 sc->facts->FWVersion.Struct.Unit, 497 sc->facts->FWVersion.Struct.Dev); 498 499 mps_dprint(sc, MPS_INFO, "Firmware: %s, Driver: %s\n", sc->fw_version, 500 MPS_DRIVER_VERSION); 501 mps_dprint(sc, MPS_INFO, "IOCCapabilities: %b\n", 502 sc->facts->IOCCapabilities, 503 "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf" 504 "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR" 505 "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc"); 506 507 /* 508 * If the chip doesn't support event replay then a hard reset will be 509 * required to trigger a full discovery. Do the reset here then 510 * retransition to Ready. A hard reset might have already been done, 511 * but it doesn't hurt to do it again. Only do this if attaching, not 512 * for a Diag Reset. 513 */ 514 if (attaching && ((sc->facts->IOCCapabilities & 515 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0)) { 516 mps_dprint(sc, MPS_INIT, "No event replay, reseting\n"); 517 mps_diag_reset(sc, NO_SLEEP); 518 if ((error = mps_transition_ready(sc)) != 0) { 519 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to " 520 "transition to ready with error %d, exit\n", 521 error); 522 return (error); 523 } 524 } 525 526 /* 527 * Set flag if IR Firmware is loaded. If the RAID Capability has 528 * changed from the previous IOC Facts, log a warning, but only if 529 * checking this after a Diag Reset and not during attach. 530 */ 531 saved_mode = sc->ir_firmware; 532 if (sc->facts->IOCCapabilities & 533 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) 534 sc->ir_firmware = 1; 535 if (!attaching) { 536 if (sc->ir_firmware != saved_mode) { 537 mps_dprint(sc, MPS_INIT|MPS_FAULT, "new IR/IT mode " 538 "in IOC Facts does not match previous mode\n"); 539 } 540 } 541 542 /* Only deallocate and reallocate if relevant IOC Facts have changed */ 543 reallocating = FALSE; 544 sc->mps_flags &= ~MPS_FLAGS_REALLOCATED; 545 546 if ((!attaching) && 547 ((saved_facts.MsgVersion != sc->facts->MsgVersion) || 548 (saved_facts.HeaderVersion != sc->facts->HeaderVersion) || 549 (saved_facts.MaxChainDepth != sc->facts->MaxChainDepth) || 550 (saved_facts.RequestCredit != sc->facts->RequestCredit) || 551 (saved_facts.ProductID != sc->facts->ProductID) || 552 (saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) || 553 (saved_facts.IOCRequestFrameSize != 554 sc->facts->IOCRequestFrameSize) || 555 (saved_facts.MaxTargets != sc->facts->MaxTargets) || 556 (saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) || 557 (saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) || 558 (saved_facts.HighPriorityCredit != sc->facts->HighPriorityCredit) || 559 (saved_facts.MaxReplyDescriptorPostQueueDepth != 560 sc->facts->MaxReplyDescriptorPostQueueDepth) || 561 (saved_facts.ReplyFrameSize != sc->facts->ReplyFrameSize) || 562 (saved_facts.MaxVolumes != sc->facts->MaxVolumes) || 563 (saved_facts.MaxPersistentEntries != 564 sc->facts->MaxPersistentEntries))) { 565 reallocating = TRUE; 566 567 /* Record that we reallocated everything */ 568 sc->mps_flags |= MPS_FLAGS_REALLOCATED; 569 } 570 571 /* 572 * Some things should be done if attaching or re-allocating after a Diag 573 * Reset, but are not needed after a Diag Reset if the FW has not 574 * changed. 575 */ 576 if (attaching || reallocating) { 577 /* 578 * Check if controller supports FW diag buffers and set flag to 579 * enable each type. 580 */ 581 if (sc->facts->IOCCapabilities & 582 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) 583 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE]. 584 enabled = TRUE; 585 if (sc->facts->IOCCapabilities & 586 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) 587 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT]. 588 enabled = TRUE; 589 if (sc->facts->IOCCapabilities & 590 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) 591 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED]. 592 enabled = TRUE; 593 594 /* 595 * Set flag if EEDP is supported and if TLR is supported. 596 */ 597 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) 598 sc->eedp_enabled = TRUE; 599 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) 600 sc->control_TLR = TRUE; 601 602 mps_resize_queues(sc); 603 604 /* 605 * Initialize all Tail Queues 606 */ 607 TAILQ_INIT(&sc->req_list); 608 TAILQ_INIT(&sc->high_priority_req_list); 609 TAILQ_INIT(&sc->chain_list); 610 TAILQ_INIT(&sc->tm_list); 611 } 612 613 /* 614 * If doing a Diag Reset and the FW is significantly different 615 * (reallocating will be set above in IOC Facts comparison), then all 616 * buffers based on the IOC Facts will need to be freed before they are 617 * reallocated. 618 */ 619 if (reallocating) { 620 mps_iocfacts_free(sc); 621 mpssas_realloc_targets(sc, saved_facts.MaxTargets + 622 saved_facts.MaxVolumes); 623 } 624 625 /* 626 * Any deallocation has been completed. Now start reallocating 627 * if needed. Will only need to reallocate if attaching or if the new 628 * IOC Facts are different from the previous IOC Facts after a Diag 629 * Reset. Targets have already been allocated above if needed. 630 */ 631 error = 0; 632 while (attaching || reallocating) { 633 if ((error = mps_alloc_hw_queues(sc)) != 0) 634 break; 635 if ((error = mps_alloc_replies(sc)) != 0) 636 break; 637 if ((error = mps_alloc_requests(sc)) != 0) 638 break; 639 if ((error = mps_alloc_queues(sc)) != 0) 640 break; 641 642 break; 643 } 644 if (error) { 645 mps_dprint(sc, MPS_INIT|MPS_FAULT, 646 "Failed to alloc queues with error %d\n", error); 647 mps_free(sc); 648 return (error); 649 } 650 651 /* Always initialize the queues */ 652 bzero(sc->free_queue, sc->fqdepth * 4); 653 mps_init_queues(sc); 654 655 /* 656 * Always get the chip out of the reset state, but only panic if not 657 * attaching. If attaching and there is an error, that is handled by 658 * the OS. 659 */ 660 error = mps_transition_operational(sc); 661 if (error != 0) { 662 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to " 663 "transition to operational with error %d\n", error); 664 mps_free(sc); 665 return (error); 666 } 667 668 /* 669 * Finish the queue initialization. 670 * These are set here instead of in mps_init_queues() because the 671 * IOC resets these values during the state transition in 672 * mps_transition_operational(). The free index is set to 1 673 * because the corresponding index in the IOC is set to 0, and the 674 * IOC treats the queues as full if both are set to the same value. 675 * Hence the reason that the queue can't hold all of the possible 676 * replies. 677 */ 678 sc->replypostindex = 0; 679 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); 680 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0); 681 682 /* 683 * Attach the subsystems so they can prepare their event masks. 684 * XXX Should be dynamic so that IM/IR and user modules can attach 685 */ 686 error = 0; 687 while (attaching) { 688 mps_dprint(sc, MPS_INIT, "Attaching subsystems\n"); 689 if ((error = mps_attach_log(sc)) != 0) 690 break; 691 if ((error = mps_attach_sas(sc)) != 0) 692 break; 693 if ((error = mps_attach_user(sc)) != 0) 694 break; 695 break; 696 } 697 if (error) { 698 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to attach all " 699 "subsystems: error %d\n", error); 700 mps_free(sc); 701 return (error); 702 } 703 704 /* 705 * XXX If the number of MSI-X vectors changes during re-init, this 706 * won't see it and adjust. 707 */ 708 if (attaching && (error = mps_pci_setup_interrupts(sc)) != 0) { 709 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to setup " 710 "interrupts\n"); 711 mps_free(sc); 712 return (error); 713 } 714 715 /* 716 * Set flag if this is a WD controller. This shouldn't ever change, but 717 * reset it after a Diag Reset, just in case. 718 */ 719 sc->WD_available = FALSE; 720 if (pci_get_device(sc->mps_dev) == MPI2_MFGPAGE_DEVID_SSS6200) 721 sc->WD_available = TRUE; 722 723 return (error); 724 } 725 726 /* 727 * This is called if memory is being free (during detach for example) and when 728 * buffers need to be reallocated due to a Diag Reset. 729 */ 730 static void 731 mps_iocfacts_free(struct mps_softc *sc) 732 { 733 struct mps_command *cm; 734 int i; 735 736 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 737 738 if (sc->free_busaddr != 0) 739 bus_dmamap_unload(sc->queues_dmat, sc->queues_map); 740 if (sc->free_queue != NULL) 741 bus_dmamem_free(sc->queues_dmat, sc->free_queue, 742 sc->queues_map); 743 if (sc->queues_dmat != NULL) 744 bus_dma_tag_destroy(sc->queues_dmat); 745 746 if (sc->chain_frames != NULL) { 747 bus_dmamap_unload(sc->chain_dmat, sc->chain_map); 748 bus_dmamem_free(sc->chain_dmat, sc->chain_frames, 749 sc->chain_map); 750 } 751 if (sc->chain_dmat != NULL) 752 bus_dma_tag_destroy(sc->chain_dmat); 753 754 if (sc->sense_busaddr != 0) 755 bus_dmamap_unload(sc->sense_dmat, sc->sense_map); 756 if (sc->sense_frames != NULL) 757 bus_dmamem_free(sc->sense_dmat, sc->sense_frames, 758 sc->sense_map); 759 if (sc->sense_dmat != NULL) 760 bus_dma_tag_destroy(sc->sense_dmat); 761 762 if (sc->reply_busaddr != 0) 763 bus_dmamap_unload(sc->reply_dmat, sc->reply_map); 764 if (sc->reply_frames != NULL) 765 bus_dmamem_free(sc->reply_dmat, sc->reply_frames, 766 sc->reply_map); 767 if (sc->reply_dmat != NULL) 768 bus_dma_tag_destroy(sc->reply_dmat); 769 770 if (sc->req_busaddr != 0) 771 bus_dmamap_unload(sc->req_dmat, sc->req_map); 772 if (sc->req_frames != NULL) 773 bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map); 774 if (sc->req_dmat != NULL) 775 bus_dma_tag_destroy(sc->req_dmat); 776 777 if (sc->chains != NULL) 778 free(sc->chains, M_MPT2); 779 if (sc->commands != NULL) { 780 for (i = 1; i < sc->num_reqs; i++) { 781 cm = &sc->commands[i]; 782 bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap); 783 } 784 free(sc->commands, M_MPT2); 785 } 786 if (sc->buffer_dmat != NULL) 787 bus_dma_tag_destroy(sc->buffer_dmat); 788 789 mps_pci_free_interrupts(sc); 790 free(sc->queues, M_MPT2); 791 sc->queues = NULL; 792 } 793 794 /* 795 * The terms diag reset and hard reset are used interchangeably in the MPI 796 * docs to mean resetting the controller chip. In this code diag reset 797 * cleans everything up, and the hard reset function just sends the reset 798 * sequence to the chip. This should probably be refactored so that every 799 * subsystem gets a reset notification of some sort, and can clean up 800 * appropriately. 801 */ 802 int 803 mps_reinit(struct mps_softc *sc) 804 { 805 int error; 806 struct mpssas_softc *sassc; 807 808 sassc = sc->sassc; 809 810 MPS_FUNCTRACE(sc); 811 812 mtx_assert(&sc->mps_mtx, MA_OWNED); 813 814 mps_dprint(sc, MPS_INIT|MPS_INFO, "Reinitializing controller\n"); 815 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) { 816 mps_dprint(sc, MPS_INIT, "Reset already in progress\n"); 817 return 0; 818 } 819 820 /* make sure the completion callbacks can recognize they're getting 821 * a NULL cm_reply due to a reset. 822 */ 823 sc->mps_flags |= MPS_FLAGS_DIAGRESET; 824 825 /* 826 * Mask interrupts here. 827 */ 828 mps_dprint(sc, MPS_INIT, "masking interrupts and resetting\n"); 829 mps_mask_intr(sc); 830 831 error = mps_diag_reset(sc, CAN_SLEEP); 832 if (error != 0) { 833 /* XXXSL No need to panic here */ 834 panic("%s hard reset failed with error %d\n", 835 __func__, error); 836 } 837 838 /* Restore the PCI state, including the MSI-X registers */ 839 mps_pci_restore(sc); 840 841 /* Give the I/O subsystem special priority to get itself prepared */ 842 mpssas_handle_reinit(sc); 843 844 /* 845 * Get IOC Facts and allocate all structures based on this information. 846 * The attach function will also call mps_iocfacts_allocate at startup. 847 * If relevant values have changed in IOC Facts, this function will free 848 * all of the memory based on IOC Facts and reallocate that memory. 849 */ 850 if ((error = mps_iocfacts_allocate(sc, FALSE)) != 0) { 851 panic("%s IOC Facts based allocation failed with error %d\n", 852 __func__, error); 853 } 854 855 /* 856 * Mapping structures will be re-allocated after getting IOC Page8, so 857 * free these structures here. 858 */ 859 mps_mapping_exit(sc); 860 861 /* 862 * The static page function currently read is IOC Page8. Others can be 863 * added in future. It's possible that the values in IOC Page8 have 864 * changed after a Diag Reset due to user modification, so always read 865 * these. Interrupts are masked, so unmask them before getting config 866 * pages. 867 */ 868 mps_unmask_intr(sc); 869 sc->mps_flags &= ~MPS_FLAGS_DIAGRESET; 870 mps_base_static_config_pages(sc); 871 872 /* 873 * Some mapping info is based in IOC Page8 data, so re-initialize the 874 * mapping tables. 875 */ 876 mps_mapping_initialize(sc); 877 878 /* 879 * Restart will reload the event masks clobbered by the reset, and 880 * then enable the port. 881 */ 882 mps_reregister_events(sc); 883 884 /* the end of discovery will release the simq, so we're done. */ 885 mps_dprint(sc, MPS_INIT|MPS_XINFO, "Finished sc %p post %u free %u\n", 886 sc, sc->replypostindex, sc->replyfreeindex); 887 888 mpssas_release_simq_reinit(sassc); 889 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 890 891 return 0; 892 } 893 894 /* Wait for the chip to ACK a word that we've put into its FIFO 895 * Wait for <timeout> seconds. In single loop wait for busy loop 896 * for 500 microseconds. 897 * Total is [ 0.5 * (2000 * <timeout>) ] in miliseconds. 898 * */ 899 static int 900 mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag) 901 { 902 903 u32 cntdn, count; 904 u32 int_status; 905 u32 doorbell; 906 907 count = 0; 908 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 909 do { 910 int_status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 911 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 912 mps_dprint(sc, MPS_TRACE, 913 "%s: successful count(%d), timeout(%d)\n", 914 __func__, count, timeout); 915 return 0; 916 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 917 doorbell = mps_regread(sc, MPI2_DOORBELL_OFFSET); 918 if ((doorbell & MPI2_IOC_STATE_MASK) == 919 MPI2_IOC_STATE_FAULT) { 920 mps_dprint(sc, MPS_FAULT, 921 "fault_state(0x%04x)!\n", doorbell); 922 return (EFAULT); 923 } 924 } else if (int_status == 0xFFFFFFFF) 925 goto out; 926 927 /* If it can sleep, sleep for 1 milisecond, else busy loop for 928 * 0.5 milisecond */ 929 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 930 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 931 "mpsdba", hz/1000); 932 else if (sleep_flag == CAN_SLEEP) 933 pause("mpsdba", hz/1000); 934 else 935 DELAY(500); 936 count++; 937 } while (--cntdn); 938 939 out: 940 mps_dprint(sc, MPS_FAULT, "%s: failed due to timeout count(%d), " 941 "int_status(%x)!\n", __func__, count, int_status); 942 return (ETIMEDOUT); 943 944 } 945 946 /* Wait for the chip to signal that the next word in its FIFO can be fetched */ 947 static int 948 mps_wait_db_int(struct mps_softc *sc) 949 { 950 int retry; 951 952 for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) { 953 if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) & 954 MPI2_HIS_IOC2SYS_DB_STATUS) != 0) 955 return (0); 956 DELAY(2000); 957 } 958 return (ETIMEDOUT); 959 } 960 961 /* Step through the synchronous command state machine, i.e. "Doorbell mode" */ 962 static int 963 mps_request_sync(struct mps_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply, 964 int req_sz, int reply_sz, int timeout) 965 { 966 uint32_t *data32; 967 uint16_t *data16; 968 int i, count, ioc_sz, residual; 969 int sleep_flags = CAN_SLEEP; 970 971 if (curthread->td_no_sleeping != 0) 972 sleep_flags = NO_SLEEP; 973 974 /* Step 1 */ 975 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 976 977 /* Step 2 */ 978 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 979 return (EBUSY); 980 981 /* Step 3 982 * Announce that a message is coming through the doorbell. Messages 983 * are pushed at 32bit words, so round up if needed. 984 */ 985 count = (req_sz + 3) / 4; 986 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, 987 (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) | 988 (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT)); 989 990 /* Step 4 */ 991 if (mps_wait_db_int(sc) || 992 (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) { 993 mps_dprint(sc, MPS_FAULT, "Doorbell failed to activate\n"); 994 return (ENXIO); 995 } 996 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 997 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) { 998 mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed\n"); 999 return (ENXIO); 1000 } 1001 1002 /* Step 5 */ 1003 /* Clock out the message data synchronously in 32-bit dwords*/ 1004 data32 = (uint32_t *)req; 1005 for (i = 0; i < count; i++) { 1006 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i])); 1007 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) { 1008 mps_dprint(sc, MPS_FAULT, 1009 "Timeout while writing doorbell\n"); 1010 return (ENXIO); 1011 } 1012 } 1013 1014 /* Step 6 */ 1015 /* Clock in the reply in 16-bit words. The total length of the 1016 * message is always in the 4th byte, so clock out the first 2 words 1017 * manually, then loop the rest. 1018 */ 1019 data16 = (uint16_t *)reply; 1020 if (mps_wait_db_int(sc) != 0) { 1021 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 0\n"); 1022 return (ENXIO); 1023 } 1024 data16[0] = 1025 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 1026 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1027 if (mps_wait_db_int(sc) != 0) { 1028 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 1\n"); 1029 return (ENXIO); 1030 } 1031 data16[1] = 1032 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 1033 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1034 1035 /* Number of 32bit words in the message */ 1036 ioc_sz = reply->MsgLength; 1037 1038 /* 1039 * Figure out how many 16bit words to clock in without overrunning. 1040 * The precision loss with dividing reply_sz can safely be 1041 * ignored because the messages can only be multiples of 32bits. 1042 */ 1043 residual = 0; 1044 count = MIN((reply_sz / 4), ioc_sz) * 2; 1045 if (count < ioc_sz * 2) { 1046 residual = ioc_sz * 2 - count; 1047 mps_dprint(sc, MPS_ERROR, "Driver error, throwing away %d " 1048 "residual message words\n", residual); 1049 } 1050 1051 for (i = 2; i < count; i++) { 1052 if (mps_wait_db_int(sc) != 0) { 1053 mps_dprint(sc, MPS_FAULT, 1054 "Timeout reading doorbell %d\n", i); 1055 return (ENXIO); 1056 } 1057 data16[i] = mps_regread(sc, MPI2_DOORBELL_OFFSET) & 1058 MPI2_DOORBELL_DATA_MASK; 1059 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1060 } 1061 1062 /* 1063 * Pull out residual words that won't fit into the provided buffer. 1064 * This keeps the chip from hanging due to a driver programming 1065 * error. 1066 */ 1067 while (residual--) { 1068 if (mps_wait_db_int(sc) != 0) { 1069 mps_dprint(sc, MPS_FAULT, 1070 "Timeout reading doorbell\n"); 1071 return (ENXIO); 1072 } 1073 (void)mps_regread(sc, MPI2_DOORBELL_OFFSET); 1074 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1075 } 1076 1077 /* Step 7 */ 1078 if (mps_wait_db_int(sc) != 0) { 1079 mps_dprint(sc, MPS_FAULT, "Timeout waiting to exit doorbell\n"); 1080 return (ENXIO); 1081 } 1082 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 1083 mps_dprint(sc, MPS_FAULT, "Warning, doorbell still active\n"); 1084 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1085 1086 return (0); 1087 } 1088 1089 static void 1090 mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm) 1091 { 1092 reply_descriptor rd; 1093 MPS_FUNCTRACE(sc); 1094 mps_dprint(sc, MPS_TRACE, "SMID %u cm %p ccb %p\n", 1095 cm->cm_desc.Default.SMID, cm, cm->cm_ccb); 1096 1097 if (sc->mps_flags & MPS_FLAGS_ATTACH_DONE && !(sc->mps_flags & MPS_FLAGS_SHUTDOWN)) 1098 mtx_assert(&sc->mps_mtx, MA_OWNED); 1099 1100 if (++sc->io_cmds_active > sc->io_cmds_highwater) 1101 sc->io_cmds_highwater++; 1102 rd.u.low = cm->cm_desc.Words.Low; 1103 rd.u.high = cm->cm_desc.Words.High; 1104 rd.word = htole64(rd.word); 1105 1106 KASSERT(cm->cm_state == MPS_CM_STATE_BUSY, ("command not busy\n")); 1107 cm->cm_state = MPS_CM_STATE_INQUEUE; 1108 1109 /* TODO-We may need to make below regwrite atomic */ 1110 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET, 1111 rd.u.low); 1112 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET, 1113 rd.u.high); 1114 } 1115 1116 /* 1117 * Just the FACTS, ma'am. 1118 */ 1119 static int 1120 mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts) 1121 { 1122 MPI2_DEFAULT_REPLY *reply; 1123 MPI2_IOC_FACTS_REQUEST request; 1124 int error, req_sz, reply_sz; 1125 1126 MPS_FUNCTRACE(sc); 1127 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1128 1129 req_sz = sizeof(MPI2_IOC_FACTS_REQUEST); 1130 reply_sz = sizeof(MPI2_IOC_FACTS_REPLY); 1131 reply = (MPI2_DEFAULT_REPLY *)facts; 1132 1133 bzero(&request, req_sz); 1134 request.Function = MPI2_FUNCTION_IOC_FACTS; 1135 error = mps_request_sync(sc, &request, reply, req_sz, reply_sz, 5); 1136 mps_dprint(sc, MPS_INIT, "%s exit error= %d\n", __func__, error); 1137 1138 return (error); 1139 } 1140 1141 static int 1142 mps_send_iocinit(struct mps_softc *sc) 1143 { 1144 MPI2_IOC_INIT_REQUEST init; 1145 MPI2_DEFAULT_REPLY reply; 1146 int req_sz, reply_sz, error; 1147 struct timeval now; 1148 uint64_t time_in_msec; 1149 1150 MPS_FUNCTRACE(sc); 1151 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1152 1153 /* Do a quick sanity check on proper initialization */ 1154 if ((sc->pqdepth == 0) || (sc->fqdepth == 0) || (sc->reqframesz == 0) 1155 || (sc->replyframesz == 0)) { 1156 mps_dprint(sc, MPS_INIT|MPS_ERROR, 1157 "Driver not fully initialized for IOCInit\n"); 1158 return (EINVAL); 1159 } 1160 1161 req_sz = sizeof(MPI2_IOC_INIT_REQUEST); 1162 reply_sz = sizeof(MPI2_IOC_INIT_REPLY); 1163 bzero(&init, req_sz); 1164 bzero(&reply, reply_sz); 1165 1166 /* 1167 * Fill in the init block. Note that most addresses are 1168 * deliberately in the lower 32bits of memory. This is a micro- 1169 * optimzation for PCI/PCIX, though it's not clear if it helps PCIe. 1170 */ 1171 init.Function = MPI2_FUNCTION_IOC_INIT; 1172 init.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 1173 init.MsgVersion = htole16(MPI2_VERSION); 1174 init.HeaderVersion = htole16(MPI2_HEADER_VERSION); 1175 init.SystemRequestFrameSize = htole16((uint16_t)(sc->reqframesz / 4)); 1176 init.ReplyDescriptorPostQueueDepth = htole16(sc->pqdepth); 1177 init.ReplyFreeQueueDepth = htole16(sc->fqdepth); 1178 init.SenseBufferAddressHigh = 0; 1179 init.SystemReplyAddressHigh = 0; 1180 init.SystemRequestFrameBaseAddress.High = 0; 1181 init.SystemRequestFrameBaseAddress.Low = htole32((uint32_t)sc->req_busaddr); 1182 init.ReplyDescriptorPostQueueAddress.High = 0; 1183 init.ReplyDescriptorPostQueueAddress.Low = htole32((uint32_t)sc->post_busaddr); 1184 init.ReplyFreeQueueAddress.High = 0; 1185 init.ReplyFreeQueueAddress.Low = htole32((uint32_t)sc->free_busaddr); 1186 getmicrotime(&now); 1187 time_in_msec = (now.tv_sec * 1000 + now.tv_usec/1000); 1188 init.TimeStamp.High = htole32((time_in_msec >> 32) & 0xFFFFFFFF); 1189 init.TimeStamp.Low = htole32(time_in_msec & 0xFFFFFFFF); 1190 1191 error = mps_request_sync(sc, &init, &reply, req_sz, reply_sz, 5); 1192 if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 1193 error = ENXIO; 1194 1195 mps_dprint(sc, MPS_INIT, "IOCInit status= 0x%x\n", reply.IOCStatus); 1196 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 1197 return (error); 1198 } 1199 1200 void 1201 mps_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1202 { 1203 bus_addr_t *addr; 1204 1205 addr = arg; 1206 *addr = segs[0].ds_addr; 1207 } 1208 1209 void 1210 mps_memaddr_wait_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1211 { 1212 struct mps_busdma_context *ctx; 1213 int need_unload, need_free; 1214 1215 ctx = (struct mps_busdma_context *)arg; 1216 need_unload = 0; 1217 need_free = 0; 1218 1219 mps_lock(ctx->softc); 1220 ctx->error = error; 1221 ctx->completed = 1; 1222 if ((error == 0) && (ctx->abandoned == 0)) { 1223 *ctx->addr = segs[0].ds_addr; 1224 } else { 1225 if (nsegs != 0) 1226 need_unload = 1; 1227 if (ctx->abandoned != 0) 1228 need_free = 1; 1229 } 1230 if (need_free == 0) 1231 wakeup(ctx); 1232 1233 mps_unlock(ctx->softc); 1234 1235 if (need_unload != 0) { 1236 bus_dmamap_unload(ctx->buffer_dmat, 1237 ctx->buffer_dmamap); 1238 *ctx->addr = 0; 1239 } 1240 1241 if (need_free != 0) 1242 free(ctx, M_MPSUSER); 1243 } 1244 1245 static int 1246 mps_alloc_queues(struct mps_softc *sc) 1247 { 1248 struct mps_queue *q; 1249 u_int nq, i; 1250 1251 nq = sc->msi_msgs; 1252 mps_dprint(sc, MPS_INIT|MPS_XINFO, "Allocating %d I/O queues\n", nq); 1253 1254 sc->queues = malloc(sizeof(struct mps_queue) * nq, M_MPT2, 1255 M_NOWAIT|M_ZERO); 1256 if (sc->queues == NULL) 1257 return (ENOMEM); 1258 1259 for (i = 0; i < nq; i++) { 1260 q = &sc->queues[i]; 1261 mps_dprint(sc, MPS_INIT, "Configuring queue %d %p\n", i, q); 1262 q->sc = sc; 1263 q->qnum = i; 1264 } 1265 1266 return (0); 1267 } 1268 1269 static int 1270 mps_alloc_hw_queues(struct mps_softc *sc) 1271 { 1272 bus_addr_t queues_busaddr; 1273 uint8_t *queues; 1274 int qsize, fqsize, pqsize; 1275 1276 /* 1277 * The reply free queue contains 4 byte entries in multiples of 16 and 1278 * aligned on a 16 byte boundary. There must always be an unused entry. 1279 * This queue supplies fresh reply frames for the firmware to use. 1280 * 1281 * The reply descriptor post queue contains 8 byte entries in 1282 * multiples of 16 and aligned on a 16 byte boundary. This queue 1283 * contains filled-in reply frames sent from the firmware to the host. 1284 * 1285 * These two queues are allocated together for simplicity. 1286 */ 1287 sc->fqdepth = roundup2(sc->num_replies + 1, 16); 1288 sc->pqdepth = roundup2(sc->num_replies + 1, 16); 1289 fqsize= sc->fqdepth * 4; 1290 pqsize = sc->pqdepth * 8; 1291 qsize = fqsize + pqsize; 1292 1293 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1294 16, 0, /* algnmnt, boundary */ 1295 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1296 BUS_SPACE_MAXADDR, /* highaddr */ 1297 NULL, NULL, /* filter, filterarg */ 1298 qsize, /* maxsize */ 1299 1, /* nsegments */ 1300 qsize, /* maxsegsize */ 1301 0, /* flags */ 1302 NULL, NULL, /* lockfunc, lockarg */ 1303 &sc->queues_dmat)) { 1304 mps_dprint(sc, MPS_ERROR, "Cannot allocate queues DMA tag\n"); 1305 return (ENOMEM); 1306 } 1307 if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT, 1308 &sc->queues_map)) { 1309 mps_dprint(sc, MPS_ERROR, "Cannot allocate queues memory\n"); 1310 return (ENOMEM); 1311 } 1312 bzero(queues, qsize); 1313 bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize, 1314 mps_memaddr_cb, &queues_busaddr, 0); 1315 1316 sc->free_queue = (uint32_t *)queues; 1317 sc->free_busaddr = queues_busaddr; 1318 sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize); 1319 sc->post_busaddr = queues_busaddr + fqsize; 1320 mps_dprint(sc, MPS_INIT, "free queue busaddr= %#016jx size= %d\n", 1321 (uintmax_t)sc->free_busaddr, fqsize); 1322 mps_dprint(sc, MPS_INIT, "reply queue busaddr= %#016jx size= %d\n", 1323 (uintmax_t)sc->post_busaddr, pqsize); 1324 1325 return (0); 1326 } 1327 1328 static int 1329 mps_alloc_replies(struct mps_softc *sc) 1330 { 1331 int rsize, num_replies; 1332 1333 /* Store the reply frame size in bytes rather than as 32bit words */ 1334 sc->replyframesz = sc->facts->ReplyFrameSize * 4; 1335 1336 /* 1337 * sc->num_replies should be one less than sc->fqdepth. We need to 1338 * allocate space for sc->fqdepth replies, but only sc->num_replies 1339 * replies can be used at once. 1340 */ 1341 num_replies = max(sc->fqdepth, sc->num_replies); 1342 1343 rsize = sc->replyframesz * num_replies; 1344 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1345 4, 0, /* algnmnt, boundary */ 1346 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1347 BUS_SPACE_MAXADDR, /* highaddr */ 1348 NULL, NULL, /* filter, filterarg */ 1349 rsize, /* maxsize */ 1350 1, /* nsegments */ 1351 rsize, /* maxsegsize */ 1352 0, /* flags */ 1353 NULL, NULL, /* lockfunc, lockarg */ 1354 &sc->reply_dmat)) { 1355 mps_dprint(sc, MPS_ERROR, "Cannot allocate replies DMA tag\n"); 1356 return (ENOMEM); 1357 } 1358 if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames, 1359 BUS_DMA_NOWAIT, &sc->reply_map)) { 1360 mps_dprint(sc, MPS_ERROR, "Cannot allocate replies memory\n"); 1361 return (ENOMEM); 1362 } 1363 bzero(sc->reply_frames, rsize); 1364 bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize, 1365 mps_memaddr_cb, &sc->reply_busaddr, 0); 1366 1367 mps_dprint(sc, MPS_INIT, "reply frames busaddr= %#016jx size= %d\n", 1368 (uintmax_t)sc->reply_busaddr, rsize); 1369 1370 return (0); 1371 } 1372 1373 static void 1374 mps_load_chains_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1375 { 1376 struct mps_softc *sc = arg; 1377 struct mps_chain *chain; 1378 bus_size_t bo; 1379 int i, o, s; 1380 1381 if (error != 0) 1382 return; 1383 1384 for (i = 0, o = 0, s = 0; s < nsegs; s++) { 1385 for (bo = 0; bo + sc->reqframesz <= segs[s].ds_len; 1386 bo += sc->reqframesz) { 1387 chain = &sc->chains[i++]; 1388 chain->chain =(MPI2_SGE_IO_UNION *)(sc->chain_frames+o); 1389 chain->chain_busaddr = segs[s].ds_addr + bo; 1390 o += sc->reqframesz; 1391 mps_free_chain(sc, chain); 1392 } 1393 if (bo != segs[s].ds_len) 1394 o += segs[s].ds_len - bo; 1395 } 1396 sc->chain_free_lowwater = i; 1397 } 1398 1399 static int 1400 mps_alloc_requests(struct mps_softc *sc) 1401 { 1402 struct mps_command *cm; 1403 int i, rsize, nsegs; 1404 1405 rsize = sc->reqframesz * sc->num_reqs; 1406 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1407 16, 0, /* algnmnt, boundary */ 1408 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1409 BUS_SPACE_MAXADDR, /* highaddr */ 1410 NULL, NULL, /* filter, filterarg */ 1411 rsize, /* maxsize */ 1412 1, /* nsegments */ 1413 rsize, /* maxsegsize */ 1414 0, /* flags */ 1415 NULL, NULL, /* lockfunc, lockarg */ 1416 &sc->req_dmat)) { 1417 mps_dprint(sc, MPS_ERROR, "Cannot allocate request DMA tag\n"); 1418 return (ENOMEM); 1419 } 1420 if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames, 1421 BUS_DMA_NOWAIT, &sc->req_map)) { 1422 mps_dprint(sc, MPS_ERROR, "Cannot allocate request memory\n"); 1423 return (ENOMEM); 1424 } 1425 bzero(sc->req_frames, rsize); 1426 bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize, 1427 mps_memaddr_cb, &sc->req_busaddr, 0); 1428 mps_dprint(sc, MPS_INIT, "request frames busaddr= %#016jx size= %d\n", 1429 (uintmax_t)sc->req_busaddr, rsize); 1430 1431 sc->chains = malloc(sizeof(struct mps_chain) * sc->num_chains, M_MPT2, 1432 M_NOWAIT | M_ZERO); 1433 if (!sc->chains) { 1434 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain memory\n"); 1435 return (ENOMEM); 1436 } 1437 rsize = sc->reqframesz * sc->num_chains; 1438 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1439 16, 0, /* algnmnt, boundary */ 1440 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1441 BUS_SPACE_MAXADDR, /* highaddr */ 1442 NULL, NULL, /* filter, filterarg */ 1443 rsize, /* maxsize */ 1444 howmany(rsize, PAGE_SIZE), /* nsegments */ 1445 rsize, /* maxsegsize */ 1446 0, /* flags */ 1447 NULL, NULL, /* lockfunc, lockarg */ 1448 &sc->chain_dmat)) { 1449 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain DMA tag\n"); 1450 return (ENOMEM); 1451 } 1452 if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames, 1453 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->chain_map)) { 1454 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain memory\n"); 1455 return (ENOMEM); 1456 } 1457 if (bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, 1458 rsize, mps_load_chains_cb, sc, BUS_DMA_NOWAIT)) { 1459 mps_dprint(sc, MPS_ERROR, "Cannot load chain memory\n"); 1460 bus_dmamem_free(sc->chain_dmat, sc->chain_frames, 1461 sc->chain_map); 1462 return (ENOMEM); 1463 } 1464 1465 rsize = MPS_SENSE_LEN * sc->num_reqs; 1466 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1467 1, 0, /* algnmnt, boundary */ 1468 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1469 BUS_SPACE_MAXADDR, /* highaddr */ 1470 NULL, NULL, /* filter, filterarg */ 1471 rsize, /* maxsize */ 1472 1, /* nsegments */ 1473 rsize, /* maxsegsize */ 1474 0, /* flags */ 1475 NULL, NULL, /* lockfunc, lockarg */ 1476 &sc->sense_dmat)) { 1477 mps_dprint(sc, MPS_ERROR, "Cannot allocate sense DMA tag\n"); 1478 return (ENOMEM); 1479 } 1480 if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames, 1481 BUS_DMA_NOWAIT, &sc->sense_map)) { 1482 mps_dprint(sc, MPS_ERROR, "Cannot allocate sense memory\n"); 1483 return (ENOMEM); 1484 } 1485 bzero(sc->sense_frames, rsize); 1486 bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize, 1487 mps_memaddr_cb, &sc->sense_busaddr, 0); 1488 mps_dprint(sc, MPS_INIT, "sense frames busaddr= %#016jx size= %d\n", 1489 (uintmax_t)sc->sense_busaddr, rsize); 1490 1491 nsegs = (sc->maxio / PAGE_SIZE) + 1; 1492 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1493 1, 0, /* algnmnt, boundary */ 1494 BUS_SPACE_MAXADDR, /* lowaddr */ 1495 BUS_SPACE_MAXADDR, /* highaddr */ 1496 NULL, NULL, /* filter, filterarg */ 1497 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 1498 nsegs, /* nsegments */ 1499 BUS_SPACE_MAXSIZE_24BIT,/* maxsegsize */ 1500 BUS_DMA_ALLOCNOW, /* flags */ 1501 busdma_lock_mutex, /* lockfunc */ 1502 &sc->mps_mtx, /* lockarg */ 1503 &sc->buffer_dmat)) { 1504 mps_dprint(sc, MPS_ERROR, "Cannot allocate buffer DMA tag\n"); 1505 return (ENOMEM); 1506 } 1507 1508 /* 1509 * SMID 0 cannot be used as a free command per the firmware spec. 1510 * Just drop that command instead of risking accounting bugs. 1511 */ 1512 sc->commands = malloc(sizeof(struct mps_command) * sc->num_reqs, 1513 M_MPT2, M_WAITOK | M_ZERO); 1514 if(!sc->commands) { 1515 mps_dprint(sc, MPS_ERROR, "Cannot allocate command memory\n"); 1516 return (ENOMEM); 1517 } 1518 for (i = 1; i < sc->num_reqs; i++) { 1519 cm = &sc->commands[i]; 1520 cm->cm_req = sc->req_frames + i * sc->reqframesz; 1521 cm->cm_req_busaddr = sc->req_busaddr + i * sc->reqframesz; 1522 cm->cm_sense = &sc->sense_frames[i]; 1523 cm->cm_sense_busaddr = sc->sense_busaddr + i * MPS_SENSE_LEN; 1524 cm->cm_desc.Default.SMID = i; 1525 cm->cm_sc = sc; 1526 cm->cm_state = MPS_CM_STATE_BUSY; 1527 TAILQ_INIT(&cm->cm_chain_list); 1528 callout_init_mtx(&cm->cm_callout, &sc->mps_mtx, 0); 1529 1530 /* XXX Is a failure here a critical problem? */ 1531 if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0) 1532 if (i <= sc->num_prireqs) 1533 mps_free_high_priority_command(sc, cm); 1534 else 1535 mps_free_command(sc, cm); 1536 else { 1537 panic("failed to allocate command %d\n", i); 1538 sc->num_reqs = i; 1539 break; 1540 } 1541 } 1542 1543 return (0); 1544 } 1545 1546 static int 1547 mps_init_queues(struct mps_softc *sc) 1548 { 1549 int i; 1550 1551 memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8); 1552 1553 /* 1554 * According to the spec, we need to use one less reply than we 1555 * have space for on the queue. So sc->num_replies (the number we 1556 * use) should be less than sc->fqdepth (allocated size). 1557 */ 1558 if (sc->num_replies >= sc->fqdepth) 1559 return (EINVAL); 1560 1561 /* 1562 * Initialize all of the free queue entries. 1563 */ 1564 for (i = 0; i < sc->fqdepth; i++) 1565 sc->free_queue[i] = sc->reply_busaddr + (i * sc->replyframesz); 1566 sc->replyfreeindex = sc->num_replies; 1567 1568 return (0); 1569 } 1570 1571 /* Get the driver parameter tunables. Lowest priority are the driver defaults. 1572 * Next are the global settings, if they exist. Highest are the per-unit 1573 * settings, if they exist. 1574 */ 1575 void 1576 mps_get_tunables(struct mps_softc *sc) 1577 { 1578 char tmpstr[80], mps_debug[80]; 1579 1580 /* XXX default to some debugging for now */ 1581 sc->mps_debug = MPS_INFO|MPS_FAULT; 1582 sc->disable_msix = 0; 1583 sc->disable_msi = 0; 1584 sc->max_msix = MPS_MSIX_MAX; 1585 sc->max_chains = MPS_CHAIN_FRAMES; 1586 sc->max_io_pages = MPS_MAXIO_PAGES; 1587 sc->enable_ssu = MPS_SSU_ENABLE_SSD_DISABLE_HDD; 1588 sc->spinup_wait_time = DEFAULT_SPINUP_WAIT; 1589 sc->use_phynum = 1; 1590 sc->max_reqframes = MPS_REQ_FRAMES; 1591 sc->max_prireqframes = MPS_PRI_REQ_FRAMES; 1592 sc->max_replyframes = MPS_REPLY_FRAMES; 1593 sc->max_evtframes = MPS_EVT_REPLY_FRAMES; 1594 1595 /* 1596 * Grab the global variables. 1597 */ 1598 bzero(mps_debug, 80); 1599 if (TUNABLE_STR_FETCH("hw.mps.debug_level", mps_debug, 80) != 0) 1600 mps_parse_debug(sc, mps_debug); 1601 TUNABLE_INT_FETCH("hw.mps.disable_msix", &sc->disable_msix); 1602 TUNABLE_INT_FETCH("hw.mps.disable_msi", &sc->disable_msi); 1603 TUNABLE_INT_FETCH("hw.mps.max_msix", &sc->max_msix); 1604 TUNABLE_INT_FETCH("hw.mps.max_chains", &sc->max_chains); 1605 TUNABLE_INT_FETCH("hw.mps.max_io_pages", &sc->max_io_pages); 1606 TUNABLE_INT_FETCH("hw.mps.enable_ssu", &sc->enable_ssu); 1607 TUNABLE_INT_FETCH("hw.mps.spinup_wait_time", &sc->spinup_wait_time); 1608 TUNABLE_INT_FETCH("hw.mps.use_phy_num", &sc->use_phynum); 1609 TUNABLE_INT_FETCH("hw.mps.max_reqframes", &sc->max_reqframes); 1610 TUNABLE_INT_FETCH("hw.mps.max_prireqframes", &sc->max_prireqframes); 1611 TUNABLE_INT_FETCH("hw.mps.max_replyframes", &sc->max_replyframes); 1612 TUNABLE_INT_FETCH("hw.mps.max_evtframes", &sc->max_evtframes); 1613 1614 /* Grab the unit-instance variables */ 1615 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.debug_level", 1616 device_get_unit(sc->mps_dev)); 1617 bzero(mps_debug, 80); 1618 if (TUNABLE_STR_FETCH(tmpstr, mps_debug, 80) != 0) 1619 mps_parse_debug(sc, mps_debug); 1620 1621 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msix", 1622 device_get_unit(sc->mps_dev)); 1623 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix); 1624 1625 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msi", 1626 device_get_unit(sc->mps_dev)); 1627 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi); 1628 1629 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_msix", 1630 device_get_unit(sc->mps_dev)); 1631 TUNABLE_INT_FETCH(tmpstr, &sc->max_msix); 1632 1633 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_chains", 1634 device_get_unit(sc->mps_dev)); 1635 TUNABLE_INT_FETCH(tmpstr, &sc->max_chains); 1636 1637 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_io_pages", 1638 device_get_unit(sc->mps_dev)); 1639 TUNABLE_INT_FETCH(tmpstr, &sc->max_io_pages); 1640 1641 bzero(sc->exclude_ids, sizeof(sc->exclude_ids)); 1642 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.exclude_ids", 1643 device_get_unit(sc->mps_dev)); 1644 TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids)); 1645 1646 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.enable_ssu", 1647 device_get_unit(sc->mps_dev)); 1648 TUNABLE_INT_FETCH(tmpstr, &sc->enable_ssu); 1649 1650 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.spinup_wait_time", 1651 device_get_unit(sc->mps_dev)); 1652 TUNABLE_INT_FETCH(tmpstr, &sc->spinup_wait_time); 1653 1654 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.use_phy_num", 1655 device_get_unit(sc->mps_dev)); 1656 TUNABLE_INT_FETCH(tmpstr, &sc->use_phynum); 1657 1658 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_reqframes", 1659 device_get_unit(sc->mps_dev)); 1660 TUNABLE_INT_FETCH(tmpstr, &sc->max_reqframes); 1661 1662 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_prireqframes", 1663 device_get_unit(sc->mps_dev)); 1664 TUNABLE_INT_FETCH(tmpstr, &sc->max_prireqframes); 1665 1666 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_replyframes", 1667 device_get_unit(sc->mps_dev)); 1668 TUNABLE_INT_FETCH(tmpstr, &sc->max_replyframes); 1669 1670 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_evtframes", 1671 device_get_unit(sc->mps_dev)); 1672 TUNABLE_INT_FETCH(tmpstr, &sc->max_evtframes); 1673 1674 } 1675 1676 static void 1677 mps_setup_sysctl(struct mps_softc *sc) 1678 { 1679 struct sysctl_ctx_list *sysctl_ctx = NULL; 1680 struct sysctl_oid *sysctl_tree = NULL; 1681 char tmpstr[80], tmpstr2[80]; 1682 1683 /* 1684 * Setup the sysctl variable so the user can change the debug level 1685 * on the fly. 1686 */ 1687 snprintf(tmpstr, sizeof(tmpstr), "MPS controller %d", 1688 device_get_unit(sc->mps_dev)); 1689 snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mps_dev)); 1690 1691 sysctl_ctx = device_get_sysctl_ctx(sc->mps_dev); 1692 if (sysctl_ctx != NULL) 1693 sysctl_tree = device_get_sysctl_tree(sc->mps_dev); 1694 1695 if (sysctl_tree == NULL) { 1696 sysctl_ctx_init(&sc->sysctl_ctx); 1697 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx, 1698 SYSCTL_STATIC_CHILDREN(_hw_mps), OID_AUTO, tmpstr2, 1699 CTLFLAG_RD, 0, tmpstr); 1700 if (sc->sysctl_tree == NULL) 1701 return; 1702 sysctl_ctx = &sc->sysctl_ctx; 1703 sysctl_tree = sc->sysctl_tree; 1704 } 1705 1706 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1707 OID_AUTO, "debug_level", CTLTYPE_STRING | CTLFLAG_RW |CTLFLAG_MPSAFE, 1708 sc, 0, mps_debug_sysctl, "A", "mps debug level"); 1709 1710 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1711 OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0, 1712 "Disable the use of MSI-X interrupts"); 1713 1714 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1715 OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0, 1716 "Disable the use of MSI interrupts"); 1717 1718 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1719 OID_AUTO, "max_msix", CTLFLAG_RD, &sc->max_msix, 0, 1720 "User-defined maximum number of MSIX queues"); 1721 1722 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1723 OID_AUTO, "msix_msgs", CTLFLAG_RD, &sc->msi_msgs, 0, 1724 "Negotiated number of MSIX queues"); 1725 1726 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1727 OID_AUTO, "max_reqframes", CTLFLAG_RD, &sc->max_reqframes, 0, 1728 "Total number of allocated request frames"); 1729 1730 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1731 OID_AUTO, "max_prireqframes", CTLFLAG_RD, &sc->max_prireqframes, 0, 1732 "Total number of allocated high priority request frames"); 1733 1734 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1735 OID_AUTO, "max_replyframes", CTLFLAG_RD, &sc->max_replyframes, 0, 1736 "Total number of allocated reply frames"); 1737 1738 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1739 OID_AUTO, "max_evtframes", CTLFLAG_RD, &sc->max_evtframes, 0, 1740 "Total number of event frames allocated"); 1741 1742 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1743 OID_AUTO, "firmware_version", CTLFLAG_RW, sc->fw_version, 1744 strlen(sc->fw_version), "firmware version"); 1745 1746 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1747 OID_AUTO, "driver_version", CTLFLAG_RW, MPS_DRIVER_VERSION, 1748 strlen(MPS_DRIVER_VERSION), "driver version"); 1749 1750 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1751 OID_AUTO, "io_cmds_active", CTLFLAG_RD, 1752 &sc->io_cmds_active, 0, "number of currently active commands"); 1753 1754 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1755 OID_AUTO, "io_cmds_highwater", CTLFLAG_RD, 1756 &sc->io_cmds_highwater, 0, "maximum active commands seen"); 1757 1758 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1759 OID_AUTO, "chain_free", CTLFLAG_RD, 1760 &sc->chain_free, 0, "number of free chain elements"); 1761 1762 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1763 OID_AUTO, "chain_free_lowwater", CTLFLAG_RD, 1764 &sc->chain_free_lowwater, 0,"lowest number of free chain elements"); 1765 1766 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1767 OID_AUTO, "max_chains", CTLFLAG_RD, 1768 &sc->max_chains, 0,"maximum chain frames that will be allocated"); 1769 1770 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1771 OID_AUTO, "max_io_pages", CTLFLAG_RD, 1772 &sc->max_io_pages, 0,"maximum pages to allow per I/O (if <1 use " 1773 "IOCFacts)"); 1774 1775 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1776 OID_AUTO, "enable_ssu", CTLFLAG_RW, &sc->enable_ssu, 0, 1777 "enable SSU to SATA SSD/HDD at shutdown"); 1778 1779 SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1780 OID_AUTO, "chain_alloc_fail", CTLFLAG_RD, 1781 &sc->chain_alloc_fail, "chain allocation failures"); 1782 1783 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1784 OID_AUTO, "spinup_wait_time", CTLFLAG_RD, 1785 &sc->spinup_wait_time, DEFAULT_SPINUP_WAIT, "seconds to wait for " 1786 "spinup after SATA ID error"); 1787 1788 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1789 OID_AUTO, "mapping_table_dump", CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 1790 mps_mapping_dump, "A", "Mapping Table Dump"); 1791 1792 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1793 OID_AUTO, "encl_table_dump", CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 1794 mps_mapping_encl_dump, "A", "Enclosure Table Dump"); 1795 1796 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1797 OID_AUTO, "use_phy_num", CTLFLAG_RD, &sc->use_phynum, 0, 1798 "Use the phy number for enumeration"); 1799 } 1800 1801 static struct mps_debug_string { 1802 char *name; 1803 int flag; 1804 } mps_debug_strings[] = { 1805 {"info", MPS_INFO}, 1806 {"fault", MPS_FAULT}, 1807 {"event", MPS_EVENT}, 1808 {"log", MPS_LOG}, 1809 {"recovery", MPS_RECOVERY}, 1810 {"error", MPS_ERROR}, 1811 {"init", MPS_INIT}, 1812 {"xinfo", MPS_XINFO}, 1813 {"user", MPS_USER}, 1814 {"mapping", MPS_MAPPING}, 1815 {"trace", MPS_TRACE} 1816 }; 1817 1818 enum mps_debug_level_combiner { 1819 COMB_NONE, 1820 COMB_ADD, 1821 COMB_SUB 1822 }; 1823 1824 static int 1825 mps_debug_sysctl(SYSCTL_HANDLER_ARGS) 1826 { 1827 struct mps_softc *sc; 1828 struct mps_debug_string *string; 1829 struct sbuf *sbuf; 1830 char *buffer; 1831 size_t sz; 1832 int i, len, debug, error; 1833 1834 sc = (struct mps_softc *)arg1; 1835 1836 error = sysctl_wire_old_buffer(req, 0); 1837 if (error != 0) 1838 return (error); 1839 1840 sbuf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 1841 debug = sc->mps_debug; 1842 1843 sbuf_printf(sbuf, "%#x", debug); 1844 1845 sz = sizeof(mps_debug_strings) / sizeof(mps_debug_strings[0]); 1846 for (i = 0; i < sz; i++) { 1847 string = &mps_debug_strings[i]; 1848 if (debug & string->flag) 1849 sbuf_printf(sbuf, ",%s", string->name); 1850 } 1851 1852 error = sbuf_finish(sbuf); 1853 sbuf_delete(sbuf); 1854 1855 if (error || req->newptr == NULL) 1856 return (error); 1857 1858 len = req->newlen - req->newidx; 1859 if (len == 0) 1860 return (0); 1861 1862 buffer = malloc(len, M_MPT2, M_ZERO|M_WAITOK); 1863 error = SYSCTL_IN(req, buffer, len); 1864 1865 mps_parse_debug(sc, buffer); 1866 1867 free(buffer, M_MPT2); 1868 return (error); 1869 } 1870 1871 static void 1872 mps_parse_debug(struct mps_softc *sc, char *list) 1873 { 1874 struct mps_debug_string *string; 1875 enum mps_debug_level_combiner op; 1876 char *token, *endtoken; 1877 size_t sz; 1878 int flags, i; 1879 1880 if (list == NULL || *list == '\0') 1881 return; 1882 1883 if (*list == '+') { 1884 op = COMB_ADD; 1885 list++; 1886 } else if (*list == '-') { 1887 op = COMB_SUB; 1888 list++; 1889 } else 1890 op = COMB_NONE; 1891 if (*list == '\0') 1892 return; 1893 1894 flags = 0; 1895 sz = sizeof(mps_debug_strings) / sizeof(mps_debug_strings[0]); 1896 while ((token = strsep(&list, ":,")) != NULL) { 1897 1898 /* Handle integer flags */ 1899 flags |= strtol(token, &endtoken, 0); 1900 if (token != endtoken) 1901 continue; 1902 1903 /* Handle text flags */ 1904 for (i = 0; i < sz; i++) { 1905 string = &mps_debug_strings[i]; 1906 if (strcasecmp(token, string->name) == 0) { 1907 flags |= string->flag; 1908 break; 1909 } 1910 } 1911 } 1912 1913 switch (op) { 1914 case COMB_NONE: 1915 sc->mps_debug = flags; 1916 break; 1917 case COMB_ADD: 1918 sc->mps_debug |= flags; 1919 break; 1920 case COMB_SUB: 1921 sc->mps_debug &= (~flags); 1922 break; 1923 } 1924 1925 return; 1926 } 1927 1928 int 1929 mps_attach(struct mps_softc *sc) 1930 { 1931 int error; 1932 1933 MPS_FUNCTRACE(sc); 1934 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1935 1936 mtx_init(&sc->mps_mtx, "MPT2SAS lock", NULL, MTX_DEF); 1937 callout_init_mtx(&sc->periodic, &sc->mps_mtx, 0); 1938 callout_init_mtx(&sc->device_check_callout, &sc->mps_mtx, 0); 1939 TAILQ_INIT(&sc->event_list); 1940 timevalclear(&sc->lastfail); 1941 1942 if ((error = mps_transition_ready(sc)) != 0) { 1943 mps_dprint(sc, MPS_INIT|MPS_FAULT, "failed to transition " 1944 "ready\n"); 1945 return (error); 1946 } 1947 1948 sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPT2, 1949 M_ZERO|M_NOWAIT); 1950 if(!sc->facts) { 1951 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Cannot allocate memory, " 1952 "exit\n"); 1953 return (ENOMEM); 1954 } 1955 1956 /* 1957 * Get IOC Facts and allocate all structures based on this information. 1958 * A Diag Reset will also call mps_iocfacts_allocate and re-read the IOC 1959 * Facts. If relevant values have changed in IOC Facts, this function 1960 * will free all of the memory based on IOC Facts and reallocate that 1961 * memory. If this fails, any allocated memory should already be freed. 1962 */ 1963 if ((error = mps_iocfacts_allocate(sc, TRUE)) != 0) { 1964 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC Facts based allocation " 1965 "failed with error %d, exit\n", error); 1966 return (error); 1967 } 1968 1969 /* Start the periodic watchdog check on the IOC Doorbell */ 1970 mps_periodic(sc); 1971 1972 /* 1973 * The portenable will kick off discovery events that will drive the 1974 * rest of the initialization process. The CAM/SAS module will 1975 * hold up the boot sequence until discovery is complete. 1976 */ 1977 sc->mps_ich.ich_func = mps_startup; 1978 sc->mps_ich.ich_arg = sc; 1979 if (config_intrhook_establish(&sc->mps_ich) != 0) { 1980 mps_dprint(sc, MPS_INIT|MPS_ERROR, 1981 "Cannot establish MPS config hook\n"); 1982 error = EINVAL; 1983 } 1984 1985 /* 1986 * Allow IR to shutdown gracefully when shutdown occurs. 1987 */ 1988 sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final, 1989 mpssas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT); 1990 1991 if (sc->shutdown_eh == NULL) 1992 mps_dprint(sc, MPS_INIT|MPS_ERROR, 1993 "shutdown event registration failed\n"); 1994 1995 mps_setup_sysctl(sc); 1996 1997 sc->mps_flags |= MPS_FLAGS_ATTACH_DONE; 1998 mps_dprint(sc, MPS_INIT, "%s exit error= %d\n", __func__, error); 1999 2000 return (error); 2001 } 2002 2003 /* Run through any late-start handlers. */ 2004 static void 2005 mps_startup(void *arg) 2006 { 2007 struct mps_softc *sc; 2008 2009 sc = (struct mps_softc *)arg; 2010 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 2011 2012 mps_lock(sc); 2013 mps_unmask_intr(sc); 2014 2015 /* initialize device mapping tables */ 2016 mps_base_static_config_pages(sc); 2017 mps_mapping_initialize(sc); 2018 mpssas_startup(sc); 2019 mps_unlock(sc); 2020 2021 mps_dprint(sc, MPS_INIT, "disestablish config intrhook\n"); 2022 config_intrhook_disestablish(&sc->mps_ich); 2023 sc->mps_ich.ich_arg = NULL; 2024 2025 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 2026 } 2027 2028 /* Periodic watchdog. Is called with the driver lock already held. */ 2029 static void 2030 mps_periodic(void *arg) 2031 { 2032 struct mps_softc *sc; 2033 uint32_t db; 2034 2035 sc = (struct mps_softc *)arg; 2036 if (sc->mps_flags & MPS_FLAGS_SHUTDOWN) 2037 return; 2038 2039 db = mps_regread(sc, MPI2_DOORBELL_OFFSET); 2040 if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 2041 mps_dprint(sc, MPS_FAULT, "IOC Fault 0x%08x, Resetting\n", db); 2042 mps_reinit(sc); 2043 } 2044 2045 callout_reset(&sc->periodic, MPS_PERIODIC_DELAY * hz, mps_periodic, sc); 2046 } 2047 2048 static void 2049 mps_log_evt_handler(struct mps_softc *sc, uintptr_t data, 2050 MPI2_EVENT_NOTIFICATION_REPLY *event) 2051 { 2052 MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry; 2053 2054 MPS_DPRINT_EVENT(sc, generic, event); 2055 2056 switch (event->Event) { 2057 case MPI2_EVENT_LOG_DATA: 2058 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_DATA:\n"); 2059 if (sc->mps_debug & MPS_EVENT) 2060 hexdump(event->EventData, event->EventDataLength, NULL, 0); 2061 break; 2062 case MPI2_EVENT_LOG_ENTRY_ADDED: 2063 entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData; 2064 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_ENTRY_ADDED event " 2065 "0x%x Sequence %d:\n", entry->LogEntryQualifier, 2066 entry->LogSequence); 2067 break; 2068 default: 2069 break; 2070 } 2071 return; 2072 } 2073 2074 static int 2075 mps_attach_log(struct mps_softc *sc) 2076 { 2077 u32 events[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 2078 2079 bzero(events, 16); 2080 setbit(events, MPI2_EVENT_LOG_DATA); 2081 setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED); 2082 2083 mps_register_events(sc, events, mps_log_evt_handler, NULL, 2084 &sc->mps_log_eh); 2085 2086 return (0); 2087 } 2088 2089 static int 2090 mps_detach_log(struct mps_softc *sc) 2091 { 2092 2093 if (sc->mps_log_eh != NULL) 2094 mps_deregister_events(sc, sc->mps_log_eh); 2095 return (0); 2096 } 2097 2098 /* 2099 * Free all of the driver resources and detach submodules. Should be called 2100 * without the lock held. 2101 */ 2102 int 2103 mps_free(struct mps_softc *sc) 2104 { 2105 int error; 2106 2107 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 2108 /* Turn off the watchdog */ 2109 mps_lock(sc); 2110 sc->mps_flags |= MPS_FLAGS_SHUTDOWN; 2111 mps_unlock(sc); 2112 /* Lock must not be held for this */ 2113 callout_drain(&sc->periodic); 2114 callout_drain(&sc->device_check_callout); 2115 2116 if (((error = mps_detach_log(sc)) != 0) || 2117 ((error = mps_detach_sas(sc)) != 0)) { 2118 mps_dprint(sc, MPS_INIT|MPS_FAULT, "failed to detach " 2119 "subsystems, exit\n"); 2120 return (error); 2121 } 2122 2123 mps_detach_user(sc); 2124 2125 /* Put the IOC back in the READY state. */ 2126 mps_lock(sc); 2127 if ((error = mps_transition_ready(sc)) != 0) { 2128 mps_unlock(sc); 2129 return (error); 2130 } 2131 mps_unlock(sc); 2132 2133 if (sc->facts != NULL) 2134 free(sc->facts, M_MPT2); 2135 2136 /* 2137 * Free all buffers that are based on IOC Facts. A Diag Reset may need 2138 * to free these buffers too. 2139 */ 2140 mps_iocfacts_free(sc); 2141 2142 if (sc->sysctl_tree != NULL) 2143 sysctl_ctx_free(&sc->sysctl_ctx); 2144 2145 /* Deregister the shutdown function */ 2146 if (sc->shutdown_eh != NULL) 2147 EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh); 2148 2149 mtx_destroy(&sc->mps_mtx); 2150 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 2151 2152 return (0); 2153 } 2154 2155 static __inline void 2156 mps_complete_command(struct mps_softc *sc, struct mps_command *cm) 2157 { 2158 MPS_FUNCTRACE(sc); 2159 2160 if (cm == NULL) { 2161 mps_dprint(sc, MPS_ERROR, "Completing NULL command\n"); 2162 return; 2163 } 2164 2165 if (cm->cm_flags & MPS_CM_FLAGS_POLLED) 2166 cm->cm_flags |= MPS_CM_FLAGS_COMPLETE; 2167 2168 if (cm->cm_complete != NULL) { 2169 mps_dprint(sc, MPS_TRACE, 2170 "%s cm %p calling cm_complete %p data %p reply %p\n", 2171 __func__, cm, cm->cm_complete, cm->cm_complete_data, 2172 cm->cm_reply); 2173 cm->cm_complete(sc, cm); 2174 } 2175 2176 if (cm->cm_flags & MPS_CM_FLAGS_WAKEUP) { 2177 mps_dprint(sc, MPS_TRACE, "waking up %p\n", cm); 2178 wakeup(cm); 2179 } 2180 2181 if (cm->cm_sc->io_cmds_active != 0) { 2182 cm->cm_sc->io_cmds_active--; 2183 } else { 2184 mps_dprint(sc, MPS_ERROR, "Warning: io_cmds_active is " 2185 "out of sync - resynching to 0\n"); 2186 } 2187 } 2188 2189 2190 static void 2191 mps_sas_log_info(struct mps_softc *sc , u32 log_info) 2192 { 2193 union loginfo_type { 2194 u32 loginfo; 2195 struct { 2196 u32 subcode:16; 2197 u32 code:8; 2198 u32 originator:4; 2199 u32 bus_type:4; 2200 } dw; 2201 }; 2202 union loginfo_type sas_loginfo; 2203 char *originator_str = NULL; 2204 2205 sas_loginfo.loginfo = log_info; 2206 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 2207 return; 2208 2209 /* each nexus loss loginfo */ 2210 if (log_info == 0x31170000) 2211 return; 2212 2213 /* eat the loginfos associated with task aborts */ 2214 if ((log_info == 30050000 || log_info == 2215 0x31140000 || log_info == 0x31130000)) 2216 return; 2217 2218 switch (sas_loginfo.dw.originator) { 2219 case 0: 2220 originator_str = "IOP"; 2221 break; 2222 case 1: 2223 originator_str = "PL"; 2224 break; 2225 case 2: 2226 originator_str = "IR"; 2227 break; 2228 } 2229 2230 mps_dprint(sc, MPS_LOG, "log_info(0x%08x): originator(%s), " 2231 "code(0x%02x), sub_code(0x%04x)\n", log_info, 2232 originator_str, sas_loginfo.dw.code, 2233 sas_loginfo.dw.subcode); 2234 } 2235 2236 static void 2237 mps_display_reply_info(struct mps_softc *sc, uint8_t *reply) 2238 { 2239 MPI2DefaultReply_t *mpi_reply; 2240 u16 sc_status; 2241 2242 mpi_reply = (MPI2DefaultReply_t*)reply; 2243 sc_status = le16toh(mpi_reply->IOCStatus); 2244 if (sc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 2245 mps_sas_log_info(sc, le32toh(mpi_reply->IOCLogInfo)); 2246 } 2247 void 2248 mps_intr(void *data) 2249 { 2250 struct mps_softc *sc; 2251 uint32_t status; 2252 2253 sc = (struct mps_softc *)data; 2254 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2255 2256 /* 2257 * Check interrupt status register to flush the bus. This is 2258 * needed for both INTx interrupts and driver-driven polling 2259 */ 2260 status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 2261 if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0) 2262 return; 2263 2264 mps_lock(sc); 2265 mps_intr_locked(data); 2266 mps_unlock(sc); 2267 return; 2268 } 2269 2270 /* 2271 * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the 2272 * chip. Hopefully this theory is correct. 2273 */ 2274 void 2275 mps_intr_msi(void *data) 2276 { 2277 struct mps_softc *sc; 2278 2279 sc = (struct mps_softc *)data; 2280 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2281 mps_lock(sc); 2282 mps_intr_locked(data); 2283 mps_unlock(sc); 2284 return; 2285 } 2286 2287 /* 2288 * The locking is overly broad and simplistic, but easy to deal with for now. 2289 */ 2290 void 2291 mps_intr_locked(void *data) 2292 { 2293 MPI2_REPLY_DESCRIPTORS_UNION *desc; 2294 struct mps_softc *sc; 2295 struct mps_command *cm = NULL; 2296 uint8_t flags; 2297 u_int pq; 2298 MPI2_DIAG_RELEASE_REPLY *rel_rep; 2299 mps_fw_diagnostic_buffer_t *pBuffer; 2300 2301 sc = (struct mps_softc *)data; 2302 2303 pq = sc->replypostindex; 2304 mps_dprint(sc, MPS_TRACE, 2305 "%s sc %p starting with replypostindex %u\n", 2306 __func__, sc, sc->replypostindex); 2307 2308 for ( ;; ) { 2309 cm = NULL; 2310 desc = &sc->post_queue[sc->replypostindex]; 2311 flags = desc->Default.ReplyFlags & 2312 MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 2313 if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 2314 || (le32toh(desc->Words.High) == 0xffffffff)) 2315 break; 2316 2317 /* increment the replypostindex now, so that event handlers 2318 * and cm completion handlers which decide to do a diag 2319 * reset can zero it without it getting incremented again 2320 * afterwards, and we break out of this loop on the next 2321 * iteration since the reply post queue has been cleared to 2322 * 0xFF and all descriptors look unused (which they are). 2323 */ 2324 if (++sc->replypostindex >= sc->pqdepth) 2325 sc->replypostindex = 0; 2326 2327 switch (flags) { 2328 case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS: 2329 cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)]; 2330 KASSERT(cm->cm_state == MPS_CM_STATE_INQUEUE, 2331 ("command not inqueue\n")); 2332 cm->cm_state = MPS_CM_STATE_BUSY; 2333 cm->cm_reply = NULL; 2334 break; 2335 case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY: 2336 { 2337 uint32_t baddr; 2338 uint8_t *reply; 2339 2340 /* 2341 * Re-compose the reply address from the address 2342 * sent back from the chip. The ReplyFrameAddress 2343 * is the lower 32 bits of the physical address of 2344 * particular reply frame. Convert that address to 2345 * host format, and then use that to provide the 2346 * offset against the virtual address base 2347 * (sc->reply_frames). 2348 */ 2349 baddr = le32toh(desc->AddressReply.ReplyFrameAddress); 2350 reply = sc->reply_frames + 2351 (baddr - ((uint32_t)sc->reply_busaddr)); 2352 /* 2353 * Make sure the reply we got back is in a valid 2354 * range. If not, go ahead and panic here, since 2355 * we'll probably panic as soon as we deference the 2356 * reply pointer anyway. 2357 */ 2358 if ((reply < sc->reply_frames) 2359 || (reply > (sc->reply_frames + 2360 (sc->fqdepth * sc->replyframesz)))) { 2361 printf("%s: WARNING: reply %p out of range!\n", 2362 __func__, reply); 2363 printf("%s: reply_frames %p, fqdepth %d, " 2364 "frame size %d\n", __func__, 2365 sc->reply_frames, sc->fqdepth, 2366 sc->replyframesz); 2367 printf("%s: baddr %#x,\n", __func__, baddr); 2368 /* LSI-TODO. See Linux Code for Graceful exit */ 2369 panic("Reply address out of range"); 2370 } 2371 if (le16toh(desc->AddressReply.SMID) == 0) { 2372 if (((MPI2_DEFAULT_REPLY *)reply)->Function == 2373 MPI2_FUNCTION_DIAG_BUFFER_POST) { 2374 /* 2375 * If SMID is 0 for Diag Buffer Post, 2376 * this implies that the reply is due to 2377 * a release function with a status that 2378 * the buffer has been released. Set 2379 * the buffer flags accordingly. 2380 */ 2381 rel_rep = 2382 (MPI2_DIAG_RELEASE_REPLY *)reply; 2383 if ((le16toh(rel_rep->IOCStatus) & 2384 MPI2_IOCSTATUS_MASK) == 2385 MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED) 2386 { 2387 pBuffer = 2388 &sc->fw_diag_buffer_list[ 2389 rel_rep->BufferType]; 2390 pBuffer->valid_data = TRUE; 2391 pBuffer->owned_by_firmware = 2392 FALSE; 2393 pBuffer->immediate = FALSE; 2394 } 2395 } else 2396 mps_dispatch_event(sc, baddr, 2397 (MPI2_EVENT_NOTIFICATION_REPLY *) 2398 reply); 2399 } else { 2400 cm = &sc->commands[ 2401 le16toh(desc->AddressReply.SMID)]; 2402 KASSERT(cm->cm_state == MPS_CM_STATE_INQUEUE, 2403 ("command not inqueue\n")); 2404 cm->cm_state = MPS_CM_STATE_BUSY; 2405 cm->cm_reply = reply; 2406 cm->cm_reply_data = le32toh( 2407 desc->AddressReply.ReplyFrameAddress); 2408 } 2409 break; 2410 } 2411 case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS: 2412 case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER: 2413 case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS: 2414 default: 2415 /* Unhandled */ 2416 mps_dprint(sc, MPS_ERROR, "Unhandled reply 0x%x\n", 2417 desc->Default.ReplyFlags); 2418 cm = NULL; 2419 break; 2420 } 2421 2422 2423 if (cm != NULL) { 2424 // Print Error reply frame 2425 if (cm->cm_reply) 2426 mps_display_reply_info(sc,cm->cm_reply); 2427 mps_complete_command(sc, cm); 2428 } 2429 2430 desc->Words.Low = 0xffffffff; 2431 desc->Words.High = 0xffffffff; 2432 } 2433 2434 if (pq != sc->replypostindex) { 2435 mps_dprint(sc, MPS_TRACE, "%s sc %p writing postindex %d\n", 2436 __func__, sc, sc->replypostindex); 2437 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 2438 sc->replypostindex); 2439 } 2440 2441 return; 2442 } 2443 2444 static void 2445 mps_dispatch_event(struct mps_softc *sc, uintptr_t data, 2446 MPI2_EVENT_NOTIFICATION_REPLY *reply) 2447 { 2448 struct mps_event_handle *eh; 2449 int event, handled = 0; 2450 2451 event = le16toh(reply->Event); 2452 TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2453 if (isset(eh->mask, event)) { 2454 eh->callback(sc, data, reply); 2455 handled++; 2456 } 2457 } 2458 2459 if (handled == 0) 2460 mps_dprint(sc, MPS_EVENT, "Unhandled event 0x%x\n", le16toh(event)); 2461 2462 /* 2463 * This is the only place that the event/reply should be freed. 2464 * Anything wanting to hold onto the event data should have 2465 * already copied it into their own storage. 2466 */ 2467 mps_free_reply(sc, data); 2468 } 2469 2470 static void 2471 mps_reregister_events_complete(struct mps_softc *sc, struct mps_command *cm) 2472 { 2473 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2474 2475 if (cm->cm_reply) 2476 MPS_DPRINT_EVENT(sc, generic, 2477 (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply); 2478 2479 mps_free_command(sc, cm); 2480 2481 /* next, send a port enable */ 2482 mpssas_startup(sc); 2483 } 2484 2485 /* 2486 * For both register_events and update_events, the caller supplies a bitmap 2487 * of events that it _wants_. These functions then turn that into a bitmask 2488 * suitable for the controller. 2489 */ 2490 int 2491 mps_register_events(struct mps_softc *sc, u32 *mask, 2492 mps_evt_callback_t *cb, void *data, struct mps_event_handle **handle) 2493 { 2494 struct mps_event_handle *eh; 2495 int error = 0; 2496 2497 eh = malloc(sizeof(struct mps_event_handle), M_MPT2, M_WAITOK|M_ZERO); 2498 if(!eh) { 2499 mps_dprint(sc, MPS_ERROR, "Cannot allocate event memory\n"); 2500 return (ENOMEM); 2501 } 2502 eh->callback = cb; 2503 eh->data = data; 2504 TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list); 2505 if (mask != NULL) 2506 error = mps_update_events(sc, eh, mask); 2507 *handle = eh; 2508 2509 return (error); 2510 } 2511 2512 int 2513 mps_update_events(struct mps_softc *sc, struct mps_event_handle *handle, 2514 u32 *mask) 2515 { 2516 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2517 MPI2_EVENT_NOTIFICATION_REPLY *reply = NULL; 2518 struct mps_command *cm; 2519 int error, i; 2520 2521 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2522 2523 if ((mask != NULL) && (handle != NULL)) 2524 bcopy(mask, &handle->mask[0], sizeof(u32) * 2525 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2526 2527 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2528 sc->event_mask[i] = -1; 2529 2530 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2531 sc->event_mask[i] &= ~handle->mask[i]; 2532 2533 2534 if ((cm = mps_alloc_command(sc)) == NULL) 2535 return (EBUSY); 2536 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2537 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2538 evtreq->MsgFlags = 0; 2539 evtreq->SASBroadcastPrimitiveMasks = 0; 2540 #ifdef MPS_DEBUG_ALL_EVENTS 2541 { 2542 u_char fullmask[16]; 2543 memset(fullmask, 0x00, 16); 2544 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) * 2545 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2546 } 2547 #else 2548 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2549 evtreq->EventMasks[i] = 2550 htole32(sc->event_mask[i]); 2551 #endif 2552 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2553 cm->cm_data = NULL; 2554 2555 error = mps_wait_command(sc, &cm, 60, 0); 2556 if (cm != NULL) 2557 reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply; 2558 if ((reply == NULL) || 2559 (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 2560 error = ENXIO; 2561 2562 if (reply) 2563 MPS_DPRINT_EVENT(sc, generic, reply); 2564 2565 mps_dprint(sc, MPS_TRACE, "%s finished error %d\n", __func__, error); 2566 2567 if (cm != NULL) 2568 mps_free_command(sc, cm); 2569 return (error); 2570 } 2571 2572 static int 2573 mps_reregister_events(struct mps_softc *sc) 2574 { 2575 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2576 struct mps_command *cm; 2577 struct mps_event_handle *eh; 2578 int error, i; 2579 2580 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2581 2582 /* first, reregister events */ 2583 2584 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2585 sc->event_mask[i] = -1; 2586 2587 TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2588 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2589 sc->event_mask[i] &= ~eh->mask[i]; 2590 } 2591 2592 if ((cm = mps_alloc_command(sc)) == NULL) 2593 return (EBUSY); 2594 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2595 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2596 evtreq->MsgFlags = 0; 2597 evtreq->SASBroadcastPrimitiveMasks = 0; 2598 #ifdef MPS_DEBUG_ALL_EVENTS 2599 { 2600 u_char fullmask[16]; 2601 memset(fullmask, 0x00, 16); 2602 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) * 2603 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2604 } 2605 #else 2606 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2607 evtreq->EventMasks[i] = 2608 htole32(sc->event_mask[i]); 2609 #endif 2610 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2611 cm->cm_data = NULL; 2612 cm->cm_complete = mps_reregister_events_complete; 2613 2614 error = mps_map_command(sc, cm); 2615 2616 mps_dprint(sc, MPS_TRACE, "%s finished with error %d\n", __func__, 2617 error); 2618 return (error); 2619 } 2620 2621 void 2622 mps_deregister_events(struct mps_softc *sc, struct mps_event_handle *handle) 2623 { 2624 2625 TAILQ_REMOVE(&sc->event_list, handle, eh_list); 2626 free(handle, M_MPT2); 2627 } 2628 2629 /* 2630 * Add a chain element as the next SGE for the specified command. 2631 * Reset cm_sge and cm_sgesize to indicate all the available space. 2632 */ 2633 static int 2634 mps_add_chain(struct mps_command *cm) 2635 { 2636 MPI2_SGE_CHAIN32 *sgc; 2637 struct mps_chain *chain; 2638 u_int space; 2639 2640 if (cm->cm_sglsize < MPS_SGC_SIZE) 2641 panic("MPS: Need SGE Error Code\n"); 2642 2643 chain = mps_alloc_chain(cm->cm_sc); 2644 if (chain == NULL) 2645 return (ENOBUFS); 2646 2647 space = cm->cm_sc->reqframesz; 2648 2649 /* 2650 * Note: a double-linked list is used to make it easier to 2651 * walk for debugging. 2652 */ 2653 TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link); 2654 2655 sgc = (MPI2_SGE_CHAIN32 *)&cm->cm_sge->MpiChain; 2656 sgc->Length = htole16(space); 2657 sgc->NextChainOffset = 0; 2658 /* TODO Looks like bug in Setting sgc->Flags. 2659 * sgc->Flags = ( MPI2_SGE_FLAGS_CHAIN_ELEMENT | MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 2660 * MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT 2661 * This is fine.. because we are not using simple element. In case of 2662 * MPI2_SGE_CHAIN32, we have separate Length and Flags feild. 2663 */ 2664 sgc->Flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT; 2665 sgc->Address = htole32(chain->chain_busaddr); 2666 2667 cm->cm_sge = (MPI2_SGE_IO_UNION *)&chain->chain->MpiSimple; 2668 cm->cm_sglsize = space; 2669 return (0); 2670 } 2671 2672 /* 2673 * Add one scatter-gather element (chain, simple, transaction context) 2674 * to the scatter-gather list for a command. Maintain cm_sglsize and 2675 * cm_sge as the remaining size and pointer to the next SGE to fill 2676 * in, respectively. 2677 */ 2678 int 2679 mps_push_sge(struct mps_command *cm, void *sgep, size_t len, int segsleft) 2680 { 2681 MPI2_SGE_TRANSACTION_UNION *tc = sgep; 2682 MPI2_SGE_SIMPLE64 *sge = sgep; 2683 int error, type; 2684 uint32_t saved_buf_len, saved_address_low, saved_address_high; 2685 2686 type = (tc->Flags & MPI2_SGE_FLAGS_ELEMENT_MASK); 2687 2688 #ifdef INVARIANTS 2689 switch (type) { 2690 case MPI2_SGE_FLAGS_TRANSACTION_ELEMENT: { 2691 if (len != tc->DetailsLength + 4) 2692 panic("TC %p length %u or %zu?", tc, 2693 tc->DetailsLength + 4, len); 2694 } 2695 break; 2696 case MPI2_SGE_FLAGS_CHAIN_ELEMENT: 2697 /* Driver only uses 32-bit chain elements */ 2698 if (len != MPS_SGC_SIZE) 2699 panic("CHAIN %p length %u or %zu?", sgep, 2700 MPS_SGC_SIZE, len); 2701 break; 2702 case MPI2_SGE_FLAGS_SIMPLE_ELEMENT: 2703 /* Driver only uses 64-bit SGE simple elements */ 2704 if (len != MPS_SGE64_SIZE) 2705 panic("SGE simple %p length %u or %zu?", sge, 2706 MPS_SGE64_SIZE, len); 2707 if (((le32toh(sge->FlagsLength) >> MPI2_SGE_FLAGS_SHIFT) & 2708 MPI2_SGE_FLAGS_ADDRESS_SIZE) == 0) 2709 panic("SGE simple %p not marked 64-bit?", sge); 2710 2711 break; 2712 default: 2713 panic("Unexpected SGE %p, flags %02x", tc, tc->Flags); 2714 } 2715 #endif 2716 2717 /* 2718 * case 1: 1 more segment, enough room for it 2719 * case 2: 2 more segments, enough room for both 2720 * case 3: >=2 more segments, only enough room for 1 and a chain 2721 * case 4: >=1 more segment, enough room for only a chain 2722 * case 5: >=1 more segment, no room for anything (error) 2723 */ 2724 2725 /* 2726 * There should be room for at least a chain element, or this 2727 * code is buggy. Case (5). 2728 */ 2729 if (cm->cm_sglsize < MPS_SGC_SIZE) 2730 panic("MPS: Need SGE Error Code\n"); 2731 2732 if (segsleft >= 1 && cm->cm_sglsize < len + MPS_SGC_SIZE) { 2733 /* 2734 * 1 or more segment, enough room for only a chain. 2735 * Hope the previous element wasn't a Simple entry 2736 * that needed to be marked with 2737 * MPI2_SGE_FLAGS_LAST_ELEMENT. Case (4). 2738 */ 2739 if ((error = mps_add_chain(cm)) != 0) 2740 return (error); 2741 } 2742 2743 if (segsleft >= 2 && 2744 cm->cm_sglsize < len + MPS_SGC_SIZE + MPS_SGE64_SIZE) { 2745 /* 2746 * There are 2 or more segments left to add, and only 2747 * enough room for 1 and a chain. Case (3). 2748 * 2749 * Mark as last element in this chain if necessary. 2750 */ 2751 if (type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { 2752 sge->FlagsLength |= htole32( 2753 MPI2_SGE_FLAGS_LAST_ELEMENT << MPI2_SGE_FLAGS_SHIFT); 2754 } 2755 2756 /* 2757 * Add the item then a chain. Do the chain now, 2758 * rather than on the next iteration, to simplify 2759 * understanding the code. 2760 */ 2761 cm->cm_sglsize -= len; 2762 bcopy(sgep, cm->cm_sge, len); 2763 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2764 return (mps_add_chain(cm)); 2765 } 2766 2767 #ifdef INVARIANTS 2768 /* Case 1: 1 more segment, enough room for it. */ 2769 if (segsleft == 1 && cm->cm_sglsize < len) 2770 panic("1 seg left and no room? %u versus %zu", 2771 cm->cm_sglsize, len); 2772 2773 /* Case 2: 2 more segments, enough room for both */ 2774 if (segsleft == 2 && cm->cm_sglsize < len + MPS_SGE64_SIZE) 2775 panic("2 segs left and no room? %u versus %zu", 2776 cm->cm_sglsize, len); 2777 #endif 2778 2779 if (segsleft == 1 && type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { 2780 /* 2781 * If this is a bi-directional request, need to account for that 2782 * here. Save the pre-filled sge values. These will be used 2783 * either for the 2nd SGL or for a single direction SGL. If 2784 * cm_out_len is non-zero, this is a bi-directional request, so 2785 * fill in the OUT SGL first, then the IN SGL, otherwise just 2786 * fill in the IN SGL. Note that at this time, when filling in 2787 * 2 SGL's for a bi-directional request, they both use the same 2788 * DMA buffer (same cm command). 2789 */ 2790 saved_buf_len = le32toh(sge->FlagsLength) & 0x00FFFFFF; 2791 saved_address_low = sge->Address.Low; 2792 saved_address_high = sge->Address.High; 2793 if (cm->cm_out_len) { 2794 sge->FlagsLength = htole32(cm->cm_out_len | 2795 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2796 MPI2_SGE_FLAGS_END_OF_BUFFER | 2797 MPI2_SGE_FLAGS_HOST_TO_IOC | 2798 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2799 MPI2_SGE_FLAGS_SHIFT)); 2800 cm->cm_sglsize -= len; 2801 bcopy(sgep, cm->cm_sge, len); 2802 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge 2803 + len); 2804 } 2805 saved_buf_len |= 2806 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2807 MPI2_SGE_FLAGS_END_OF_BUFFER | 2808 MPI2_SGE_FLAGS_LAST_ELEMENT | 2809 MPI2_SGE_FLAGS_END_OF_LIST | 2810 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2811 MPI2_SGE_FLAGS_SHIFT); 2812 if (cm->cm_flags & MPS_CM_FLAGS_DATAIN) { 2813 saved_buf_len |= 2814 ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) << 2815 MPI2_SGE_FLAGS_SHIFT); 2816 } else { 2817 saved_buf_len |= 2818 ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) << 2819 MPI2_SGE_FLAGS_SHIFT); 2820 } 2821 sge->FlagsLength = htole32(saved_buf_len); 2822 sge->Address.Low = saved_address_low; 2823 sge->Address.High = saved_address_high; 2824 } 2825 2826 cm->cm_sglsize -= len; 2827 bcopy(sgep, cm->cm_sge, len); 2828 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2829 return (0); 2830 } 2831 2832 /* 2833 * Add one dma segment to the scatter-gather list for a command. 2834 */ 2835 int 2836 mps_add_dmaseg(struct mps_command *cm, vm_paddr_t pa, size_t len, u_int flags, 2837 int segsleft) 2838 { 2839 MPI2_SGE_SIMPLE64 sge; 2840 2841 /* 2842 * This driver always uses 64-bit address elements for simplicity. 2843 */ 2844 bzero(&sge, sizeof(sge)); 2845 flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2846 MPI2_SGE_FLAGS_64_BIT_ADDRESSING; 2847 sge.FlagsLength = htole32(len | (flags << MPI2_SGE_FLAGS_SHIFT)); 2848 mps_from_u64(pa, &sge.Address); 2849 2850 return (mps_push_sge(cm, &sge, sizeof sge, segsleft)); 2851 } 2852 2853 static void 2854 mps_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 2855 { 2856 struct mps_softc *sc; 2857 struct mps_command *cm; 2858 u_int i, dir, sflags; 2859 2860 cm = (struct mps_command *)arg; 2861 sc = cm->cm_sc; 2862 2863 /* 2864 * In this case, just print out a warning and let the chip tell the 2865 * user they did the wrong thing. 2866 */ 2867 if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) { 2868 mps_dprint(sc, MPS_ERROR, 2869 "%s: warning: busdma returned %d segments, " 2870 "more than the %d allowed\n", __func__, nsegs, 2871 cm->cm_max_segs); 2872 } 2873 2874 /* 2875 * Set up DMA direction flags. Bi-directional requests are also handled 2876 * here. In that case, both direction flags will be set. 2877 */ 2878 sflags = 0; 2879 if (cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) { 2880 /* 2881 * We have to add a special case for SMP passthrough, there 2882 * is no easy way to generically handle it. The first 2883 * S/G element is used for the command (therefore the 2884 * direction bit needs to be set). The second one is used 2885 * for the reply. We'll leave it to the caller to make 2886 * sure we only have two buffers. 2887 */ 2888 /* 2889 * Even though the busdma man page says it doesn't make 2890 * sense to have both direction flags, it does in this case. 2891 * We have one s/g element being accessed in each direction. 2892 */ 2893 dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD; 2894 2895 /* 2896 * Set the direction flag on the first buffer in the SMP 2897 * passthrough request. We'll clear it for the second one. 2898 */ 2899 sflags |= MPI2_SGE_FLAGS_DIRECTION | 2900 MPI2_SGE_FLAGS_END_OF_BUFFER; 2901 } else if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) { 2902 sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC; 2903 dir = BUS_DMASYNC_PREWRITE; 2904 } else 2905 dir = BUS_DMASYNC_PREREAD; 2906 2907 for (i = 0; i < nsegs; i++) { 2908 if ((cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) && (i != 0)) { 2909 sflags &= ~MPI2_SGE_FLAGS_DIRECTION; 2910 } 2911 error = mps_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len, 2912 sflags, nsegs - i); 2913 if (error != 0) { 2914 /* Resource shortage, roll back! */ 2915 if (ratecheck(&sc->lastfail, &mps_chainfail_interval)) 2916 mps_dprint(sc, MPS_INFO, "Out of chain frames, " 2917 "consider increasing hw.mps.max_chains.\n"); 2918 cm->cm_flags |= MPS_CM_FLAGS_CHAIN_FAILED; 2919 mps_complete_command(sc, cm); 2920 return; 2921 } 2922 } 2923 2924 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir); 2925 mps_enqueue_request(sc, cm); 2926 2927 return; 2928 } 2929 2930 static void 2931 mps_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize, 2932 int error) 2933 { 2934 mps_data_cb(arg, segs, nsegs, error); 2935 } 2936 2937 /* 2938 * This is the routine to enqueue commands ansynchronously. 2939 * Note that the only error path here is from bus_dmamap_load(), which can 2940 * return EINPROGRESS if it is waiting for resources. Other than this, it's 2941 * assumed that if you have a command in-hand, then you have enough credits 2942 * to use it. 2943 */ 2944 int 2945 mps_map_command(struct mps_softc *sc, struct mps_command *cm) 2946 { 2947 int error = 0; 2948 2949 if (cm->cm_flags & MPS_CM_FLAGS_USE_UIO) { 2950 error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap, 2951 &cm->cm_uio, mps_data_cb2, cm, 0); 2952 } else if (cm->cm_flags & MPS_CM_FLAGS_USE_CCB) { 2953 error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap, 2954 cm->cm_data, mps_data_cb, cm, 0); 2955 } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) { 2956 error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap, 2957 cm->cm_data, cm->cm_length, mps_data_cb, cm, 0); 2958 } else { 2959 /* Add a zero-length element as needed */ 2960 if (cm->cm_sge != NULL) 2961 mps_add_dmaseg(cm, 0, 0, 0, 1); 2962 mps_enqueue_request(sc, cm); 2963 } 2964 2965 return (error); 2966 } 2967 2968 /* 2969 * This is the routine to enqueue commands synchronously. An error of 2970 * EINPROGRESS from mps_map_command() is ignored since the command will 2971 * be executed and enqueued automatically. Other errors come from msleep(). 2972 */ 2973 int 2974 mps_wait_command(struct mps_softc *sc, struct mps_command **cmp, int timeout, 2975 int sleep_flag) 2976 { 2977 int error, rc; 2978 struct timeval cur_time, start_time; 2979 struct mps_command *cm = *cmp; 2980 2981 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) 2982 return EBUSY; 2983 2984 cm->cm_complete = NULL; 2985 cm->cm_flags |= MPS_CM_FLAGS_POLLED; 2986 error = mps_map_command(sc, cm); 2987 if ((error != 0) && (error != EINPROGRESS)) 2988 return (error); 2989 2990 /* 2991 * Check for context and wait for 50 mSec at a time until time has 2992 * expired or the command has finished. If msleep can't be used, need 2993 * to poll. 2994 */ 2995 if (curthread->td_no_sleeping != 0) 2996 sleep_flag = NO_SLEEP; 2997 getmicrouptime(&start_time); 2998 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) { 2999 cm->cm_flags |= MPS_CM_FLAGS_WAKEUP; 3000 error = msleep(cm, &sc->mps_mtx, 0, "mpswait", timeout*hz); 3001 if (error == EWOULDBLOCK) { 3002 /* 3003 * Record the actual elapsed time in the case of a 3004 * timeout for the message below. 3005 */ 3006 getmicrouptime(&cur_time); 3007 timevalsub(&cur_time, &start_time); 3008 } 3009 } else { 3010 while ((cm->cm_flags & MPS_CM_FLAGS_COMPLETE) == 0) { 3011 mps_intr_locked(sc); 3012 if (sleep_flag == CAN_SLEEP) 3013 pause("mpswait", hz/20); 3014 else 3015 DELAY(50000); 3016 3017 getmicrouptime(&cur_time); 3018 timevalsub(&cur_time, &start_time); 3019 if (cur_time.tv_sec > timeout) { 3020 error = EWOULDBLOCK; 3021 break; 3022 } 3023 } 3024 } 3025 3026 if (error == EWOULDBLOCK) { 3027 mps_dprint(sc, MPS_FAULT, "Calling Reinit from %s, timeout=%d," 3028 " elapsed=%jd\n", __func__, timeout, 3029 (intmax_t)cur_time.tv_sec); 3030 rc = mps_reinit(sc); 3031 mps_dprint(sc, MPS_FAULT, "Reinit %s\n", (rc == 0) ? "success" : 3032 "failed"); 3033 if (sc->mps_flags & MPS_FLAGS_REALLOCATED) { 3034 /* 3035 * Tell the caller that we freed the command in a 3036 * reinit. 3037 */ 3038 *cmp = NULL; 3039 } 3040 error = ETIMEDOUT; 3041 } 3042 return (error); 3043 } 3044 3045 /* 3046 * The MPT driver had a verbose interface for config pages. In this driver, 3047 * reduce it to much simpler terms, similar to the Linux driver. 3048 */ 3049 int 3050 mps_read_config_page(struct mps_softc *sc, struct mps_config_params *params) 3051 { 3052 MPI2_CONFIG_REQUEST *req; 3053 struct mps_command *cm; 3054 int error; 3055 3056 if (sc->mps_flags & MPS_FLAGS_BUSY) { 3057 return (EBUSY); 3058 } 3059 3060 cm = mps_alloc_command(sc); 3061 if (cm == NULL) { 3062 return (EBUSY); 3063 } 3064 3065 req = (MPI2_CONFIG_REQUEST *)cm->cm_req; 3066 req->Function = MPI2_FUNCTION_CONFIG; 3067 req->Action = params->action; 3068 req->SGLFlags = 0; 3069 req->ChainOffset = 0; 3070 req->PageAddress = params->page_address; 3071 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 3072 MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr; 3073 3074 hdr = ¶ms->hdr.Ext; 3075 req->ExtPageType = hdr->ExtPageType; 3076 req->ExtPageLength = hdr->ExtPageLength; 3077 req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED; 3078 req->Header.PageLength = 0; /* Must be set to zero */ 3079 req->Header.PageNumber = hdr->PageNumber; 3080 req->Header.PageVersion = hdr->PageVersion; 3081 } else { 3082 MPI2_CONFIG_PAGE_HEADER *hdr; 3083 3084 hdr = ¶ms->hdr.Struct; 3085 req->Header.PageType = hdr->PageType; 3086 req->Header.PageNumber = hdr->PageNumber; 3087 req->Header.PageLength = hdr->PageLength; 3088 req->Header.PageVersion = hdr->PageVersion; 3089 } 3090 3091 cm->cm_data = params->buffer; 3092 cm->cm_length = params->length; 3093 if (cm->cm_data != NULL) { 3094 cm->cm_sge = &req->PageBufferSGE; 3095 cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION); 3096 cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_DATAIN; 3097 } else 3098 cm->cm_sge = NULL; 3099 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 3100 3101 cm->cm_complete_data = params; 3102 if (params->callback != NULL) { 3103 cm->cm_complete = mps_config_complete; 3104 return (mps_map_command(sc, cm)); 3105 } else { 3106 error = mps_wait_command(sc, &cm, 0, CAN_SLEEP); 3107 if (error) { 3108 mps_dprint(sc, MPS_FAULT, 3109 "Error %d reading config page\n", error); 3110 if (cm != NULL) 3111 mps_free_command(sc, cm); 3112 return (error); 3113 } 3114 mps_config_complete(sc, cm); 3115 } 3116 3117 return (0); 3118 } 3119 3120 int 3121 mps_write_config_page(struct mps_softc *sc, struct mps_config_params *params) 3122 { 3123 return (EINVAL); 3124 } 3125 3126 static void 3127 mps_config_complete(struct mps_softc *sc, struct mps_command *cm) 3128 { 3129 MPI2_CONFIG_REPLY *reply; 3130 struct mps_config_params *params; 3131 3132 MPS_FUNCTRACE(sc); 3133 params = cm->cm_complete_data; 3134 3135 if (cm->cm_data != NULL) { 3136 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, 3137 BUS_DMASYNC_POSTREAD); 3138 bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap); 3139 } 3140 3141 /* 3142 * XXX KDM need to do more error recovery? This results in the 3143 * device in question not getting probed. 3144 */ 3145 if ((cm->cm_flags & MPS_CM_FLAGS_ERROR_MASK) != 0) { 3146 params->status = MPI2_IOCSTATUS_BUSY; 3147 goto done; 3148 } 3149 3150 reply = (MPI2_CONFIG_REPLY *)cm->cm_reply; 3151 if (reply == NULL) { 3152 params->status = MPI2_IOCSTATUS_BUSY; 3153 goto done; 3154 } 3155 params->status = reply->IOCStatus; 3156 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 3157 params->hdr.Ext.ExtPageType = reply->ExtPageType; 3158 params->hdr.Ext.ExtPageLength = reply->ExtPageLength; 3159 params->hdr.Ext.PageType = reply->Header.PageType; 3160 params->hdr.Ext.PageNumber = reply->Header.PageNumber; 3161 params->hdr.Ext.PageVersion = reply->Header.PageVersion; 3162 } else { 3163 params->hdr.Struct.PageType = reply->Header.PageType; 3164 params->hdr.Struct.PageNumber = reply->Header.PageNumber; 3165 params->hdr.Struct.PageLength = reply->Header.PageLength; 3166 params->hdr.Struct.PageVersion = reply->Header.PageVersion; 3167 } 3168 3169 done: 3170 mps_free_command(sc, cm); 3171 if (params->callback != NULL) 3172 params->callback(sc, params); 3173 3174 return; 3175 } 3176