1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2009 Yahoo! Inc. 5 * Copyright (c) 2011-2015 LSI Corp. 6 * Copyright (c) 2013-2015 Avago Technologies 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 31 * 32 * $FreeBSD$ 33 */ 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD$"); 37 38 /* Communications core for Avago Technologies (LSI) MPT2 */ 39 40 /* TODO Move headers to mpsvar */ 41 #include <sys/types.h> 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/selinfo.h> 46 #include <sys/lock.h> 47 #include <sys/mutex.h> 48 #include <sys/module.h> 49 #include <sys/bus.h> 50 #include <sys/conf.h> 51 #include <sys/bio.h> 52 #include <sys/malloc.h> 53 #include <sys/uio.h> 54 #include <sys/sysctl.h> 55 #include <sys/smp.h> 56 #include <sys/queue.h> 57 #include <sys/kthread.h> 58 #include <sys/taskqueue.h> 59 #include <sys/endian.h> 60 #include <sys/eventhandler.h> 61 #include <sys/sbuf.h> 62 63 #include <machine/bus.h> 64 #include <machine/resource.h> 65 #include <sys/rman.h> 66 #include <sys/proc.h> 67 68 #include <dev/pci/pcivar.h> 69 70 #include <cam/cam.h> 71 #include <cam/scsi/scsi_all.h> 72 73 #include <dev/mps/mpi/mpi2_type.h> 74 #include <dev/mps/mpi/mpi2.h> 75 #include <dev/mps/mpi/mpi2_ioc.h> 76 #include <dev/mps/mpi/mpi2_sas.h> 77 #include <dev/mps/mpi/mpi2_cnfg.h> 78 #include <dev/mps/mpi/mpi2_init.h> 79 #include <dev/mps/mpi/mpi2_tool.h> 80 #include <dev/mps/mps_ioctl.h> 81 #include <dev/mps/mpsvar.h> 82 #include <dev/mps/mps_table.h> 83 84 static int mps_diag_reset(struct mps_softc *sc, int sleep_flag); 85 static int mps_init_queues(struct mps_softc *sc); 86 static void mps_resize_queues(struct mps_softc *sc); 87 static int mps_message_unit_reset(struct mps_softc *sc, int sleep_flag); 88 static int mps_transition_operational(struct mps_softc *sc); 89 static int mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching); 90 static void mps_iocfacts_free(struct mps_softc *sc); 91 static void mps_startup(void *arg); 92 static int mps_send_iocinit(struct mps_softc *sc); 93 static int mps_alloc_queues(struct mps_softc *sc); 94 static int mps_alloc_hw_queues(struct mps_softc *sc); 95 static int mps_alloc_replies(struct mps_softc *sc); 96 static int mps_alloc_requests(struct mps_softc *sc); 97 static int mps_attach_log(struct mps_softc *sc); 98 static __inline void mps_complete_command(struct mps_softc *sc, 99 struct mps_command *cm); 100 static void mps_dispatch_event(struct mps_softc *sc, uintptr_t data, 101 MPI2_EVENT_NOTIFICATION_REPLY *reply); 102 static void mps_config_complete(struct mps_softc *sc, struct mps_command *cm); 103 static void mps_periodic(void *); 104 static int mps_reregister_events(struct mps_softc *sc); 105 static void mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm); 106 static int mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts); 107 static int mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag); 108 static int mps_debug_sysctl(SYSCTL_HANDLER_ARGS); 109 static void mps_parse_debug(struct mps_softc *sc, char *list); 110 111 SYSCTL_NODE(_hw, OID_AUTO, mps, CTLFLAG_RD, 0, "MPS Driver Parameters"); 112 113 MALLOC_DEFINE(M_MPT2, "mps", "mpt2 driver memory"); 114 MALLOC_DECLARE(M_MPSUSER); 115 116 /* 117 * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of 118 * any state and back to its initialization state machine. 119 */ 120 static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d }; 121 122 /* Added this union to smoothly convert le64toh cm->cm_desc.Words. 123 * Compiler only support unint64_t to be passed as argument. 124 * Otherwise it will throw below error 125 * "aggregate value used where an integer was expected" 126 */ 127 128 typedef union _reply_descriptor { 129 u64 word; 130 struct { 131 u32 low; 132 u32 high; 133 } u; 134 }reply_descriptor,address_descriptor; 135 136 /* Rate limit chain-fail messages to 1 per minute */ 137 static struct timeval mps_chainfail_interval = { 60, 0 }; 138 139 /* 140 * sleep_flag can be either CAN_SLEEP or NO_SLEEP. 141 * If this function is called from process context, it can sleep 142 * and there is no harm to sleep, in case if this fuction is called 143 * from Interrupt handler, we can not sleep and need NO_SLEEP flag set. 144 * based on sleep flags driver will call either msleep, pause or DELAY. 145 * msleep and pause are of same variant, but pause is used when mps_mtx 146 * is not hold by driver. 147 * 148 */ 149 static int 150 mps_diag_reset(struct mps_softc *sc,int sleep_flag) 151 { 152 uint32_t reg; 153 int i, error, tries = 0; 154 uint8_t first_wait_done = FALSE; 155 156 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 157 158 /* Clear any pending interrupts */ 159 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 160 161 /* 162 * Force NO_SLEEP for threads prohibited to sleep 163 * e.a Thread from interrupt handler are prohibited to sleep. 164 */ 165 if (curthread->td_no_sleeping != 0) 166 sleep_flag = NO_SLEEP; 167 168 mps_dprint(sc, MPS_INIT, "sequence start, sleep_flag= %d\n", sleep_flag); 169 170 /* Push the magic sequence */ 171 error = ETIMEDOUT; 172 while (tries++ < 20) { 173 for (i = 0; i < sizeof(mpt2_reset_magic); i++) 174 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 175 mpt2_reset_magic[i]); 176 /* wait 100 msec */ 177 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 178 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 179 "mpsdiag", hz/10); 180 else if (sleep_flag == CAN_SLEEP) 181 pause("mpsdiag", hz/10); 182 else 183 DELAY(100 * 1000); 184 185 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 186 if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) { 187 error = 0; 188 break; 189 } 190 } 191 if (error) { 192 mps_dprint(sc, MPS_INIT, "sequence failed, error=%d, exit\n", 193 error); 194 return (error); 195 } 196 197 /* Send the actual reset. XXX need to refresh the reg? */ 198 reg |= MPI2_DIAG_RESET_ADAPTER; 199 mps_dprint(sc, MPS_INIT, "sequence success, sending reset, reg= 0x%x\n", 200 reg); 201 mps_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET, reg); 202 203 /* Wait up to 300 seconds in 50ms intervals */ 204 error = ETIMEDOUT; 205 for (i = 0; i < 6000; i++) { 206 /* 207 * Wait 50 msec. If this is the first time through, wait 256 208 * msec to satisfy Diag Reset timing requirements. 209 */ 210 if (first_wait_done) { 211 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 212 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 213 "mpsdiag", hz/20); 214 else if (sleep_flag == CAN_SLEEP) 215 pause("mpsdiag", hz/20); 216 else 217 DELAY(50 * 1000); 218 } else { 219 DELAY(256 * 1000); 220 first_wait_done = TRUE; 221 } 222 /* 223 * Check for the RESET_ADAPTER bit to be cleared first, then 224 * wait for the RESET state to be cleared, which takes a little 225 * longer. 226 */ 227 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 228 if (reg & MPI2_DIAG_RESET_ADAPTER) { 229 continue; 230 } 231 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 232 if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) { 233 error = 0; 234 break; 235 } 236 } 237 if (error) { 238 mps_dprint(sc, MPS_INIT, "reset failed, error= %d, exit\n", 239 error); 240 return (error); 241 } 242 243 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0); 244 mps_dprint(sc, MPS_INIT, "diag reset success, exit\n"); 245 246 return (0); 247 } 248 249 static int 250 mps_message_unit_reset(struct mps_softc *sc, int sleep_flag) 251 { 252 int error; 253 254 MPS_FUNCTRACE(sc); 255 256 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 257 258 error = 0; 259 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, 260 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET << 261 MPI2_DOORBELL_FUNCTION_SHIFT); 262 263 if (mps_wait_db_ack(sc, 5, sleep_flag) != 0) { 264 mps_dprint(sc, MPS_INIT|MPS_FAULT, 265 "Doorbell handshake failed\n"); 266 error = ETIMEDOUT; 267 } 268 269 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 270 return (error); 271 } 272 273 static int 274 mps_transition_ready(struct mps_softc *sc) 275 { 276 uint32_t reg, state; 277 int error, tries = 0; 278 int sleep_flags; 279 280 MPS_FUNCTRACE(sc); 281 /* If we are in attach call, do not sleep */ 282 sleep_flags = (sc->mps_flags & MPS_FLAGS_ATTACH_DONE) 283 ? CAN_SLEEP:NO_SLEEP; 284 error = 0; 285 286 mps_dprint(sc, MPS_INIT, "%s entered, sleep_flags= %d\n", 287 __func__, sleep_flags); 288 289 while (tries++ < 1200) { 290 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 291 mps_dprint(sc, MPS_INIT, " Doorbell= 0x%x\n", reg); 292 293 /* 294 * Ensure the IOC is ready to talk. If it's not, try 295 * resetting it. 296 */ 297 if (reg & MPI2_DOORBELL_USED) { 298 mps_dprint(sc, MPS_INIT, " Not ready, sending diag " 299 "reset\n"); 300 mps_diag_reset(sc, sleep_flags); 301 DELAY(50000); 302 continue; 303 } 304 305 /* Is the adapter owned by another peer? */ 306 if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) == 307 (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) { 308 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC is under the " 309 "control of another peer host, aborting " 310 "initialization.\n"); 311 error = ENXIO; 312 break; 313 } 314 315 state = reg & MPI2_IOC_STATE_MASK; 316 if (state == MPI2_IOC_STATE_READY) { 317 /* Ready to go! */ 318 error = 0; 319 break; 320 } else if (state == MPI2_IOC_STATE_FAULT) { 321 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC in fault " 322 "state 0x%x, resetting\n", 323 state & MPI2_DOORBELL_FAULT_CODE_MASK); 324 mps_diag_reset(sc, sleep_flags); 325 } else if (state == MPI2_IOC_STATE_OPERATIONAL) { 326 /* Need to take ownership */ 327 mps_message_unit_reset(sc, sleep_flags); 328 } else if (state == MPI2_IOC_STATE_RESET) { 329 /* Wait a bit, IOC might be in transition */ 330 mps_dprint(sc, MPS_INIT|MPS_FAULT, 331 "IOC in unexpected reset state\n"); 332 } else { 333 mps_dprint(sc, MPS_INIT|MPS_FAULT, 334 "IOC in unknown state 0x%x\n", state); 335 error = EINVAL; 336 break; 337 } 338 339 /* Wait 50ms for things to settle down. */ 340 DELAY(50000); 341 } 342 343 if (error) 344 mps_dprint(sc, MPS_INIT|MPS_FAULT, 345 "Cannot transition IOC to ready\n"); 346 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 347 348 return (error); 349 } 350 351 static int 352 mps_transition_operational(struct mps_softc *sc) 353 { 354 uint32_t reg, state; 355 int error; 356 357 MPS_FUNCTRACE(sc); 358 359 error = 0; 360 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 361 mps_dprint(sc, MPS_INIT, "%s entered, Doorbell= 0x%x\n", __func__, reg); 362 363 state = reg & MPI2_IOC_STATE_MASK; 364 if (state != MPI2_IOC_STATE_READY) { 365 mps_dprint(sc, MPS_INIT, "IOC not ready\n"); 366 if ((error = mps_transition_ready(sc)) != 0) { 367 mps_dprint(sc, MPS_INIT|MPS_FAULT, 368 "failed to transition ready, exit\n"); 369 return (error); 370 } 371 } 372 373 error = mps_send_iocinit(sc); 374 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 375 376 return (error); 377 } 378 379 static void 380 mps_resize_queues(struct mps_softc *sc) 381 { 382 int reqcr, prireqcr; 383 384 /* 385 * Size the queues. Since the reply queues always need one free 386 * entry, we'll deduct one reply message here. The LSI documents 387 * suggest instead to add a count to the request queue, but I think 388 * that it's better to deduct from reply queue. 389 */ 390 prireqcr = MAX(1, sc->max_prireqframes); 391 prireqcr = MIN(prireqcr, sc->facts->HighPriorityCredit); 392 393 reqcr = MAX(2, sc->max_reqframes); 394 reqcr = MIN(reqcr, sc->facts->RequestCredit); 395 396 sc->num_reqs = prireqcr + reqcr; 397 sc->num_prireqs = prireqcr; 398 sc->num_replies = MIN(sc->max_replyframes + sc->max_evtframes, 399 sc->facts->MaxReplyDescriptorPostQueueDepth) - 1; 400 401 /* 402 * Figure out the number of MSIx-based queues. If the firmware or 403 * user has done something crazy and not allowed enough credit for 404 * the queues to be useful then don't enable multi-queue. 405 */ 406 if (sc->facts->MaxMSIxVectors < 2) 407 sc->msi_msgs = 1; 408 409 if (sc->msi_msgs > 1) { 410 sc->msi_msgs = MIN(sc->msi_msgs, mp_ncpus); 411 sc->msi_msgs = MIN(sc->msi_msgs, sc->facts->MaxMSIxVectors); 412 if (sc->num_reqs / sc->msi_msgs < 2) 413 sc->msi_msgs = 1; 414 } 415 416 mps_dprint(sc, MPS_INIT, "Sized queues to q=%d reqs=%d replies=%d\n", 417 sc->msi_msgs, sc->num_reqs, sc->num_replies); 418 } 419 420 /* 421 * This is called during attach and when re-initializing due to a Diag Reset. 422 * IOC Facts is used to allocate many of the structures needed by the driver. 423 * If called from attach, de-allocation is not required because the driver has 424 * not allocated any structures yet, but if called from a Diag Reset, previously 425 * allocated structures based on IOC Facts will need to be freed and re- 426 * allocated bases on the latest IOC Facts. 427 */ 428 static int 429 mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching) 430 { 431 int error; 432 Mpi2IOCFactsReply_t saved_facts; 433 uint8_t saved_mode, reallocating; 434 435 mps_dprint(sc, MPS_INIT|MPS_TRACE, "%s entered\n", __func__); 436 437 /* Save old IOC Facts and then only reallocate if Facts have changed */ 438 if (!attaching) { 439 bcopy(sc->facts, &saved_facts, sizeof(MPI2_IOC_FACTS_REPLY)); 440 } 441 442 /* 443 * Get IOC Facts. In all cases throughout this function, panic if doing 444 * a re-initialization and only return the error if attaching so the OS 445 * can handle it. 446 */ 447 if ((error = mps_get_iocfacts(sc, sc->facts)) != 0) { 448 if (attaching) { 449 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to get " 450 "IOC Facts with error %d, exit\n", error); 451 return (error); 452 } else { 453 panic("%s failed to get IOC Facts with error %d\n", 454 __func__, error); 455 } 456 } 457 458 MPS_DPRINT_PAGE(sc, MPS_XINFO, iocfacts, sc->facts); 459 460 snprintf(sc->fw_version, sizeof(sc->fw_version), 461 "%02d.%02d.%02d.%02d", 462 sc->facts->FWVersion.Struct.Major, 463 sc->facts->FWVersion.Struct.Minor, 464 sc->facts->FWVersion.Struct.Unit, 465 sc->facts->FWVersion.Struct.Dev); 466 467 mps_dprint(sc, MPS_INFO, "Firmware: %s, Driver: %s\n", sc->fw_version, 468 MPS_DRIVER_VERSION); 469 mps_dprint(sc, MPS_INFO, "IOCCapabilities: %b\n", 470 sc->facts->IOCCapabilities, 471 "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf" 472 "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR" 473 "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc"); 474 475 /* 476 * If the chip doesn't support event replay then a hard reset will be 477 * required to trigger a full discovery. Do the reset here then 478 * retransition to Ready. A hard reset might have already been done, 479 * but it doesn't hurt to do it again. Only do this if attaching, not 480 * for a Diag Reset. 481 */ 482 if (attaching && ((sc->facts->IOCCapabilities & 483 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0)) { 484 mps_dprint(sc, MPS_INIT, "No event replay, reseting\n"); 485 mps_diag_reset(sc, NO_SLEEP); 486 if ((error = mps_transition_ready(sc)) != 0) { 487 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to " 488 "transition to ready with error %d, exit\n", 489 error); 490 return (error); 491 } 492 } 493 494 /* 495 * Set flag if IR Firmware is loaded. If the RAID Capability has 496 * changed from the previous IOC Facts, log a warning, but only if 497 * checking this after a Diag Reset and not during attach. 498 */ 499 saved_mode = sc->ir_firmware; 500 if (sc->facts->IOCCapabilities & 501 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) 502 sc->ir_firmware = 1; 503 if (!attaching) { 504 if (sc->ir_firmware != saved_mode) { 505 mps_dprint(sc, MPS_INIT|MPS_FAULT, "new IR/IT mode " 506 "in IOC Facts does not match previous mode\n"); 507 } 508 } 509 510 /* Only deallocate and reallocate if relevant IOC Facts have changed */ 511 reallocating = FALSE; 512 sc->mps_flags &= ~MPS_FLAGS_REALLOCATED; 513 514 if ((!attaching) && 515 ((saved_facts.MsgVersion != sc->facts->MsgVersion) || 516 (saved_facts.HeaderVersion != sc->facts->HeaderVersion) || 517 (saved_facts.MaxChainDepth != sc->facts->MaxChainDepth) || 518 (saved_facts.RequestCredit != sc->facts->RequestCredit) || 519 (saved_facts.ProductID != sc->facts->ProductID) || 520 (saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) || 521 (saved_facts.IOCRequestFrameSize != 522 sc->facts->IOCRequestFrameSize) || 523 (saved_facts.MaxTargets != sc->facts->MaxTargets) || 524 (saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) || 525 (saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) || 526 (saved_facts.HighPriorityCredit != sc->facts->HighPriorityCredit) || 527 (saved_facts.MaxReplyDescriptorPostQueueDepth != 528 sc->facts->MaxReplyDescriptorPostQueueDepth) || 529 (saved_facts.ReplyFrameSize != sc->facts->ReplyFrameSize) || 530 (saved_facts.MaxVolumes != sc->facts->MaxVolumes) || 531 (saved_facts.MaxPersistentEntries != 532 sc->facts->MaxPersistentEntries))) { 533 reallocating = TRUE; 534 535 /* Record that we reallocated everything */ 536 sc->mps_flags |= MPS_FLAGS_REALLOCATED; 537 } 538 539 /* 540 * Some things should be done if attaching or re-allocating after a Diag 541 * Reset, but are not needed after a Diag Reset if the FW has not 542 * changed. 543 */ 544 if (attaching || reallocating) { 545 /* 546 * Check if controller supports FW diag buffers and set flag to 547 * enable each type. 548 */ 549 if (sc->facts->IOCCapabilities & 550 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) 551 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE]. 552 enabled = TRUE; 553 if (sc->facts->IOCCapabilities & 554 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) 555 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT]. 556 enabled = TRUE; 557 if (sc->facts->IOCCapabilities & 558 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) 559 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED]. 560 enabled = TRUE; 561 562 /* 563 * Set flag if EEDP is supported and if TLR is supported. 564 */ 565 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) 566 sc->eedp_enabled = TRUE; 567 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) 568 sc->control_TLR = TRUE; 569 570 mps_resize_queues(sc); 571 572 /* 573 * Initialize all Tail Queues 574 */ 575 TAILQ_INIT(&sc->req_list); 576 TAILQ_INIT(&sc->high_priority_req_list); 577 TAILQ_INIT(&sc->chain_list); 578 TAILQ_INIT(&sc->tm_list); 579 } 580 581 /* 582 * If doing a Diag Reset and the FW is significantly different 583 * (reallocating will be set above in IOC Facts comparison), then all 584 * buffers based on the IOC Facts will need to be freed before they are 585 * reallocated. 586 */ 587 if (reallocating) { 588 mps_iocfacts_free(sc); 589 mpssas_realloc_targets(sc, saved_facts.MaxTargets + 590 saved_facts.MaxVolumes); 591 } 592 593 /* 594 * Any deallocation has been completed. Now start reallocating 595 * if needed. Will only need to reallocate if attaching or if the new 596 * IOC Facts are different from the previous IOC Facts after a Diag 597 * Reset. Targets have already been allocated above if needed. 598 */ 599 error = 0; 600 while (attaching || reallocating) { 601 if ((error = mps_alloc_hw_queues(sc)) != 0) 602 break; 603 if ((error = mps_alloc_replies(sc)) != 0) 604 break; 605 if ((error = mps_alloc_requests(sc)) != 0) 606 break; 607 if ((error = mps_alloc_queues(sc)) != 0) 608 break; 609 610 break; 611 } 612 if (error) { 613 mps_dprint(sc, MPS_INIT|MPS_FAULT, 614 "Failed to alloc queues with error %d\n", error); 615 mps_free(sc); 616 return (error); 617 } 618 619 /* Always initialize the queues */ 620 bzero(sc->free_queue, sc->fqdepth * 4); 621 mps_init_queues(sc); 622 623 /* 624 * Always get the chip out of the reset state, but only panic if not 625 * attaching. If attaching and there is an error, that is handled by 626 * the OS. 627 */ 628 error = mps_transition_operational(sc); 629 if (error != 0) { 630 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to " 631 "transition to operational with error %d\n", error); 632 mps_free(sc); 633 return (error); 634 } 635 636 /* 637 * Finish the queue initialization. 638 * These are set here instead of in mps_init_queues() because the 639 * IOC resets these values during the state transition in 640 * mps_transition_operational(). The free index is set to 1 641 * because the corresponding index in the IOC is set to 0, and the 642 * IOC treats the queues as full if both are set to the same value. 643 * Hence the reason that the queue can't hold all of the possible 644 * replies. 645 */ 646 sc->replypostindex = 0; 647 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); 648 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0); 649 650 /* 651 * Attach the subsystems so they can prepare their event masks. 652 * XXX Should be dynamic so that IM/IR and user modules can attach 653 */ 654 error = 0; 655 while (attaching) { 656 mps_dprint(sc, MPS_INIT, "Attaching subsystems\n"); 657 if ((error = mps_attach_log(sc)) != 0) 658 break; 659 if ((error = mps_attach_sas(sc)) != 0) 660 break; 661 if ((error = mps_attach_user(sc)) != 0) 662 break; 663 break; 664 } 665 if (error) { 666 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to attach all " 667 "subsystems: error %d\n", error); 668 mps_free(sc); 669 return (error); 670 } 671 672 /* 673 * XXX If the number of MSI-X vectors changes during re-init, this 674 * won't see it and adjust. 675 */ 676 if (attaching && (error = mps_pci_setup_interrupts(sc)) != 0) { 677 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to setup " 678 "interrupts\n"); 679 mps_free(sc); 680 return (error); 681 } 682 683 /* 684 * Set flag if this is a WD controller. This shouldn't ever change, but 685 * reset it after a Diag Reset, just in case. 686 */ 687 sc->WD_available = FALSE; 688 if (pci_get_device(sc->mps_dev) == MPI2_MFGPAGE_DEVID_SSS6200) 689 sc->WD_available = TRUE; 690 691 return (error); 692 } 693 694 /* 695 * This is called if memory is being free (during detach for example) and when 696 * buffers need to be reallocated due to a Diag Reset. 697 */ 698 static void 699 mps_iocfacts_free(struct mps_softc *sc) 700 { 701 struct mps_command *cm; 702 int i; 703 704 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 705 706 if (sc->free_busaddr != 0) 707 bus_dmamap_unload(sc->queues_dmat, sc->queues_map); 708 if (sc->free_queue != NULL) 709 bus_dmamem_free(sc->queues_dmat, sc->free_queue, 710 sc->queues_map); 711 if (sc->queues_dmat != NULL) 712 bus_dma_tag_destroy(sc->queues_dmat); 713 714 if (sc->chain_busaddr != 0) 715 bus_dmamap_unload(sc->chain_dmat, sc->chain_map); 716 if (sc->chain_frames != NULL) 717 bus_dmamem_free(sc->chain_dmat, sc->chain_frames, 718 sc->chain_map); 719 if (sc->chain_dmat != NULL) 720 bus_dma_tag_destroy(sc->chain_dmat); 721 722 if (sc->sense_busaddr != 0) 723 bus_dmamap_unload(sc->sense_dmat, sc->sense_map); 724 if (sc->sense_frames != NULL) 725 bus_dmamem_free(sc->sense_dmat, sc->sense_frames, 726 sc->sense_map); 727 if (sc->sense_dmat != NULL) 728 bus_dma_tag_destroy(sc->sense_dmat); 729 730 if (sc->reply_busaddr != 0) 731 bus_dmamap_unload(sc->reply_dmat, sc->reply_map); 732 if (sc->reply_frames != NULL) 733 bus_dmamem_free(sc->reply_dmat, sc->reply_frames, 734 sc->reply_map); 735 if (sc->reply_dmat != NULL) 736 bus_dma_tag_destroy(sc->reply_dmat); 737 738 if (sc->req_busaddr != 0) 739 bus_dmamap_unload(sc->req_dmat, sc->req_map); 740 if (sc->req_frames != NULL) 741 bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map); 742 if (sc->req_dmat != NULL) 743 bus_dma_tag_destroy(sc->req_dmat); 744 745 if (sc->chains != NULL) 746 free(sc->chains, M_MPT2); 747 if (sc->commands != NULL) { 748 for (i = 1; i < sc->num_reqs; i++) { 749 cm = &sc->commands[i]; 750 bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap); 751 } 752 free(sc->commands, M_MPT2); 753 } 754 if (sc->buffer_dmat != NULL) 755 bus_dma_tag_destroy(sc->buffer_dmat); 756 757 mps_pci_free_interrupts(sc); 758 free(sc->queues, M_MPT2); 759 sc->queues = NULL; 760 } 761 762 /* 763 * The terms diag reset and hard reset are used interchangeably in the MPI 764 * docs to mean resetting the controller chip. In this code diag reset 765 * cleans everything up, and the hard reset function just sends the reset 766 * sequence to the chip. This should probably be refactored so that every 767 * subsystem gets a reset notification of some sort, and can clean up 768 * appropriately. 769 */ 770 int 771 mps_reinit(struct mps_softc *sc) 772 { 773 int error; 774 struct mpssas_softc *sassc; 775 776 sassc = sc->sassc; 777 778 MPS_FUNCTRACE(sc); 779 780 mtx_assert(&sc->mps_mtx, MA_OWNED); 781 782 mps_dprint(sc, MPS_INIT|MPS_INFO, "Reinitializing controller\n"); 783 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) { 784 mps_dprint(sc, MPS_INIT, "Reset already in progress\n"); 785 return 0; 786 } 787 788 /* make sure the completion callbacks can recognize they're getting 789 * a NULL cm_reply due to a reset. 790 */ 791 sc->mps_flags |= MPS_FLAGS_DIAGRESET; 792 793 /* 794 * Mask interrupts here. 795 */ 796 mps_dprint(sc, MPS_INIT, "masking interrupts and resetting\n"); 797 mps_mask_intr(sc); 798 799 error = mps_diag_reset(sc, CAN_SLEEP); 800 if (error != 0) { 801 /* XXXSL No need to panic here */ 802 panic("%s hard reset failed with error %d\n", 803 __func__, error); 804 } 805 806 /* Restore the PCI state, including the MSI-X registers */ 807 mps_pci_restore(sc); 808 809 /* Give the I/O subsystem special priority to get itself prepared */ 810 mpssas_handle_reinit(sc); 811 812 /* 813 * Get IOC Facts and allocate all structures based on this information. 814 * The attach function will also call mps_iocfacts_allocate at startup. 815 * If relevant values have changed in IOC Facts, this function will free 816 * all of the memory based on IOC Facts and reallocate that memory. 817 */ 818 if ((error = mps_iocfacts_allocate(sc, FALSE)) != 0) { 819 panic("%s IOC Facts based allocation failed with error %d\n", 820 __func__, error); 821 } 822 823 /* 824 * Mapping structures will be re-allocated after getting IOC Page8, so 825 * free these structures here. 826 */ 827 mps_mapping_exit(sc); 828 829 /* 830 * The static page function currently read is IOC Page8. Others can be 831 * added in future. It's possible that the values in IOC Page8 have 832 * changed after a Diag Reset due to user modification, so always read 833 * these. Interrupts are masked, so unmask them before getting config 834 * pages. 835 */ 836 mps_unmask_intr(sc); 837 sc->mps_flags &= ~MPS_FLAGS_DIAGRESET; 838 mps_base_static_config_pages(sc); 839 840 /* 841 * Some mapping info is based in IOC Page8 data, so re-initialize the 842 * mapping tables. 843 */ 844 mps_mapping_initialize(sc); 845 846 /* 847 * Restart will reload the event masks clobbered by the reset, and 848 * then enable the port. 849 */ 850 mps_reregister_events(sc); 851 852 /* the end of discovery will release the simq, so we're done. */ 853 mps_dprint(sc, MPS_INIT|MPS_XINFO, "Finished sc %p post %u free %u\n", 854 sc, sc->replypostindex, sc->replyfreeindex); 855 856 mpssas_release_simq_reinit(sassc); 857 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 858 859 return 0; 860 } 861 862 /* Wait for the chip to ACK a word that we've put into its FIFO 863 * Wait for <timeout> seconds. In single loop wait for busy loop 864 * for 500 microseconds. 865 * Total is [ 0.5 * (2000 * <timeout>) ] in miliseconds. 866 * */ 867 static int 868 mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag) 869 { 870 871 u32 cntdn, count; 872 u32 int_status; 873 u32 doorbell; 874 875 count = 0; 876 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 877 do { 878 int_status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 879 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 880 mps_dprint(sc, MPS_TRACE, 881 "%s: successful count(%d), timeout(%d)\n", 882 __func__, count, timeout); 883 return 0; 884 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 885 doorbell = mps_regread(sc, MPI2_DOORBELL_OFFSET); 886 if ((doorbell & MPI2_IOC_STATE_MASK) == 887 MPI2_IOC_STATE_FAULT) { 888 mps_dprint(sc, MPS_FAULT, 889 "fault_state(0x%04x)!\n", doorbell); 890 return (EFAULT); 891 } 892 } else if (int_status == 0xFFFFFFFF) 893 goto out; 894 895 /* If it can sleep, sleep for 1 milisecond, else busy loop for 896 * 0.5 milisecond */ 897 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 898 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 899 "mpsdba", hz/1000); 900 else if (sleep_flag == CAN_SLEEP) 901 pause("mpsdba", hz/1000); 902 else 903 DELAY(500); 904 count++; 905 } while (--cntdn); 906 907 out: 908 mps_dprint(sc, MPS_FAULT, "%s: failed due to timeout count(%d), " 909 "int_status(%x)!\n", __func__, count, int_status); 910 return (ETIMEDOUT); 911 912 } 913 914 /* Wait for the chip to signal that the next word in its FIFO can be fetched */ 915 static int 916 mps_wait_db_int(struct mps_softc *sc) 917 { 918 int retry; 919 920 for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) { 921 if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) & 922 MPI2_HIS_IOC2SYS_DB_STATUS) != 0) 923 return (0); 924 DELAY(2000); 925 } 926 return (ETIMEDOUT); 927 } 928 929 /* Step through the synchronous command state machine, i.e. "Doorbell mode" */ 930 static int 931 mps_request_sync(struct mps_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply, 932 int req_sz, int reply_sz, int timeout) 933 { 934 uint32_t *data32; 935 uint16_t *data16; 936 int i, count, ioc_sz, residual; 937 int sleep_flags = CAN_SLEEP; 938 939 if (curthread->td_no_sleeping != 0) 940 sleep_flags = NO_SLEEP; 941 942 /* Step 1 */ 943 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 944 945 /* Step 2 */ 946 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 947 return (EBUSY); 948 949 /* Step 3 950 * Announce that a message is coming through the doorbell. Messages 951 * are pushed at 32bit words, so round up if needed. 952 */ 953 count = (req_sz + 3) / 4; 954 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, 955 (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) | 956 (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT)); 957 958 /* Step 4 */ 959 if (mps_wait_db_int(sc) || 960 (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) { 961 mps_dprint(sc, MPS_FAULT, "Doorbell failed to activate\n"); 962 return (ENXIO); 963 } 964 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 965 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) { 966 mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed\n"); 967 return (ENXIO); 968 } 969 970 /* Step 5 */ 971 /* Clock out the message data synchronously in 32-bit dwords*/ 972 data32 = (uint32_t *)req; 973 for (i = 0; i < count; i++) { 974 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i])); 975 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) { 976 mps_dprint(sc, MPS_FAULT, 977 "Timeout while writing doorbell\n"); 978 return (ENXIO); 979 } 980 } 981 982 /* Step 6 */ 983 /* Clock in the reply in 16-bit words. The total length of the 984 * message is always in the 4th byte, so clock out the first 2 words 985 * manually, then loop the rest. 986 */ 987 data16 = (uint16_t *)reply; 988 if (mps_wait_db_int(sc) != 0) { 989 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 0\n"); 990 return (ENXIO); 991 } 992 data16[0] = 993 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 994 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 995 if (mps_wait_db_int(sc) != 0) { 996 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 1\n"); 997 return (ENXIO); 998 } 999 data16[1] = 1000 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 1001 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1002 1003 /* Number of 32bit words in the message */ 1004 ioc_sz = reply->MsgLength; 1005 1006 /* 1007 * Figure out how many 16bit words to clock in without overrunning. 1008 * The precision loss with dividing reply_sz can safely be 1009 * ignored because the messages can only be multiples of 32bits. 1010 */ 1011 residual = 0; 1012 count = MIN((reply_sz / 4), ioc_sz) * 2; 1013 if (count < ioc_sz * 2) { 1014 residual = ioc_sz * 2 - count; 1015 mps_dprint(sc, MPS_ERROR, "Driver error, throwing away %d " 1016 "residual message words\n", residual); 1017 } 1018 1019 for (i = 2; i < count; i++) { 1020 if (mps_wait_db_int(sc) != 0) { 1021 mps_dprint(sc, MPS_FAULT, 1022 "Timeout reading doorbell %d\n", i); 1023 return (ENXIO); 1024 } 1025 data16[i] = mps_regread(sc, MPI2_DOORBELL_OFFSET) & 1026 MPI2_DOORBELL_DATA_MASK; 1027 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1028 } 1029 1030 /* 1031 * Pull out residual words that won't fit into the provided buffer. 1032 * This keeps the chip from hanging due to a driver programming 1033 * error. 1034 */ 1035 while (residual--) { 1036 if (mps_wait_db_int(sc) != 0) { 1037 mps_dprint(sc, MPS_FAULT, 1038 "Timeout reading doorbell\n"); 1039 return (ENXIO); 1040 } 1041 (void)mps_regread(sc, MPI2_DOORBELL_OFFSET); 1042 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1043 } 1044 1045 /* Step 7 */ 1046 if (mps_wait_db_int(sc) != 0) { 1047 mps_dprint(sc, MPS_FAULT, "Timeout waiting to exit doorbell\n"); 1048 return (ENXIO); 1049 } 1050 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 1051 mps_dprint(sc, MPS_FAULT, "Warning, doorbell still active\n"); 1052 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1053 1054 return (0); 1055 } 1056 1057 static void 1058 mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm) 1059 { 1060 reply_descriptor rd; 1061 MPS_FUNCTRACE(sc); 1062 mps_dprint(sc, MPS_TRACE, "SMID %u cm %p ccb %p\n", 1063 cm->cm_desc.Default.SMID, cm, cm->cm_ccb); 1064 1065 if (sc->mps_flags & MPS_FLAGS_ATTACH_DONE && !(sc->mps_flags & MPS_FLAGS_SHUTDOWN)) 1066 mtx_assert(&sc->mps_mtx, MA_OWNED); 1067 1068 if (++sc->io_cmds_active > sc->io_cmds_highwater) 1069 sc->io_cmds_highwater++; 1070 rd.u.low = cm->cm_desc.Words.Low; 1071 rd.u.high = cm->cm_desc.Words.High; 1072 rd.word = htole64(rd.word); 1073 /* TODO-We may need to make below regwrite atomic */ 1074 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET, 1075 rd.u.low); 1076 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET, 1077 rd.u.high); 1078 } 1079 1080 /* 1081 * Just the FACTS, ma'am. 1082 */ 1083 static int 1084 mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts) 1085 { 1086 MPI2_DEFAULT_REPLY *reply; 1087 MPI2_IOC_FACTS_REQUEST request; 1088 int error, req_sz, reply_sz; 1089 1090 MPS_FUNCTRACE(sc); 1091 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1092 1093 req_sz = sizeof(MPI2_IOC_FACTS_REQUEST); 1094 reply_sz = sizeof(MPI2_IOC_FACTS_REPLY); 1095 reply = (MPI2_DEFAULT_REPLY *)facts; 1096 1097 bzero(&request, req_sz); 1098 request.Function = MPI2_FUNCTION_IOC_FACTS; 1099 error = mps_request_sync(sc, &request, reply, req_sz, reply_sz, 5); 1100 mps_dprint(sc, MPS_INIT, "%s exit error= %d\n", __func__, error); 1101 1102 return (error); 1103 } 1104 1105 static int 1106 mps_send_iocinit(struct mps_softc *sc) 1107 { 1108 MPI2_IOC_INIT_REQUEST init; 1109 MPI2_DEFAULT_REPLY reply; 1110 int req_sz, reply_sz, error; 1111 struct timeval now; 1112 uint64_t time_in_msec; 1113 1114 MPS_FUNCTRACE(sc); 1115 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1116 1117 /* Do a quick sanity check on proper initialization */ 1118 if ((sc->pqdepth == 0) || (sc->fqdepth == 0) || (sc->reqframesz == 0) 1119 || (sc->replyframesz == 0)) { 1120 mps_dprint(sc, MPS_INIT|MPS_ERROR, 1121 "Driver not fully initialized for IOCInit\n"); 1122 return (EINVAL); 1123 } 1124 1125 req_sz = sizeof(MPI2_IOC_INIT_REQUEST); 1126 reply_sz = sizeof(MPI2_IOC_INIT_REPLY); 1127 bzero(&init, req_sz); 1128 bzero(&reply, reply_sz); 1129 1130 /* 1131 * Fill in the init block. Note that most addresses are 1132 * deliberately in the lower 32bits of memory. This is a micro- 1133 * optimzation for PCI/PCIX, though it's not clear if it helps PCIe. 1134 */ 1135 init.Function = MPI2_FUNCTION_IOC_INIT; 1136 init.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 1137 init.MsgVersion = htole16(MPI2_VERSION); 1138 init.HeaderVersion = htole16(MPI2_HEADER_VERSION); 1139 init.SystemRequestFrameSize = htole16((uint16_t)(sc->reqframesz / 4)); 1140 init.ReplyDescriptorPostQueueDepth = htole16(sc->pqdepth); 1141 init.ReplyFreeQueueDepth = htole16(sc->fqdepth); 1142 init.SenseBufferAddressHigh = 0; 1143 init.SystemReplyAddressHigh = 0; 1144 init.SystemRequestFrameBaseAddress.High = 0; 1145 init.SystemRequestFrameBaseAddress.Low = htole32((uint32_t)sc->req_busaddr); 1146 init.ReplyDescriptorPostQueueAddress.High = 0; 1147 init.ReplyDescriptorPostQueueAddress.Low = htole32((uint32_t)sc->post_busaddr); 1148 init.ReplyFreeQueueAddress.High = 0; 1149 init.ReplyFreeQueueAddress.Low = htole32((uint32_t)sc->free_busaddr); 1150 getmicrotime(&now); 1151 time_in_msec = (now.tv_sec * 1000 + now.tv_usec/1000); 1152 init.TimeStamp.High = htole32((time_in_msec >> 32) & 0xFFFFFFFF); 1153 init.TimeStamp.Low = htole32(time_in_msec & 0xFFFFFFFF); 1154 1155 error = mps_request_sync(sc, &init, &reply, req_sz, reply_sz, 5); 1156 if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 1157 error = ENXIO; 1158 1159 mps_dprint(sc, MPS_INIT, "IOCInit status= 0x%x\n", reply.IOCStatus); 1160 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 1161 return (error); 1162 } 1163 1164 void 1165 mps_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1166 { 1167 bus_addr_t *addr; 1168 1169 addr = arg; 1170 *addr = segs[0].ds_addr; 1171 } 1172 1173 void 1174 mps_memaddr_wait_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1175 { 1176 struct mps_busdma_context *ctx; 1177 int need_unload, need_free; 1178 1179 ctx = (struct mps_busdma_context *)arg; 1180 need_unload = 0; 1181 need_free = 0; 1182 1183 mps_lock(ctx->softc); 1184 ctx->error = error; 1185 ctx->completed = 1; 1186 if ((error == 0) && (ctx->abandoned == 0)) { 1187 *ctx->addr = segs[0].ds_addr; 1188 } else { 1189 if (nsegs != 0) 1190 need_unload = 1; 1191 if (ctx->abandoned != 0) 1192 need_free = 1; 1193 } 1194 if (need_free == 0) 1195 wakeup(ctx); 1196 1197 mps_unlock(ctx->softc); 1198 1199 if (need_unload != 0) { 1200 bus_dmamap_unload(ctx->buffer_dmat, 1201 ctx->buffer_dmamap); 1202 *ctx->addr = 0; 1203 } 1204 1205 if (need_free != 0) 1206 free(ctx, M_MPSUSER); 1207 } 1208 1209 static int 1210 mps_alloc_queues(struct mps_softc *sc) 1211 { 1212 struct mps_queue *q; 1213 u_int nq, i; 1214 1215 nq = sc->msi_msgs; 1216 mps_dprint(sc, MPS_INIT|MPS_XINFO, "Allocating %d I/O queues\n", nq); 1217 1218 sc->queues = malloc(sizeof(struct mps_queue) * nq, M_MPT2, 1219 M_NOWAIT|M_ZERO); 1220 if (sc->queues == NULL) 1221 return (ENOMEM); 1222 1223 for (i = 0; i < nq; i++) { 1224 q = &sc->queues[i]; 1225 mps_dprint(sc, MPS_INIT, "Configuring queue %d %p\n", i, q); 1226 q->sc = sc; 1227 q->qnum = i; 1228 } 1229 1230 return (0); 1231 } 1232 1233 static int 1234 mps_alloc_hw_queues(struct mps_softc *sc) 1235 { 1236 bus_addr_t queues_busaddr; 1237 uint8_t *queues; 1238 int qsize, fqsize, pqsize; 1239 1240 /* 1241 * The reply free queue contains 4 byte entries in multiples of 16 and 1242 * aligned on a 16 byte boundary. There must always be an unused entry. 1243 * This queue supplies fresh reply frames for the firmware to use. 1244 * 1245 * The reply descriptor post queue contains 8 byte entries in 1246 * multiples of 16 and aligned on a 16 byte boundary. This queue 1247 * contains filled-in reply frames sent from the firmware to the host. 1248 * 1249 * These two queues are allocated together for simplicity. 1250 */ 1251 sc->fqdepth = roundup2(sc->num_replies + 1, 16); 1252 sc->pqdepth = roundup2(sc->num_replies + 1, 16); 1253 fqsize= sc->fqdepth * 4; 1254 pqsize = sc->pqdepth * 8; 1255 qsize = fqsize + pqsize; 1256 1257 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1258 16, 0, /* algnmnt, boundary */ 1259 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1260 BUS_SPACE_MAXADDR, /* highaddr */ 1261 NULL, NULL, /* filter, filterarg */ 1262 qsize, /* maxsize */ 1263 1, /* nsegments */ 1264 qsize, /* maxsegsize */ 1265 0, /* flags */ 1266 NULL, NULL, /* lockfunc, lockarg */ 1267 &sc->queues_dmat)) { 1268 mps_dprint(sc, MPS_ERROR, "Cannot allocate queues DMA tag\n"); 1269 return (ENOMEM); 1270 } 1271 if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT, 1272 &sc->queues_map)) { 1273 mps_dprint(sc, MPS_ERROR, "Cannot allocate queues memory\n"); 1274 return (ENOMEM); 1275 } 1276 bzero(queues, qsize); 1277 bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize, 1278 mps_memaddr_cb, &queues_busaddr, 0); 1279 1280 sc->free_queue = (uint32_t *)queues; 1281 sc->free_busaddr = queues_busaddr; 1282 sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize); 1283 sc->post_busaddr = queues_busaddr + fqsize; 1284 1285 return (0); 1286 } 1287 1288 static int 1289 mps_alloc_replies(struct mps_softc *sc) 1290 { 1291 int rsize, num_replies; 1292 1293 /* Store the reply frame size in bytes rather than as 32bit words */ 1294 sc->replyframesz = sc->facts->ReplyFrameSize * 4; 1295 1296 /* 1297 * sc->num_replies should be one less than sc->fqdepth. We need to 1298 * allocate space for sc->fqdepth replies, but only sc->num_replies 1299 * replies can be used at once. 1300 */ 1301 num_replies = max(sc->fqdepth, sc->num_replies); 1302 1303 rsize = sc->replyframesz * num_replies; 1304 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1305 4, 0, /* algnmnt, boundary */ 1306 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1307 BUS_SPACE_MAXADDR, /* highaddr */ 1308 NULL, NULL, /* filter, filterarg */ 1309 rsize, /* maxsize */ 1310 1, /* nsegments */ 1311 rsize, /* maxsegsize */ 1312 0, /* flags */ 1313 NULL, NULL, /* lockfunc, lockarg */ 1314 &sc->reply_dmat)) { 1315 mps_dprint(sc, MPS_ERROR, "Cannot allocate replies DMA tag\n"); 1316 return (ENOMEM); 1317 } 1318 if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames, 1319 BUS_DMA_NOWAIT, &sc->reply_map)) { 1320 mps_dprint(sc, MPS_ERROR, "Cannot allocate replies memory\n"); 1321 return (ENOMEM); 1322 } 1323 bzero(sc->reply_frames, rsize); 1324 bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize, 1325 mps_memaddr_cb, &sc->reply_busaddr, 0); 1326 1327 return (0); 1328 } 1329 1330 static int 1331 mps_alloc_requests(struct mps_softc *sc) 1332 { 1333 struct mps_command *cm; 1334 struct mps_chain *chain; 1335 int i, rsize, nsegs; 1336 1337 /* Store the request frame size in bytes rather than as 32bit words */ 1338 sc->reqframesz = sc->facts->IOCRequestFrameSize * 4; 1339 1340 rsize = sc->reqframesz * sc->num_reqs; 1341 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1342 16, 0, /* algnmnt, boundary */ 1343 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1344 BUS_SPACE_MAXADDR, /* highaddr */ 1345 NULL, NULL, /* filter, filterarg */ 1346 rsize, /* maxsize */ 1347 1, /* nsegments */ 1348 rsize, /* maxsegsize */ 1349 0, /* flags */ 1350 NULL, NULL, /* lockfunc, lockarg */ 1351 &sc->req_dmat)) { 1352 mps_dprint(sc, MPS_ERROR, "Cannot allocate request DMA tag\n"); 1353 return (ENOMEM); 1354 } 1355 if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames, 1356 BUS_DMA_NOWAIT, &sc->req_map)) { 1357 mps_dprint(sc, MPS_ERROR, "Cannot allocate request memory\n"); 1358 return (ENOMEM); 1359 } 1360 bzero(sc->req_frames, rsize); 1361 bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize, 1362 mps_memaddr_cb, &sc->req_busaddr, 0); 1363 1364 rsize = sc->reqframesz * sc->max_chains; 1365 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1366 16, 0, /* algnmnt, boundary */ 1367 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1368 BUS_SPACE_MAXADDR, /* highaddr */ 1369 NULL, NULL, /* filter, filterarg */ 1370 rsize, /* maxsize */ 1371 1, /* nsegments */ 1372 rsize, /* maxsegsize */ 1373 0, /* flags */ 1374 NULL, NULL, /* lockfunc, lockarg */ 1375 &sc->chain_dmat)) { 1376 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain DMA tag\n"); 1377 return (ENOMEM); 1378 } 1379 if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames, 1380 BUS_DMA_NOWAIT, &sc->chain_map)) { 1381 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain memory\n"); 1382 return (ENOMEM); 1383 } 1384 bzero(sc->chain_frames, rsize); 1385 bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, rsize, 1386 mps_memaddr_cb, &sc->chain_busaddr, 0); 1387 1388 rsize = MPS_SENSE_LEN * sc->num_reqs; 1389 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1390 1, 0, /* algnmnt, boundary */ 1391 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1392 BUS_SPACE_MAXADDR, /* highaddr */ 1393 NULL, NULL, /* filter, filterarg */ 1394 rsize, /* maxsize */ 1395 1, /* nsegments */ 1396 rsize, /* maxsegsize */ 1397 0, /* flags */ 1398 NULL, NULL, /* lockfunc, lockarg */ 1399 &sc->sense_dmat)) { 1400 mps_dprint(sc, MPS_ERROR, "Cannot allocate sense DMA tag\n"); 1401 return (ENOMEM); 1402 } 1403 if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames, 1404 BUS_DMA_NOWAIT, &sc->sense_map)) { 1405 mps_dprint(sc, MPS_ERROR, "Cannot allocate sense memory\n"); 1406 return (ENOMEM); 1407 } 1408 bzero(sc->sense_frames, rsize); 1409 bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize, 1410 mps_memaddr_cb, &sc->sense_busaddr, 0); 1411 1412 sc->chains = malloc(sizeof(struct mps_chain) * sc->max_chains, M_MPT2, 1413 M_WAITOK | M_ZERO); 1414 if(!sc->chains) { 1415 mps_dprint(sc, MPS_ERROR, "Cannot allocate chains memory\n"); 1416 return (ENOMEM); 1417 } 1418 for (i = 0; i < sc->max_chains; i++) { 1419 chain = &sc->chains[i]; 1420 chain->chain = (MPI2_SGE_IO_UNION *)(sc->chain_frames + 1421 i * sc->reqframesz); 1422 chain->chain_busaddr = sc->chain_busaddr + 1423 i * sc->reqframesz; 1424 mps_free_chain(sc, chain); 1425 sc->chain_free_lowwater++; 1426 } 1427 1428 /* XXX Need to pick a more precise value */ 1429 nsegs = (MAXPHYS / PAGE_SIZE) + 1; 1430 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1431 1, 0, /* algnmnt, boundary */ 1432 BUS_SPACE_MAXADDR, /* lowaddr */ 1433 BUS_SPACE_MAXADDR, /* highaddr */ 1434 NULL, NULL, /* filter, filterarg */ 1435 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 1436 nsegs, /* nsegments */ 1437 BUS_SPACE_MAXSIZE_24BIT,/* maxsegsize */ 1438 BUS_DMA_ALLOCNOW, /* flags */ 1439 busdma_lock_mutex, /* lockfunc */ 1440 &sc->mps_mtx, /* lockarg */ 1441 &sc->buffer_dmat)) { 1442 mps_dprint(sc, MPS_ERROR, "Cannot allocate buffer DMA tag\n"); 1443 return (ENOMEM); 1444 } 1445 1446 /* 1447 * SMID 0 cannot be used as a free command per the firmware spec. 1448 * Just drop that command instead of risking accounting bugs. 1449 */ 1450 sc->commands = malloc(sizeof(struct mps_command) * sc->num_reqs, 1451 M_MPT2, M_WAITOK | M_ZERO); 1452 if(!sc->commands) { 1453 mps_dprint(sc, MPS_ERROR, "Cannot allocate command memory\n"); 1454 return (ENOMEM); 1455 } 1456 for (i = 1; i < sc->num_reqs; i++) { 1457 cm = &sc->commands[i]; 1458 cm->cm_req = sc->req_frames + i * sc->reqframesz; 1459 cm->cm_req_busaddr = sc->req_busaddr + i * sc->reqframesz; 1460 cm->cm_sense = &sc->sense_frames[i]; 1461 cm->cm_sense_busaddr = sc->sense_busaddr + i * MPS_SENSE_LEN; 1462 cm->cm_desc.Default.SMID = i; 1463 cm->cm_sc = sc; 1464 TAILQ_INIT(&cm->cm_chain_list); 1465 callout_init_mtx(&cm->cm_callout, &sc->mps_mtx, 0); 1466 1467 /* XXX Is a failure here a critical problem? */ 1468 if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0) 1469 if (i <= sc->num_prireqs) 1470 mps_free_high_priority_command(sc, cm); 1471 else 1472 mps_free_command(sc, cm); 1473 else { 1474 panic("failed to allocate command %d\n", i); 1475 sc->num_reqs = i; 1476 break; 1477 } 1478 } 1479 1480 return (0); 1481 } 1482 1483 static int 1484 mps_init_queues(struct mps_softc *sc) 1485 { 1486 int i; 1487 1488 memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8); 1489 1490 /* 1491 * According to the spec, we need to use one less reply than we 1492 * have space for on the queue. So sc->num_replies (the number we 1493 * use) should be less than sc->fqdepth (allocated size). 1494 */ 1495 if (sc->num_replies >= sc->fqdepth) 1496 return (EINVAL); 1497 1498 /* 1499 * Initialize all of the free queue entries. 1500 */ 1501 for (i = 0; i < sc->fqdepth; i++) 1502 sc->free_queue[i] = sc->reply_busaddr + (i * sc->replyframesz); 1503 sc->replyfreeindex = sc->num_replies; 1504 1505 return (0); 1506 } 1507 1508 /* Get the driver parameter tunables. Lowest priority are the driver defaults. 1509 * Next are the global settings, if they exist. Highest are the per-unit 1510 * settings, if they exist. 1511 */ 1512 void 1513 mps_get_tunables(struct mps_softc *sc) 1514 { 1515 char tmpstr[80], mps_debug[80]; 1516 1517 /* XXX default to some debugging for now */ 1518 sc->mps_debug = MPS_INFO|MPS_FAULT; 1519 sc->disable_msix = 0; 1520 sc->disable_msi = 0; 1521 sc->max_msix = MPS_MSIX_MAX; 1522 sc->max_chains = MPS_CHAIN_FRAMES; 1523 sc->max_io_pages = MPS_MAXIO_PAGES; 1524 sc->enable_ssu = MPS_SSU_ENABLE_SSD_DISABLE_HDD; 1525 sc->spinup_wait_time = DEFAULT_SPINUP_WAIT; 1526 sc->use_phynum = 1; 1527 sc->max_reqframes = MPS_REQ_FRAMES; 1528 sc->max_prireqframes = MPS_PRI_REQ_FRAMES; 1529 sc->max_replyframes = MPS_REPLY_FRAMES; 1530 sc->max_evtframes = MPS_EVT_REPLY_FRAMES; 1531 1532 /* 1533 * Grab the global variables. 1534 */ 1535 bzero(mps_debug, 80); 1536 if (TUNABLE_STR_FETCH("hw.mps.debug_level", mps_debug, 80) != 0) 1537 mps_parse_debug(sc, mps_debug); 1538 TUNABLE_INT_FETCH("hw.mps.disable_msix", &sc->disable_msix); 1539 TUNABLE_INT_FETCH("hw.mps.disable_msi", &sc->disable_msi); 1540 TUNABLE_INT_FETCH("hw.mps.max_msix", &sc->max_msix); 1541 TUNABLE_INT_FETCH("hw.mps.max_chains", &sc->max_chains); 1542 TUNABLE_INT_FETCH("hw.mps.max_io_pages", &sc->max_io_pages); 1543 TUNABLE_INT_FETCH("hw.mps.enable_ssu", &sc->enable_ssu); 1544 TUNABLE_INT_FETCH("hw.mps.spinup_wait_time", &sc->spinup_wait_time); 1545 TUNABLE_INT_FETCH("hw.mps.use_phy_num", &sc->use_phynum); 1546 TUNABLE_INT_FETCH("hw.mps.max_reqframes", &sc->max_reqframes); 1547 TUNABLE_INT_FETCH("hw.mps.max_prireqframes", &sc->max_prireqframes); 1548 TUNABLE_INT_FETCH("hw.mps.max_replyframes", &sc->max_replyframes); 1549 TUNABLE_INT_FETCH("hw.mps.max_evtframes", &sc->max_evtframes); 1550 1551 /* Grab the unit-instance variables */ 1552 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.debug_level", 1553 device_get_unit(sc->mps_dev)); 1554 bzero(mps_debug, 80); 1555 if (TUNABLE_STR_FETCH(tmpstr, mps_debug, 80) != 0) 1556 mps_parse_debug(sc, mps_debug); 1557 1558 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msix", 1559 device_get_unit(sc->mps_dev)); 1560 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix); 1561 1562 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msi", 1563 device_get_unit(sc->mps_dev)); 1564 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi); 1565 1566 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_msix", 1567 device_get_unit(sc->mps_dev)); 1568 TUNABLE_INT_FETCH(tmpstr, &sc->max_msix); 1569 1570 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_chains", 1571 device_get_unit(sc->mps_dev)); 1572 TUNABLE_INT_FETCH(tmpstr, &sc->max_chains); 1573 1574 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_io_pages", 1575 device_get_unit(sc->mps_dev)); 1576 TUNABLE_INT_FETCH(tmpstr, &sc->max_io_pages); 1577 1578 bzero(sc->exclude_ids, sizeof(sc->exclude_ids)); 1579 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.exclude_ids", 1580 device_get_unit(sc->mps_dev)); 1581 TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids)); 1582 1583 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.enable_ssu", 1584 device_get_unit(sc->mps_dev)); 1585 TUNABLE_INT_FETCH(tmpstr, &sc->enable_ssu); 1586 1587 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.spinup_wait_time", 1588 device_get_unit(sc->mps_dev)); 1589 TUNABLE_INT_FETCH(tmpstr, &sc->spinup_wait_time); 1590 1591 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.use_phy_num", 1592 device_get_unit(sc->mps_dev)); 1593 TUNABLE_INT_FETCH(tmpstr, &sc->use_phynum); 1594 1595 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_reqframes", 1596 device_get_unit(sc->mps_dev)); 1597 TUNABLE_INT_FETCH(tmpstr, &sc->max_reqframes); 1598 1599 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_prireqframes", 1600 device_get_unit(sc->mps_dev)); 1601 TUNABLE_INT_FETCH(tmpstr, &sc->max_prireqframes); 1602 1603 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_replyframes", 1604 device_get_unit(sc->mps_dev)); 1605 TUNABLE_INT_FETCH(tmpstr, &sc->max_replyframes); 1606 1607 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_evtframes", 1608 device_get_unit(sc->mps_dev)); 1609 TUNABLE_INT_FETCH(tmpstr, &sc->max_evtframes); 1610 1611 } 1612 1613 static void 1614 mps_setup_sysctl(struct mps_softc *sc) 1615 { 1616 struct sysctl_ctx_list *sysctl_ctx = NULL; 1617 struct sysctl_oid *sysctl_tree = NULL; 1618 char tmpstr[80], tmpstr2[80]; 1619 1620 /* 1621 * Setup the sysctl variable so the user can change the debug level 1622 * on the fly. 1623 */ 1624 snprintf(tmpstr, sizeof(tmpstr), "MPS controller %d", 1625 device_get_unit(sc->mps_dev)); 1626 snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mps_dev)); 1627 1628 sysctl_ctx = device_get_sysctl_ctx(sc->mps_dev); 1629 if (sysctl_ctx != NULL) 1630 sysctl_tree = device_get_sysctl_tree(sc->mps_dev); 1631 1632 if (sysctl_tree == NULL) { 1633 sysctl_ctx_init(&sc->sysctl_ctx); 1634 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx, 1635 SYSCTL_STATIC_CHILDREN(_hw_mps), OID_AUTO, tmpstr2, 1636 CTLFLAG_RD, 0, tmpstr); 1637 if (sc->sysctl_tree == NULL) 1638 return; 1639 sysctl_ctx = &sc->sysctl_ctx; 1640 sysctl_tree = sc->sysctl_tree; 1641 } 1642 1643 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1644 OID_AUTO, "debug_level", CTLTYPE_STRING | CTLFLAG_RW |CTLFLAG_MPSAFE, 1645 sc, 0, mps_debug_sysctl, "A", "mps debug level"); 1646 1647 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1648 OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0, 1649 "Disable the use of MSI-X interrupts"); 1650 1651 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1652 OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0, 1653 "Disable the use of MSI interrupts"); 1654 1655 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1656 OID_AUTO, "max_msix", CTLFLAG_RD, &sc->max_msix, 0, 1657 "User-defined maximum number of MSIX queues"); 1658 1659 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1660 OID_AUTO, "msix_msgs", CTLFLAG_RD, &sc->msi_msgs, 0, 1661 "Negotiated number of MSIX queues"); 1662 1663 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1664 OID_AUTO, "max_reqframes", CTLFLAG_RD, &sc->max_reqframes, 0, 1665 "Total number of allocated request frames"); 1666 1667 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1668 OID_AUTO, "max_prireqframes", CTLFLAG_RD, &sc->max_prireqframes, 0, 1669 "Total number of allocated high priority request frames"); 1670 1671 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1672 OID_AUTO, "max_replyframes", CTLFLAG_RD, &sc->max_replyframes, 0, 1673 "Total number of allocated reply frames"); 1674 1675 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1676 OID_AUTO, "max_evtframes", CTLFLAG_RD, &sc->max_evtframes, 0, 1677 "Total number of event frames allocated"); 1678 1679 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1680 OID_AUTO, "firmware_version", CTLFLAG_RW, sc->fw_version, 1681 strlen(sc->fw_version), "firmware version"); 1682 1683 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1684 OID_AUTO, "driver_version", CTLFLAG_RW, MPS_DRIVER_VERSION, 1685 strlen(MPS_DRIVER_VERSION), "driver version"); 1686 1687 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1688 OID_AUTO, "io_cmds_active", CTLFLAG_RD, 1689 &sc->io_cmds_active, 0, "number of currently active commands"); 1690 1691 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1692 OID_AUTO, "io_cmds_highwater", CTLFLAG_RD, 1693 &sc->io_cmds_highwater, 0, "maximum active commands seen"); 1694 1695 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1696 OID_AUTO, "chain_free", CTLFLAG_RD, 1697 &sc->chain_free, 0, "number of free chain elements"); 1698 1699 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1700 OID_AUTO, "chain_free_lowwater", CTLFLAG_RD, 1701 &sc->chain_free_lowwater, 0,"lowest number of free chain elements"); 1702 1703 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1704 OID_AUTO, "max_chains", CTLFLAG_RD, 1705 &sc->max_chains, 0,"maximum chain frames that will be allocated"); 1706 1707 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1708 OID_AUTO, "max_io_pages", CTLFLAG_RD, 1709 &sc->max_io_pages, 0,"maximum pages to allow per I/O (if <1 use " 1710 "IOCFacts)"); 1711 1712 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1713 OID_AUTO, "enable_ssu", CTLFLAG_RW, &sc->enable_ssu, 0, 1714 "enable SSU to SATA SSD/HDD at shutdown"); 1715 1716 SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1717 OID_AUTO, "chain_alloc_fail", CTLFLAG_RD, 1718 &sc->chain_alloc_fail, "chain allocation failures"); 1719 1720 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1721 OID_AUTO, "spinup_wait_time", CTLFLAG_RD, 1722 &sc->spinup_wait_time, DEFAULT_SPINUP_WAIT, "seconds to wait for " 1723 "spinup after SATA ID error"); 1724 1725 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1726 OID_AUTO, "mapping_table_dump", CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 1727 mps_mapping_dump, "A", "Mapping Table Dump"); 1728 1729 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1730 OID_AUTO, "encl_table_dump", CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 1731 mps_mapping_encl_dump, "A", "Enclosure Table Dump"); 1732 1733 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1734 OID_AUTO, "use_phy_num", CTLFLAG_RD, &sc->use_phynum, 0, 1735 "Use the phy number for enumeration"); 1736 } 1737 1738 static struct mps_debug_string { 1739 char *name; 1740 int flag; 1741 } mps_debug_strings[] = { 1742 {"info", MPS_INFO}, 1743 {"fault", MPS_FAULT}, 1744 {"event", MPS_EVENT}, 1745 {"log", MPS_LOG}, 1746 {"recovery", MPS_RECOVERY}, 1747 {"error", MPS_ERROR}, 1748 {"init", MPS_INIT}, 1749 {"xinfo", MPS_XINFO}, 1750 {"user", MPS_USER}, 1751 {"mapping", MPS_MAPPING}, 1752 {"trace", MPS_TRACE} 1753 }; 1754 1755 enum mps_debug_level_combiner { 1756 COMB_NONE, 1757 COMB_ADD, 1758 COMB_SUB 1759 }; 1760 1761 static int 1762 mps_debug_sysctl(SYSCTL_HANDLER_ARGS) 1763 { 1764 struct mps_softc *sc; 1765 struct mps_debug_string *string; 1766 struct sbuf *sbuf; 1767 char *buffer; 1768 size_t sz; 1769 int i, len, debug, error; 1770 1771 sc = (struct mps_softc *)arg1; 1772 1773 error = sysctl_wire_old_buffer(req, 0); 1774 if (error != 0) 1775 return (error); 1776 1777 sbuf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 1778 debug = sc->mps_debug; 1779 1780 sbuf_printf(sbuf, "%#x", debug); 1781 1782 sz = sizeof(mps_debug_strings) / sizeof(mps_debug_strings[0]); 1783 for (i = 0; i < sz; i++) { 1784 string = &mps_debug_strings[i]; 1785 if (debug & string->flag) 1786 sbuf_printf(sbuf, ",%s", string->name); 1787 } 1788 1789 error = sbuf_finish(sbuf); 1790 sbuf_delete(sbuf); 1791 1792 if (error || req->newptr == NULL) 1793 return (error); 1794 1795 len = req->newlen - req->newidx; 1796 if (len == 0) 1797 return (0); 1798 1799 buffer = malloc(len, M_MPT2, M_ZERO|M_WAITOK); 1800 error = SYSCTL_IN(req, buffer, len); 1801 1802 mps_parse_debug(sc, buffer); 1803 1804 free(buffer, M_MPT2); 1805 return (error); 1806 } 1807 1808 static void 1809 mps_parse_debug(struct mps_softc *sc, char *list) 1810 { 1811 struct mps_debug_string *string; 1812 enum mps_debug_level_combiner op; 1813 char *token, *endtoken; 1814 size_t sz; 1815 int flags, i; 1816 1817 if (list == NULL || *list == '\0') 1818 return; 1819 1820 if (*list == '+') { 1821 op = COMB_ADD; 1822 list++; 1823 } else if (*list == '-') { 1824 op = COMB_SUB; 1825 list++; 1826 } else 1827 op = COMB_NONE; 1828 if (*list == '\0') 1829 return; 1830 1831 flags = 0; 1832 sz = sizeof(mps_debug_strings) / sizeof(mps_debug_strings[0]); 1833 while ((token = strsep(&list, ":,")) != NULL) { 1834 1835 /* Handle integer flags */ 1836 flags |= strtol(token, &endtoken, 0); 1837 if (token != endtoken) 1838 continue; 1839 1840 /* Handle text flags */ 1841 for (i = 0; i < sz; i++) { 1842 string = &mps_debug_strings[i]; 1843 if (strcasecmp(token, string->name) == 0) { 1844 flags |= string->flag; 1845 break; 1846 } 1847 } 1848 } 1849 1850 switch (op) { 1851 case COMB_NONE: 1852 sc->mps_debug = flags; 1853 break; 1854 case COMB_ADD: 1855 sc->mps_debug |= flags; 1856 break; 1857 case COMB_SUB: 1858 sc->mps_debug &= (~flags); 1859 break; 1860 } 1861 1862 return; 1863 } 1864 1865 int 1866 mps_attach(struct mps_softc *sc) 1867 { 1868 int error; 1869 1870 MPS_FUNCTRACE(sc); 1871 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1872 1873 mtx_init(&sc->mps_mtx, "MPT2SAS lock", NULL, MTX_DEF); 1874 callout_init_mtx(&sc->periodic, &sc->mps_mtx, 0); 1875 callout_init_mtx(&sc->device_check_callout, &sc->mps_mtx, 0); 1876 TAILQ_INIT(&sc->event_list); 1877 timevalclear(&sc->lastfail); 1878 1879 if ((error = mps_transition_ready(sc)) != 0) { 1880 mps_dprint(sc, MPS_INIT|MPS_FAULT, "failed to transition " 1881 "ready\n"); 1882 return (error); 1883 } 1884 1885 sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPT2, 1886 M_ZERO|M_NOWAIT); 1887 if(!sc->facts) { 1888 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Cannot allocate memory, " 1889 "exit\n"); 1890 return (ENOMEM); 1891 } 1892 1893 /* 1894 * Get IOC Facts and allocate all structures based on this information. 1895 * A Diag Reset will also call mps_iocfacts_allocate and re-read the IOC 1896 * Facts. If relevant values have changed in IOC Facts, this function 1897 * will free all of the memory based on IOC Facts and reallocate that 1898 * memory. If this fails, any allocated memory should already be freed. 1899 */ 1900 if ((error = mps_iocfacts_allocate(sc, TRUE)) != 0) { 1901 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC Facts based allocation " 1902 "failed with error %d, exit\n", error); 1903 return (error); 1904 } 1905 1906 /* Start the periodic watchdog check on the IOC Doorbell */ 1907 mps_periodic(sc); 1908 1909 /* 1910 * The portenable will kick off discovery events that will drive the 1911 * rest of the initialization process. The CAM/SAS module will 1912 * hold up the boot sequence until discovery is complete. 1913 */ 1914 sc->mps_ich.ich_func = mps_startup; 1915 sc->mps_ich.ich_arg = sc; 1916 if (config_intrhook_establish(&sc->mps_ich) != 0) { 1917 mps_dprint(sc, MPS_INIT|MPS_ERROR, 1918 "Cannot establish MPS config hook\n"); 1919 error = EINVAL; 1920 } 1921 1922 /* 1923 * Allow IR to shutdown gracefully when shutdown occurs. 1924 */ 1925 sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final, 1926 mpssas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT); 1927 1928 if (sc->shutdown_eh == NULL) 1929 mps_dprint(sc, MPS_INIT|MPS_ERROR, 1930 "shutdown event registration failed\n"); 1931 1932 mps_setup_sysctl(sc); 1933 1934 sc->mps_flags |= MPS_FLAGS_ATTACH_DONE; 1935 mps_dprint(sc, MPS_INIT, "%s exit error= %d\n", __func__, error); 1936 1937 return (error); 1938 } 1939 1940 /* Run through any late-start handlers. */ 1941 static void 1942 mps_startup(void *arg) 1943 { 1944 struct mps_softc *sc; 1945 1946 sc = (struct mps_softc *)arg; 1947 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1948 1949 mps_lock(sc); 1950 mps_unmask_intr(sc); 1951 1952 /* initialize device mapping tables */ 1953 mps_base_static_config_pages(sc); 1954 mps_mapping_initialize(sc); 1955 mpssas_startup(sc); 1956 mps_unlock(sc); 1957 1958 mps_dprint(sc, MPS_INIT, "disestablish config intrhook\n"); 1959 config_intrhook_disestablish(&sc->mps_ich); 1960 sc->mps_ich.ich_arg = NULL; 1961 1962 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 1963 } 1964 1965 /* Periodic watchdog. Is called with the driver lock already held. */ 1966 static void 1967 mps_periodic(void *arg) 1968 { 1969 struct mps_softc *sc; 1970 uint32_t db; 1971 1972 sc = (struct mps_softc *)arg; 1973 if (sc->mps_flags & MPS_FLAGS_SHUTDOWN) 1974 return; 1975 1976 db = mps_regread(sc, MPI2_DOORBELL_OFFSET); 1977 if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 1978 mps_dprint(sc, MPS_FAULT, "IOC Fault 0x%08x, Resetting\n", db); 1979 mps_reinit(sc); 1980 } 1981 1982 callout_reset(&sc->periodic, MPS_PERIODIC_DELAY * hz, mps_periodic, sc); 1983 } 1984 1985 static void 1986 mps_log_evt_handler(struct mps_softc *sc, uintptr_t data, 1987 MPI2_EVENT_NOTIFICATION_REPLY *event) 1988 { 1989 MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry; 1990 1991 MPS_DPRINT_EVENT(sc, generic, event); 1992 1993 switch (event->Event) { 1994 case MPI2_EVENT_LOG_DATA: 1995 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_DATA:\n"); 1996 if (sc->mps_debug & MPS_EVENT) 1997 hexdump(event->EventData, event->EventDataLength, NULL, 0); 1998 break; 1999 case MPI2_EVENT_LOG_ENTRY_ADDED: 2000 entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData; 2001 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_ENTRY_ADDED event " 2002 "0x%x Sequence %d:\n", entry->LogEntryQualifier, 2003 entry->LogSequence); 2004 break; 2005 default: 2006 break; 2007 } 2008 return; 2009 } 2010 2011 static int 2012 mps_attach_log(struct mps_softc *sc) 2013 { 2014 u32 events[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 2015 2016 bzero(events, 16); 2017 setbit(events, MPI2_EVENT_LOG_DATA); 2018 setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED); 2019 2020 mps_register_events(sc, events, mps_log_evt_handler, NULL, 2021 &sc->mps_log_eh); 2022 2023 return (0); 2024 } 2025 2026 static int 2027 mps_detach_log(struct mps_softc *sc) 2028 { 2029 2030 if (sc->mps_log_eh != NULL) 2031 mps_deregister_events(sc, sc->mps_log_eh); 2032 return (0); 2033 } 2034 2035 /* 2036 * Free all of the driver resources and detach submodules. Should be called 2037 * without the lock held. 2038 */ 2039 int 2040 mps_free(struct mps_softc *sc) 2041 { 2042 int error; 2043 2044 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 2045 /* Turn off the watchdog */ 2046 mps_lock(sc); 2047 sc->mps_flags |= MPS_FLAGS_SHUTDOWN; 2048 mps_unlock(sc); 2049 /* Lock must not be held for this */ 2050 callout_drain(&sc->periodic); 2051 callout_drain(&sc->device_check_callout); 2052 2053 if (((error = mps_detach_log(sc)) != 0) || 2054 ((error = mps_detach_sas(sc)) != 0)) { 2055 mps_dprint(sc, MPS_INIT|MPS_FAULT, "failed to detach " 2056 "subsystems, exit\n"); 2057 return (error); 2058 } 2059 2060 mps_detach_user(sc); 2061 2062 /* Put the IOC back in the READY state. */ 2063 mps_lock(sc); 2064 if ((error = mps_transition_ready(sc)) != 0) { 2065 mps_unlock(sc); 2066 return (error); 2067 } 2068 mps_unlock(sc); 2069 2070 if (sc->facts != NULL) 2071 free(sc->facts, M_MPT2); 2072 2073 /* 2074 * Free all buffers that are based on IOC Facts. A Diag Reset may need 2075 * to free these buffers too. 2076 */ 2077 mps_iocfacts_free(sc); 2078 2079 if (sc->sysctl_tree != NULL) 2080 sysctl_ctx_free(&sc->sysctl_ctx); 2081 2082 /* Deregister the shutdown function */ 2083 if (sc->shutdown_eh != NULL) 2084 EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh); 2085 2086 mtx_destroy(&sc->mps_mtx); 2087 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 2088 2089 return (0); 2090 } 2091 2092 static __inline void 2093 mps_complete_command(struct mps_softc *sc, struct mps_command *cm) 2094 { 2095 MPS_FUNCTRACE(sc); 2096 2097 if (cm == NULL) { 2098 mps_dprint(sc, MPS_ERROR, "Completing NULL command\n"); 2099 return; 2100 } 2101 2102 if (cm->cm_flags & MPS_CM_FLAGS_POLLED) 2103 cm->cm_flags |= MPS_CM_FLAGS_COMPLETE; 2104 2105 if (cm->cm_complete != NULL) { 2106 mps_dprint(sc, MPS_TRACE, 2107 "%s cm %p calling cm_complete %p data %p reply %p\n", 2108 __func__, cm, cm->cm_complete, cm->cm_complete_data, 2109 cm->cm_reply); 2110 cm->cm_complete(sc, cm); 2111 } 2112 2113 if (cm->cm_flags & MPS_CM_FLAGS_WAKEUP) { 2114 mps_dprint(sc, MPS_TRACE, "waking up %p\n", cm); 2115 wakeup(cm); 2116 } 2117 2118 if (cm->cm_sc->io_cmds_active != 0) { 2119 cm->cm_sc->io_cmds_active--; 2120 } else { 2121 mps_dprint(sc, MPS_ERROR, "Warning: io_cmds_active is " 2122 "out of sync - resynching to 0\n"); 2123 } 2124 } 2125 2126 2127 static void 2128 mps_sas_log_info(struct mps_softc *sc , u32 log_info) 2129 { 2130 union loginfo_type { 2131 u32 loginfo; 2132 struct { 2133 u32 subcode:16; 2134 u32 code:8; 2135 u32 originator:4; 2136 u32 bus_type:4; 2137 } dw; 2138 }; 2139 union loginfo_type sas_loginfo; 2140 char *originator_str = NULL; 2141 2142 sas_loginfo.loginfo = log_info; 2143 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 2144 return; 2145 2146 /* each nexus loss loginfo */ 2147 if (log_info == 0x31170000) 2148 return; 2149 2150 /* eat the loginfos associated with task aborts */ 2151 if ((log_info == 30050000 || log_info == 2152 0x31140000 || log_info == 0x31130000)) 2153 return; 2154 2155 switch (sas_loginfo.dw.originator) { 2156 case 0: 2157 originator_str = "IOP"; 2158 break; 2159 case 1: 2160 originator_str = "PL"; 2161 break; 2162 case 2: 2163 originator_str = "IR"; 2164 break; 2165 } 2166 2167 mps_dprint(sc, MPS_LOG, "log_info(0x%08x): originator(%s), " 2168 "code(0x%02x), sub_code(0x%04x)\n", log_info, 2169 originator_str, sas_loginfo.dw.code, 2170 sas_loginfo.dw.subcode); 2171 } 2172 2173 static void 2174 mps_display_reply_info(struct mps_softc *sc, uint8_t *reply) 2175 { 2176 MPI2DefaultReply_t *mpi_reply; 2177 u16 sc_status; 2178 2179 mpi_reply = (MPI2DefaultReply_t*)reply; 2180 sc_status = le16toh(mpi_reply->IOCStatus); 2181 if (sc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 2182 mps_sas_log_info(sc, le32toh(mpi_reply->IOCLogInfo)); 2183 } 2184 void 2185 mps_intr(void *data) 2186 { 2187 struct mps_softc *sc; 2188 uint32_t status; 2189 2190 sc = (struct mps_softc *)data; 2191 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2192 2193 /* 2194 * Check interrupt status register to flush the bus. This is 2195 * needed for both INTx interrupts and driver-driven polling 2196 */ 2197 status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 2198 if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0) 2199 return; 2200 2201 mps_lock(sc); 2202 mps_intr_locked(data); 2203 mps_unlock(sc); 2204 return; 2205 } 2206 2207 /* 2208 * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the 2209 * chip. Hopefully this theory is correct. 2210 */ 2211 void 2212 mps_intr_msi(void *data) 2213 { 2214 struct mps_softc *sc; 2215 2216 sc = (struct mps_softc *)data; 2217 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2218 mps_lock(sc); 2219 mps_intr_locked(data); 2220 mps_unlock(sc); 2221 return; 2222 } 2223 2224 /* 2225 * The locking is overly broad and simplistic, but easy to deal with for now. 2226 */ 2227 void 2228 mps_intr_locked(void *data) 2229 { 2230 MPI2_REPLY_DESCRIPTORS_UNION *desc; 2231 struct mps_softc *sc; 2232 struct mps_command *cm = NULL; 2233 uint8_t flags; 2234 u_int pq; 2235 MPI2_DIAG_RELEASE_REPLY *rel_rep; 2236 mps_fw_diagnostic_buffer_t *pBuffer; 2237 2238 sc = (struct mps_softc *)data; 2239 2240 pq = sc->replypostindex; 2241 mps_dprint(sc, MPS_TRACE, 2242 "%s sc %p starting with replypostindex %u\n", 2243 __func__, sc, sc->replypostindex); 2244 2245 for ( ;; ) { 2246 cm = NULL; 2247 desc = &sc->post_queue[sc->replypostindex]; 2248 flags = desc->Default.ReplyFlags & 2249 MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 2250 if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 2251 || (le32toh(desc->Words.High) == 0xffffffff)) 2252 break; 2253 2254 /* increment the replypostindex now, so that event handlers 2255 * and cm completion handlers which decide to do a diag 2256 * reset can zero it without it getting incremented again 2257 * afterwards, and we break out of this loop on the next 2258 * iteration since the reply post queue has been cleared to 2259 * 0xFF and all descriptors look unused (which they are). 2260 */ 2261 if (++sc->replypostindex >= sc->pqdepth) 2262 sc->replypostindex = 0; 2263 2264 switch (flags) { 2265 case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS: 2266 cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)]; 2267 cm->cm_reply = NULL; 2268 break; 2269 case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY: 2270 { 2271 uint32_t baddr; 2272 uint8_t *reply; 2273 2274 /* 2275 * Re-compose the reply address from the address 2276 * sent back from the chip. The ReplyFrameAddress 2277 * is the lower 32 bits of the physical address of 2278 * particular reply frame. Convert that address to 2279 * host format, and then use that to provide the 2280 * offset against the virtual address base 2281 * (sc->reply_frames). 2282 */ 2283 baddr = le32toh(desc->AddressReply.ReplyFrameAddress); 2284 reply = sc->reply_frames + 2285 (baddr - ((uint32_t)sc->reply_busaddr)); 2286 /* 2287 * Make sure the reply we got back is in a valid 2288 * range. If not, go ahead and panic here, since 2289 * we'll probably panic as soon as we deference the 2290 * reply pointer anyway. 2291 */ 2292 if ((reply < sc->reply_frames) 2293 || (reply > (sc->reply_frames + 2294 (sc->fqdepth * sc->replyframesz)))) { 2295 printf("%s: WARNING: reply %p out of range!\n", 2296 __func__, reply); 2297 printf("%s: reply_frames %p, fqdepth %d, " 2298 "frame size %d\n", __func__, 2299 sc->reply_frames, sc->fqdepth, 2300 sc->replyframesz); 2301 printf("%s: baddr %#x,\n", __func__, baddr); 2302 /* LSI-TODO. See Linux Code. Need Graceful exit*/ 2303 panic("Reply address out of range"); 2304 } 2305 if (le16toh(desc->AddressReply.SMID) == 0) { 2306 if (((MPI2_DEFAULT_REPLY *)reply)->Function == 2307 MPI2_FUNCTION_DIAG_BUFFER_POST) { 2308 /* 2309 * If SMID is 0 for Diag Buffer Post, 2310 * this implies that the reply is due to 2311 * a release function with a status that 2312 * the buffer has been released. Set 2313 * the buffer flags accordingly. 2314 */ 2315 rel_rep = 2316 (MPI2_DIAG_RELEASE_REPLY *)reply; 2317 if ((le16toh(rel_rep->IOCStatus) & 2318 MPI2_IOCSTATUS_MASK) == 2319 MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED) 2320 { 2321 pBuffer = 2322 &sc->fw_diag_buffer_list[ 2323 rel_rep->BufferType]; 2324 pBuffer->valid_data = TRUE; 2325 pBuffer->owned_by_firmware = 2326 FALSE; 2327 pBuffer->immediate = FALSE; 2328 } 2329 } else 2330 mps_dispatch_event(sc, baddr, 2331 (MPI2_EVENT_NOTIFICATION_REPLY *) 2332 reply); 2333 } else { 2334 cm = &sc->commands[le16toh(desc->AddressReply.SMID)]; 2335 cm->cm_reply = reply; 2336 cm->cm_reply_data = 2337 le32toh(desc->AddressReply.ReplyFrameAddress); 2338 } 2339 break; 2340 } 2341 case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS: 2342 case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER: 2343 case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS: 2344 default: 2345 /* Unhandled */ 2346 mps_dprint(sc, MPS_ERROR, "Unhandled reply 0x%x\n", 2347 desc->Default.ReplyFlags); 2348 cm = NULL; 2349 break; 2350 } 2351 2352 2353 if (cm != NULL) { 2354 // Print Error reply frame 2355 if (cm->cm_reply) 2356 mps_display_reply_info(sc,cm->cm_reply); 2357 mps_complete_command(sc, cm); 2358 } 2359 2360 desc->Words.Low = 0xffffffff; 2361 desc->Words.High = 0xffffffff; 2362 } 2363 2364 if (pq != sc->replypostindex) { 2365 mps_dprint(sc, MPS_TRACE, 2366 "%s sc %p writing postindex %d\n", 2367 __func__, sc, sc->replypostindex); 2368 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, sc->replypostindex); 2369 } 2370 2371 return; 2372 } 2373 2374 static void 2375 mps_dispatch_event(struct mps_softc *sc, uintptr_t data, 2376 MPI2_EVENT_NOTIFICATION_REPLY *reply) 2377 { 2378 struct mps_event_handle *eh; 2379 int event, handled = 0; 2380 2381 event = le16toh(reply->Event); 2382 TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2383 if (isset(eh->mask, event)) { 2384 eh->callback(sc, data, reply); 2385 handled++; 2386 } 2387 } 2388 2389 if (handled == 0) 2390 mps_dprint(sc, MPS_EVENT, "Unhandled event 0x%x\n", le16toh(event)); 2391 2392 /* 2393 * This is the only place that the event/reply should be freed. 2394 * Anything wanting to hold onto the event data should have 2395 * already copied it into their own storage. 2396 */ 2397 mps_free_reply(sc, data); 2398 } 2399 2400 static void 2401 mps_reregister_events_complete(struct mps_softc *sc, struct mps_command *cm) 2402 { 2403 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2404 2405 if (cm->cm_reply) 2406 MPS_DPRINT_EVENT(sc, generic, 2407 (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply); 2408 2409 mps_free_command(sc, cm); 2410 2411 /* next, send a port enable */ 2412 mpssas_startup(sc); 2413 } 2414 2415 /* 2416 * For both register_events and update_events, the caller supplies a bitmap 2417 * of events that it _wants_. These functions then turn that into a bitmask 2418 * suitable for the controller. 2419 */ 2420 int 2421 mps_register_events(struct mps_softc *sc, u32 *mask, 2422 mps_evt_callback_t *cb, void *data, struct mps_event_handle **handle) 2423 { 2424 struct mps_event_handle *eh; 2425 int error = 0; 2426 2427 eh = malloc(sizeof(struct mps_event_handle), M_MPT2, M_WAITOK|M_ZERO); 2428 if(!eh) { 2429 mps_dprint(sc, MPS_ERROR, "Cannot allocate event memory\n"); 2430 return (ENOMEM); 2431 } 2432 eh->callback = cb; 2433 eh->data = data; 2434 TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list); 2435 if (mask != NULL) 2436 error = mps_update_events(sc, eh, mask); 2437 *handle = eh; 2438 2439 return (error); 2440 } 2441 2442 int 2443 mps_update_events(struct mps_softc *sc, struct mps_event_handle *handle, 2444 u32 *mask) 2445 { 2446 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2447 MPI2_EVENT_NOTIFICATION_REPLY *reply = NULL; 2448 struct mps_command *cm; 2449 int error, i; 2450 2451 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2452 2453 if ((mask != NULL) && (handle != NULL)) 2454 bcopy(mask, &handle->mask[0], sizeof(u32) * 2455 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2456 2457 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2458 sc->event_mask[i] = -1; 2459 2460 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2461 sc->event_mask[i] &= ~handle->mask[i]; 2462 2463 2464 if ((cm = mps_alloc_command(sc)) == NULL) 2465 return (EBUSY); 2466 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2467 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2468 evtreq->MsgFlags = 0; 2469 evtreq->SASBroadcastPrimitiveMasks = 0; 2470 #ifdef MPS_DEBUG_ALL_EVENTS 2471 { 2472 u_char fullmask[16]; 2473 memset(fullmask, 0x00, 16); 2474 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) * 2475 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2476 } 2477 #else 2478 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2479 evtreq->EventMasks[i] = 2480 htole32(sc->event_mask[i]); 2481 #endif 2482 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2483 cm->cm_data = NULL; 2484 2485 error = mps_wait_command(sc, &cm, 60, 0); 2486 if (cm != NULL) 2487 reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply; 2488 if ((reply == NULL) || 2489 (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 2490 error = ENXIO; 2491 2492 if (reply) 2493 MPS_DPRINT_EVENT(sc, generic, reply); 2494 2495 mps_dprint(sc, MPS_TRACE, "%s finished error %d\n", __func__, error); 2496 2497 if (cm != NULL) 2498 mps_free_command(sc, cm); 2499 return (error); 2500 } 2501 2502 static int 2503 mps_reregister_events(struct mps_softc *sc) 2504 { 2505 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2506 struct mps_command *cm; 2507 struct mps_event_handle *eh; 2508 int error, i; 2509 2510 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2511 2512 /* first, reregister events */ 2513 2514 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2515 sc->event_mask[i] = -1; 2516 2517 TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2518 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2519 sc->event_mask[i] &= ~eh->mask[i]; 2520 } 2521 2522 if ((cm = mps_alloc_command(sc)) == NULL) 2523 return (EBUSY); 2524 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2525 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2526 evtreq->MsgFlags = 0; 2527 evtreq->SASBroadcastPrimitiveMasks = 0; 2528 #ifdef MPS_DEBUG_ALL_EVENTS 2529 { 2530 u_char fullmask[16]; 2531 memset(fullmask, 0x00, 16); 2532 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) * 2533 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2534 } 2535 #else 2536 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2537 evtreq->EventMasks[i] = 2538 htole32(sc->event_mask[i]); 2539 #endif 2540 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2541 cm->cm_data = NULL; 2542 cm->cm_complete = mps_reregister_events_complete; 2543 2544 error = mps_map_command(sc, cm); 2545 2546 mps_dprint(sc, MPS_TRACE, "%s finished with error %d\n", __func__, 2547 error); 2548 return (error); 2549 } 2550 2551 void 2552 mps_deregister_events(struct mps_softc *sc, struct mps_event_handle *handle) 2553 { 2554 2555 TAILQ_REMOVE(&sc->event_list, handle, eh_list); 2556 free(handle, M_MPT2); 2557 } 2558 2559 /* 2560 * Add a chain element as the next SGE for the specified command. 2561 * Reset cm_sge and cm_sgesize to indicate all the available space. 2562 */ 2563 static int 2564 mps_add_chain(struct mps_command *cm) 2565 { 2566 MPI2_SGE_CHAIN32 *sgc; 2567 struct mps_chain *chain; 2568 u_int space; 2569 2570 if (cm->cm_sglsize < MPS_SGC_SIZE) 2571 panic("MPS: Need SGE Error Code\n"); 2572 2573 chain = mps_alloc_chain(cm->cm_sc); 2574 if (chain == NULL) 2575 return (ENOBUFS); 2576 2577 space = cm->cm_sc->reqframesz; 2578 2579 /* 2580 * Note: a double-linked list is used to make it easier to 2581 * walk for debugging. 2582 */ 2583 TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link); 2584 2585 sgc = (MPI2_SGE_CHAIN32 *)&cm->cm_sge->MpiChain; 2586 sgc->Length = htole16(space); 2587 sgc->NextChainOffset = 0; 2588 /* TODO Looks like bug in Setting sgc->Flags. 2589 * sgc->Flags = ( MPI2_SGE_FLAGS_CHAIN_ELEMENT | MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 2590 * MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT 2591 * This is fine.. because we are not using simple element. In case of 2592 * MPI2_SGE_CHAIN32, we have separate Length and Flags feild. 2593 */ 2594 sgc->Flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT; 2595 sgc->Address = htole32(chain->chain_busaddr); 2596 2597 cm->cm_sge = (MPI2_SGE_IO_UNION *)&chain->chain->MpiSimple; 2598 cm->cm_sglsize = space; 2599 return (0); 2600 } 2601 2602 /* 2603 * Add one scatter-gather element (chain, simple, transaction context) 2604 * to the scatter-gather list for a command. Maintain cm_sglsize and 2605 * cm_sge as the remaining size and pointer to the next SGE to fill 2606 * in, respectively. 2607 */ 2608 int 2609 mps_push_sge(struct mps_command *cm, void *sgep, size_t len, int segsleft) 2610 { 2611 MPI2_SGE_TRANSACTION_UNION *tc = sgep; 2612 MPI2_SGE_SIMPLE64 *sge = sgep; 2613 int error, type; 2614 uint32_t saved_buf_len, saved_address_low, saved_address_high; 2615 2616 type = (tc->Flags & MPI2_SGE_FLAGS_ELEMENT_MASK); 2617 2618 #ifdef INVARIANTS 2619 switch (type) { 2620 case MPI2_SGE_FLAGS_TRANSACTION_ELEMENT: { 2621 if (len != tc->DetailsLength + 4) 2622 panic("TC %p length %u or %zu?", tc, 2623 tc->DetailsLength + 4, len); 2624 } 2625 break; 2626 case MPI2_SGE_FLAGS_CHAIN_ELEMENT: 2627 /* Driver only uses 32-bit chain elements */ 2628 if (len != MPS_SGC_SIZE) 2629 panic("CHAIN %p length %u or %zu?", sgep, 2630 MPS_SGC_SIZE, len); 2631 break; 2632 case MPI2_SGE_FLAGS_SIMPLE_ELEMENT: 2633 /* Driver only uses 64-bit SGE simple elements */ 2634 if (len != MPS_SGE64_SIZE) 2635 panic("SGE simple %p length %u or %zu?", sge, 2636 MPS_SGE64_SIZE, len); 2637 if (((le32toh(sge->FlagsLength) >> MPI2_SGE_FLAGS_SHIFT) & 2638 MPI2_SGE_FLAGS_ADDRESS_SIZE) == 0) 2639 panic("SGE simple %p not marked 64-bit?", sge); 2640 2641 break; 2642 default: 2643 panic("Unexpected SGE %p, flags %02x", tc, tc->Flags); 2644 } 2645 #endif 2646 2647 /* 2648 * case 1: 1 more segment, enough room for it 2649 * case 2: 2 more segments, enough room for both 2650 * case 3: >=2 more segments, only enough room for 1 and a chain 2651 * case 4: >=1 more segment, enough room for only a chain 2652 * case 5: >=1 more segment, no room for anything (error) 2653 */ 2654 2655 /* 2656 * There should be room for at least a chain element, or this 2657 * code is buggy. Case (5). 2658 */ 2659 if (cm->cm_sglsize < MPS_SGC_SIZE) 2660 panic("MPS: Need SGE Error Code\n"); 2661 2662 if (segsleft >= 1 && cm->cm_sglsize < len + MPS_SGC_SIZE) { 2663 /* 2664 * 1 or more segment, enough room for only a chain. 2665 * Hope the previous element wasn't a Simple entry 2666 * that needed to be marked with 2667 * MPI2_SGE_FLAGS_LAST_ELEMENT. Case (4). 2668 */ 2669 if ((error = mps_add_chain(cm)) != 0) 2670 return (error); 2671 } 2672 2673 if (segsleft >= 2 && 2674 cm->cm_sglsize < len + MPS_SGC_SIZE + MPS_SGE64_SIZE) { 2675 /* 2676 * There are 2 or more segments left to add, and only 2677 * enough room for 1 and a chain. Case (3). 2678 * 2679 * Mark as last element in this chain if necessary. 2680 */ 2681 if (type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { 2682 sge->FlagsLength |= htole32( 2683 MPI2_SGE_FLAGS_LAST_ELEMENT << MPI2_SGE_FLAGS_SHIFT); 2684 } 2685 2686 /* 2687 * Add the item then a chain. Do the chain now, 2688 * rather than on the next iteration, to simplify 2689 * understanding the code. 2690 */ 2691 cm->cm_sglsize -= len; 2692 bcopy(sgep, cm->cm_sge, len); 2693 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2694 return (mps_add_chain(cm)); 2695 } 2696 2697 #ifdef INVARIANTS 2698 /* Case 1: 1 more segment, enough room for it. */ 2699 if (segsleft == 1 && cm->cm_sglsize < len) 2700 panic("1 seg left and no room? %u versus %zu", 2701 cm->cm_sglsize, len); 2702 2703 /* Case 2: 2 more segments, enough room for both */ 2704 if (segsleft == 2 && cm->cm_sglsize < len + MPS_SGE64_SIZE) 2705 panic("2 segs left and no room? %u versus %zu", 2706 cm->cm_sglsize, len); 2707 #endif 2708 2709 if (segsleft == 1 && type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { 2710 /* 2711 * If this is a bi-directional request, need to account for that 2712 * here. Save the pre-filled sge values. These will be used 2713 * either for the 2nd SGL or for a single direction SGL. If 2714 * cm_out_len is non-zero, this is a bi-directional request, so 2715 * fill in the OUT SGL first, then the IN SGL, otherwise just 2716 * fill in the IN SGL. Note that at this time, when filling in 2717 * 2 SGL's for a bi-directional request, they both use the same 2718 * DMA buffer (same cm command). 2719 */ 2720 saved_buf_len = le32toh(sge->FlagsLength) & 0x00FFFFFF; 2721 saved_address_low = sge->Address.Low; 2722 saved_address_high = sge->Address.High; 2723 if (cm->cm_out_len) { 2724 sge->FlagsLength = htole32(cm->cm_out_len | 2725 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2726 MPI2_SGE_FLAGS_END_OF_BUFFER | 2727 MPI2_SGE_FLAGS_HOST_TO_IOC | 2728 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2729 MPI2_SGE_FLAGS_SHIFT)); 2730 cm->cm_sglsize -= len; 2731 bcopy(sgep, cm->cm_sge, len); 2732 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge 2733 + len); 2734 } 2735 saved_buf_len |= 2736 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2737 MPI2_SGE_FLAGS_END_OF_BUFFER | 2738 MPI2_SGE_FLAGS_LAST_ELEMENT | 2739 MPI2_SGE_FLAGS_END_OF_LIST | 2740 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2741 MPI2_SGE_FLAGS_SHIFT); 2742 if (cm->cm_flags & MPS_CM_FLAGS_DATAIN) { 2743 saved_buf_len |= 2744 ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) << 2745 MPI2_SGE_FLAGS_SHIFT); 2746 } else { 2747 saved_buf_len |= 2748 ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) << 2749 MPI2_SGE_FLAGS_SHIFT); 2750 } 2751 sge->FlagsLength = htole32(saved_buf_len); 2752 sge->Address.Low = saved_address_low; 2753 sge->Address.High = saved_address_high; 2754 } 2755 2756 cm->cm_sglsize -= len; 2757 bcopy(sgep, cm->cm_sge, len); 2758 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2759 return (0); 2760 } 2761 2762 /* 2763 * Add one dma segment to the scatter-gather list for a command. 2764 */ 2765 int 2766 mps_add_dmaseg(struct mps_command *cm, vm_paddr_t pa, size_t len, u_int flags, 2767 int segsleft) 2768 { 2769 MPI2_SGE_SIMPLE64 sge; 2770 2771 /* 2772 * This driver always uses 64-bit address elements for simplicity. 2773 */ 2774 bzero(&sge, sizeof(sge)); 2775 flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2776 MPI2_SGE_FLAGS_64_BIT_ADDRESSING; 2777 sge.FlagsLength = htole32(len | (flags << MPI2_SGE_FLAGS_SHIFT)); 2778 mps_from_u64(pa, &sge.Address); 2779 2780 return (mps_push_sge(cm, &sge, sizeof sge, segsleft)); 2781 } 2782 2783 static void 2784 mps_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 2785 { 2786 struct mps_softc *sc; 2787 struct mps_command *cm; 2788 u_int i, dir, sflags; 2789 2790 cm = (struct mps_command *)arg; 2791 sc = cm->cm_sc; 2792 2793 /* 2794 * In this case, just print out a warning and let the chip tell the 2795 * user they did the wrong thing. 2796 */ 2797 if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) { 2798 mps_dprint(sc, MPS_ERROR, 2799 "%s: warning: busdma returned %d segments, " 2800 "more than the %d allowed\n", __func__, nsegs, 2801 cm->cm_max_segs); 2802 } 2803 2804 /* 2805 * Set up DMA direction flags. Bi-directional requests are also handled 2806 * here. In that case, both direction flags will be set. 2807 */ 2808 sflags = 0; 2809 if (cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) { 2810 /* 2811 * We have to add a special case for SMP passthrough, there 2812 * is no easy way to generically handle it. The first 2813 * S/G element is used for the command (therefore the 2814 * direction bit needs to be set). The second one is used 2815 * for the reply. We'll leave it to the caller to make 2816 * sure we only have two buffers. 2817 */ 2818 /* 2819 * Even though the busdma man page says it doesn't make 2820 * sense to have both direction flags, it does in this case. 2821 * We have one s/g element being accessed in each direction. 2822 */ 2823 dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD; 2824 2825 /* 2826 * Set the direction flag on the first buffer in the SMP 2827 * passthrough request. We'll clear it for the second one. 2828 */ 2829 sflags |= MPI2_SGE_FLAGS_DIRECTION | 2830 MPI2_SGE_FLAGS_END_OF_BUFFER; 2831 } else if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) { 2832 sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC; 2833 dir = BUS_DMASYNC_PREWRITE; 2834 } else 2835 dir = BUS_DMASYNC_PREREAD; 2836 2837 for (i = 0; i < nsegs; i++) { 2838 if ((cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) && (i != 0)) { 2839 sflags &= ~MPI2_SGE_FLAGS_DIRECTION; 2840 } 2841 error = mps_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len, 2842 sflags, nsegs - i); 2843 if (error != 0) { 2844 /* Resource shortage, roll back! */ 2845 if (ratecheck(&sc->lastfail, &mps_chainfail_interval)) 2846 mps_dprint(sc, MPS_INFO, "Out of chain frames, " 2847 "consider increasing hw.mps.max_chains.\n"); 2848 cm->cm_flags |= MPS_CM_FLAGS_CHAIN_FAILED; 2849 mps_complete_command(sc, cm); 2850 return; 2851 } 2852 } 2853 2854 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir); 2855 mps_enqueue_request(sc, cm); 2856 2857 return; 2858 } 2859 2860 static void 2861 mps_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize, 2862 int error) 2863 { 2864 mps_data_cb(arg, segs, nsegs, error); 2865 } 2866 2867 /* 2868 * This is the routine to enqueue commands ansynchronously. 2869 * Note that the only error path here is from bus_dmamap_load(), which can 2870 * return EINPROGRESS if it is waiting for resources. Other than this, it's 2871 * assumed that if you have a command in-hand, then you have enough credits 2872 * to use it. 2873 */ 2874 int 2875 mps_map_command(struct mps_softc *sc, struct mps_command *cm) 2876 { 2877 int error = 0; 2878 2879 if (cm->cm_flags & MPS_CM_FLAGS_USE_UIO) { 2880 error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap, 2881 &cm->cm_uio, mps_data_cb2, cm, 0); 2882 } else if (cm->cm_flags & MPS_CM_FLAGS_USE_CCB) { 2883 error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap, 2884 cm->cm_data, mps_data_cb, cm, 0); 2885 } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) { 2886 error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap, 2887 cm->cm_data, cm->cm_length, mps_data_cb, cm, 0); 2888 } else { 2889 /* Add a zero-length element as needed */ 2890 if (cm->cm_sge != NULL) 2891 mps_add_dmaseg(cm, 0, 0, 0, 1); 2892 mps_enqueue_request(sc, cm); 2893 } 2894 2895 return (error); 2896 } 2897 2898 /* 2899 * This is the routine to enqueue commands synchronously. An error of 2900 * EINPROGRESS from mps_map_command() is ignored since the command will 2901 * be executed and enqueued automatically. Other errors come from msleep(). 2902 */ 2903 int 2904 mps_wait_command(struct mps_softc *sc, struct mps_command **cmp, int timeout, 2905 int sleep_flag) 2906 { 2907 int error, rc; 2908 struct timeval cur_time, start_time; 2909 struct mps_command *cm = *cmp; 2910 2911 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) 2912 return EBUSY; 2913 2914 cm->cm_complete = NULL; 2915 cm->cm_flags |= MPS_CM_FLAGS_POLLED; 2916 error = mps_map_command(sc, cm); 2917 if ((error != 0) && (error != EINPROGRESS)) 2918 return (error); 2919 2920 /* 2921 * Check for context and wait for 50 mSec at a time until time has 2922 * expired or the command has finished. If msleep can't be used, need 2923 * to poll. 2924 */ 2925 if (curthread->td_no_sleeping != 0) 2926 sleep_flag = NO_SLEEP; 2927 getmicrouptime(&start_time); 2928 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) { 2929 cm->cm_flags |= MPS_CM_FLAGS_WAKEUP; 2930 error = msleep(cm, &sc->mps_mtx, 0, "mpswait", timeout*hz); 2931 if (error == EWOULDBLOCK) { 2932 /* 2933 * Record the actual elapsed time in the case of a 2934 * timeout for the message below. 2935 */ 2936 getmicrouptime(&cur_time); 2937 timevalsub(&cur_time, &start_time); 2938 } 2939 } else { 2940 while ((cm->cm_flags & MPS_CM_FLAGS_COMPLETE) == 0) { 2941 mps_intr_locked(sc); 2942 if (sleep_flag == CAN_SLEEP) 2943 pause("mpswait", hz/20); 2944 else 2945 DELAY(50000); 2946 2947 getmicrouptime(&cur_time); 2948 timevalsub(&cur_time, &start_time); 2949 if (cur_time.tv_sec > timeout) { 2950 error = EWOULDBLOCK; 2951 break; 2952 } 2953 } 2954 } 2955 2956 if (error == EWOULDBLOCK) { 2957 mps_dprint(sc, MPS_FAULT, "Calling Reinit from %s, timeout=%d," 2958 " elapsed=%jd\n", __func__, timeout, 2959 (intmax_t)cur_time.tv_sec); 2960 rc = mps_reinit(sc); 2961 mps_dprint(sc, MPS_FAULT, "Reinit %s\n", (rc == 0) ? "success" : 2962 "failed"); 2963 if (sc->mps_flags & MPS_FLAGS_REALLOCATED) { 2964 /* 2965 * Tell the caller that we freed the command in a 2966 * reinit. 2967 */ 2968 *cmp = NULL; 2969 } 2970 error = ETIMEDOUT; 2971 } 2972 return (error); 2973 } 2974 2975 /* 2976 * The MPT driver had a verbose interface for config pages. In this driver, 2977 * reduce it to much simpler terms, similar to the Linux driver. 2978 */ 2979 int 2980 mps_read_config_page(struct mps_softc *sc, struct mps_config_params *params) 2981 { 2982 MPI2_CONFIG_REQUEST *req; 2983 struct mps_command *cm; 2984 int error; 2985 2986 if (sc->mps_flags & MPS_FLAGS_BUSY) { 2987 return (EBUSY); 2988 } 2989 2990 cm = mps_alloc_command(sc); 2991 if (cm == NULL) { 2992 return (EBUSY); 2993 } 2994 2995 req = (MPI2_CONFIG_REQUEST *)cm->cm_req; 2996 req->Function = MPI2_FUNCTION_CONFIG; 2997 req->Action = params->action; 2998 req->SGLFlags = 0; 2999 req->ChainOffset = 0; 3000 req->PageAddress = params->page_address; 3001 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 3002 MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr; 3003 3004 hdr = ¶ms->hdr.Ext; 3005 req->ExtPageType = hdr->ExtPageType; 3006 req->ExtPageLength = hdr->ExtPageLength; 3007 req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED; 3008 req->Header.PageLength = 0; /* Must be set to zero */ 3009 req->Header.PageNumber = hdr->PageNumber; 3010 req->Header.PageVersion = hdr->PageVersion; 3011 } else { 3012 MPI2_CONFIG_PAGE_HEADER *hdr; 3013 3014 hdr = ¶ms->hdr.Struct; 3015 req->Header.PageType = hdr->PageType; 3016 req->Header.PageNumber = hdr->PageNumber; 3017 req->Header.PageLength = hdr->PageLength; 3018 req->Header.PageVersion = hdr->PageVersion; 3019 } 3020 3021 cm->cm_data = params->buffer; 3022 cm->cm_length = params->length; 3023 if (cm->cm_data != NULL) { 3024 cm->cm_sge = &req->PageBufferSGE; 3025 cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION); 3026 cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_DATAIN; 3027 } else 3028 cm->cm_sge = NULL; 3029 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 3030 3031 cm->cm_complete_data = params; 3032 if (params->callback != NULL) { 3033 cm->cm_complete = mps_config_complete; 3034 return (mps_map_command(sc, cm)); 3035 } else { 3036 error = mps_wait_command(sc, &cm, 0, CAN_SLEEP); 3037 if (error) { 3038 mps_dprint(sc, MPS_FAULT, 3039 "Error %d reading config page\n", error); 3040 if (cm != NULL) 3041 mps_free_command(sc, cm); 3042 return (error); 3043 } 3044 mps_config_complete(sc, cm); 3045 } 3046 3047 return (0); 3048 } 3049 3050 int 3051 mps_write_config_page(struct mps_softc *sc, struct mps_config_params *params) 3052 { 3053 return (EINVAL); 3054 } 3055 3056 static void 3057 mps_config_complete(struct mps_softc *sc, struct mps_command *cm) 3058 { 3059 MPI2_CONFIG_REPLY *reply; 3060 struct mps_config_params *params; 3061 3062 MPS_FUNCTRACE(sc); 3063 params = cm->cm_complete_data; 3064 3065 if (cm->cm_data != NULL) { 3066 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, 3067 BUS_DMASYNC_POSTREAD); 3068 bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap); 3069 } 3070 3071 /* 3072 * XXX KDM need to do more error recovery? This results in the 3073 * device in question not getting probed. 3074 */ 3075 if ((cm->cm_flags & MPS_CM_FLAGS_ERROR_MASK) != 0) { 3076 params->status = MPI2_IOCSTATUS_BUSY; 3077 goto done; 3078 } 3079 3080 reply = (MPI2_CONFIG_REPLY *)cm->cm_reply; 3081 if (reply == NULL) { 3082 params->status = MPI2_IOCSTATUS_BUSY; 3083 goto done; 3084 } 3085 params->status = reply->IOCStatus; 3086 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 3087 params->hdr.Ext.ExtPageType = reply->ExtPageType; 3088 params->hdr.Ext.ExtPageLength = reply->ExtPageLength; 3089 params->hdr.Ext.PageType = reply->Header.PageType; 3090 params->hdr.Ext.PageNumber = reply->Header.PageNumber; 3091 params->hdr.Ext.PageVersion = reply->Header.PageVersion; 3092 } else { 3093 params->hdr.Struct.PageType = reply->Header.PageType; 3094 params->hdr.Struct.PageNumber = reply->Header.PageNumber; 3095 params->hdr.Struct.PageLength = reply->Header.PageLength; 3096 params->hdr.Struct.PageVersion = reply->Header.PageVersion; 3097 } 3098 3099 done: 3100 mps_free_command(sc, cm); 3101 if (params->callback != NULL) 3102 params->callback(sc, params); 3103 3104 return; 3105 } 3106