1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2006-2015 LSI Corp. 5 * Copyright (c) 2013-2015 Avago Technologies 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 30 * 31 * $FreeBSD$ 32 */ 33 34 /* 35 * Copyright (c) 2006-2015 LSI Corporation. 36 * Copyright (c) 2013-2015 Avago Technologies 37 * 38 * 39 * Name: mpi2_init.h 40 * Title: MPI SCSI initiator mode messages and structures 41 * Creation Date: June 23, 2006 42 * 43 * mpi2_init.h Version: 02.00.11 44 * 45 * Version History 46 * --------------- 47 * 48 * Date Version Description 49 * -------- -------- ------------------------------------------------------ 50 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. 51 * 10-31-07 02.00.01 Fixed name for pMpi2SCSITaskManagementRequest_t. 52 * 12-18-07 02.00.02 Modified Task Management Target Reset Method defines. 53 * 02-29-08 02.00.03 Added Query Task Set and Query Unit Attention. 54 * 03-03-08 02.00.04 Fixed name of struct _MPI2_SCSI_TASK_MANAGE_REPLY. 55 * 05-21-08 02.00.05 Fixed typo in name of Mpi2SepRequest_t. 56 * 10-02-08 02.00.06 Removed Untagged and No Disconnect values from SCSI IO 57 * Control field Task Attribute flags. 58 * Moved LUN field defines to mpi2.h because they are 59 * common to many structures. 60 * 05-06-09 02.00.07 Changed task management type of Query Unit Attention to 61 * Query Asynchronous Event. 62 * Defined two new bits in the SlotStatus field of the SCSI 63 * Enclosure Processor Request and Reply. 64 * 10-28-09 02.00.08 Added defines for decoding the ResponseInfo bytes for 65 * both SCSI IO Error Reply and SCSI Task Management Reply. 66 * Added ResponseInfo field to MPI2_SCSI_TASK_MANAGE_REPLY. 67 * Added MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG define. 68 * 02-10-10 02.00.09 Removed unused structure that had "#if 0" around it. 69 * 05-12-10 02.00.10 Added optional vendor-unique region to SCSI IO Request. 70 * 11-10-10 02.00.11 Added MPI2_SCSIIO_NUM_SGLOFFSETS define. 71 * -------------------------------------------------------------------------- 72 */ 73 74 #ifndef MPI2_INIT_H 75 #define MPI2_INIT_H 76 77 /***************************************************************************** 78 * 79 * SCSI Initiator Messages 80 * 81 *****************************************************************************/ 82 83 /**************************************************************************** 84 * SCSI IO messages and associated structures 85 ****************************************************************************/ 86 87 typedef struct 88 { 89 U8 CDB[20]; /* 0x00 */ 90 U32 PrimaryReferenceTag; /* 0x14 */ 91 U16 PrimaryApplicationTag; /* 0x18 */ 92 U16 PrimaryApplicationTagMask; /* 0x1A */ 93 U32 TransferLength; /* 0x1C */ 94 } MPI2_SCSI_IO_CDB_EEDP32, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_EEDP32, 95 Mpi2ScsiIoCdbEedp32_t, MPI2_POINTER pMpi2ScsiIoCdbEedp32_t; 96 97 typedef union 98 { 99 U8 CDB32[32]; 100 MPI2_SCSI_IO_CDB_EEDP32 EEDP32; 101 MPI2_SGE_SIMPLE_UNION SGE; 102 } MPI2_SCSI_IO_CDB_UNION, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_UNION, 103 Mpi2ScsiIoCdb_t, MPI2_POINTER pMpi2ScsiIoCdb_t; 104 105 /* SCSI IO Request Message */ 106 typedef struct _MPI2_SCSI_IO_REQUEST 107 { 108 U16 DevHandle; /* 0x00 */ 109 U8 ChainOffset; /* 0x02 */ 110 U8 Function; /* 0x03 */ 111 U16 Reserved1; /* 0x04 */ 112 U8 Reserved2; /* 0x06 */ 113 U8 MsgFlags; /* 0x07 */ 114 U8 VP_ID; /* 0x08 */ 115 U8 VF_ID; /* 0x09 */ 116 U16 Reserved3; /* 0x0A */ 117 U32 SenseBufferLowAddress; /* 0x0C */ 118 U16 SGLFlags; /* 0x10 */ 119 U8 SenseBufferLength; /* 0x12 */ 120 U8 Reserved4; /* 0x13 */ 121 U8 SGLOffset0; /* 0x14 */ 122 U8 SGLOffset1; /* 0x15 */ 123 U8 SGLOffset2; /* 0x16 */ 124 U8 SGLOffset3; /* 0x17 */ 125 U32 SkipCount; /* 0x18 */ 126 U32 DataLength; /* 0x1C */ 127 U32 BidirectionalDataLength; /* 0x20 */ 128 U16 IoFlags; /* 0x24 */ 129 U16 EEDPFlags; /* 0x26 */ 130 U32 EEDPBlockSize; /* 0x28 */ 131 U32 SecondaryReferenceTag; /* 0x2C */ 132 U16 SecondaryApplicationTag; /* 0x30 */ 133 U16 ApplicationTagTranslationMask; /* 0x32 */ 134 U8 LUN[8]; /* 0x34 */ 135 U32 Control; /* 0x3C */ 136 MPI2_SCSI_IO_CDB_UNION CDB; /* 0x40 */ 137 138 #ifdef MPI2_SCSI_IO_VENDOR_UNIQUE_REGION /* typically this is left undefined */ 139 MPI2_SCSI_IO_VENDOR_UNIQUE VendorRegion; 140 #endif 141 142 MPI2_SGE_IO_UNION SGL; /* 0x60 */ 143 144 } MPI2_SCSI_IO_REQUEST, MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST, 145 Mpi2SCSIIORequest_t, MPI2_POINTER pMpi2SCSIIORequest_t; 146 147 /* SCSI IO MsgFlags bits */ 148 149 /* MsgFlags for SenseBufferAddressSpace */ 150 #define MPI2_SCSIIO_MSGFLAGS_MASK_SENSE_ADDR (0x0C) 151 #define MPI2_SCSIIO_MSGFLAGS_SYSTEM_SENSE_ADDR (0x00) 152 #define MPI2_SCSIIO_MSGFLAGS_IOCDDR_SENSE_ADDR (0x04) 153 #define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR (0x08) 154 #define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR (0x0C) 155 156 /* SCSI IO SGLFlags bits */ 157 158 /* base values for Data Location Address Space */ 159 #define MPI2_SCSIIO_SGLFLAGS_ADDR_MASK (0x0C) 160 #define MPI2_SCSIIO_SGLFLAGS_SYSTEM_ADDR (0x00) 161 #define MPI2_SCSIIO_SGLFLAGS_IOCDDR_ADDR (0x04) 162 #define MPI2_SCSIIO_SGLFLAGS_IOCPLB_ADDR (0x08) 163 #define MPI2_SCSIIO_SGLFLAGS_IOCPLBNTA_ADDR (0x0C) 164 165 /* base values for Type */ 166 #define MPI2_SCSIIO_SGLFLAGS_TYPE_MASK (0x03) 167 #define MPI2_SCSIIO_SGLFLAGS_TYPE_MPI (0x00) 168 #define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE32 (0x01) 169 #define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE64 (0x02) 170 171 /* shift values for each sub-field */ 172 #define MPI2_SCSIIO_SGLFLAGS_SGL3_SHIFT (12) 173 #define MPI2_SCSIIO_SGLFLAGS_SGL2_SHIFT (8) 174 #define MPI2_SCSIIO_SGLFLAGS_SGL1_SHIFT (4) 175 #define MPI2_SCSIIO_SGLFLAGS_SGL0_SHIFT (0) 176 177 /* number of SGLOffset fields */ 178 #define MPI2_SCSIIO_NUM_SGLOFFSETS (4) 179 180 /* SCSI IO IoFlags bits */ 181 182 /* Large CDB Address Space */ 183 #define MPI2_SCSIIO_CDB_ADDR_MASK (0x6000) 184 #define MPI2_SCSIIO_CDB_ADDR_SYSTEM (0x0000) 185 #define MPI2_SCSIIO_CDB_ADDR_IOCDDR (0x2000) 186 #define MPI2_SCSIIO_CDB_ADDR_IOCPLB (0x4000) 187 #define MPI2_SCSIIO_CDB_ADDR_IOCPLBNTA (0x6000) 188 189 #define MPI2_SCSIIO_IOFLAGS_LARGE_CDB (0x1000) 190 #define MPI2_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800) 191 #define MPI2_SCSIIO_IOFLAGS_MULTICAST (0x0400) 192 #define MPI2_SCSIIO_IOFLAGS_CMD_DETERMINES_DATA_DIR (0x0200) 193 #define MPI2_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF) 194 195 /* SCSI IO EEDPFlags bits */ 196 197 #define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG (0x8000) 198 #define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_REFTAG (0x4000) 199 #define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_APPTAG (0x2000) 200 #define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_APPTAG (0x1000) 201 202 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG (0x0400) 203 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG (0x0200) 204 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD (0x0100) 205 206 #define MPI2_SCSIIO_EEDPFLAGS_PASSTHRU_REFTAG (0x0008) 207 208 #define MPI2_SCSIIO_EEDPFLAGS_MASK_OP (0x0007) 209 #define MPI2_SCSIIO_EEDPFLAGS_NOOP_OP (0x0000) 210 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_OP (0x0001) 211 #define MPI2_SCSIIO_EEDPFLAGS_STRIP_OP (0x0002) 212 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP (0x0003) 213 #define MPI2_SCSIIO_EEDPFLAGS_INSERT_OP (0x0004) 214 #define MPI2_SCSIIO_EEDPFLAGS_REPLACE_OP (0x0006) 215 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REGEN_OP (0x0007) 216 217 /* SCSI IO LUN fields: use MPI2_LUN_ from mpi2.h */ 218 219 /* SCSI IO Control bits */ 220 #define MPI2_SCSIIO_CONTROL_ADDCDBLEN_MASK (0xFC000000) 221 #define MPI2_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26) 222 223 #define MPI2_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000) 224 #define MPI2_SCSIIO_CONTROL_NODATATRANSFER (0x00000000) 225 #define MPI2_SCSIIO_CONTROL_WRITE (0x01000000) 226 #define MPI2_SCSIIO_CONTROL_READ (0x02000000) 227 #define MPI2_SCSIIO_CONTROL_BIDIRECTIONAL (0x03000000) 228 229 #define MPI2_SCSIIO_CONTROL_TASKPRI_MASK (0x00007800) 230 #define MPI2_SCSIIO_CONTROL_TASKPRI_SHIFT (11) 231 232 #define MPI2_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700) 233 #define MPI2_SCSIIO_CONTROL_SIMPLEQ (0x00000000) 234 #define MPI2_SCSIIO_CONTROL_HEADOFQ (0x00000100) 235 #define MPI2_SCSIIO_CONTROL_ORDEREDQ (0x00000200) 236 #define MPI2_SCSIIO_CONTROL_ACAQ (0x00000400) 237 238 #define MPI2_SCSIIO_CONTROL_TLR_MASK (0x000000C0) 239 #define MPI2_SCSIIO_CONTROL_NO_TLR (0x00000000) 240 #define MPI2_SCSIIO_CONTROL_TLR_ON (0x00000040) 241 #define MPI2_SCSIIO_CONTROL_TLR_OFF (0x00000080) 242 243 /* SCSI IO Error Reply Message */ 244 typedef struct _MPI2_SCSI_IO_REPLY 245 { 246 U16 DevHandle; /* 0x00 */ 247 U8 MsgLength; /* 0x02 */ 248 U8 Function; /* 0x03 */ 249 U16 Reserved1; /* 0x04 */ 250 U8 Reserved2; /* 0x06 */ 251 U8 MsgFlags; /* 0x07 */ 252 U8 VP_ID; /* 0x08 */ 253 U8 VF_ID; /* 0x09 */ 254 U16 Reserved3; /* 0x0A */ 255 U8 SCSIStatus; /* 0x0C */ 256 U8 SCSIState; /* 0x0D */ 257 U16 IOCStatus; /* 0x0E */ 258 U32 IOCLogInfo; /* 0x10 */ 259 U32 TransferCount; /* 0x14 */ 260 U32 SenseCount; /* 0x18 */ 261 U32 ResponseInfo; /* 0x1C */ 262 U16 TaskTag; /* 0x20 */ 263 U16 Reserved4; /* 0x22 */ 264 U32 BidirectionalTransferCount; /* 0x24 */ 265 U32 Reserved5; /* 0x28 */ 266 U32 Reserved6; /* 0x2C */ 267 } MPI2_SCSI_IO_REPLY, MPI2_POINTER PTR_MPI2_SCSI_IO_REPLY, 268 Mpi2SCSIIOReply_t, MPI2_POINTER pMpi2SCSIIOReply_t; 269 270 /* SCSI IO Reply SCSIStatus values (SAM-4 status codes) */ 271 272 #define MPI2_SCSI_STATUS_GOOD (0x00) 273 #define MPI2_SCSI_STATUS_CHECK_CONDITION (0x02) 274 #define MPI2_SCSI_STATUS_CONDITION_MET (0x04) 275 #define MPI2_SCSI_STATUS_BUSY (0x08) 276 #define MPI2_SCSI_STATUS_INTERMEDIATE (0x10) 277 #define MPI2_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14) 278 #define MPI2_SCSI_STATUS_RESERVATION_CONFLICT (0x18) 279 #define MPI2_SCSI_STATUS_COMMAND_TERMINATED (0x22) /* obsolete */ 280 #define MPI2_SCSI_STATUS_TASK_SET_FULL (0x28) 281 #define MPI2_SCSI_STATUS_ACA_ACTIVE (0x30) 282 #define MPI2_SCSI_STATUS_TASK_ABORTED (0x40) 283 284 /* SCSI IO Reply SCSIState flags */ 285 286 #define MPI2_SCSI_STATE_RESPONSE_INFO_VALID (0x10) 287 #define MPI2_SCSI_STATE_TERMINATED (0x08) 288 #define MPI2_SCSI_STATE_NO_SCSI_STATUS (0x04) 289 #define MPI2_SCSI_STATE_AUTOSENSE_FAILED (0x02) 290 #define MPI2_SCSI_STATE_AUTOSENSE_VALID (0x01) 291 292 /* masks and shifts for the ResponseInfo field */ 293 294 #define MPI2_SCSI_RI_MASK_REASONCODE (0x000000FF) 295 #define MPI2_SCSI_RI_SHIFT_REASONCODE (0) 296 297 #define MPI2_SCSI_TASKTAG_UNKNOWN (0xFFFF) 298 299 /**************************************************************************** 300 * SCSI Task Management messages 301 ****************************************************************************/ 302 303 /* SCSI Task Management Request Message */ 304 typedef struct _MPI2_SCSI_TASK_MANAGE_REQUEST 305 { 306 U16 DevHandle; /* 0x00 */ 307 U8 ChainOffset; /* 0x02 */ 308 U8 Function; /* 0x03 */ 309 U8 Reserved1; /* 0x04 */ 310 U8 TaskType; /* 0x05 */ 311 U8 Reserved2; /* 0x06 */ 312 U8 MsgFlags; /* 0x07 */ 313 U8 VP_ID; /* 0x08 */ 314 U8 VF_ID; /* 0x09 */ 315 U16 Reserved3; /* 0x0A */ 316 U8 LUN[8]; /* 0x0C */ 317 U32 Reserved4[7]; /* 0x14 */ 318 U16 TaskMID; /* 0x30 */ 319 U16 Reserved5; /* 0x32 */ 320 } MPI2_SCSI_TASK_MANAGE_REQUEST, 321 MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REQUEST, 322 Mpi2SCSITaskManagementRequest_t, 323 MPI2_POINTER pMpi2SCSITaskManagementRequest_t; 324 325 /* TaskType values */ 326 327 #define MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01) 328 #define MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02) 329 #define MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03) 330 #define MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05) 331 #define MPI2_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06) 332 #define MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07) 333 #define MPI2_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08) 334 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_TASK_SET (0x09) 335 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT (0x0A) 336 337 /* obsolete TaskType name */ 338 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_UNIT_ATTENTION (MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT) 339 340 /* MsgFlags bits */ 341 342 #define MPI2_SCSITASKMGMT_MSGFLAGS_MASK_TARGET_RESET (0x18) 343 #define MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET (0x00) 344 #define MPI2_SCSITASKMGMT_MSGFLAGS_NEXUS_RESET_SRST (0x08) 345 #define MPI2_SCSITASKMGMT_MSGFLAGS_SAS_HARD_LINK_RESET (0x10) 346 347 #define MPI2_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01) 348 349 /* SCSI Task Management Reply Message */ 350 typedef struct _MPI2_SCSI_TASK_MANAGE_REPLY 351 { 352 U16 DevHandle; /* 0x00 */ 353 U8 MsgLength; /* 0x02 */ 354 U8 Function; /* 0x03 */ 355 U8 ResponseCode; /* 0x04 */ 356 U8 TaskType; /* 0x05 */ 357 U8 Reserved1; /* 0x06 */ 358 U8 MsgFlags; /* 0x07 */ 359 U8 VP_ID; /* 0x08 */ 360 U8 VF_ID; /* 0x09 */ 361 U16 Reserved2; /* 0x0A */ 362 U16 Reserved3; /* 0x0C */ 363 U16 IOCStatus; /* 0x0E */ 364 U32 IOCLogInfo; /* 0x10 */ 365 U32 TerminationCount; /* 0x14 */ 366 U32 ResponseInfo; /* 0x18 */ 367 } MPI2_SCSI_TASK_MANAGE_REPLY, 368 MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REPLY, 369 Mpi2SCSITaskManagementReply_t, MPI2_POINTER pMpi2SCSIManagementReply_t; 370 371 /* ResponseCode values */ 372 373 #define MPI2_SCSITASKMGMT_RSP_TM_COMPLETE (0x00) 374 #define MPI2_SCSITASKMGMT_RSP_INVALID_FRAME (0x02) 375 #define MPI2_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04) 376 #define MPI2_SCSITASKMGMT_RSP_TM_FAILED (0x05) 377 #define MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08) 378 #define MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09) 379 #define MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG (0x0A) 380 #define MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80) 381 382 /* masks and shifts for the ResponseInfo field */ 383 384 #define MPI2_SCSITASKMGMT_RI_MASK_REASONCODE (0x000000FF) 385 #define MPI2_SCSITASKMGMT_RI_SHIFT_REASONCODE (0) 386 #define MPI2_SCSITASKMGMT_RI_MASK_ARI2 (0x0000FF00) 387 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI2 (8) 388 #define MPI2_SCSITASKMGMT_RI_MASK_ARI1 (0x00FF0000) 389 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI1 (16) 390 #define MPI2_SCSITASKMGMT_RI_MASK_ARI0 (0xFF000000) 391 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI0 (24) 392 393 /**************************************************************************** 394 * SCSI Enclosure Processor messages 395 ****************************************************************************/ 396 397 /* SCSI Enclosure Processor Request Message */ 398 typedef struct _MPI2_SEP_REQUEST 399 { 400 U16 DevHandle; /* 0x00 */ 401 U8 ChainOffset; /* 0x02 */ 402 U8 Function; /* 0x03 */ 403 U8 Action; /* 0x04 */ 404 U8 Flags; /* 0x05 */ 405 U8 Reserved1; /* 0x06 */ 406 U8 MsgFlags; /* 0x07 */ 407 U8 VP_ID; /* 0x08 */ 408 U8 VF_ID; /* 0x09 */ 409 U16 Reserved2; /* 0x0A */ 410 U32 SlotStatus; /* 0x0C */ 411 U32 Reserved3; /* 0x10 */ 412 U32 Reserved4; /* 0x14 */ 413 U32 Reserved5; /* 0x18 */ 414 U16 Slot; /* 0x1C */ 415 U16 EnclosureHandle; /* 0x1E */ 416 } MPI2_SEP_REQUEST, MPI2_POINTER PTR_MPI2_SEP_REQUEST, 417 Mpi2SepRequest_t, MPI2_POINTER pMpi2SepRequest_t; 418 419 /* Action defines */ 420 #define MPI2_SEP_REQ_ACTION_WRITE_STATUS (0x00) 421 #define MPI2_SEP_REQ_ACTION_READ_STATUS (0x01) 422 423 /* Flags defines */ 424 #define MPI2_SEP_REQ_FLAGS_DEVHANDLE_ADDRESS (0x00) 425 #define MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01) 426 427 /* SlotStatus defines */ 428 #define MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000) 429 #define MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) 430 #define MPI2_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200) 431 #define MPI2_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100) 432 #define MPI2_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080) 433 #define MPI2_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040) 434 #define MPI2_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) 435 #define MPI2_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) 436 #define MPI2_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004) 437 #define MPI2_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002) 438 #define MPI2_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001) 439 440 /* SCSI Enclosure Processor Reply Message */ 441 typedef struct _MPI2_SEP_REPLY 442 { 443 U16 DevHandle; /* 0x00 */ 444 U8 MsgLength; /* 0x02 */ 445 U8 Function; /* 0x03 */ 446 U8 Action; /* 0x04 */ 447 U8 Flags; /* 0x05 */ 448 U8 Reserved1; /* 0x06 */ 449 U8 MsgFlags; /* 0x07 */ 450 U8 VP_ID; /* 0x08 */ 451 U8 VF_ID; /* 0x09 */ 452 U16 Reserved2; /* 0x0A */ 453 U16 Reserved3; /* 0x0C */ 454 U16 IOCStatus; /* 0x0E */ 455 U32 IOCLogInfo; /* 0x10 */ 456 U32 SlotStatus; /* 0x14 */ 457 U32 Reserved4; /* 0x18 */ 458 U16 Slot; /* 0x1C */ 459 U16 EnclosureHandle; /* 0x1E */ 460 } MPI2_SEP_REPLY, MPI2_POINTER PTR_MPI2_SEP_REPLY, 461 Mpi2SepReply_t, MPI2_POINTER pMpi2SepReply_t; 462 463 /* SlotStatus defines */ 464 #define MPI2_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000) 465 #define MPI2_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) 466 #define MPI2_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200) 467 #define MPI2_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100) 468 #define MPI2_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080) 469 #define MPI2_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040) 470 #define MPI2_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) 471 #define MPI2_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) 472 #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004) 473 #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002) 474 #define MPI2_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001) 475 476 #endif 477