xref: /freebsd/sys/dev/mps/mpi/mpi2.h (revision ef065d89e962d787f74b44954c7c70c58f12fb83)
1d043c564SKenneth D. Merry /*-
2*ef065d89SStephen McConnell  * Copyright (c) 2006-2015 LSI Corp.
3*ef065d89SStephen McConnell  * Copyright (c) 2013-2015 Avago Technologies
4d043c564SKenneth D. Merry  * All rights reserved.
5d043c564SKenneth D. Merry  *
6d043c564SKenneth D. Merry  * Redistribution and use in source and binary forms, with or without
7d043c564SKenneth D. Merry  * modification, are permitted provided that the following conditions
8d043c564SKenneth D. Merry  * are met:
9d043c564SKenneth D. Merry  * 1. Redistributions of source code must retain the above copyright
10d043c564SKenneth D. Merry  *    notice, this list of conditions and the following disclaimer.
11d043c564SKenneth D. Merry  * 2. Redistributions in binary form must reproduce the above copyright
12d043c564SKenneth D. Merry  *    notice, this list of conditions and the following disclaimer in the
13d043c564SKenneth D. Merry  *    documentation and/or other materials provided with the distribution.
14d043c564SKenneth D. Merry  *
15d043c564SKenneth D. Merry  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16d043c564SKenneth D. Merry  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17d043c564SKenneth D. Merry  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18d043c564SKenneth D. Merry  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19d043c564SKenneth D. Merry  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20d043c564SKenneth D. Merry  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21d043c564SKenneth D. Merry  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22d043c564SKenneth D. Merry  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23d043c564SKenneth D. Merry  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24d043c564SKenneth D. Merry  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25d043c564SKenneth D. Merry  * SUCH DAMAGE.
26d043c564SKenneth D. Merry  *
27*ef065d89SStephen McConnell  * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
28d043c564SKenneth D. Merry  *
29d043c564SKenneth D. Merry  * $FreeBSD$
30d043c564SKenneth D. Merry  */
31d043c564SKenneth D. Merry 
32d3c7b9a0SKenneth D. Merry /*
33*ef065d89SStephen McConnell  *  Copyright (c) 2006-2015 LSI Corporation.
34*ef065d89SStephen McConnell  *  Copyright (c) 2013-2015 Avago Technologies
35d3c7b9a0SKenneth D. Merry  *
36d3c7b9a0SKenneth D. Merry  *
37d3c7b9a0SKenneth D. Merry  *           Name:  mpi2.h
38d3c7b9a0SKenneth D. Merry  *          Title:  MPI Message independent structures and definitions
39d3c7b9a0SKenneth D. Merry  *                  including System Interface Register Set and
40d3c7b9a0SKenneth D. Merry  *                  scatter/gather formats.
41d3c7b9a0SKenneth D. Merry  *  Creation Date:  June 21, 2006
42d3c7b9a0SKenneth D. Merry  *
43d043c564SKenneth D. Merry  *  mpi2.h Version:  02.00.18
44d3c7b9a0SKenneth D. Merry  *
45d3c7b9a0SKenneth D. Merry  *  Version History
46d3c7b9a0SKenneth D. Merry  *  ---------------
47d3c7b9a0SKenneth D. Merry  *
48d3c7b9a0SKenneth D. Merry  *  Date      Version   Description
49d3c7b9a0SKenneth D. Merry  *  --------  --------  ------------------------------------------------------
50d3c7b9a0SKenneth D. Merry  *  04-30-07  02.00.00  Corresponds to Fusion-MPT MPI Specification Rev A.
51d3c7b9a0SKenneth D. Merry  *  06-04-07  02.00.01  Bumped MPI2_HEADER_VERSION_UNIT.
52d3c7b9a0SKenneth D. Merry  *  06-26-07  02.00.02  Bumped MPI2_HEADER_VERSION_UNIT.
53d3c7b9a0SKenneth D. Merry  *  08-31-07  02.00.03  Bumped MPI2_HEADER_VERSION_UNIT.
54d3c7b9a0SKenneth D. Merry  *                      Moved ReplyPostHostIndex register to offset 0x6C of the
55d3c7b9a0SKenneth D. Merry  *                      MPI2_SYSTEM_INTERFACE_REGS and modified the define for
56d3c7b9a0SKenneth D. Merry  *                      MPI2_REPLY_POST_HOST_INDEX_OFFSET.
57d3c7b9a0SKenneth D. Merry  *                      Added union of request descriptors.
58d3c7b9a0SKenneth D. Merry  *                      Added union of reply descriptors.
59d3c7b9a0SKenneth D. Merry  *  10-31-07  02.00.04  Bumped MPI2_HEADER_VERSION_UNIT.
60d3c7b9a0SKenneth D. Merry  *                      Added define for MPI2_VERSION_02_00.
61d3c7b9a0SKenneth D. Merry  *                      Fixed the size of the FunctionDependent5 field in the
62d3c7b9a0SKenneth D. Merry  *                      MPI2_DEFAULT_REPLY structure.
63d3c7b9a0SKenneth D. Merry  *  12-18-07  02.00.05  Bumped MPI2_HEADER_VERSION_UNIT.
64d3c7b9a0SKenneth D. Merry  *                      Removed the MPI-defined Fault Codes and extended the
65d3c7b9a0SKenneth D. Merry  *                      product specific codes up to 0xEFFF.
66d3c7b9a0SKenneth D. Merry  *                      Added a sixth key value for the WriteSequence register
67d3c7b9a0SKenneth D. Merry  *                      and changed the flush value to 0x0.
68d3c7b9a0SKenneth D. Merry  *                      Added message function codes for Diagnostic Buffer Post
69d3c7b9a0SKenneth D. Merry  *                      and Diagnsotic Release.
70d3c7b9a0SKenneth D. Merry  *                      New IOCStatus define: MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED
71d3c7b9a0SKenneth D. Merry  *                      Moved MPI2_VERSION_UNION from mpi2_ioc.h.
72d3c7b9a0SKenneth D. Merry  *  02-29-08  02.00.06  Bumped MPI2_HEADER_VERSION_UNIT.
73d3c7b9a0SKenneth D. Merry  *  03-03-08  02.00.07  Bumped MPI2_HEADER_VERSION_UNIT.
74d3c7b9a0SKenneth D. Merry  *  05-21-08  02.00.08  Bumped MPI2_HEADER_VERSION_UNIT.
75d3c7b9a0SKenneth D. Merry  *                      Added #defines for marking a reply descriptor as unused.
76d3c7b9a0SKenneth D. Merry  *  06-27-08  02.00.09  Bumped MPI2_HEADER_VERSION_UNIT.
77d3c7b9a0SKenneth D. Merry  *  10-02-08  02.00.10  Bumped MPI2_HEADER_VERSION_UNIT.
78d3c7b9a0SKenneth D. Merry  *                      Moved LUN field defines from mpi2_init.h.
79d3c7b9a0SKenneth D. Merry  *  01-19-09  02.00.11  Bumped MPI2_HEADER_VERSION_UNIT.
80d3c7b9a0SKenneth D. Merry  *  05-06-09  02.00.12  Bumped MPI2_HEADER_VERSION_UNIT.
81d3c7b9a0SKenneth D. Merry  *                      In all request and reply descriptors, replaced VF_ID
82d3c7b9a0SKenneth D. Merry  *                      field with MSIxIndex field.
83d3c7b9a0SKenneth D. Merry  *                      Removed DevHandle field from
84d3c7b9a0SKenneth D. Merry  *                      MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR and made those
85d3c7b9a0SKenneth D. Merry  *                      bytes reserved.
86d3c7b9a0SKenneth D. Merry  *                      Added RAID Accelerator functionality.
87d3c7b9a0SKenneth D. Merry  *  07-30-09  02.00.13  Bumped MPI2_HEADER_VERSION_UNIT.
88d3c7b9a0SKenneth D. Merry  *  10-28-09  02.00.14  Bumped MPI2_HEADER_VERSION_UNIT.
89d3c7b9a0SKenneth D. Merry  *                      Added MSI-x index mask and shift for Reply Post Host
90d3c7b9a0SKenneth D. Merry  *                      Index register.
91d3c7b9a0SKenneth D. Merry  *                      Added function code for Host Based Discovery Action.
92d043c564SKenneth D. Merry  *  02-10-10  02.00.15  Bumped MPI2_HEADER_VERSION_UNIT.
93d043c564SKenneth D. Merry  *                      Added define for MPI2_FUNCTION_PWR_MGMT_CONTROL.
94d043c564SKenneth D. Merry  *                      Added defines for product-specific range of message
95d043c564SKenneth D. Merry  *                      function codes, 0xF0 to 0xFF.
96d043c564SKenneth D. Merry  *  05-12-10  02.00.16  Bumped MPI2_HEADER_VERSION_UNIT.
97d043c564SKenneth D. Merry  *                      Added alternative defines for the SGE Direction bit.
98d043c564SKenneth D. Merry  *  08-11-10  02.00.17  Bumped MPI2_HEADER_VERSION_UNIT.
99d043c564SKenneth D. Merry  *  11-10-10  02.00.18  Bumped MPI2_HEADER_VERSION_UNIT.
100d043c564SKenneth D. Merry  *                      Added MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR define.
101d3c7b9a0SKenneth D. Merry  *  --------------------------------------------------------------------------
102d3c7b9a0SKenneth D. Merry  */
103d3c7b9a0SKenneth D. Merry 
104d3c7b9a0SKenneth D. Merry #ifndef MPI2_H
105d3c7b9a0SKenneth D. Merry #define MPI2_H
106d3c7b9a0SKenneth D. Merry 
107d3c7b9a0SKenneth D. Merry 
108d3c7b9a0SKenneth D. Merry /*****************************************************************************
109d3c7b9a0SKenneth D. Merry *
110d3c7b9a0SKenneth D. Merry *        MPI Version Definitions
111d3c7b9a0SKenneth D. Merry *
112d3c7b9a0SKenneth D. Merry *****************************************************************************/
113d3c7b9a0SKenneth D. Merry 
114d3c7b9a0SKenneth D. Merry #define MPI2_VERSION_MAJOR                  (0x02)
115d3c7b9a0SKenneth D. Merry #define MPI2_VERSION_MINOR                  (0x00)
116d3c7b9a0SKenneth D. Merry #define MPI2_VERSION_MAJOR_MASK             (0xFF00)
117d3c7b9a0SKenneth D. Merry #define MPI2_VERSION_MAJOR_SHIFT            (8)
118d3c7b9a0SKenneth D. Merry #define MPI2_VERSION_MINOR_MASK             (0x00FF)
119d3c7b9a0SKenneth D. Merry #define MPI2_VERSION_MINOR_SHIFT            (0)
120d3c7b9a0SKenneth D. Merry #define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) |   \
121d3c7b9a0SKenneth D. Merry                                       MPI2_VERSION_MINOR)
122d3c7b9a0SKenneth D. Merry 
123d3c7b9a0SKenneth D. Merry #define MPI2_VERSION_02_00                  (0x0200)
124d3c7b9a0SKenneth D. Merry 
125d3c7b9a0SKenneth D. Merry /* versioning for this MPI header set */
126d043c564SKenneth D. Merry #define MPI2_HEADER_VERSION_UNIT            (0x12)
127d3c7b9a0SKenneth D. Merry #define MPI2_HEADER_VERSION_DEV             (0x00)
128d3c7b9a0SKenneth D. Merry #define MPI2_HEADER_VERSION_UNIT_MASK       (0xFF00)
129d3c7b9a0SKenneth D. Merry #define MPI2_HEADER_VERSION_UNIT_SHIFT      (8)
130d3c7b9a0SKenneth D. Merry #define MPI2_HEADER_VERSION_DEV_MASK        (0x00FF)
131d3c7b9a0SKenneth D. Merry #define MPI2_HEADER_VERSION_DEV_SHIFT       (0)
132d3c7b9a0SKenneth D. Merry #define MPI2_HEADER_VERSION ((MPI2_HEADER_VERSION_UNIT << 8) | MPI2_HEADER_VERSION_DEV)
133d3c7b9a0SKenneth D. Merry 
134d3c7b9a0SKenneth D. Merry 
135d3c7b9a0SKenneth D. Merry /*****************************************************************************
136d3c7b9a0SKenneth D. Merry *
137d3c7b9a0SKenneth D. Merry *        IOC State Definitions
138d3c7b9a0SKenneth D. Merry *
139d3c7b9a0SKenneth D. Merry *****************************************************************************/
140d3c7b9a0SKenneth D. Merry 
141d3c7b9a0SKenneth D. Merry #define MPI2_IOC_STATE_RESET               (0x00000000)
142d3c7b9a0SKenneth D. Merry #define MPI2_IOC_STATE_READY               (0x10000000)
143d3c7b9a0SKenneth D. Merry #define MPI2_IOC_STATE_OPERATIONAL         (0x20000000)
144d3c7b9a0SKenneth D. Merry #define MPI2_IOC_STATE_FAULT               (0x40000000)
145d3c7b9a0SKenneth D. Merry 
146d3c7b9a0SKenneth D. Merry #define MPI2_IOC_STATE_MASK                (0xF0000000)
147d3c7b9a0SKenneth D. Merry #define MPI2_IOC_STATE_SHIFT               (28)
148d3c7b9a0SKenneth D. Merry 
149d3c7b9a0SKenneth D. Merry /* Fault state range for prodcut specific codes */
150d3c7b9a0SKenneth D. Merry #define MPI2_FAULT_PRODUCT_SPECIFIC_MIN                 (0x0000)
151d3c7b9a0SKenneth D. Merry #define MPI2_FAULT_PRODUCT_SPECIFIC_MAX                 (0xEFFF)
152d3c7b9a0SKenneth D. Merry 
153d3c7b9a0SKenneth D. Merry 
154d3c7b9a0SKenneth D. Merry /*****************************************************************************
155d3c7b9a0SKenneth D. Merry *
156d3c7b9a0SKenneth D. Merry *        System Interface Register Definitions
157d3c7b9a0SKenneth D. Merry *
158d3c7b9a0SKenneth D. Merry *****************************************************************************/
159d3c7b9a0SKenneth D. Merry 
160d3c7b9a0SKenneth D. Merry typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS
161d3c7b9a0SKenneth D. Merry {
162d3c7b9a0SKenneth D. Merry     U32         Doorbell;                   /* 0x00 */
163d3c7b9a0SKenneth D. Merry     U32         WriteSequence;              /* 0x04 */
164d3c7b9a0SKenneth D. Merry     U32         HostDiagnostic;             /* 0x08 */
165d3c7b9a0SKenneth D. Merry     U32         Reserved1;                  /* 0x0C */
166d3c7b9a0SKenneth D. Merry     U32         DiagRWData;                 /* 0x10 */
167d3c7b9a0SKenneth D. Merry     U32         DiagRWAddressLow;           /* 0x14 */
168d3c7b9a0SKenneth D. Merry     U32         DiagRWAddressHigh;          /* 0x18 */
169d3c7b9a0SKenneth D. Merry     U32         Reserved2[5];               /* 0x1C */
170d3c7b9a0SKenneth D. Merry     U32         HostInterruptStatus;        /* 0x30 */
171d3c7b9a0SKenneth D. Merry     U32         HostInterruptMask;          /* 0x34 */
172d3c7b9a0SKenneth D. Merry     U32         DCRData;                    /* 0x38 */
173d3c7b9a0SKenneth D. Merry     U32         DCRAddress;                 /* 0x3C */
174d3c7b9a0SKenneth D. Merry     U32         Reserved3[2];               /* 0x40 */
175d3c7b9a0SKenneth D. Merry     U32         ReplyFreeHostIndex;         /* 0x48 */
176d3c7b9a0SKenneth D. Merry     U32         Reserved4[8];               /* 0x4C */
177d3c7b9a0SKenneth D. Merry     U32         ReplyPostHostIndex;         /* 0x6C */
178d3c7b9a0SKenneth D. Merry     U32         Reserved5;                  /* 0x70 */
179d3c7b9a0SKenneth D. Merry     U32         HCBSize;                    /* 0x74 */
180d3c7b9a0SKenneth D. Merry     U32         HCBAddressLow;              /* 0x78 */
181d3c7b9a0SKenneth D. Merry     U32         HCBAddressHigh;             /* 0x7C */
182d3c7b9a0SKenneth D. Merry     U32         Reserved6[16];              /* 0x80 */
183d3c7b9a0SKenneth D. Merry     U32         RequestDescriptorPostLow;   /* 0xC0 */
184d3c7b9a0SKenneth D. Merry     U32         RequestDescriptorPostHigh;  /* 0xC4 */
185d3c7b9a0SKenneth D. Merry     U32         Reserved7[14];              /* 0xC8 */
186d3c7b9a0SKenneth D. Merry } MPI2_SYSTEM_INTERFACE_REGS, MPI2_POINTER PTR_MPI2_SYSTEM_INTERFACE_REGS,
187d3c7b9a0SKenneth D. Merry   Mpi2SystemInterfaceRegs_t, MPI2_POINTER pMpi2SystemInterfaceRegs_t;
188d3c7b9a0SKenneth D. Merry 
189d3c7b9a0SKenneth D. Merry /*
190d3c7b9a0SKenneth D. Merry  * Defines for working with the Doorbell register.
191d3c7b9a0SKenneth D. Merry  */
192d3c7b9a0SKenneth D. Merry #define MPI2_DOORBELL_OFFSET                    (0x00000000)
193d3c7b9a0SKenneth D. Merry 
194d3c7b9a0SKenneth D. Merry /* IOC --> System values */
195d3c7b9a0SKenneth D. Merry #define MPI2_DOORBELL_USED                      (0x08000000)
196d3c7b9a0SKenneth D. Merry #define MPI2_DOORBELL_WHO_INIT_MASK             (0x07000000)
197d3c7b9a0SKenneth D. Merry #define MPI2_DOORBELL_WHO_INIT_SHIFT            (24)
198d3c7b9a0SKenneth D. Merry #define MPI2_DOORBELL_FAULT_CODE_MASK           (0x0000FFFF)
199d3c7b9a0SKenneth D. Merry #define MPI2_DOORBELL_DATA_MASK                 (0x0000FFFF)
200d3c7b9a0SKenneth D. Merry 
201d3c7b9a0SKenneth D. Merry /* System --> IOC values */
202d3c7b9a0SKenneth D. Merry #define MPI2_DOORBELL_FUNCTION_MASK             (0xFF000000)
203d3c7b9a0SKenneth D. Merry #define MPI2_DOORBELL_FUNCTION_SHIFT            (24)
204d3c7b9a0SKenneth D. Merry #define MPI2_DOORBELL_ADD_DWORDS_MASK           (0x00FF0000)
205d3c7b9a0SKenneth D. Merry #define MPI2_DOORBELL_ADD_DWORDS_SHIFT          (16)
206d3c7b9a0SKenneth D. Merry 
207d3c7b9a0SKenneth D. Merry 
208d3c7b9a0SKenneth D. Merry /*
209d3c7b9a0SKenneth D. Merry  * Defines for the WriteSequence register
210d3c7b9a0SKenneth D. Merry  */
211d3c7b9a0SKenneth D. Merry #define MPI2_WRITE_SEQUENCE_OFFSET              (0x00000004)
212d3c7b9a0SKenneth D. Merry #define MPI2_WRSEQ_KEY_VALUE_MASK               (0x0000000F)
213d3c7b9a0SKenneth D. Merry #define MPI2_WRSEQ_FLUSH_KEY_VALUE              (0x0)
214d3c7b9a0SKenneth D. Merry #define MPI2_WRSEQ_1ST_KEY_VALUE                (0xF)
215d3c7b9a0SKenneth D. Merry #define MPI2_WRSEQ_2ND_KEY_VALUE                (0x4)
216d3c7b9a0SKenneth D. Merry #define MPI2_WRSEQ_3RD_KEY_VALUE                (0xB)
217d3c7b9a0SKenneth D. Merry #define MPI2_WRSEQ_4TH_KEY_VALUE                (0x2)
218d3c7b9a0SKenneth D. Merry #define MPI2_WRSEQ_5TH_KEY_VALUE                (0x7)
219d3c7b9a0SKenneth D. Merry #define MPI2_WRSEQ_6TH_KEY_VALUE                (0xD)
220d3c7b9a0SKenneth D. Merry 
221d3c7b9a0SKenneth D. Merry /*
222d3c7b9a0SKenneth D. Merry  * Defines for the HostDiagnostic register
223d3c7b9a0SKenneth D. Merry  */
224d3c7b9a0SKenneth D. Merry #define MPI2_HOST_DIAGNOSTIC_OFFSET             (0x00000008)
225d3c7b9a0SKenneth D. Merry 
226d3c7b9a0SKenneth D. Merry #define MPI2_DIAG_BOOT_DEVICE_SELECT_MASK       (0x00001800)
227d3c7b9a0SKenneth D. Merry #define MPI2_DIAG_BOOT_DEVICE_SELECT_DEFAULT    (0x00000000)
228d3c7b9a0SKenneth D. Merry #define MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW       (0x00000800)
229d3c7b9a0SKenneth D. Merry 
230d3c7b9a0SKenneth D. Merry #define MPI2_DIAG_CLEAR_FLASH_BAD_SIG           (0x00000400)
231d3c7b9a0SKenneth D. Merry #define MPI2_DIAG_FORCE_HCB_ON_RESET            (0x00000200)
232d3c7b9a0SKenneth D. Merry #define MPI2_DIAG_HCB_MODE                      (0x00000100)
233d3c7b9a0SKenneth D. Merry #define MPI2_DIAG_DIAG_WRITE_ENABLE             (0x00000080)
234d3c7b9a0SKenneth D. Merry #define MPI2_DIAG_FLASH_BAD_SIG                 (0x00000040)
235d3c7b9a0SKenneth D. Merry #define MPI2_DIAG_RESET_HISTORY                 (0x00000020)
236d3c7b9a0SKenneth D. Merry #define MPI2_DIAG_DIAG_RW_ENABLE                (0x00000010)
237d3c7b9a0SKenneth D. Merry #define MPI2_DIAG_RESET_ADAPTER                 (0x00000004)
238d3c7b9a0SKenneth D. Merry #define MPI2_DIAG_HOLD_IOC_RESET                (0x00000002)
239d3c7b9a0SKenneth D. Merry 
240d3c7b9a0SKenneth D. Merry /*
241d3c7b9a0SKenneth D. Merry  * Offsets for DiagRWData and address
242d3c7b9a0SKenneth D. Merry  */
243d3c7b9a0SKenneth D. Merry #define MPI2_DIAG_RW_DATA_OFFSET                (0x00000010)
244d3c7b9a0SKenneth D. Merry #define MPI2_DIAG_RW_ADDRESS_LOW_OFFSET         (0x00000014)
245d3c7b9a0SKenneth D. Merry #define MPI2_DIAG_RW_ADDRESS_HIGH_OFFSET        (0x00000018)
246d3c7b9a0SKenneth D. Merry 
247d3c7b9a0SKenneth D. Merry /*
248d3c7b9a0SKenneth D. Merry  * Defines for the HostInterruptStatus register
249d3c7b9a0SKenneth D. Merry  */
250d3c7b9a0SKenneth D. Merry #define MPI2_HOST_INTERRUPT_STATUS_OFFSET       (0x00000030)
251d3c7b9a0SKenneth D. Merry #define MPI2_HIS_SYS2IOC_DB_STATUS              (0x80000000)
252d3c7b9a0SKenneth D. Merry #define MPI2_HIS_IOP_DOORBELL_STATUS            MPI2_HIS_SYS2IOC_DB_STATUS
253d3c7b9a0SKenneth D. Merry #define MPI2_HIS_RESET_IRQ_STATUS               (0x40000000)
254d3c7b9a0SKenneth D. Merry #define MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT     (0x00000008)
255d3c7b9a0SKenneth D. Merry #define MPI2_HIS_IOC2SYS_DB_STATUS              (0x00000001)
256d3c7b9a0SKenneth D. Merry #define MPI2_HIS_DOORBELL_INTERRUPT             MPI2_HIS_IOC2SYS_DB_STATUS
257d3c7b9a0SKenneth D. Merry 
258d3c7b9a0SKenneth D. Merry /*
259d3c7b9a0SKenneth D. Merry  * Defines for the HostInterruptMask register
260d3c7b9a0SKenneth D. Merry  */
261d3c7b9a0SKenneth D. Merry #define MPI2_HOST_INTERRUPT_MASK_OFFSET         (0x00000034)
262d3c7b9a0SKenneth D. Merry #define MPI2_HIM_RESET_IRQ_MASK                 (0x40000000)
263d3c7b9a0SKenneth D. Merry #define MPI2_HIM_REPLY_INT_MASK                 (0x00000008)
264d3c7b9a0SKenneth D. Merry #define MPI2_HIM_RIM                            MPI2_HIM_REPLY_INT_MASK
265d3c7b9a0SKenneth D. Merry #define MPI2_HIM_IOC2SYS_DB_MASK                (0x00000001)
266d3c7b9a0SKenneth D. Merry #define MPI2_HIM_DIM                            MPI2_HIM_IOC2SYS_DB_MASK
267d3c7b9a0SKenneth D. Merry 
268d3c7b9a0SKenneth D. Merry /*
269d3c7b9a0SKenneth D. Merry  * Offsets for DCRData and address
270d3c7b9a0SKenneth D. Merry  */
271d3c7b9a0SKenneth D. Merry #define MPI2_DCR_DATA_OFFSET                    (0x00000038)
272d3c7b9a0SKenneth D. Merry #define MPI2_DCR_ADDRESS_OFFSET                 (0x0000003C)
273d3c7b9a0SKenneth D. Merry 
274d3c7b9a0SKenneth D. Merry /*
275d3c7b9a0SKenneth D. Merry  * Offset for the Reply Free Queue
276d3c7b9a0SKenneth D. Merry  */
277d3c7b9a0SKenneth D. Merry #define MPI2_REPLY_FREE_HOST_INDEX_OFFSET       (0x00000048)
278d3c7b9a0SKenneth D. Merry 
279d3c7b9a0SKenneth D. Merry /*
280d3c7b9a0SKenneth D. Merry  * Defines for the Reply Descriptor Post Queue
281d3c7b9a0SKenneth D. Merry  */
282d3c7b9a0SKenneth D. Merry #define MPI2_REPLY_POST_HOST_INDEX_OFFSET       (0x0000006C)
283d3c7b9a0SKenneth D. Merry #define MPI2_REPLY_POST_HOST_INDEX_MASK         (0x00FFFFFF)
284d3c7b9a0SKenneth D. Merry #define MPI2_RPHI_MSIX_INDEX_MASK               (0xFF000000)
285d3c7b9a0SKenneth D. Merry #define MPI2_RPHI_MSIX_INDEX_SHIFT              (24)
286d3c7b9a0SKenneth D. Merry 
287d3c7b9a0SKenneth D. Merry /*
288d3c7b9a0SKenneth D. Merry  * Defines for the HCBSize and address
289d3c7b9a0SKenneth D. Merry  */
290d3c7b9a0SKenneth D. Merry #define MPI2_HCB_SIZE_OFFSET                    (0x00000074)
291d3c7b9a0SKenneth D. Merry #define MPI2_HCB_SIZE_SIZE_MASK                 (0xFFFFF000)
292d3c7b9a0SKenneth D. Merry #define MPI2_HCB_SIZE_HCB_ENABLE                (0x00000001)
293d3c7b9a0SKenneth D. Merry 
294d3c7b9a0SKenneth D. Merry #define MPI2_HCB_ADDRESS_LOW_OFFSET             (0x00000078)
295d3c7b9a0SKenneth D. Merry #define MPI2_HCB_ADDRESS_HIGH_OFFSET            (0x0000007C)
296d3c7b9a0SKenneth D. Merry 
297d3c7b9a0SKenneth D. Merry /*
298d3c7b9a0SKenneth D. Merry  * Offsets for the Request Queue
299d3c7b9a0SKenneth D. Merry  */
300d3c7b9a0SKenneth D. Merry #define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET     (0x000000C0)
301d3c7b9a0SKenneth D. Merry #define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET    (0x000000C4)
302d3c7b9a0SKenneth D. Merry 
303d3c7b9a0SKenneth D. Merry 
304d3c7b9a0SKenneth D. Merry /*****************************************************************************
305d3c7b9a0SKenneth D. Merry *
306d3c7b9a0SKenneth D. Merry *        Message Descriptors
307d3c7b9a0SKenneth D. Merry *
308d3c7b9a0SKenneth D. Merry *****************************************************************************/
309d3c7b9a0SKenneth D. Merry 
310d3c7b9a0SKenneth D. Merry /* Request Descriptors */
311d3c7b9a0SKenneth D. Merry 
312d3c7b9a0SKenneth D. Merry /* Default Request Descriptor */
313d3c7b9a0SKenneth D. Merry typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR
314d3c7b9a0SKenneth D. Merry {
315d3c7b9a0SKenneth D. Merry     U8              RequestFlags;               /* 0x00 */
316d3c7b9a0SKenneth D. Merry     U8              MSIxIndex;                  /* 0x01 */
317d3c7b9a0SKenneth D. Merry     U16             SMID;                       /* 0x02 */
318d3c7b9a0SKenneth D. Merry     U16             LMID;                       /* 0x04 */
319d3c7b9a0SKenneth D. Merry     U16             DescriptorTypeDependent;    /* 0x06 */
320d3c7b9a0SKenneth D. Merry } MPI2_DEFAULT_REQUEST_DESCRIPTOR,
321d3c7b9a0SKenneth D. Merry   MPI2_POINTER PTR_MPI2_DEFAULT_REQUEST_DESCRIPTOR,
322d3c7b9a0SKenneth D. Merry   Mpi2DefaultRequestDescriptor_t, MPI2_POINTER pMpi2DefaultRequestDescriptor_t;
323d3c7b9a0SKenneth D. Merry 
324d3c7b9a0SKenneth D. Merry /* defines for the RequestFlags field */
325d3c7b9a0SKenneth D. Merry #define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK               (0x0E)
326d3c7b9a0SKenneth D. Merry #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO                 (0x00)
327d3c7b9a0SKenneth D. Merry #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET             (0x02)
328d3c7b9a0SKenneth D. Merry #define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY           (0x06)
329d3c7b9a0SKenneth D. Merry #define MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE            (0x08)
330d3c7b9a0SKenneth D. Merry #define MPI2_REQ_DESCRIPT_FLAGS_RAID_ACCELERATOR        (0x0A)
331d3c7b9a0SKenneth D. Merry 
332d3c7b9a0SKenneth D. Merry #define MPI2_REQ_DESCRIPT_FLAGS_IOC_FIFO_MARKER (0x01)
333d3c7b9a0SKenneth D. Merry 
334d3c7b9a0SKenneth D. Merry 
335d3c7b9a0SKenneth D. Merry /* High Priority Request Descriptor */
336d3c7b9a0SKenneth D. Merry typedef struct _MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR
337d3c7b9a0SKenneth D. Merry {
338d3c7b9a0SKenneth D. Merry     U8              RequestFlags;               /* 0x00 */
339d3c7b9a0SKenneth D. Merry     U8              MSIxIndex;                  /* 0x01 */
340d3c7b9a0SKenneth D. Merry     U16             SMID;                       /* 0x02 */
341d3c7b9a0SKenneth D. Merry     U16             LMID;                       /* 0x04 */
342d3c7b9a0SKenneth D. Merry     U16             Reserved1;                  /* 0x06 */
343d3c7b9a0SKenneth D. Merry } MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR,
344d3c7b9a0SKenneth D. Merry   MPI2_POINTER PTR_MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR,
345d3c7b9a0SKenneth D. Merry   Mpi2HighPriorityRequestDescriptor_t,
346d3c7b9a0SKenneth D. Merry   MPI2_POINTER pMpi2HighPriorityRequestDescriptor_t;
347d3c7b9a0SKenneth D. Merry 
348d3c7b9a0SKenneth D. Merry 
349d3c7b9a0SKenneth D. Merry /* SCSI IO Request Descriptor */
350d3c7b9a0SKenneth D. Merry typedef struct _MPI2_SCSI_IO_REQUEST_DESCRIPTOR
351d3c7b9a0SKenneth D. Merry {
352d3c7b9a0SKenneth D. Merry     U8              RequestFlags;               /* 0x00 */
353d3c7b9a0SKenneth D. Merry     U8              MSIxIndex;                  /* 0x01 */
354d3c7b9a0SKenneth D. Merry     U16             SMID;                       /* 0x02 */
355d3c7b9a0SKenneth D. Merry     U16             LMID;                       /* 0x04 */
356d3c7b9a0SKenneth D. Merry     U16             DevHandle;                  /* 0x06 */
357d3c7b9a0SKenneth D. Merry } MPI2_SCSI_IO_REQUEST_DESCRIPTOR,
358d3c7b9a0SKenneth D. Merry   MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST_DESCRIPTOR,
359d3c7b9a0SKenneth D. Merry   Mpi2SCSIIORequestDescriptor_t, MPI2_POINTER pMpi2SCSIIORequestDescriptor_t;
360d3c7b9a0SKenneth D. Merry 
361d3c7b9a0SKenneth D. Merry 
362d3c7b9a0SKenneth D. Merry /* SCSI Target Request Descriptor */
363d3c7b9a0SKenneth D. Merry typedef struct _MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR
364d3c7b9a0SKenneth D. Merry {
365d3c7b9a0SKenneth D. Merry     U8              RequestFlags;               /* 0x00 */
366d3c7b9a0SKenneth D. Merry     U8              MSIxIndex;                  /* 0x01 */
367d3c7b9a0SKenneth D. Merry     U16             SMID;                       /* 0x02 */
368d3c7b9a0SKenneth D. Merry     U16             LMID;                       /* 0x04 */
369d3c7b9a0SKenneth D. Merry     U16             IoIndex;                    /* 0x06 */
370d3c7b9a0SKenneth D. Merry } MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR,
371d3c7b9a0SKenneth D. Merry   MPI2_POINTER PTR_MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR,
372d3c7b9a0SKenneth D. Merry   Mpi2SCSITargetRequestDescriptor_t,
373d3c7b9a0SKenneth D. Merry   MPI2_POINTER pMpi2SCSITargetRequestDescriptor_t;
374d3c7b9a0SKenneth D. Merry 
375d3c7b9a0SKenneth D. Merry 
376d3c7b9a0SKenneth D. Merry /* RAID Accelerator Request Descriptor */
377d3c7b9a0SKenneth D. Merry typedef struct _MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR
378d3c7b9a0SKenneth D. Merry {
379d3c7b9a0SKenneth D. Merry     U8              RequestFlags;               /* 0x00 */
380d3c7b9a0SKenneth D. Merry     U8              MSIxIndex;                  /* 0x01 */
381d3c7b9a0SKenneth D. Merry     U16             SMID;                       /* 0x02 */
382d3c7b9a0SKenneth D. Merry     U16             LMID;                       /* 0x04 */
383d3c7b9a0SKenneth D. Merry     U16             Reserved;                   /* 0x06 */
384d3c7b9a0SKenneth D. Merry } MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR,
385d3c7b9a0SKenneth D. Merry   MPI2_POINTER PTR_MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR,
386d3c7b9a0SKenneth D. Merry   Mpi2RAIDAcceleratorRequestDescriptor_t,
387d3c7b9a0SKenneth D. Merry   MPI2_POINTER pMpi2RAIDAcceleratorRequestDescriptor_t;
388d3c7b9a0SKenneth D. Merry 
389d3c7b9a0SKenneth D. Merry 
390d3c7b9a0SKenneth D. Merry /* union of Request Descriptors */
391d3c7b9a0SKenneth D. Merry typedef union _MPI2_REQUEST_DESCRIPTOR_UNION
392d3c7b9a0SKenneth D. Merry {
393d3c7b9a0SKenneth D. Merry     MPI2_DEFAULT_REQUEST_DESCRIPTOR             Default;
394d3c7b9a0SKenneth D. Merry     MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR       HighPriority;
395d3c7b9a0SKenneth D. Merry     MPI2_SCSI_IO_REQUEST_DESCRIPTOR             SCSIIO;
396d3c7b9a0SKenneth D. Merry     MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR         SCSITarget;
397d3c7b9a0SKenneth D. Merry     MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR          RAIDAccelerator;
398d3c7b9a0SKenneth D. Merry     U64                                         Words;
399d3c7b9a0SKenneth D. Merry } MPI2_REQUEST_DESCRIPTOR_UNION, MPI2_POINTER PTR_MPI2_REQUEST_DESCRIPTOR_UNION,
400d3c7b9a0SKenneth D. Merry   Mpi2RequestDescriptorUnion_t, MPI2_POINTER pMpi2RequestDescriptorUnion_t;
401d3c7b9a0SKenneth D. Merry 
402d3c7b9a0SKenneth D. Merry 
403d3c7b9a0SKenneth D. Merry /* Reply Descriptors */
404d3c7b9a0SKenneth D. Merry 
405d3c7b9a0SKenneth D. Merry /* Default Reply Descriptor */
406d3c7b9a0SKenneth D. Merry typedef struct _MPI2_DEFAULT_REPLY_DESCRIPTOR
407d3c7b9a0SKenneth D. Merry {
408d3c7b9a0SKenneth D. Merry     U8              ReplyFlags;                 /* 0x00 */
409d3c7b9a0SKenneth D. Merry     U8              MSIxIndex;                  /* 0x01 */
410d3c7b9a0SKenneth D. Merry     U16             DescriptorTypeDependent1;   /* 0x02 */
411d3c7b9a0SKenneth D. Merry     U32             DescriptorTypeDependent2;   /* 0x04 */
412d3c7b9a0SKenneth D. Merry } MPI2_DEFAULT_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY_DESCRIPTOR,
413d3c7b9a0SKenneth D. Merry   Mpi2DefaultReplyDescriptor_t, MPI2_POINTER pMpi2DefaultReplyDescriptor_t;
414d3c7b9a0SKenneth D. Merry 
415d3c7b9a0SKenneth D. Merry /* defines for the ReplyFlags field */
416d3c7b9a0SKenneth D. Merry #define MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK                   (0x0F)
417d3c7b9a0SKenneth D. Merry #define MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS             (0x00)
418d3c7b9a0SKenneth D. Merry #define MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY               (0x01)
419d3c7b9a0SKenneth D. Merry #define MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS        (0x02)
420d3c7b9a0SKenneth D. Merry #define MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER       (0x03)
421d3c7b9a0SKenneth D. Merry #define MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS    (0x05)
422d3c7b9a0SKenneth D. Merry #define MPI2_RPY_DESCRIPT_FLAGS_UNUSED                      (0x0F)
423d3c7b9a0SKenneth D. Merry 
424d3c7b9a0SKenneth D. Merry /* values for marking a reply descriptor as unused */
425d3c7b9a0SKenneth D. Merry #define MPI2_RPY_DESCRIPT_UNUSED_WORD0_MARK             (0xFFFFFFFF)
426d3c7b9a0SKenneth D. Merry #define MPI2_RPY_DESCRIPT_UNUSED_WORD1_MARK             (0xFFFFFFFF)
427d3c7b9a0SKenneth D. Merry 
428d3c7b9a0SKenneth D. Merry /* Address Reply Descriptor */
429d3c7b9a0SKenneth D. Merry typedef struct _MPI2_ADDRESS_REPLY_DESCRIPTOR
430d3c7b9a0SKenneth D. Merry {
431d3c7b9a0SKenneth D. Merry     U8              ReplyFlags;                 /* 0x00 */
432d3c7b9a0SKenneth D. Merry     U8              MSIxIndex;                  /* 0x01 */
433d3c7b9a0SKenneth D. Merry     U16             SMID;                       /* 0x02 */
434d3c7b9a0SKenneth D. Merry     U32             ReplyFrameAddress;          /* 0x04 */
435d3c7b9a0SKenneth D. Merry } MPI2_ADDRESS_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_ADDRESS_REPLY_DESCRIPTOR,
436d3c7b9a0SKenneth D. Merry   Mpi2AddressReplyDescriptor_t, MPI2_POINTER pMpi2AddressReplyDescriptor_t;
437d3c7b9a0SKenneth D. Merry 
438d3c7b9a0SKenneth D. Merry #define MPI2_ADDRESS_REPLY_SMID_INVALID                 (0x00)
439d3c7b9a0SKenneth D. Merry 
440d3c7b9a0SKenneth D. Merry 
441d3c7b9a0SKenneth D. Merry /* SCSI IO Success Reply Descriptor */
442d3c7b9a0SKenneth D. Merry typedef struct _MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR
443d3c7b9a0SKenneth D. Merry {
444d3c7b9a0SKenneth D. Merry     U8              ReplyFlags;                 /* 0x00 */
445d3c7b9a0SKenneth D. Merry     U8              MSIxIndex;                  /* 0x01 */
446d3c7b9a0SKenneth D. Merry     U16             SMID;                       /* 0x02 */
447d3c7b9a0SKenneth D. Merry     U16             TaskTag;                    /* 0x04 */
448d3c7b9a0SKenneth D. Merry     U16             Reserved1;                  /* 0x06 */
449d3c7b9a0SKenneth D. Merry } MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
450d3c7b9a0SKenneth D. Merry   MPI2_POINTER PTR_MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
451d3c7b9a0SKenneth D. Merry   Mpi2SCSIIOSuccessReplyDescriptor_t,
452d3c7b9a0SKenneth D. Merry   MPI2_POINTER pMpi2SCSIIOSuccessReplyDescriptor_t;
453d3c7b9a0SKenneth D. Merry 
454d3c7b9a0SKenneth D. Merry 
455d3c7b9a0SKenneth D. Merry /* TargetAssist Success Reply Descriptor */
456d3c7b9a0SKenneth D. Merry typedef struct _MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR
457d3c7b9a0SKenneth D. Merry {
458d3c7b9a0SKenneth D. Merry     U8              ReplyFlags;                 /* 0x00 */
459d3c7b9a0SKenneth D. Merry     U8              MSIxIndex;                  /* 0x01 */
460d3c7b9a0SKenneth D. Merry     U16             SMID;                       /* 0x02 */
461d3c7b9a0SKenneth D. Merry     U8              SequenceNumber;             /* 0x04 */
462d3c7b9a0SKenneth D. Merry     U8              Reserved1;                  /* 0x05 */
463d3c7b9a0SKenneth D. Merry     U16             IoIndex;                    /* 0x06 */
464d3c7b9a0SKenneth D. Merry } MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR,
465d3c7b9a0SKenneth D. Merry   MPI2_POINTER PTR_MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR,
466d3c7b9a0SKenneth D. Merry   Mpi2TargetAssistSuccessReplyDescriptor_t,
467d3c7b9a0SKenneth D. Merry   MPI2_POINTER pMpi2TargetAssistSuccessReplyDescriptor_t;
468d3c7b9a0SKenneth D. Merry 
469d3c7b9a0SKenneth D. Merry 
470d3c7b9a0SKenneth D. Merry /* Target Command Buffer Reply Descriptor */
471d3c7b9a0SKenneth D. Merry typedef struct _MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR
472d3c7b9a0SKenneth D. Merry {
473d3c7b9a0SKenneth D. Merry     U8              ReplyFlags;                 /* 0x00 */
474d3c7b9a0SKenneth D. Merry     U8              MSIxIndex;                  /* 0x01 */
475d3c7b9a0SKenneth D. Merry     U8              VP_ID;                      /* 0x02 */
476d3c7b9a0SKenneth D. Merry     U8              Flags;                      /* 0x03 */
477d3c7b9a0SKenneth D. Merry     U16             InitiatorDevHandle;         /* 0x04 */
478d3c7b9a0SKenneth D. Merry     U16             IoIndex;                    /* 0x06 */
479d3c7b9a0SKenneth D. Merry } MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR,
480d3c7b9a0SKenneth D. Merry   MPI2_POINTER PTR_MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR,
481d3c7b9a0SKenneth D. Merry   Mpi2TargetCommandBufferReplyDescriptor_t,
482d3c7b9a0SKenneth D. Merry   MPI2_POINTER pMpi2TargetCommandBufferReplyDescriptor_t;
483d3c7b9a0SKenneth D. Merry 
484d3c7b9a0SKenneth D. Merry /* defines for Flags field */
485d3c7b9a0SKenneth D. Merry #define MPI2_RPY_DESCRIPT_TCB_FLAGS_PHYNUM_MASK     (0x3F)
486d3c7b9a0SKenneth D. Merry 
487d3c7b9a0SKenneth D. Merry 
488d3c7b9a0SKenneth D. Merry /* RAID Accelerator Success Reply Descriptor */
489d3c7b9a0SKenneth D. Merry typedef struct _MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR
490d3c7b9a0SKenneth D. Merry {
491d3c7b9a0SKenneth D. Merry     U8              ReplyFlags;                 /* 0x00 */
492d3c7b9a0SKenneth D. Merry     U8              MSIxIndex;                  /* 0x01 */
493d3c7b9a0SKenneth D. Merry     U16             SMID;                       /* 0x02 */
494d3c7b9a0SKenneth D. Merry     U32             Reserved;                   /* 0x04 */
495d3c7b9a0SKenneth D. Merry } MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR,
496d3c7b9a0SKenneth D. Merry   MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR,
497d3c7b9a0SKenneth D. Merry   Mpi2RAIDAcceleratorSuccessReplyDescriptor_t,
498d3c7b9a0SKenneth D. Merry   MPI2_POINTER pMpi2RAIDAcceleratorSuccessReplyDescriptor_t;
499d3c7b9a0SKenneth D. Merry 
500d3c7b9a0SKenneth D. Merry 
501d3c7b9a0SKenneth D. Merry /* union of Reply Descriptors */
502d3c7b9a0SKenneth D. Merry typedef union _MPI2_REPLY_DESCRIPTORS_UNION
503d3c7b9a0SKenneth D. Merry {
504d3c7b9a0SKenneth D. Merry     MPI2_DEFAULT_REPLY_DESCRIPTOR                   Default;
505d3c7b9a0SKenneth D. Merry     MPI2_ADDRESS_REPLY_DESCRIPTOR                   AddressReply;
506d3c7b9a0SKenneth D. Merry     MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR           SCSIIOSuccess;
507d3c7b9a0SKenneth D. Merry     MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR      TargetAssistSuccess;
508d3c7b9a0SKenneth D. Merry     MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR     TargetCommandBuffer;
509d3c7b9a0SKenneth D. Merry     MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR  RAIDAcceleratorSuccess;
510d3c7b9a0SKenneth D. Merry     U64                                             Words;
511d3c7b9a0SKenneth D. Merry } MPI2_REPLY_DESCRIPTORS_UNION, MPI2_POINTER PTR_MPI2_REPLY_DESCRIPTORS_UNION,
512d3c7b9a0SKenneth D. Merry   Mpi2ReplyDescriptorsUnion_t, MPI2_POINTER pMpi2ReplyDescriptorsUnion_t;
513d3c7b9a0SKenneth D. Merry 
514d3c7b9a0SKenneth D. Merry 
515d3c7b9a0SKenneth D. Merry 
516d3c7b9a0SKenneth D. Merry /*****************************************************************************
517d3c7b9a0SKenneth D. Merry *
518d3c7b9a0SKenneth D. Merry *        Message Functions
519d3c7b9a0SKenneth D. Merry *
520d3c7b9a0SKenneth D. Merry *****************************************************************************/
521d3c7b9a0SKenneth D. Merry 
522d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_SCSI_IO_REQUEST               (0x00) /* SCSI IO */
523d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_SCSI_TASK_MGMT                (0x01) /* SCSI Task Management */
524d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_IOC_INIT                      (0x02) /* IOC Init */
525d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_IOC_FACTS                     (0x03) /* IOC Facts */
526d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_CONFIG                        (0x04) /* Configuration */
527d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_PORT_FACTS                    (0x05) /* Port Facts */
528d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_PORT_ENABLE                   (0x06) /* Port Enable */
529d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_EVENT_NOTIFICATION            (0x07) /* Event Notification */
530d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_EVENT_ACK                     (0x08) /* Event Acknowledge */
531d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_FW_DOWNLOAD                   (0x09) /* FW Download */
532d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_TARGET_ASSIST                 (0x0B) /* Target Assist */
533d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_TARGET_STATUS_SEND            (0x0C) /* Target Status Send */
534d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_TARGET_MODE_ABORT             (0x0D) /* Target Mode Abort */
535d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_FW_UPLOAD                     (0x12) /* FW Upload */
536d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_RAID_ACTION                   (0x15) /* RAID Action */
537d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH      (0x16) /* SCSI IO RAID Passthrough */
538d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_TOOLBOX                       (0x17) /* Toolbox */
539d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR      (0x18) /* SCSI Enclosure Processor */
540d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_SMP_PASSTHROUGH               (0x1A) /* SMP Passthrough */
541d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL           (0x1B) /* SAS IO Unit Control */
542d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_SATA_PASSTHROUGH              (0x1C) /* SATA Passthrough */
543d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_DIAG_BUFFER_POST              (0x1D) /* Diagnostic Buffer Post */
544d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_DIAG_RELEASE                  (0x1E) /* Diagnostic Release */
545d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST      (0x24) /* Target Command Buffer Post Base */
546d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST      (0x25) /* Target Command Buffer Post List */
547d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_RAID_ACCELERATOR              (0x2C) /* RAID Accelerator */
548d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_HOST_BASED_DISCOVERY_ACTION   (0x2F) /* Host Based Discovery Action */
549d043c564SKenneth D. Merry #define MPI2_FUNCTION_PWR_MGMT_CONTROL              (0x30) /* Power Management Control */
550d043c564SKenneth D. Merry #define MPI2_FUNCTION_MIN_PRODUCT_SPECIFIC          (0xF0) /* beginning of product-specific range */
551d043c564SKenneth D. Merry #define MPI2_FUNCTION_MAX_PRODUCT_SPECIFIC          (0xFF) /* end of product-specific range */
552d3c7b9a0SKenneth D. Merry 
553d3c7b9a0SKenneth D. Merry 
554d3c7b9a0SKenneth D. Merry 
555d3c7b9a0SKenneth D. Merry /* Doorbell functions */
556d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET        (0x40)
557d3c7b9a0SKenneth D. Merry #define MPI2_FUNCTION_HANDSHAKE                     (0x42)
558d3c7b9a0SKenneth D. Merry 
559d3c7b9a0SKenneth D. Merry 
560d3c7b9a0SKenneth D. Merry /*****************************************************************************
561d3c7b9a0SKenneth D. Merry *
562d3c7b9a0SKenneth D. Merry *        IOC Status Values
563d3c7b9a0SKenneth D. Merry *
564d3c7b9a0SKenneth D. Merry *****************************************************************************/
565d3c7b9a0SKenneth D. Merry 
566d3c7b9a0SKenneth D. Merry /* mask for IOCStatus status value */
567d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_MASK                     (0x7FFF)
568d3c7b9a0SKenneth D. Merry 
569d3c7b9a0SKenneth D. Merry /****************************************************************************
570d3c7b9a0SKenneth D. Merry *  Common IOCStatus values for all replies
571d3c7b9a0SKenneth D. Merry ****************************************************************************/
572d3c7b9a0SKenneth D. Merry 
573d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_SUCCESS                      (0x0000)
574d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_INVALID_FUNCTION             (0x0001)
575d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_BUSY                         (0x0002)
576d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_INVALID_SGL                  (0x0003)
577d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_INTERNAL_ERROR               (0x0004)
578d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_INVALID_VPID                 (0x0005)
579d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES       (0x0006)
580d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_INVALID_FIELD                (0x0007)
581d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_INVALID_STATE                (0x0008)
582d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED       (0x0009)
583d3c7b9a0SKenneth D. Merry 
584d3c7b9a0SKenneth D. Merry /****************************************************************************
585d3c7b9a0SKenneth D. Merry *  Config IOCStatus values
586d3c7b9a0SKenneth D. Merry ****************************************************************************/
587d3c7b9a0SKenneth D. Merry 
588d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_CONFIG_INVALID_ACTION        (0x0020)
589d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_CONFIG_INVALID_TYPE          (0x0021)
590d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_CONFIG_INVALID_PAGE          (0x0022)
591d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_CONFIG_INVALID_DATA          (0x0023)
592d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS           (0x0024)
593d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_CONFIG_CANT_COMMIT           (0x0025)
594d3c7b9a0SKenneth D. Merry 
595d3c7b9a0SKenneth D. Merry /****************************************************************************
596d3c7b9a0SKenneth D. Merry *  SCSI IO Reply
597d3c7b9a0SKenneth D. Merry ****************************************************************************/
598d3c7b9a0SKenneth D. Merry 
599d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR         (0x0040)
600d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE       (0x0042)
601d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE        (0x0043)
602d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_SCSI_DATA_OVERRUN            (0x0044)
603d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN           (0x0045)
604d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR           (0x0046)
605d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR          (0x0047)
606d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_SCSI_TASK_TERMINATED         (0x0048)
607d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH       (0x0049)
608d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED        (0x004A)
609d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_SCSI_IOC_TERMINATED          (0x004B)
610d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_SCSI_EXT_TERMINATED          (0x004C)
611d3c7b9a0SKenneth D. Merry 
612d3c7b9a0SKenneth D. Merry /****************************************************************************
613d3c7b9a0SKenneth D. Merry *  For use by SCSI Initiator and SCSI Target end-to-end data protection
614d3c7b9a0SKenneth D. Merry ****************************************************************************/
615d3c7b9a0SKenneth D. Merry 
616d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_EEDP_GUARD_ERROR             (0x004D)
617d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR           (0x004E)
618d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR           (0x004F)
619d3c7b9a0SKenneth D. Merry 
620d3c7b9a0SKenneth D. Merry /****************************************************************************
621d3c7b9a0SKenneth D. Merry *  SCSI Target values
622d3c7b9a0SKenneth D. Merry ****************************************************************************/
623d3c7b9a0SKenneth D. Merry 
624d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX      (0x0062)
625d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_TARGET_ABORTED               (0x0063)
626d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE     (0x0064)
627d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_TARGET_NO_CONNECTION         (0x0065)
628d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH   (0x006A)
629d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR     (0x006D)
630d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA   (0x006E)
631d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT          (0x006F)
632d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT       (0x0070)
633d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_TARGET_NAK_RECEIVED          (0x0071)
634d3c7b9a0SKenneth D. Merry 
635d3c7b9a0SKenneth D. Merry /****************************************************************************
636d3c7b9a0SKenneth D. Merry *  Serial Attached SCSI values
637d3c7b9a0SKenneth D. Merry ****************************************************************************/
638d3c7b9a0SKenneth D. Merry 
639d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED       (0x0090)
640d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN         (0x0091)
641d3c7b9a0SKenneth D. Merry 
642d3c7b9a0SKenneth D. Merry /****************************************************************************
643d3c7b9a0SKenneth D. Merry *  Diagnostic Buffer Post / Diagnostic Release values
644d3c7b9a0SKenneth D. Merry ****************************************************************************/
645d3c7b9a0SKenneth D. Merry 
646d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED          (0x00A0)
647d3c7b9a0SKenneth D. Merry 
648d3c7b9a0SKenneth D. Merry /****************************************************************************
649d3c7b9a0SKenneth D. Merry *  RAID Accelerator values
650d3c7b9a0SKenneth D. Merry ****************************************************************************/
651d3c7b9a0SKenneth D. Merry 
652d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_RAID_ACCEL_ERROR             (0x00B0)
653d3c7b9a0SKenneth D. Merry 
654d3c7b9a0SKenneth D. Merry /****************************************************************************
655d3c7b9a0SKenneth D. Merry *  IOCStatus flag to indicate that log info is available
656d3c7b9a0SKenneth D. Merry ****************************************************************************/
657d3c7b9a0SKenneth D. Merry 
658d3c7b9a0SKenneth D. Merry #define MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE      (0x8000)
659d3c7b9a0SKenneth D. Merry 
660d3c7b9a0SKenneth D. Merry /****************************************************************************
661d3c7b9a0SKenneth D. Merry *  IOCLogInfo Types
662d3c7b9a0SKenneth D. Merry ****************************************************************************/
663d3c7b9a0SKenneth D. Merry 
664d3c7b9a0SKenneth D. Merry #define MPI2_IOCLOGINFO_TYPE_MASK               (0xF0000000)
665d3c7b9a0SKenneth D. Merry #define MPI2_IOCLOGINFO_TYPE_SHIFT              (28)
666d3c7b9a0SKenneth D. Merry #define MPI2_IOCLOGINFO_TYPE_NONE               (0x0)
667d3c7b9a0SKenneth D. Merry #define MPI2_IOCLOGINFO_TYPE_SCSI               (0x1)
668d3c7b9a0SKenneth D. Merry #define MPI2_IOCLOGINFO_TYPE_FC                 (0x2)
669d3c7b9a0SKenneth D. Merry #define MPI2_IOCLOGINFO_TYPE_SAS                (0x3)
670d3c7b9a0SKenneth D. Merry #define MPI2_IOCLOGINFO_TYPE_ISCSI              (0x4)
671d3c7b9a0SKenneth D. Merry #define MPI2_IOCLOGINFO_LOG_DATA_MASK           (0x0FFFFFFF)
672d3c7b9a0SKenneth D. Merry 
673d3c7b9a0SKenneth D. Merry 
674d3c7b9a0SKenneth D. Merry /*****************************************************************************
675d3c7b9a0SKenneth D. Merry *
676d3c7b9a0SKenneth D. Merry *        Standard Message Structures
677d3c7b9a0SKenneth D. Merry *
678d3c7b9a0SKenneth D. Merry *****************************************************************************/
679d3c7b9a0SKenneth D. Merry 
680d3c7b9a0SKenneth D. Merry /****************************************************************************
681d3c7b9a0SKenneth D. Merry * Request Message Header for all request messages
682d3c7b9a0SKenneth D. Merry ****************************************************************************/
683d3c7b9a0SKenneth D. Merry 
684d3c7b9a0SKenneth D. Merry typedef struct _MPI2_REQUEST_HEADER
685d3c7b9a0SKenneth D. Merry {
686d3c7b9a0SKenneth D. Merry     U16             FunctionDependent1;         /* 0x00 */
687d3c7b9a0SKenneth D. Merry     U8              ChainOffset;                /* 0x02 */
688d3c7b9a0SKenneth D. Merry     U8              Function;                   /* 0x03 */
689d3c7b9a0SKenneth D. Merry     U16             FunctionDependent2;         /* 0x04 */
690d3c7b9a0SKenneth D. Merry     U8              FunctionDependent3;         /* 0x06 */
691d3c7b9a0SKenneth D. Merry     U8              MsgFlags;                   /* 0x07 */
692d3c7b9a0SKenneth D. Merry     U8              VP_ID;                      /* 0x08 */
693d3c7b9a0SKenneth D. Merry     U8              VF_ID;                      /* 0x09 */
694d3c7b9a0SKenneth D. Merry     U16             Reserved1;                  /* 0x0A */
695d3c7b9a0SKenneth D. Merry } MPI2_REQUEST_HEADER, MPI2_POINTER PTR_MPI2_REQUEST_HEADER,
696d3c7b9a0SKenneth D. Merry   MPI2RequestHeader_t, MPI2_POINTER pMPI2RequestHeader_t;
697d3c7b9a0SKenneth D. Merry 
698d3c7b9a0SKenneth D. Merry 
699d3c7b9a0SKenneth D. Merry /****************************************************************************
700d3c7b9a0SKenneth D. Merry *  Default Reply
701d3c7b9a0SKenneth D. Merry ****************************************************************************/
702d3c7b9a0SKenneth D. Merry 
703d3c7b9a0SKenneth D. Merry typedef struct _MPI2_DEFAULT_REPLY
704d3c7b9a0SKenneth D. Merry {
705d3c7b9a0SKenneth D. Merry     U16             FunctionDependent1;         /* 0x00 */
706d3c7b9a0SKenneth D. Merry     U8              MsgLength;                  /* 0x02 */
707d3c7b9a0SKenneth D. Merry     U8              Function;                   /* 0x03 */
708d3c7b9a0SKenneth D. Merry     U16             FunctionDependent2;         /* 0x04 */
709d3c7b9a0SKenneth D. Merry     U8              FunctionDependent3;         /* 0x06 */
710d3c7b9a0SKenneth D. Merry     U8              MsgFlags;                   /* 0x07 */
711d3c7b9a0SKenneth D. Merry     U8              VP_ID;                      /* 0x08 */
712d3c7b9a0SKenneth D. Merry     U8              VF_ID;                      /* 0x09 */
713d3c7b9a0SKenneth D. Merry     U16             Reserved1;                  /* 0x0A */
714d3c7b9a0SKenneth D. Merry     U16             FunctionDependent5;         /* 0x0C */
715d3c7b9a0SKenneth D. Merry     U16             IOCStatus;                  /* 0x0E */
716d3c7b9a0SKenneth D. Merry     U32             IOCLogInfo;                 /* 0x10 */
717d3c7b9a0SKenneth D. Merry } MPI2_DEFAULT_REPLY, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY,
718d3c7b9a0SKenneth D. Merry   MPI2DefaultReply_t, MPI2_POINTER pMPI2DefaultReply_t;
719d3c7b9a0SKenneth D. Merry 
720d3c7b9a0SKenneth D. Merry 
721d3c7b9a0SKenneth D. Merry /* common version structure/union used in messages and configuration pages */
722d3c7b9a0SKenneth D. Merry 
723d3c7b9a0SKenneth D. Merry typedef struct _MPI2_VERSION_STRUCT
724d3c7b9a0SKenneth D. Merry {
725d3c7b9a0SKenneth D. Merry     U8                      Dev;                        /* 0x00 */
726d3c7b9a0SKenneth D. Merry     U8                      Unit;                       /* 0x01 */
727d3c7b9a0SKenneth D. Merry     U8                      Minor;                      /* 0x02 */
728d3c7b9a0SKenneth D. Merry     U8                      Major;                      /* 0x03 */
729d3c7b9a0SKenneth D. Merry } MPI2_VERSION_STRUCT;
730d3c7b9a0SKenneth D. Merry 
731d3c7b9a0SKenneth D. Merry typedef union _MPI2_VERSION_UNION
732d3c7b9a0SKenneth D. Merry {
733d3c7b9a0SKenneth D. Merry     MPI2_VERSION_STRUCT     Struct;
734d3c7b9a0SKenneth D. Merry     U32                     Word;
735d3c7b9a0SKenneth D. Merry } MPI2_VERSION_UNION;
736d3c7b9a0SKenneth D. Merry 
737d3c7b9a0SKenneth D. Merry 
738d3c7b9a0SKenneth D. Merry /* LUN field defines, common to many structures */
739d3c7b9a0SKenneth D. Merry #define MPI2_LUN_FIRST_LEVEL_ADDRESSING             (0x0000FFFF)
740d3c7b9a0SKenneth D. Merry #define MPI2_LUN_SECOND_LEVEL_ADDRESSING            (0xFFFF0000)
741d3c7b9a0SKenneth D. Merry #define MPI2_LUN_THIRD_LEVEL_ADDRESSING             (0x0000FFFF)
742d3c7b9a0SKenneth D. Merry #define MPI2_LUN_FOURTH_LEVEL_ADDRESSING            (0xFFFF0000)
743d3c7b9a0SKenneth D. Merry #define MPI2_LUN_LEVEL_1_WORD                       (0xFF00)
744d3c7b9a0SKenneth D. Merry #define MPI2_LUN_LEVEL_1_DWORD                      (0x0000FF00)
745d3c7b9a0SKenneth D. Merry 
746d3c7b9a0SKenneth D. Merry 
747d3c7b9a0SKenneth D. Merry /*****************************************************************************
748d3c7b9a0SKenneth D. Merry *
749d3c7b9a0SKenneth D. Merry *        Fusion-MPT MPI Scatter Gather Elements
750d3c7b9a0SKenneth D. Merry *
751d3c7b9a0SKenneth D. Merry *****************************************************************************/
752d3c7b9a0SKenneth D. Merry 
753d3c7b9a0SKenneth D. Merry /****************************************************************************
754d3c7b9a0SKenneth D. Merry *  MPI Simple Element structures
755d3c7b9a0SKenneth D. Merry ****************************************************************************/
756d3c7b9a0SKenneth D. Merry 
757d3c7b9a0SKenneth D. Merry typedef struct _MPI2_SGE_SIMPLE32
758d3c7b9a0SKenneth D. Merry {
759d3c7b9a0SKenneth D. Merry     U32                     FlagsLength;
760d3c7b9a0SKenneth D. Merry     U32                     Address;
761d3c7b9a0SKenneth D. Merry } MPI2_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_SGE_SIMPLE32,
762d3c7b9a0SKenneth D. Merry   Mpi2SGESimple32_t, MPI2_POINTER pMpi2SGESimple32_t;
763d3c7b9a0SKenneth D. Merry 
764d3c7b9a0SKenneth D. Merry typedef struct _MPI2_SGE_SIMPLE64
765d3c7b9a0SKenneth D. Merry {
766d3c7b9a0SKenneth D. Merry     U32                     FlagsLength;
767d3c7b9a0SKenneth D. Merry     U64                     Address;
768d3c7b9a0SKenneth D. Merry } MPI2_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_SGE_SIMPLE64,
769d3c7b9a0SKenneth D. Merry   Mpi2SGESimple64_t, MPI2_POINTER pMpi2SGESimple64_t;
770d3c7b9a0SKenneth D. Merry 
771d3c7b9a0SKenneth D. Merry typedef struct _MPI2_SGE_SIMPLE_UNION
772d3c7b9a0SKenneth D. Merry {
773d3c7b9a0SKenneth D. Merry     U32                     FlagsLength;
774d3c7b9a0SKenneth D. Merry     union
775d3c7b9a0SKenneth D. Merry     {
776d3c7b9a0SKenneth D. Merry         U32                 Address32;
777d3c7b9a0SKenneth D. Merry         U64                 Address64;
778d3c7b9a0SKenneth D. Merry     } u;
779d3c7b9a0SKenneth D. Merry } MPI2_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_SIMPLE_UNION,
780d3c7b9a0SKenneth D. Merry   Mpi2SGESimpleUnion_t, MPI2_POINTER pMpi2SGESimpleUnion_t;
781d3c7b9a0SKenneth D. Merry 
782d3c7b9a0SKenneth D. Merry 
783d3c7b9a0SKenneth D. Merry /****************************************************************************
784d3c7b9a0SKenneth D. Merry *  MPI Chain Element structures
785d3c7b9a0SKenneth D. Merry ****************************************************************************/
786d3c7b9a0SKenneth D. Merry 
787d3c7b9a0SKenneth D. Merry typedef struct _MPI2_SGE_CHAIN32
788d3c7b9a0SKenneth D. Merry {
789d3c7b9a0SKenneth D. Merry     U16                     Length;
790d3c7b9a0SKenneth D. Merry     U8                      NextChainOffset;
791d3c7b9a0SKenneth D. Merry     U8                      Flags;
792d3c7b9a0SKenneth D. Merry     U32                     Address;
793d3c7b9a0SKenneth D. Merry } MPI2_SGE_CHAIN32, MPI2_POINTER PTR_MPI2_SGE_CHAIN32,
794d3c7b9a0SKenneth D. Merry   Mpi2SGEChain32_t, MPI2_POINTER pMpi2SGEChain32_t;
795d3c7b9a0SKenneth D. Merry 
796d3c7b9a0SKenneth D. Merry typedef struct _MPI2_SGE_CHAIN64
797d3c7b9a0SKenneth D. Merry {
798d3c7b9a0SKenneth D. Merry     U16                     Length;
799d3c7b9a0SKenneth D. Merry     U8                      NextChainOffset;
800d3c7b9a0SKenneth D. Merry     U8                      Flags;
801d3c7b9a0SKenneth D. Merry     U64                     Address;
802d3c7b9a0SKenneth D. Merry } MPI2_SGE_CHAIN64, MPI2_POINTER PTR_MPI2_SGE_CHAIN64,
803d3c7b9a0SKenneth D. Merry   Mpi2SGEChain64_t, MPI2_POINTER pMpi2SGEChain64_t;
804d3c7b9a0SKenneth D. Merry 
805d3c7b9a0SKenneth D. Merry typedef struct _MPI2_SGE_CHAIN_UNION
806d3c7b9a0SKenneth D. Merry {
807d3c7b9a0SKenneth D. Merry     U16                     Length;
808d3c7b9a0SKenneth D. Merry     U8                      NextChainOffset;
809d3c7b9a0SKenneth D. Merry     U8                      Flags;
810d3c7b9a0SKenneth D. Merry     union
811d3c7b9a0SKenneth D. Merry     {
812d3c7b9a0SKenneth D. Merry         U32                 Address32;
813d3c7b9a0SKenneth D. Merry         U64                 Address64;
814d3c7b9a0SKenneth D. Merry     } u;
815d3c7b9a0SKenneth D. Merry } MPI2_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_SGE_CHAIN_UNION,
816d3c7b9a0SKenneth D. Merry   Mpi2SGEChainUnion_t, MPI2_POINTER pMpi2SGEChainUnion_t;
817d3c7b9a0SKenneth D. Merry 
818d3c7b9a0SKenneth D. Merry 
819d3c7b9a0SKenneth D. Merry /****************************************************************************
820d3c7b9a0SKenneth D. Merry *  MPI Transaction Context Element structures
821d3c7b9a0SKenneth D. Merry ****************************************************************************/
822d3c7b9a0SKenneth D. Merry 
823d3c7b9a0SKenneth D. Merry typedef struct _MPI2_SGE_TRANSACTION32
824d3c7b9a0SKenneth D. Merry {
825d3c7b9a0SKenneth D. Merry     U8                      Reserved;
826d3c7b9a0SKenneth D. Merry     U8                      ContextSize;
827d3c7b9a0SKenneth D. Merry     U8                      DetailsLength;
828d3c7b9a0SKenneth D. Merry     U8                      Flags;
829d3c7b9a0SKenneth D. Merry     U32                     TransactionContext[1];
830d3c7b9a0SKenneth D. Merry     U32                     TransactionDetails[1];
831d3c7b9a0SKenneth D. Merry } MPI2_SGE_TRANSACTION32, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION32,
832d3c7b9a0SKenneth D. Merry   Mpi2SGETransaction32_t, MPI2_POINTER pMpi2SGETransaction32_t;
833d3c7b9a0SKenneth D. Merry 
834d3c7b9a0SKenneth D. Merry typedef struct _MPI2_SGE_TRANSACTION64
835d3c7b9a0SKenneth D. Merry {
836d3c7b9a0SKenneth D. Merry     U8                      Reserved;
837d3c7b9a0SKenneth D. Merry     U8                      ContextSize;
838d3c7b9a0SKenneth D. Merry     U8                      DetailsLength;
839d3c7b9a0SKenneth D. Merry     U8                      Flags;
840d3c7b9a0SKenneth D. Merry     U32                     TransactionContext[2];
841d3c7b9a0SKenneth D. Merry     U32                     TransactionDetails[1];
842d3c7b9a0SKenneth D. Merry } MPI2_SGE_TRANSACTION64, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION64,
843d3c7b9a0SKenneth D. Merry   Mpi2SGETransaction64_t, MPI2_POINTER pMpi2SGETransaction64_t;
844d3c7b9a0SKenneth D. Merry 
845d3c7b9a0SKenneth D. Merry typedef struct _MPI2_SGE_TRANSACTION96
846d3c7b9a0SKenneth D. Merry {
847d3c7b9a0SKenneth D. Merry     U8                      Reserved;
848d3c7b9a0SKenneth D. Merry     U8                      ContextSize;
849d3c7b9a0SKenneth D. Merry     U8                      DetailsLength;
850d3c7b9a0SKenneth D. Merry     U8                      Flags;
851d3c7b9a0SKenneth D. Merry     U32                     TransactionContext[3];
852d3c7b9a0SKenneth D. Merry     U32                     TransactionDetails[1];
853d3c7b9a0SKenneth D. Merry } MPI2_SGE_TRANSACTION96, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION96,
854d3c7b9a0SKenneth D. Merry   Mpi2SGETransaction96_t, MPI2_POINTER pMpi2SGETransaction96_t;
855d3c7b9a0SKenneth D. Merry 
856d3c7b9a0SKenneth D. Merry typedef struct _MPI2_SGE_TRANSACTION128
857d3c7b9a0SKenneth D. Merry {
858d3c7b9a0SKenneth D. Merry     U8                      Reserved;
859d3c7b9a0SKenneth D. Merry     U8                      ContextSize;
860d3c7b9a0SKenneth D. Merry     U8                      DetailsLength;
861d3c7b9a0SKenneth D. Merry     U8                      Flags;
862d3c7b9a0SKenneth D. Merry     U32                     TransactionContext[4];
863d3c7b9a0SKenneth D. Merry     U32                     TransactionDetails[1];
864d3c7b9a0SKenneth D. Merry } MPI2_SGE_TRANSACTION128, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION128,
865d3c7b9a0SKenneth D. Merry   Mpi2SGETransaction_t128, MPI2_POINTER pMpi2SGETransaction_t128;
866d3c7b9a0SKenneth D. Merry 
867d3c7b9a0SKenneth D. Merry typedef struct _MPI2_SGE_TRANSACTION_UNION
868d3c7b9a0SKenneth D. Merry {
869d3c7b9a0SKenneth D. Merry     U8                      Reserved;
870d3c7b9a0SKenneth D. Merry     U8                      ContextSize;
871d3c7b9a0SKenneth D. Merry     U8                      DetailsLength;
872d3c7b9a0SKenneth D. Merry     U8                      Flags;
873d3c7b9a0SKenneth D. Merry     union
874d3c7b9a0SKenneth D. Merry     {
875d3c7b9a0SKenneth D. Merry         U32                 TransactionContext32[1];
876d3c7b9a0SKenneth D. Merry         U32                 TransactionContext64[2];
877d3c7b9a0SKenneth D. Merry         U32                 TransactionContext96[3];
878d3c7b9a0SKenneth D. Merry         U32                 TransactionContext128[4];
879d3c7b9a0SKenneth D. Merry     } u;
880d3c7b9a0SKenneth D. Merry     U32                     TransactionDetails[1];
881d3c7b9a0SKenneth D. Merry } MPI2_SGE_TRANSACTION_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION_UNION,
882d3c7b9a0SKenneth D. Merry   Mpi2SGETransactionUnion_t, MPI2_POINTER pMpi2SGETransactionUnion_t;
883d3c7b9a0SKenneth D. Merry 
884d3c7b9a0SKenneth D. Merry 
885d3c7b9a0SKenneth D. Merry /****************************************************************************
886d3c7b9a0SKenneth D. Merry *  MPI SGE union for IO SGL's
887d3c7b9a0SKenneth D. Merry ****************************************************************************/
888d3c7b9a0SKenneth D. Merry 
889d3c7b9a0SKenneth D. Merry typedef struct _MPI2_MPI_SGE_IO_UNION
890d3c7b9a0SKenneth D. Merry {
891d3c7b9a0SKenneth D. Merry     union
892d3c7b9a0SKenneth D. Merry     {
893d3c7b9a0SKenneth D. Merry         MPI2_SGE_SIMPLE_UNION   Simple;
894d3c7b9a0SKenneth D. Merry         MPI2_SGE_CHAIN_UNION    Chain;
895d3c7b9a0SKenneth D. Merry     } u;
896d3c7b9a0SKenneth D. Merry } MPI2_MPI_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_IO_UNION,
897d3c7b9a0SKenneth D. Merry   Mpi2MpiSGEIOUnion_t, MPI2_POINTER pMpi2MpiSGEIOUnion_t;
898d3c7b9a0SKenneth D. Merry 
899d3c7b9a0SKenneth D. Merry 
900d3c7b9a0SKenneth D. Merry /****************************************************************************
901d3c7b9a0SKenneth D. Merry *  MPI SGE union for SGL's with Simple and Transaction elements
902d3c7b9a0SKenneth D. Merry ****************************************************************************/
903d3c7b9a0SKenneth D. Merry 
904d3c7b9a0SKenneth D. Merry typedef struct _MPI2_SGE_TRANS_SIMPLE_UNION
905d3c7b9a0SKenneth D. Merry {
906d3c7b9a0SKenneth D. Merry     union
907d3c7b9a0SKenneth D. Merry     {
908d3c7b9a0SKenneth D. Merry         MPI2_SGE_SIMPLE_UNION       Simple;
909d3c7b9a0SKenneth D. Merry         MPI2_SGE_TRANSACTION_UNION  Transaction;
910d3c7b9a0SKenneth D. Merry     } u;
911d3c7b9a0SKenneth D. Merry } MPI2_SGE_TRANS_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANS_SIMPLE_UNION,
912d3c7b9a0SKenneth D. Merry   Mpi2SGETransSimpleUnion_t, MPI2_POINTER pMpi2SGETransSimpleUnion_t;
913d3c7b9a0SKenneth D. Merry 
914d3c7b9a0SKenneth D. Merry 
915d3c7b9a0SKenneth D. Merry /****************************************************************************
916d3c7b9a0SKenneth D. Merry *  All MPI SGE types union
917d3c7b9a0SKenneth D. Merry ****************************************************************************/
918d3c7b9a0SKenneth D. Merry 
919d3c7b9a0SKenneth D. Merry typedef struct _MPI2_MPI_SGE_UNION
920d3c7b9a0SKenneth D. Merry {
921d3c7b9a0SKenneth D. Merry     union
922d3c7b9a0SKenneth D. Merry     {
923d3c7b9a0SKenneth D. Merry         MPI2_SGE_SIMPLE_UNION       Simple;
924d3c7b9a0SKenneth D. Merry         MPI2_SGE_CHAIN_UNION        Chain;
925d3c7b9a0SKenneth D. Merry         MPI2_SGE_TRANSACTION_UNION  Transaction;
926d3c7b9a0SKenneth D. Merry     } u;
927d3c7b9a0SKenneth D. Merry } MPI2_MPI_SGE_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_UNION,
928d3c7b9a0SKenneth D. Merry   Mpi2MpiSgeUnion_t, MPI2_POINTER pMpi2MpiSgeUnion_t;
929d3c7b9a0SKenneth D. Merry 
930d3c7b9a0SKenneth D. Merry 
931d3c7b9a0SKenneth D. Merry /****************************************************************************
932d3c7b9a0SKenneth D. Merry *  MPI SGE field definition and masks
933d3c7b9a0SKenneth D. Merry ****************************************************************************/
934d3c7b9a0SKenneth D. Merry 
935d3c7b9a0SKenneth D. Merry /* Flags field bit definitions */
936d3c7b9a0SKenneth D. Merry 
937d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_LAST_ELEMENT             (0x80)
938d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_END_OF_BUFFER            (0x40)
939d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_ELEMENT_TYPE_MASK        (0x30)
940d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_LOCAL_ADDRESS            (0x08)
941d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_DIRECTION                (0x04)
942d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_ADDRESS_SIZE             (0x02)
943d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_END_OF_LIST              (0x01)
944d3c7b9a0SKenneth D. Merry 
945d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_SHIFT                    (24)
946d3c7b9a0SKenneth D. Merry 
947d3c7b9a0SKenneth D. Merry #define MPI2_SGE_LENGTH_MASK                    (0x00FFFFFF)
948d3c7b9a0SKenneth D. Merry #define MPI2_SGE_CHAIN_LENGTH_MASK              (0x0000FFFF)
949d3c7b9a0SKenneth D. Merry 
950d3c7b9a0SKenneth D. Merry /* Element Type */
951d3c7b9a0SKenneth D. Merry 
952d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_TRANSACTION_ELEMENT      (0x00)
953d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_SIMPLE_ELEMENT           (0x10)
954d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_CHAIN_ELEMENT            (0x30)
955d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_ELEMENT_MASK             (0x30)
956d3c7b9a0SKenneth D. Merry 
957d3c7b9a0SKenneth D. Merry /* Address location */
958d3c7b9a0SKenneth D. Merry 
959d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_SYSTEM_ADDRESS           (0x00)
960d3c7b9a0SKenneth D. Merry 
961d3c7b9a0SKenneth D. Merry /* Direction */
962d3c7b9a0SKenneth D. Merry 
963d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_IOC_TO_HOST              (0x00)
964d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_HOST_TO_IOC              (0x04)
965d3c7b9a0SKenneth D. Merry 
966d043c564SKenneth D. Merry #define MPI2_SGE_FLAGS_DEST                     (MPI2_SGE_FLAGS_IOC_TO_HOST)
967d043c564SKenneth D. Merry #define MPI2_SGE_FLAGS_SOURCE                   (MPI2_SGE_FLAGS_HOST_TO_IOC)
968d043c564SKenneth D. Merry 
969d3c7b9a0SKenneth D. Merry /* Address Size */
970d3c7b9a0SKenneth D. Merry 
971d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_32_BIT_ADDRESSING        (0x00)
972d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_64_BIT_ADDRESSING        (0x02)
973d3c7b9a0SKenneth D. Merry 
974d3c7b9a0SKenneth D. Merry /* Context Size */
975d3c7b9a0SKenneth D. Merry 
976d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_32_BIT_CONTEXT           (0x00)
977d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_64_BIT_CONTEXT           (0x02)
978d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_96_BIT_CONTEXT           (0x04)
979d3c7b9a0SKenneth D. Merry #define MPI2_SGE_FLAGS_128_BIT_CONTEXT          (0x06)
980d3c7b9a0SKenneth D. Merry 
981d3c7b9a0SKenneth D. Merry #define MPI2_SGE_CHAIN_OFFSET_MASK              (0x00FF0000)
982d3c7b9a0SKenneth D. Merry #define MPI2_SGE_CHAIN_OFFSET_SHIFT             (16)
983d3c7b9a0SKenneth D. Merry 
984d3c7b9a0SKenneth D. Merry /****************************************************************************
985d3c7b9a0SKenneth D. Merry *  MPI SGE operation Macros
986d3c7b9a0SKenneth D. Merry ****************************************************************************/
987d3c7b9a0SKenneth D. Merry 
988d3c7b9a0SKenneth D. Merry /* SIMPLE FlagsLength manipulations... */
989d3c7b9a0SKenneth D. Merry #define MPI2_SGE_SET_FLAGS(f)          ((U32)(f) << MPI2_SGE_FLAGS_SHIFT)
990d3c7b9a0SKenneth D. Merry #define MPI2_SGE_GET_FLAGS(f)          (((f) & ~MPI2_SGE_LENGTH_MASK) >> MPI2_SGE_FLAGS_SHIFT)
991d3c7b9a0SKenneth D. Merry #define MPI2_SGE_LENGTH(f)             ((f) & MPI2_SGE_LENGTH_MASK)
992d3c7b9a0SKenneth D. Merry #define MPI2_SGE_CHAIN_LENGTH(f)       ((f) & MPI2_SGE_CHAIN_LENGTH_MASK)
993d3c7b9a0SKenneth D. Merry 
994d3c7b9a0SKenneth D. Merry #define MPI2_SGE_SET_FLAGS_LENGTH(f,l) (MPI2_SGE_SET_FLAGS(f) | MPI2_SGE_LENGTH(l))
995d3c7b9a0SKenneth D. Merry 
996d3c7b9a0SKenneth D. Merry #define MPI2_pSGE_GET_FLAGS(psg)            MPI2_SGE_GET_FLAGS((psg)->FlagsLength)
997d3c7b9a0SKenneth D. Merry #define MPI2_pSGE_GET_LENGTH(psg)           MPI2_SGE_LENGTH((psg)->FlagsLength)
998d3c7b9a0SKenneth D. Merry #define MPI2_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_SGE_SET_FLAGS_LENGTH(f,l)
999d3c7b9a0SKenneth D. Merry 
1000d3c7b9a0SKenneth D. Merry /* CAUTION - The following are READ-MODIFY-WRITE! */
1001d3c7b9a0SKenneth D. Merry #define MPI2_pSGE_SET_FLAGS(psg,f)      (psg)->FlagsLength |= MPI2_SGE_SET_FLAGS(f)
1002d3c7b9a0SKenneth D. Merry #define MPI2_pSGE_SET_LENGTH(psg,l)     (psg)->FlagsLength |= MPI2_SGE_LENGTH(l)
1003d3c7b9a0SKenneth D. Merry 
1004d3c7b9a0SKenneth D. Merry #define MPI2_GET_CHAIN_OFFSET(x)    ((x & MPI2_SGE_CHAIN_OFFSET_MASK) >> MPI2_SGE_CHAIN_OFFSET_SHIFT)
1005d3c7b9a0SKenneth D. Merry 
1006d3c7b9a0SKenneth D. Merry 
1007d3c7b9a0SKenneth D. Merry /*****************************************************************************
1008d3c7b9a0SKenneth D. Merry *
1009d3c7b9a0SKenneth D. Merry *        Fusion-MPT IEEE Scatter Gather Elements
1010d3c7b9a0SKenneth D. Merry *
1011d3c7b9a0SKenneth D. Merry *****************************************************************************/
1012d3c7b9a0SKenneth D. Merry 
1013d3c7b9a0SKenneth D. Merry /****************************************************************************
1014d3c7b9a0SKenneth D. Merry *  IEEE Simple Element structures
1015d3c7b9a0SKenneth D. Merry ****************************************************************************/
1016d3c7b9a0SKenneth D. Merry 
1017d3c7b9a0SKenneth D. Merry typedef struct _MPI2_IEEE_SGE_SIMPLE32
1018d3c7b9a0SKenneth D. Merry {
1019d3c7b9a0SKenneth D. Merry     U32                     Address;
1020d3c7b9a0SKenneth D. Merry     U32                     FlagsLength;
1021d3c7b9a0SKenneth D. Merry } MPI2_IEEE_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE32,
1022d3c7b9a0SKenneth D. Merry   Mpi2IeeeSgeSimple32_t, MPI2_POINTER pMpi2IeeeSgeSimple32_t;
1023d3c7b9a0SKenneth D. Merry 
1024d3c7b9a0SKenneth D. Merry typedef struct _MPI2_IEEE_SGE_SIMPLE64
1025d3c7b9a0SKenneth D. Merry {
1026d3c7b9a0SKenneth D. Merry     U64                     Address;
1027d3c7b9a0SKenneth D. Merry     U32                     Length;
1028d3c7b9a0SKenneth D. Merry     U16                     Reserved1;
1029d3c7b9a0SKenneth D. Merry     U8                      Reserved2;
1030d3c7b9a0SKenneth D. Merry     U8                      Flags;
1031d3c7b9a0SKenneth D. Merry } MPI2_IEEE_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE64,
1032d3c7b9a0SKenneth D. Merry   Mpi2IeeeSgeSimple64_t, MPI2_POINTER pMpi2IeeeSgeSimple64_t;
1033d3c7b9a0SKenneth D. Merry 
1034d3c7b9a0SKenneth D. Merry typedef union _MPI2_IEEE_SGE_SIMPLE_UNION
1035d3c7b9a0SKenneth D. Merry {
1036d3c7b9a0SKenneth D. Merry     MPI2_IEEE_SGE_SIMPLE32  Simple32;
1037d3c7b9a0SKenneth D. Merry     MPI2_IEEE_SGE_SIMPLE64  Simple64;
1038d3c7b9a0SKenneth D. Merry } MPI2_IEEE_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE_UNION,
1039d3c7b9a0SKenneth D. Merry   Mpi2IeeeSgeSimpleUnion_t, MPI2_POINTER pMpi2IeeeSgeSimpleUnion_t;
1040d3c7b9a0SKenneth D. Merry 
1041d3c7b9a0SKenneth D. Merry 
1042d3c7b9a0SKenneth D. Merry /****************************************************************************
1043d3c7b9a0SKenneth D. Merry *  IEEE Chain Element structures
1044d3c7b9a0SKenneth D. Merry ****************************************************************************/
1045d3c7b9a0SKenneth D. Merry 
1046d3c7b9a0SKenneth D. Merry typedef MPI2_IEEE_SGE_SIMPLE32  MPI2_IEEE_SGE_CHAIN32;
1047d3c7b9a0SKenneth D. Merry 
1048d3c7b9a0SKenneth D. Merry typedef MPI2_IEEE_SGE_SIMPLE64  MPI2_IEEE_SGE_CHAIN64;
1049d3c7b9a0SKenneth D. Merry 
1050d3c7b9a0SKenneth D. Merry typedef union _MPI2_IEEE_SGE_CHAIN_UNION
1051d3c7b9a0SKenneth D. Merry {
1052d3c7b9a0SKenneth D. Merry     MPI2_IEEE_SGE_CHAIN32   Chain32;
1053d3c7b9a0SKenneth D. Merry     MPI2_IEEE_SGE_CHAIN64   Chain64;
1054d3c7b9a0SKenneth D. Merry } MPI2_IEEE_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_CHAIN_UNION,
1055d3c7b9a0SKenneth D. Merry   Mpi2IeeeSgeChainUnion_t, MPI2_POINTER pMpi2IeeeSgeChainUnion_t;
1056d3c7b9a0SKenneth D. Merry 
1057d3c7b9a0SKenneth D. Merry 
1058d3c7b9a0SKenneth D. Merry /****************************************************************************
1059d3c7b9a0SKenneth D. Merry *  All IEEE SGE types union
1060d3c7b9a0SKenneth D. Merry ****************************************************************************/
1061d3c7b9a0SKenneth D. Merry 
1062d3c7b9a0SKenneth D. Merry typedef struct _MPI2_IEEE_SGE_UNION
1063d3c7b9a0SKenneth D. Merry {
1064d3c7b9a0SKenneth D. Merry     union
1065d3c7b9a0SKenneth D. Merry     {
1066d3c7b9a0SKenneth D. Merry         MPI2_IEEE_SGE_SIMPLE_UNION  Simple;
1067d3c7b9a0SKenneth D. Merry         MPI2_IEEE_SGE_CHAIN_UNION   Chain;
1068d3c7b9a0SKenneth D. Merry     } u;
1069d3c7b9a0SKenneth D. Merry } MPI2_IEEE_SGE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_UNION,
1070d3c7b9a0SKenneth D. Merry   Mpi2IeeeSgeUnion_t, MPI2_POINTER pMpi2IeeeSgeUnion_t;
1071d3c7b9a0SKenneth D. Merry 
1072d3c7b9a0SKenneth D. Merry 
1073d3c7b9a0SKenneth D. Merry /****************************************************************************
1074d3c7b9a0SKenneth D. Merry *  IEEE SGE field definitions and masks
1075d3c7b9a0SKenneth D. Merry ****************************************************************************/
1076d3c7b9a0SKenneth D. Merry 
1077d3c7b9a0SKenneth D. Merry /* Flags field bit definitions */
1078d3c7b9a0SKenneth D. Merry 
1079d3c7b9a0SKenneth D. Merry #define MPI2_IEEE_SGE_FLAGS_ELEMENT_TYPE_MASK   (0x80)
1080d3c7b9a0SKenneth D. Merry 
1081d3c7b9a0SKenneth D. Merry #define MPI2_IEEE32_SGE_FLAGS_SHIFT             (24)
1082d3c7b9a0SKenneth D. Merry 
1083d3c7b9a0SKenneth D. Merry #define MPI2_IEEE32_SGE_LENGTH_MASK             (0x00FFFFFF)
1084d3c7b9a0SKenneth D. Merry 
1085d3c7b9a0SKenneth D. Merry /* Element Type */
1086d3c7b9a0SKenneth D. Merry 
1087d3c7b9a0SKenneth D. Merry #define MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT      (0x00)
1088d3c7b9a0SKenneth D. Merry #define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT       (0x80)
1089d3c7b9a0SKenneth D. Merry 
1090d3c7b9a0SKenneth D. Merry /* Data Location Address Space */
1091d3c7b9a0SKenneth D. Merry 
1092d3c7b9a0SKenneth D. Merry #define MPI2_IEEE_SGE_FLAGS_ADDR_MASK           (0x03)
1093d043c564SKenneth D. Merry #define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR         (0x00) /* IEEE Simple Element only */
1094d043c564SKenneth D. Merry #define MPI2_IEEE_SGE_FLAGS_IOCDDR_ADDR         (0x01) /* IEEE Simple Element only */
1095d3c7b9a0SKenneth D. Merry #define MPI2_IEEE_SGE_FLAGS_IOCPLB_ADDR         (0x02)
1096d043c564SKenneth D. Merry #define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR      (0x03) /* IEEE Simple Element only */
1097d043c564SKenneth D. Merry #define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR   (0x03) /* IEEE Chain Element only */
1098d3c7b9a0SKenneth D. Merry 
1099d3c7b9a0SKenneth D. Merry /****************************************************************************
1100d3c7b9a0SKenneth D. Merry *  IEEE SGE operation Macros
1101d3c7b9a0SKenneth D. Merry ****************************************************************************/
1102d3c7b9a0SKenneth D. Merry 
1103d3c7b9a0SKenneth D. Merry /* SIMPLE FlagsLength manipulations... */
1104d3c7b9a0SKenneth D. Merry #define MPI2_IEEE32_SGE_SET_FLAGS(f)     ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT)
1105d3c7b9a0SKenneth D. Merry #define MPI2_IEEE32_SGE_GET_FLAGS(f)     (((f) & ~MPI2_IEEE32_SGE_LENGTH_MASK) >> MPI2_IEEE32_SGE_FLAGS_SHIFT)
1106d3c7b9a0SKenneth D. Merry #define MPI2_IEEE32_SGE_LENGTH(f)        ((f) & MPI2_IEEE32_SGE_LENGTH_MASK)
1107d3c7b9a0SKenneth D. Merry 
1108d3c7b9a0SKenneth D. Merry #define MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f, l)      (MPI2_IEEE32_SGE_SET_FLAGS(f) | MPI2_IEEE32_SGE_LENGTH(l))
1109d3c7b9a0SKenneth D. Merry 
1110d3c7b9a0SKenneth D. Merry #define MPI2_IEEE32_pSGE_GET_FLAGS(psg)             MPI2_IEEE32_SGE_GET_FLAGS((psg)->FlagsLength)
1111d3c7b9a0SKenneth D. Merry #define MPI2_IEEE32_pSGE_GET_LENGTH(psg)            MPI2_IEEE32_SGE_LENGTH((psg)->FlagsLength)
1112d3c7b9a0SKenneth D. Merry #define MPI2_IEEE32_pSGE_SET_FLAGS_LENGTH(psg,f,l)  (psg)->FlagsLength = MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f,l)
1113d3c7b9a0SKenneth D. Merry 
1114d3c7b9a0SKenneth D. Merry /* CAUTION - The following are READ-MODIFY-WRITE! */
1115d3c7b9a0SKenneth D. Merry #define MPI2_IEEE32_pSGE_SET_FLAGS(psg,f)    (psg)->FlagsLength |= MPI2_IEEE32_SGE_SET_FLAGS(f)
1116d3c7b9a0SKenneth D. Merry #define MPI2_IEEE32_pSGE_SET_LENGTH(psg,l)   (psg)->FlagsLength |= MPI2_IEEE32_SGE_LENGTH(l)
1117d3c7b9a0SKenneth D. Merry 
1118d3c7b9a0SKenneth D. Merry 
1119d3c7b9a0SKenneth D. Merry 
1120d3c7b9a0SKenneth D. Merry 
1121d3c7b9a0SKenneth D. Merry /*****************************************************************************
1122d3c7b9a0SKenneth D. Merry *
1123d3c7b9a0SKenneth D. Merry *        Fusion-MPT MPI/IEEE Scatter Gather Unions
1124d3c7b9a0SKenneth D. Merry *
1125d3c7b9a0SKenneth D. Merry *****************************************************************************/
1126d3c7b9a0SKenneth D. Merry 
1127d3c7b9a0SKenneth D. Merry typedef union _MPI2_SIMPLE_SGE_UNION
1128d3c7b9a0SKenneth D. Merry {
1129d3c7b9a0SKenneth D. Merry     MPI2_SGE_SIMPLE_UNION       MpiSimple;
1130d3c7b9a0SKenneth D. Merry     MPI2_IEEE_SGE_SIMPLE_UNION  IeeeSimple;
1131d3c7b9a0SKenneth D. Merry } MPI2_SIMPLE_SGE_UNION, MPI2_POINTER PTR_MPI2_SIMPLE_SGE_UNION,
1132d3c7b9a0SKenneth D. Merry   Mpi2SimpleSgeUntion_t, MPI2_POINTER pMpi2SimpleSgeUntion_t;
1133d3c7b9a0SKenneth D. Merry 
1134d3c7b9a0SKenneth D. Merry 
1135d3c7b9a0SKenneth D. Merry typedef union _MPI2_SGE_IO_UNION
1136d3c7b9a0SKenneth D. Merry {
1137d3c7b9a0SKenneth D. Merry     MPI2_SGE_SIMPLE_UNION       MpiSimple;
1138d3c7b9a0SKenneth D. Merry     MPI2_SGE_CHAIN_UNION        MpiChain;
1139d3c7b9a0SKenneth D. Merry     MPI2_IEEE_SGE_SIMPLE_UNION  IeeeSimple;
1140d3c7b9a0SKenneth D. Merry     MPI2_IEEE_SGE_CHAIN_UNION   IeeeChain;
1141d3c7b9a0SKenneth D. Merry } MPI2_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_SGE_IO_UNION,
1142d3c7b9a0SKenneth D. Merry   Mpi2SGEIOUnion_t, MPI2_POINTER pMpi2SGEIOUnion_t;
1143d3c7b9a0SKenneth D. Merry 
1144d3c7b9a0SKenneth D. Merry 
1145d3c7b9a0SKenneth D. Merry /****************************************************************************
1146d3c7b9a0SKenneth D. Merry *
1147d3c7b9a0SKenneth D. Merry *  Values for SGLFlags field, used in many request messages with an SGL
1148d3c7b9a0SKenneth D. Merry *
1149d3c7b9a0SKenneth D. Merry ****************************************************************************/
1150d3c7b9a0SKenneth D. Merry 
1151d3c7b9a0SKenneth D. Merry /* values for MPI SGL Data Location Address Space subfield */
1152d3c7b9a0SKenneth D. Merry #define MPI2_SGLFLAGS_ADDRESS_SPACE_MASK            (0x0C)
1153d3c7b9a0SKenneth D. Merry #define MPI2_SGLFLAGS_SYSTEM_ADDRESS_SPACE          (0x00)
1154d3c7b9a0SKenneth D. Merry #define MPI2_SGLFLAGS_IOCDDR_ADDRESS_SPACE          (0x04)
1155d3c7b9a0SKenneth D. Merry #define MPI2_SGLFLAGS_IOCPLB_ADDRESS_SPACE          (0x08)
1156d3c7b9a0SKenneth D. Merry #define MPI2_SGLFLAGS_IOCPLBNTA_ADDRESS_SPACE       (0x0C)
1157d3c7b9a0SKenneth D. Merry /* values for SGL Type subfield */
1158d3c7b9a0SKenneth D. Merry #define MPI2_SGLFLAGS_SGL_TYPE_MASK                 (0x03)
1159d3c7b9a0SKenneth D. Merry #define MPI2_SGLFLAGS_SGL_TYPE_MPI                  (0x00)
1160d3c7b9a0SKenneth D. Merry #define MPI2_SGLFLAGS_SGL_TYPE_IEEE32               (0x01)
1161d3c7b9a0SKenneth D. Merry #define MPI2_SGLFLAGS_SGL_TYPE_IEEE64               (0x02)
1162d3c7b9a0SKenneth D. Merry 
1163d3c7b9a0SKenneth D. Merry 
1164d3c7b9a0SKenneth D. Merry #endif
1165d3c7b9a0SKenneth D. Merry 
1166