xref: /freebsd/sys/dev/mpr/mprvar.h (revision 5def4c47d4bd90b209b9b4a4ba9faec15846d8fd)
1  /*-
2   * Copyright (c) 2009 Yahoo! Inc.
3   * Copyright (c) 2011-2015 LSI Corp.
4   * Copyright (c) 2013-2016 Avago Technologies
5   * Copyright 2000-2020 Broadcom Inc.
6   * All rights reserved.
7   *
8   * Redistribution and use in source and binary forms, with or without
9   * modification, are permitted provided that the following conditions
10   * are met:
11   * 1. Redistributions of source code must retain the above copyright
12   *    notice, this list of conditions and the following disclaimer.
13   * 2. Redistributions in binary form must reproduce the above copyright
14   *    notice, this list of conditions and the following disclaimer in the
15   *    documentation and/or other materials provided with the distribution.
16   *
17   * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18   * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20   * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23   * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24   * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25   * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26   * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27   * SUCH DAMAGE.
28   *
29   * Broadcom Inc. (LSI) MPT-Fusion Host Adapter FreeBSD
30   *
31   * $FreeBSD$
32   */
33  
34  #ifndef _MPRVAR_H
35  #define _MPRVAR_H
36  
37  #include <sys/lock.h>
38  #include <sys/mutex.h>
39  
40  #define MPR_DRIVER_VERSION	"23.00.00.00-fbsd"
41  
42  #define MPR_DB_MAX_WAIT		2500
43  
44  #define MPR_REQ_FRAMES		2048
45  #define MPR_PRI_REQ_FRAMES	128
46  #define MPR_EVT_REPLY_FRAMES	32
47  #define MPR_REPLY_FRAMES	MPR_REQ_FRAMES
48  #define MPR_CHAIN_FRAMES	16384
49  #define MPR_MAXIO_PAGES		(-1)
50  #define MPR_SENSE_LEN		SSD_FULL_SIZE
51  #define MPR_MSI_MAX		1
52  #define MPR_MSIX_MAX		96
53  #define MPR_SGE64_SIZE		12
54  #define MPR_SGE32_SIZE		8
55  #define MPR_SGC_SIZE		8
56  #define MPR_DEFAULT_CHAIN_SEG_SIZE	8
57  #define MPR_MAX_CHAIN_ELEMENT_SIZE	16
58  
59  /*
60   * PCIe NVMe Specific defines
61   */
62  //SLM-for now just use the same value as a SAS disk
63  #define NVME_QDEPTH			MPR_REQ_FRAMES
64  #define PRP_ENTRY_SIZE			8
65  #define NVME_CMD_PRP1_OFFSET		24	/* PRP1 offset in NVMe cmd */
66  #define NVME_CMD_PRP2_OFFSET		32	/* PRP2 offset in NVMe cmd */
67  #define NVME_ERROR_RESPONSE_SIZE	16	/* Max NVME Error Response */
68  #define HOST_PAGE_SIZE_4K		12
69  
70  #define MPR_FUNCTRACE(sc)			\
71  	mpr_dprint((sc), MPR_TRACE, "%s\n", __func__)
72  
73  #define	CAN_SLEEP			1
74  #define	NO_SLEEP			0
75  
76  #define MPR_PERIODIC_DELAY	1	/* 1 second heartbeat/watchdog check */
77  #define MPR_ATA_ID_TIMEOUT	5	/* 5 second timeout for SATA ID cmd */
78  #define MPR_MISSING_CHECK_DELAY	10	/* 10 seconds between missing check */
79  
80  #define	IFAULT_IOP_OVER_TEMP_THRESHOLD_EXCEEDED	0x2810
81  
82  #define MPR_SCSI_RI_INVALID_FRAME	(0x00000002)
83  
84  #define DEFAULT_SPINUP_WAIT	3	/* seconds to wait for spinup */
85  
86  #include <sys/endian.h>
87  
88  /*
89   * host mapping related macro definitions
90   */
91  #define MPR_MAPTABLE_BAD_IDX	0xFFFFFFFF
92  #define MPR_DPM_BAD_IDX		0xFFFF
93  #define MPR_ENCTABLE_BAD_IDX	0xFF
94  #define MPR_MAX_MISSING_COUNT	0x0F
95  #define MPR_DEV_RESERVED	0x20000000
96  #define MPR_MAP_IN_USE		0x10000000
97  #define MPR_MAP_BAD_ID		0xFFFFFFFF
98  
99  typedef uint8_t u8;
100  typedef uint16_t u16;
101  typedef uint32_t u32;
102  typedef uint64_t u64;
103  
104  typedef struct _MPI2_CONFIG_PAGE_MAN_11
105  {
106      MPI2_CONFIG_PAGE_HEADER             Header;         	/* 0x00 */
107      U8					FlashTime;		/* 0x04 */
108      U8					NVTime;			/* 0x05 */
109      U16					Flag;			/* 0x06 */
110      U8					RFIoTimeout;		/* 0x08 */
111      U8					EEDPTagMode;		/* 0x09 */
112      U8					AWTValue;		/* 0x0A */
113      U8					Reserve1;		/* 0x0B */
114      U8					MaxCmdFrames;		/* 0x0C */
115      U8					Reserve2;		/* 0x0D */
116      U16					AddlFlags;		/* 0x0E */
117      U32					SysRefClk;		/* 0x10 */
118      U64					Reserve3[3];		/* 0x14 */
119      U16					AddlFlags2;		/* 0x2C */
120      U8					AddlFlags3;		/* 0x2E */
121      U8					Reserve4;		/* 0x2F */
122      U64					opDebugEnable;		/* 0x30 */
123      U64					PlDebugEnable;		/* 0x38 */
124      U64					IrDebugEnable;		/* 0x40 */
125      U32					BoardPowerRequirement;	/* 0x48 */
126      U8					NVMeAbortTO;		/* 0x4C */
127      U8					Reserve5;		/* 0x4D */
128      U16					Reserve6;		/* 0x4E */
129      U32					Reserve7[3];		/* 0x50 */
130  } MPI2_CONFIG_PAGE_MAN_11,
131    MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_11,
132    Mpi2ManufacturingPage11_t, MPI2_POINTER pMpi2ManufacturingPage11_t;
133  
134  #define MPI2_MAN_PG11_ADDLFLAGS2_CUSTOM_TM_HANDLING_MASK	(0x0010)
135  
136  /**
137   * struct dev_mapping_table - device mapping information
138   * @physical_id: SAS address for drives or WWID for RAID volumes
139   * @device_info: bitfield provides detailed info about the device
140   * @phy_bits: bitfields indicating controller phys
141   * @dpm_entry_num: index of this device in device persistent map table
142   * @dev_handle: device handle for the device pointed by this entry
143   * @id: target id
144   * @missing_count: number of times the device not detected by driver
145   * @hide_flag: Hide this physical disk/not (foreign configuration)
146   * @init_complete: Whether the start of the day checks completed or not
147   * @TLR_bits: Turn TLR support on or off
148   */
149  struct dev_mapping_table {
150  	u64	physical_id;
151  	u32	device_info;
152  	u32	phy_bits;
153  	u16	dpm_entry_num;
154  	u16	dev_handle;
155  	u16	reserved1;
156  	u16	id;
157  	u8	missing_count;
158  	u8	init_complete;
159  	u8	TLR_bits;
160  	u8	reserved2;
161  };
162  
163  /**
164   * struct enc_mapping_table -  mapping information about an enclosure
165   * @enclosure_id: Logical ID of this enclosure
166   * @start_index: index to the entry in dev_mapping_table
167   * @phy_bits: bitfields indicating controller phys
168   * @dpm_entry_num: index of this enclosure in device persistent map table
169   * @enc_handle: device handle for the enclosure pointed by this entry
170   * @num_slots: number of slots in the enclosure
171   * @start_slot: Starting slot id
172   * @missing_count: number of times the device not detected by driver
173   * @removal_flag: used to mark the device for removal
174   * @skip_search: used as a flag to include/exclude enclosure for search
175   * @init_complete: Whether the start of the day checks completed or not
176   */
177  struct enc_mapping_table {
178  	u64	enclosure_id;
179  	u32	start_index;
180  	u32	phy_bits;
181  	u16	dpm_entry_num;
182  	u16	enc_handle;
183  	u16	num_slots;
184  	u16	start_slot;
185  	u8	missing_count;
186  	u8	removal_flag;
187  	u8	skip_search;
188  	u8	init_complete;
189  };
190  
191  /**
192   * struct map_removal_table - entries to be removed from mapping table
193   * @dpm_entry_num: index of this device in device persistent map table
194   * @dev_handle: device handle for the device pointed by this entry
195   */
196  struct map_removal_table{
197  	u16	dpm_entry_num;
198  	u16	dev_handle;
199  };
200  
201  typedef struct mpr_fw_diagnostic_buffer {
202  	size_t		size;
203  	uint8_t		extended_type;
204  	uint8_t		buffer_type;
205  	uint8_t		force_release;
206  	uint32_t	product_specific[23];
207  	uint8_t		immediate;
208  	uint8_t		enabled;
209  	uint8_t		valid_data;
210  	uint8_t		owned_by_firmware;
211  	uint32_t	unique_id;
212  } mpr_fw_diagnostic_buffer_t;
213  
214  struct mpr_softc;
215  struct mpr_command;
216  struct mprsas_softc;
217  union ccb;
218  struct mprsas_target;
219  struct mpr_column_map;
220  
221  MALLOC_DECLARE(M_MPR);
222  
223  typedef void mpr_evt_callback_t(struct mpr_softc *, uintptr_t,
224      MPI2_EVENT_NOTIFICATION_REPLY *reply);
225  typedef void mpr_command_callback_t(struct mpr_softc *, struct mpr_command *cm);
226  
227  struct mpr_chain {
228  	TAILQ_ENTRY(mpr_chain)		chain_link;
229  	void				*chain;
230  	uint64_t			chain_busaddr;
231  };
232  
233  struct mpr_prp_page {
234  	TAILQ_ENTRY(mpr_prp_page)	prp_page_link;
235  	uint64_t			*prp_page;
236  	uint64_t			prp_page_busaddr;
237  };
238  
239  /*
240   * This needs to be at least 2 to support SMP passthrough.
241   */
242  #define       MPR_IOVEC_COUNT 2
243  
244  struct mpr_command {
245  	TAILQ_ENTRY(mpr_command)	cm_link;
246  	TAILQ_ENTRY(mpr_command)	cm_recovery;
247  	struct mpr_softc		*cm_sc;
248  	union ccb			*cm_ccb;
249  	void				*cm_data;
250  	u_int				cm_length;
251  	u_int				cm_out_len;
252  	struct uio			cm_uio;
253  	struct iovec			cm_iovec[MPR_IOVEC_COUNT];
254  	u_int				cm_max_segs;
255  	u_int				cm_sglsize;
256  	void				*cm_sge;
257  	uint8_t				*cm_req;
258  	uint8_t				*cm_reply;
259  	uint32_t			cm_reply_data;
260  	mpr_command_callback_t		*cm_complete;
261  	void				*cm_complete_data;
262  	struct mprsas_target		*cm_targ;
263  	MPI2_REQUEST_DESCRIPTOR_UNION	cm_desc;
264  	u_int	                	cm_lun;
265  	u_int				cm_flags;
266  #define MPR_CM_FLAGS_POLLED		(1 << 0)
267  #define MPR_CM_FLAGS_COMPLETE		(1 << 1)
268  #define MPR_CM_FLAGS_SGE_SIMPLE		(1 << 2)
269  #define MPR_CM_FLAGS_DATAOUT		(1 << 3)
270  #define MPR_CM_FLAGS_DATAIN		(1 << 4)
271  #define MPR_CM_FLAGS_WAKEUP		(1 << 5)
272  #define MPR_CM_FLAGS_USE_UIO		(1 << 6)
273  #define MPR_CM_FLAGS_SMP_PASS		(1 << 7)
274  #define	MPR_CM_FLAGS_CHAIN_FAILED	(1 << 8)
275  #define	MPR_CM_FLAGS_ERROR_MASK		MPR_CM_FLAGS_CHAIN_FAILED
276  #define	MPR_CM_FLAGS_USE_CCB		(1 << 9)
277  #define	MPR_CM_FLAGS_SATA_ID_TIMEOUT	(1 << 10)
278  #define MPR_CM_FLAGS_ON_RECOVERY	(1 << 12)
279  #define MPR_CM_FLAGS_TIMEDOUT		(1 << 13)
280  	u_int				cm_state;
281  #define MPR_CM_STATE_FREE		0
282  #define MPR_CM_STATE_BUSY		1
283  #define MPR_CM_STATE_INQUEUE		2
284  	bus_dmamap_t			cm_dmamap;
285  	struct scsi_sense_data		*cm_sense;
286  	uint64_t			*nvme_error_response;
287  	TAILQ_HEAD(, mpr_chain)		cm_chain_list;
288   	TAILQ_HEAD(, mpr_prp_page)	cm_prp_page_list;
289  	uint32_t			cm_req_busaddr;
290  	bus_addr_t			cm_sense_busaddr;
291  	struct callout			cm_callout;
292  	mpr_command_callback_t		*cm_timeout_handler;
293  };
294  
295  struct mpr_column_map {
296  	uint16_t			dev_handle;
297  	uint8_t				phys_disk_num;
298  };
299  
300  struct mpr_event_handle {
301  	TAILQ_ENTRY(mpr_event_handle)	eh_list;
302  	mpr_evt_callback_t		*callback;
303  	void				*data;
304  	uint8_t				mask[16];
305  };
306  
307  struct mpr_busdma_context {
308  	int				completed;
309  	int				abandoned;
310  	int				error;
311  	bus_addr_t			*addr;
312  	struct mpr_softc		*softc;
313  	bus_dmamap_t			buffer_dmamap;
314  	bus_dma_tag_t			buffer_dmat;
315  };
316  
317  struct mpr_queue {
318  	struct mpr_softc		*sc;
319  	int				qnum;
320  	MPI2_REPLY_DESCRIPTORS_UNION	*post_queue;
321  	int				replypostindex;
322  #ifdef notyet
323  	ck_ring_buffer_t		*ringmem;
324  	ck_ring_buffer_t		*chainmem;
325  	ck_ring_t			req_ring;
326  	ck_ring_t			chain_ring;
327  #endif
328  	bus_dma_tag_t			buffer_dmat;
329  	int				io_cmds_highwater;
330  	int				chain_free_lowwater;
331  	int				chain_alloc_fail;
332  	struct resource			*irq;
333  	void				*intrhand;
334  	int				irq_rid;
335  };
336  
337  struct mpr_softc {
338  	device_t			mpr_dev;
339  	struct cdev			*mpr_cdev;
340  	u_int				mpr_flags;
341  #define MPR_FLAGS_INTX		(1 << 0)
342  #define MPR_FLAGS_MSI		(1 << 1)
343  #define MPR_FLAGS_BUSY		(1 << 2)
344  #define MPR_FLAGS_SHUTDOWN	(1 << 3)
345  #define MPR_FLAGS_DIAGRESET	(1 << 4)
346  #define	MPR_FLAGS_ATTACH_DONE	(1 << 5)
347  #define	MPR_FLAGS_GEN35_IOC	(1 << 6)
348  #define	MPR_FLAGS_REALLOCATED	(1 << 7)
349  #define	MPR_FLAGS_SEA_IOC	(1 << 8)
350  	u_int				mpr_debug;
351  	int				msi_msgs;
352  	u_int				reqframesz;
353  	u_int				replyframesz;
354  	u_int				atomic_desc_capable;
355  	int				tm_cmds_active;
356  	int				io_cmds_active;
357  	int				io_cmds_highwater;
358  	int				chain_free;
359  	int				max_chains;
360  	int				max_io_pages;
361  	u_int				maxio;
362  	int				chain_free_lowwater;
363  	uint32_t			chain_frame_size;
364  	int				prp_buffer_size;
365  	int				prp_pages_free;
366  	int				prp_pages_free_lowwater;
367  	u_int				enable_ssu;
368  	int				spinup_wait_time;
369  	int				use_phynum;
370  	int				dump_reqs_alltypes;
371  	uint64_t			chain_alloc_fail;
372  	uint64_t			prp_page_alloc_fail;
373  	struct sysctl_ctx_list		sysctl_ctx;
374  	struct sysctl_oid		*sysctl_tree;
375  	char                            fw_version[16];
376  	char				msg_version[8];
377  	struct mpr_command		*commands;
378  	struct mpr_chain		*chains;
379  	struct mpr_prp_page		*prps;
380  	struct callout			periodic;
381  	struct callout			device_check_callout;
382  	struct mpr_queue		*queues;
383  
384  	struct mprsas_softc		*sassc;
385  	TAILQ_HEAD(, mpr_command)	req_list;
386  	TAILQ_HEAD(, mpr_command)	high_priority_req_list;
387  	TAILQ_HEAD(, mpr_chain)		chain_list;
388  	TAILQ_HEAD(, mpr_prp_page)	prp_page_list;
389  	TAILQ_HEAD(, mpr_command)	tm_list;
390  	int				replypostindex;
391  	int				replyfreeindex;
392  
393  	struct resource			*mpr_regs_resource;
394  	bus_space_handle_t		mpr_bhandle;
395  	bus_space_tag_t			mpr_btag;
396  	int				mpr_regs_rid;
397  
398  	bus_dma_tag_t			mpr_parent_dmat;
399  	bus_dma_tag_t			buffer_dmat;
400  
401  	MPI2_IOC_FACTS_REPLY		*facts;
402  	int				num_reqs;
403  	int				num_prireqs;
404  	int				num_replies;
405  	int				num_chains;
406  	int				fqdepth;	/* Free queue */
407  	int				pqdepth;	/* Post queue */
408  
409  	uint8_t				event_mask[16];
410  	TAILQ_HEAD(, mpr_event_handle)	event_list;
411  	struct mpr_event_handle		*mpr_log_eh;
412  
413  	struct mtx			mpr_mtx;
414  	struct intr_config_hook		mpr_ich;
415  
416  	uint8_t				*req_frames;
417  	bus_addr_t			req_busaddr;
418  	bus_dma_tag_t			req_dmat;
419  	bus_dmamap_t			req_map;
420  
421  	uint8_t				*reply_frames;
422  	bus_addr_t			reply_busaddr;
423  	bus_dma_tag_t			reply_dmat;
424  	bus_dmamap_t			reply_map;
425  
426  	struct scsi_sense_data		*sense_frames;
427  	bus_addr_t			sense_busaddr;
428  	bus_dma_tag_t			sense_dmat;
429  	bus_dmamap_t			sense_map;
430  
431  	uint8_t				*chain_frames;
432  	bus_dma_tag_t			chain_dmat;
433  	bus_dmamap_t			chain_map;
434  
435  	uint8_t				*prp_pages;
436  	bus_addr_t			prp_page_busaddr;
437  	bus_dma_tag_t			prp_page_dmat;
438  	bus_dmamap_t			prp_page_map;
439  
440  	MPI2_REPLY_DESCRIPTORS_UNION	*post_queue;
441  	bus_addr_t			post_busaddr;
442  	uint32_t			*free_queue;
443  	bus_addr_t			free_busaddr;
444  	bus_dma_tag_t			queues_dmat;
445  	bus_dmamap_t			queues_map;
446  
447  	uint8_t				*fw_diag_buffer;
448  	bus_addr_t			fw_diag_busaddr;
449  	bus_dma_tag_t			fw_diag_dmat;
450  	bus_dmamap_t			fw_diag_map;
451  
452  	uint8_t				ir_firmware;
453  
454  	/* static config pages */
455  	Mpi2IOCPage8_t			ioc_pg8;
456  	Mpi2IOUnitPage8_t		iounit_pg8;
457  
458  	/* host mapping support */
459  	struct dev_mapping_table	*mapping_table;
460  	struct enc_mapping_table	*enclosure_table;
461  	struct map_removal_table	*removal_table;
462  	uint8_t				*dpm_entry_used;
463  	uint8_t				*dpm_flush_entry;
464  	Mpi2DriverMappingPage0_t	*dpm_pg0;
465  	uint16_t			max_devices;
466  	uint16_t			max_enclosures;
467  	uint16_t			max_expanders;
468  	uint8_t				max_volumes;
469  	uint8_t				num_enc_table_entries;
470  	uint8_t				num_rsvd_entries;
471  	uint16_t			max_dpm_entries;
472  	uint8_t				is_dpm_enable;
473  	uint8_t				track_mapping_events;
474  	uint32_t			pending_map_events;
475  
476  	/* FW diag Buffer List */
477  	mpr_fw_diagnostic_buffer_t
478  				fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT];
479  
480  	/* Event Recording IOCTL support */
481  	uint32_t			events_to_record[4];
482  	mpr_event_entry_t		recorded_events[MPR_EVENT_QUEUE_SIZE];
483  	uint8_t				event_index;
484  	uint32_t			event_number;
485  
486  	/* EEDP and TLR support */
487  	uint8_t				eedp_enabled;
488  	uint8_t				control_TLR;
489  
490  	/* Shutdown Event Handler */
491  	eventhandler_tag		shutdown_eh;
492  
493  	/* To track topo events during reset */
494  #define	MPR_DIAG_RESET_TIMEOUT	300000
495  	uint8_t				wait_for_port_enable;
496  	uint8_t				port_enable_complete;
497  	uint8_t				msleep_fake_chan;
498  
499  	/* StartStopUnit command handling at shutdown */
500  	uint32_t			SSU_refcount;
501  	uint8_t				SSU_started;
502  
503  	/* Configuration tunables */
504  	u_int				disable_msix;
505  	u_int				disable_msi;
506  	u_int				max_msix;
507  	u_int				max_reqframes;
508  	u_int				max_prireqframes;
509  	u_int				max_replyframes;
510  	u_int				max_evtframes;
511  	char				exclude_ids[80];
512  
513  	struct timeval			lastfail;
514  	uint8_t				custom_nvme_tm_handling;
515  	uint8_t				nvme_abort_timeout;
516  };
517  
518  struct mpr_config_params {
519  	MPI2_CONFIG_EXT_PAGE_HEADER_UNION	hdr;
520  	u_int		action;
521  	u_int		page_address;	/* Attributes, not a phys address */
522  	u_int		status;
523  	void		*buffer;
524  	u_int		length;
525  	int		timeout;
526  	void		(*callback)(struct mpr_softc *, struct mpr_config_params *);
527  	void		*cbdata;
528  };
529  
530  struct scsi_read_capacity_eedp
531  {
532  	uint8_t addr[8];
533  	uint8_t length[4];
534  	uint8_t protect;
535  };
536  
537  static __inline uint32_t
538  mpr_regread(struct mpr_softc *sc, uint32_t offset)
539  {
540  	uint32_t ret_val, i = 0;
541  	do {
542  		ret_val =
543  		    bus_space_read_4(sc->mpr_btag, sc->mpr_bhandle, offset);
544  	} while((sc->mpr_flags & MPR_FLAGS_SEA_IOC) &&
545  	    (ret_val == 0) && (++i < 3));
546  
547  	return ret_val;
548  }
549  
550  static __inline void
551  mpr_regwrite(struct mpr_softc *sc, uint32_t offset, uint32_t val)
552  {
553  	bus_space_write_4(sc->mpr_btag, sc->mpr_bhandle, offset, val);
554  }
555  
556  /* free_queue must have Little Endian address
557   * TODO- cm_reply_data is unwanted. We can remove it.
558   * */
559  static __inline void
560  mpr_free_reply(struct mpr_softc *sc, uint32_t busaddr)
561  {
562  	if (++sc->replyfreeindex >= sc->fqdepth)
563  		sc->replyfreeindex = 0;
564  	sc->free_queue[sc->replyfreeindex] = htole32(busaddr);
565  	mpr_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
566  }
567  
568  static __inline struct mpr_chain *
569  mpr_alloc_chain(struct mpr_softc *sc)
570  {
571  	struct mpr_chain *chain;
572  
573  	if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) {
574  		TAILQ_REMOVE(&sc->chain_list, chain, chain_link);
575  		sc->chain_free--;
576  		if (sc->chain_free < sc->chain_free_lowwater)
577  			sc->chain_free_lowwater = sc->chain_free;
578  	} else
579  		sc->chain_alloc_fail++;
580  	return (chain);
581  }
582  
583  static __inline void
584  mpr_free_chain(struct mpr_softc *sc, struct mpr_chain *chain)
585  {
586  #if 0
587  	bzero(chain->chain, 128);
588  #endif
589  	sc->chain_free++;
590  	TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link);
591  }
592  
593  static __inline struct mpr_prp_page *
594  mpr_alloc_prp_page(struct mpr_softc *sc)
595  {
596  	struct mpr_prp_page *prp_page;
597  
598  	if ((prp_page = TAILQ_FIRST(&sc->prp_page_list)) != NULL) {
599  		TAILQ_REMOVE(&sc->prp_page_list, prp_page, prp_page_link);
600  		sc->prp_pages_free--;
601  		if (sc->prp_pages_free < sc->prp_pages_free_lowwater)
602  			sc->prp_pages_free_lowwater = sc->prp_pages_free;
603  	} else
604  		sc->prp_page_alloc_fail++;
605  	return (prp_page);
606  }
607  
608  static __inline void
609  mpr_free_prp_page(struct mpr_softc *sc, struct mpr_prp_page *prp_page)
610  {
611  	sc->prp_pages_free++;
612  	TAILQ_INSERT_TAIL(&sc->prp_page_list, prp_page, prp_page_link);
613  }
614  
615  static __inline void
616  mpr_free_command(struct mpr_softc *sc, struct mpr_command *cm)
617  {
618  	struct mpr_chain *chain, *chain_temp;
619  	struct mpr_prp_page *prp_page, *prp_page_temp;
620  
621  	KASSERT(cm->cm_state == MPR_CM_STATE_BUSY,
622  	    ("state not busy, state = %u\n", cm->cm_state));
623  
624  	if (cm->cm_reply != NULL)
625  		mpr_free_reply(sc, cm->cm_reply_data);
626  	cm->cm_reply = NULL;
627  	cm->cm_flags = 0;
628  	cm->cm_complete = NULL;
629  	cm->cm_complete_data = NULL;
630  	cm->cm_ccb = NULL;
631  	cm->cm_targ = NULL;
632  	cm->cm_max_segs = 0;
633  	cm->cm_lun = 0;
634  	cm->cm_state = MPR_CM_STATE_FREE;
635  	cm->cm_data = NULL;
636  	cm->cm_length = 0;
637  	cm->cm_out_len = 0;
638  	cm->cm_sglsize = 0;
639  	cm->cm_sge = NULL;
640  
641  	TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
642  		TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
643  		mpr_free_chain(sc, chain);
644  	}
645  	TAILQ_FOREACH_SAFE(prp_page, &cm->cm_prp_page_list, prp_page_link,
646  	    prp_page_temp) {
647  		TAILQ_REMOVE(&cm->cm_prp_page_list, prp_page, prp_page_link);
648  		mpr_free_prp_page(sc, prp_page);
649  	}
650  	TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link);
651  }
652  
653  static __inline struct mpr_command *
654  mpr_alloc_command(struct mpr_softc *sc)
655  {
656  	struct mpr_command *cm;
657  
658  	cm = TAILQ_FIRST(&sc->req_list);
659  	if (cm == NULL)
660  		return (NULL);
661  
662  	KASSERT(cm->cm_state == MPR_CM_STATE_FREE,
663  	    ("mpr: Allocating busy command, state = %u\n", cm->cm_state));
664  
665  	TAILQ_REMOVE(&sc->req_list, cm, cm_link);
666  	cm->cm_state = MPR_CM_STATE_BUSY;
667  	cm->cm_timeout_handler = NULL;
668  	return (cm);
669  }
670  
671  static __inline void
672  mpr_free_high_priority_command(struct mpr_softc *sc, struct mpr_command *cm)
673  {
674  	struct mpr_chain *chain, *chain_temp;
675  
676  	KASSERT(cm->cm_state == MPR_CM_STATE_BUSY,
677  	    ("state not busy, state = %u\n", cm->cm_state));
678  
679  	if (cm->cm_reply != NULL)
680  		mpr_free_reply(sc, cm->cm_reply_data);
681  	cm->cm_reply = NULL;
682  	cm->cm_flags = 0;
683  	cm->cm_complete = NULL;
684  	cm->cm_complete_data = NULL;
685  	cm->cm_ccb = NULL;
686  	cm->cm_targ = NULL;
687  	cm->cm_lun = 0;
688  	cm->cm_state = MPR_CM_STATE_FREE;
689  	TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
690  		TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
691  		mpr_free_chain(sc, chain);
692  	}
693  	TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link);
694  }
695  
696  static __inline struct mpr_command *
697  mpr_alloc_high_priority_command(struct mpr_softc *sc)
698  {
699  	struct mpr_command *cm;
700  
701  	cm = TAILQ_FIRST(&sc->high_priority_req_list);
702  	if (cm == NULL)
703  		return (NULL);
704  
705  	KASSERT(cm->cm_state == MPR_CM_STATE_FREE,
706  	    ("mpr: Allocating busy command, state = %u\n", cm->cm_state));
707  
708  	TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link);
709  	cm->cm_state = MPR_CM_STATE_BUSY;
710  	cm->cm_timeout_handler = NULL;
711  	cm->cm_desc.HighPriority.RequestFlags =
712  	    MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
713  	return (cm);
714  }
715  
716  static __inline void
717  mpr_lock(struct mpr_softc *sc)
718  {
719  	mtx_lock(&sc->mpr_mtx);
720  }
721  
722  static __inline void
723  mpr_unlock(struct mpr_softc *sc)
724  {
725  	mtx_unlock(&sc->mpr_mtx);
726  }
727  
728  #define MPR_INFO	(1 << 0)	/* Basic info */
729  #define MPR_FAULT	(1 << 1)	/* Hardware faults */
730  #define MPR_EVENT	(1 << 2)	/* Event data from the controller */
731  #define MPR_LOG		(1 << 3)	/* Log data from the controller */
732  #define MPR_RECOVERY	(1 << 4)	/* Command error recovery tracing */
733  #define MPR_ERROR	(1 << 5)	/* Parameter errors, programming bugs */
734  #define MPR_INIT	(1 << 6)	/* Things related to system init */
735  #define MPR_XINFO	(1 << 7)	/* More detailed/noisy info */
736  #define MPR_USER	(1 << 8)	/* Trace user-generated commands */
737  #define MPR_MAPPING	(1 << 9)	/* Trace device mappings */
738  #define MPR_TRACE	(1 << 10)	/* Function-by-function trace */
739  
740  #define	MPR_SSU_DISABLE_SSD_DISABLE_HDD	0
741  #define	MPR_SSU_ENABLE_SSD_DISABLE_HDD	1
742  #define	MPR_SSU_DISABLE_SSD_ENABLE_HDD	2
743  #define	MPR_SSU_ENABLE_SSD_ENABLE_HDD	3
744  
745  #define mpr_printf(sc, args...)				\
746  	device_printf((sc)->mpr_dev, ##args)
747  
748  #define mpr_print_field(sc, msg, args...)		\
749  	printf("\t" msg, ##args)
750  
751  #define mpr_vprintf(sc, args...)			\
752  do {							\
753  	if (bootverbose)				\
754  		mpr_printf(sc, ##args);			\
755  } while (0)
756  
757  #define mpr_dprint(sc, level, msg, args...)		\
758  do {							\
759  	if ((sc)->mpr_debug & (level))			\
760  		device_printf((sc)->mpr_dev, msg, ##args);	\
761  } while (0)
762  
763  #define MPR_PRINTFIELD_START(sc, tag...)	\
764  	mpr_printf((sc), ##tag);		\
765  	mpr_print_field((sc), ":\n")
766  #define MPR_PRINTFIELD_END(sc, tag)		\
767  	mpr_printf((sc), tag "\n")
768  #define MPR_PRINTFIELD(sc, facts, attr, fmt)	\
769  	mpr_print_field((sc), #attr ": " #fmt "\n", (facts)->attr)
770  #define MPR_PRINTFIELD_16(sc, facts, attr, fmt)	\
771  	mpr_print_field((sc), #attr ": " #fmt "\n", le16toh((facts)->attr))
772  #define MPR_PRINTFIELD_32(sc, facts, attr, fmt)	\
773  	mpr_print_field((sc), #attr ": " #fmt "\n", le32toh((facts)->attr))
774  
775  static __inline void
776  mpr_from_u64(uint64_t data, U64 *mpr)
777  {
778  	(mpr)->High = htole32((uint32_t)((data) >> 32));
779  	(mpr)->Low = htole32((uint32_t)((data) & 0xffffffff));
780  }
781  
782  static __inline uint64_t
783  mpr_to_u64(U64 *data)
784  {
785  	return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low));
786  }
787  
788  static __inline void
789  mpr_mask_intr(struct mpr_softc *sc)
790  {
791  	uint32_t mask;
792  
793  	mask = mpr_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
794  	mask |= MPI2_HIM_REPLY_INT_MASK;
795  	mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
796  }
797  
798  static __inline void
799  mpr_unmask_intr(struct mpr_softc *sc)
800  {
801  	uint32_t mask;
802  
803  	mask = mpr_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
804  	mask &= ~MPI2_HIM_REPLY_INT_MASK;
805  	mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
806  }
807  
808  int mpr_pci_setup_interrupts(struct mpr_softc *sc);
809  void mpr_pci_free_interrupts(struct mpr_softc *sc);
810  int mpr_pci_restore(struct mpr_softc *sc);
811  
812  void mpr_get_tunables(struct mpr_softc *sc);
813  int mpr_attach(struct mpr_softc *sc);
814  int mpr_free(struct mpr_softc *sc);
815  void mpr_intr(void *);
816  void mpr_intr_msi(void *);
817  void mpr_intr_locked(void *);
818  int mpr_register_events(struct mpr_softc *, uint8_t *, mpr_evt_callback_t *,
819      void *, struct mpr_event_handle **);
820  int mpr_restart(struct mpr_softc *);
821  int mpr_update_events(struct mpr_softc *, struct mpr_event_handle *, uint8_t *);
822  int mpr_deregister_events(struct mpr_softc *, struct mpr_event_handle *);
823  void mpr_build_nvme_prp(struct mpr_softc *sc, struct mpr_command *cm,
824      Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request, void *data,
825      uint32_t data_in_sz, uint32_t data_out_sz);
826  int mpr_push_sge(struct mpr_command *, MPI2_SGE_SIMPLE64 *, size_t, int);
827  int mpr_push_ieee_sge(struct mpr_command *, void *, int);
828  int mpr_add_dmaseg(struct mpr_command *, vm_paddr_t, size_t, u_int, int);
829  int mpr_attach_sas(struct mpr_softc *sc);
830  int mpr_detach_sas(struct mpr_softc *sc);
831  int mpr_read_config_page(struct mpr_softc *, struct mpr_config_params *);
832  int mpr_write_config_page(struct mpr_softc *, struct mpr_config_params *);
833  void mpr_memaddr_cb(void *, bus_dma_segment_t *, int , int );
834  void mpr_memaddr_wait_cb(void *, bus_dma_segment_t *, int , int );
835  void mpr_init_sge(struct mpr_command *cm, void *req, void *sge);
836  int mpr_attach_user(struct mpr_softc *);
837  void mpr_detach_user(struct mpr_softc *);
838  void mprsas_record_event(struct mpr_softc *sc,
839      MPI2_EVENT_NOTIFICATION_REPLY *event_reply);
840  
841  int mpr_map_command(struct mpr_softc *sc, struct mpr_command *cm);
842  int mpr_wait_command(struct mpr_softc *sc, struct mpr_command **cm, int timeout,
843      int sleep_flag);
844  int mpr_request_polled(struct mpr_softc *sc, struct mpr_command **cm);
845  
846  int mpr_config_get_bios_pg3(struct mpr_softc *sc, Mpi2ConfigReply_t
847      *mpi_reply, Mpi2BiosPage3_t *config_page);
848  int mpr_config_get_raid_volume_pg0(struct mpr_softc *sc, Mpi2ConfigReply_t
849      *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address);
850  int mpr_config_get_ioc_pg8(struct mpr_softc *sc, Mpi2ConfigReply_t *,
851      Mpi2IOCPage8_t *);
852  int mpr_config_get_iounit_pg8(struct mpr_softc *sc,
853      Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage8_t *config_page);
854  int mpr_config_get_sas_device_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
855      Mpi2SasDevicePage0_t *, u32 , u16 );
856  int mpr_config_get_pcie_device_pg0(struct mpr_softc *sc, Mpi2ConfigReply_t
857      *mpi_reply, Mpi26PCIeDevicePage0_t *config_page, u32 form, u16 handle);
858  int mpr_config_get_pcie_device_pg2(struct mpr_softc *sc, Mpi2ConfigReply_t
859      *mpi_reply, Mpi26PCIeDevicePage2_t *config_page, u32 form, u16 handle);
860  int mpr_config_get_dpm_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
861      Mpi2DriverMappingPage0_t *, u16 );
862  int mpr_config_get_raid_volume_pg1(struct mpr_softc *sc,
863      Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
864      u16 handle);
865  int mpr_config_get_volume_wwid(struct mpr_softc *sc, u16 volume_handle,
866      u64 *wwid);
867  int mpr_config_get_raid_pd_pg0(struct mpr_softc *sc,
868      Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
869      u32 page_address);
870  int mpr_config_get_man_pg11(struct mpr_softc *sc, Mpi2ConfigReply_t *mpi_reply,
871      Mpi2ManufacturingPage11_t *config_page);
872  void mprsas_ir_shutdown(struct mpr_softc *sc, int howto);
873  
874  int mpr_reinit(struct mpr_softc *sc);
875  void mprsas_handle_reinit(struct mpr_softc *sc);
876  
877  void mpr_base_static_config_pages(struct mpr_softc *sc);
878  
879  int mpr_mapping_initialize(struct mpr_softc *);
880  void mpr_mapping_topology_change_event(struct mpr_softc *,
881      Mpi2EventDataSasTopologyChangeList_t *);
882  void mpr_mapping_pcie_topology_change_event(struct mpr_softc *sc,
883      Mpi26EventDataPCIeTopologyChangeList_t *event_data);
884  void mpr_mapping_free_memory(struct mpr_softc *sc);
885  int mpr_config_set_dpm_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
886      Mpi2DriverMappingPage0_t *, u16 );
887  void mpr_mapping_exit(struct mpr_softc *);
888  void mpr_mapping_check_devices(void *);
889  int mpr_mapping_allocate_memory(struct mpr_softc *sc);
890  unsigned int mpr_mapping_get_tid(struct mpr_softc *, uint64_t , u16);
891  unsigned int mpr_mapping_get_tid_from_handle(struct mpr_softc *sc,
892      u16 handle);
893  unsigned int mpr_mapping_get_raid_tid(struct mpr_softc *sc, u64 wwid,
894      u16 volHandle);
895  unsigned int mpr_mapping_get_raid_tid_from_handle(struct mpr_softc *sc,
896      u16 volHandle);
897  void mpr_mapping_enclosure_dev_status_change_event(struct mpr_softc *,
898      Mpi2EventDataSasEnclDevStatusChange_t *event_data);
899  void mpr_mapping_ir_config_change_event(struct mpr_softc *sc,
900      Mpi2EventDataIrConfigChangeList_t *event_data);
901  
902  void mprsas_evt_handler(struct mpr_softc *sc, uintptr_t data,
903      MPI2_EVENT_NOTIFICATION_REPLY *event);
904  void mprsas_prepare_remove(struct mprsas_softc *sassc, uint16_t handle);
905  void mprsas_prepare_volume_remove(struct mprsas_softc *sassc, uint16_t handle);
906  int mprsas_startup(struct mpr_softc *sc);
907  struct mprsas_target * mprsas_find_target_by_handle(struct mprsas_softc *, int,
908      uint16_t);
909  void mprsas_realloc_targets(struct mpr_softc *sc, int maxtargets);
910  struct mpr_command * mprsas_alloc_tm(struct mpr_softc *sc);
911  void mprsas_free_tm(struct mpr_softc *sc, struct mpr_command *tm);
912  void mprsas_release_simq_reinit(struct mprsas_softc *sassc);
913  int mprsas_send_reset(struct mpr_softc *sc, struct mpr_command *tm,
914      uint8_t type);
915  
916  SYSCTL_DECL(_hw_mpr);
917  
918  /* Compatibility shims for different OS versions */
919  #if defined(CAM_PRIORITY_XPT)
920  #define MPR_PRIORITY_XPT	CAM_PRIORITY_XPT
921  #else
922  #define MPR_PRIORITY_XPT	5
923  #endif
924  
925  /* Definitions for SCSI unmap translation to NVMe DSM command */
926  
927  /* UNMAP block descriptor structure */
928  struct unmap_blk_desc {
929  	uint64_t slba;
930  	uint32_t nlb;
931  	uint32_t resv;
932  };
933  
934  /* UNMAP command's data */
935  struct unmap_parm_list {
936  	uint16_t unmap_data_len;
937  	uint16_t unmap_blk_desc_data_len;
938  	uint32_t resv;
939  	struct unmap_blk_desc desc[0];
940  };
941  
942  /* SCSI ADDITIONAL SENSE Codes */
943  #define FIXED_SENSE_DATA                                0x70
944  #define SCSI_ASC_NO_SENSE                               0x00
945  #define SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT             0x03
946  #define SCSI_ASC_LUN_NOT_READY                          0x04
947  #define SCSI_ASC_WARNING                                0x0B
948  #define SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED           0x10
949  #define SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED          0x10
950  #define SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED          0x10
951  #define SCSI_ASC_UNRECOVERED_READ_ERROR                 0x11
952  #define SCSI_ASC_MISCOMPARE_DURING_VERIFY               0x1D
953  #define SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID           0x20
954  #define SCSI_ASC_ILLEGAL_COMMAND                        0x20
955  #define SCSI_ASC_ILLEGAL_BLOCK                          0x21
956  #define SCSI_ASC_INVALID_CDB                            0x24
957  #define SCSI_ASC_INVALID_LUN                            0x25
958  #define SCSI_ASC_INVALID_PARAMETER                      0x26
959  #define SCSI_ASC_FORMAT_COMMAND_FAILED                  0x31
960  #define SCSI_ASC_INTERNAL_TARGET_FAILURE                0x44
961  
962  /* SCSI ADDITIONAL SENSE Code Qualifiers */
963  #define SCSI_ASCQ_CAUSE_NOT_REPORTABLE                  0x00
964  #define SCSI_ASCQ_FORMAT_COMMAND_FAILED                 0x01
965  #define SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED          0x01
966  #define SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED         0x02
967  #define SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED         0x03
968  #define SCSI_ASCQ_FORMAT_IN_PROGRESS                    0x04
969  #define SCSI_ASCQ_POWER_LOSS_EXPECTED                   0x08
970  #define SCSI_ASCQ_INVALID_LUN_ID                        0x09
971  
972  #endif
973