1 /*- 2 * Copyright (c) 2009 Yahoo! Inc. 3 * Copyright (c) 2011-2015 LSI Corp. 4 * Copyright (c) 2013-2016 Avago Technologies 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 29 * 30 * $FreeBSD$ 31 */ 32 33 #ifndef _MPRVAR_H 34 #define _MPRVAR_H 35 36 #define MPR_DRIVER_VERSION "15.03.00.00-fbsd" 37 38 #define MPR_DB_MAX_WAIT 2500 39 40 #define MPR_REQ_FRAMES 1024 41 #define MPR_EVT_REPLY_FRAMES 32 42 #define MPR_REPLY_FRAMES MPR_REQ_FRAMES 43 #define MPR_CHAIN_FRAMES 2048 44 #define MPR_MAXIO_PAGES (-1) 45 #define MPR_SENSE_LEN SSD_FULL_SIZE 46 #define MPR_MSI_COUNT 1 47 #define MPR_SGE64_SIZE 12 48 #define MPR_SGE32_SIZE 8 49 #define MPR_SGC_SIZE 8 50 #define MPR_DEFAULT_CHAIN_SEG_SIZE 8 51 #define MPR_MAX_CHAIN_ELEMENT_SIZE 16 52 53 /* 54 * PCIe NVMe Specific defines 55 */ 56 //SLM-for now just use the same value as a SAS disk 57 #define NVME_QDEPTH MPR_REQ_FRAMES 58 #define PRP_ENTRY_SIZE 8 59 #define NVME_CMD_PRP1_OFFSET 24 /* PRP1 offset in NVMe cmd */ 60 #define NVME_CMD_PRP2_OFFSET 32 /* PRP2 offset in NVMe cmd */ 61 #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */ 62 #define HOST_PAGE_SIZE_4K 12 63 64 #define MPR_FUNCTRACE(sc) \ 65 mpr_dprint((sc), MPR_TRACE, "%s\n", __func__) 66 67 #define CAN_SLEEP 1 68 #define NO_SLEEP 0 69 70 #define MPR_PERIODIC_DELAY 1 /* 1 second heartbeat/watchdog check */ 71 #define MPR_ATA_ID_TIMEOUT 5 /* 5 second timeout for SATA ID cmd */ 72 #define MPR_MISSING_CHECK_DELAY 10 /* 10 seconds between missing check */ 73 74 #define IFAULT_IOP_OVER_TEMP_THRESHOLD_EXCEEDED 0x2810 75 76 #define MPR_SCSI_RI_INVALID_FRAME (0x00000002) 77 #define MPR_STRING_LENGTH 64 78 79 #define DEFAULT_SPINUP_WAIT 3 /* seconds to wait for spinup */ 80 81 #include <sys/endian.h> 82 83 /* 84 * host mapping related macro definitions 85 */ 86 #define MPR_MAPTABLE_BAD_IDX 0xFFFFFFFF 87 #define MPR_DPM_BAD_IDX 0xFFFF 88 #define MPR_ENCTABLE_BAD_IDX 0xFF 89 #define MPR_MAX_MISSING_COUNT 0x0F 90 #define MPR_DEV_RESERVED 0x20000000 91 #define MPR_MAP_IN_USE 0x10000000 92 #define MPR_MAP_BAD_ID 0xFFFFFFFF 93 94 typedef uint8_t u8; 95 typedef uint16_t u16; 96 typedef uint32_t u32; 97 typedef uint64_t u64; 98 99 /** 100 * struct dev_mapping_table - device mapping information 101 * @physical_id: SAS address for drives or WWID for RAID volumes 102 * @device_info: bitfield provides detailed info about the device 103 * @phy_bits: bitfields indicating controller phys 104 * @dpm_entry_num: index of this device in device persistent map table 105 * @dev_handle: device handle for the device pointed by this entry 106 * @id: target id 107 * @missing_count: number of times the device not detected by driver 108 * @hide_flag: Hide this physical disk/not (foreign configuration) 109 * @init_complete: Whether the start of the day checks completed or not 110 * @TLR_bits: Turn TLR support on or off 111 */ 112 struct dev_mapping_table { 113 u64 physical_id; 114 u32 device_info; 115 u32 phy_bits; 116 u16 dpm_entry_num; 117 u16 dev_handle; 118 u16 reserved1; 119 u16 id; 120 u8 missing_count; 121 u8 init_complete; 122 u8 TLR_bits; 123 u8 reserved2; 124 }; 125 126 /** 127 * struct enc_mapping_table - mapping information about an enclosure 128 * @enclosure_id: Logical ID of this enclosure 129 * @start_index: index to the entry in dev_mapping_table 130 * @phy_bits: bitfields indicating controller phys 131 * @dpm_entry_num: index of this enclosure in device persistent map table 132 * @enc_handle: device handle for the enclosure pointed by this entry 133 * @num_slots: number of slots in the enclosure 134 * @start_slot: Starting slot id 135 * @missing_count: number of times the device not detected by driver 136 * @removal_flag: used to mark the device for removal 137 * @skip_search: used as a flag to include/exclude enclosure for search 138 * @init_complete: Whether the start of the day checks completed or not 139 */ 140 struct enc_mapping_table { 141 u64 enclosure_id; 142 u32 start_index; 143 u32 phy_bits; 144 u16 dpm_entry_num; 145 u16 enc_handle; 146 u16 num_slots; 147 u16 start_slot; 148 u8 missing_count; 149 u8 removal_flag; 150 u8 skip_search; 151 u8 init_complete; 152 }; 153 154 /** 155 * struct map_removal_table - entries to be removed from mapping table 156 * @dpm_entry_num: index of this device in device persistent map table 157 * @dev_handle: device handle for the device pointed by this entry 158 */ 159 struct map_removal_table{ 160 u16 dpm_entry_num; 161 u16 dev_handle; 162 }; 163 164 typedef struct mpr_fw_diagnostic_buffer { 165 size_t size; 166 uint8_t extended_type; 167 uint8_t buffer_type; 168 uint8_t force_release; 169 uint32_t product_specific[23]; 170 uint8_t immediate; 171 uint8_t enabled; 172 uint8_t valid_data; 173 uint8_t owned_by_firmware; 174 uint32_t unique_id; 175 } mpr_fw_diagnostic_buffer_t; 176 177 struct mpr_softc; 178 struct mpr_command; 179 struct mprsas_softc; 180 union ccb; 181 struct mprsas_target; 182 struct mpr_column_map; 183 184 MALLOC_DECLARE(M_MPR); 185 186 typedef void mpr_evt_callback_t(struct mpr_softc *, uintptr_t, 187 MPI2_EVENT_NOTIFICATION_REPLY *reply); 188 typedef void mpr_command_callback_t(struct mpr_softc *, struct mpr_command *cm); 189 190 struct mpr_chain { 191 TAILQ_ENTRY(mpr_chain) chain_link; 192 void *chain; 193 uint64_t chain_busaddr; 194 }; 195 196 struct mpr_prp_page { 197 TAILQ_ENTRY(mpr_prp_page) prp_page_link; 198 uint64_t *prp_page; 199 uint64_t prp_page_busaddr; 200 }; 201 202 /* 203 * This needs to be at least 2 to support SMP passthrough. 204 */ 205 #define MPR_IOVEC_COUNT 2 206 207 struct mpr_command { 208 TAILQ_ENTRY(mpr_command) cm_link; 209 TAILQ_ENTRY(mpr_command) cm_recovery; 210 struct mpr_softc *cm_sc; 211 union ccb *cm_ccb; 212 void *cm_data; 213 u_int cm_length; 214 u_int cm_out_len; 215 struct uio cm_uio; 216 struct iovec cm_iovec[MPR_IOVEC_COUNT]; 217 u_int cm_max_segs; 218 u_int cm_sglsize; 219 void *cm_sge; 220 uint8_t *cm_req; 221 uint8_t *cm_reply; 222 uint32_t cm_reply_data; 223 mpr_command_callback_t *cm_complete; 224 void *cm_complete_data; 225 struct mprsas_target *cm_targ; 226 MPI2_REQUEST_DESCRIPTOR_UNION cm_desc; 227 u_int cm_lun; 228 u_int cm_flags; 229 #define MPR_CM_FLAGS_POLLED (1 << 0) 230 #define MPR_CM_FLAGS_COMPLETE (1 << 1) 231 #define MPR_CM_FLAGS_SGE_SIMPLE (1 << 2) 232 #define MPR_CM_FLAGS_DATAOUT (1 << 3) 233 #define MPR_CM_FLAGS_DATAIN (1 << 4) 234 #define MPR_CM_FLAGS_WAKEUP (1 << 5) 235 #define MPR_CM_FLAGS_USE_UIO (1 << 6) 236 #define MPR_CM_FLAGS_SMP_PASS (1 << 7) 237 #define MPR_CM_FLAGS_CHAIN_FAILED (1 << 8) 238 #define MPR_CM_FLAGS_ERROR_MASK MPR_CM_FLAGS_CHAIN_FAILED 239 #define MPR_CM_FLAGS_USE_CCB (1 << 9) 240 #define MPR_CM_FLAGS_SATA_ID_TIMEOUT (1 << 10) 241 u_int cm_state; 242 #define MPR_CM_STATE_FREE 0 243 #define MPR_CM_STATE_BUSY 1 244 #define MPR_CM_STATE_TIMEDOUT 2 245 bus_dmamap_t cm_dmamap; 246 struct scsi_sense_data *cm_sense; 247 uint64_t *nvme_error_response; 248 TAILQ_HEAD(, mpr_chain) cm_chain_list; 249 TAILQ_HEAD(, mpr_prp_page) cm_prp_page_list; 250 uint32_t cm_req_busaddr; 251 bus_addr_t cm_sense_busaddr; 252 struct callout cm_callout; 253 }; 254 255 struct mpr_column_map { 256 uint16_t dev_handle; 257 uint8_t phys_disk_num; 258 }; 259 260 struct mpr_event_handle { 261 TAILQ_ENTRY(mpr_event_handle) eh_list; 262 mpr_evt_callback_t *callback; 263 void *data; 264 uint8_t mask[16]; 265 }; 266 267 struct mpr_softc { 268 device_t mpr_dev; 269 struct cdev *mpr_cdev; 270 u_int mpr_flags; 271 #define MPR_FLAGS_INTX (1 << 0) 272 #define MPR_FLAGS_MSI (1 << 1) 273 #define MPR_FLAGS_BUSY (1 << 2) 274 #define MPR_FLAGS_SHUTDOWN (1 << 3) 275 #define MPR_FLAGS_DIAGRESET (1 << 4) 276 #define MPR_FLAGS_ATTACH_DONE (1 << 5) 277 #define MPR_FLAGS_GEN35_IOC (1 << 6) 278 u_int mpr_debug; 279 u_int disable_msix; 280 u_int disable_msi; 281 u_int atomic_desc_capable; 282 int tm_cmds_active; 283 int io_cmds_active; 284 int io_cmds_highwater; 285 int chain_free; 286 int max_chains; 287 int max_io_pages; 288 u_int maxio; 289 int chain_free_lowwater; 290 uint32_t chain_frame_size; 291 uint16_t chain_seg_size; 292 int prp_buffer_size; 293 int prp_pages_free; 294 int prp_pages_free_lowwater; 295 u_int enable_ssu; 296 int spinup_wait_time; 297 int use_phynum; 298 uint64_t chain_alloc_fail; 299 uint64_t prp_page_alloc_fail; 300 struct sysctl_ctx_list sysctl_ctx; 301 struct sysctl_oid *sysctl_tree; 302 char fw_version[16]; 303 struct mpr_command *commands; 304 struct mpr_chain *chains; 305 struct mpr_prp_page *prps; 306 struct callout periodic; 307 struct callout device_check_callout; 308 309 struct mprsas_softc *sassc; 310 char tmp_string[MPR_STRING_LENGTH]; 311 TAILQ_HEAD(, mpr_command) req_list; 312 TAILQ_HEAD(, mpr_command) high_priority_req_list; 313 TAILQ_HEAD(, mpr_chain) chain_list; 314 TAILQ_HEAD(, mpr_prp_page) prp_page_list; 315 TAILQ_HEAD(, mpr_command) tm_list; 316 int replypostindex; 317 int replyfreeindex; 318 319 struct resource *mpr_regs_resource; 320 bus_space_handle_t mpr_bhandle; 321 bus_space_tag_t mpr_btag; 322 int mpr_regs_rid; 323 324 bus_dma_tag_t mpr_parent_dmat; 325 bus_dma_tag_t buffer_dmat; 326 327 MPI2_IOC_FACTS_REPLY *facts; 328 int num_reqs; 329 int num_replies; 330 int fqdepth; /* Free queue */ 331 int pqdepth; /* Post queue */ 332 333 uint8_t event_mask[16]; 334 TAILQ_HEAD(, mpr_event_handle) event_list; 335 struct mpr_event_handle *mpr_log_eh; 336 337 struct mtx mpr_mtx; 338 struct intr_config_hook mpr_ich; 339 struct resource *mpr_irq[MPR_MSI_COUNT]; 340 void *mpr_intrhand[MPR_MSI_COUNT]; 341 int mpr_irq_rid[MPR_MSI_COUNT]; 342 343 uint8_t *req_frames; 344 bus_addr_t req_busaddr; 345 bus_dma_tag_t req_dmat; 346 bus_dmamap_t req_map; 347 348 uint8_t *reply_frames; 349 bus_addr_t reply_busaddr; 350 bus_dma_tag_t reply_dmat; 351 bus_dmamap_t reply_map; 352 353 struct scsi_sense_data *sense_frames; 354 bus_addr_t sense_busaddr; 355 bus_dma_tag_t sense_dmat; 356 bus_dmamap_t sense_map; 357 358 uint8_t *chain_frames; 359 bus_addr_t chain_busaddr; 360 bus_dma_tag_t chain_dmat; 361 bus_dmamap_t chain_map; 362 363 uint8_t *prp_pages; 364 bus_addr_t prp_page_busaddr; 365 bus_dma_tag_t prp_page_dmat; 366 bus_dmamap_t prp_page_map; 367 368 MPI2_REPLY_DESCRIPTORS_UNION *post_queue; 369 bus_addr_t post_busaddr; 370 uint32_t *free_queue; 371 bus_addr_t free_busaddr; 372 bus_dma_tag_t queues_dmat; 373 bus_dmamap_t queues_map; 374 375 uint8_t *fw_diag_buffer; 376 bus_addr_t fw_diag_busaddr; 377 bus_dma_tag_t fw_diag_dmat; 378 bus_dmamap_t fw_diag_map; 379 380 uint8_t ir_firmware; 381 382 /* static config pages */ 383 Mpi2IOCPage8_t ioc_pg8; 384 Mpi2IOUnitPage8_t iounit_pg8; 385 386 /* host mapping support */ 387 struct dev_mapping_table *mapping_table; 388 struct enc_mapping_table *enclosure_table; 389 struct map_removal_table *removal_table; 390 uint8_t *dpm_entry_used; 391 uint8_t *dpm_flush_entry; 392 Mpi2DriverMappingPage0_t *dpm_pg0; 393 uint16_t max_devices; 394 uint16_t max_enclosures; 395 uint16_t max_expanders; 396 uint8_t max_volumes; 397 uint8_t num_enc_table_entries; 398 uint8_t num_rsvd_entries; 399 uint16_t max_dpm_entries; 400 uint8_t is_dpm_enable; 401 uint8_t track_mapping_events; 402 uint32_t pending_map_events; 403 404 /* FW diag Buffer List */ 405 mpr_fw_diagnostic_buffer_t 406 fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT]; 407 408 /* Event Recording IOCTL support */ 409 uint32_t events_to_record[4]; 410 mpr_event_entry_t recorded_events[MPR_EVENT_QUEUE_SIZE]; 411 uint8_t event_index; 412 uint32_t event_number; 413 414 /* EEDP and TLR support */ 415 uint8_t eedp_enabled; 416 uint8_t control_TLR; 417 418 /* Shutdown Event Handler */ 419 eventhandler_tag shutdown_eh; 420 421 /* To track topo events during reset */ 422 #define MPR_DIAG_RESET_TIMEOUT 300000 423 uint8_t wait_for_port_enable; 424 uint8_t port_enable_complete; 425 uint8_t msleep_fake_chan; 426 427 /* StartStopUnit command handling at shutdown */ 428 uint32_t SSU_refcount; 429 uint8_t SSU_started; 430 431 char exclude_ids[80]; 432 struct timeval lastfail; 433 }; 434 435 struct mpr_config_params { 436 MPI2_CONFIG_EXT_PAGE_HEADER_UNION hdr; 437 u_int action; 438 u_int page_address; /* Attributes, not a phys address */ 439 u_int status; 440 void *buffer; 441 u_int length; 442 int timeout; 443 void (*callback)(struct mpr_softc *, struct mpr_config_params *); 444 void *cbdata; 445 }; 446 447 struct scsi_read_capacity_eedp 448 { 449 uint8_t addr[8]; 450 uint8_t length[4]; 451 uint8_t protect; 452 }; 453 454 static __inline uint32_t 455 mpr_regread(struct mpr_softc *sc, uint32_t offset) 456 { 457 return (bus_space_read_4(sc->mpr_btag, sc->mpr_bhandle, offset)); 458 } 459 460 static __inline void 461 mpr_regwrite(struct mpr_softc *sc, uint32_t offset, uint32_t val) 462 { 463 bus_space_write_4(sc->mpr_btag, sc->mpr_bhandle, offset, val); 464 } 465 466 /* free_queue must have Little Endian address 467 * TODO- cm_reply_data is unwanted. We can remove it. 468 * */ 469 static __inline void 470 mpr_free_reply(struct mpr_softc *sc, uint32_t busaddr) 471 { 472 if (++sc->replyfreeindex >= sc->fqdepth) 473 sc->replyfreeindex = 0; 474 sc->free_queue[sc->replyfreeindex] = htole32(busaddr); 475 mpr_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); 476 } 477 478 static __inline struct mpr_chain * 479 mpr_alloc_chain(struct mpr_softc *sc) 480 { 481 struct mpr_chain *chain; 482 483 if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) { 484 TAILQ_REMOVE(&sc->chain_list, chain, chain_link); 485 sc->chain_free--; 486 if (sc->chain_free < sc->chain_free_lowwater) 487 sc->chain_free_lowwater = sc->chain_free; 488 } else 489 sc->chain_alloc_fail++; 490 return (chain); 491 } 492 493 static __inline void 494 mpr_free_chain(struct mpr_softc *sc, struct mpr_chain *chain) 495 { 496 #if 0 497 bzero(chain->chain, 128); 498 #endif 499 sc->chain_free++; 500 TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link); 501 } 502 503 static __inline struct mpr_prp_page * 504 mpr_alloc_prp_page(struct mpr_softc *sc) 505 { 506 struct mpr_prp_page *prp_page; 507 508 if ((prp_page = TAILQ_FIRST(&sc->prp_page_list)) != NULL) { 509 TAILQ_REMOVE(&sc->prp_page_list, prp_page, prp_page_link); 510 sc->prp_pages_free--; 511 if (sc->prp_pages_free < sc->prp_pages_free_lowwater) 512 sc->prp_pages_free_lowwater = sc->prp_pages_free; 513 } else 514 sc->prp_page_alloc_fail++; 515 return (prp_page); 516 } 517 518 static __inline void 519 mpr_free_prp_page(struct mpr_softc *sc, struct mpr_prp_page *prp_page) 520 { 521 sc->prp_pages_free++; 522 TAILQ_INSERT_TAIL(&sc->prp_page_list, prp_page, prp_page_link); 523 } 524 525 static __inline void 526 mpr_free_command(struct mpr_softc *sc, struct mpr_command *cm) 527 { 528 struct mpr_chain *chain, *chain_temp; 529 struct mpr_prp_page *prp_page, *prp_page_temp; 530 531 if (cm->cm_reply != NULL) 532 mpr_free_reply(sc, cm->cm_reply_data); 533 cm->cm_reply = NULL; 534 cm->cm_flags = 0; 535 cm->cm_complete = NULL; 536 cm->cm_complete_data = NULL; 537 cm->cm_ccb = NULL; 538 cm->cm_targ = NULL; 539 cm->cm_max_segs = 0; 540 cm->cm_lun = 0; 541 cm->cm_state = MPR_CM_STATE_FREE; 542 cm->cm_data = NULL; 543 cm->cm_length = 0; 544 cm->cm_out_len = 0; 545 cm->cm_sglsize = 0; 546 cm->cm_sge = NULL; 547 548 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) { 549 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link); 550 mpr_free_chain(sc, chain); 551 } 552 TAILQ_FOREACH_SAFE(prp_page, &cm->cm_prp_page_list, prp_page_link, 553 prp_page_temp) { 554 TAILQ_REMOVE(&cm->cm_prp_page_list, prp_page, prp_page_link); 555 mpr_free_prp_page(sc, prp_page); 556 } 557 TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link); 558 } 559 560 static __inline struct mpr_command * 561 mpr_alloc_command(struct mpr_softc *sc) 562 { 563 struct mpr_command *cm; 564 565 cm = TAILQ_FIRST(&sc->req_list); 566 if (cm == NULL) 567 return (NULL); 568 569 TAILQ_REMOVE(&sc->req_list, cm, cm_link); 570 KASSERT(cm->cm_state == MPR_CM_STATE_FREE, ("mpr: Allocating busy " 571 "command\n")); 572 cm->cm_state = MPR_CM_STATE_BUSY; 573 return (cm); 574 } 575 576 static __inline void 577 mpr_free_high_priority_command(struct mpr_softc *sc, struct mpr_command *cm) 578 { 579 struct mpr_chain *chain, *chain_temp; 580 581 if (cm->cm_reply != NULL) 582 mpr_free_reply(sc, cm->cm_reply_data); 583 cm->cm_reply = NULL; 584 cm->cm_flags = 0; 585 cm->cm_complete = NULL; 586 cm->cm_complete_data = NULL; 587 cm->cm_ccb = NULL; 588 cm->cm_targ = NULL; 589 cm->cm_lun = 0; 590 cm->cm_state = MPR_CM_STATE_FREE; 591 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) { 592 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link); 593 mpr_free_chain(sc, chain); 594 } 595 TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link); 596 } 597 598 static __inline struct mpr_command * 599 mpr_alloc_high_priority_command(struct mpr_softc *sc) 600 { 601 struct mpr_command *cm; 602 603 cm = TAILQ_FIRST(&sc->high_priority_req_list); 604 if (cm == NULL) 605 return (NULL); 606 607 TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link); 608 KASSERT(cm->cm_state == MPR_CM_STATE_FREE, ("mpr: Allocating busy " 609 "command\n")); 610 cm->cm_state = MPR_CM_STATE_BUSY; 611 return (cm); 612 } 613 614 static __inline void 615 mpr_lock(struct mpr_softc *sc) 616 { 617 mtx_lock(&sc->mpr_mtx); 618 } 619 620 static __inline void 621 mpr_unlock(struct mpr_softc *sc) 622 { 623 mtx_unlock(&sc->mpr_mtx); 624 } 625 626 #define MPR_INFO (1 << 0) /* Basic info */ 627 #define MPR_FAULT (1 << 1) /* Hardware faults */ 628 #define MPR_EVENT (1 << 2) /* Event data from the controller */ 629 #define MPR_LOG (1 << 3) /* Log data from the controller */ 630 #define MPR_RECOVERY (1 << 4) /* Command error recovery tracing */ 631 #define MPR_ERROR (1 << 5) /* Parameter errors, programming bugs */ 632 #define MPR_INIT (1 << 6) /* Things related to system init */ 633 #define MPR_XINFO (1 << 7) /* More detailed/noisy info */ 634 #define MPR_USER (1 << 8) /* Trace user-generated commands */ 635 #define MPR_MAPPING (1 << 9) /* Trace device mappings */ 636 #define MPR_TRACE (1 << 10) /* Function-by-function trace */ 637 638 #define MPR_SSU_DISABLE_SSD_DISABLE_HDD 0 639 #define MPR_SSU_ENABLE_SSD_DISABLE_HDD 1 640 #define MPR_SSU_DISABLE_SSD_ENABLE_HDD 2 641 #define MPR_SSU_ENABLE_SSD_ENABLE_HDD 3 642 643 #define mpr_printf(sc, args...) \ 644 device_printf((sc)->mpr_dev, ##args) 645 646 #define mpr_print_field(sc, msg, args...) \ 647 printf("\t" msg, ##args) 648 649 #define mpr_vprintf(sc, args...) \ 650 do { \ 651 if (bootverbose) \ 652 mpr_printf(sc, ##args); \ 653 } while (0) 654 655 #define mpr_dprint(sc, level, msg, args...) \ 656 do { \ 657 if ((sc)->mpr_debug & (level)) \ 658 device_printf((sc)->mpr_dev, msg, ##args); \ 659 } while (0) 660 661 #define MPR_PRINTFIELD_START(sc, tag...) \ 662 mpr_printf((sc), ##tag); \ 663 mpr_print_field((sc), ":\n") 664 #define MPR_PRINTFIELD_END(sc, tag) \ 665 mpr_printf((sc), tag "\n") 666 #define MPR_PRINTFIELD(sc, facts, attr, fmt) \ 667 mpr_print_field((sc), #attr ": " #fmt "\n", (facts)->attr) 668 669 static __inline void 670 mpr_from_u64(uint64_t data, U64 *mpr) 671 { 672 (mpr)->High = htole32((uint32_t)((data) >> 32)); 673 (mpr)->Low = htole32((uint32_t)((data) & 0xffffffff)); 674 } 675 676 static __inline uint64_t 677 mpr_to_u64(U64 *data) 678 { 679 return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low)); 680 } 681 682 static __inline void 683 mpr_mask_intr(struct mpr_softc *sc) 684 { 685 uint32_t mask; 686 687 mask = mpr_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET); 688 mask |= MPI2_HIM_REPLY_INT_MASK; 689 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask); 690 } 691 692 static __inline void 693 mpr_unmask_intr(struct mpr_softc *sc) 694 { 695 uint32_t mask; 696 697 mask = mpr_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET); 698 mask &= ~MPI2_HIM_REPLY_INT_MASK; 699 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask); 700 } 701 702 int mpr_pci_setup_interrupts(struct mpr_softc *sc); 703 int mpr_pci_restore(struct mpr_softc *sc); 704 705 int mpr_attach(struct mpr_softc *sc); 706 int mpr_free(struct mpr_softc *sc); 707 void mpr_intr(void *); 708 void mpr_intr_msi(void *); 709 void mpr_intr_locked(void *); 710 int mpr_register_events(struct mpr_softc *, uint8_t *, mpr_evt_callback_t *, 711 void *, struct mpr_event_handle **); 712 int mpr_restart(struct mpr_softc *); 713 int mpr_update_events(struct mpr_softc *, struct mpr_event_handle *, uint8_t *); 714 int mpr_deregister_events(struct mpr_softc *, struct mpr_event_handle *); 715 void mpr_build_nvme_prp(struct mpr_softc *sc, struct mpr_command *cm, 716 Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request, void *data, 717 uint32_t data_in_sz, uint32_t data_out_sz); 718 int mpr_push_sge(struct mpr_command *, MPI2_SGE_SIMPLE64 *, size_t, int); 719 int mpr_push_ieee_sge(struct mpr_command *, void *, int); 720 int mpr_add_dmaseg(struct mpr_command *, vm_paddr_t, size_t, u_int, int); 721 int mpr_attach_sas(struct mpr_softc *sc); 722 int mpr_detach_sas(struct mpr_softc *sc); 723 int mpr_read_config_page(struct mpr_softc *, struct mpr_config_params *); 724 int mpr_write_config_page(struct mpr_softc *, struct mpr_config_params *); 725 void mpr_memaddr_cb(void *, bus_dma_segment_t *, int , int ); 726 void mpr_init_sge(struct mpr_command *cm, void *req, void *sge); 727 int mpr_attach_user(struct mpr_softc *); 728 void mpr_detach_user(struct mpr_softc *); 729 void mprsas_record_event(struct mpr_softc *sc, 730 MPI2_EVENT_NOTIFICATION_REPLY *event_reply); 731 732 int mpr_map_command(struct mpr_softc *sc, struct mpr_command *cm); 733 int mpr_wait_command(struct mpr_softc *sc, struct mpr_command *cm, int timeout, 734 int sleep_flag); 735 int mpr_request_polled(struct mpr_softc *sc, struct mpr_command *cm); 736 737 int mpr_config_get_bios_pg3(struct mpr_softc *sc, Mpi2ConfigReply_t 738 *mpi_reply, Mpi2BiosPage3_t *config_page); 739 int mpr_config_get_raid_volume_pg0(struct mpr_softc *sc, Mpi2ConfigReply_t 740 *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address); 741 int mpr_config_get_ioc_pg8(struct mpr_softc *sc, Mpi2ConfigReply_t *, 742 Mpi2IOCPage8_t *); 743 int mpr_config_get_iounit_pg8(struct mpr_softc *sc, 744 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage8_t *config_page); 745 int mpr_config_get_sas_device_pg0(struct mpr_softc *, Mpi2ConfigReply_t *, 746 Mpi2SasDevicePage0_t *, u32 , u16 ); 747 int mpr_config_get_pcie_device_pg0(struct mpr_softc *sc, Mpi2ConfigReply_t 748 *mpi_reply, Mpi26PCIeDevicePage0_t *config_page, u32 form, u16 handle); 749 int mpr_config_get_pcie_device_pg2(struct mpr_softc *sc, Mpi2ConfigReply_t 750 *mpi_reply, Mpi26PCIeDevicePage2_t *config_page, u32 form, u16 handle); 751 int mpr_config_get_dpm_pg0(struct mpr_softc *, Mpi2ConfigReply_t *, 752 Mpi2DriverMappingPage0_t *, u16 ); 753 int mpr_config_get_raid_volume_pg1(struct mpr_softc *sc, 754 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form, 755 u16 handle); 756 int mpr_config_get_volume_wwid(struct mpr_softc *sc, u16 volume_handle, 757 u64 *wwid); 758 int mpr_config_get_raid_pd_pg0(struct mpr_softc *sc, 759 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page, 760 u32 page_address); 761 void mprsas_ir_shutdown(struct mpr_softc *sc); 762 763 int mpr_reinit(struct mpr_softc *sc); 764 void mprsas_handle_reinit(struct mpr_softc *sc); 765 766 void mpr_base_static_config_pages(struct mpr_softc *sc); 767 768 int mpr_mapping_initialize(struct mpr_softc *); 769 void mpr_mapping_topology_change_event(struct mpr_softc *, 770 Mpi2EventDataSasTopologyChangeList_t *); 771 void mpr_mapping_pcie_topology_change_event(struct mpr_softc *sc, 772 Mpi26EventDataPCIeTopologyChangeList_t *event_data); 773 void mpr_mapping_free_memory(struct mpr_softc *sc); 774 int mpr_config_set_dpm_pg0(struct mpr_softc *, Mpi2ConfigReply_t *, 775 Mpi2DriverMappingPage0_t *, u16 ); 776 void mpr_mapping_exit(struct mpr_softc *); 777 void mpr_mapping_check_devices(void *); 778 int mpr_mapping_allocate_memory(struct mpr_softc *sc); 779 unsigned int mpr_mapping_get_tid(struct mpr_softc *, uint64_t , u16); 780 unsigned int mpr_mapping_get_tid_from_handle(struct mpr_softc *sc, 781 u16 handle); 782 unsigned int mpr_mapping_get_raid_tid(struct mpr_softc *sc, u64 wwid, 783 u16 volHandle); 784 unsigned int mpr_mapping_get_raid_tid_from_handle(struct mpr_softc *sc, 785 u16 volHandle); 786 void mpr_mapping_enclosure_dev_status_change_event(struct mpr_softc *, 787 Mpi2EventDataSasEnclDevStatusChange_t *event_data); 788 void mpr_mapping_ir_config_change_event(struct mpr_softc *sc, 789 Mpi2EventDataIrConfigChangeList_t *event_data); 790 791 void mprsas_evt_handler(struct mpr_softc *sc, uintptr_t data, 792 MPI2_EVENT_NOTIFICATION_REPLY *event); 793 void mprsas_prepare_remove(struct mprsas_softc *sassc, uint16_t handle); 794 void mprsas_prepare_volume_remove(struct mprsas_softc *sassc, uint16_t handle); 795 int mprsas_startup(struct mpr_softc *sc); 796 struct mprsas_target * mprsas_find_target_by_handle(struct mprsas_softc *, int, 797 uint16_t); 798 void mprsas_realloc_targets(struct mpr_softc *sc, int maxtargets); 799 struct mpr_command * mprsas_alloc_tm(struct mpr_softc *sc); 800 void mprsas_free_tm(struct mpr_softc *sc, struct mpr_command *tm); 801 void mprsas_release_simq_reinit(struct mprsas_softc *sassc); 802 int mprsas_send_reset(struct mpr_softc *sc, struct mpr_command *tm, 803 uint8_t type); 804 805 SYSCTL_DECL(_hw_mpr); 806 807 /* Compatibility shims for different OS versions */ 808 #if __FreeBSD_version >= 800001 809 #define mpr_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \ 810 kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) 811 #define mpr_kproc_exit(arg) kproc_exit(arg) 812 #else 813 #define mpr_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \ 814 kthread_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) 815 #define mpr_kproc_exit(arg) kthread_exit(arg) 816 #endif 817 818 #if defined(CAM_PRIORITY_XPT) 819 #define MPR_PRIORITY_XPT CAM_PRIORITY_XPT 820 #else 821 #define MPR_PRIORITY_XPT 5 822 #endif 823 824 #if __FreeBSD_version < 800107 825 // Prior to FreeBSD-8.0 scp3_flags was not defined. 826 #define spc3_flags reserved 827 828 #define SPC3_SID_PROTECT 0x01 829 #define SPC3_SID_3PC 0x08 830 #define SPC3_SID_TPGS_MASK 0x30 831 #define SPC3_SID_TPGS_IMPLICIT 0x10 832 #define SPC3_SID_TPGS_EXPLICIT 0x20 833 #define SPC3_SID_ACC 0x40 834 #define SPC3_SID_SCCS 0x80 835 836 #define CAM_PRIORITY_NORMAL CAM_PRIORITY_NONE 837 #endif 838 839 /* Definitions for SCSI unmap translation to NVMe DSM command */ 840 841 /* UNMAP block descriptor structure */ 842 struct unmap_blk_desc { 843 uint64_t slba; 844 uint32_t nlb; 845 uint32_t resv; 846 }; 847 848 /* UNMAP command's data */ 849 struct unmap_parm_list { 850 uint16_t unmap_data_len; 851 uint16_t unmap_blk_desc_data_len; 852 uint32_t resv; 853 struct unmap_blk_desc desc[0]; 854 }; 855 856 /* SCSI ADDITIONAL SENSE Codes */ 857 #define FIXED_SENSE_DATA 0x70 858 #define SCSI_ASC_NO_SENSE 0x00 859 #define SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT 0x03 860 #define SCSI_ASC_LUN_NOT_READY 0x04 861 #define SCSI_ASC_WARNING 0x0B 862 #define SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED 0x10 863 #define SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED 0x10 864 #define SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED 0x10 865 #define SCSI_ASC_UNRECOVERED_READ_ERROR 0x11 866 #define SCSI_ASC_MISCOMPARE_DURING_VERIFY 0x1D 867 #define SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID 0x20 868 #define SCSI_ASC_ILLEGAL_COMMAND 0x20 869 #define SCSI_ASC_ILLEGAL_BLOCK 0x21 870 #define SCSI_ASC_INVALID_CDB 0x24 871 #define SCSI_ASC_INVALID_LUN 0x25 872 #define SCSI_ASC_INVALID_PARAMETER 0x26 873 #define SCSI_ASC_FORMAT_COMMAND_FAILED 0x31 874 #define SCSI_ASC_INTERNAL_TARGET_FAILURE 0x44 875 876 /* SCSI ADDITIONAL SENSE Code Qualifiers */ 877 #define SCSI_ASCQ_CAUSE_NOT_REPORTABLE 0x00 878 #define SCSI_ASCQ_FORMAT_COMMAND_FAILED 0x01 879 #define SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED 0x01 880 #define SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED 0x02 881 #define SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED 0x03 882 #define SCSI_ASCQ_FORMAT_IN_PROGRESS 0x04 883 #define SCSI_ASCQ_POWER_LOSS_EXPECTED 0x08 884 #define SCSI_ASCQ_INVALID_LUN_ID 0x09 885 886 #endif 887 888