xref: /freebsd/sys/dev/mpr/mprvar.h (revision 1f4bcc459a76b7aa664f3fd557684cd0ba6da352)
1 /*-
2  * Copyright (c) 2009 Yahoo! Inc.
3  * Copyright (c) 2011-2015 LSI Corp.
4  * Copyright (c) 2013-2015 Avago Technologies
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
29  *
30  * $FreeBSD$
31  */
32 
33 #ifndef _MPRVAR_H
34 #define _MPRVAR_H
35 
36 #define MPR_DRIVER_VERSION	"09.255.01.00-fbsd"
37 
38 #define MPR_DB_MAX_WAIT		2500
39 
40 #define MPR_REQ_FRAMES		1024
41 #define MPR_EVT_REPLY_FRAMES	32
42 #define MPR_REPLY_FRAMES	MPR_REQ_FRAMES
43 #define MPR_CHAIN_FRAMES	2048
44 #define MPR_SENSE_LEN		SSD_FULL_SIZE
45 #define MPR_MSI_COUNT		1
46 #define MPR_SGE64_SIZE		12
47 #define MPR_SGE32_SIZE		8
48 #define MPR_SGC_SIZE		8
49 
50 #define MPR_FUNCTRACE(sc)			\
51 	mpr_dprint((sc), MPR_TRACE, "%s\n", __func__)
52 
53 #define	CAN_SLEEP			1
54 #define	NO_SLEEP			0
55 
56 #define MPR_PERIODIC_DELAY	1	/* 1 second heartbeat/watchdog check */
57 #define MPR_ATA_ID_TIMEOUT	5	/* 5 second timeout for SATA ID cmd */
58 
59 #define	IFAULT_IOP_OVER_TEMP_THRESHOLD_EXCEEDED	0x2810
60 
61 #define MPR_SCSI_RI_INVALID_FRAME	(0x00000002)
62 #define MPR_STRING_LENGTH               64
63 
64 #define DEFAULT_SPINUP_WAIT	3	/* seconds to wait for spinup */
65 
66 #include <sys/endian.h>
67 
68 /*
69  * host mapping related macro definitions
70  */
71 #define MPR_MAPTABLE_BAD_IDX	0xFFFFFFFF
72 #define MPR_DPM_BAD_IDX		0xFFFF
73 #define MPR_ENCTABLE_BAD_IDX	0xFF
74 #define MPR_MAX_MISSING_COUNT	0x0F
75 #define MPR_DEV_RESERVED	0x20000000
76 #define MPR_MAP_IN_USE		0x10000000
77 #define MPR_RAID_CHANNEL	1
78 #define MPR_MAP_BAD_ID		0xFFFFFFFF
79 
80 typedef uint8_t u8;
81 typedef uint16_t u16;
82 typedef uint32_t u32;
83 typedef uint64_t u64;
84 
85 /**
86  * struct dev_mapping_table - device mapping information
87  * @physical_id: SAS address for drives or WWID for RAID volumes
88  * @device_info: bitfield provides detailed info about the device
89  * @phy_bits: bitfields indicating controller phys
90  * @dpm_entry_num: index of this device in device persistent map table
91  * @dev_handle: device handle for the device pointed by this entry
92  * @channel: target channel
93  * @id: target id
94  * @missing_count: number of times the device not detected by driver
95  * @hide_flag: Hide this physical disk/not (foreign configuration)
96  * @init_complete: Whether the start of the day checks completed or not
97  * @TLR_bits: Turn TLR support on or off
98  */
99 struct dev_mapping_table {
100 	u64	physical_id;
101 	u32	device_info;
102 	u32	phy_bits;
103 	u16	dpm_entry_num;
104 	u16	dev_handle;
105 	u8	reserved1;
106 	u8	channel;
107 	u16	id;
108 	u8	missing_count;
109 	u8	init_complete;
110 	u8	TLR_bits;
111 	u8	reserved2;
112 };
113 
114 /**
115  * struct enc_mapping_table -  mapping information about an enclosure
116  * @enclosure_id: Logical ID of this enclosure
117  * @start_index: index to the entry in dev_mapping_table
118  * @phy_bits: bitfields indicating controller phys
119  * @dpm_entry_num: index of this enclosure in device persistent map table
120  * @enc_handle: device handle for the enclosure pointed by this entry
121  * @num_slots: number of slots in the enclosure
122  * @start_slot: Starting slot id
123  * @missing_count: number of times the device not detected by driver
124  * @removal_flag: used to mark the device for removal
125  * @skip_search: used as a flag to include/exclude enclosure for search
126  * @init_complete: Whether the start of the day checks completed or not
127  */
128 struct enc_mapping_table {
129 	u64	enclosure_id;
130 	u32	start_index;
131 	u32	phy_bits;
132 	u16	dpm_entry_num;
133 	u16	enc_handle;
134 	u16	num_slots;
135 	u16	start_slot;
136 	u8	missing_count;
137 	u8	removal_flag;
138 	u8	skip_search;
139 	u8	init_complete;
140 };
141 
142 /**
143  * struct map_removal_table - entries to be removed from mapping table
144  * @dpm_entry_num: index of this device in device persistent map table
145  * @dev_handle: device handle for the device pointed by this entry
146  */
147 struct map_removal_table{
148 	u16	dpm_entry_num;
149 	u16	dev_handle;
150 };
151 
152 typedef struct mpr_fw_diagnostic_buffer {
153 	size_t		size;
154 	uint8_t		extended_type;
155 	uint8_t		buffer_type;
156 	uint8_t		force_release;
157 	uint32_t	product_specific[23];
158 	uint8_t		immediate;
159 	uint8_t		enabled;
160 	uint8_t		valid_data;
161 	uint8_t		owned_by_firmware;
162 	uint32_t	unique_id;
163 } mpr_fw_diagnostic_buffer_t;
164 
165 struct mpr_softc;
166 struct mpr_command;
167 struct mprsas_softc;
168 union ccb;
169 struct mprsas_target;
170 struct mpr_column_map;
171 
172 MALLOC_DECLARE(M_MPR);
173 
174 typedef void mpr_evt_callback_t(struct mpr_softc *, uintptr_t,
175     MPI2_EVENT_NOTIFICATION_REPLY *reply);
176 typedef void mpr_command_callback_t(struct mpr_softc *, struct mpr_command *cm);
177 
178 struct mpr_chain {
179 	TAILQ_ENTRY(mpr_chain)		chain_link;
180 	void				*chain;
181 	uint64_t			chain_busaddr;
182 };
183 
184 /*
185  * This needs to be at least 2 to support SMP passthrough.
186  */
187 #define       MPR_IOVEC_COUNT 2
188 
189 struct mpr_command {
190 	TAILQ_ENTRY(mpr_command)	cm_link;
191 	TAILQ_ENTRY(mpr_command)	cm_recovery;
192 	struct mpr_softc		*cm_sc;
193 	union ccb			*cm_ccb;
194 	void				*cm_data;
195 	u_int				cm_length;
196 	u_int				cm_out_len;
197 	struct uio			cm_uio;
198 	struct iovec			cm_iovec[MPR_IOVEC_COUNT];
199 	u_int				cm_max_segs;
200 	u_int				cm_sglsize;
201 	void				*cm_sge;
202 	uint8_t				*cm_req;
203 	uint8_t				*cm_reply;
204 	uint32_t			cm_reply_data;
205 	mpr_command_callback_t		*cm_complete;
206 	void				*cm_complete_data;
207 	struct mprsas_target		*cm_targ;
208 	MPI2_REQUEST_DESCRIPTOR_UNION	cm_desc;
209 	u_int	                	cm_lun;
210 	u_int				cm_flags;
211 #define MPR_CM_FLAGS_POLLED		(1 << 0)
212 #define MPR_CM_FLAGS_COMPLETE		(1 << 1)
213 #define MPR_CM_FLAGS_SGE_SIMPLE		(1 << 2)
214 #define MPR_CM_FLAGS_DATAOUT		(1 << 3)
215 #define MPR_CM_FLAGS_DATAIN		(1 << 4)
216 #define MPR_CM_FLAGS_WAKEUP		(1 << 5)
217 #define MPR_CM_FLAGS_USE_UIO		(1 << 6)
218 #define MPR_CM_FLAGS_SMP_PASS		(1 << 7)
219 #define	MPR_CM_FLAGS_CHAIN_FAILED	(1 << 8)
220 #define	MPR_CM_FLAGS_ERROR_MASK		MPR_CM_FLAGS_CHAIN_FAILED
221 #define	MPR_CM_FLAGS_USE_CCB		(1 << 9)
222 #define	MPR_CM_FLAGS_SATA_ID_TIMEOUT	(1 << 10)
223 	u_int				cm_state;
224 #define MPR_CM_STATE_FREE		0
225 #define MPR_CM_STATE_BUSY		1
226 #define MPR_CM_STATE_TIMEDOUT		2
227 	bus_dmamap_t			cm_dmamap;
228 	struct scsi_sense_data		*cm_sense;
229 	TAILQ_HEAD(, mpr_chain)		cm_chain_list;
230 	uint32_t			cm_req_busaddr;
231 	uint32_t			cm_sense_busaddr;
232 	struct callout			cm_callout;
233 };
234 
235 struct mpr_column_map {
236 	uint16_t			dev_handle;
237 	uint8_t				phys_disk_num;
238 };
239 
240 struct mpr_event_handle {
241 	TAILQ_ENTRY(mpr_event_handle)	eh_list;
242 	mpr_evt_callback_t		*callback;
243 	void				*data;
244 	uint8_t				mask[16];
245 };
246 
247 struct mpr_softc {
248 	device_t			mpr_dev;
249 	struct cdev			*mpr_cdev;
250 	u_int				mpr_flags;
251 #define MPR_FLAGS_INTX		(1 << 0)
252 #define MPR_FLAGS_MSI		(1 << 1)
253 #define MPR_FLAGS_BUSY		(1 << 2)
254 #define MPR_FLAGS_SHUTDOWN	(1 << 3)
255 #define MPR_FLAGS_DIAGRESET	(1 << 4)
256 #define	MPR_FLAGS_ATTACH_DONE	(1 << 5)
257 	u_int				mpr_debug;
258 	u_int				disable_msix;
259 	u_int				disable_msi;
260 	int				tm_cmds_active;
261 	int				io_cmds_active;
262 	int				io_cmds_highwater;
263 	int				chain_free;
264 	int				max_chains;
265 	int				chain_free_lowwater;
266 	u_int				enable_ssu;
267 	int				spinup_wait_time;
268 	uint64_t			chain_alloc_fail;
269 	struct sysctl_ctx_list		sysctl_ctx;
270 	struct sysctl_oid		*sysctl_tree;
271 	char                            fw_version[16];
272 	struct mpr_command		*commands;
273 	struct mpr_chain		*chains;
274 	struct callout			periodic;
275 
276 	struct mprsas_softc		*sassc;
277 	char            tmp_string[MPR_STRING_LENGTH];
278 	TAILQ_HEAD(, mpr_command)	req_list;
279 	TAILQ_HEAD(, mpr_command)	high_priority_req_list;
280 	TAILQ_HEAD(, mpr_chain)		chain_list;
281 	TAILQ_HEAD(, mpr_command)	tm_list;
282 	int				replypostindex;
283 	int				replyfreeindex;
284 
285 	struct resource			*mpr_regs_resource;
286 	bus_space_handle_t		mpr_bhandle;
287 	bus_space_tag_t			mpr_btag;
288 	int				mpr_regs_rid;
289 
290 	bus_dma_tag_t			mpr_parent_dmat;
291 	bus_dma_tag_t			buffer_dmat;
292 
293 	MPI2_IOC_FACTS_REPLY		*facts;
294 	int				num_reqs;
295 	int				num_replies;
296 	int				fqdepth;	/* Free queue */
297 	int				pqdepth;	/* Post queue */
298 
299 	uint8_t				event_mask[16];
300 	TAILQ_HEAD(, mpr_event_handle)	event_list;
301 	struct mpr_event_handle		*mpr_log_eh;
302 
303 	struct mtx			mpr_mtx;
304 	struct intr_config_hook		mpr_ich;
305 	struct resource			*mpr_irq[MPR_MSI_COUNT];
306 	void				*mpr_intrhand[MPR_MSI_COUNT];
307 	int				mpr_irq_rid[MPR_MSI_COUNT];
308 
309 	uint8_t				*req_frames;
310 	bus_addr_t			req_busaddr;
311 	bus_dma_tag_t			req_dmat;
312 	bus_dmamap_t			req_map;
313 
314 	uint8_t				*reply_frames;
315 	bus_addr_t			reply_busaddr;
316 	bus_dma_tag_t			reply_dmat;
317 	bus_dmamap_t			reply_map;
318 
319 	struct scsi_sense_data		*sense_frames;
320 	bus_addr_t			sense_busaddr;
321 	bus_dma_tag_t			sense_dmat;
322 	bus_dmamap_t			sense_map;
323 
324 	uint8_t				*chain_frames;
325 	bus_addr_t			chain_busaddr;
326 	bus_dma_tag_t			chain_dmat;
327 	bus_dmamap_t			chain_map;
328 
329 	MPI2_REPLY_DESCRIPTORS_UNION	*post_queue;
330 	bus_addr_t			post_busaddr;
331 	uint32_t			*free_queue;
332 	bus_addr_t			free_busaddr;
333 	bus_dma_tag_t			queues_dmat;
334 	bus_dmamap_t			queues_map;
335 
336 	uint8_t				*fw_diag_buffer;
337 	bus_addr_t			fw_diag_busaddr;
338 	bus_dma_tag_t			fw_diag_dmat;
339 	bus_dmamap_t			fw_diag_map;
340 
341 	uint8_t				ir_firmware;
342 
343 	/* static config pages */
344 	Mpi2IOCPage8_t			ioc_pg8;
345 	Mpi2IOUnitPage8_t		iounit_pg8;
346 
347 	/* host mapping support */
348 	struct dev_mapping_table	*mapping_table;
349 	struct enc_mapping_table	*enclosure_table;
350 	struct map_removal_table	*removal_table;
351 	uint8_t				*dpm_entry_used;
352 	uint8_t				*dpm_flush_entry;
353 	Mpi2DriverMappingPage0_t	*dpm_pg0;
354 	uint16_t			max_devices;
355 	uint16_t			max_enclosures;
356 	uint16_t			max_expanders;
357 	uint8_t				max_volumes;
358 	uint8_t				num_enc_table_entries;
359 	uint8_t				num_rsvd_entries;
360 	uint8_t				num_channels;
361 	uint16_t			max_dpm_entries;
362 	uint8_t				is_dpm_enable;
363 	uint8_t				track_mapping_events;
364 	uint32_t			pending_map_events;
365 	uint8_t				mt_full_retry;
366 	uint8_t				mt_add_device_failed;
367 
368 	/* FW diag Buffer List */
369 	mpr_fw_diagnostic_buffer_t
370 				fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT];
371 
372 	/* Event Recording IOCTL support */
373 	uint32_t			events_to_record[4];
374 	mpr_event_entry_t		recorded_events[MPR_EVENT_QUEUE_SIZE];
375 	uint8_t				event_index;
376 	uint32_t			event_number;
377 
378 	/* EEDP and TLR support */
379 	uint8_t				eedp_enabled;
380 	uint8_t				control_TLR;
381 
382 	/* Shutdown Event Handler */
383 	eventhandler_tag		shutdown_eh;
384 
385 	/* To track topo events during reset */
386 #define	MPR_DIAG_RESET_TIMEOUT	300000
387 	uint8_t				wait_for_port_enable;
388 	uint8_t				port_enable_complete;
389 	uint8_t				msleep_fake_chan;
390 
391 	/* StartStopUnit command handling at shutdown */
392 	uint32_t			SSU_refcount;
393 	uint8_t				SSU_started;
394 
395 	char				exclude_ids[80];
396 	struct timeval			lastfail;
397 };
398 
399 struct mpr_config_params {
400 	MPI2_CONFIG_EXT_PAGE_HEADER_UNION	hdr;
401 	u_int		action;
402 	u_int		page_address;	/* Attributes, not a phys address */
403 	u_int		status;
404 	void		*buffer;
405 	u_int		length;
406 	int		timeout;
407 	void		(*callback)(struct mpr_softc *, struct mpr_config_params *);
408 	void		*cbdata;
409 };
410 
411 struct scsi_read_capacity_eedp
412 {
413 	uint8_t addr[8];
414 	uint8_t length[4];
415 	uint8_t protect;
416 };
417 
418 static __inline uint32_t
419 mpr_regread(struct mpr_softc *sc, uint32_t offset)
420 {
421 	return (bus_space_read_4(sc->mpr_btag, sc->mpr_bhandle, offset));
422 }
423 
424 static __inline void
425 mpr_regwrite(struct mpr_softc *sc, uint32_t offset, uint32_t val)
426 {
427 	bus_space_write_4(sc->mpr_btag, sc->mpr_bhandle, offset, val);
428 }
429 
430 /* free_queue must have Little Endian address
431  * TODO- cm_reply_data is unwanted. We can remove it.
432  * */
433 static __inline void
434 mpr_free_reply(struct mpr_softc *sc, uint32_t busaddr)
435 {
436 	if (++sc->replyfreeindex >= sc->fqdepth)
437 		sc->replyfreeindex = 0;
438 	sc->free_queue[sc->replyfreeindex] = htole32(busaddr);
439 	mpr_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
440 }
441 
442 static __inline struct mpr_chain *
443 mpr_alloc_chain(struct mpr_softc *sc)
444 {
445 	struct mpr_chain *chain;
446 
447 	if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) {
448 		TAILQ_REMOVE(&sc->chain_list, chain, chain_link);
449 		sc->chain_free--;
450 		if (sc->chain_free < sc->chain_free_lowwater)
451 			sc->chain_free_lowwater = sc->chain_free;
452 	} else
453 		sc->chain_alloc_fail++;
454 	return (chain);
455 }
456 
457 static __inline void
458 mpr_free_chain(struct mpr_softc *sc, struct mpr_chain *chain)
459 {
460 #if 0
461 	bzero(chain->chain, 128);
462 #endif
463 	sc->chain_free++;
464 	TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link);
465 }
466 
467 static __inline void
468 mpr_free_command(struct mpr_softc *sc, struct mpr_command *cm)
469 {
470 	struct mpr_chain *chain, *chain_temp;
471 
472 	if (cm->cm_reply != NULL)
473 		mpr_free_reply(sc, cm->cm_reply_data);
474 	cm->cm_reply = NULL;
475 	cm->cm_flags = 0;
476 	cm->cm_complete = NULL;
477 	cm->cm_complete_data = NULL;
478 	cm->cm_ccb = NULL;
479 	cm->cm_targ = NULL;
480 	cm->cm_max_segs = 0;
481 	cm->cm_lun = 0;
482 	cm->cm_state = MPR_CM_STATE_FREE;
483 	cm->cm_data = NULL;
484 	cm->cm_length = 0;
485 	cm->cm_out_len = 0;
486 	cm->cm_sglsize = 0;
487 	cm->cm_sge = NULL;
488 
489 	TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
490 		TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
491 		mpr_free_chain(sc, chain);
492 	}
493 	TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link);
494 }
495 
496 static __inline struct mpr_command *
497 mpr_alloc_command(struct mpr_softc *sc)
498 {
499 	struct mpr_command *cm;
500 
501 	cm = TAILQ_FIRST(&sc->req_list);
502 	if (cm == NULL)
503 		return (NULL);
504 
505 	TAILQ_REMOVE(&sc->req_list, cm, cm_link);
506 	KASSERT(cm->cm_state == MPR_CM_STATE_FREE, ("mpr: Allocating busy command\n"));
507 	cm->cm_state = MPR_CM_STATE_BUSY;
508 	return (cm);
509 }
510 
511 static __inline void
512 mpr_free_high_priority_command(struct mpr_softc *sc, struct mpr_command *cm)
513 {
514 	struct mpr_chain *chain, *chain_temp;
515 
516 	if (cm->cm_reply != NULL)
517 		mpr_free_reply(sc, cm->cm_reply_data);
518 	cm->cm_reply = NULL;
519 	cm->cm_flags = 0;
520 	cm->cm_complete = NULL;
521 	cm->cm_complete_data = NULL;
522 	cm->cm_ccb = NULL;
523 	cm->cm_targ = NULL;
524 	cm->cm_lun = 0;
525 	cm->cm_state = MPR_CM_STATE_FREE;
526 	TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
527 		TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
528 		mpr_free_chain(sc, chain);
529 	}
530 	TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link);
531 }
532 
533 static __inline struct mpr_command *
534 mpr_alloc_high_priority_command(struct mpr_softc *sc)
535 {
536 	struct mpr_command *cm;
537 
538 	cm = TAILQ_FIRST(&sc->high_priority_req_list);
539 	if (cm == NULL)
540 		return (NULL);
541 
542 	TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link);
543 	KASSERT(cm->cm_state == MPR_CM_STATE_FREE, ("mpr: Allocating busy command\n"));
544 	cm->cm_state = MPR_CM_STATE_BUSY;
545 	return (cm);
546 }
547 
548 static __inline void
549 mpr_lock(struct mpr_softc *sc)
550 {
551 	mtx_lock(&sc->mpr_mtx);
552 }
553 
554 static __inline void
555 mpr_unlock(struct mpr_softc *sc)
556 {
557 	mtx_unlock(&sc->mpr_mtx);
558 }
559 
560 #define MPR_INFO	(1 << 0)	/* Basic info */
561 #define MPR_FAULT	(1 << 1)	/* Hardware faults */
562 #define MPR_EVENT	(1 << 2)	/* Event data from the controller */
563 #define MPR_LOG		(1 << 3)	/* Log data from the controller */
564 #define MPR_RECOVERY	(1 << 4)	/* Command error recovery tracing */
565 #define MPR_ERROR	(1 << 5)	/* Parameter errors, programming bugs */
566 #define MPR_INIT	(1 << 6)	/* Things related to system init */
567 #define MPR_XINFO	(1 << 7)	/* More detailed/noisy info */
568 #define MPR_USER	(1 << 8)	/* Trace user-generated commands */
569 #define MPR_MAPPING	(1 << 9)	/* Trace device mappings */
570 #define MPR_TRACE	(1 << 10)	/* Function-by-function trace */
571 
572 #define	MPR_SSU_DISABLE_SSD_DISABLE_HDD	0
573 #define	MPR_SSU_ENABLE_SSD_DISABLE_HDD	1
574 #define	MPR_SSU_DISABLE_SSD_ENABLE_HDD	2
575 #define	MPR_SSU_ENABLE_SSD_ENABLE_HDD	3
576 
577 #define mpr_printf(sc, args...)				\
578 	device_printf((sc)->mpr_dev, ##args)
579 
580 #define mpr_vprintf(sc, args...)			\
581 do {							\
582 	if (bootverbose)				\
583 		mpr_printf(sc, ##args);			\
584 } while (0)
585 
586 #define mpr_dprint(sc, level, msg, args...)		\
587 do {							\
588 	if ((sc)->mpr_debug & level)			\
589 		device_printf((sc)->mpr_dev, msg, ##args);	\
590 } while (0)
591 
592 #define mpr_dprint_field(sc, level, msg, args...)		\
593 do {								\
594 	if ((sc)->mpr_debug & level)				\
595 		printf("\t" msg, ##args);			\
596 } while (0)
597 
598 #define MPR_PRINTFIELD_START(sc, tag...)	\
599 	mpr_dprint((sc), MPR_INFO, ##tag);	\
600 	mpr_dprint_field((sc), MPR_INFO, ":\n")
601 #define MPR_PRINTFIELD_END(sc, tag)		\
602 	mpr_dprint((sc), MPR_INFO, tag "\n")
603 #define MPR_PRINTFIELD(sc, facts, attr, fmt)	\
604 	mpr_dprint_field((sc), MPR_INFO, #attr ": " #fmt "\n", (facts)->attr)
605 
606 #define MPR_EVENTFIELD_START(sc, tag...)	\
607 	mpr_dprint((sc), MPR_EVENT, ##tag);	\
608 	mpr_dprint_field((sc), MPR_EVENT, ":\n")
609 #define MPR_EVENTFIELD(sc, facts, attr, fmt)	\
610 	mpr_dprint_field((sc), MPR_EVENT, #attr ": " #fmt "\n", (facts)->attr)
611 
612 static __inline void
613 mpr_from_u64(uint64_t data, U64 *mpr)
614 {
615 	(mpr)->High = htole32((uint32_t)((data) >> 32));
616 	(mpr)->Low = htole32((uint32_t)((data) & 0xffffffff));
617 }
618 
619 static __inline uint64_t
620 mpr_to_u64(U64 *data)
621 {
622 	return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low));
623 }
624 
625 static __inline void
626 mpr_mask_intr(struct mpr_softc *sc)
627 {
628 	uint32_t mask;
629 
630 	mask = mpr_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
631 	mask |= MPI2_HIM_REPLY_INT_MASK;
632 	mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
633 }
634 
635 static __inline void
636 mpr_unmask_intr(struct mpr_softc *sc)
637 {
638 	uint32_t mask;
639 
640 	mask = mpr_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
641 	mask &= ~MPI2_HIM_REPLY_INT_MASK;
642 	mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
643 }
644 
645 int mpr_pci_setup_interrupts(struct mpr_softc *sc);
646 int mpr_pci_restore(struct mpr_softc *sc);
647 
648 int mpr_attach(struct mpr_softc *sc);
649 int mpr_free(struct mpr_softc *sc);
650 void mpr_intr(void *);
651 void mpr_intr_msi(void *);
652 void mpr_intr_locked(void *);
653 int mpr_register_events(struct mpr_softc *, uint8_t *, mpr_evt_callback_t *,
654     void *, struct mpr_event_handle **);
655 int mpr_restart(struct mpr_softc *);
656 int mpr_update_events(struct mpr_softc *, struct mpr_event_handle *,
657     uint8_t *);
658 int mpr_deregister_events(struct mpr_softc *, struct mpr_event_handle *);
659 int mpr_push_sge(struct mpr_command *, MPI2_SGE_SIMPLE64 *, size_t, int);
660 int mpr_push_ieee_sge(struct mpr_command *, void *, int);
661 int mpr_add_dmaseg(struct mpr_command *, vm_paddr_t, size_t, u_int, int);
662 int mpr_attach_sas(struct mpr_softc *sc);
663 int mpr_detach_sas(struct mpr_softc *sc);
664 int mpr_read_config_page(struct mpr_softc *, struct mpr_config_params *);
665 int mpr_write_config_page(struct mpr_softc *, struct mpr_config_params *);
666 void mpr_memaddr_cb(void *, bus_dma_segment_t *, int , int );
667 void mpr_init_sge(struct mpr_command *cm, void *req, void *sge);
668 int mpr_attach_user(struct mpr_softc *);
669 void mpr_detach_user(struct mpr_softc *);
670 void mprsas_record_event(struct mpr_softc *sc,
671     MPI2_EVENT_NOTIFICATION_REPLY *event_reply);
672 
673 int mpr_map_command(struct mpr_softc *sc, struct mpr_command *cm);
674 int mpr_wait_command(struct mpr_softc *sc, struct mpr_command *cm,
675     int timeout, int sleep_flag);
676 int mpr_request_polled(struct mpr_softc *sc, struct mpr_command *cm);
677 
678 int mpr_config_get_bios_pg3(struct mpr_softc *sc, Mpi2ConfigReply_t
679     *mpi_reply, Mpi2BiosPage3_t *config_page);
680 int mpr_config_get_raid_volume_pg0(struct mpr_softc *sc, Mpi2ConfigReply_t
681     *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address);
682 int mpr_config_get_ioc_pg8(struct mpr_softc *sc, Mpi2ConfigReply_t *,
683     Mpi2IOCPage8_t *);
684 int mpr_config_get_iounit_pg8(struct mpr_softc *sc,
685     Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage8_t *config_page);
686 int mpr_config_get_sas_device_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
687     Mpi2SasDevicePage0_t *, u32 , u16 );
688 int mpr_config_get_dpm_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
689     Mpi2DriverMappingPage0_t *, u16 );
690 int mpr_config_get_raid_volume_pg1(struct mpr_softc *sc,
691     Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
692     u16 handle);
693 int mpr_config_get_volume_wwid(struct mpr_softc *sc, u16 volume_handle,
694     u64 *wwid);
695 int mpr_config_get_raid_pd_pg0(struct mpr_softc *sc,
696     Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
697     u32 page_address);
698 void mprsas_ir_shutdown(struct mpr_softc *sc);
699 
700 int mpr_reinit(struct mpr_softc *sc);
701 void mprsas_handle_reinit(struct mpr_softc *sc);
702 
703 void mpr_base_static_config_pages(struct mpr_softc *sc);
704 
705 int mpr_mapping_initialize(struct mpr_softc *);
706 void mpr_mapping_topology_change_event(struct mpr_softc *,
707     Mpi2EventDataSasTopologyChangeList_t *);
708 int mpr_mapping_is_reinit_required(struct mpr_softc *);
709 void mpr_mapping_free_memory(struct mpr_softc *sc);
710 int mpr_config_set_dpm_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
711     Mpi2DriverMappingPage0_t *, u16 );
712 void mpr_mapping_exit(struct mpr_softc *);
713 void mpr_mapping_check_devices(struct mpr_softc *, int);
714 int mpr_mapping_allocate_memory(struct mpr_softc *sc);
715 unsigned int mpr_mapping_get_sas_id(struct mpr_softc *, uint64_t , u16);
716 unsigned int mpr_mapping_get_sas_id_from_handle(struct mpr_softc *sc,
717     u16 handle);
718 unsigned int mpr_mapping_get_raid_id(struct mpr_softc *sc, u64 wwid,
719     u16 handle);
720 unsigned int mpr_mapping_get_raid_id_from_handle(struct mpr_softc *sc,
721     u16 volHandle);
722 void mpr_mapping_enclosure_dev_status_change_event(struct mpr_softc *,
723     Mpi2EventDataSasEnclDevStatusChange_t *event_data);
724 void mpr_mapping_ir_config_change_event(struct mpr_softc *sc,
725     Mpi2EventDataIrConfigChangeList_t *event_data);
726 
727 void mprsas_evt_handler(struct mpr_softc *sc, uintptr_t data,
728     MPI2_EVENT_NOTIFICATION_REPLY *event);
729 void mprsas_prepare_remove(struct mprsas_softc *sassc, uint16_t handle);
730 void mprsas_prepare_volume_remove(struct mprsas_softc *sassc,
731     uint16_t handle);
732 int mprsas_startup(struct mpr_softc *sc);
733 struct mprsas_target * mprsas_find_target_by_handle(struct mprsas_softc *,
734     int, uint16_t);
735 void mprsas_realloc_targets(struct mpr_softc *sc, int maxtargets);
736 struct mpr_command * mprsas_alloc_tm(struct mpr_softc *sc);
737 void mprsas_free_tm(struct mpr_softc *sc, struct mpr_command *tm);
738 void mprsas_release_simq_reinit(struct mprsas_softc *sassc);
739 int mprsas_send_reset(struct mpr_softc *sc, struct mpr_command *tm,
740     uint8_t type);
741 
742 SYSCTL_DECL(_hw_mpr);
743 
744 /* Compatibility shims for different OS versions */
745 #if __FreeBSD_version >= 800001
746 #define mpr_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
747     kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg)
748 #define mpr_kproc_exit(arg)	kproc_exit(arg)
749 #else
750 #define mpr_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
751     kthread_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg)
752 #define mpr_kproc_exit(arg)	kthread_exit(arg)
753 #endif
754 
755 #if defined(CAM_PRIORITY_XPT)
756 #define MPR_PRIORITY_XPT	CAM_PRIORITY_XPT
757 #else
758 #define MPR_PRIORITY_XPT	5
759 #endif
760 
761 #if __FreeBSD_version < 800107
762 // Prior to FreeBSD-8.0 scp3_flags was not defined.
763 #define spc3_flags reserved
764 
765 #define SPC3_SID_PROTECT    0x01
766 #define SPC3_SID_3PC        0x08
767 #define SPC3_SID_TPGS_MASK  0x30
768 #define SPC3_SID_TPGS_IMPLICIT  0x10
769 #define SPC3_SID_TPGS_EXPLICIT  0x20
770 #define SPC3_SID_ACC        0x40
771 #define SPC3_SID_SCCS       0x80
772 
773 #define CAM_PRIORITY_NORMAL CAM_PRIORITY_NONE
774 #endif
775 
776 #endif
777 
778