1 /*- 2 * Copyright (c) 2009 Yahoo! Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 /* PCI/PCI-X/PCIe bus interface for the Avago Tech (LSI) MPT3 controllers */ 31 32 /* TODO Move headers to mprvar */ 33 #include <sys/types.h> 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/module.h> 38 #include <sys/bus.h> 39 #include <sys/conf.h> 40 #include <sys/malloc.h> 41 #include <sys/sysctl.h> 42 #include <sys/uio.h> 43 44 #include <machine/bus.h> 45 #include <machine/resource.h> 46 #include <sys/rman.h> 47 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcivar.h> 50 #include <dev/pci/pci_private.h> 51 52 #include <dev/mpr/mpi/mpi2_type.h> 53 #include <dev/mpr/mpi/mpi2.h> 54 #include <dev/mpr/mpi/mpi2_ioc.h> 55 #include <dev/mpr/mpi/mpi2_cnfg.h> 56 #include <dev/mpr/mpi/mpi2_tool.h> 57 #include <dev/mpr/mpi/mpi2_pci.h> 58 59 #include <sys/queue.h> 60 #include <sys/kthread.h> 61 #include <dev/mpr/mpr_ioctl.h> 62 #include <dev/mpr/mprvar.h> 63 64 static int mpr_pci_probe(device_t); 65 static int mpr_pci_attach(device_t); 66 static int mpr_pci_detach(device_t); 67 static int mpr_pci_suspend(device_t); 68 static int mpr_pci_resume(device_t); 69 static void mpr_pci_free(struct mpr_softc *); 70 static int mpr_alloc_msix(struct mpr_softc *sc, int msgs); 71 static int mpr_alloc_msi(struct mpr_softc *sc, int msgs); 72 static int mpr_pci_alloc_interrupts(struct mpr_softc *sc); 73 74 static device_method_t mpr_methods[] = { 75 DEVMETHOD(device_probe, mpr_pci_probe), 76 DEVMETHOD(device_attach, mpr_pci_attach), 77 DEVMETHOD(device_detach, mpr_pci_detach), 78 DEVMETHOD(device_suspend, mpr_pci_suspend), 79 DEVMETHOD(device_resume, mpr_pci_resume), 80 DEVMETHOD(bus_print_child, bus_generic_print_child), 81 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 82 { 0, 0 } 83 }; 84 85 static driver_t mpr_pci_driver = { 86 "mpr", 87 mpr_methods, 88 sizeof(struct mpr_softc) 89 }; 90 91 92 struct mpr_ident { 93 uint16_t vendor; 94 uint16_t device; 95 uint16_t subvendor; 96 uint16_t subdevice; 97 u_int flags; 98 const char *desc; 99 } mpr_identifiers[] = { 100 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3004, 101 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3004" }, 102 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3008, 103 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3008" }, 104 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_1, 105 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_1" }, 106 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_2, 107 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_2" }, 108 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_5, 109 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_5" }, 110 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_6, 111 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_6" }, 112 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3216, 113 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3216" }, 114 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3224, 115 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3224" }, 116 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_1, 117 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_1" }, 118 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_2, 119 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_2" }, 120 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_1, 121 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_1" }, 122 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_2, 123 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_2" }, 124 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3408, 125 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 126 "Avago Technologies (LSI) SAS3408" }, 127 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3416, 128 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 129 "Avago Technologies (LSI) SAS3416" }, 130 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3508, 131 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 132 "Avago Technologies (LSI) SAS3508" }, 133 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3508_1, 134 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 135 "Avago Technologies (LSI) SAS3508_1" }, 136 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3516, 137 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 138 "Avago Technologies (LSI) SAS3516" }, 139 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3516_1, 140 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 141 "Avago Technologies (LSI) SAS3516_1" }, 142 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3616, 143 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 144 "Avago Technologies (LSI) SAS3616" }, 145 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3708, 146 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 147 "Avago Technologies (LSI) SAS3708" }, 148 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3716, 149 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 150 "Avago Technologies (LSI) SAS3716" }, 151 { 0, 0, 0, 0, 0, NULL } 152 }; 153 154 155 static devclass_t mpr_devclass; 156 DRIVER_MODULE(mpr, pci, mpr_pci_driver, mpr_devclass, 0, 0); 157 MODULE_PNP_INFO("U16:vendor;U16:device;U16:subvendor;U16:subdevice;D:#", pci, 158 mpr, mpr_identifiers, nitems(mpr_identifiers) - 1); 159 160 MODULE_DEPEND(mpr, cam, 1, 1, 1); 161 162 static struct mpr_ident * 163 mpr_find_ident(device_t dev) 164 { 165 struct mpr_ident *m; 166 167 for (m = mpr_identifiers; m->vendor != 0; m++) { 168 if (m->vendor != pci_get_vendor(dev)) 169 continue; 170 if (m->device != pci_get_device(dev)) 171 continue; 172 if ((m->subvendor != 0xffff) && 173 (m->subvendor != pci_get_subvendor(dev))) 174 continue; 175 if ((m->subdevice != 0xffff) && 176 (m->subdevice != pci_get_subdevice(dev))) 177 continue; 178 return (m); 179 } 180 181 return (NULL); 182 } 183 184 static int 185 mpr_pci_probe(device_t dev) 186 { 187 struct mpr_ident *id; 188 189 if ((id = mpr_find_ident(dev)) != NULL) { 190 device_set_desc(dev, id->desc); 191 return (BUS_PROBE_DEFAULT); 192 } 193 return (ENXIO); 194 } 195 196 static int 197 mpr_pci_attach(device_t dev) 198 { 199 struct mpr_softc *sc; 200 struct mpr_ident *m; 201 int error, i; 202 203 sc = device_get_softc(dev); 204 bzero(sc, sizeof(*sc)); 205 sc->mpr_dev = dev; 206 m = mpr_find_ident(dev); 207 sc->mpr_flags = m->flags; 208 209 mpr_get_tunables(sc); 210 211 /* Twiddle basic PCI config bits for a sanity check */ 212 pci_enable_busmaster(dev); 213 214 for (i = 0; i < PCI_MAXMAPS_0; i++) { 215 sc->mpr_regs_rid = PCIR_BAR(i); 216 217 if ((sc->mpr_regs_resource = bus_alloc_resource_any(dev, 218 SYS_RES_MEMORY, &sc->mpr_regs_rid, RF_ACTIVE)) != NULL) 219 break; 220 } 221 222 if (sc->mpr_regs_resource == NULL) { 223 mpr_printf(sc, "Cannot allocate PCI registers\n"); 224 return (ENXIO); 225 } 226 227 sc->mpr_btag = rman_get_bustag(sc->mpr_regs_resource); 228 sc->mpr_bhandle = rman_get_bushandle(sc->mpr_regs_resource); 229 230 /* Allocate the parent DMA tag */ 231 if (bus_dma_tag_create( bus_get_dma_tag(dev), /* parent */ 232 1, 0, /* algnmnt, boundary */ 233 BUS_SPACE_MAXADDR, /* lowaddr */ 234 BUS_SPACE_MAXADDR, /* highaddr */ 235 NULL, NULL, /* filter, filterarg */ 236 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 237 BUS_SPACE_UNRESTRICTED, /* nsegments */ 238 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 239 0, /* flags */ 240 NULL, NULL, /* lockfunc, lockarg */ 241 &sc->mpr_parent_dmat)) { 242 mpr_printf(sc, "Cannot allocate parent DMA tag\n"); 243 mpr_pci_free(sc); 244 return (ENOMEM); 245 } 246 247 if (((error = mpr_pci_alloc_interrupts(sc)) != 0) || 248 ((error = mpr_attach(sc)) != 0)) 249 mpr_pci_free(sc); 250 251 return (error); 252 } 253 254 /* 255 * Allocate, but don't assign interrupts early. Doing it before requesting 256 * the IOCFacts message informs the firmware that we want to do MSI-X 257 * multiqueue. We might not use all of the available messages, but there's 258 * no reason to re-alloc if we don't. 259 */ 260 int 261 mpr_pci_alloc_interrupts(struct mpr_softc *sc) 262 { 263 device_t dev; 264 int error, msgs; 265 266 dev = sc->mpr_dev; 267 error = 0; 268 msgs = 0; 269 270 if (sc->disable_msix == 0) { 271 msgs = pci_msix_count(dev); 272 mpr_dprint(sc, MPR_INIT, "Counted %d MSI-X messages\n", msgs); 273 msgs = min(msgs, sc->max_msix); 274 msgs = min(msgs, MPR_MSIX_MAX); 275 msgs = min(msgs, 1); /* XXX */ 276 if (msgs != 0) { 277 mpr_dprint(sc, MPR_INIT, "Attempting to allocate %d " 278 "MSI-X messages\n", msgs); 279 error = mpr_alloc_msix(sc, msgs); 280 } 281 } 282 if (((error != 0) || (msgs == 0)) && (sc->disable_msi == 0)) { 283 msgs = pci_msi_count(dev); 284 mpr_dprint(sc, MPR_INIT, "Counted %d MSI messages\n", msgs); 285 msgs = min(msgs, MPR_MSI_MAX); 286 if (msgs != 0) { 287 mpr_dprint(sc, MPR_INIT, "Attempting to allocated %d " 288 "MSI messages\n", MPR_MSI_MAX); 289 error = mpr_alloc_msi(sc, MPR_MSI_MAX); 290 } 291 } 292 if ((error != 0) || (msgs == 0)) { 293 /* 294 * If neither MSI or MSI-X are available, assume legacy INTx. 295 * This also implies that there will be only 1 queue. 296 */ 297 mpr_dprint(sc, MPR_INIT, "Falling back to legacy INTx\n"); 298 sc->mpr_flags |= MPR_FLAGS_INTX; 299 msgs = 1; 300 } else 301 sc->mpr_flags |= MPR_FLAGS_MSI; 302 303 sc->msi_msgs = msgs; 304 mpr_dprint(sc, MPR_INIT, "Allocated %d interrupts\n", msgs); 305 306 return (error); 307 } 308 309 int 310 mpr_pci_setup_interrupts(struct mpr_softc *sc) 311 { 312 device_t dev; 313 struct mpr_queue *q; 314 void *ihandler; 315 int i, error, rid, initial_rid; 316 317 dev = sc->mpr_dev; 318 error = ENXIO; 319 320 if (sc->mpr_flags & MPR_FLAGS_INTX) { 321 initial_rid = 0; 322 ihandler = mpr_intr; 323 } else if (sc->mpr_flags & MPR_FLAGS_MSI) { 324 initial_rid = 1; 325 ihandler = mpr_intr_msi; 326 } else { 327 mpr_dprint(sc, MPR_ERROR|MPR_INIT, 328 "Unable to set up interrupts\n"); 329 return (EINVAL); 330 } 331 332 for (i = 0; i < sc->msi_msgs; i++) { 333 q = &sc->queues[i]; 334 rid = i + initial_rid; 335 q->irq_rid = rid; 336 q->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 337 &q->irq_rid, RF_ACTIVE); 338 if (q->irq == NULL) { 339 mpr_dprint(sc, MPR_ERROR|MPR_INIT, 340 "Cannot allocate interrupt RID %d\n", rid); 341 sc->msi_msgs = i; 342 break; 343 } 344 error = bus_setup_intr(dev, q->irq, 345 INTR_TYPE_BIO | INTR_MPSAFE, NULL, ihandler, 346 sc, &q->intrhand); 347 if (error) { 348 mpr_dprint(sc, MPR_ERROR|MPR_INIT, 349 "Cannot setup interrupt RID %d\n", rid); 350 sc->msi_msgs = i; 351 break; 352 } 353 } 354 355 mpr_dprint(sc, MPR_INIT, "Set up %d interrupts\n", sc->msi_msgs); 356 return (error); 357 } 358 359 static int 360 mpr_pci_detach(device_t dev) 361 { 362 struct mpr_softc *sc; 363 int error; 364 365 sc = device_get_softc(dev); 366 367 if ((error = mpr_free(sc)) != 0) 368 return (error); 369 370 mpr_pci_free(sc); 371 return (0); 372 } 373 374 void 375 mpr_pci_free_interrupts(struct mpr_softc *sc) 376 { 377 struct mpr_queue *q; 378 int i; 379 380 if (sc->queues == NULL) 381 return; 382 383 for (i = 0; i < sc->msi_msgs; i++) { 384 q = &sc->queues[i]; 385 if (q->irq != NULL) { 386 bus_teardown_intr(sc->mpr_dev, q->irq, 387 q->intrhand); 388 bus_release_resource(sc->mpr_dev, SYS_RES_IRQ, 389 q->irq_rid, q->irq); 390 } 391 } 392 } 393 394 static void 395 mpr_pci_free(struct mpr_softc *sc) 396 { 397 398 if (sc->mpr_parent_dmat != NULL) { 399 bus_dma_tag_destroy(sc->mpr_parent_dmat); 400 } 401 402 mpr_pci_free_interrupts(sc); 403 404 if (sc->mpr_flags & MPR_FLAGS_MSI) 405 pci_release_msi(sc->mpr_dev); 406 407 if (sc->mpr_regs_resource != NULL) { 408 bus_release_resource(sc->mpr_dev, SYS_RES_MEMORY, 409 sc->mpr_regs_rid, sc->mpr_regs_resource); 410 } 411 412 return; 413 } 414 415 static int 416 mpr_pci_suspend(device_t dev) 417 { 418 return (EINVAL); 419 } 420 421 static int 422 mpr_pci_resume(device_t dev) 423 { 424 return (EINVAL); 425 } 426 427 static int 428 mpr_alloc_msix(struct mpr_softc *sc, int msgs) 429 { 430 int error; 431 432 error = pci_alloc_msix(sc->mpr_dev, &msgs); 433 return (error); 434 } 435 436 static int 437 mpr_alloc_msi(struct mpr_softc *sc, int msgs) 438 { 439 int error; 440 441 error = pci_alloc_msi(sc->mpr_dev, &msgs); 442 return (error); 443 } 444 445 int 446 mpr_pci_restore(struct mpr_softc *sc) 447 { 448 struct pci_devinfo *dinfo; 449 450 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 451 452 dinfo = device_get_ivars(sc->mpr_dev); 453 if (dinfo == NULL) { 454 mpr_dprint(sc, MPR_FAULT, "%s: NULL dinfo\n", __func__); 455 return (EINVAL); 456 } 457 458 pci_cfg_restore(sc->mpr_dev, dinfo); 459 return (0); 460 } 461 462