1 /*- 2 * Copyright (c) 2009 Yahoo! Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 /* PCI/PCI-X/PCIe bus interface for the Avago Tech (LSI) MPT3 controllers */ 31 32 /* TODO Move headers to mprvar */ 33 #include <sys/types.h> 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/module.h> 38 #include <sys/bus.h> 39 #include <sys/conf.h> 40 #include <sys/malloc.h> 41 #include <sys/sysctl.h> 42 #include <sys/uio.h> 43 44 #include <machine/bus.h> 45 #include <machine/resource.h> 46 #include <sys/rman.h> 47 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcivar.h> 50 #include <dev/pci/pci_private.h> 51 52 #include <dev/mpr/mpi/mpi2_type.h> 53 #include <dev/mpr/mpi/mpi2.h> 54 #include <dev/mpr/mpi/mpi2_ioc.h> 55 #include <dev/mpr/mpi/mpi2_cnfg.h> 56 #include <dev/mpr/mpi/mpi2_tool.h> 57 #include <dev/mpr/mpi/mpi2_pci.h> 58 59 #include <sys/queue.h> 60 #include <sys/kthread.h> 61 #include <dev/mpr/mpr_ioctl.h> 62 #include <dev/mpr/mprvar.h> 63 64 static int mpr_pci_probe(device_t); 65 static int mpr_pci_attach(device_t); 66 static int mpr_pci_detach(device_t); 67 static int mpr_pci_suspend(device_t); 68 static int mpr_pci_resume(device_t); 69 static void mpr_pci_free(struct mpr_softc *); 70 static int mpr_alloc_msix(struct mpr_softc *sc, int msgs); 71 static int mpr_alloc_msi(struct mpr_softc *sc, int msgs); 72 73 static device_method_t mpr_methods[] = { 74 DEVMETHOD(device_probe, mpr_pci_probe), 75 DEVMETHOD(device_attach, mpr_pci_attach), 76 DEVMETHOD(device_detach, mpr_pci_detach), 77 DEVMETHOD(device_suspend, mpr_pci_suspend), 78 DEVMETHOD(device_resume, mpr_pci_resume), 79 DEVMETHOD(bus_print_child, bus_generic_print_child), 80 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 81 { 0, 0 } 82 }; 83 84 static driver_t mpr_pci_driver = { 85 "mpr", 86 mpr_methods, 87 sizeof(struct mpr_softc) 88 }; 89 90 static devclass_t mpr_devclass; 91 DRIVER_MODULE(mpr, pci, mpr_pci_driver, mpr_devclass, 0, 0); 92 MODULE_DEPEND(mpr, cam, 1, 1, 1); 93 94 struct mpr_ident { 95 uint16_t vendor; 96 uint16_t device; 97 uint16_t subvendor; 98 uint16_t subdevice; 99 u_int flags; 100 const char *desc; 101 } mpr_identifiers[] = { 102 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3004, 103 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3004" }, 104 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3008, 105 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3008" }, 106 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_1, 107 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_1" }, 108 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_2, 109 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_2" }, 110 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_5, 111 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_5" }, 112 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_6, 113 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_6" }, 114 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3216, 115 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3216" }, 116 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3224, 117 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3224" }, 118 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_1, 119 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_1" }, 120 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_2, 121 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_2" }, 122 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_1, 123 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_1" }, 124 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_2, 125 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_2" }, 126 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3408, 127 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3408" }, 128 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3416, 129 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3416" }, 130 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3508, 131 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3508" }, 132 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3508_1, 133 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3508_1" }, 134 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3516, 135 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3516" }, 136 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3516_1, 137 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3516_1" }, 138 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3616, 139 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3616" }, 140 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3708, 141 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3708" }, 142 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3716, 143 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3716" }, 144 { 0, 0, 0, 0, 0, NULL } 145 }; 146 147 static struct mpr_ident * 148 mpr_find_ident(device_t dev) 149 { 150 struct mpr_ident *m; 151 152 for (m = mpr_identifiers; m->vendor != 0; m++) { 153 if (m->vendor != pci_get_vendor(dev)) 154 continue; 155 if (m->device != pci_get_device(dev)) 156 continue; 157 if ((m->subvendor != 0xffff) && 158 (m->subvendor != pci_get_subvendor(dev))) 159 continue; 160 if ((m->subdevice != 0xffff) && 161 (m->subdevice != pci_get_subdevice(dev))) 162 continue; 163 return (m); 164 } 165 166 return (NULL); 167 } 168 169 static int 170 mpr_pci_probe(device_t dev) 171 { 172 struct mpr_ident *id; 173 174 if ((id = mpr_find_ident(dev)) != NULL) { 175 device_set_desc(dev, id->desc); 176 return (BUS_PROBE_DEFAULT); 177 } 178 return (ENXIO); 179 } 180 181 static int 182 mpr_pci_attach(device_t dev) 183 { 184 struct mpr_softc *sc; 185 struct mpr_ident *m; 186 int error, i; 187 188 sc = device_get_softc(dev); 189 bzero(sc, sizeof(*sc)); 190 sc->mpr_dev = dev; 191 m = mpr_find_ident(dev); 192 sc->mpr_flags = m->flags; 193 194 /* Twiddle basic PCI config bits for a sanity check */ 195 pci_enable_busmaster(dev); 196 197 /* Set flag if this is a Gen3.5 IOC */ 198 if ((m->device == MPI26_MFGPAGE_DEVID_SAS3508) || 199 (m->device == MPI26_MFGPAGE_DEVID_SAS3508_1) || 200 (m->device == MPI26_MFGPAGE_DEVID_SAS3408) || 201 (m->device == MPI26_MFGPAGE_DEVID_SAS3516) || 202 (m->device == MPI26_MFGPAGE_DEVID_SAS3516_1) || 203 (m->device == MPI26_MFGPAGE_DEVID_SAS3416) || 204 (m->device == MPI26_MFGPAGE_DEVID_SAS3716) || 205 (m->device == MPI26_MFGPAGE_DEVID_SAS3616) || 206 (m->device == MPI26_MFGPAGE_DEVID_SAS3708)) { 207 sc->mpr_flags |= MPR_FLAGS_GEN35_IOC; 208 } 209 210 for (i = 0; i < PCI_MAXMAPS_0; i++) { 211 sc->mpr_regs_rid = PCIR_BAR(i); 212 213 if ((sc->mpr_regs_resource = bus_alloc_resource_any(dev, 214 SYS_RES_MEMORY, &sc->mpr_regs_rid, RF_ACTIVE)) != NULL) 215 break; 216 } 217 218 if (sc->mpr_regs_resource == NULL) { 219 mpr_printf(sc, "Cannot allocate PCI registers\n"); 220 return (ENXIO); 221 } 222 223 sc->mpr_btag = rman_get_bustag(sc->mpr_regs_resource); 224 sc->mpr_bhandle = rman_get_bushandle(sc->mpr_regs_resource); 225 226 /* Allocate the parent DMA tag */ 227 if (bus_dma_tag_create( bus_get_dma_tag(dev), /* parent */ 228 1, 0, /* algnmnt, boundary */ 229 BUS_SPACE_MAXADDR, /* lowaddr */ 230 BUS_SPACE_MAXADDR, /* highaddr */ 231 NULL, NULL, /* filter, filterarg */ 232 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 233 BUS_SPACE_UNRESTRICTED, /* nsegments */ 234 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 235 0, /* flags */ 236 NULL, NULL, /* lockfunc, lockarg */ 237 &sc->mpr_parent_dmat)) { 238 mpr_printf(sc, "Cannot allocate parent DMA tag\n"); 239 mpr_pci_free(sc); 240 return (ENOMEM); 241 } 242 243 if ((error = mpr_attach(sc)) != 0) 244 mpr_pci_free(sc); 245 246 return (error); 247 } 248 249 int 250 mpr_pci_setup_interrupts(struct mpr_softc *sc) 251 { 252 device_t dev; 253 int i, error, msgs; 254 255 dev = sc->mpr_dev; 256 error = ENXIO; 257 if ((sc->disable_msix == 0) && 258 ((msgs = pci_msix_count(dev)) >= MPR_MSI_COUNT)) 259 error = mpr_alloc_msix(sc, MPR_MSI_COUNT); 260 if ((error != 0) && (sc->disable_msi == 0) && 261 ((msgs = pci_msi_count(dev)) >= MPR_MSI_COUNT)) 262 error = mpr_alloc_msi(sc, MPR_MSI_COUNT); 263 264 if (error != 0) { 265 sc->mpr_flags |= MPR_FLAGS_INTX; 266 sc->mpr_irq_rid[0] = 0; 267 sc->mpr_irq[0] = bus_alloc_resource_any(dev, SYS_RES_IRQ, 268 &sc->mpr_irq_rid[0], RF_SHAREABLE | RF_ACTIVE); 269 if (sc->mpr_irq[0] == NULL) { 270 mpr_printf(sc, "Cannot allocate INTx interrupt\n"); 271 return (ENXIO); 272 } 273 error = bus_setup_intr(dev, sc->mpr_irq[0], 274 INTR_TYPE_BIO | INTR_MPSAFE, NULL, mpr_intr, sc, 275 &sc->mpr_intrhand[0]); 276 if (error) 277 mpr_printf(sc, "Cannot setup INTx interrupt\n"); 278 } else { 279 sc->mpr_flags |= MPR_FLAGS_MSI; 280 for (i = 0; i < MPR_MSI_COUNT; i++) { 281 sc->mpr_irq_rid[i] = i + 1; 282 sc->mpr_irq[i] = bus_alloc_resource_any(dev, 283 SYS_RES_IRQ, &sc->mpr_irq_rid[i], RF_ACTIVE); 284 if (sc->mpr_irq[i] == NULL) { 285 mpr_printf(sc, 286 "Cannot allocate MSI interrupt\n"); 287 return (ENXIO); 288 } 289 error = bus_setup_intr(dev, sc->mpr_irq[i], 290 INTR_TYPE_BIO | INTR_MPSAFE, NULL, mpr_intr_msi, 291 sc, &sc->mpr_intrhand[i]); 292 if (error) { 293 mpr_printf(sc, 294 "Cannot setup MSI interrupt %d\n", i); 295 break; 296 } 297 } 298 } 299 300 return (error); 301 } 302 303 static int 304 mpr_pci_detach(device_t dev) 305 { 306 struct mpr_softc *sc; 307 int error; 308 309 sc = device_get_softc(dev); 310 311 if ((error = mpr_free(sc)) != 0) 312 return (error); 313 314 mpr_pci_free(sc); 315 return (0); 316 } 317 318 static void 319 mpr_pci_free(struct mpr_softc *sc) 320 { 321 int i; 322 323 if (sc->mpr_parent_dmat != NULL) { 324 bus_dma_tag_destroy(sc->mpr_parent_dmat); 325 } 326 327 if (sc->mpr_flags & MPR_FLAGS_MSI) { 328 for (i = 0; i < MPR_MSI_COUNT; i++) { 329 if (sc->mpr_irq[i] != NULL) { 330 bus_teardown_intr(sc->mpr_dev, sc->mpr_irq[i], 331 sc->mpr_intrhand[i]); 332 bus_release_resource(sc->mpr_dev, SYS_RES_IRQ, 333 sc->mpr_irq_rid[i], sc->mpr_irq[i]); 334 } 335 } 336 pci_release_msi(sc->mpr_dev); 337 } 338 339 if (sc->mpr_flags & MPR_FLAGS_INTX) { 340 bus_teardown_intr(sc->mpr_dev, sc->mpr_irq[0], 341 sc->mpr_intrhand[0]); 342 bus_release_resource(sc->mpr_dev, SYS_RES_IRQ, 343 sc->mpr_irq_rid[0], sc->mpr_irq[0]); 344 } 345 346 if (sc->mpr_regs_resource != NULL) { 347 bus_release_resource(sc->mpr_dev, SYS_RES_MEMORY, 348 sc->mpr_regs_rid, sc->mpr_regs_resource); 349 } 350 351 return; 352 } 353 354 static int 355 mpr_pci_suspend(device_t dev) 356 { 357 return (EINVAL); 358 } 359 360 static int 361 mpr_pci_resume(device_t dev) 362 { 363 return (EINVAL); 364 } 365 366 static int 367 mpr_alloc_msix(struct mpr_softc *sc, int msgs) 368 { 369 int error; 370 371 error = pci_alloc_msix(sc->mpr_dev, &msgs); 372 return (error); 373 } 374 375 static int 376 mpr_alloc_msi(struct mpr_softc *sc, int msgs) 377 { 378 int error; 379 380 error = pci_alloc_msi(sc->mpr_dev, &msgs); 381 return (error); 382 } 383 384 int 385 mpr_pci_restore(struct mpr_softc *sc) 386 { 387 struct pci_devinfo *dinfo; 388 389 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 390 391 dinfo = device_get_ivars(sc->mpr_dev); 392 if (dinfo == NULL) { 393 mpr_dprint(sc, MPR_FAULT, "%s: NULL dinfo\n", __func__); 394 return (EINVAL); 395 } 396 397 pci_cfg_restore(sc->mpr_dev, dinfo); 398 return (0); 399 } 400 401