1991554f2SKenneth D. Merry /*- 2991554f2SKenneth D. Merry * Copyright (c) 2009 Yahoo! Inc. 3991554f2SKenneth D. Merry * All rights reserved. 4991554f2SKenneth D. Merry * 5991554f2SKenneth D. Merry * Redistribution and use in source and binary forms, with or without 6991554f2SKenneth D. Merry * modification, are permitted provided that the following conditions 7991554f2SKenneth D. Merry * are met: 8991554f2SKenneth D. Merry * 1. Redistributions of source code must retain the above copyright 9991554f2SKenneth D. Merry * notice, this list of conditions and the following disclaimer. 10991554f2SKenneth D. Merry * 2. Redistributions in binary form must reproduce the above copyright 11991554f2SKenneth D. Merry * notice, this list of conditions and the following disclaimer in the 12991554f2SKenneth D. Merry * documentation and/or other materials provided with the distribution. 13991554f2SKenneth D. Merry * 14991554f2SKenneth D. Merry * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15991554f2SKenneth D. Merry * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16991554f2SKenneth D. Merry * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17991554f2SKenneth D. Merry * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18991554f2SKenneth D. Merry * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19991554f2SKenneth D. Merry * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20991554f2SKenneth D. Merry * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21991554f2SKenneth D. Merry * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22991554f2SKenneth D. Merry * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23991554f2SKenneth D. Merry * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24991554f2SKenneth D. Merry * SUCH DAMAGE. 25991554f2SKenneth D. Merry */ 26991554f2SKenneth D. Merry 27991554f2SKenneth D. Merry #include <sys/cdefs.h> 28991554f2SKenneth D. Merry __FBSDID("$FreeBSD$"); 29991554f2SKenneth D. Merry 30a2c14879SStephen McConnell /* PCI/PCI-X/PCIe bus interface for the Avago Tech (LSI) MPT3 controllers */ 31991554f2SKenneth D. Merry 32991554f2SKenneth D. Merry /* TODO Move headers to mprvar */ 33991554f2SKenneth D. Merry #include <sys/types.h> 34991554f2SKenneth D. Merry #include <sys/param.h> 35991554f2SKenneth D. Merry #include <sys/systm.h> 36991554f2SKenneth D. Merry #include <sys/kernel.h> 37991554f2SKenneth D. Merry #include <sys/module.h> 38991554f2SKenneth D. Merry #include <sys/bus.h> 39991554f2SKenneth D. Merry #include <sys/conf.h> 40991554f2SKenneth D. Merry #include <sys/malloc.h> 41991554f2SKenneth D. Merry #include <sys/sysctl.h> 42991554f2SKenneth D. Merry #include <sys/uio.h> 43991554f2SKenneth D. Merry 44991554f2SKenneth D. Merry #include <machine/bus.h> 45991554f2SKenneth D. Merry #include <machine/resource.h> 46991554f2SKenneth D. Merry #include <sys/rman.h> 47991554f2SKenneth D. Merry 48991554f2SKenneth D. Merry #include <dev/pci/pcireg.h> 49991554f2SKenneth D. Merry #include <dev/pci/pcivar.h> 50991554f2SKenneth D. Merry #include <dev/pci/pci_private.h> 51991554f2SKenneth D. Merry 52991554f2SKenneth D. Merry #include <dev/mpr/mpi/mpi2_type.h> 53991554f2SKenneth D. Merry #include <dev/mpr/mpi/mpi2.h> 54991554f2SKenneth D. Merry #include <dev/mpr/mpi/mpi2_ioc.h> 55991554f2SKenneth D. Merry #include <dev/mpr/mpi/mpi2_cnfg.h> 56991554f2SKenneth D. Merry #include <dev/mpr/mpi/mpi2_tool.h> 5767feec50SStephen McConnell #include <dev/mpr/mpi/mpi2_pci.h> 58991554f2SKenneth D. Merry 59991554f2SKenneth D. Merry #include <sys/queue.h> 60991554f2SKenneth D. Merry #include <sys/kthread.h> 61991554f2SKenneth D. Merry #include <dev/mpr/mpr_ioctl.h> 62991554f2SKenneth D. Merry #include <dev/mpr/mprvar.h> 63991554f2SKenneth D. Merry 64991554f2SKenneth D. Merry static int mpr_pci_probe(device_t); 65991554f2SKenneth D. Merry static int mpr_pci_attach(device_t); 66991554f2SKenneth D. Merry static int mpr_pci_detach(device_t); 67991554f2SKenneth D. Merry static int mpr_pci_suspend(device_t); 68991554f2SKenneth D. Merry static int mpr_pci_resume(device_t); 69991554f2SKenneth D. Merry static void mpr_pci_free(struct mpr_softc *); 70991554f2SKenneth D. Merry static int mpr_alloc_msix(struct mpr_softc *sc, int msgs); 71991554f2SKenneth D. Merry static int mpr_alloc_msi(struct mpr_softc *sc, int msgs); 72252b2b4fSScott Long static int mpr_pci_alloc_interrupts(struct mpr_softc *sc); 73991554f2SKenneth D. Merry 74991554f2SKenneth D. Merry static device_method_t mpr_methods[] = { 75991554f2SKenneth D. Merry DEVMETHOD(device_probe, mpr_pci_probe), 76991554f2SKenneth D. Merry DEVMETHOD(device_attach, mpr_pci_attach), 77991554f2SKenneth D. Merry DEVMETHOD(device_detach, mpr_pci_detach), 78991554f2SKenneth D. Merry DEVMETHOD(device_suspend, mpr_pci_suspend), 79991554f2SKenneth D. Merry DEVMETHOD(device_resume, mpr_pci_resume), 80991554f2SKenneth D. Merry DEVMETHOD(bus_print_child, bus_generic_print_child), 81991554f2SKenneth D. Merry DEVMETHOD(bus_driver_added, bus_generic_driver_added), 82991554f2SKenneth D. Merry { 0, 0 } 83991554f2SKenneth D. Merry }; 84991554f2SKenneth D. Merry 85991554f2SKenneth D. Merry static driver_t mpr_pci_driver = { 86991554f2SKenneth D. Merry "mpr", 87991554f2SKenneth D. Merry mpr_methods, 88991554f2SKenneth D. Merry sizeof(struct mpr_softc) 89991554f2SKenneth D. Merry }; 90991554f2SKenneth D. Merry 91991554f2SKenneth D. Merry struct mpr_ident { 92991554f2SKenneth D. Merry uint16_t vendor; 93991554f2SKenneth D. Merry uint16_t device; 94991554f2SKenneth D. Merry uint16_t subvendor; 95991554f2SKenneth D. Merry uint16_t subdevice; 96991554f2SKenneth D. Merry u_int flags; 97991554f2SKenneth D. Merry const char *desc; 98991554f2SKenneth D. Merry } mpr_identifiers[] = { 99991554f2SKenneth D. Merry { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3004, 100a2c14879SStephen McConnell 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3004" }, 101991554f2SKenneth D. Merry { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3008, 102a2c14879SStephen McConnell 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3008" }, 103991554f2SKenneth D. Merry { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_1, 104a2c14879SStephen McConnell 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_1" }, 105991554f2SKenneth D. Merry { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_2, 106a2c14879SStephen McConnell 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_2" }, 107991554f2SKenneth D. Merry { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_5, 108a2c14879SStephen McConnell 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_5" }, 109991554f2SKenneth D. Merry { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_6, 110a2c14879SStephen McConnell 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_6" }, 11167feec50SStephen McConnell { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3216, 11267feec50SStephen McConnell 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3216" }, 11367feec50SStephen McConnell { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3224, 11467feec50SStephen McConnell 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3224" }, 1152bbc5fcbSStephen McConnell { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_1, 1162bbc5fcbSStephen McConnell 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_1" }, 1172bbc5fcbSStephen McConnell { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_2, 1182bbc5fcbSStephen McConnell 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_2" }, 1192bbc5fcbSStephen McConnell { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_1, 1202bbc5fcbSStephen McConnell 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_1" }, 1212bbc5fcbSStephen McConnell { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_2, 1222bbc5fcbSStephen McConnell 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_2" }, 12367feec50SStephen McConnell { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3408, 124b618318aSScott Long 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 125b618318aSScott Long "Avago Technologies (LSI) SAS3408" }, 12667feec50SStephen McConnell { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3416, 127b618318aSScott Long 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 128b618318aSScott Long "Avago Technologies (LSI) SAS3416" }, 12967feec50SStephen McConnell { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3508, 130b618318aSScott Long 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 131b618318aSScott Long "Avago Technologies (LSI) SAS3508" }, 13267feec50SStephen McConnell { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3508_1, 133b618318aSScott Long 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 134b618318aSScott Long "Avago Technologies (LSI) SAS3508_1" }, 13567feec50SStephen McConnell { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3516, 136b618318aSScott Long 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 137b618318aSScott Long "Avago Technologies (LSI) SAS3516" }, 13867feec50SStephen McConnell { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3516_1, 139b618318aSScott Long 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 140b618318aSScott Long "Avago Technologies (LSI) SAS3516_1" }, 14167feec50SStephen McConnell { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3616, 142b618318aSScott Long 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 143b618318aSScott Long "Avago Technologies (LSI) SAS3616" }, 14467feec50SStephen McConnell { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3708, 145b618318aSScott Long 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 146b618318aSScott Long "Avago Technologies (LSI) SAS3708" }, 14767feec50SStephen McConnell { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3716, 148b618318aSScott Long 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 149b618318aSScott Long "Avago Technologies (LSI) SAS3716" }, 150f36649b7SKashyap D Desai { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID0_SAS3816, 151f36649b7SKashyap D Desai 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 152f36649b7SKashyap D Desai "Broadcom Inc. (LSI) INVALID0 SAS3816" }, 153f36649b7SKashyap D Desai { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3816, 154f36649b7SKashyap D Desai 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 155f36649b7SKashyap D Desai "Broadcom Inc. (LSI) CFG SEC SAS3816" }, 156f36649b7SKashyap D Desai { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_HARD_SEC_SAS3816, 157f36649b7SKashyap D Desai 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 158f36649b7SKashyap D Desai "Broadcom Inc. (LSI) HARD SEC SAS3816" }, 159f36649b7SKashyap D Desai { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID1_SAS3816, 160f36649b7SKashyap D Desai 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 161f36649b7SKashyap D Desai "Broadcom Inc. (LSI) INVALID1 SAS3816" }, 162f36649b7SKashyap D Desai { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID0_SAS3916, 163f36649b7SKashyap D Desai 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 164f36649b7SKashyap D Desai "Broadcom Inc. (LSI) INVALID0 SAS3916" }, 165f36649b7SKashyap D Desai { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3916, 166f36649b7SKashyap D Desai 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 167f36649b7SKashyap D Desai "Broadcom Inc. (LSI) CFG SEC SAS3916" }, 168f36649b7SKashyap D Desai { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_HARD_SEC_SAS3916, 169f36649b7SKashyap D Desai 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 170f36649b7SKashyap D Desai "Broadcom Inc. (LSI) HARD SEC SAS3916" }, 171f36649b7SKashyap D Desai { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID1_SAS3916, 172f36649b7SKashyap D Desai 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 173f36649b7SKashyap D Desai "Broadcom Inc. (LSI) INVALID1 SAS3916" }, 174991554f2SKenneth D. Merry { 0, 0, 0, 0, 0, NULL } 175991554f2SKenneth D. Merry }; 176991554f2SKenneth D. Merry 1770dc34160SWarner Losh static devclass_t mpr_devclass; 1780dc34160SWarner Losh DRIVER_MODULE(mpr, pci, mpr_pci_driver, mpr_devclass, 0, 0); 1790dc34160SWarner Losh MODULE_PNP_INFO("U16:vendor;U16:device;U16:subvendor;U16:subdevice;D:#", pci, 1800dc34160SWarner Losh mpr, mpr_identifiers, nitems(mpr_identifiers) - 1); 1810dc34160SWarner Losh 1820dc34160SWarner Losh MODULE_DEPEND(mpr, cam, 1, 1, 1); 1830dc34160SWarner Losh 184991554f2SKenneth D. Merry static struct mpr_ident * 185991554f2SKenneth D. Merry mpr_find_ident(device_t dev) 186991554f2SKenneth D. Merry { 187991554f2SKenneth D. Merry struct mpr_ident *m; 188991554f2SKenneth D. Merry 189991554f2SKenneth D. Merry for (m = mpr_identifiers; m->vendor != 0; m++) { 190991554f2SKenneth D. Merry if (m->vendor != pci_get_vendor(dev)) 191991554f2SKenneth D. Merry continue; 192991554f2SKenneth D. Merry if (m->device != pci_get_device(dev)) 193991554f2SKenneth D. Merry continue; 194991554f2SKenneth D. Merry if ((m->subvendor != 0xffff) && 195991554f2SKenneth D. Merry (m->subvendor != pci_get_subvendor(dev))) 196991554f2SKenneth D. Merry continue; 197991554f2SKenneth D. Merry if ((m->subdevice != 0xffff) && 198991554f2SKenneth D. Merry (m->subdevice != pci_get_subdevice(dev))) 199991554f2SKenneth D. Merry continue; 200991554f2SKenneth D. Merry return (m); 201991554f2SKenneth D. Merry } 202991554f2SKenneth D. Merry 203991554f2SKenneth D. Merry return (NULL); 204991554f2SKenneth D. Merry } 205991554f2SKenneth D. Merry 206991554f2SKenneth D. Merry static int 207991554f2SKenneth D. Merry mpr_pci_probe(device_t dev) 208991554f2SKenneth D. Merry { 209991554f2SKenneth D. Merry struct mpr_ident *id; 210991554f2SKenneth D. Merry 211991554f2SKenneth D. Merry if ((id = mpr_find_ident(dev)) != NULL) { 212991554f2SKenneth D. Merry device_set_desc(dev, id->desc); 213991554f2SKenneth D. Merry return (BUS_PROBE_DEFAULT); 214991554f2SKenneth D. Merry } 215991554f2SKenneth D. Merry return (ENXIO); 216991554f2SKenneth D. Merry } 217991554f2SKenneth D. Merry 218991554f2SKenneth D. Merry static int 219991554f2SKenneth D. Merry mpr_pci_attach(device_t dev) 220991554f2SKenneth D. Merry { 221*74c781edSScott Long bus_dma_template_t t; 222991554f2SKenneth D. Merry struct mpr_softc *sc; 223991554f2SKenneth D. Merry struct mpr_ident *m; 22467feec50SStephen McConnell int error, i; 225991554f2SKenneth D. Merry 226991554f2SKenneth D. Merry sc = device_get_softc(dev); 227991554f2SKenneth D. Merry bzero(sc, sizeof(*sc)); 228991554f2SKenneth D. Merry sc->mpr_dev = dev; 229991554f2SKenneth D. Merry m = mpr_find_ident(dev); 230991554f2SKenneth D. Merry sc->mpr_flags = m->flags; 231991554f2SKenneth D. Merry 232f36649b7SKashyap D Desai switch (m->device) { 233f36649b7SKashyap D Desai case MPI26_MFGPAGE_DEVID_INVALID0_SAS3816: 234f36649b7SKashyap D Desai case MPI26_MFGPAGE_DEVID_INVALID1_SAS3816: 235f36649b7SKashyap D Desai case MPI26_MFGPAGE_DEVID_INVALID0_SAS3916: 236f36649b7SKashyap D Desai case MPI26_MFGPAGE_DEVID_INVALID1_SAS3916: 237f36649b7SKashyap D Desai mpr_printf(sc, "HBA is in Non Secure mode\n"); 238f36649b7SKashyap D Desai return (ENXIO); 239f36649b7SKashyap D Desai case MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3816: 240f36649b7SKashyap D Desai case MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3916: 241f36649b7SKashyap D Desai mpr_printf(sc, "HBA is in Configurable Secure mode\n"); 242f36649b7SKashyap D Desai break; 243f36649b7SKashyap D Desai default: 244f36649b7SKashyap D Desai break; 245f36649b7SKashyap D Desai } 246f36649b7SKashyap D Desai 247252b2b4fSScott Long mpr_get_tunables(sc); 248252b2b4fSScott Long 249991554f2SKenneth D. Merry /* Twiddle basic PCI config bits for a sanity check */ 250991554f2SKenneth D. Merry pci_enable_busmaster(dev); 251991554f2SKenneth D. Merry 25267feec50SStephen McConnell for (i = 0; i < PCI_MAXMAPS_0; i++) { 25367feec50SStephen McConnell sc->mpr_regs_rid = PCIR_BAR(i); 25467feec50SStephen McConnell 255991554f2SKenneth D. Merry if ((sc->mpr_regs_resource = bus_alloc_resource_any(dev, 25667feec50SStephen McConnell SYS_RES_MEMORY, &sc->mpr_regs_rid, RF_ACTIVE)) != NULL) 25767feec50SStephen McConnell break; 25867feec50SStephen McConnell } 25967feec50SStephen McConnell 26067feec50SStephen McConnell if (sc->mpr_regs_resource == NULL) { 261991554f2SKenneth D. Merry mpr_printf(sc, "Cannot allocate PCI registers\n"); 262991554f2SKenneth D. Merry return (ENXIO); 263991554f2SKenneth D. Merry } 26467feec50SStephen McConnell 265991554f2SKenneth D. Merry sc->mpr_btag = rman_get_bustag(sc->mpr_regs_resource); 266991554f2SKenneth D. Merry sc->mpr_bhandle = rman_get_bushandle(sc->mpr_regs_resource); 267991554f2SKenneth D. Merry 268991554f2SKenneth D. Merry /* Allocate the parent DMA tag */ 269f5ead205SScott Long bus_dma_template_init(&t, bus_get_dma_tag(dev)); 270f5ead205SScott Long if (bus_dma_template_tag(&t, &sc->mpr_parent_dmat)) { 271991554f2SKenneth D. Merry mpr_printf(sc, "Cannot allocate parent DMA tag\n"); 272991554f2SKenneth D. Merry mpr_pci_free(sc); 273991554f2SKenneth D. Merry return (ENOMEM); 274991554f2SKenneth D. Merry } 275991554f2SKenneth D. Merry 276252b2b4fSScott Long if (((error = mpr_pci_alloc_interrupts(sc)) != 0) || 277252b2b4fSScott Long ((error = mpr_attach(sc)) != 0)) 278991554f2SKenneth D. Merry mpr_pci_free(sc); 279991554f2SKenneth D. Merry 280991554f2SKenneth D. Merry return (error); 281991554f2SKenneth D. Merry } 282991554f2SKenneth D. Merry 283252b2b4fSScott Long /* 284252b2b4fSScott Long * Allocate, but don't assign interrupts early. Doing it before requesting 285252b2b4fSScott Long * the IOCFacts message informs the firmware that we want to do MSI-X 286252b2b4fSScott Long * multiqueue. We might not use all of the available messages, but there's 287252b2b4fSScott Long * no reason to re-alloc if we don't. 288252b2b4fSScott Long */ 289252b2b4fSScott Long int 290252b2b4fSScott Long mpr_pci_alloc_interrupts(struct mpr_softc *sc) 291252b2b4fSScott Long { 292252b2b4fSScott Long device_t dev; 293252b2b4fSScott Long int error, msgs; 294252b2b4fSScott Long 295252b2b4fSScott Long dev = sc->mpr_dev; 296252b2b4fSScott Long error = 0; 2972068b2aaSScott Long msgs = 0; 298252b2b4fSScott Long 2993c5ac992SScott Long if (sc->disable_msix == 0) { 3003c5ac992SScott Long msgs = pci_msix_count(dev); 3013c5ac992SScott Long mpr_dprint(sc, MPR_INIT, "Counted %d MSI-X messages\n", msgs); 3023c5ac992SScott Long msgs = min(msgs, sc->max_msix); 3033c5ac992SScott Long msgs = min(msgs, MPR_MSIX_MAX); 3043c5ac992SScott Long msgs = min(msgs, 1); /* XXX */ 3053c5ac992SScott Long if (msgs != 0) { 3067eed4c18SScott Long mpr_dprint(sc, MPR_INIT, "Attempting to allocate %d " 3077eed4c18SScott Long "MSI-X messages\n", msgs); 3083c5ac992SScott Long error = mpr_alloc_msix(sc, msgs); 3093c5ac992SScott Long } 3103c5ac992SScott Long } 3113c5ac992SScott Long if (((error != 0) || (msgs == 0)) && (sc->disable_msi == 0)) { 3123c5ac992SScott Long msgs = pci_msi_count(dev); 3133c5ac992SScott Long mpr_dprint(sc, MPR_INIT, "Counted %d MSI messages\n", msgs); 3143c5ac992SScott Long msgs = min(msgs, MPR_MSI_MAX); 3153c5ac992SScott Long if (msgs != 0) { 3167eed4c18SScott Long mpr_dprint(sc, MPR_INIT, "Attempting to allocated %d " 3177eed4c18SScott Long "MSI messages\n", MPR_MSI_MAX); 3183c5ac992SScott Long error = mpr_alloc_msi(sc, MPR_MSI_MAX); 3193c5ac992SScott Long } 3203c5ac992SScott Long } 3213c5ac992SScott Long if ((error != 0) || (msgs == 0)) { 3223d96cd78SScott Long /* 3233d96cd78SScott Long * If neither MSI or MSI-X are available, assume legacy INTx. 3243d96cd78SScott Long * This also implies that there will be only 1 queue. 3253d96cd78SScott Long */ 3263c5ac992SScott Long mpr_dprint(sc, MPR_INIT, "Falling back to legacy INTx\n"); 3273d96cd78SScott Long sc->mpr_flags |= MPR_FLAGS_INTX; 3283d96cd78SScott Long msgs = 1; 3293c5ac992SScott Long } else 3303d96cd78SScott Long sc->mpr_flags |= MPR_FLAGS_MSI; 331252b2b4fSScott Long 332252b2b4fSScott Long sc->msi_msgs = msgs; 3333d96cd78SScott Long mpr_dprint(sc, MPR_INIT, "Allocated %d interrupts\n", msgs); 3343d96cd78SScott Long 335252b2b4fSScott Long return (error); 336252b2b4fSScott Long } 337252b2b4fSScott Long 338991554f2SKenneth D. Merry int 339991554f2SKenneth D. Merry mpr_pci_setup_interrupts(struct mpr_softc *sc) 340991554f2SKenneth D. Merry { 341991554f2SKenneth D. Merry device_t dev; 342bec09074SScott Long struct mpr_queue *q; 3433d96cd78SScott Long void *ihandler; 3443d96cd78SScott Long int i, error, rid, initial_rid; 345991554f2SKenneth D. Merry 346991554f2SKenneth D. Merry dev = sc->mpr_dev; 347991554f2SKenneth D. Merry error = ENXIO; 348991554f2SKenneth D. Merry 3493d96cd78SScott Long if (sc->mpr_flags & MPR_FLAGS_INTX) { 3503d96cd78SScott Long initial_rid = 0; 3513d96cd78SScott Long ihandler = mpr_intr; 3523d96cd78SScott Long } else if (sc->mpr_flags & MPR_FLAGS_MSI) { 3533d96cd78SScott Long initial_rid = 1; 3543d96cd78SScott Long ihandler = mpr_intr_msi; 355991554f2SKenneth D. Merry } else { 3563d96cd78SScott Long mpr_dprint(sc, MPR_ERROR|MPR_INIT, 3573d96cd78SScott Long "Unable to set up interrupts\n"); 3583d96cd78SScott Long return (EINVAL); 3593d96cd78SScott Long } 3603d96cd78SScott Long 3613d96cd78SScott Long for (i = 0; i < sc->msi_msgs; i++) { 362bec09074SScott Long q = &sc->queues[i]; 3633d96cd78SScott Long rid = i + initial_rid; 364bec09074SScott Long q->irq_rid = rid; 365bec09074SScott Long q->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 366bec09074SScott Long &q->irq_rid, RF_ACTIVE); 367bec09074SScott Long if (q->irq == NULL) { 3683d96cd78SScott Long mpr_dprint(sc, MPR_ERROR|MPR_INIT, 3693d96cd78SScott Long "Cannot allocate interrupt RID %d\n", rid); 3703c5ac992SScott Long sc->msi_msgs = i; 3713d96cd78SScott Long break; 372991554f2SKenneth D. Merry } 373bec09074SScott Long error = bus_setup_intr(dev, q->irq, 374bec09074SScott Long INTR_TYPE_BIO | INTR_MPSAFE, NULL, ihandler, 375bec09074SScott Long sc, &q->intrhand); 376991554f2SKenneth D. Merry if (error) { 3773d96cd78SScott Long mpr_dprint(sc, MPR_ERROR|MPR_INIT, 3783d96cd78SScott Long "Cannot setup interrupt RID %d\n", rid); 3793c5ac992SScott Long sc->msi_msgs = i; 380991554f2SKenneth D. Merry break; 381991554f2SKenneth D. Merry } 382991554f2SKenneth D. Merry } 383991554f2SKenneth D. Merry 3843d96cd78SScott Long mpr_dprint(sc, MPR_INIT, "Set up %d interrupts\n", sc->msi_msgs); 385991554f2SKenneth D. Merry return (error); 386991554f2SKenneth D. Merry } 387991554f2SKenneth D. Merry 388991554f2SKenneth D. Merry static int 389991554f2SKenneth D. Merry mpr_pci_detach(device_t dev) 390991554f2SKenneth D. Merry { 391991554f2SKenneth D. Merry struct mpr_softc *sc; 392991554f2SKenneth D. Merry int error; 393991554f2SKenneth D. Merry 394991554f2SKenneth D. Merry sc = device_get_softc(dev); 395991554f2SKenneth D. Merry 396991554f2SKenneth D. Merry if ((error = mpr_free(sc)) != 0) 397991554f2SKenneth D. Merry return (error); 398991554f2SKenneth D. Merry 399991554f2SKenneth D. Merry mpr_pci_free(sc); 400991554f2SKenneth D. Merry return (0); 401991554f2SKenneth D. Merry } 402991554f2SKenneth D. Merry 403bec09074SScott Long void 404bec09074SScott Long mpr_pci_free_interrupts(struct mpr_softc *sc) 405bec09074SScott Long { 406bec09074SScott Long struct mpr_queue *q; 407bec09074SScott Long int i; 408bec09074SScott Long 409bec09074SScott Long if (sc->queues == NULL) 410bec09074SScott Long return; 411bec09074SScott Long 412bec09074SScott Long for (i = 0; i < sc->msi_msgs; i++) { 413bec09074SScott Long q = &sc->queues[i]; 414bec09074SScott Long if (q->irq != NULL) { 415bec09074SScott Long bus_teardown_intr(sc->mpr_dev, q->irq, 416bec09074SScott Long q->intrhand); 417bec09074SScott Long bus_release_resource(sc->mpr_dev, SYS_RES_IRQ, 418bec09074SScott Long q->irq_rid, q->irq); 419bec09074SScott Long } 420bec09074SScott Long } 421bec09074SScott Long } 422bec09074SScott Long 423991554f2SKenneth D. Merry static void 424991554f2SKenneth D. Merry mpr_pci_free(struct mpr_softc *sc) 425991554f2SKenneth D. Merry { 426991554f2SKenneth D. Merry 427991554f2SKenneth D. Merry if (sc->mpr_parent_dmat != NULL) { 428991554f2SKenneth D. Merry bus_dma_tag_destroy(sc->mpr_parent_dmat); 429991554f2SKenneth D. Merry } 430991554f2SKenneth D. Merry 431bec09074SScott Long mpr_pci_free_interrupts(sc); 432991554f2SKenneth D. Merry 4333d96cd78SScott Long if (sc->mpr_flags & MPR_FLAGS_MSI) 4343d96cd78SScott Long pci_release_msi(sc->mpr_dev); 435991554f2SKenneth D. Merry 436991554f2SKenneth D. Merry if (sc->mpr_regs_resource != NULL) { 437991554f2SKenneth D. Merry bus_release_resource(sc->mpr_dev, SYS_RES_MEMORY, 438991554f2SKenneth D. Merry sc->mpr_regs_rid, sc->mpr_regs_resource); 439991554f2SKenneth D. Merry } 440991554f2SKenneth D. Merry 441991554f2SKenneth D. Merry return; 442991554f2SKenneth D. Merry } 443991554f2SKenneth D. Merry 444991554f2SKenneth D. Merry static int 445991554f2SKenneth D. Merry mpr_pci_suspend(device_t dev) 446991554f2SKenneth D. Merry { 447991554f2SKenneth D. Merry return (EINVAL); 448991554f2SKenneth D. Merry } 449991554f2SKenneth D. Merry 450991554f2SKenneth D. Merry static int 451991554f2SKenneth D. Merry mpr_pci_resume(device_t dev) 452991554f2SKenneth D. Merry { 453991554f2SKenneth D. Merry return (EINVAL); 454991554f2SKenneth D. Merry } 455991554f2SKenneth D. Merry 456991554f2SKenneth D. Merry static int 457991554f2SKenneth D. Merry mpr_alloc_msix(struct mpr_softc *sc, int msgs) 458991554f2SKenneth D. Merry { 459991554f2SKenneth D. Merry int error; 460991554f2SKenneth D. Merry 461991554f2SKenneth D. Merry error = pci_alloc_msix(sc->mpr_dev, &msgs); 462991554f2SKenneth D. Merry return (error); 463991554f2SKenneth D. Merry } 464991554f2SKenneth D. Merry 465991554f2SKenneth D. Merry static int 466991554f2SKenneth D. Merry mpr_alloc_msi(struct mpr_softc *sc, int msgs) 467991554f2SKenneth D. Merry { 468991554f2SKenneth D. Merry int error; 469991554f2SKenneth D. Merry 470991554f2SKenneth D. Merry error = pci_alloc_msi(sc->mpr_dev, &msgs); 471991554f2SKenneth D. Merry return (error); 472991554f2SKenneth D. Merry } 473991554f2SKenneth D. Merry 474991554f2SKenneth D. Merry int 475991554f2SKenneth D. Merry mpr_pci_restore(struct mpr_softc *sc) 476991554f2SKenneth D. Merry { 477991554f2SKenneth D. Merry struct pci_devinfo *dinfo; 478991554f2SKenneth D. Merry 479991554f2SKenneth D. Merry mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 480991554f2SKenneth D. Merry 481991554f2SKenneth D. Merry dinfo = device_get_ivars(sc->mpr_dev); 482991554f2SKenneth D. Merry if (dinfo == NULL) { 483991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "%s: NULL dinfo\n", __func__); 484991554f2SKenneth D. Merry return (EINVAL); 485991554f2SKenneth D. Merry } 486991554f2SKenneth D. Merry 487991554f2SKenneth D. Merry pci_cfg_restore(sc->mpr_dev, dinfo); 488991554f2SKenneth D. Merry return (0); 489991554f2SKenneth D. Merry } 490