1991554f2SKenneth D. Merry /*- 2991554f2SKenneth D. Merry * Copyright (c) 2009 Yahoo! Inc. 3a2c14879SStephen McConnell * Copyright (c) 2011-2015 LSI Corp. 4a2c14879SStephen McConnell * Copyright (c) 2013-2015 Avago Technologies 5991554f2SKenneth D. Merry * All rights reserved. 6991554f2SKenneth D. Merry * 7991554f2SKenneth D. Merry * Redistribution and use in source and binary forms, with or without 8991554f2SKenneth D. Merry * modification, are permitted provided that the following conditions 9991554f2SKenneth D. Merry * are met: 10991554f2SKenneth D. Merry * 1. Redistributions of source code must retain the above copyright 11991554f2SKenneth D. Merry * notice, this list of conditions and the following disclaimer. 12991554f2SKenneth D. Merry * 2. Redistributions in binary form must reproduce the above copyright 13991554f2SKenneth D. Merry * notice, this list of conditions and the following disclaimer in the 14991554f2SKenneth D. Merry * documentation and/or other materials provided with the distribution. 15991554f2SKenneth D. Merry * 16991554f2SKenneth D. Merry * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17991554f2SKenneth D. Merry * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18991554f2SKenneth D. Merry * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19991554f2SKenneth D. Merry * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20991554f2SKenneth D. Merry * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21991554f2SKenneth D. Merry * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22991554f2SKenneth D. Merry * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23991554f2SKenneth D. Merry * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24991554f2SKenneth D. Merry * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25991554f2SKenneth D. Merry * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26991554f2SKenneth D. Merry * SUCH DAMAGE. 27991554f2SKenneth D. Merry * 28a2c14879SStephen McConnell * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 29a2c14879SStephen McConnell * 30991554f2SKenneth D. Merry */ 31991554f2SKenneth D. Merry 32991554f2SKenneth D. Merry #include <sys/cdefs.h> 33991554f2SKenneth D. Merry __FBSDID("$FreeBSD$"); 34991554f2SKenneth D. Merry 35a2c14879SStephen McConnell /* Communications core for Avago Technologies (LSI) MPT3 */ 36991554f2SKenneth D. Merry 37991554f2SKenneth D. Merry /* TODO Move headers to mprvar */ 38991554f2SKenneth D. Merry #include <sys/types.h> 39991554f2SKenneth D. Merry #include <sys/param.h> 40991554f2SKenneth D. Merry #include <sys/systm.h> 41991554f2SKenneth D. Merry #include <sys/kernel.h> 42991554f2SKenneth D. Merry #include <sys/selinfo.h> 43991554f2SKenneth D. Merry #include <sys/lock.h> 44991554f2SKenneth D. Merry #include <sys/mutex.h> 45991554f2SKenneth D. Merry #include <sys/module.h> 46991554f2SKenneth D. Merry #include <sys/bus.h> 47991554f2SKenneth D. Merry #include <sys/conf.h> 48991554f2SKenneth D. Merry #include <sys/bio.h> 49991554f2SKenneth D. Merry #include <sys/malloc.h> 50991554f2SKenneth D. Merry #include <sys/uio.h> 51991554f2SKenneth D. Merry #include <sys/sysctl.h> 52991554f2SKenneth D. Merry #include <sys/queue.h> 53991554f2SKenneth D. Merry #include <sys/kthread.h> 54991554f2SKenneth D. Merry #include <sys/taskqueue.h> 55991554f2SKenneth D. Merry #include <sys/endian.h> 56991554f2SKenneth D. Merry #include <sys/eventhandler.h> 57991554f2SKenneth D. Merry 58991554f2SKenneth D. Merry #include <machine/bus.h> 59991554f2SKenneth D. Merry #include <machine/resource.h> 60991554f2SKenneth D. Merry #include <sys/rman.h> 61991554f2SKenneth D. Merry #include <sys/proc.h> 62991554f2SKenneth D. Merry 63991554f2SKenneth D. Merry #include <dev/pci/pcivar.h> 64991554f2SKenneth D. Merry 65991554f2SKenneth D. Merry #include <cam/cam.h> 66991554f2SKenneth D. Merry #include <cam/scsi/scsi_all.h> 67991554f2SKenneth D. Merry 68991554f2SKenneth D. Merry #include <dev/mpr/mpi/mpi2_type.h> 69991554f2SKenneth D. Merry #include <dev/mpr/mpi/mpi2.h> 70991554f2SKenneth D. Merry #include <dev/mpr/mpi/mpi2_ioc.h> 71991554f2SKenneth D. Merry #include <dev/mpr/mpi/mpi2_sas.h> 72991554f2SKenneth D. Merry #include <dev/mpr/mpi/mpi2_cnfg.h> 73991554f2SKenneth D. Merry #include <dev/mpr/mpi/mpi2_init.h> 74991554f2SKenneth D. Merry #include <dev/mpr/mpi/mpi2_tool.h> 75991554f2SKenneth D. Merry #include <dev/mpr/mpr_ioctl.h> 76991554f2SKenneth D. Merry #include <dev/mpr/mprvar.h> 77991554f2SKenneth D. Merry #include <dev/mpr/mpr_table.h> 78991554f2SKenneth D. Merry 79991554f2SKenneth D. Merry static int mpr_diag_reset(struct mpr_softc *sc, int sleep_flag); 80991554f2SKenneth D. Merry static int mpr_init_queues(struct mpr_softc *sc); 81991554f2SKenneth D. Merry static int mpr_message_unit_reset(struct mpr_softc *sc, int sleep_flag); 82991554f2SKenneth D. Merry static int mpr_transition_operational(struct mpr_softc *sc); 83991554f2SKenneth D. Merry static int mpr_iocfacts_allocate(struct mpr_softc *sc, uint8_t attaching); 84991554f2SKenneth D. Merry static void mpr_iocfacts_free(struct mpr_softc *sc); 85991554f2SKenneth D. Merry static void mpr_startup(void *arg); 86991554f2SKenneth D. Merry static int mpr_send_iocinit(struct mpr_softc *sc); 87991554f2SKenneth D. Merry static int mpr_alloc_queues(struct mpr_softc *sc); 88991554f2SKenneth D. Merry static int mpr_alloc_replies(struct mpr_softc *sc); 89991554f2SKenneth D. Merry static int mpr_alloc_requests(struct mpr_softc *sc); 90991554f2SKenneth D. Merry static int mpr_attach_log(struct mpr_softc *sc); 91991554f2SKenneth D. Merry static __inline void mpr_complete_command(struct mpr_softc *sc, 92991554f2SKenneth D. Merry struct mpr_command *cm); 93991554f2SKenneth D. Merry static void mpr_dispatch_event(struct mpr_softc *sc, uintptr_t data, 94991554f2SKenneth D. Merry MPI2_EVENT_NOTIFICATION_REPLY *reply); 95991554f2SKenneth D. Merry static void mpr_config_complete(struct mpr_softc *sc, 96991554f2SKenneth D. Merry struct mpr_command *cm); 97991554f2SKenneth D. Merry static void mpr_periodic(void *); 98991554f2SKenneth D. Merry static int mpr_reregister_events(struct mpr_softc *sc); 99991554f2SKenneth D. Merry static void mpr_enqueue_request(struct mpr_softc *sc, 100991554f2SKenneth D. Merry struct mpr_command *cm); 101991554f2SKenneth D. Merry static int mpr_get_iocfacts(struct mpr_softc *sc, 102991554f2SKenneth D. Merry MPI2_IOC_FACTS_REPLY *facts); 103991554f2SKenneth D. Merry static int mpr_wait_db_ack(struct mpr_softc *sc, int timeout, int sleep_flag); 104991554f2SKenneth D. Merry SYSCTL_NODE(_hw, OID_AUTO, mpr, CTLFLAG_RD, 0, "MPR Driver Parameters"); 105991554f2SKenneth D. Merry 106991554f2SKenneth D. Merry MALLOC_DEFINE(M_MPR, "mpr", "mpr driver memory"); 107991554f2SKenneth D. Merry 108991554f2SKenneth D. Merry /* 109991554f2SKenneth D. Merry * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of 110991554f2SKenneth D. Merry * any state and back to its initialization state machine. 111991554f2SKenneth D. Merry */ 112991554f2SKenneth D. Merry static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d }; 113991554f2SKenneth D. Merry 114991554f2SKenneth D. Merry /* 115991554f2SKenneth D. Merry * Added this union to smoothly convert le64toh cm->cm_desc.Words. 116991554f2SKenneth D. Merry * Compiler only supports unint64_t to be passed as an argument. 117991554f2SKenneth D. Merry * Otherwise it will through this error: 118991554f2SKenneth D. Merry * "aggregate value used where an integer was expected" 119991554f2SKenneth D. Merry */ 120991554f2SKenneth D. Merry typedef union _reply_descriptor { 121991554f2SKenneth D. Merry u64 word; 122991554f2SKenneth D. Merry struct { 123991554f2SKenneth D. Merry u32 low; 124991554f2SKenneth D. Merry u32 high; 125991554f2SKenneth D. Merry } u; 126991554f2SKenneth D. Merry }reply_descriptor,address_descriptor; 127991554f2SKenneth D. Merry 128991554f2SKenneth D. Merry /* Rate limit chain-fail messages to 1 per minute */ 129991554f2SKenneth D. Merry static struct timeval mpr_chainfail_interval = { 60, 0 }; 130991554f2SKenneth D. Merry 131991554f2SKenneth D. Merry /* 132991554f2SKenneth D. Merry * sleep_flag can be either CAN_SLEEP or NO_SLEEP. 133991554f2SKenneth D. Merry * If this function is called from process context, it can sleep 134991554f2SKenneth D. Merry * and there is no harm to sleep, in case if this fuction is called 135991554f2SKenneth D. Merry * from Interrupt handler, we can not sleep and need NO_SLEEP flag set. 136991554f2SKenneth D. Merry * based on sleep flags driver will call either msleep, pause or DELAY. 137991554f2SKenneth D. Merry * msleep and pause are of same variant, but pause is used when mpr_mtx 138991554f2SKenneth D. Merry * is not hold by driver. 139991554f2SKenneth D. Merry */ 140991554f2SKenneth D. Merry static int 141991554f2SKenneth D. Merry mpr_diag_reset(struct mpr_softc *sc,int sleep_flag) 142991554f2SKenneth D. Merry { 143991554f2SKenneth D. Merry uint32_t reg; 144991554f2SKenneth D. Merry int i, error, tries = 0; 145991554f2SKenneth D. Merry uint8_t first_wait_done = FALSE; 146991554f2SKenneth D. Merry 147991554f2SKenneth D. Merry mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 148991554f2SKenneth D. Merry 149991554f2SKenneth D. Merry /* Clear any pending interrupts */ 150991554f2SKenneth D. Merry mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 151991554f2SKenneth D. Merry 152991554f2SKenneth D. Merry /* 153991554f2SKenneth D. Merry * Force NO_SLEEP for threads prohibited to sleep 154991554f2SKenneth D. Merry * e.a Thread from interrupt handler are prohibited to sleep. 155991554f2SKenneth D. Merry */ 156991554f2SKenneth D. Merry #if __FreeBSD_version >= 1000029 157991554f2SKenneth D. Merry if (curthread->td_no_sleeping) 158991554f2SKenneth D. Merry #else //__FreeBSD_version < 1000029 159991554f2SKenneth D. Merry if (curthread->td_pflags & TDP_NOSLEEPING) 160991554f2SKenneth D. Merry #endif //__FreeBSD_version >= 1000029 161991554f2SKenneth D. Merry sleep_flag = NO_SLEEP; 162991554f2SKenneth D. Merry 163991554f2SKenneth D. Merry /* Push the magic sequence */ 164991554f2SKenneth D. Merry error = ETIMEDOUT; 165991554f2SKenneth D. Merry while (tries++ < 20) { 166991554f2SKenneth D. Merry for (i = 0; i < sizeof(mpt2_reset_magic); i++) 167991554f2SKenneth D. Merry mpr_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 168991554f2SKenneth D. Merry mpt2_reset_magic[i]); 169991554f2SKenneth D. Merry 170991554f2SKenneth D. Merry /* wait 100 msec */ 171991554f2SKenneth D. Merry if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP) 172991554f2SKenneth D. Merry msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0, 173991554f2SKenneth D. Merry "mprdiag", hz/10); 174991554f2SKenneth D. Merry else if (sleep_flag == CAN_SLEEP) 175991554f2SKenneth D. Merry pause("mprdiag", hz/10); 176991554f2SKenneth D. Merry else 177991554f2SKenneth D. Merry DELAY(100 * 1000); 178991554f2SKenneth D. Merry 179991554f2SKenneth D. Merry reg = mpr_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 180991554f2SKenneth D. Merry if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) { 181991554f2SKenneth D. Merry error = 0; 182991554f2SKenneth D. Merry break; 183991554f2SKenneth D. Merry } 184991554f2SKenneth D. Merry } 185991554f2SKenneth D. Merry if (error) 186991554f2SKenneth D. Merry return (error); 187991554f2SKenneth D. Merry 188991554f2SKenneth D. Merry /* Send the actual reset. XXX need to refresh the reg? */ 189991554f2SKenneth D. Merry mpr_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET, 190991554f2SKenneth D. Merry reg | MPI2_DIAG_RESET_ADAPTER); 191991554f2SKenneth D. Merry 192991554f2SKenneth D. Merry /* Wait up to 300 seconds in 50ms intervals */ 193991554f2SKenneth D. Merry error = ETIMEDOUT; 194991554f2SKenneth D. Merry for (i = 0; i < 6000; i++) { 195991554f2SKenneth D. Merry /* 196991554f2SKenneth D. Merry * Wait 50 msec. If this is the first time through, wait 256 197991554f2SKenneth D. Merry * msec to satisfy Diag Reset timing requirements. 198991554f2SKenneth D. Merry */ 199991554f2SKenneth D. Merry if (first_wait_done) { 200991554f2SKenneth D. Merry if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP) 201991554f2SKenneth D. Merry msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0, 202991554f2SKenneth D. Merry "mprdiag", hz/20); 203991554f2SKenneth D. Merry else if (sleep_flag == CAN_SLEEP) 204991554f2SKenneth D. Merry pause("mprdiag", hz/20); 205991554f2SKenneth D. Merry else 206991554f2SKenneth D. Merry DELAY(50 * 1000); 207991554f2SKenneth D. Merry } else { 208991554f2SKenneth D. Merry DELAY(256 * 1000); 209991554f2SKenneth D. Merry first_wait_done = TRUE; 210991554f2SKenneth D. Merry } 211991554f2SKenneth D. Merry /* 212991554f2SKenneth D. Merry * Check for the RESET_ADAPTER bit to be cleared first, then 213991554f2SKenneth D. Merry * wait for the RESET state to be cleared, which takes a little 214991554f2SKenneth D. Merry * longer. 215991554f2SKenneth D. Merry */ 216991554f2SKenneth D. Merry reg = mpr_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 217991554f2SKenneth D. Merry if (reg & MPI2_DIAG_RESET_ADAPTER) { 218991554f2SKenneth D. Merry continue; 219991554f2SKenneth D. Merry } 220991554f2SKenneth D. Merry reg = mpr_regread(sc, MPI2_DOORBELL_OFFSET); 221991554f2SKenneth D. Merry if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) { 222991554f2SKenneth D. Merry error = 0; 223991554f2SKenneth D. Merry break; 224991554f2SKenneth D. Merry } 225991554f2SKenneth D. Merry } 226991554f2SKenneth D. Merry if (error) 227991554f2SKenneth D. Merry return (error); 228991554f2SKenneth D. Merry 229991554f2SKenneth D. Merry mpr_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0); 230991554f2SKenneth D. Merry 231991554f2SKenneth D. Merry return (0); 232991554f2SKenneth D. Merry } 233991554f2SKenneth D. Merry 234991554f2SKenneth D. Merry static int 235991554f2SKenneth D. Merry mpr_message_unit_reset(struct mpr_softc *sc, int sleep_flag) 236991554f2SKenneth D. Merry { 237991554f2SKenneth D. Merry 238991554f2SKenneth D. Merry MPR_FUNCTRACE(sc); 239991554f2SKenneth D. Merry 240991554f2SKenneth D. Merry mpr_regwrite(sc, MPI2_DOORBELL_OFFSET, 241991554f2SKenneth D. Merry MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET << 242991554f2SKenneth D. Merry MPI2_DOORBELL_FUNCTION_SHIFT); 243991554f2SKenneth D. Merry 244991554f2SKenneth D. Merry if (mpr_wait_db_ack(sc, 5, sleep_flag) != 0) { 245991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "Doorbell handshake failed : <%s>\n", 246991554f2SKenneth D. Merry __func__); 247991554f2SKenneth D. Merry return (ETIMEDOUT); 248991554f2SKenneth D. Merry } 249991554f2SKenneth D. Merry 250991554f2SKenneth D. Merry return (0); 251991554f2SKenneth D. Merry } 252991554f2SKenneth D. Merry 253991554f2SKenneth D. Merry static int 254991554f2SKenneth D. Merry mpr_transition_ready(struct mpr_softc *sc) 255991554f2SKenneth D. Merry { 256991554f2SKenneth D. Merry uint32_t reg, state; 257991554f2SKenneth D. Merry int error, tries = 0; 258991554f2SKenneth D. Merry int sleep_flags; 259991554f2SKenneth D. Merry 260991554f2SKenneth D. Merry MPR_FUNCTRACE(sc); 261991554f2SKenneth D. Merry /* If we are in attach call, do not sleep */ 262991554f2SKenneth D. Merry sleep_flags = (sc->mpr_flags & MPR_FLAGS_ATTACH_DONE) 263991554f2SKenneth D. Merry ? CAN_SLEEP : NO_SLEEP; 264991554f2SKenneth D. Merry 265991554f2SKenneth D. Merry error = 0; 266991554f2SKenneth D. Merry while (tries++ < 1200) { 267991554f2SKenneth D. Merry reg = mpr_regread(sc, MPI2_DOORBELL_OFFSET); 268991554f2SKenneth D. Merry mpr_dprint(sc, MPR_INIT, "Doorbell= 0x%x\n", reg); 269991554f2SKenneth D. Merry 270991554f2SKenneth D. Merry /* 271991554f2SKenneth D. Merry * Ensure the IOC is ready to talk. If it's not, try 272991554f2SKenneth D. Merry * resetting it. 273991554f2SKenneth D. Merry */ 274991554f2SKenneth D. Merry if (reg & MPI2_DOORBELL_USED) { 275991554f2SKenneth D. Merry mpr_diag_reset(sc, sleep_flags); 276991554f2SKenneth D. Merry DELAY(50000); 277991554f2SKenneth D. Merry continue; 278991554f2SKenneth D. Merry } 279991554f2SKenneth D. Merry 280991554f2SKenneth D. Merry /* Is the adapter owned by another peer? */ 281991554f2SKenneth D. Merry if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) == 282991554f2SKenneth D. Merry (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) { 283991554f2SKenneth D. Merry device_printf(sc->mpr_dev, "IOC is under the control " 284991554f2SKenneth D. Merry "of another peer host, aborting initialization.\n"); 285991554f2SKenneth D. Merry return (ENXIO); 286991554f2SKenneth D. Merry } 287991554f2SKenneth D. Merry 288991554f2SKenneth D. Merry state = reg & MPI2_IOC_STATE_MASK; 289991554f2SKenneth D. Merry if (state == MPI2_IOC_STATE_READY) { 290991554f2SKenneth D. Merry /* Ready to go! */ 291991554f2SKenneth D. Merry error = 0; 292991554f2SKenneth D. Merry break; 293991554f2SKenneth D. Merry } else if (state == MPI2_IOC_STATE_FAULT) { 294991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "IOC in fault state 0x%x\n", 295991554f2SKenneth D. Merry state & MPI2_DOORBELL_FAULT_CODE_MASK); 296991554f2SKenneth D. Merry mpr_diag_reset(sc, sleep_flags); 297991554f2SKenneth D. Merry } else if (state == MPI2_IOC_STATE_OPERATIONAL) { 298991554f2SKenneth D. Merry /* Need to take ownership */ 299991554f2SKenneth D. Merry mpr_message_unit_reset(sc, sleep_flags); 300991554f2SKenneth D. Merry } else if (state == MPI2_IOC_STATE_RESET) { 301991554f2SKenneth D. Merry /* Wait a bit, IOC might be in transition */ 302991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, 303991554f2SKenneth D. Merry "IOC in unexpected reset state\n"); 304991554f2SKenneth D. Merry } else { 305991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, 306991554f2SKenneth D. Merry "IOC in unknown state 0x%x\n", state); 307991554f2SKenneth D. Merry error = EINVAL; 308991554f2SKenneth D. Merry break; 309991554f2SKenneth D. Merry } 310991554f2SKenneth D. Merry 311991554f2SKenneth D. Merry /* Wait 50ms for things to settle down. */ 312991554f2SKenneth D. Merry DELAY(50000); 313991554f2SKenneth D. Merry } 314991554f2SKenneth D. Merry 315991554f2SKenneth D. Merry if (error) 316991554f2SKenneth D. Merry device_printf(sc->mpr_dev, "Cannot transition IOC to ready\n"); 317991554f2SKenneth D. Merry 318991554f2SKenneth D. Merry return (error); 319991554f2SKenneth D. Merry } 320991554f2SKenneth D. Merry 321991554f2SKenneth D. Merry static int 322991554f2SKenneth D. Merry mpr_transition_operational(struct mpr_softc *sc) 323991554f2SKenneth D. Merry { 324991554f2SKenneth D. Merry uint32_t reg, state; 325991554f2SKenneth D. Merry int error; 326991554f2SKenneth D. Merry 327991554f2SKenneth D. Merry MPR_FUNCTRACE(sc); 328991554f2SKenneth D. Merry 329991554f2SKenneth D. Merry error = 0; 330991554f2SKenneth D. Merry reg = mpr_regread(sc, MPI2_DOORBELL_OFFSET); 331991554f2SKenneth D. Merry mpr_dprint(sc, MPR_INIT, "Doorbell= 0x%x\n", reg); 332991554f2SKenneth D. Merry 333991554f2SKenneth D. Merry state = reg & MPI2_IOC_STATE_MASK; 334991554f2SKenneth D. Merry if (state != MPI2_IOC_STATE_READY) { 335991554f2SKenneth D. Merry if ((error = mpr_transition_ready(sc)) != 0) { 336991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, 337991554f2SKenneth D. Merry "%s failed to transition ready\n", __func__); 338991554f2SKenneth D. Merry return (error); 339991554f2SKenneth D. Merry } 340991554f2SKenneth D. Merry } 341991554f2SKenneth D. Merry 342991554f2SKenneth D. Merry error = mpr_send_iocinit(sc); 343991554f2SKenneth D. Merry return (error); 344991554f2SKenneth D. Merry } 345991554f2SKenneth D. Merry 346991554f2SKenneth D. Merry /* 347991554f2SKenneth D. Merry * This is called during attach and when re-initializing due to a Diag Reset. 348991554f2SKenneth D. Merry * IOC Facts is used to allocate many of the structures needed by the driver. 349991554f2SKenneth D. Merry * If called from attach, de-allocation is not required because the driver has 350991554f2SKenneth D. Merry * not allocated any structures yet, but if called from a Diag Reset, previously 351991554f2SKenneth D. Merry * allocated structures based on IOC Facts will need to be freed and re- 352991554f2SKenneth D. Merry * allocated bases on the latest IOC Facts. 353991554f2SKenneth D. Merry */ 354991554f2SKenneth D. Merry static int 355991554f2SKenneth D. Merry mpr_iocfacts_allocate(struct mpr_softc *sc, uint8_t attaching) 356991554f2SKenneth D. Merry { 357a2c14879SStephen McConnell int error; 358991554f2SKenneth D. Merry Mpi2IOCFactsReply_t saved_facts; 359991554f2SKenneth D. Merry uint8_t saved_mode, reallocating; 360991554f2SKenneth D. Merry 361991554f2SKenneth D. Merry mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 362991554f2SKenneth D. Merry 363991554f2SKenneth D. Merry /* Save old IOC Facts and then only reallocate if Facts have changed */ 364991554f2SKenneth D. Merry if (!attaching) { 365991554f2SKenneth D. Merry bcopy(sc->facts, &saved_facts, sizeof(MPI2_IOC_FACTS_REPLY)); 366991554f2SKenneth D. Merry } 367991554f2SKenneth D. Merry 368991554f2SKenneth D. Merry /* 369991554f2SKenneth D. Merry * Get IOC Facts. In all cases throughout this function, panic if doing 370991554f2SKenneth D. Merry * a re-initialization and only return the error if attaching so the OS 371991554f2SKenneth D. Merry * can handle it. 372991554f2SKenneth D. Merry */ 373991554f2SKenneth D. Merry if ((error = mpr_get_iocfacts(sc, sc->facts)) != 0) { 374991554f2SKenneth D. Merry if (attaching) { 375991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "%s failed to get IOC Facts " 376991554f2SKenneth D. Merry "with error %d\n", __func__, error); 377991554f2SKenneth D. Merry return (error); 378991554f2SKenneth D. Merry } else { 379991554f2SKenneth D. Merry panic("%s failed to get IOC Facts with error %d\n", 380991554f2SKenneth D. Merry __func__, error); 381991554f2SKenneth D. Merry } 382991554f2SKenneth D. Merry } 383991554f2SKenneth D. Merry 384991554f2SKenneth D. Merry mpr_print_iocfacts(sc, sc->facts); 385991554f2SKenneth D. Merry 386991554f2SKenneth D. Merry snprintf(sc->fw_version, sizeof(sc->fw_version), 387991554f2SKenneth D. Merry "%02d.%02d.%02d.%02d", 388991554f2SKenneth D. Merry sc->facts->FWVersion.Struct.Major, 389991554f2SKenneth D. Merry sc->facts->FWVersion.Struct.Minor, 390991554f2SKenneth D. Merry sc->facts->FWVersion.Struct.Unit, 391991554f2SKenneth D. Merry sc->facts->FWVersion.Struct.Dev); 392991554f2SKenneth D. Merry 393991554f2SKenneth D. Merry mpr_printf(sc, "Firmware: %s, Driver: %s\n", sc->fw_version, 394991554f2SKenneth D. Merry MPR_DRIVER_VERSION); 395991554f2SKenneth D. Merry mpr_printf(sc, "IOCCapabilities: %b\n", sc->facts->IOCCapabilities, 396991554f2SKenneth D. Merry "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf" 397991554f2SKenneth D. Merry "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR" 398991554f2SKenneth D. Merry "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc"); 399991554f2SKenneth D. Merry 400991554f2SKenneth D. Merry /* 401991554f2SKenneth D. Merry * If the chip doesn't support event replay then a hard reset will be 402991554f2SKenneth D. Merry * required to trigger a full discovery. Do the reset here then 403991554f2SKenneth D. Merry * retransition to Ready. A hard reset might have already been done, 404991554f2SKenneth D. Merry * but it doesn't hurt to do it again. Only do this if attaching, not 405991554f2SKenneth D. Merry * for a Diag Reset. 406991554f2SKenneth D. Merry */ 407991554f2SKenneth D. Merry if (attaching) { 408991554f2SKenneth D. Merry if ((sc->facts->IOCCapabilities & 409991554f2SKenneth D. Merry MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0) { 410991554f2SKenneth D. Merry mpr_diag_reset(sc, NO_SLEEP); 411991554f2SKenneth D. Merry if ((error = mpr_transition_ready(sc)) != 0) { 412991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "%s failed to " 413991554f2SKenneth D. Merry "transition to ready with error %d\n", 414991554f2SKenneth D. Merry __func__, error); 415991554f2SKenneth D. Merry return (error); 416991554f2SKenneth D. Merry } 417991554f2SKenneth D. Merry } 418991554f2SKenneth D. Merry } 419991554f2SKenneth D. Merry 420991554f2SKenneth D. Merry /* 421991554f2SKenneth D. Merry * Set flag if IR Firmware is loaded. If the RAID Capability has 422991554f2SKenneth D. Merry * changed from the previous IOC Facts, log a warning, but only if 423991554f2SKenneth D. Merry * checking this after a Diag Reset and not during attach. 424991554f2SKenneth D. Merry */ 425991554f2SKenneth D. Merry saved_mode = sc->ir_firmware; 426991554f2SKenneth D. Merry if (sc->facts->IOCCapabilities & 427991554f2SKenneth D. Merry MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) 428991554f2SKenneth D. Merry sc->ir_firmware = 1; 429991554f2SKenneth D. Merry if (!attaching) { 430991554f2SKenneth D. Merry if (sc->ir_firmware != saved_mode) { 431991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "%s new IR/IT mode in IOC " 432991554f2SKenneth D. Merry "Facts does not match previous mode\n", __func__); 433991554f2SKenneth D. Merry } 434991554f2SKenneth D. Merry } 435991554f2SKenneth D. Merry 436991554f2SKenneth D. Merry /* Only deallocate and reallocate if relevant IOC Facts have changed */ 437991554f2SKenneth D. Merry reallocating = FALSE; 438991554f2SKenneth D. Merry if ((!attaching) && 439991554f2SKenneth D. Merry ((saved_facts.MsgVersion != sc->facts->MsgVersion) || 440991554f2SKenneth D. Merry (saved_facts.HeaderVersion != sc->facts->HeaderVersion) || 441991554f2SKenneth D. Merry (saved_facts.MaxChainDepth != sc->facts->MaxChainDepth) || 442991554f2SKenneth D. Merry (saved_facts.RequestCredit != sc->facts->RequestCredit) || 443991554f2SKenneth D. Merry (saved_facts.ProductID != sc->facts->ProductID) || 444991554f2SKenneth D. Merry (saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) || 445991554f2SKenneth D. Merry (saved_facts.IOCRequestFrameSize != 446991554f2SKenneth D. Merry sc->facts->IOCRequestFrameSize) || 447991554f2SKenneth D. Merry (saved_facts.MaxTargets != sc->facts->MaxTargets) || 448991554f2SKenneth D. Merry (saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) || 449991554f2SKenneth D. Merry (saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) || 450991554f2SKenneth D. Merry (saved_facts.HighPriorityCredit != sc->facts->HighPriorityCredit) || 451991554f2SKenneth D. Merry (saved_facts.MaxReplyDescriptorPostQueueDepth != 452991554f2SKenneth D. Merry sc->facts->MaxReplyDescriptorPostQueueDepth) || 453991554f2SKenneth D. Merry (saved_facts.ReplyFrameSize != sc->facts->ReplyFrameSize) || 454991554f2SKenneth D. Merry (saved_facts.MaxVolumes != sc->facts->MaxVolumes) || 455991554f2SKenneth D. Merry (saved_facts.MaxPersistentEntries != 456991554f2SKenneth D. Merry sc->facts->MaxPersistentEntries))) { 457991554f2SKenneth D. Merry reallocating = TRUE; 458991554f2SKenneth D. Merry } 459991554f2SKenneth D. Merry 460991554f2SKenneth D. Merry /* 461991554f2SKenneth D. Merry * Some things should be done if attaching or re-allocating after a Diag 462991554f2SKenneth D. Merry * Reset, but are not needed after a Diag Reset if the FW has not 463991554f2SKenneth D. Merry * changed. 464991554f2SKenneth D. Merry */ 465991554f2SKenneth D. Merry if (attaching || reallocating) { 466991554f2SKenneth D. Merry /* 467991554f2SKenneth D. Merry * Check if controller supports FW diag buffers and set flag to 468991554f2SKenneth D. Merry * enable each type. 469991554f2SKenneth D. Merry */ 470991554f2SKenneth D. Merry if (sc->facts->IOCCapabilities & 471991554f2SKenneth D. Merry MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) 472991554f2SKenneth D. Merry sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE]. 473991554f2SKenneth D. Merry enabled = TRUE; 474991554f2SKenneth D. Merry if (sc->facts->IOCCapabilities & 475991554f2SKenneth D. Merry MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) 476991554f2SKenneth D. Merry sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT]. 477991554f2SKenneth D. Merry enabled = TRUE; 478991554f2SKenneth D. Merry if (sc->facts->IOCCapabilities & 479991554f2SKenneth D. Merry MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) 480991554f2SKenneth D. Merry sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED]. 481991554f2SKenneth D. Merry enabled = TRUE; 482991554f2SKenneth D. Merry 483991554f2SKenneth D. Merry /* 484991554f2SKenneth D. Merry * Set flag if EEDP is supported and if TLR is supported. 485991554f2SKenneth D. Merry */ 486991554f2SKenneth D. Merry if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) 487991554f2SKenneth D. Merry sc->eedp_enabled = TRUE; 488991554f2SKenneth D. Merry if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) 489991554f2SKenneth D. Merry sc->control_TLR = TRUE; 490991554f2SKenneth D. Merry 491991554f2SKenneth D. Merry /* 492991554f2SKenneth D. Merry * Size the queues. Since the reply queues always need one free 493991554f2SKenneth D. Merry * entry, we'll just deduct one reply message here. 494991554f2SKenneth D. Merry */ 495991554f2SKenneth D. Merry sc->num_reqs = MIN(MPR_REQ_FRAMES, sc->facts->RequestCredit); 496991554f2SKenneth D. Merry sc->num_replies = MIN(MPR_REPLY_FRAMES + MPR_EVT_REPLY_FRAMES, 497991554f2SKenneth D. Merry sc->facts->MaxReplyDescriptorPostQueueDepth) - 1; 498991554f2SKenneth D. Merry 499991554f2SKenneth D. Merry /* 500991554f2SKenneth D. Merry * Initialize all Tail Queues 501991554f2SKenneth D. Merry */ 502991554f2SKenneth D. Merry TAILQ_INIT(&sc->req_list); 503991554f2SKenneth D. Merry TAILQ_INIT(&sc->high_priority_req_list); 504991554f2SKenneth D. Merry TAILQ_INIT(&sc->chain_list); 505991554f2SKenneth D. Merry TAILQ_INIT(&sc->tm_list); 506991554f2SKenneth D. Merry } 507991554f2SKenneth D. Merry 508991554f2SKenneth D. Merry /* 509991554f2SKenneth D. Merry * If doing a Diag Reset and the FW is significantly different 510991554f2SKenneth D. Merry * (reallocating will be set above in IOC Facts comparison), then all 511991554f2SKenneth D. Merry * buffers based on the IOC Facts will need to be freed before they are 512991554f2SKenneth D. Merry * reallocated. 513991554f2SKenneth D. Merry */ 514991554f2SKenneth D. Merry if (reallocating) { 515991554f2SKenneth D. Merry mpr_iocfacts_free(sc); 516a2c14879SStephen McConnell mprsas_realloc_targets(sc, saved_facts.MaxTargets); 517991554f2SKenneth D. Merry } 518991554f2SKenneth D. Merry 519991554f2SKenneth D. Merry /* 520991554f2SKenneth D. Merry * Any deallocation has been completed. Now start reallocating 521991554f2SKenneth D. Merry * if needed. Will only need to reallocate if attaching or if the new 522991554f2SKenneth D. Merry * IOC Facts are different from the previous IOC Facts after a Diag 523991554f2SKenneth D. Merry * Reset. Targets have already been allocated above if needed. 524991554f2SKenneth D. Merry */ 525991554f2SKenneth D. Merry if (attaching || reallocating) { 526991554f2SKenneth D. Merry if (((error = mpr_alloc_queues(sc)) != 0) || 527991554f2SKenneth D. Merry ((error = mpr_alloc_replies(sc)) != 0) || 528991554f2SKenneth D. Merry ((error = mpr_alloc_requests(sc)) != 0)) { 529991554f2SKenneth D. Merry if (attaching ) { 530991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "%s failed to alloc " 531991554f2SKenneth D. Merry "queues with error %d\n", __func__, error); 532991554f2SKenneth D. Merry mpr_free(sc); 533991554f2SKenneth D. Merry return (error); 534991554f2SKenneth D. Merry } else { 535991554f2SKenneth D. Merry panic("%s failed to alloc queues with error " 536991554f2SKenneth D. Merry "%d\n", __func__, error); 537991554f2SKenneth D. Merry } 538991554f2SKenneth D. Merry } 539991554f2SKenneth D. Merry } 540991554f2SKenneth D. Merry 541991554f2SKenneth D. Merry /* Always initialize the queues */ 542991554f2SKenneth D. Merry bzero(sc->free_queue, sc->fqdepth * 4); 543991554f2SKenneth D. Merry mpr_init_queues(sc); 544991554f2SKenneth D. Merry 545991554f2SKenneth D. Merry /* 546991554f2SKenneth D. Merry * Always get the chip out of the reset state, but only panic if not 547991554f2SKenneth D. Merry * attaching. If attaching and there is an error, that is handled by 548991554f2SKenneth D. Merry * the OS. 549991554f2SKenneth D. Merry */ 550991554f2SKenneth D. Merry error = mpr_transition_operational(sc); 551991554f2SKenneth D. Merry if (error != 0) { 552991554f2SKenneth D. Merry if (attaching) { 553991554f2SKenneth D. Merry mpr_printf(sc, "%s failed to transition to " 554991554f2SKenneth D. Merry "operational with error %d\n", __func__, error); 555991554f2SKenneth D. Merry mpr_free(sc); 556991554f2SKenneth D. Merry return (error); 557991554f2SKenneth D. Merry } else { 558991554f2SKenneth D. Merry panic("%s failed to transition to operational with " 559991554f2SKenneth D. Merry "error %d\n", __func__, error); 560991554f2SKenneth D. Merry } 561991554f2SKenneth D. Merry } 562991554f2SKenneth D. Merry 563991554f2SKenneth D. Merry /* 564991554f2SKenneth D. Merry * Finish the queue initialization. 565991554f2SKenneth D. Merry * These are set here instead of in mpr_init_queues() because the 566991554f2SKenneth D. Merry * IOC resets these values during the state transition in 567991554f2SKenneth D. Merry * mpr_transition_operational(). The free index is set to 1 568991554f2SKenneth D. Merry * because the corresponding index in the IOC is set to 0, and the 569991554f2SKenneth D. Merry * IOC treats the queues as full if both are set to the same value. 570991554f2SKenneth D. Merry * Hence the reason that the queue can't hold all of the possible 571991554f2SKenneth D. Merry * replies. 572991554f2SKenneth D. Merry */ 573991554f2SKenneth D. Merry sc->replypostindex = 0; 574991554f2SKenneth D. Merry mpr_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); 575991554f2SKenneth D. Merry mpr_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0); 576991554f2SKenneth D. Merry 577991554f2SKenneth D. Merry /* 578991554f2SKenneth D. Merry * Attach the subsystems so they can prepare their event masks. 579991554f2SKenneth D. Merry */ 580991554f2SKenneth D. Merry /* XXX Should be dynamic so that IM/IR and user modules can attach */ 581991554f2SKenneth D. Merry if (attaching) { 582991554f2SKenneth D. Merry if (((error = mpr_attach_log(sc)) != 0) || 583991554f2SKenneth D. Merry ((error = mpr_attach_sas(sc)) != 0) || 584991554f2SKenneth D. Merry ((error = mpr_attach_user(sc)) != 0)) { 585991554f2SKenneth D. Merry mpr_printf(sc, "%s failed to attach all subsystems: " 586991554f2SKenneth D. Merry "error %d\n", __func__, error); 587991554f2SKenneth D. Merry mpr_free(sc); 588991554f2SKenneth D. Merry return (error); 589991554f2SKenneth D. Merry } 590991554f2SKenneth D. Merry 591991554f2SKenneth D. Merry if ((error = mpr_pci_setup_interrupts(sc)) != 0) { 592991554f2SKenneth D. Merry mpr_printf(sc, "%s failed to setup interrupts\n", 593991554f2SKenneth D. Merry __func__); 594991554f2SKenneth D. Merry mpr_free(sc); 595991554f2SKenneth D. Merry return (error); 596991554f2SKenneth D. Merry } 597991554f2SKenneth D. Merry } 598991554f2SKenneth D. Merry 599991554f2SKenneth D. Merry return (error); 600991554f2SKenneth D. Merry } 601991554f2SKenneth D. Merry 602991554f2SKenneth D. Merry /* 603991554f2SKenneth D. Merry * This is called if memory is being free (during detach for example) and when 604991554f2SKenneth D. Merry * buffers need to be reallocated due to a Diag Reset. 605991554f2SKenneth D. Merry */ 606991554f2SKenneth D. Merry static void 607991554f2SKenneth D. Merry mpr_iocfacts_free(struct mpr_softc *sc) 608991554f2SKenneth D. Merry { 609991554f2SKenneth D. Merry struct mpr_command *cm; 610991554f2SKenneth D. Merry int i; 611991554f2SKenneth D. Merry 612991554f2SKenneth D. Merry mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 613991554f2SKenneth D. Merry 614991554f2SKenneth D. Merry if (sc->free_busaddr != 0) 615991554f2SKenneth D. Merry bus_dmamap_unload(sc->queues_dmat, sc->queues_map); 616991554f2SKenneth D. Merry if (sc->free_queue != NULL) 617991554f2SKenneth D. Merry bus_dmamem_free(sc->queues_dmat, sc->free_queue, 618991554f2SKenneth D. Merry sc->queues_map); 619991554f2SKenneth D. Merry if (sc->queues_dmat != NULL) 620991554f2SKenneth D. Merry bus_dma_tag_destroy(sc->queues_dmat); 621991554f2SKenneth D. Merry 622991554f2SKenneth D. Merry if (sc->chain_busaddr != 0) 623991554f2SKenneth D. Merry bus_dmamap_unload(sc->chain_dmat, sc->chain_map); 624991554f2SKenneth D. Merry if (sc->chain_frames != NULL) 625991554f2SKenneth D. Merry bus_dmamem_free(sc->chain_dmat, sc->chain_frames, 626991554f2SKenneth D. Merry sc->chain_map); 627991554f2SKenneth D. Merry if (sc->chain_dmat != NULL) 628991554f2SKenneth D. Merry bus_dma_tag_destroy(sc->chain_dmat); 629991554f2SKenneth D. Merry 630991554f2SKenneth D. Merry if (sc->sense_busaddr != 0) 631991554f2SKenneth D. Merry bus_dmamap_unload(sc->sense_dmat, sc->sense_map); 632991554f2SKenneth D. Merry if (sc->sense_frames != NULL) 633991554f2SKenneth D. Merry bus_dmamem_free(sc->sense_dmat, sc->sense_frames, 634991554f2SKenneth D. Merry sc->sense_map); 635991554f2SKenneth D. Merry if (sc->sense_dmat != NULL) 636991554f2SKenneth D. Merry bus_dma_tag_destroy(sc->sense_dmat); 637991554f2SKenneth D. Merry 638991554f2SKenneth D. Merry if (sc->reply_busaddr != 0) 639991554f2SKenneth D. Merry bus_dmamap_unload(sc->reply_dmat, sc->reply_map); 640991554f2SKenneth D. Merry if (sc->reply_frames != NULL) 641991554f2SKenneth D. Merry bus_dmamem_free(sc->reply_dmat, sc->reply_frames, 642991554f2SKenneth D. Merry sc->reply_map); 643991554f2SKenneth D. Merry if (sc->reply_dmat != NULL) 644991554f2SKenneth D. Merry bus_dma_tag_destroy(sc->reply_dmat); 645991554f2SKenneth D. Merry 646991554f2SKenneth D. Merry if (sc->req_busaddr != 0) 647991554f2SKenneth D. Merry bus_dmamap_unload(sc->req_dmat, sc->req_map); 648991554f2SKenneth D. Merry if (sc->req_frames != NULL) 649991554f2SKenneth D. Merry bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map); 650991554f2SKenneth D. Merry if (sc->req_dmat != NULL) 651991554f2SKenneth D. Merry bus_dma_tag_destroy(sc->req_dmat); 652991554f2SKenneth D. Merry 653991554f2SKenneth D. Merry if (sc->chains != NULL) 654991554f2SKenneth D. Merry free(sc->chains, M_MPR); 655991554f2SKenneth D. Merry if (sc->commands != NULL) { 656991554f2SKenneth D. Merry for (i = 1; i < sc->num_reqs; i++) { 657991554f2SKenneth D. Merry cm = &sc->commands[i]; 658991554f2SKenneth D. Merry bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap); 659991554f2SKenneth D. Merry } 660991554f2SKenneth D. Merry free(sc->commands, M_MPR); 661991554f2SKenneth D. Merry } 662991554f2SKenneth D. Merry if (sc->buffer_dmat != NULL) 663991554f2SKenneth D. Merry bus_dma_tag_destroy(sc->buffer_dmat); 664991554f2SKenneth D. Merry } 665991554f2SKenneth D. Merry 666991554f2SKenneth D. Merry /* 667991554f2SKenneth D. Merry * The terms diag reset and hard reset are used interchangeably in the MPI 668991554f2SKenneth D. Merry * docs to mean resetting the controller chip. In this code diag reset 669991554f2SKenneth D. Merry * cleans everything up, and the hard reset function just sends the reset 670991554f2SKenneth D. Merry * sequence to the chip. This should probably be refactored so that every 671991554f2SKenneth D. Merry * subsystem gets a reset notification of some sort, and can clean up 672991554f2SKenneth D. Merry * appropriately. 673991554f2SKenneth D. Merry */ 674991554f2SKenneth D. Merry int 675991554f2SKenneth D. Merry mpr_reinit(struct mpr_softc *sc) 676991554f2SKenneth D. Merry { 677991554f2SKenneth D. Merry int error; 678991554f2SKenneth D. Merry struct mprsas_softc *sassc; 679991554f2SKenneth D. Merry 680991554f2SKenneth D. Merry sassc = sc->sassc; 681991554f2SKenneth D. Merry 682991554f2SKenneth D. Merry MPR_FUNCTRACE(sc); 683991554f2SKenneth D. Merry 684991554f2SKenneth D. Merry mtx_assert(&sc->mpr_mtx, MA_OWNED); 685991554f2SKenneth D. Merry 686991554f2SKenneth D. Merry if (sc->mpr_flags & MPR_FLAGS_DIAGRESET) { 687991554f2SKenneth D. Merry mpr_dprint(sc, MPR_INIT, "%s reset already in progress\n", 688991554f2SKenneth D. Merry __func__); 689991554f2SKenneth D. Merry return 0; 690991554f2SKenneth D. Merry } 691991554f2SKenneth D. Merry 692991554f2SKenneth D. Merry mpr_dprint(sc, MPR_INFO, "Reinitializing controller,\n"); 693991554f2SKenneth D. Merry /* make sure the completion callbacks can recognize they're getting 694991554f2SKenneth D. Merry * a NULL cm_reply due to a reset. 695991554f2SKenneth D. Merry */ 696991554f2SKenneth D. Merry sc->mpr_flags |= MPR_FLAGS_DIAGRESET; 697991554f2SKenneth D. Merry 698991554f2SKenneth D. Merry /* 699991554f2SKenneth D. Merry * Mask interrupts here. 700991554f2SKenneth D. Merry */ 701991554f2SKenneth D. Merry mpr_dprint(sc, MPR_INIT, "%s mask interrupts\n", __func__); 702991554f2SKenneth D. Merry mpr_mask_intr(sc); 703991554f2SKenneth D. Merry 704991554f2SKenneth D. Merry error = mpr_diag_reset(sc, CAN_SLEEP); 705991554f2SKenneth D. Merry if (error != 0) { 706991554f2SKenneth D. Merry panic("%s hard reset failed with error %d\n", __func__, error); 707991554f2SKenneth D. Merry } 708991554f2SKenneth D. Merry 709991554f2SKenneth D. Merry /* Restore the PCI state, including the MSI-X registers */ 710991554f2SKenneth D. Merry mpr_pci_restore(sc); 711991554f2SKenneth D. Merry 712991554f2SKenneth D. Merry /* Give the I/O subsystem special priority to get itself prepared */ 713991554f2SKenneth D. Merry mprsas_handle_reinit(sc); 714991554f2SKenneth D. Merry 715991554f2SKenneth D. Merry /* 716991554f2SKenneth D. Merry * Get IOC Facts and allocate all structures based on this information. 717991554f2SKenneth D. Merry * The attach function will also call mpr_iocfacts_allocate at startup. 718991554f2SKenneth D. Merry * If relevant values have changed in IOC Facts, this function will free 719991554f2SKenneth D. Merry * all of the memory based on IOC Facts and reallocate that memory. 720991554f2SKenneth D. Merry */ 721991554f2SKenneth D. Merry if ((error = mpr_iocfacts_allocate(sc, FALSE)) != 0) { 722991554f2SKenneth D. Merry panic("%s IOC Facts based allocation failed with error %d\n", 723991554f2SKenneth D. Merry __func__, error); 724991554f2SKenneth D. Merry } 725991554f2SKenneth D. Merry 726991554f2SKenneth D. Merry /* 727991554f2SKenneth D. Merry * Mapping structures will be re-allocated after getting IOC Page8, so 728991554f2SKenneth D. Merry * free these structures here. 729991554f2SKenneth D. Merry */ 730991554f2SKenneth D. Merry mpr_mapping_exit(sc); 731991554f2SKenneth D. Merry 732991554f2SKenneth D. Merry /* 733991554f2SKenneth D. Merry * The static page function currently read is IOC Page8. Others can be 734991554f2SKenneth D. Merry * added in future. It's possible that the values in IOC Page8 have 735991554f2SKenneth D. Merry * changed after a Diag Reset due to user modification, so always read 736991554f2SKenneth D. Merry * these. Interrupts are masked, so unmask them before getting config 737991554f2SKenneth D. Merry * pages. 738991554f2SKenneth D. Merry */ 739991554f2SKenneth D. Merry mpr_unmask_intr(sc); 740991554f2SKenneth D. Merry sc->mpr_flags &= ~MPR_FLAGS_DIAGRESET; 741991554f2SKenneth D. Merry mpr_base_static_config_pages(sc); 742991554f2SKenneth D. Merry 743991554f2SKenneth D. Merry /* 744991554f2SKenneth D. Merry * Some mapping info is based in IOC Page8 data, so re-initialize the 745991554f2SKenneth D. Merry * mapping tables. 746991554f2SKenneth D. Merry */ 747991554f2SKenneth D. Merry mpr_mapping_initialize(sc); 748991554f2SKenneth D. Merry 749991554f2SKenneth D. Merry /* 750991554f2SKenneth D. Merry * Restart will reload the event masks clobbered by the reset, and 751991554f2SKenneth D. Merry * then enable the port. 752991554f2SKenneth D. Merry */ 753991554f2SKenneth D. Merry mpr_reregister_events(sc); 754991554f2SKenneth D. Merry 755991554f2SKenneth D. Merry /* the end of discovery will release the simq, so we're done. */ 756991554f2SKenneth D. Merry mpr_dprint(sc, MPR_INFO, "%s finished sc %p post %u free %u\n", 757991554f2SKenneth D. Merry __func__, sc, sc->replypostindex, sc->replyfreeindex); 758991554f2SKenneth D. Merry mprsas_release_simq_reinit(sassc); 759991554f2SKenneth D. Merry 760991554f2SKenneth D. Merry return 0; 761991554f2SKenneth D. Merry } 762991554f2SKenneth D. Merry 763991554f2SKenneth D. Merry /* Wait for the chip to ACK a word that we've put into its FIFO 764991554f2SKenneth D. Merry * Wait for <timeout> seconds. In single loop wait for busy loop 765991554f2SKenneth D. Merry * for 500 microseconds. 766991554f2SKenneth D. Merry * Total is [ 0.5 * (2000 * <timeout>) ] in miliseconds. 767991554f2SKenneth D. Merry * */ 768991554f2SKenneth D. Merry static int 769991554f2SKenneth D. Merry mpr_wait_db_ack(struct mpr_softc *sc, int timeout, int sleep_flag) 770991554f2SKenneth D. Merry { 771991554f2SKenneth D. Merry u32 cntdn, count; 772991554f2SKenneth D. Merry u32 int_status; 773991554f2SKenneth D. Merry u32 doorbell; 774991554f2SKenneth D. Merry 775991554f2SKenneth D. Merry count = 0; 776991554f2SKenneth D. Merry cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 777991554f2SKenneth D. Merry do { 778991554f2SKenneth D. Merry int_status = mpr_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 779991554f2SKenneth D. Merry if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 780991554f2SKenneth D. Merry mpr_dprint(sc, MPR_INIT, "%s: successful count(%d), " 781991554f2SKenneth D. Merry "timeout(%d)\n", __func__, count, timeout); 782991554f2SKenneth D. Merry return 0; 783991554f2SKenneth D. Merry } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 784991554f2SKenneth D. Merry doorbell = mpr_regread(sc, MPI2_DOORBELL_OFFSET); 785991554f2SKenneth D. Merry if ((doorbell & MPI2_IOC_STATE_MASK) == 786991554f2SKenneth D. Merry MPI2_IOC_STATE_FAULT) { 787991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, 788991554f2SKenneth D. Merry "fault_state(0x%04x)!\n", doorbell); 789991554f2SKenneth D. Merry return (EFAULT); 790991554f2SKenneth D. Merry } 791991554f2SKenneth D. Merry } else if (int_status == 0xFFFFFFFF) 792991554f2SKenneth D. Merry goto out; 793991554f2SKenneth D. Merry 794991554f2SKenneth D. Merry /* 795991554f2SKenneth D. Merry * If it can sleep, sleep for 1 milisecond, else busy loop for 796991554f2SKenneth D. Merry * 0.5 milisecond 797991554f2SKenneth D. Merry */ 798991554f2SKenneth D. Merry if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP) 799a2c14879SStephen McConnell msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0, "mprdba", 800a2c14879SStephen McConnell hz/1000); 801991554f2SKenneth D. Merry else if (sleep_flag == CAN_SLEEP) 802991554f2SKenneth D. Merry pause("mprdba", hz/1000); 803991554f2SKenneth D. Merry else 804991554f2SKenneth D. Merry DELAY(500); 805991554f2SKenneth D. Merry count++; 806991554f2SKenneth D. Merry } while (--cntdn); 807991554f2SKenneth D. Merry 808991554f2SKenneth D. Merry out: 809991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "%s: failed due to timeout count(%d), " 810991554f2SKenneth D. Merry "int_status(%x)!\n", __func__, count, int_status); 811991554f2SKenneth D. Merry return (ETIMEDOUT); 812991554f2SKenneth D. Merry } 813991554f2SKenneth D. Merry 814991554f2SKenneth D. Merry /* Wait for the chip to signal that the next word in its FIFO can be fetched */ 815991554f2SKenneth D. Merry static int 816991554f2SKenneth D. Merry mpr_wait_db_int(struct mpr_softc *sc) 817991554f2SKenneth D. Merry { 818991554f2SKenneth D. Merry int retry; 819991554f2SKenneth D. Merry 820991554f2SKenneth D. Merry for (retry = 0; retry < MPR_DB_MAX_WAIT; retry++) { 821991554f2SKenneth D. Merry if ((mpr_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) & 822991554f2SKenneth D. Merry MPI2_HIS_IOC2SYS_DB_STATUS) != 0) 823991554f2SKenneth D. Merry return (0); 824991554f2SKenneth D. Merry DELAY(2000); 825991554f2SKenneth D. Merry } 826991554f2SKenneth D. Merry return (ETIMEDOUT); 827991554f2SKenneth D. Merry } 828991554f2SKenneth D. Merry 829991554f2SKenneth D. Merry /* Step through the synchronous command state machine, i.e. "Doorbell mode" */ 830991554f2SKenneth D. Merry static int 831991554f2SKenneth D. Merry mpr_request_sync(struct mpr_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply, 832991554f2SKenneth D. Merry int req_sz, int reply_sz, int timeout) 833991554f2SKenneth D. Merry { 834991554f2SKenneth D. Merry uint32_t *data32; 835991554f2SKenneth D. Merry uint16_t *data16; 836991554f2SKenneth D. Merry int i, count, ioc_sz, residual; 837991554f2SKenneth D. Merry int sleep_flags = CAN_SLEEP; 838991554f2SKenneth D. Merry 839991554f2SKenneth D. Merry #if __FreeBSD_version >= 1000029 840991554f2SKenneth D. Merry if (curthread->td_no_sleeping) 841991554f2SKenneth D. Merry #else //__FreeBSD_version < 1000029 842991554f2SKenneth D. Merry if (curthread->td_pflags & TDP_NOSLEEPING) 843991554f2SKenneth D. Merry #endif //__FreeBSD_version >= 1000029 844991554f2SKenneth D. Merry sleep_flags = NO_SLEEP; 845991554f2SKenneth D. Merry 846991554f2SKenneth D. Merry /* Step 1 */ 847991554f2SKenneth D. Merry mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 848991554f2SKenneth D. Merry 849991554f2SKenneth D. Merry /* Step 2 */ 850991554f2SKenneth D. Merry if (mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 851991554f2SKenneth D. Merry return (EBUSY); 852991554f2SKenneth D. Merry 853991554f2SKenneth D. Merry /* Step 3 854991554f2SKenneth D. Merry * Announce that a message is coming through the doorbell. Messages 855991554f2SKenneth D. Merry * are pushed at 32bit words, so round up if needed. 856991554f2SKenneth D. Merry */ 857991554f2SKenneth D. Merry count = (req_sz + 3) / 4; 858991554f2SKenneth D. Merry mpr_regwrite(sc, MPI2_DOORBELL_OFFSET, 859991554f2SKenneth D. Merry (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) | 860991554f2SKenneth D. Merry (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT)); 861991554f2SKenneth D. Merry 862991554f2SKenneth D. Merry /* Step 4 */ 863991554f2SKenneth D. Merry if (mpr_wait_db_int(sc) || 864991554f2SKenneth D. Merry (mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) { 865991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "Doorbell failed to activate\n"); 866991554f2SKenneth D. Merry return (ENXIO); 867991554f2SKenneth D. Merry } 868991554f2SKenneth D. Merry mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 869991554f2SKenneth D. Merry if (mpr_wait_db_ack(sc, 5, sleep_flags) != 0) { 870991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "Doorbell handshake failed\n"); 871991554f2SKenneth D. Merry return (ENXIO); 872991554f2SKenneth D. Merry } 873991554f2SKenneth D. Merry 874991554f2SKenneth D. Merry /* Step 5 */ 875991554f2SKenneth D. Merry /* Clock out the message data synchronously in 32-bit dwords*/ 876991554f2SKenneth D. Merry data32 = (uint32_t *)req; 877991554f2SKenneth D. Merry for (i = 0; i < count; i++) { 878991554f2SKenneth D. Merry mpr_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i])); 879991554f2SKenneth D. Merry if (mpr_wait_db_ack(sc, 5, sleep_flags) != 0) { 880991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, 881991554f2SKenneth D. Merry "Timeout while writing doorbell\n"); 882991554f2SKenneth D. Merry return (ENXIO); 883991554f2SKenneth D. Merry } 884991554f2SKenneth D. Merry } 885991554f2SKenneth D. Merry 886991554f2SKenneth D. Merry /* Step 6 */ 887991554f2SKenneth D. Merry /* Clock in the reply in 16-bit words. The total length of the 888991554f2SKenneth D. Merry * message is always in the 4th byte, so clock out the first 2 words 889991554f2SKenneth D. Merry * manually, then loop the rest. 890991554f2SKenneth D. Merry */ 891991554f2SKenneth D. Merry data16 = (uint16_t *)reply; 892991554f2SKenneth D. Merry if (mpr_wait_db_int(sc) != 0) { 893991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "Timeout reading doorbell 0\n"); 894991554f2SKenneth D. Merry return (ENXIO); 895991554f2SKenneth D. Merry } 896991554f2SKenneth D. Merry data16[0] = 897991554f2SKenneth D. Merry mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 898991554f2SKenneth D. Merry mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 899991554f2SKenneth D. Merry if (mpr_wait_db_int(sc) != 0) { 900991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "Timeout reading doorbell 1\n"); 901991554f2SKenneth D. Merry return (ENXIO); 902991554f2SKenneth D. Merry } 903991554f2SKenneth D. Merry data16[1] = 904991554f2SKenneth D. Merry mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 905991554f2SKenneth D. Merry mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 906991554f2SKenneth D. Merry 907991554f2SKenneth D. Merry /* Number of 32bit words in the message */ 908991554f2SKenneth D. Merry ioc_sz = reply->MsgLength; 909991554f2SKenneth D. Merry 910991554f2SKenneth D. Merry /* 911991554f2SKenneth D. Merry * Figure out how many 16bit words to clock in without overrunning. 912991554f2SKenneth D. Merry * The precision loss with dividing reply_sz can safely be 913991554f2SKenneth D. Merry * ignored because the messages can only be multiples of 32bits. 914991554f2SKenneth D. Merry */ 915991554f2SKenneth D. Merry residual = 0; 916991554f2SKenneth D. Merry count = MIN((reply_sz / 4), ioc_sz) * 2; 917991554f2SKenneth D. Merry if (count < ioc_sz * 2) { 918991554f2SKenneth D. Merry residual = ioc_sz * 2 - count; 919991554f2SKenneth D. Merry mpr_dprint(sc, MPR_ERROR, "Driver error, throwing away %d " 920991554f2SKenneth D. Merry "residual message words\n", residual); 921991554f2SKenneth D. Merry } 922991554f2SKenneth D. Merry 923991554f2SKenneth D. Merry for (i = 2; i < count; i++) { 924991554f2SKenneth D. Merry if (mpr_wait_db_int(sc) != 0) { 925991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, 926991554f2SKenneth D. Merry "Timeout reading doorbell %d\n", i); 927991554f2SKenneth D. Merry return (ENXIO); 928991554f2SKenneth D. Merry } 929991554f2SKenneth D. Merry data16[i] = mpr_regread(sc, MPI2_DOORBELL_OFFSET) & 930991554f2SKenneth D. Merry MPI2_DOORBELL_DATA_MASK; 931991554f2SKenneth D. Merry mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 932991554f2SKenneth D. Merry } 933991554f2SKenneth D. Merry 934991554f2SKenneth D. Merry /* 935991554f2SKenneth D. Merry * Pull out residual words that won't fit into the provided buffer. 936991554f2SKenneth D. Merry * This keeps the chip from hanging due to a driver programming 937991554f2SKenneth D. Merry * error. 938991554f2SKenneth D. Merry */ 939991554f2SKenneth D. Merry while (residual--) { 940991554f2SKenneth D. Merry if (mpr_wait_db_int(sc) != 0) { 941991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "Timeout reading doorbell\n"); 942991554f2SKenneth D. Merry return (ENXIO); 943991554f2SKenneth D. Merry } 944991554f2SKenneth D. Merry (void)mpr_regread(sc, MPI2_DOORBELL_OFFSET); 945991554f2SKenneth D. Merry mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 946991554f2SKenneth D. Merry } 947991554f2SKenneth D. Merry 948991554f2SKenneth D. Merry /* Step 7 */ 949991554f2SKenneth D. Merry if (mpr_wait_db_int(sc) != 0) { 950991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "Timeout waiting to exit doorbell\n"); 951991554f2SKenneth D. Merry return (ENXIO); 952991554f2SKenneth D. Merry } 953991554f2SKenneth D. Merry if (mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 954991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "Warning, doorbell still active\n"); 955991554f2SKenneth D. Merry mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 956991554f2SKenneth D. Merry 957991554f2SKenneth D. Merry return (0); 958991554f2SKenneth D. Merry } 959991554f2SKenneth D. Merry 960991554f2SKenneth D. Merry static void 961991554f2SKenneth D. Merry mpr_enqueue_request(struct mpr_softc *sc, struct mpr_command *cm) 962991554f2SKenneth D. Merry { 963991554f2SKenneth D. Merry reply_descriptor rd; 964991554f2SKenneth D. Merry 965991554f2SKenneth D. Merry MPR_FUNCTRACE(sc); 966a2c14879SStephen McConnell mpr_dprint(sc, MPR_TRACE, "SMID %u cm %p ccb %p\n", 967991554f2SKenneth D. Merry cm->cm_desc.Default.SMID, cm, cm->cm_ccb); 968991554f2SKenneth D. Merry 969991554f2SKenneth D. Merry if (sc->mpr_flags & MPR_FLAGS_ATTACH_DONE && !(sc->mpr_flags & 970991554f2SKenneth D. Merry MPR_FLAGS_SHUTDOWN)) 971991554f2SKenneth D. Merry mtx_assert(&sc->mpr_mtx, MA_OWNED); 972991554f2SKenneth D. Merry 973991554f2SKenneth D. Merry if (++sc->io_cmds_active > sc->io_cmds_highwater) 974991554f2SKenneth D. Merry sc->io_cmds_highwater++; 975991554f2SKenneth D. Merry 976991554f2SKenneth D. Merry rd.u.low = cm->cm_desc.Words.Low; 977991554f2SKenneth D. Merry rd.u.high = cm->cm_desc.Words.High; 978991554f2SKenneth D. Merry rd.word = htole64(rd.word); 979991554f2SKenneth D. Merry /* TODO-We may need to make below regwrite atomic */ 980991554f2SKenneth D. Merry mpr_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET, 981991554f2SKenneth D. Merry rd.u.low); 982991554f2SKenneth D. Merry mpr_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET, 983991554f2SKenneth D. Merry rd.u.high); 984991554f2SKenneth D. Merry } 985991554f2SKenneth D. Merry 986991554f2SKenneth D. Merry /* 987991554f2SKenneth D. Merry * Just the FACTS, ma'am. 988991554f2SKenneth D. Merry */ 989991554f2SKenneth D. Merry static int 990991554f2SKenneth D. Merry mpr_get_iocfacts(struct mpr_softc *sc, MPI2_IOC_FACTS_REPLY *facts) 991991554f2SKenneth D. Merry { 992991554f2SKenneth D. Merry MPI2_DEFAULT_REPLY *reply; 993991554f2SKenneth D. Merry MPI2_IOC_FACTS_REQUEST request; 994991554f2SKenneth D. Merry int error, req_sz, reply_sz; 995991554f2SKenneth D. Merry 996991554f2SKenneth D. Merry MPR_FUNCTRACE(sc); 997991554f2SKenneth D. Merry 998991554f2SKenneth D. Merry req_sz = sizeof(MPI2_IOC_FACTS_REQUEST); 999991554f2SKenneth D. Merry reply_sz = sizeof(MPI2_IOC_FACTS_REPLY); 1000991554f2SKenneth D. Merry reply = (MPI2_DEFAULT_REPLY *)facts; 1001991554f2SKenneth D. Merry 1002991554f2SKenneth D. Merry bzero(&request, req_sz); 1003991554f2SKenneth D. Merry request.Function = MPI2_FUNCTION_IOC_FACTS; 1004991554f2SKenneth D. Merry error = mpr_request_sync(sc, &request, reply, req_sz, reply_sz, 5); 1005991554f2SKenneth D. Merry 1006991554f2SKenneth D. Merry return (error); 1007991554f2SKenneth D. Merry } 1008991554f2SKenneth D. Merry 1009991554f2SKenneth D. Merry static int 1010991554f2SKenneth D. Merry mpr_send_iocinit(struct mpr_softc *sc) 1011991554f2SKenneth D. Merry { 1012991554f2SKenneth D. Merry MPI2_IOC_INIT_REQUEST init; 1013991554f2SKenneth D. Merry MPI2_DEFAULT_REPLY reply; 1014991554f2SKenneth D. Merry int req_sz, reply_sz, error; 1015991554f2SKenneth D. Merry struct timeval now; 1016991554f2SKenneth D. Merry uint64_t time_in_msec; 1017991554f2SKenneth D. Merry 1018991554f2SKenneth D. Merry MPR_FUNCTRACE(sc); 1019991554f2SKenneth D. Merry 1020991554f2SKenneth D. Merry req_sz = sizeof(MPI2_IOC_INIT_REQUEST); 1021991554f2SKenneth D. Merry reply_sz = sizeof(MPI2_IOC_INIT_REPLY); 1022991554f2SKenneth D. Merry bzero(&init, req_sz); 1023991554f2SKenneth D. Merry bzero(&reply, reply_sz); 1024991554f2SKenneth D. Merry 1025991554f2SKenneth D. Merry /* 1026991554f2SKenneth D. Merry * Fill in the init block. Note that most addresses are 1027991554f2SKenneth D. Merry * deliberately in the lower 32bits of memory. This is a micro- 1028991554f2SKenneth D. Merry * optimzation for PCI/PCIX, though it's not clear if it helps PCIe. 1029991554f2SKenneth D. Merry */ 1030991554f2SKenneth D. Merry init.Function = MPI2_FUNCTION_IOC_INIT; 1031991554f2SKenneth D. Merry init.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 1032991554f2SKenneth D. Merry init.MsgVersion = htole16(MPI2_VERSION); 1033991554f2SKenneth D. Merry init.HeaderVersion = htole16(MPI2_HEADER_VERSION); 1034991554f2SKenneth D. Merry init.SystemRequestFrameSize = htole16(sc->facts->IOCRequestFrameSize); 1035991554f2SKenneth D. Merry init.ReplyDescriptorPostQueueDepth = htole16(sc->pqdepth); 1036991554f2SKenneth D. Merry init.ReplyFreeQueueDepth = htole16(sc->fqdepth); 1037991554f2SKenneth D. Merry init.SenseBufferAddressHigh = 0; 1038991554f2SKenneth D. Merry init.SystemReplyAddressHigh = 0; 1039991554f2SKenneth D. Merry init.SystemRequestFrameBaseAddress.High = 0; 1040991554f2SKenneth D. Merry init.SystemRequestFrameBaseAddress.Low = 1041991554f2SKenneth D. Merry htole32((uint32_t)sc->req_busaddr); 1042991554f2SKenneth D. Merry init.ReplyDescriptorPostQueueAddress.High = 0; 1043991554f2SKenneth D. Merry init.ReplyDescriptorPostQueueAddress.Low = 1044991554f2SKenneth D. Merry htole32((uint32_t)sc->post_busaddr); 1045991554f2SKenneth D. Merry init.ReplyFreeQueueAddress.High = 0; 1046991554f2SKenneth D. Merry init.ReplyFreeQueueAddress.Low = htole32((uint32_t)sc->free_busaddr); 1047991554f2SKenneth D. Merry getmicrotime(&now); 1048991554f2SKenneth D. Merry time_in_msec = (now.tv_sec * 1000 + now.tv_usec/1000); 1049991554f2SKenneth D. Merry init.TimeStamp.High = htole32((time_in_msec >> 32) & 0xFFFFFFFF); 1050991554f2SKenneth D. Merry init.TimeStamp.Low = htole32(time_in_msec & 0xFFFFFFFF); 1051991554f2SKenneth D. Merry 1052991554f2SKenneth D. Merry error = mpr_request_sync(sc, &init, &reply, req_sz, reply_sz, 5); 1053991554f2SKenneth D. Merry if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 1054991554f2SKenneth D. Merry error = ENXIO; 1055991554f2SKenneth D. Merry 1056991554f2SKenneth D. Merry mpr_dprint(sc, MPR_INIT, "IOCInit status= 0x%x\n", reply.IOCStatus); 1057991554f2SKenneth D. Merry return (error); 1058991554f2SKenneth D. Merry } 1059991554f2SKenneth D. Merry 1060991554f2SKenneth D. Merry void 1061991554f2SKenneth D. Merry mpr_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1062991554f2SKenneth D. Merry { 1063991554f2SKenneth D. Merry bus_addr_t *addr; 1064991554f2SKenneth D. Merry 1065991554f2SKenneth D. Merry addr = arg; 1066991554f2SKenneth D. Merry *addr = segs[0].ds_addr; 1067991554f2SKenneth D. Merry } 1068991554f2SKenneth D. Merry 1069991554f2SKenneth D. Merry static int 1070991554f2SKenneth D. Merry mpr_alloc_queues(struct mpr_softc *sc) 1071991554f2SKenneth D. Merry { 1072991554f2SKenneth D. Merry bus_addr_t queues_busaddr; 1073991554f2SKenneth D. Merry uint8_t *queues; 1074991554f2SKenneth D. Merry int qsize, fqsize, pqsize; 1075991554f2SKenneth D. Merry 1076991554f2SKenneth D. Merry /* 1077991554f2SKenneth D. Merry * The reply free queue contains 4 byte entries in multiples of 16 and 1078991554f2SKenneth D. Merry * aligned on a 16 byte boundary. There must always be an unused entry. 1079991554f2SKenneth D. Merry * This queue supplies fresh reply frames for the firmware to use. 1080991554f2SKenneth D. Merry * 1081991554f2SKenneth D. Merry * The reply descriptor post queue contains 8 byte entries in 1082991554f2SKenneth D. Merry * multiples of 16 and aligned on a 16 byte boundary. This queue 1083991554f2SKenneth D. Merry * contains filled-in reply frames sent from the firmware to the host. 1084991554f2SKenneth D. Merry * 1085991554f2SKenneth D. Merry * These two queues are allocated together for simplicity. 1086991554f2SKenneth D. Merry */ 1087d9c9c81cSPedro F. Giffuni sc->fqdepth = roundup2(sc->num_replies + 1, 16); 1088d9c9c81cSPedro F. Giffuni sc->pqdepth = roundup2(sc->num_replies + 1, 16); 1089991554f2SKenneth D. Merry fqsize= sc->fqdepth * 4; 1090991554f2SKenneth D. Merry pqsize = sc->pqdepth * 8; 1091991554f2SKenneth D. Merry qsize = fqsize + pqsize; 1092991554f2SKenneth D. Merry 1093991554f2SKenneth D. Merry if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */ 1094991554f2SKenneth D. Merry 16, 0, /* algnmnt, boundary */ 1095991554f2SKenneth D. Merry BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1096991554f2SKenneth D. Merry BUS_SPACE_MAXADDR, /* highaddr */ 1097991554f2SKenneth D. Merry NULL, NULL, /* filter, filterarg */ 1098991554f2SKenneth D. Merry qsize, /* maxsize */ 1099991554f2SKenneth D. Merry 1, /* nsegments */ 1100991554f2SKenneth D. Merry qsize, /* maxsegsize */ 1101991554f2SKenneth D. Merry 0, /* flags */ 1102991554f2SKenneth D. Merry NULL, NULL, /* lockfunc, lockarg */ 1103991554f2SKenneth D. Merry &sc->queues_dmat)) { 1104991554f2SKenneth D. Merry device_printf(sc->mpr_dev, "Cannot allocate queues DMA tag\n"); 1105991554f2SKenneth D. Merry return (ENOMEM); 1106991554f2SKenneth D. Merry } 1107991554f2SKenneth D. Merry if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT, 1108991554f2SKenneth D. Merry &sc->queues_map)) { 1109991554f2SKenneth D. Merry device_printf(sc->mpr_dev, "Cannot allocate queues memory\n"); 1110991554f2SKenneth D. Merry return (ENOMEM); 1111991554f2SKenneth D. Merry } 1112991554f2SKenneth D. Merry bzero(queues, qsize); 1113991554f2SKenneth D. Merry bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize, 1114991554f2SKenneth D. Merry mpr_memaddr_cb, &queues_busaddr, 0); 1115991554f2SKenneth D. Merry 1116991554f2SKenneth D. Merry sc->free_queue = (uint32_t *)queues; 1117991554f2SKenneth D. Merry sc->free_busaddr = queues_busaddr; 1118991554f2SKenneth D. Merry sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize); 1119991554f2SKenneth D. Merry sc->post_busaddr = queues_busaddr + fqsize; 1120991554f2SKenneth D. Merry 1121991554f2SKenneth D. Merry return (0); 1122991554f2SKenneth D. Merry } 1123991554f2SKenneth D. Merry 1124991554f2SKenneth D. Merry static int 1125991554f2SKenneth D. Merry mpr_alloc_replies(struct mpr_softc *sc) 1126991554f2SKenneth D. Merry { 1127991554f2SKenneth D. Merry int rsize, num_replies; 1128991554f2SKenneth D. Merry 1129991554f2SKenneth D. Merry /* 1130991554f2SKenneth D. Merry * sc->num_replies should be one less than sc->fqdepth. We need to 1131991554f2SKenneth D. Merry * allocate space for sc->fqdepth replies, but only sc->num_replies 1132991554f2SKenneth D. Merry * replies can be used at once. 1133991554f2SKenneth D. Merry */ 1134991554f2SKenneth D. Merry num_replies = max(sc->fqdepth, sc->num_replies); 1135991554f2SKenneth D. Merry 1136991554f2SKenneth D. Merry rsize = sc->facts->ReplyFrameSize * num_replies * 4; 1137991554f2SKenneth D. Merry if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */ 1138991554f2SKenneth D. Merry 4, 0, /* algnmnt, boundary */ 1139991554f2SKenneth D. Merry BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1140991554f2SKenneth D. Merry BUS_SPACE_MAXADDR, /* highaddr */ 1141991554f2SKenneth D. Merry NULL, NULL, /* filter, filterarg */ 1142991554f2SKenneth D. Merry rsize, /* maxsize */ 1143991554f2SKenneth D. Merry 1, /* nsegments */ 1144991554f2SKenneth D. Merry rsize, /* maxsegsize */ 1145991554f2SKenneth D. Merry 0, /* flags */ 1146991554f2SKenneth D. Merry NULL, NULL, /* lockfunc, lockarg */ 1147991554f2SKenneth D. Merry &sc->reply_dmat)) { 1148991554f2SKenneth D. Merry device_printf(sc->mpr_dev, "Cannot allocate replies DMA tag\n"); 1149991554f2SKenneth D. Merry return (ENOMEM); 1150991554f2SKenneth D. Merry } 1151991554f2SKenneth D. Merry if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames, 1152991554f2SKenneth D. Merry BUS_DMA_NOWAIT, &sc->reply_map)) { 1153991554f2SKenneth D. Merry device_printf(sc->mpr_dev, "Cannot allocate replies memory\n"); 1154991554f2SKenneth D. Merry return (ENOMEM); 1155991554f2SKenneth D. Merry } 1156991554f2SKenneth D. Merry bzero(sc->reply_frames, rsize); 1157991554f2SKenneth D. Merry bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize, 1158991554f2SKenneth D. Merry mpr_memaddr_cb, &sc->reply_busaddr, 0); 1159991554f2SKenneth D. Merry 1160991554f2SKenneth D. Merry return (0); 1161991554f2SKenneth D. Merry } 1162991554f2SKenneth D. Merry 1163991554f2SKenneth D. Merry static int 1164991554f2SKenneth D. Merry mpr_alloc_requests(struct mpr_softc *sc) 1165991554f2SKenneth D. Merry { 1166991554f2SKenneth D. Merry struct mpr_command *cm; 1167991554f2SKenneth D. Merry struct mpr_chain *chain; 1168991554f2SKenneth D. Merry int i, rsize, nsegs; 1169991554f2SKenneth D. Merry 1170991554f2SKenneth D. Merry rsize = sc->facts->IOCRequestFrameSize * sc->num_reqs * 4; 1171991554f2SKenneth D. Merry if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */ 1172991554f2SKenneth D. Merry 16, 0, /* algnmnt, boundary */ 1173991554f2SKenneth D. Merry BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1174991554f2SKenneth D. Merry BUS_SPACE_MAXADDR, /* highaddr */ 1175991554f2SKenneth D. Merry NULL, NULL, /* filter, filterarg */ 1176991554f2SKenneth D. Merry rsize, /* maxsize */ 1177991554f2SKenneth D. Merry 1, /* nsegments */ 1178991554f2SKenneth D. Merry rsize, /* maxsegsize */ 1179991554f2SKenneth D. Merry 0, /* flags */ 1180991554f2SKenneth D. Merry NULL, NULL, /* lockfunc, lockarg */ 1181991554f2SKenneth D. Merry &sc->req_dmat)) { 1182991554f2SKenneth D. Merry device_printf(sc->mpr_dev, "Cannot allocate request DMA tag\n"); 1183991554f2SKenneth D. Merry return (ENOMEM); 1184991554f2SKenneth D. Merry } 1185991554f2SKenneth D. Merry if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames, 1186991554f2SKenneth D. Merry BUS_DMA_NOWAIT, &sc->req_map)) { 1187991554f2SKenneth D. Merry device_printf(sc->mpr_dev, "Cannot allocate request memory\n"); 1188991554f2SKenneth D. Merry return (ENOMEM); 1189991554f2SKenneth D. Merry } 1190991554f2SKenneth D. Merry bzero(sc->req_frames, rsize); 1191991554f2SKenneth D. Merry bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize, 1192991554f2SKenneth D. Merry mpr_memaddr_cb, &sc->req_busaddr, 0); 1193991554f2SKenneth D. Merry 1194991554f2SKenneth D. Merry rsize = sc->facts->IOCRequestFrameSize * sc->max_chains * 4; 1195991554f2SKenneth D. Merry if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */ 1196991554f2SKenneth D. Merry 16, 0, /* algnmnt, boundary */ 1197991554f2SKenneth D. Merry BUS_SPACE_MAXADDR, /* lowaddr */ 1198991554f2SKenneth D. Merry BUS_SPACE_MAXADDR, /* highaddr */ 1199991554f2SKenneth D. Merry NULL, NULL, /* filter, filterarg */ 1200991554f2SKenneth D. Merry rsize, /* maxsize */ 1201991554f2SKenneth D. Merry 1, /* nsegments */ 1202991554f2SKenneth D. Merry rsize, /* maxsegsize */ 1203991554f2SKenneth D. Merry 0, /* flags */ 1204991554f2SKenneth D. Merry NULL, NULL, /* lockfunc, lockarg */ 1205991554f2SKenneth D. Merry &sc->chain_dmat)) { 1206991554f2SKenneth D. Merry device_printf(sc->mpr_dev, "Cannot allocate chain DMA tag\n"); 1207991554f2SKenneth D. Merry return (ENOMEM); 1208991554f2SKenneth D. Merry } 1209991554f2SKenneth D. Merry if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames, 1210991554f2SKenneth D. Merry BUS_DMA_NOWAIT, &sc->chain_map)) { 1211991554f2SKenneth D. Merry device_printf(sc->mpr_dev, "Cannot allocate chain memory\n"); 1212991554f2SKenneth D. Merry return (ENOMEM); 1213991554f2SKenneth D. Merry } 1214991554f2SKenneth D. Merry bzero(sc->chain_frames, rsize); 1215991554f2SKenneth D. Merry bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, rsize, 1216991554f2SKenneth D. Merry mpr_memaddr_cb, &sc->chain_busaddr, 0); 1217991554f2SKenneth D. Merry 1218991554f2SKenneth D. Merry rsize = MPR_SENSE_LEN * sc->num_reqs; 1219991554f2SKenneth D. Merry if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */ 1220991554f2SKenneth D. Merry 1, 0, /* algnmnt, boundary */ 1221991554f2SKenneth D. Merry BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1222991554f2SKenneth D. Merry BUS_SPACE_MAXADDR, /* highaddr */ 1223991554f2SKenneth D. Merry NULL, NULL, /* filter, filterarg */ 1224991554f2SKenneth D. Merry rsize, /* maxsize */ 1225991554f2SKenneth D. Merry 1, /* nsegments */ 1226991554f2SKenneth D. Merry rsize, /* maxsegsize */ 1227991554f2SKenneth D. Merry 0, /* flags */ 1228991554f2SKenneth D. Merry NULL, NULL, /* lockfunc, lockarg */ 1229991554f2SKenneth D. Merry &sc->sense_dmat)) { 1230991554f2SKenneth D. Merry device_printf(sc->mpr_dev, "Cannot allocate sense DMA tag\n"); 1231991554f2SKenneth D. Merry return (ENOMEM); 1232991554f2SKenneth D. Merry } 1233991554f2SKenneth D. Merry if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames, 1234991554f2SKenneth D. Merry BUS_DMA_NOWAIT, &sc->sense_map)) { 1235991554f2SKenneth D. Merry device_printf(sc->mpr_dev, "Cannot allocate sense memory\n"); 1236991554f2SKenneth D. Merry return (ENOMEM); 1237991554f2SKenneth D. Merry } 1238991554f2SKenneth D. Merry bzero(sc->sense_frames, rsize); 1239991554f2SKenneth D. Merry bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize, 1240991554f2SKenneth D. Merry mpr_memaddr_cb, &sc->sense_busaddr, 0); 1241991554f2SKenneth D. Merry 1242991554f2SKenneth D. Merry sc->chains = malloc(sizeof(struct mpr_chain) * sc->max_chains, M_MPR, 1243991554f2SKenneth D. Merry M_WAITOK | M_ZERO); 1244991554f2SKenneth D. Merry if (!sc->chains) { 1245991554f2SKenneth D. Merry device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n", 1246991554f2SKenneth D. Merry __func__, __LINE__); 1247991554f2SKenneth D. Merry return (ENOMEM); 1248991554f2SKenneth D. Merry } 1249991554f2SKenneth D. Merry for (i = 0; i < sc->max_chains; i++) { 1250991554f2SKenneth D. Merry chain = &sc->chains[i]; 1251991554f2SKenneth D. Merry chain->chain = (MPI2_SGE_IO_UNION *)(sc->chain_frames + 1252991554f2SKenneth D. Merry i * sc->facts->IOCRequestFrameSize * 4); 1253991554f2SKenneth D. Merry chain->chain_busaddr = sc->chain_busaddr + 1254991554f2SKenneth D. Merry i * sc->facts->IOCRequestFrameSize * 4; 1255991554f2SKenneth D. Merry mpr_free_chain(sc, chain); 1256991554f2SKenneth D. Merry sc->chain_free_lowwater++; 1257991554f2SKenneth D. Merry } 1258991554f2SKenneth D. Merry 1259991554f2SKenneth D. Merry /* XXX Need to pick a more precise value */ 1260991554f2SKenneth D. Merry nsegs = (MAXPHYS / PAGE_SIZE) + 1; 1261991554f2SKenneth D. Merry if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */ 1262991554f2SKenneth D. Merry 1, 0, /* algnmnt, boundary */ 1263991554f2SKenneth D. Merry BUS_SPACE_MAXADDR, /* lowaddr */ 1264991554f2SKenneth D. Merry BUS_SPACE_MAXADDR, /* highaddr */ 1265991554f2SKenneth D. Merry NULL, NULL, /* filter, filterarg */ 1266991554f2SKenneth D. Merry BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 1267991554f2SKenneth D. Merry nsegs, /* nsegments */ 1268991554f2SKenneth D. Merry BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 1269991554f2SKenneth D. Merry BUS_DMA_ALLOCNOW, /* flags */ 1270991554f2SKenneth D. Merry busdma_lock_mutex, /* lockfunc */ 1271991554f2SKenneth D. Merry &sc->mpr_mtx, /* lockarg */ 1272991554f2SKenneth D. Merry &sc->buffer_dmat)) { 1273991554f2SKenneth D. Merry device_printf(sc->mpr_dev, "Cannot allocate buffer DMA tag\n"); 1274991554f2SKenneth D. Merry return (ENOMEM); 1275991554f2SKenneth D. Merry } 1276991554f2SKenneth D. Merry 1277991554f2SKenneth D. Merry /* 1278991554f2SKenneth D. Merry * SMID 0 cannot be used as a free command per the firmware spec. 1279991554f2SKenneth D. Merry * Just drop that command instead of risking accounting bugs. 1280991554f2SKenneth D. Merry */ 1281991554f2SKenneth D. Merry sc->commands = malloc(sizeof(struct mpr_command) * sc->num_reqs, 1282991554f2SKenneth D. Merry M_MPR, M_WAITOK | M_ZERO); 1283991554f2SKenneth D. Merry if (!sc->commands) { 1284991554f2SKenneth D. Merry device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n", 1285991554f2SKenneth D. Merry __func__, __LINE__); 1286991554f2SKenneth D. Merry return (ENOMEM); 1287991554f2SKenneth D. Merry } 1288991554f2SKenneth D. Merry for (i = 1; i < sc->num_reqs; i++) { 1289991554f2SKenneth D. Merry cm = &sc->commands[i]; 1290991554f2SKenneth D. Merry cm->cm_req = sc->req_frames + 1291991554f2SKenneth D. Merry i * sc->facts->IOCRequestFrameSize * 4; 1292991554f2SKenneth D. Merry cm->cm_req_busaddr = sc->req_busaddr + 1293991554f2SKenneth D. Merry i * sc->facts->IOCRequestFrameSize * 4; 1294991554f2SKenneth D. Merry cm->cm_sense = &sc->sense_frames[i]; 1295991554f2SKenneth D. Merry cm->cm_sense_busaddr = sc->sense_busaddr + i * MPR_SENSE_LEN; 1296991554f2SKenneth D. Merry cm->cm_desc.Default.SMID = i; 1297991554f2SKenneth D. Merry cm->cm_sc = sc; 1298991554f2SKenneth D. Merry TAILQ_INIT(&cm->cm_chain_list); 1299991554f2SKenneth D. Merry callout_init_mtx(&cm->cm_callout, &sc->mpr_mtx, 0); 1300991554f2SKenneth D. Merry 1301991554f2SKenneth D. Merry /* XXX Is a failure here a critical problem? */ 1302991554f2SKenneth D. Merry if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0) 1303991554f2SKenneth D. Merry if (i <= sc->facts->HighPriorityCredit) 1304991554f2SKenneth D. Merry mpr_free_high_priority_command(sc, cm); 1305991554f2SKenneth D. Merry else 1306991554f2SKenneth D. Merry mpr_free_command(sc, cm); 1307991554f2SKenneth D. Merry else { 1308991554f2SKenneth D. Merry panic("failed to allocate command %d\n", i); 1309991554f2SKenneth D. Merry sc->num_reqs = i; 1310991554f2SKenneth D. Merry break; 1311991554f2SKenneth D. Merry } 1312991554f2SKenneth D. Merry } 1313991554f2SKenneth D. Merry 1314991554f2SKenneth D. Merry return (0); 1315991554f2SKenneth D. Merry } 1316991554f2SKenneth D. Merry 1317991554f2SKenneth D. Merry static int 1318991554f2SKenneth D. Merry mpr_init_queues(struct mpr_softc *sc) 1319991554f2SKenneth D. Merry { 1320991554f2SKenneth D. Merry int i; 1321991554f2SKenneth D. Merry 1322991554f2SKenneth D. Merry memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8); 1323991554f2SKenneth D. Merry 1324991554f2SKenneth D. Merry /* 1325991554f2SKenneth D. Merry * According to the spec, we need to use one less reply than we 1326991554f2SKenneth D. Merry * have space for on the queue. So sc->num_replies (the number we 1327991554f2SKenneth D. Merry * use) should be less than sc->fqdepth (allocated size). 1328991554f2SKenneth D. Merry */ 1329991554f2SKenneth D. Merry if (sc->num_replies >= sc->fqdepth) 1330991554f2SKenneth D. Merry return (EINVAL); 1331991554f2SKenneth D. Merry 1332991554f2SKenneth D. Merry /* 1333991554f2SKenneth D. Merry * Initialize all of the free queue entries. 1334991554f2SKenneth D. Merry */ 1335991554f2SKenneth D. Merry for (i = 0; i < sc->fqdepth; i++) 1336991554f2SKenneth D. Merry sc->free_queue[i] = sc->reply_busaddr + (i * sc->facts->ReplyFrameSize * 4); 1337991554f2SKenneth D. Merry sc->replyfreeindex = sc->num_replies; 1338991554f2SKenneth D. Merry 1339991554f2SKenneth D. Merry return (0); 1340991554f2SKenneth D. Merry } 1341991554f2SKenneth D. Merry 1342991554f2SKenneth D. Merry /* Get the driver parameter tunables. Lowest priority are the driver defaults. 1343991554f2SKenneth D. Merry * Next are the global settings, if they exist. Highest are the per-unit 1344991554f2SKenneth D. Merry * settings, if they exist. 1345991554f2SKenneth D. Merry */ 1346991554f2SKenneth D. Merry static void 1347991554f2SKenneth D. Merry mpr_get_tunables(struct mpr_softc *sc) 1348991554f2SKenneth D. Merry { 1349991554f2SKenneth D. Merry char tmpstr[80]; 1350991554f2SKenneth D. Merry 1351991554f2SKenneth D. Merry /* XXX default to some debugging for now */ 1352991554f2SKenneth D. Merry sc->mpr_debug = MPR_INFO | MPR_FAULT; 1353991554f2SKenneth D. Merry sc->disable_msix = 0; 1354991554f2SKenneth D. Merry sc->disable_msi = 0; 1355991554f2SKenneth D. Merry sc->max_chains = MPR_CHAIN_FRAMES; 1356a2c14879SStephen McConnell sc->enable_ssu = MPR_SSU_ENABLE_SSD_DISABLE_HDD; 1357a2c14879SStephen McConnell sc->spinup_wait_time = DEFAULT_SPINUP_WAIT; 1358991554f2SKenneth D. Merry 1359991554f2SKenneth D. Merry /* 1360991554f2SKenneth D. Merry * Grab the global variables. 1361991554f2SKenneth D. Merry */ 1362991554f2SKenneth D. Merry TUNABLE_INT_FETCH("hw.mpr.debug_level", &sc->mpr_debug); 1363991554f2SKenneth D. Merry TUNABLE_INT_FETCH("hw.mpr.disable_msix", &sc->disable_msix); 1364991554f2SKenneth D. Merry TUNABLE_INT_FETCH("hw.mpr.disable_msi", &sc->disable_msi); 1365991554f2SKenneth D. Merry TUNABLE_INT_FETCH("hw.mpr.max_chains", &sc->max_chains); 1366a2c14879SStephen McConnell TUNABLE_INT_FETCH("hw.mpr.enable_ssu", &sc->enable_ssu); 1367a2c14879SStephen McConnell TUNABLE_INT_FETCH("hw.mpr.spinup_wait_time", &sc->spinup_wait_time); 1368991554f2SKenneth D. Merry 1369991554f2SKenneth D. Merry /* Grab the unit-instance variables */ 1370991554f2SKenneth D. Merry snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.debug_level", 1371991554f2SKenneth D. Merry device_get_unit(sc->mpr_dev)); 1372991554f2SKenneth D. Merry TUNABLE_INT_FETCH(tmpstr, &sc->mpr_debug); 1373991554f2SKenneth D. Merry 1374991554f2SKenneth D. Merry snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.disable_msix", 1375991554f2SKenneth D. Merry device_get_unit(sc->mpr_dev)); 1376991554f2SKenneth D. Merry TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix); 1377991554f2SKenneth D. Merry 1378991554f2SKenneth D. Merry snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.disable_msi", 1379991554f2SKenneth D. Merry device_get_unit(sc->mpr_dev)); 1380991554f2SKenneth D. Merry TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi); 1381991554f2SKenneth D. Merry 1382991554f2SKenneth D. Merry snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.max_chains", 1383991554f2SKenneth D. Merry device_get_unit(sc->mpr_dev)); 1384991554f2SKenneth D. Merry TUNABLE_INT_FETCH(tmpstr, &sc->max_chains); 1385991554f2SKenneth D. Merry 1386991554f2SKenneth D. Merry bzero(sc->exclude_ids, sizeof(sc->exclude_ids)); 1387991554f2SKenneth D. Merry snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.exclude_ids", 1388991554f2SKenneth D. Merry device_get_unit(sc->mpr_dev)); 1389991554f2SKenneth D. Merry TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids)); 1390a2c14879SStephen McConnell 1391a2c14879SStephen McConnell snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.enable_ssu", 1392a2c14879SStephen McConnell device_get_unit(sc->mpr_dev)); 1393a2c14879SStephen McConnell TUNABLE_INT_FETCH(tmpstr, &sc->enable_ssu); 1394a2c14879SStephen McConnell 1395a2c14879SStephen McConnell snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.spinup_wait_time", 1396a2c14879SStephen McConnell device_get_unit(sc->mpr_dev)); 1397a2c14879SStephen McConnell TUNABLE_INT_FETCH(tmpstr, &sc->spinup_wait_time); 1398991554f2SKenneth D. Merry } 1399991554f2SKenneth D. Merry 1400991554f2SKenneth D. Merry static void 1401991554f2SKenneth D. Merry mpr_setup_sysctl(struct mpr_softc *sc) 1402991554f2SKenneth D. Merry { 1403991554f2SKenneth D. Merry struct sysctl_ctx_list *sysctl_ctx = NULL; 1404991554f2SKenneth D. Merry struct sysctl_oid *sysctl_tree = NULL; 1405991554f2SKenneth D. Merry char tmpstr[80], tmpstr2[80]; 1406991554f2SKenneth D. Merry 1407991554f2SKenneth D. Merry /* 1408991554f2SKenneth D. Merry * Setup the sysctl variable so the user can change the debug level 1409991554f2SKenneth D. Merry * on the fly. 1410991554f2SKenneth D. Merry */ 1411991554f2SKenneth D. Merry snprintf(tmpstr, sizeof(tmpstr), "MPR controller %d", 1412991554f2SKenneth D. Merry device_get_unit(sc->mpr_dev)); 1413991554f2SKenneth D. Merry snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mpr_dev)); 1414991554f2SKenneth D. Merry 1415991554f2SKenneth D. Merry sysctl_ctx = device_get_sysctl_ctx(sc->mpr_dev); 1416991554f2SKenneth D. Merry if (sysctl_ctx != NULL) 1417991554f2SKenneth D. Merry sysctl_tree = device_get_sysctl_tree(sc->mpr_dev); 1418991554f2SKenneth D. Merry 1419991554f2SKenneth D. Merry if (sysctl_tree == NULL) { 1420991554f2SKenneth D. Merry sysctl_ctx_init(&sc->sysctl_ctx); 1421991554f2SKenneth D. Merry sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx, 1422991554f2SKenneth D. Merry SYSCTL_STATIC_CHILDREN(_hw_mpr), OID_AUTO, tmpstr2, 1423991554f2SKenneth D. Merry CTLFLAG_RD, 0, tmpstr); 1424991554f2SKenneth D. Merry if (sc->sysctl_tree == NULL) 1425991554f2SKenneth D. Merry return; 1426991554f2SKenneth D. Merry sysctl_ctx = &sc->sysctl_ctx; 1427991554f2SKenneth D. Merry sysctl_tree = sc->sysctl_tree; 1428991554f2SKenneth D. Merry } 1429991554f2SKenneth D. Merry 1430991554f2SKenneth D. Merry SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1431991554f2SKenneth D. Merry OID_AUTO, "debug_level", CTLFLAG_RW, &sc->mpr_debug, 0, 1432991554f2SKenneth D. Merry "mpr debug level"); 1433991554f2SKenneth D. Merry 1434991554f2SKenneth D. Merry SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1435991554f2SKenneth D. Merry OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0, 1436991554f2SKenneth D. Merry "Disable the use of MSI-X interrupts"); 1437991554f2SKenneth D. Merry 1438991554f2SKenneth D. Merry SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1439991554f2SKenneth D. Merry OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0, 1440991554f2SKenneth D. Merry "Disable the use of MSI interrupts"); 1441991554f2SKenneth D. Merry 1442991554f2SKenneth D. Merry SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1443f0188618SHans Petter Selasky OID_AUTO, "firmware_version", CTLFLAG_RW, sc->fw_version, 1444991554f2SKenneth D. Merry strlen(sc->fw_version), "firmware version"); 1445991554f2SKenneth D. Merry 1446991554f2SKenneth D. Merry SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1447991554f2SKenneth D. Merry OID_AUTO, "driver_version", CTLFLAG_RW, MPR_DRIVER_VERSION, 1448991554f2SKenneth D. Merry strlen(MPR_DRIVER_VERSION), "driver version"); 1449991554f2SKenneth D. Merry 1450991554f2SKenneth D. Merry SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1451991554f2SKenneth D. Merry OID_AUTO, "io_cmds_active", CTLFLAG_RD, 1452991554f2SKenneth D. Merry &sc->io_cmds_active, 0, "number of currently active commands"); 1453991554f2SKenneth D. Merry 1454991554f2SKenneth D. Merry SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1455991554f2SKenneth D. Merry OID_AUTO, "io_cmds_highwater", CTLFLAG_RD, 1456991554f2SKenneth D. Merry &sc->io_cmds_highwater, 0, "maximum active commands seen"); 1457991554f2SKenneth D. Merry 1458991554f2SKenneth D. Merry SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1459991554f2SKenneth D. Merry OID_AUTO, "chain_free", CTLFLAG_RD, 1460991554f2SKenneth D. Merry &sc->chain_free, 0, "number of free chain elements"); 1461991554f2SKenneth D. Merry 1462991554f2SKenneth D. Merry SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1463991554f2SKenneth D. Merry OID_AUTO, "chain_free_lowwater", CTLFLAG_RD, 1464991554f2SKenneth D. Merry &sc->chain_free_lowwater, 0,"lowest number of free chain elements"); 1465991554f2SKenneth D. Merry 1466991554f2SKenneth D. Merry SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1467991554f2SKenneth D. Merry OID_AUTO, "max_chains", CTLFLAG_RD, 1468991554f2SKenneth D. Merry &sc->max_chains, 0,"maximum chain frames that will be allocated"); 1469991554f2SKenneth D. Merry 1470a2c14879SStephen McConnell SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1471a2c14879SStephen McConnell OID_AUTO, "enable_ssu", CTLFLAG_RW, &sc->enable_ssu, 0, 1472a2c14879SStephen McConnell "enable SSU to SATA SSD/HDD at shutdown"); 1473a2c14879SStephen McConnell 1474991554f2SKenneth D. Merry SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1475991554f2SKenneth D. Merry OID_AUTO, "chain_alloc_fail", CTLFLAG_RD, 1476991554f2SKenneth D. Merry &sc->chain_alloc_fail, "chain allocation failures"); 1477a2c14879SStephen McConnell 1478a2c14879SStephen McConnell SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1479a2c14879SStephen McConnell OID_AUTO, "spinup_wait_time", CTLFLAG_RD, 1480a2c14879SStephen McConnell &sc->spinup_wait_time, DEFAULT_SPINUP_WAIT, "seconds to wait for " 1481a2c14879SStephen McConnell "spinup after SATA ID error"); 1482991554f2SKenneth D. Merry } 1483991554f2SKenneth D. Merry 1484991554f2SKenneth D. Merry int 1485991554f2SKenneth D. Merry mpr_attach(struct mpr_softc *sc) 1486991554f2SKenneth D. Merry { 1487991554f2SKenneth D. Merry int error; 1488991554f2SKenneth D. Merry 1489991554f2SKenneth D. Merry mpr_get_tunables(sc); 1490991554f2SKenneth D. Merry 1491991554f2SKenneth D. Merry MPR_FUNCTRACE(sc); 1492991554f2SKenneth D. Merry 1493991554f2SKenneth D. Merry mtx_init(&sc->mpr_mtx, "MPR lock", NULL, MTX_DEF); 1494991554f2SKenneth D. Merry callout_init_mtx(&sc->periodic, &sc->mpr_mtx, 0); 1495991554f2SKenneth D. Merry TAILQ_INIT(&sc->event_list); 1496991554f2SKenneth D. Merry timevalclear(&sc->lastfail); 1497991554f2SKenneth D. Merry 1498991554f2SKenneth D. Merry if ((error = mpr_transition_ready(sc)) != 0) { 1499991554f2SKenneth D. Merry mpr_printf(sc, "%s failed to transition ready\n", __func__); 1500991554f2SKenneth D. Merry return (error); 1501991554f2SKenneth D. Merry } 1502991554f2SKenneth D. Merry 1503991554f2SKenneth D. Merry sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPR, 1504991554f2SKenneth D. Merry M_ZERO|M_NOWAIT); 1505991554f2SKenneth D. Merry if (!sc->facts) { 1506991554f2SKenneth D. Merry device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n", 1507991554f2SKenneth D. Merry __func__, __LINE__); 1508991554f2SKenneth D. Merry return (ENOMEM); 1509991554f2SKenneth D. Merry } 1510991554f2SKenneth D. Merry 1511991554f2SKenneth D. Merry /* 1512991554f2SKenneth D. Merry * Get IOC Facts and allocate all structures based on this information. 1513991554f2SKenneth D. Merry * A Diag Reset will also call mpr_iocfacts_allocate and re-read the IOC 1514991554f2SKenneth D. Merry * Facts. If relevant values have changed in IOC Facts, this function 1515991554f2SKenneth D. Merry * will free all of the memory based on IOC Facts and reallocate that 1516991554f2SKenneth D. Merry * memory. If this fails, any allocated memory should already be freed. 1517991554f2SKenneth D. Merry */ 1518991554f2SKenneth D. Merry if ((error = mpr_iocfacts_allocate(sc, TRUE)) != 0) { 1519991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "%s IOC Facts based allocation " 1520991554f2SKenneth D. Merry "failed with error %d\n", __func__, error); 1521991554f2SKenneth D. Merry return (error); 1522991554f2SKenneth D. Merry } 1523991554f2SKenneth D. Merry 1524991554f2SKenneth D. Merry /* Start the periodic watchdog check on the IOC Doorbell */ 1525991554f2SKenneth D. Merry mpr_periodic(sc); 1526991554f2SKenneth D. Merry 1527991554f2SKenneth D. Merry /* 1528991554f2SKenneth D. Merry * The portenable will kick off discovery events that will drive the 1529991554f2SKenneth D. Merry * rest of the initialization process. The CAM/SAS module will 1530991554f2SKenneth D. Merry * hold up the boot sequence until discovery is complete. 1531991554f2SKenneth D. Merry */ 1532991554f2SKenneth D. Merry sc->mpr_ich.ich_func = mpr_startup; 1533991554f2SKenneth D. Merry sc->mpr_ich.ich_arg = sc; 1534991554f2SKenneth D. Merry if (config_intrhook_establish(&sc->mpr_ich) != 0) { 1535991554f2SKenneth D. Merry mpr_dprint(sc, MPR_ERROR, "Cannot establish MPR config hook\n"); 1536991554f2SKenneth D. Merry error = EINVAL; 1537991554f2SKenneth D. Merry } 1538991554f2SKenneth D. Merry 1539991554f2SKenneth D. Merry /* 1540991554f2SKenneth D. Merry * Allow IR to shutdown gracefully when shutdown occurs. 1541991554f2SKenneth D. Merry */ 1542991554f2SKenneth D. Merry sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final, 1543991554f2SKenneth D. Merry mprsas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT); 1544991554f2SKenneth D. Merry 1545991554f2SKenneth D. Merry if (sc->shutdown_eh == NULL) 1546991554f2SKenneth D. Merry mpr_dprint(sc, MPR_ERROR, "shutdown event registration " 1547991554f2SKenneth D. Merry "failed\n"); 1548991554f2SKenneth D. Merry 1549991554f2SKenneth D. Merry mpr_setup_sysctl(sc); 1550991554f2SKenneth D. Merry 1551991554f2SKenneth D. Merry sc->mpr_flags |= MPR_FLAGS_ATTACH_DONE; 1552991554f2SKenneth D. Merry 1553991554f2SKenneth D. Merry return (error); 1554991554f2SKenneth D. Merry } 1555991554f2SKenneth D. Merry 1556991554f2SKenneth D. Merry /* Run through any late-start handlers. */ 1557991554f2SKenneth D. Merry static void 1558991554f2SKenneth D. Merry mpr_startup(void *arg) 1559991554f2SKenneth D. Merry { 1560991554f2SKenneth D. Merry struct mpr_softc *sc; 1561991554f2SKenneth D. Merry 1562991554f2SKenneth D. Merry sc = (struct mpr_softc *)arg; 1563991554f2SKenneth D. Merry 1564991554f2SKenneth D. Merry mpr_lock(sc); 1565991554f2SKenneth D. Merry mpr_unmask_intr(sc); 1566991554f2SKenneth D. Merry 1567991554f2SKenneth D. Merry /* initialize device mapping tables */ 1568991554f2SKenneth D. Merry mpr_base_static_config_pages(sc); 1569991554f2SKenneth D. Merry mpr_mapping_initialize(sc); 1570991554f2SKenneth D. Merry mprsas_startup(sc); 1571991554f2SKenneth D. Merry mpr_unlock(sc); 1572991554f2SKenneth D. Merry } 1573991554f2SKenneth D. Merry 1574991554f2SKenneth D. Merry /* Periodic watchdog. Is called with the driver lock already held. */ 1575991554f2SKenneth D. Merry static void 1576991554f2SKenneth D. Merry mpr_periodic(void *arg) 1577991554f2SKenneth D. Merry { 1578991554f2SKenneth D. Merry struct mpr_softc *sc; 1579991554f2SKenneth D. Merry uint32_t db; 1580991554f2SKenneth D. Merry 1581991554f2SKenneth D. Merry sc = (struct mpr_softc *)arg; 1582991554f2SKenneth D. Merry if (sc->mpr_flags & MPR_FLAGS_SHUTDOWN) 1583991554f2SKenneth D. Merry return; 1584991554f2SKenneth D. Merry 1585991554f2SKenneth D. Merry db = mpr_regread(sc, MPI2_DOORBELL_OFFSET); 1586991554f2SKenneth D. Merry if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 1587991554f2SKenneth D. Merry if ((db & MPI2_DOORBELL_FAULT_CODE_MASK) == 1588991554f2SKenneth D. Merry IFAULT_IOP_OVER_TEMP_THRESHOLD_EXCEEDED) { 1589991554f2SKenneth D. Merry panic("TEMPERATURE FAULT: STOPPING."); 1590991554f2SKenneth D. Merry } 1591991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "IOC Fault 0x%08x, Resetting\n", db); 1592991554f2SKenneth D. Merry mpr_reinit(sc); 1593991554f2SKenneth D. Merry } 1594991554f2SKenneth D. Merry 1595991554f2SKenneth D. Merry callout_reset(&sc->periodic, MPR_PERIODIC_DELAY * hz, mpr_periodic, sc); 1596991554f2SKenneth D. Merry } 1597991554f2SKenneth D. Merry 1598991554f2SKenneth D. Merry static void 1599991554f2SKenneth D. Merry mpr_log_evt_handler(struct mpr_softc *sc, uintptr_t data, 1600991554f2SKenneth D. Merry MPI2_EVENT_NOTIFICATION_REPLY *event) 1601991554f2SKenneth D. Merry { 1602991554f2SKenneth D. Merry MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry; 1603991554f2SKenneth D. Merry 1604991554f2SKenneth D. Merry mpr_print_event(sc, event); 1605991554f2SKenneth D. Merry 1606991554f2SKenneth D. Merry switch (event->Event) { 1607991554f2SKenneth D. Merry case MPI2_EVENT_LOG_DATA: 1608991554f2SKenneth D. Merry mpr_dprint(sc, MPR_EVENT, "MPI2_EVENT_LOG_DATA:\n"); 1609991554f2SKenneth D. Merry if (sc->mpr_debug & MPR_EVENT) 1610991554f2SKenneth D. Merry hexdump(event->EventData, event->EventDataLength, NULL, 1611991554f2SKenneth D. Merry 0); 1612991554f2SKenneth D. Merry break; 1613991554f2SKenneth D. Merry case MPI2_EVENT_LOG_ENTRY_ADDED: 1614991554f2SKenneth D. Merry entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData; 1615991554f2SKenneth D. Merry mpr_dprint(sc, MPR_EVENT, "MPI2_EVENT_LOG_ENTRY_ADDED event " 1616991554f2SKenneth D. Merry "0x%x Sequence %d:\n", entry->LogEntryQualifier, 1617991554f2SKenneth D. Merry entry->LogSequence); 1618991554f2SKenneth D. Merry break; 1619991554f2SKenneth D. Merry default: 1620991554f2SKenneth D. Merry break; 1621991554f2SKenneth D. Merry } 1622991554f2SKenneth D. Merry return; 1623991554f2SKenneth D. Merry } 1624991554f2SKenneth D. Merry 1625991554f2SKenneth D. Merry static int 1626991554f2SKenneth D. Merry mpr_attach_log(struct mpr_softc *sc) 1627991554f2SKenneth D. Merry { 1628991554f2SKenneth D. Merry uint8_t events[16]; 1629991554f2SKenneth D. Merry 1630991554f2SKenneth D. Merry bzero(events, 16); 1631991554f2SKenneth D. Merry setbit(events, MPI2_EVENT_LOG_DATA); 1632991554f2SKenneth D. Merry setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED); 1633991554f2SKenneth D. Merry 1634991554f2SKenneth D. Merry mpr_register_events(sc, events, mpr_log_evt_handler, NULL, 1635991554f2SKenneth D. Merry &sc->mpr_log_eh); 1636991554f2SKenneth D. Merry 1637991554f2SKenneth D. Merry return (0); 1638991554f2SKenneth D. Merry } 1639991554f2SKenneth D. Merry 1640991554f2SKenneth D. Merry static int 1641991554f2SKenneth D. Merry mpr_detach_log(struct mpr_softc *sc) 1642991554f2SKenneth D. Merry { 1643991554f2SKenneth D. Merry 1644991554f2SKenneth D. Merry if (sc->mpr_log_eh != NULL) 1645991554f2SKenneth D. Merry mpr_deregister_events(sc, sc->mpr_log_eh); 1646991554f2SKenneth D. Merry return (0); 1647991554f2SKenneth D. Merry } 1648991554f2SKenneth D. Merry 1649991554f2SKenneth D. Merry /* 1650991554f2SKenneth D. Merry * Free all of the driver resources and detach submodules. Should be called 1651991554f2SKenneth D. Merry * without the lock held. 1652991554f2SKenneth D. Merry */ 1653991554f2SKenneth D. Merry int 1654991554f2SKenneth D. Merry mpr_free(struct mpr_softc *sc) 1655991554f2SKenneth D. Merry { 1656991554f2SKenneth D. Merry int error; 1657991554f2SKenneth D. Merry 1658991554f2SKenneth D. Merry /* Turn off the watchdog */ 1659991554f2SKenneth D. Merry mpr_lock(sc); 1660991554f2SKenneth D. Merry sc->mpr_flags |= MPR_FLAGS_SHUTDOWN; 1661991554f2SKenneth D. Merry mpr_unlock(sc); 1662991554f2SKenneth D. Merry /* Lock must not be held for this */ 1663991554f2SKenneth D. Merry callout_drain(&sc->periodic); 1664991554f2SKenneth D. Merry 1665991554f2SKenneth D. Merry if (((error = mpr_detach_log(sc)) != 0) || 1666991554f2SKenneth D. Merry ((error = mpr_detach_sas(sc)) != 0)) 1667991554f2SKenneth D. Merry return (error); 1668991554f2SKenneth D. Merry 1669991554f2SKenneth D. Merry mpr_detach_user(sc); 1670991554f2SKenneth D. Merry 1671991554f2SKenneth D. Merry /* Put the IOC back in the READY state. */ 1672991554f2SKenneth D. Merry mpr_lock(sc); 1673991554f2SKenneth D. Merry if ((error = mpr_transition_ready(sc)) != 0) { 1674991554f2SKenneth D. Merry mpr_unlock(sc); 1675991554f2SKenneth D. Merry return (error); 1676991554f2SKenneth D. Merry } 1677991554f2SKenneth D. Merry mpr_unlock(sc); 1678991554f2SKenneth D. Merry 1679991554f2SKenneth D. Merry if (sc->facts != NULL) 1680991554f2SKenneth D. Merry free(sc->facts, M_MPR); 1681991554f2SKenneth D. Merry 1682991554f2SKenneth D. Merry /* 1683991554f2SKenneth D. Merry * Free all buffers that are based on IOC Facts. A Diag Reset may need 1684991554f2SKenneth D. Merry * to free these buffers too. 1685991554f2SKenneth D. Merry */ 1686991554f2SKenneth D. Merry mpr_iocfacts_free(sc); 1687991554f2SKenneth D. Merry 1688991554f2SKenneth D. Merry if (sc->sysctl_tree != NULL) 1689991554f2SKenneth D. Merry sysctl_ctx_free(&sc->sysctl_ctx); 1690991554f2SKenneth D. Merry 1691991554f2SKenneth D. Merry /* Deregister the shutdown function */ 1692991554f2SKenneth D. Merry if (sc->shutdown_eh != NULL) 1693991554f2SKenneth D. Merry EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh); 1694991554f2SKenneth D. Merry 1695991554f2SKenneth D. Merry mtx_destroy(&sc->mpr_mtx); 1696991554f2SKenneth D. Merry 1697991554f2SKenneth D. Merry return (0); 1698991554f2SKenneth D. Merry } 1699991554f2SKenneth D. Merry 1700991554f2SKenneth D. Merry static __inline void 1701991554f2SKenneth D. Merry mpr_complete_command(struct mpr_softc *sc, struct mpr_command *cm) 1702991554f2SKenneth D. Merry { 1703991554f2SKenneth D. Merry MPR_FUNCTRACE(sc); 1704991554f2SKenneth D. Merry 1705991554f2SKenneth D. Merry if (cm == NULL) { 1706991554f2SKenneth D. Merry mpr_dprint(sc, MPR_ERROR, "Completing NULL command\n"); 1707991554f2SKenneth D. Merry return; 1708991554f2SKenneth D. Merry } 1709991554f2SKenneth D. Merry 1710991554f2SKenneth D. Merry if (cm->cm_flags & MPR_CM_FLAGS_POLLED) 1711991554f2SKenneth D. Merry cm->cm_flags |= MPR_CM_FLAGS_COMPLETE; 1712991554f2SKenneth D. Merry 1713991554f2SKenneth D. Merry if (cm->cm_complete != NULL) { 1714991554f2SKenneth D. Merry mpr_dprint(sc, MPR_TRACE, 1715991554f2SKenneth D. Merry "%s cm %p calling cm_complete %p data %p reply %p\n", 1716991554f2SKenneth D. Merry __func__, cm, cm->cm_complete, cm->cm_complete_data, 1717991554f2SKenneth D. Merry cm->cm_reply); 1718991554f2SKenneth D. Merry cm->cm_complete(sc, cm); 1719991554f2SKenneth D. Merry } 1720991554f2SKenneth D. Merry 1721991554f2SKenneth D. Merry if (cm->cm_flags & MPR_CM_FLAGS_WAKEUP) { 1722991554f2SKenneth D. Merry mpr_dprint(sc, MPR_TRACE, "waking up %p\n", cm); 1723991554f2SKenneth D. Merry wakeup(cm); 1724991554f2SKenneth D. Merry } 1725991554f2SKenneth D. Merry 1726991554f2SKenneth D. Merry if (sc->io_cmds_active != 0) { 1727991554f2SKenneth D. Merry sc->io_cmds_active--; 1728991554f2SKenneth D. Merry } else { 1729991554f2SKenneth D. Merry mpr_dprint(sc, MPR_ERROR, "Warning: io_cmds_active is " 1730991554f2SKenneth D. Merry "out of sync - resynching to 0\n"); 1731991554f2SKenneth D. Merry } 1732991554f2SKenneth D. Merry } 1733991554f2SKenneth D. Merry 1734991554f2SKenneth D. Merry static void 1735991554f2SKenneth D. Merry mpr_sas_log_info(struct mpr_softc *sc , u32 log_info) 1736991554f2SKenneth D. Merry { 1737991554f2SKenneth D. Merry union loginfo_type { 1738991554f2SKenneth D. Merry u32 loginfo; 1739991554f2SKenneth D. Merry struct { 1740991554f2SKenneth D. Merry u32 subcode:16; 1741991554f2SKenneth D. Merry u32 code:8; 1742991554f2SKenneth D. Merry u32 originator:4; 1743991554f2SKenneth D. Merry u32 bus_type:4; 1744991554f2SKenneth D. Merry } dw; 1745991554f2SKenneth D. Merry }; 1746991554f2SKenneth D. Merry union loginfo_type sas_loginfo; 1747991554f2SKenneth D. Merry char *originator_str = NULL; 1748991554f2SKenneth D. Merry 1749991554f2SKenneth D. Merry sas_loginfo.loginfo = log_info; 1750991554f2SKenneth D. Merry if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 1751991554f2SKenneth D. Merry return; 1752991554f2SKenneth D. Merry 1753991554f2SKenneth D. Merry /* each nexus loss loginfo */ 1754991554f2SKenneth D. Merry if (log_info == 0x31170000) 1755991554f2SKenneth D. Merry return; 1756991554f2SKenneth D. Merry 1757991554f2SKenneth D. Merry /* eat the loginfos associated with task aborts */ 1758991554f2SKenneth D. Merry if ((log_info == 30050000) || (log_info == 0x31140000) || 1759991554f2SKenneth D. Merry (log_info == 0x31130000)) 1760991554f2SKenneth D. Merry return; 1761991554f2SKenneth D. Merry 1762991554f2SKenneth D. Merry switch (sas_loginfo.dw.originator) { 1763991554f2SKenneth D. Merry case 0: 1764991554f2SKenneth D. Merry originator_str = "IOP"; 1765991554f2SKenneth D. Merry break; 1766991554f2SKenneth D. Merry case 1: 1767991554f2SKenneth D. Merry originator_str = "PL"; 1768991554f2SKenneth D. Merry break; 1769991554f2SKenneth D. Merry case 2: 1770991554f2SKenneth D. Merry originator_str = "IR"; 1771991554f2SKenneth D. Merry break; 1772991554f2SKenneth D. Merry } 1773991554f2SKenneth D. Merry 1774991554f2SKenneth D. Merry mpr_dprint(sc, MPR_INFO, "log_info(0x%08x): originator(%s), " 1775991554f2SKenneth D. Merry "code(0x%02x), sub_code(0x%04x)\n", log_info, 1776991554f2SKenneth D. Merry originator_str, sas_loginfo.dw.code, 1777991554f2SKenneth D. Merry sas_loginfo.dw.subcode); 1778991554f2SKenneth D. Merry } 1779991554f2SKenneth D. Merry 1780991554f2SKenneth D. Merry static void 1781991554f2SKenneth D. Merry mpr_display_reply_info(struct mpr_softc *sc, uint8_t *reply) 1782991554f2SKenneth D. Merry { 1783991554f2SKenneth D. Merry MPI2DefaultReply_t *mpi_reply; 1784991554f2SKenneth D. Merry u16 sc_status; 1785991554f2SKenneth D. Merry 1786991554f2SKenneth D. Merry mpi_reply = (MPI2DefaultReply_t*)reply; 1787991554f2SKenneth D. Merry sc_status = le16toh(mpi_reply->IOCStatus); 1788991554f2SKenneth D. Merry if (sc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 1789991554f2SKenneth D. Merry mpr_sas_log_info(sc, le32toh(mpi_reply->IOCLogInfo)); 1790991554f2SKenneth D. Merry } 1791991554f2SKenneth D. Merry 1792991554f2SKenneth D. Merry void 1793991554f2SKenneth D. Merry mpr_intr(void *data) 1794991554f2SKenneth D. Merry { 1795991554f2SKenneth D. Merry struct mpr_softc *sc; 1796991554f2SKenneth D. Merry uint32_t status; 1797991554f2SKenneth D. Merry 1798991554f2SKenneth D. Merry sc = (struct mpr_softc *)data; 1799991554f2SKenneth D. Merry mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 1800991554f2SKenneth D. Merry 1801991554f2SKenneth D. Merry /* 1802991554f2SKenneth D. Merry * Check interrupt status register to flush the bus. This is 1803991554f2SKenneth D. Merry * needed for both INTx interrupts and driver-driven polling 1804991554f2SKenneth D. Merry */ 1805991554f2SKenneth D. Merry status = mpr_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 1806991554f2SKenneth D. Merry if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0) 1807991554f2SKenneth D. Merry return; 1808991554f2SKenneth D. Merry 1809991554f2SKenneth D. Merry mpr_lock(sc); 1810991554f2SKenneth D. Merry mpr_intr_locked(data); 1811991554f2SKenneth D. Merry mpr_unlock(sc); 1812991554f2SKenneth D. Merry return; 1813991554f2SKenneth D. Merry } 1814991554f2SKenneth D. Merry 1815991554f2SKenneth D. Merry /* 1816991554f2SKenneth D. Merry * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the 1817991554f2SKenneth D. Merry * chip. Hopefully this theory is correct. 1818991554f2SKenneth D. Merry */ 1819991554f2SKenneth D. Merry void 1820991554f2SKenneth D. Merry mpr_intr_msi(void *data) 1821991554f2SKenneth D. Merry { 1822991554f2SKenneth D. Merry struct mpr_softc *sc; 1823991554f2SKenneth D. Merry 1824991554f2SKenneth D. Merry sc = (struct mpr_softc *)data; 1825991554f2SKenneth D. Merry mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 1826991554f2SKenneth D. Merry mpr_lock(sc); 1827991554f2SKenneth D. Merry mpr_intr_locked(data); 1828991554f2SKenneth D. Merry mpr_unlock(sc); 1829991554f2SKenneth D. Merry return; 1830991554f2SKenneth D. Merry } 1831991554f2SKenneth D. Merry 1832991554f2SKenneth D. Merry /* 1833991554f2SKenneth D. Merry * The locking is overly broad and simplistic, but easy to deal with for now. 1834991554f2SKenneth D. Merry */ 1835991554f2SKenneth D. Merry void 1836991554f2SKenneth D. Merry mpr_intr_locked(void *data) 1837991554f2SKenneth D. Merry { 1838991554f2SKenneth D. Merry MPI2_REPLY_DESCRIPTORS_UNION *desc; 1839991554f2SKenneth D. Merry struct mpr_softc *sc; 1840991554f2SKenneth D. Merry struct mpr_command *cm = NULL; 1841991554f2SKenneth D. Merry uint8_t flags; 1842991554f2SKenneth D. Merry u_int pq; 1843991554f2SKenneth D. Merry MPI2_DIAG_RELEASE_REPLY *rel_rep; 1844991554f2SKenneth D. Merry mpr_fw_diagnostic_buffer_t *pBuffer; 1845991554f2SKenneth D. Merry 1846991554f2SKenneth D. Merry sc = (struct mpr_softc *)data; 1847991554f2SKenneth D. Merry 1848991554f2SKenneth D. Merry pq = sc->replypostindex; 1849991554f2SKenneth D. Merry mpr_dprint(sc, MPR_TRACE, 1850991554f2SKenneth D. Merry "%s sc %p starting with replypostindex %u\n", 1851991554f2SKenneth D. Merry __func__, sc, sc->replypostindex); 1852991554f2SKenneth D. Merry 1853991554f2SKenneth D. Merry for ( ;; ) { 1854991554f2SKenneth D. Merry cm = NULL; 1855991554f2SKenneth D. Merry desc = &sc->post_queue[sc->replypostindex]; 1856991554f2SKenneth D. Merry flags = desc->Default.ReplyFlags & 1857991554f2SKenneth D. Merry MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 1858991554f2SKenneth D. Merry if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) || 1859991554f2SKenneth D. Merry (le32toh(desc->Words.High) == 0xffffffff)) 1860991554f2SKenneth D. Merry break; 1861991554f2SKenneth D. Merry 1862991554f2SKenneth D. Merry /* increment the replypostindex now, so that event handlers 1863991554f2SKenneth D. Merry * and cm completion handlers which decide to do a diag 1864991554f2SKenneth D. Merry * reset can zero it without it getting incremented again 1865991554f2SKenneth D. Merry * afterwards, and we break out of this loop on the next 1866991554f2SKenneth D. Merry * iteration since the reply post queue has been cleared to 1867991554f2SKenneth D. Merry * 0xFF and all descriptors look unused (which they are). 1868991554f2SKenneth D. Merry */ 1869991554f2SKenneth D. Merry if (++sc->replypostindex >= sc->pqdepth) 1870991554f2SKenneth D. Merry sc->replypostindex = 0; 1871991554f2SKenneth D. Merry 1872991554f2SKenneth D. Merry switch (flags) { 1873991554f2SKenneth D. Merry case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS: 1874991554f2SKenneth D. Merry case MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS: 1875991554f2SKenneth D. Merry cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)]; 1876991554f2SKenneth D. Merry cm->cm_reply = NULL; 1877991554f2SKenneth D. Merry break; 1878991554f2SKenneth D. Merry case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY: 1879991554f2SKenneth D. Merry { 1880991554f2SKenneth D. Merry uint32_t baddr; 1881991554f2SKenneth D. Merry uint8_t *reply; 1882991554f2SKenneth D. Merry 1883991554f2SKenneth D. Merry /* 1884991554f2SKenneth D. Merry * Re-compose the reply address from the address 1885991554f2SKenneth D. Merry * sent back from the chip. The ReplyFrameAddress 1886991554f2SKenneth D. Merry * is the lower 32 bits of the physical address of 1887991554f2SKenneth D. Merry * particular reply frame. Convert that address to 1888991554f2SKenneth D. Merry * host format, and then use that to provide the 1889991554f2SKenneth D. Merry * offset against the virtual address base 1890991554f2SKenneth D. Merry * (sc->reply_frames). 1891991554f2SKenneth D. Merry */ 1892991554f2SKenneth D. Merry baddr = le32toh(desc->AddressReply.ReplyFrameAddress); 1893991554f2SKenneth D. Merry reply = sc->reply_frames + 1894991554f2SKenneth D. Merry (baddr - ((uint32_t)sc->reply_busaddr)); 1895991554f2SKenneth D. Merry /* 1896991554f2SKenneth D. Merry * Make sure the reply we got back is in a valid 1897991554f2SKenneth D. Merry * range. If not, go ahead and panic here, since 1898991554f2SKenneth D. Merry * we'll probably panic as soon as we deference the 1899991554f2SKenneth D. Merry * reply pointer anyway. 1900991554f2SKenneth D. Merry */ 1901991554f2SKenneth D. Merry if ((reply < sc->reply_frames) 1902991554f2SKenneth D. Merry || (reply > (sc->reply_frames + 1903991554f2SKenneth D. Merry (sc->fqdepth * sc->facts->ReplyFrameSize * 4)))) { 1904991554f2SKenneth D. Merry printf("%s: WARNING: reply %p out of range!\n", 1905991554f2SKenneth D. Merry __func__, reply); 1906991554f2SKenneth D. Merry printf("%s: reply_frames %p, fqdepth %d, " 1907991554f2SKenneth D. Merry "frame size %d\n", __func__, 1908991554f2SKenneth D. Merry sc->reply_frames, sc->fqdepth, 1909991554f2SKenneth D. Merry sc->facts->ReplyFrameSize * 4); 1910991554f2SKenneth D. Merry printf("%s: baddr %#x,\n", __func__, baddr); 1911991554f2SKenneth D. Merry /* LSI-TODO. See Linux Code for Graceful exit */ 1912991554f2SKenneth D. Merry panic("Reply address out of range"); 1913991554f2SKenneth D. Merry } 1914991554f2SKenneth D. Merry if (le16toh(desc->AddressReply.SMID) == 0) { 1915991554f2SKenneth D. Merry if (((MPI2_DEFAULT_REPLY *)reply)->Function == 1916991554f2SKenneth D. Merry MPI2_FUNCTION_DIAG_BUFFER_POST) { 1917991554f2SKenneth D. Merry /* 1918991554f2SKenneth D. Merry * If SMID is 0 for Diag Buffer Post, 1919991554f2SKenneth D. Merry * this implies that the reply is due to 1920991554f2SKenneth D. Merry * a release function with a status that 1921991554f2SKenneth D. Merry * the buffer has been released. Set 1922991554f2SKenneth D. Merry * the buffer flags accordingly. 1923991554f2SKenneth D. Merry */ 1924991554f2SKenneth D. Merry rel_rep = 1925991554f2SKenneth D. Merry (MPI2_DIAG_RELEASE_REPLY *)reply; 1926991554f2SKenneth D. Merry if (le16toh(rel_rep->IOCStatus) == 1927991554f2SKenneth D. Merry MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED) 1928991554f2SKenneth D. Merry { 1929991554f2SKenneth D. Merry pBuffer = 1930991554f2SKenneth D. Merry &sc->fw_diag_buffer_list[ 1931991554f2SKenneth D. Merry rel_rep->BufferType]; 1932991554f2SKenneth D. Merry pBuffer->valid_data = TRUE; 1933991554f2SKenneth D. Merry pBuffer->owned_by_firmware = 1934991554f2SKenneth D. Merry FALSE; 1935991554f2SKenneth D. Merry pBuffer->immediate = FALSE; 1936991554f2SKenneth D. Merry } 1937991554f2SKenneth D. Merry } else 1938991554f2SKenneth D. Merry mpr_dispatch_event(sc, baddr, 1939991554f2SKenneth D. Merry (MPI2_EVENT_NOTIFICATION_REPLY *) 1940991554f2SKenneth D. Merry reply); 1941991554f2SKenneth D. Merry } else { 1942991554f2SKenneth D. Merry cm = &sc->commands[ 1943991554f2SKenneth D. Merry le16toh(desc->AddressReply.SMID)]; 1944991554f2SKenneth D. Merry cm->cm_reply = reply; 1945991554f2SKenneth D. Merry cm->cm_reply_data = 1946991554f2SKenneth D. Merry le32toh(desc->AddressReply. 1947991554f2SKenneth D. Merry ReplyFrameAddress); 1948991554f2SKenneth D. Merry } 1949991554f2SKenneth D. Merry break; 1950991554f2SKenneth D. Merry } 1951991554f2SKenneth D. Merry case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS: 1952991554f2SKenneth D. Merry case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER: 1953991554f2SKenneth D. Merry case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS: 1954991554f2SKenneth D. Merry default: 1955991554f2SKenneth D. Merry /* Unhandled */ 1956991554f2SKenneth D. Merry mpr_dprint(sc, MPR_ERROR, "Unhandled reply 0x%x\n", 1957991554f2SKenneth D. Merry desc->Default.ReplyFlags); 1958991554f2SKenneth D. Merry cm = NULL; 1959991554f2SKenneth D. Merry break; 1960991554f2SKenneth D. Merry } 1961991554f2SKenneth D. Merry 1962991554f2SKenneth D. Merry if (cm != NULL) { 1963991554f2SKenneth D. Merry // Print Error reply frame 1964991554f2SKenneth D. Merry if (cm->cm_reply) 1965991554f2SKenneth D. Merry mpr_display_reply_info(sc,cm->cm_reply); 1966991554f2SKenneth D. Merry mpr_complete_command(sc, cm); 1967991554f2SKenneth D. Merry } 1968991554f2SKenneth D. Merry 1969991554f2SKenneth D. Merry desc->Words.Low = 0xffffffff; 1970991554f2SKenneth D. Merry desc->Words.High = 0xffffffff; 1971991554f2SKenneth D. Merry } 1972991554f2SKenneth D. Merry 1973991554f2SKenneth D. Merry if (pq != sc->replypostindex) { 1974991554f2SKenneth D. Merry mpr_dprint(sc, MPR_TRACE, 1975991554f2SKenneth D. Merry "%s sc %p writing postindex %d\n", 1976991554f2SKenneth D. Merry __func__, sc, sc->replypostindex); 1977991554f2SKenneth D. Merry mpr_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 1978991554f2SKenneth D. Merry sc->replypostindex); 1979991554f2SKenneth D. Merry } 1980991554f2SKenneth D. Merry 1981991554f2SKenneth D. Merry return; 1982991554f2SKenneth D. Merry } 1983991554f2SKenneth D. Merry 1984991554f2SKenneth D. Merry static void 1985991554f2SKenneth D. Merry mpr_dispatch_event(struct mpr_softc *sc, uintptr_t data, 1986991554f2SKenneth D. Merry MPI2_EVENT_NOTIFICATION_REPLY *reply) 1987991554f2SKenneth D. Merry { 1988991554f2SKenneth D. Merry struct mpr_event_handle *eh; 1989991554f2SKenneth D. Merry int event, handled = 0; 1990991554f2SKenneth D. Merry 1991991554f2SKenneth D. Merry event = le16toh(reply->Event); 1992991554f2SKenneth D. Merry TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 1993991554f2SKenneth D. Merry if (isset(eh->mask, event)) { 1994991554f2SKenneth D. Merry eh->callback(sc, data, reply); 1995991554f2SKenneth D. Merry handled++; 1996991554f2SKenneth D. Merry } 1997991554f2SKenneth D. Merry } 1998991554f2SKenneth D. Merry 1999991554f2SKenneth D. Merry if (handled == 0) 2000991554f2SKenneth D. Merry mpr_dprint(sc, MPR_EVENT, "Unhandled event 0x%x\n", 2001991554f2SKenneth D. Merry le16toh(event)); 2002991554f2SKenneth D. Merry 2003991554f2SKenneth D. Merry /* 2004991554f2SKenneth D. Merry * This is the only place that the event/reply should be freed. 2005991554f2SKenneth D. Merry * Anything wanting to hold onto the event data should have 2006991554f2SKenneth D. Merry * already copied it into their own storage. 2007991554f2SKenneth D. Merry */ 2008991554f2SKenneth D. Merry mpr_free_reply(sc, data); 2009991554f2SKenneth D. Merry } 2010991554f2SKenneth D. Merry 2011991554f2SKenneth D. Merry static void 2012991554f2SKenneth D. Merry mpr_reregister_events_complete(struct mpr_softc *sc, struct mpr_command *cm) 2013991554f2SKenneth D. Merry { 2014991554f2SKenneth D. Merry mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 2015991554f2SKenneth D. Merry 2016991554f2SKenneth D. Merry if (cm->cm_reply) 2017991554f2SKenneth D. Merry mpr_print_event(sc, 2018991554f2SKenneth D. Merry (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply); 2019991554f2SKenneth D. Merry 2020991554f2SKenneth D. Merry mpr_free_command(sc, cm); 2021991554f2SKenneth D. Merry 2022991554f2SKenneth D. Merry /* next, send a port enable */ 2023991554f2SKenneth D. Merry mprsas_startup(sc); 2024991554f2SKenneth D. Merry } 2025991554f2SKenneth D. Merry 2026991554f2SKenneth D. Merry /* 2027991554f2SKenneth D. Merry * For both register_events and update_events, the caller supplies a bitmap 2028991554f2SKenneth D. Merry * of events that it _wants_. These functions then turn that into a bitmask 2029991554f2SKenneth D. Merry * suitable for the controller. 2030991554f2SKenneth D. Merry */ 2031991554f2SKenneth D. Merry int 2032991554f2SKenneth D. Merry mpr_register_events(struct mpr_softc *sc, uint8_t *mask, 2033991554f2SKenneth D. Merry mpr_evt_callback_t *cb, void *data, struct mpr_event_handle **handle) 2034991554f2SKenneth D. Merry { 2035991554f2SKenneth D. Merry struct mpr_event_handle *eh; 2036991554f2SKenneth D. Merry int error = 0; 2037991554f2SKenneth D. Merry 2038991554f2SKenneth D. Merry eh = malloc(sizeof(struct mpr_event_handle), M_MPR, M_WAITOK|M_ZERO); 2039991554f2SKenneth D. Merry if (!eh) { 2040991554f2SKenneth D. Merry device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n", 2041991554f2SKenneth D. Merry __func__, __LINE__); 2042991554f2SKenneth D. Merry return (ENOMEM); 2043991554f2SKenneth D. Merry } 2044991554f2SKenneth D. Merry eh->callback = cb; 2045991554f2SKenneth D. Merry eh->data = data; 2046991554f2SKenneth D. Merry TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list); 2047991554f2SKenneth D. Merry if (mask != NULL) 2048991554f2SKenneth D. Merry error = mpr_update_events(sc, eh, mask); 2049991554f2SKenneth D. Merry *handle = eh; 2050991554f2SKenneth D. Merry 2051991554f2SKenneth D. Merry return (error); 2052991554f2SKenneth D. Merry } 2053991554f2SKenneth D. Merry 2054991554f2SKenneth D. Merry int 2055991554f2SKenneth D. Merry mpr_update_events(struct mpr_softc *sc, struct mpr_event_handle *handle, 2056991554f2SKenneth D. Merry uint8_t *mask) 2057991554f2SKenneth D. Merry { 2058991554f2SKenneth D. Merry MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2059991554f2SKenneth D. Merry MPI2_EVENT_NOTIFICATION_REPLY *reply; 2060991554f2SKenneth D. Merry struct mpr_command *cm; 2061991554f2SKenneth D. Merry struct mpr_event_handle *eh; 2062991554f2SKenneth D. Merry int error, i; 2063991554f2SKenneth D. Merry 2064991554f2SKenneth D. Merry mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 2065991554f2SKenneth D. Merry 2066991554f2SKenneth D. Merry if ((mask != NULL) && (handle != NULL)) 2067991554f2SKenneth D. Merry bcopy(mask, &handle->mask[0], 16); 2068991554f2SKenneth D. Merry memset(sc->event_mask, 0xff, 16); 2069991554f2SKenneth D. Merry 2070991554f2SKenneth D. Merry TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2071991554f2SKenneth D. Merry for (i = 0; i < 16; i++) 2072991554f2SKenneth D. Merry sc->event_mask[i] &= ~eh->mask[i]; 2073991554f2SKenneth D. Merry } 2074991554f2SKenneth D. Merry 2075991554f2SKenneth D. Merry if ((cm = mpr_alloc_command(sc)) == NULL) 2076991554f2SKenneth D. Merry return (EBUSY); 2077991554f2SKenneth D. Merry evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2078991554f2SKenneth D. Merry evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2079991554f2SKenneth D. Merry evtreq->MsgFlags = 0; 2080991554f2SKenneth D. Merry evtreq->SASBroadcastPrimitiveMasks = 0; 2081991554f2SKenneth D. Merry #ifdef MPR_DEBUG_ALL_EVENTS 2082991554f2SKenneth D. Merry { 2083991554f2SKenneth D. Merry u_char fullmask[16]; 2084991554f2SKenneth D. Merry memset(fullmask, 0x00, 16); 2085991554f2SKenneth D. Merry bcopy(fullmask, (uint8_t *)&evtreq->EventMasks, 16); 2086991554f2SKenneth D. Merry } 2087991554f2SKenneth D. Merry #else 2088991554f2SKenneth D. Merry bcopy(sc->event_mask, (uint8_t *)&evtreq->EventMasks, 16); 2089991554f2SKenneth D. Merry #endif 2090991554f2SKenneth D. Merry cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2091991554f2SKenneth D. Merry cm->cm_data = NULL; 2092991554f2SKenneth D. Merry 2093991554f2SKenneth D. Merry error = mpr_request_polled(sc, cm); 2094991554f2SKenneth D. Merry reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply; 2095991554f2SKenneth D. Merry if ((reply == NULL) || 2096991554f2SKenneth D. Merry (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 2097991554f2SKenneth D. Merry error = ENXIO; 2098991554f2SKenneth D. Merry 2099991554f2SKenneth D. Merry if (reply) 2100991554f2SKenneth D. Merry mpr_print_event(sc, reply); 2101991554f2SKenneth D. Merry 2102991554f2SKenneth D. Merry mpr_dprint(sc, MPR_TRACE, "%s finished error %d\n", __func__, error); 2103991554f2SKenneth D. Merry 2104991554f2SKenneth D. Merry mpr_free_command(sc, cm); 2105991554f2SKenneth D. Merry return (error); 2106991554f2SKenneth D. Merry } 2107991554f2SKenneth D. Merry 2108991554f2SKenneth D. Merry static int 2109991554f2SKenneth D. Merry mpr_reregister_events(struct mpr_softc *sc) 2110991554f2SKenneth D. Merry { 2111991554f2SKenneth D. Merry MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2112991554f2SKenneth D. Merry struct mpr_command *cm; 2113991554f2SKenneth D. Merry struct mpr_event_handle *eh; 2114991554f2SKenneth D. Merry int error, i; 2115991554f2SKenneth D. Merry 2116991554f2SKenneth D. Merry mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 2117991554f2SKenneth D. Merry 2118991554f2SKenneth D. Merry /* first, reregister events */ 2119991554f2SKenneth D. Merry 2120991554f2SKenneth D. Merry memset(sc->event_mask, 0xff, 16); 2121991554f2SKenneth D. Merry 2122991554f2SKenneth D. Merry TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2123991554f2SKenneth D. Merry for (i = 0; i < 16; i++) 2124991554f2SKenneth D. Merry sc->event_mask[i] &= ~eh->mask[i]; 2125991554f2SKenneth D. Merry } 2126991554f2SKenneth D. Merry 2127991554f2SKenneth D. Merry if ((cm = mpr_alloc_command(sc)) == NULL) 2128991554f2SKenneth D. Merry return (EBUSY); 2129991554f2SKenneth D. Merry evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2130991554f2SKenneth D. Merry evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2131991554f2SKenneth D. Merry evtreq->MsgFlags = 0; 2132991554f2SKenneth D. Merry evtreq->SASBroadcastPrimitiveMasks = 0; 2133991554f2SKenneth D. Merry #ifdef MPR_DEBUG_ALL_EVENTS 2134991554f2SKenneth D. Merry { 2135991554f2SKenneth D. Merry u_char fullmask[16]; 2136991554f2SKenneth D. Merry memset(fullmask, 0x00, 16); 2137991554f2SKenneth D. Merry bcopy(fullmask, (uint8_t *)&evtreq->EventMasks, 16); 2138991554f2SKenneth D. Merry } 2139991554f2SKenneth D. Merry #else 2140991554f2SKenneth D. Merry bcopy(sc->event_mask, (uint8_t *)&evtreq->EventMasks, 16); 2141991554f2SKenneth D. Merry #endif 2142991554f2SKenneth D. Merry cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2143991554f2SKenneth D. Merry cm->cm_data = NULL; 2144991554f2SKenneth D. Merry cm->cm_complete = mpr_reregister_events_complete; 2145991554f2SKenneth D. Merry 2146991554f2SKenneth D. Merry error = mpr_map_command(sc, cm); 2147991554f2SKenneth D. Merry 2148991554f2SKenneth D. Merry mpr_dprint(sc, MPR_TRACE, "%s finished with error %d\n", __func__, 2149991554f2SKenneth D. Merry error); 2150991554f2SKenneth D. Merry return (error); 2151991554f2SKenneth D. Merry } 2152991554f2SKenneth D. Merry 2153991554f2SKenneth D. Merry int 2154991554f2SKenneth D. Merry mpr_deregister_events(struct mpr_softc *sc, struct mpr_event_handle *handle) 2155991554f2SKenneth D. Merry { 2156991554f2SKenneth D. Merry 2157991554f2SKenneth D. Merry TAILQ_REMOVE(&sc->event_list, handle, eh_list); 2158991554f2SKenneth D. Merry free(handle, M_MPR); 2159991554f2SKenneth D. Merry return (mpr_update_events(sc, NULL, NULL)); 2160991554f2SKenneth D. Merry } 2161991554f2SKenneth D. Merry 2162991554f2SKenneth D. Merry /* 2163991554f2SKenneth D. Merry * Add a chain element as the next SGE for the specified command. 2164991554f2SKenneth D. Merry * Reset cm_sge and cm_sgesize to indicate all the available space. Chains are 2165991554f2SKenneth D. Merry * only required for IEEE commands. Therefore there is no code for commands 2166a2c14879SStephen McConnell * that have the MPR_CM_FLAGS_SGE_SIMPLE flag set (and those commands 2167a2c14879SStephen McConnell * shouldn't be requesting chains). 2168991554f2SKenneth D. Merry */ 2169991554f2SKenneth D. Merry static int 2170991554f2SKenneth D. Merry mpr_add_chain(struct mpr_command *cm, int segsleft) 2171991554f2SKenneth D. Merry { 2172991554f2SKenneth D. Merry struct mpr_softc *sc = cm->cm_sc; 2173991554f2SKenneth D. Merry MPI2_REQUEST_HEADER *req; 2174991554f2SKenneth D. Merry MPI25_IEEE_SGE_CHAIN64 *ieee_sgc; 2175991554f2SKenneth D. Merry struct mpr_chain *chain; 2176991554f2SKenneth D. Merry int space, sgc_size, current_segs, rem_segs, segs_per_frame; 2177991554f2SKenneth D. Merry uint8_t next_chain_offset = 0; 2178991554f2SKenneth D. Merry 2179991554f2SKenneth D. Merry /* 2180991554f2SKenneth D. Merry * Fail if a command is requesting a chain for SIMPLE SGE's. For SAS3 2181991554f2SKenneth D. Merry * only IEEE commands should be requesting chains. Return some error 2182991554f2SKenneth D. Merry * code other than 0. 2183991554f2SKenneth D. Merry */ 2184991554f2SKenneth D. Merry if (cm->cm_flags & MPR_CM_FLAGS_SGE_SIMPLE) { 2185991554f2SKenneth D. Merry mpr_dprint(sc, MPR_ERROR, "A chain element cannot be added to " 2186991554f2SKenneth D. Merry "an MPI SGL.\n"); 2187991554f2SKenneth D. Merry return(ENOBUFS); 2188991554f2SKenneth D. Merry } 2189991554f2SKenneth D. Merry 2190991554f2SKenneth D. Merry sgc_size = sizeof(MPI25_IEEE_SGE_CHAIN64); 2191991554f2SKenneth D. Merry if (cm->cm_sglsize < sgc_size) 2192991554f2SKenneth D. Merry panic("MPR: Need SGE Error Code\n"); 2193991554f2SKenneth D. Merry 2194991554f2SKenneth D. Merry chain = mpr_alloc_chain(cm->cm_sc); 2195991554f2SKenneth D. Merry if (chain == NULL) 2196991554f2SKenneth D. Merry return (ENOBUFS); 2197991554f2SKenneth D. Merry 2198991554f2SKenneth D. Merry space = (int)cm->cm_sc->facts->IOCRequestFrameSize * 4; 2199991554f2SKenneth D. Merry 2200991554f2SKenneth D. Merry /* 2201991554f2SKenneth D. Merry * Note: a double-linked list is used to make it easier to walk for 2202991554f2SKenneth D. Merry * debugging. 2203991554f2SKenneth D. Merry */ 2204991554f2SKenneth D. Merry TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link); 2205991554f2SKenneth D. Merry 2206991554f2SKenneth D. Merry /* 2207991554f2SKenneth D. Merry * Need to know if the number of frames left is more than 1 or not. If 2208991554f2SKenneth D. Merry * more than 1 frame is required, NextChainOffset will need to be set, 2209991554f2SKenneth D. Merry * which will just be the last segment of the frame. 2210991554f2SKenneth D. Merry */ 2211991554f2SKenneth D. Merry rem_segs = 0; 2212991554f2SKenneth D. Merry if (cm->cm_sglsize < (sgc_size * segsleft)) { 2213991554f2SKenneth D. Merry /* 2214991554f2SKenneth D. Merry * rem_segs is the number of segements remaining after the 2215991554f2SKenneth D. Merry * segments that will go into the current frame. Since it is 2216991554f2SKenneth D. Merry * known that at least one more frame is required, account for 2217991554f2SKenneth D. Merry * the chain element. To know if more than one more frame is 2218991554f2SKenneth D. Merry * required, just check if there will be a remainder after using 2219991554f2SKenneth D. Merry * the current frame (with this chain) and the next frame. If 2220991554f2SKenneth D. Merry * so the NextChainOffset must be the last element of the next 2221991554f2SKenneth D. Merry * frame. 2222991554f2SKenneth D. Merry */ 2223991554f2SKenneth D. Merry current_segs = (cm->cm_sglsize / sgc_size) - 1; 2224991554f2SKenneth D. Merry rem_segs = segsleft - current_segs; 2225991554f2SKenneth D. Merry segs_per_frame = space / sgc_size; 2226991554f2SKenneth D. Merry if (rem_segs > segs_per_frame) { 2227991554f2SKenneth D. Merry next_chain_offset = segs_per_frame - 1; 2228991554f2SKenneth D. Merry } 2229991554f2SKenneth D. Merry } 2230991554f2SKenneth D. Merry ieee_sgc = &((MPI25_SGE_IO_UNION *)cm->cm_sge)->IeeeChain; 2231991554f2SKenneth D. Merry ieee_sgc->Length = next_chain_offset ? htole32((uint32_t)space) : 2232991554f2SKenneth D. Merry htole32((uint32_t)rem_segs * (uint32_t)sgc_size); 2233991554f2SKenneth D. Merry ieee_sgc->NextChainOffset = next_chain_offset; 2234991554f2SKenneth D. Merry ieee_sgc->Flags = (MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT | 2235991554f2SKenneth D. Merry MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR); 2236991554f2SKenneth D. Merry ieee_sgc->Address.Low = htole32(chain->chain_busaddr); 2237991554f2SKenneth D. Merry ieee_sgc->Address.High = htole32(chain->chain_busaddr >> 32); 2238991554f2SKenneth D. Merry cm->cm_sge = &((MPI25_SGE_IO_UNION *)chain->chain)->IeeeSimple; 2239991554f2SKenneth D. Merry req = (MPI2_REQUEST_HEADER *)cm->cm_req; 2240991554f2SKenneth D. Merry req->ChainOffset = ((sc->facts->IOCRequestFrameSize * 4) - 2241991554f2SKenneth D. Merry sgc_size) >> 4; 2242991554f2SKenneth D. Merry 2243991554f2SKenneth D. Merry cm->cm_sglsize = space; 2244991554f2SKenneth D. Merry return (0); 2245991554f2SKenneth D. Merry } 2246991554f2SKenneth D. Merry 2247991554f2SKenneth D. Merry /* 2248991554f2SKenneth D. Merry * Add one scatter-gather element to the scatter-gather list for a command. 2249a2c14879SStephen McConnell * Maintain cm_sglsize and cm_sge as the remaining size and pointer to the 2250a2c14879SStephen McConnell * next SGE to fill in, respectively. In Gen3, the MPI SGL does not have a 2251a2c14879SStephen McConnell * chain, so don't consider any chain additions. 2252991554f2SKenneth D. Merry */ 2253991554f2SKenneth D. Merry int 2254991554f2SKenneth D. Merry mpr_push_sge(struct mpr_command *cm, MPI2_SGE_SIMPLE64 *sge, size_t len, 2255991554f2SKenneth D. Merry int segsleft) 2256991554f2SKenneth D. Merry { 2257991554f2SKenneth D. Merry uint32_t saved_buf_len, saved_address_low, saved_address_high; 2258991554f2SKenneth D. Merry u32 sge_flags; 2259991554f2SKenneth D. Merry 2260991554f2SKenneth D. Merry /* 2261991554f2SKenneth D. Merry * case 1: >=1 more segment, no room for anything (error) 2262991554f2SKenneth D. Merry * case 2: 1 more segment and enough room for it 2263991554f2SKenneth D. Merry */ 2264991554f2SKenneth D. Merry 2265991554f2SKenneth D. Merry if (cm->cm_sglsize < (segsleft * sizeof(MPI2_SGE_SIMPLE64))) { 2266991554f2SKenneth D. Merry mpr_dprint(cm->cm_sc, MPR_ERROR, 2267991554f2SKenneth D. Merry "%s: warning: Not enough room for MPI SGL in frame.\n", 2268991554f2SKenneth D. Merry __func__); 2269991554f2SKenneth D. Merry return(ENOBUFS); 2270991554f2SKenneth D. Merry } 2271991554f2SKenneth D. Merry 2272991554f2SKenneth D. Merry KASSERT(segsleft == 1, 2273991554f2SKenneth D. Merry ("segsleft cannot be more than 1 for an MPI SGL; segsleft = %d\n", 2274991554f2SKenneth D. Merry segsleft)); 2275991554f2SKenneth D. Merry 2276991554f2SKenneth D. Merry /* 2277991554f2SKenneth D. Merry * There is one more segment left to add for the MPI SGL and there is 2278991554f2SKenneth D. Merry * enough room in the frame to add it. This is the normal case because 2279991554f2SKenneth D. Merry * MPI SGL's don't have chains, otherwise something is wrong. 2280991554f2SKenneth D. Merry * 2281991554f2SKenneth D. Merry * If this is a bi-directional request, need to account for that 2282991554f2SKenneth D. Merry * here. Save the pre-filled sge values. These will be used 2283991554f2SKenneth D. Merry * either for the 2nd SGL or for a single direction SGL. If 2284991554f2SKenneth D. Merry * cm_out_len is non-zero, this is a bi-directional request, so 2285991554f2SKenneth D. Merry * fill in the OUT SGL first, then the IN SGL, otherwise just 2286991554f2SKenneth D. Merry * fill in the IN SGL. Note that at this time, when filling in 2287991554f2SKenneth D. Merry * 2 SGL's for a bi-directional request, they both use the same 2288991554f2SKenneth D. Merry * DMA buffer (same cm command). 2289991554f2SKenneth D. Merry */ 2290991554f2SKenneth D. Merry saved_buf_len = sge->FlagsLength & 0x00FFFFFF; 2291991554f2SKenneth D. Merry saved_address_low = sge->Address.Low; 2292991554f2SKenneth D. Merry saved_address_high = sge->Address.High; 2293991554f2SKenneth D. Merry if (cm->cm_out_len) { 2294991554f2SKenneth D. Merry sge->FlagsLength = cm->cm_out_len | 2295991554f2SKenneth D. Merry ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2296991554f2SKenneth D. Merry MPI2_SGE_FLAGS_END_OF_BUFFER | 2297991554f2SKenneth D. Merry MPI2_SGE_FLAGS_HOST_TO_IOC | 2298991554f2SKenneth D. Merry MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2299991554f2SKenneth D. Merry MPI2_SGE_FLAGS_SHIFT); 2300991554f2SKenneth D. Merry cm->cm_sglsize -= len; 2301991554f2SKenneth D. Merry /* Endian Safe code */ 2302991554f2SKenneth D. Merry sge_flags = sge->FlagsLength; 2303991554f2SKenneth D. Merry sge->FlagsLength = htole32(sge_flags); 2304991554f2SKenneth D. Merry sge->Address.High = htole32(sge->Address.High); 2305991554f2SKenneth D. Merry sge->Address.Low = htole32(sge->Address.Low); 2306991554f2SKenneth D. Merry bcopy(sge, cm->cm_sge, len); 2307991554f2SKenneth D. Merry cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2308991554f2SKenneth D. Merry } 2309991554f2SKenneth D. Merry sge->FlagsLength = saved_buf_len | 2310991554f2SKenneth D. Merry ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2311991554f2SKenneth D. Merry MPI2_SGE_FLAGS_END_OF_BUFFER | 2312991554f2SKenneth D. Merry MPI2_SGE_FLAGS_LAST_ELEMENT | 2313991554f2SKenneth D. Merry MPI2_SGE_FLAGS_END_OF_LIST | 2314991554f2SKenneth D. Merry MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2315991554f2SKenneth D. Merry MPI2_SGE_FLAGS_SHIFT); 2316991554f2SKenneth D. Merry if (cm->cm_flags & MPR_CM_FLAGS_DATAIN) { 2317991554f2SKenneth D. Merry sge->FlagsLength |= 2318991554f2SKenneth D. Merry ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) << 2319991554f2SKenneth D. Merry MPI2_SGE_FLAGS_SHIFT); 2320991554f2SKenneth D. Merry } else { 2321991554f2SKenneth D. Merry sge->FlagsLength |= 2322991554f2SKenneth D. Merry ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) << 2323991554f2SKenneth D. Merry MPI2_SGE_FLAGS_SHIFT); 2324991554f2SKenneth D. Merry } 2325991554f2SKenneth D. Merry sge->Address.Low = saved_address_low; 2326991554f2SKenneth D. Merry sge->Address.High = saved_address_high; 2327991554f2SKenneth D. Merry 2328991554f2SKenneth D. Merry cm->cm_sglsize -= len; 2329991554f2SKenneth D. Merry /* Endian Safe code */ 2330991554f2SKenneth D. Merry sge_flags = sge->FlagsLength; 2331991554f2SKenneth D. Merry sge->FlagsLength = htole32(sge_flags); 2332991554f2SKenneth D. Merry sge->Address.High = htole32(sge->Address.High); 2333991554f2SKenneth D. Merry sge->Address.Low = htole32(sge->Address.Low); 2334991554f2SKenneth D. Merry bcopy(sge, cm->cm_sge, len); 2335991554f2SKenneth D. Merry cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2336991554f2SKenneth D. Merry return (0); 2337991554f2SKenneth D. Merry } 2338991554f2SKenneth D. Merry 2339991554f2SKenneth D. Merry /* 2340991554f2SKenneth D. Merry * Add one IEEE scatter-gather element (chain or simple) to the IEEE scatter- 2341991554f2SKenneth D. Merry * gather list for a command. Maintain cm_sglsize and cm_sge as the 2342991554f2SKenneth D. Merry * remaining size and pointer to the next SGE to fill in, respectively. 2343991554f2SKenneth D. Merry */ 2344991554f2SKenneth D. Merry int 2345991554f2SKenneth D. Merry mpr_push_ieee_sge(struct mpr_command *cm, void *sgep, int segsleft) 2346991554f2SKenneth D. Merry { 2347991554f2SKenneth D. Merry MPI2_IEEE_SGE_SIMPLE64 *sge = sgep; 2348991554f2SKenneth D. Merry int error, ieee_sge_size = sizeof(MPI25_SGE_IO_UNION); 2349991554f2SKenneth D. Merry uint32_t saved_buf_len, saved_address_low, saved_address_high; 2350991554f2SKenneth D. Merry uint32_t sge_length; 2351991554f2SKenneth D. Merry 2352991554f2SKenneth D. Merry /* 2353991554f2SKenneth D. Merry * case 1: No room for chain or segment (error). 2354991554f2SKenneth D. Merry * case 2: Two or more segments left but only room for chain. 2355991554f2SKenneth D. Merry * case 3: Last segment and room for it, so set flags. 2356991554f2SKenneth D. Merry */ 2357991554f2SKenneth D. Merry 2358991554f2SKenneth D. Merry /* 2359991554f2SKenneth D. Merry * There should be room for at least one element, or there is a big 2360991554f2SKenneth D. Merry * problem. 2361991554f2SKenneth D. Merry */ 2362991554f2SKenneth D. Merry if (cm->cm_sglsize < ieee_sge_size) 2363991554f2SKenneth D. Merry panic("MPR: Need SGE Error Code\n"); 2364991554f2SKenneth D. Merry 2365991554f2SKenneth D. Merry if ((segsleft >= 2) && (cm->cm_sglsize < (ieee_sge_size * 2))) { 2366991554f2SKenneth D. Merry if ((error = mpr_add_chain(cm, segsleft)) != 0) 2367991554f2SKenneth D. Merry return (error); 2368991554f2SKenneth D. Merry } 2369991554f2SKenneth D. Merry 2370991554f2SKenneth D. Merry if (segsleft == 1) { 2371991554f2SKenneth D. Merry /* 2372991554f2SKenneth D. Merry * If this is a bi-directional request, need to account for that 2373991554f2SKenneth D. Merry * here. Save the pre-filled sge values. These will be used 2374991554f2SKenneth D. Merry * either for the 2nd SGL or for a single direction SGL. If 2375991554f2SKenneth D. Merry * cm_out_len is non-zero, this is a bi-directional request, so 2376991554f2SKenneth D. Merry * fill in the OUT SGL first, then the IN SGL, otherwise just 2377991554f2SKenneth D. Merry * fill in the IN SGL. Note that at this time, when filling in 2378991554f2SKenneth D. Merry * 2 SGL's for a bi-directional request, they both use the same 2379991554f2SKenneth D. Merry * DMA buffer (same cm command). 2380991554f2SKenneth D. Merry */ 2381991554f2SKenneth D. Merry saved_buf_len = sge->Length; 2382991554f2SKenneth D. Merry saved_address_low = sge->Address.Low; 2383991554f2SKenneth D. Merry saved_address_high = sge->Address.High; 2384991554f2SKenneth D. Merry if (cm->cm_out_len) { 2385991554f2SKenneth D. Merry sge->Length = cm->cm_out_len; 2386991554f2SKenneth D. Merry sge->Flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT | 2387991554f2SKenneth D. Merry MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR); 2388991554f2SKenneth D. Merry cm->cm_sglsize -= ieee_sge_size; 2389991554f2SKenneth D. Merry /* Endian Safe code */ 2390991554f2SKenneth D. Merry sge_length = sge->Length; 2391991554f2SKenneth D. Merry sge->Length = htole32(sge_length); 2392991554f2SKenneth D. Merry sge->Address.High = htole32(sge->Address.High); 2393991554f2SKenneth D. Merry sge->Address.Low = htole32(sge->Address.Low); 2394991554f2SKenneth D. Merry bcopy(sgep, cm->cm_sge, ieee_sge_size); 2395991554f2SKenneth D. Merry cm->cm_sge = 2396991554f2SKenneth D. Merry (MPI25_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + 2397991554f2SKenneth D. Merry ieee_sge_size); 2398991554f2SKenneth D. Merry } 2399991554f2SKenneth D. Merry sge->Length = saved_buf_len; 2400991554f2SKenneth D. Merry sge->Flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT | 2401991554f2SKenneth D. Merry MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR | 2402991554f2SKenneth D. Merry MPI25_IEEE_SGE_FLAGS_END_OF_LIST); 2403991554f2SKenneth D. Merry sge->Address.Low = saved_address_low; 2404991554f2SKenneth D. Merry sge->Address.High = saved_address_high; 2405991554f2SKenneth D. Merry } 2406991554f2SKenneth D. Merry 2407991554f2SKenneth D. Merry cm->cm_sglsize -= ieee_sge_size; 2408991554f2SKenneth D. Merry /* Endian Safe code */ 2409991554f2SKenneth D. Merry sge_length = sge->Length; 2410991554f2SKenneth D. Merry sge->Length = htole32(sge_length); 2411991554f2SKenneth D. Merry sge->Address.High = htole32(sge->Address.High); 2412991554f2SKenneth D. Merry sge->Address.Low = htole32(sge->Address.Low); 2413991554f2SKenneth D. Merry bcopy(sgep, cm->cm_sge, ieee_sge_size); 2414991554f2SKenneth D. Merry cm->cm_sge = (MPI25_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + 2415991554f2SKenneth D. Merry ieee_sge_size); 2416991554f2SKenneth D. Merry return (0); 2417991554f2SKenneth D. Merry } 2418991554f2SKenneth D. Merry 2419991554f2SKenneth D. Merry /* 2420991554f2SKenneth D. Merry * Add one dma segment to the scatter-gather list for a command. 2421991554f2SKenneth D. Merry */ 2422991554f2SKenneth D. Merry int 2423991554f2SKenneth D. Merry mpr_add_dmaseg(struct mpr_command *cm, vm_paddr_t pa, size_t len, u_int flags, 2424991554f2SKenneth D. Merry int segsleft) 2425991554f2SKenneth D. Merry { 2426991554f2SKenneth D. Merry MPI2_SGE_SIMPLE64 sge; 2427991554f2SKenneth D. Merry MPI2_IEEE_SGE_SIMPLE64 ieee_sge; 2428991554f2SKenneth D. Merry 2429991554f2SKenneth D. Merry if (!(cm->cm_flags & MPR_CM_FLAGS_SGE_SIMPLE)) { 2430991554f2SKenneth D. Merry ieee_sge.Flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT | 2431991554f2SKenneth D. Merry MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR); 2432991554f2SKenneth D. Merry ieee_sge.Length = len; 2433991554f2SKenneth D. Merry mpr_from_u64(pa, &ieee_sge.Address); 2434991554f2SKenneth D. Merry 2435991554f2SKenneth D. Merry return (mpr_push_ieee_sge(cm, &ieee_sge, segsleft)); 2436991554f2SKenneth D. Merry } else { 2437991554f2SKenneth D. Merry /* 2438991554f2SKenneth D. Merry * This driver always uses 64-bit address elements for 2439991554f2SKenneth D. Merry * simplicity. 2440991554f2SKenneth D. Merry */ 2441991554f2SKenneth D. Merry flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2442991554f2SKenneth D. Merry MPI2_SGE_FLAGS_64_BIT_ADDRESSING; 2443991554f2SKenneth D. Merry /* Set Endian safe macro in mpr_push_sge */ 2444991554f2SKenneth D. Merry sge.FlagsLength = len | (flags << MPI2_SGE_FLAGS_SHIFT); 2445991554f2SKenneth D. Merry mpr_from_u64(pa, &sge.Address); 2446991554f2SKenneth D. Merry 2447991554f2SKenneth D. Merry return (mpr_push_sge(cm, &sge, sizeof sge, segsleft)); 2448991554f2SKenneth D. Merry } 2449991554f2SKenneth D. Merry } 2450991554f2SKenneth D. Merry 2451991554f2SKenneth D. Merry static void 2452991554f2SKenneth D. Merry mpr_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 2453991554f2SKenneth D. Merry { 2454991554f2SKenneth D. Merry struct mpr_softc *sc; 2455991554f2SKenneth D. Merry struct mpr_command *cm; 2456991554f2SKenneth D. Merry u_int i, dir, sflags; 2457991554f2SKenneth D. Merry 2458991554f2SKenneth D. Merry cm = (struct mpr_command *)arg; 2459991554f2SKenneth D. Merry sc = cm->cm_sc; 2460991554f2SKenneth D. Merry 2461991554f2SKenneth D. Merry /* 2462991554f2SKenneth D. Merry * In this case, just print out a warning and let the chip tell the 2463991554f2SKenneth D. Merry * user they did the wrong thing. 2464991554f2SKenneth D. Merry */ 2465991554f2SKenneth D. Merry if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) { 2466991554f2SKenneth D. Merry mpr_dprint(sc, MPR_ERROR, 2467991554f2SKenneth D. Merry "%s: warning: busdma returned %d segments, " 2468991554f2SKenneth D. Merry "more than the %d allowed\n", __func__, nsegs, 2469991554f2SKenneth D. Merry cm->cm_max_segs); 2470991554f2SKenneth D. Merry } 2471991554f2SKenneth D. Merry 2472991554f2SKenneth D. Merry /* 2473991554f2SKenneth D. Merry * Set up DMA direction flags. Bi-directional requests are also handled 2474991554f2SKenneth D. Merry * here. In that case, both direction flags will be set. 2475991554f2SKenneth D. Merry */ 2476991554f2SKenneth D. Merry sflags = 0; 2477991554f2SKenneth D. Merry if (cm->cm_flags & MPR_CM_FLAGS_SMP_PASS) { 2478991554f2SKenneth D. Merry /* 2479991554f2SKenneth D. Merry * We have to add a special case for SMP passthrough, there 2480991554f2SKenneth D. Merry * is no easy way to generically handle it. The first 2481991554f2SKenneth D. Merry * S/G element is used for the command (therefore the 2482991554f2SKenneth D. Merry * direction bit needs to be set). The second one is used 2483991554f2SKenneth D. Merry * for the reply. We'll leave it to the caller to make 2484991554f2SKenneth D. Merry * sure we only have two buffers. 2485991554f2SKenneth D. Merry */ 2486991554f2SKenneth D. Merry /* 2487991554f2SKenneth D. Merry * Even though the busdma man page says it doesn't make 2488991554f2SKenneth D. Merry * sense to have both direction flags, it does in this case. 2489991554f2SKenneth D. Merry * We have one s/g element being accessed in each direction. 2490991554f2SKenneth D. Merry */ 2491991554f2SKenneth D. Merry dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD; 2492991554f2SKenneth D. Merry 2493991554f2SKenneth D. Merry /* 2494991554f2SKenneth D. Merry * Set the direction flag on the first buffer in the SMP 2495991554f2SKenneth D. Merry * passthrough request. We'll clear it for the second one. 2496991554f2SKenneth D. Merry */ 2497991554f2SKenneth D. Merry sflags |= MPI2_SGE_FLAGS_DIRECTION | 2498991554f2SKenneth D. Merry MPI2_SGE_FLAGS_END_OF_BUFFER; 2499991554f2SKenneth D. Merry } else if (cm->cm_flags & MPR_CM_FLAGS_DATAOUT) { 2500991554f2SKenneth D. Merry sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC; 2501991554f2SKenneth D. Merry dir = BUS_DMASYNC_PREWRITE; 2502991554f2SKenneth D. Merry } else 2503991554f2SKenneth D. Merry dir = BUS_DMASYNC_PREREAD; 2504991554f2SKenneth D. Merry 2505991554f2SKenneth D. Merry for (i = 0; i < nsegs; i++) { 2506991554f2SKenneth D. Merry if ((cm->cm_flags & MPR_CM_FLAGS_SMP_PASS) && (i != 0)) { 2507991554f2SKenneth D. Merry sflags &= ~MPI2_SGE_FLAGS_DIRECTION; 2508991554f2SKenneth D. Merry } 2509991554f2SKenneth D. Merry error = mpr_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len, 2510991554f2SKenneth D. Merry sflags, nsegs - i); 2511991554f2SKenneth D. Merry if (error != 0) { 2512991554f2SKenneth D. Merry /* Resource shortage, roll back! */ 2513991554f2SKenneth D. Merry if (ratecheck(&sc->lastfail, &mpr_chainfail_interval)) 2514991554f2SKenneth D. Merry mpr_dprint(sc, MPR_INFO, "Out of chain frames, " 2515991554f2SKenneth D. Merry "consider increasing hw.mpr.max_chains.\n"); 2516991554f2SKenneth D. Merry cm->cm_flags |= MPR_CM_FLAGS_CHAIN_FAILED; 2517991554f2SKenneth D. Merry mpr_complete_command(sc, cm); 2518991554f2SKenneth D. Merry return; 2519991554f2SKenneth D. Merry } 2520991554f2SKenneth D. Merry } 2521991554f2SKenneth D. Merry 2522991554f2SKenneth D. Merry bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir); 2523991554f2SKenneth D. Merry mpr_enqueue_request(sc, cm); 2524991554f2SKenneth D. Merry 2525991554f2SKenneth D. Merry return; 2526991554f2SKenneth D. Merry } 2527991554f2SKenneth D. Merry 2528991554f2SKenneth D. Merry static void 2529991554f2SKenneth D. Merry mpr_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize, 2530991554f2SKenneth D. Merry int error) 2531991554f2SKenneth D. Merry { 2532991554f2SKenneth D. Merry mpr_data_cb(arg, segs, nsegs, error); 2533991554f2SKenneth D. Merry } 2534991554f2SKenneth D. Merry 2535991554f2SKenneth D. Merry /* 2536991554f2SKenneth D. Merry * This is the routine to enqueue commands ansynchronously. 2537991554f2SKenneth D. Merry * Note that the only error path here is from bus_dmamap_load(), which can 2538991554f2SKenneth D. Merry * return EINPROGRESS if it is waiting for resources. Other than this, it's 2539991554f2SKenneth D. Merry * assumed that if you have a command in-hand, then you have enough credits 2540991554f2SKenneth D. Merry * to use it. 2541991554f2SKenneth D. Merry */ 2542991554f2SKenneth D. Merry int 2543991554f2SKenneth D. Merry mpr_map_command(struct mpr_softc *sc, struct mpr_command *cm) 2544991554f2SKenneth D. Merry { 2545991554f2SKenneth D. Merry int error = 0; 2546991554f2SKenneth D. Merry 2547991554f2SKenneth D. Merry if (cm->cm_flags & MPR_CM_FLAGS_USE_UIO) { 2548991554f2SKenneth D. Merry error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap, 2549991554f2SKenneth D. Merry &cm->cm_uio, mpr_data_cb2, cm, 0); 2550991554f2SKenneth D. Merry } else if (cm->cm_flags & MPR_CM_FLAGS_USE_CCB) { 2551991554f2SKenneth D. Merry error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap, 2552991554f2SKenneth D. Merry cm->cm_data, mpr_data_cb, cm, 0); 2553991554f2SKenneth D. Merry } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) { 2554991554f2SKenneth D. Merry error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap, 2555991554f2SKenneth D. Merry cm->cm_data, cm->cm_length, mpr_data_cb, cm, 0); 2556991554f2SKenneth D. Merry } else { 2557991554f2SKenneth D. Merry /* Add a zero-length element as needed */ 2558991554f2SKenneth D. Merry if (cm->cm_sge != NULL) 2559991554f2SKenneth D. Merry mpr_add_dmaseg(cm, 0, 0, 0, 1); 2560991554f2SKenneth D. Merry mpr_enqueue_request(sc, cm); 2561991554f2SKenneth D. Merry } 2562991554f2SKenneth D. Merry 2563991554f2SKenneth D. Merry return (error); 2564991554f2SKenneth D. Merry } 2565991554f2SKenneth D. Merry 2566991554f2SKenneth D. Merry /* 2567991554f2SKenneth D. Merry * This is the routine to enqueue commands synchronously. An error of 2568991554f2SKenneth D. Merry * EINPROGRESS from mpr_map_command() is ignored since the command will 2569991554f2SKenneth D. Merry * be executed and enqueued automatically. Other errors come from msleep(). 2570991554f2SKenneth D. Merry */ 2571991554f2SKenneth D. Merry int 2572991554f2SKenneth D. Merry mpr_wait_command(struct mpr_softc *sc, struct mpr_command *cm, int timeout, 2573991554f2SKenneth D. Merry int sleep_flag) 2574991554f2SKenneth D. Merry { 2575991554f2SKenneth D. Merry int error, rc; 2576991554f2SKenneth D. Merry struct timeval cur_time, start_time; 2577991554f2SKenneth D. Merry 2578991554f2SKenneth D. Merry if (sc->mpr_flags & MPR_FLAGS_DIAGRESET) 2579991554f2SKenneth D. Merry return EBUSY; 2580991554f2SKenneth D. Merry 2581991554f2SKenneth D. Merry cm->cm_complete = NULL; 2582991554f2SKenneth D. Merry cm->cm_flags |= (MPR_CM_FLAGS_WAKEUP + MPR_CM_FLAGS_POLLED); 2583991554f2SKenneth D. Merry error = mpr_map_command(sc, cm); 2584991554f2SKenneth D. Merry if ((error != 0) && (error != EINPROGRESS)) 2585991554f2SKenneth D. Merry return (error); 2586991554f2SKenneth D. Merry 2587991554f2SKenneth D. Merry // Check for context and wait for 50 mSec at a time until time has 2588991554f2SKenneth D. Merry // expired or the command has finished. If msleep can't be used, need 2589991554f2SKenneth D. Merry // to poll. 2590991554f2SKenneth D. Merry #if __FreeBSD_version >= 1000029 2591991554f2SKenneth D. Merry if (curthread->td_no_sleeping) 2592991554f2SKenneth D. Merry #else //__FreeBSD_version < 1000029 2593991554f2SKenneth D. Merry if (curthread->td_pflags & TDP_NOSLEEPING) 2594991554f2SKenneth D. Merry #endif //__FreeBSD_version >= 1000029 2595991554f2SKenneth D. Merry sleep_flag = NO_SLEEP; 2596991554f2SKenneth D. Merry getmicrotime(&start_time); 2597991554f2SKenneth D. Merry if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP) { 2598991554f2SKenneth D. Merry error = msleep(cm, &sc->mpr_mtx, 0, "mprwait", timeout*hz); 2599991554f2SKenneth D. Merry } else { 2600991554f2SKenneth D. Merry while ((cm->cm_flags & MPR_CM_FLAGS_COMPLETE) == 0) { 2601991554f2SKenneth D. Merry mpr_intr_locked(sc); 2602991554f2SKenneth D. Merry if (sleep_flag == CAN_SLEEP) 2603991554f2SKenneth D. Merry pause("mprwait", hz/20); 2604991554f2SKenneth D. Merry else 2605991554f2SKenneth D. Merry DELAY(50000); 2606991554f2SKenneth D. Merry 2607991554f2SKenneth D. Merry getmicrotime(&cur_time); 2608991554f2SKenneth D. Merry if ((cur_time.tv_sec - start_time.tv_sec) > timeout) { 2609991554f2SKenneth D. Merry error = EWOULDBLOCK; 2610991554f2SKenneth D. Merry break; 2611991554f2SKenneth D. Merry } 2612991554f2SKenneth D. Merry } 2613991554f2SKenneth D. Merry } 2614991554f2SKenneth D. Merry 2615991554f2SKenneth D. Merry if (error == EWOULDBLOCK) { 2616991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "Calling Reinit from %s\n", __func__); 2617991554f2SKenneth D. Merry rc = mpr_reinit(sc); 2618991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "Reinit %s\n", (rc == 0) ? "success" : 2619991554f2SKenneth D. Merry "failed"); 2620991554f2SKenneth D. Merry error = ETIMEDOUT; 2621991554f2SKenneth D. Merry } 2622991554f2SKenneth D. Merry return (error); 2623991554f2SKenneth D. Merry } 2624991554f2SKenneth D. Merry 2625991554f2SKenneth D. Merry /* 2626991554f2SKenneth D. Merry * This is the routine to enqueue a command synchonously and poll for 2627991554f2SKenneth D. Merry * completion. Its use should be rare. 2628991554f2SKenneth D. Merry */ 2629991554f2SKenneth D. Merry int 2630991554f2SKenneth D. Merry mpr_request_polled(struct mpr_softc *sc, struct mpr_command *cm) 2631991554f2SKenneth D. Merry { 2632991554f2SKenneth D. Merry int error, timeout = 0, rc; 2633991554f2SKenneth D. Merry struct timeval cur_time, start_time; 2634991554f2SKenneth D. Merry 2635991554f2SKenneth D. Merry error = 0; 2636991554f2SKenneth D. Merry 2637991554f2SKenneth D. Merry cm->cm_flags |= MPR_CM_FLAGS_POLLED; 2638991554f2SKenneth D. Merry cm->cm_complete = NULL; 2639991554f2SKenneth D. Merry mpr_map_command(sc, cm); 2640991554f2SKenneth D. Merry 2641991554f2SKenneth D. Merry getmicrotime(&start_time); 2642991554f2SKenneth D. Merry while ((cm->cm_flags & MPR_CM_FLAGS_COMPLETE) == 0) { 2643991554f2SKenneth D. Merry mpr_intr_locked(sc); 2644991554f2SKenneth D. Merry 2645991554f2SKenneth D. Merry if (mtx_owned(&sc->mpr_mtx)) 2646991554f2SKenneth D. Merry msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0, 2647991554f2SKenneth D. Merry "mprpoll", hz/20); 2648991554f2SKenneth D. Merry else 2649991554f2SKenneth D. Merry pause("mprpoll", hz/20); 2650991554f2SKenneth D. Merry 2651991554f2SKenneth D. Merry /* 2652991554f2SKenneth D. Merry * Check for real-time timeout and fail if more than 60 seconds. 2653991554f2SKenneth D. Merry */ 2654991554f2SKenneth D. Merry getmicrotime(&cur_time); 2655991554f2SKenneth D. Merry timeout = cur_time.tv_sec - start_time.tv_sec; 2656991554f2SKenneth D. Merry if (timeout > 60) { 2657991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "polling failed\n"); 2658991554f2SKenneth D. Merry error = ETIMEDOUT; 2659991554f2SKenneth D. Merry break; 2660991554f2SKenneth D. Merry } 2661991554f2SKenneth D. Merry } 2662991554f2SKenneth D. Merry 2663991554f2SKenneth D. Merry if (error) { 2664991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "Calling Reinit from %s\n", __func__); 2665991554f2SKenneth D. Merry rc = mpr_reinit(sc); 2666991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, "Reinit %s\n", (rc == 0) ? 2667991554f2SKenneth D. Merry "success" : "failed"); 2668991554f2SKenneth D. Merry } 2669991554f2SKenneth D. Merry return (error); 2670991554f2SKenneth D. Merry } 2671991554f2SKenneth D. Merry 2672991554f2SKenneth D. Merry /* 2673991554f2SKenneth D. Merry * The MPT driver had a verbose interface for config pages. In this driver, 2674*453130d9SPedro F. Giffuni * reduce it to much simpler terms, similar to the Linux driver. 2675991554f2SKenneth D. Merry */ 2676991554f2SKenneth D. Merry int 2677991554f2SKenneth D. Merry mpr_read_config_page(struct mpr_softc *sc, struct mpr_config_params *params) 2678991554f2SKenneth D. Merry { 2679991554f2SKenneth D. Merry MPI2_CONFIG_REQUEST *req; 2680991554f2SKenneth D. Merry struct mpr_command *cm; 2681991554f2SKenneth D. Merry int error; 2682991554f2SKenneth D. Merry 2683991554f2SKenneth D. Merry if (sc->mpr_flags & MPR_FLAGS_BUSY) { 2684991554f2SKenneth D. Merry return (EBUSY); 2685991554f2SKenneth D. Merry } 2686991554f2SKenneth D. Merry 2687991554f2SKenneth D. Merry cm = mpr_alloc_command(sc); 2688991554f2SKenneth D. Merry if (cm == NULL) { 2689991554f2SKenneth D. Merry return (EBUSY); 2690991554f2SKenneth D. Merry } 2691991554f2SKenneth D. Merry 2692991554f2SKenneth D. Merry req = (MPI2_CONFIG_REQUEST *)cm->cm_req; 2693991554f2SKenneth D. Merry req->Function = MPI2_FUNCTION_CONFIG; 2694991554f2SKenneth D. Merry req->Action = params->action; 2695991554f2SKenneth D. Merry req->SGLFlags = 0; 2696991554f2SKenneth D. Merry req->ChainOffset = 0; 2697991554f2SKenneth D. Merry req->PageAddress = params->page_address; 2698991554f2SKenneth D. Merry if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 2699991554f2SKenneth D. Merry MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr; 2700991554f2SKenneth D. Merry 2701991554f2SKenneth D. Merry hdr = ¶ms->hdr.Ext; 2702991554f2SKenneth D. Merry req->ExtPageType = hdr->ExtPageType; 2703991554f2SKenneth D. Merry req->ExtPageLength = hdr->ExtPageLength; 2704991554f2SKenneth D. Merry req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED; 2705991554f2SKenneth D. Merry req->Header.PageLength = 0; /* Must be set to zero */ 2706991554f2SKenneth D. Merry req->Header.PageNumber = hdr->PageNumber; 2707991554f2SKenneth D. Merry req->Header.PageVersion = hdr->PageVersion; 2708991554f2SKenneth D. Merry } else { 2709991554f2SKenneth D. Merry MPI2_CONFIG_PAGE_HEADER *hdr; 2710991554f2SKenneth D. Merry 2711991554f2SKenneth D. Merry hdr = ¶ms->hdr.Struct; 2712991554f2SKenneth D. Merry req->Header.PageType = hdr->PageType; 2713991554f2SKenneth D. Merry req->Header.PageNumber = hdr->PageNumber; 2714991554f2SKenneth D. Merry req->Header.PageLength = hdr->PageLength; 2715991554f2SKenneth D. Merry req->Header.PageVersion = hdr->PageVersion; 2716991554f2SKenneth D. Merry } 2717991554f2SKenneth D. Merry 2718991554f2SKenneth D. Merry cm->cm_data = params->buffer; 2719991554f2SKenneth D. Merry cm->cm_length = params->length; 2720a2c14879SStephen McConnell if (cm->cm_data != NULL) { 2721991554f2SKenneth D. Merry cm->cm_sge = &req->PageBufferSGE; 2722991554f2SKenneth D. Merry cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION); 2723991554f2SKenneth D. Merry cm->cm_flags = MPR_CM_FLAGS_SGE_SIMPLE | MPR_CM_FLAGS_DATAIN; 2724a2c14879SStephen McConnell } else 2725a2c14879SStephen McConnell cm->cm_sge = NULL; 2726991554f2SKenneth D. Merry cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2727991554f2SKenneth D. Merry 2728991554f2SKenneth D. Merry cm->cm_complete_data = params; 2729991554f2SKenneth D. Merry if (params->callback != NULL) { 2730991554f2SKenneth D. Merry cm->cm_complete = mpr_config_complete; 2731991554f2SKenneth D. Merry return (mpr_map_command(sc, cm)); 2732991554f2SKenneth D. Merry } else { 2733991554f2SKenneth D. Merry error = mpr_wait_command(sc, cm, 0, CAN_SLEEP); 2734991554f2SKenneth D. Merry if (error) { 2735991554f2SKenneth D. Merry mpr_dprint(sc, MPR_FAULT, 2736991554f2SKenneth D. Merry "Error %d reading config page\n", error); 2737991554f2SKenneth D. Merry mpr_free_command(sc, cm); 2738991554f2SKenneth D. Merry return (error); 2739991554f2SKenneth D. Merry } 2740991554f2SKenneth D. Merry mpr_config_complete(sc, cm); 2741991554f2SKenneth D. Merry } 2742991554f2SKenneth D. Merry 2743991554f2SKenneth D. Merry return (0); 2744991554f2SKenneth D. Merry } 2745991554f2SKenneth D. Merry 2746991554f2SKenneth D. Merry int 2747991554f2SKenneth D. Merry mpr_write_config_page(struct mpr_softc *sc, struct mpr_config_params *params) 2748991554f2SKenneth D. Merry { 2749991554f2SKenneth D. Merry return (EINVAL); 2750991554f2SKenneth D. Merry } 2751991554f2SKenneth D. Merry 2752991554f2SKenneth D. Merry static void 2753991554f2SKenneth D. Merry mpr_config_complete(struct mpr_softc *sc, struct mpr_command *cm) 2754991554f2SKenneth D. Merry { 2755991554f2SKenneth D. Merry MPI2_CONFIG_REPLY *reply; 2756991554f2SKenneth D. Merry struct mpr_config_params *params; 2757991554f2SKenneth D. Merry 2758991554f2SKenneth D. Merry MPR_FUNCTRACE(sc); 2759991554f2SKenneth D. Merry params = cm->cm_complete_data; 2760991554f2SKenneth D. Merry 2761991554f2SKenneth D. Merry if (cm->cm_data != NULL) { 2762991554f2SKenneth D. Merry bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, 2763991554f2SKenneth D. Merry BUS_DMASYNC_POSTREAD); 2764991554f2SKenneth D. Merry bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap); 2765991554f2SKenneth D. Merry } 2766991554f2SKenneth D. Merry 2767991554f2SKenneth D. Merry /* 2768991554f2SKenneth D. Merry * XXX KDM need to do more error recovery? This results in the 2769991554f2SKenneth D. Merry * device in question not getting probed. 2770991554f2SKenneth D. Merry */ 2771991554f2SKenneth D. Merry if ((cm->cm_flags & MPR_CM_FLAGS_ERROR_MASK) != 0) { 2772991554f2SKenneth D. Merry params->status = MPI2_IOCSTATUS_BUSY; 2773991554f2SKenneth D. Merry goto done; 2774991554f2SKenneth D. Merry } 2775991554f2SKenneth D. Merry 2776991554f2SKenneth D. Merry reply = (MPI2_CONFIG_REPLY *)cm->cm_reply; 2777991554f2SKenneth D. Merry if (reply == NULL) { 2778991554f2SKenneth D. Merry params->status = MPI2_IOCSTATUS_BUSY; 2779991554f2SKenneth D. Merry goto done; 2780991554f2SKenneth D. Merry } 2781991554f2SKenneth D. Merry params->status = reply->IOCStatus; 2782a2c14879SStephen McConnell if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 2783991554f2SKenneth D. Merry params->hdr.Ext.ExtPageType = reply->ExtPageType; 2784991554f2SKenneth D. Merry params->hdr.Ext.ExtPageLength = reply->ExtPageLength; 2785a2c14879SStephen McConnell params->hdr.Ext.PageType = reply->Header.PageType; 2786a2c14879SStephen McConnell params->hdr.Ext.PageNumber = reply->Header.PageNumber; 2787a2c14879SStephen McConnell params->hdr.Ext.PageVersion = reply->Header.PageVersion; 2788991554f2SKenneth D. Merry } else { 2789991554f2SKenneth D. Merry params->hdr.Struct.PageType = reply->Header.PageType; 2790991554f2SKenneth D. Merry params->hdr.Struct.PageNumber = reply->Header.PageNumber; 2791991554f2SKenneth D. Merry params->hdr.Struct.PageLength = reply->Header.PageLength; 2792991554f2SKenneth D. Merry params->hdr.Struct.PageVersion = reply->Header.PageVersion; 2793991554f2SKenneth D. Merry } 2794991554f2SKenneth D. Merry 2795991554f2SKenneth D. Merry done: 2796991554f2SKenneth D. Merry mpr_free_command(sc, cm); 2797991554f2SKenneth D. Merry if (params->callback != NULL) 2798991554f2SKenneth D. Merry params->callback(sc, params); 2799991554f2SKenneth D. Merry 2800991554f2SKenneth D. Merry return; 2801991554f2SKenneth D. Merry } 2802