xref: /freebsd/sys/dev/mpr/mpi/mpi2_ra.h (revision 28ae62b0666d125aff7ef83dc78438149cf032eb)
1991554f2SKenneth D. Merry /*-
2a2c14879SStephen McConnell  * Copyright (c) 2012-2015 LSI Corp.
3*28ae62b0SStephen McConnell  * Copyright (c) 2013-2016 Avago Technologies
4991554f2SKenneth D. Merry  * All rights reserved.
5991554f2SKenneth D. Merry  *
6991554f2SKenneth D. Merry  * Redistribution and use in source and binary forms, with or without
7991554f2SKenneth D. Merry  * modification, are permitted provided that the following conditions
8991554f2SKenneth D. Merry  * are met:
9991554f2SKenneth D. Merry  * 1. Redistributions of source code must retain the above copyright
10991554f2SKenneth D. Merry  *    notice, this list of conditions and the following disclaimer.
11991554f2SKenneth D. Merry  * 2. Redistributions in binary form must reproduce the above copyright
12991554f2SKenneth D. Merry  *    notice, this list of conditions and the following disclaimer in the
13991554f2SKenneth D. Merry  *    documentation and/or other materials provided with the distribution.
14991554f2SKenneth D. Merry  * 3. Neither the name of the author nor the names of any co-contributors
15991554f2SKenneth D. Merry  *    may be used to endorse or promote products derived from this software
16991554f2SKenneth D. Merry  *    without specific prior written permission.
17991554f2SKenneth D. Merry  *
18991554f2SKenneth D. Merry  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19991554f2SKenneth D. Merry  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20991554f2SKenneth D. Merry  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21991554f2SKenneth D. Merry  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22991554f2SKenneth D. Merry  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23991554f2SKenneth D. Merry  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24991554f2SKenneth D. Merry  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25991554f2SKenneth D. Merry  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26991554f2SKenneth D. Merry  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27991554f2SKenneth D. Merry  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28991554f2SKenneth D. Merry  * SUCH DAMAGE.
29991554f2SKenneth D. Merry  *
30a2c14879SStephen McConnell  * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
31991554f2SKenneth D. Merry  *
32991554f2SKenneth D. Merry  * $FreeBSD$
33991554f2SKenneth D. Merry  */
34991554f2SKenneth D. Merry 
35991554f2SKenneth D. Merry /*
36a2c14879SStephen McConnell  *  Copyright (c) 2012-2015 LSI Corporation.
37*28ae62b0SStephen McConnell  *  Copyright (c) 2013-2016 Avago Technologies
38*28ae62b0SStephen McConnell  *  All rights reserved.
39991554f2SKenneth D. Merry  *
40991554f2SKenneth D. Merry  *
41991554f2SKenneth D. Merry  *           Name:  mpi2_ra.h
42991554f2SKenneth D. Merry  *          Title:  MPI RAID Accelerator messages and structures
43991554f2SKenneth D. Merry  *  Creation Date:  April 13, 2009
44991554f2SKenneth D. Merry  *
45*28ae62b0SStephen McConnell  *  mpi2_ra.h Version:  02.00.01
46991554f2SKenneth D. Merry  *
47991554f2SKenneth D. Merry  *  Version History
48991554f2SKenneth D. Merry  *  ---------------
49991554f2SKenneth D. Merry  *
50991554f2SKenneth D. Merry  *  Date      Version   Description
51991554f2SKenneth D. Merry  *  --------  --------  ------------------------------------------------------
52991554f2SKenneth D. Merry  *  05-06-09  02.00.00  Initial version.
53*28ae62b0SStephen McConnell  *  11-18-14  02.00.01  Updated copyright information.
54991554f2SKenneth D. Merry  *  --------------------------------------------------------------------------
55991554f2SKenneth D. Merry  */
56991554f2SKenneth D. Merry 
57991554f2SKenneth D. Merry #ifndef MPI2_RA_H
58991554f2SKenneth D. Merry #define MPI2_RA_H
59991554f2SKenneth D. Merry 
60991554f2SKenneth D. Merry /* generic structure for RAID Accelerator Control Block */
61991554f2SKenneth D. Merry typedef struct _MPI2_RAID_ACCELERATOR_CONTROL_BLOCK
62991554f2SKenneth D. Merry {
63991554f2SKenneth D. Merry     U32                 Reserved[8];                /* 0x00 */
64991554f2SKenneth D. Merry     U32                 RaidAcceleratorCDB[1];      /* 0x20 */
65991554f2SKenneth D. Merry } MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
66991554f2SKenneth D. Merry   MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
67991554f2SKenneth D. Merry   Mpi2RAIDAcceleratorControlBlock_t,
68991554f2SKenneth D. Merry   MPI2_POINTER pMpi2RAIDAcceleratorControlBlock_t;
69991554f2SKenneth D. Merry 
70991554f2SKenneth D. Merry 
71991554f2SKenneth D. Merry /******************************************************************************
72991554f2SKenneth D. Merry *
73991554f2SKenneth D. Merry *        RAID Accelerator Messages
74991554f2SKenneth D. Merry *
75991554f2SKenneth D. Merry *******************************************************************************/
76991554f2SKenneth D. Merry 
77991554f2SKenneth D. Merry /* RAID Accelerator Request Message */
78991554f2SKenneth D. Merry typedef struct _MPI2_RAID_ACCELERATOR_REQUEST
79991554f2SKenneth D. Merry {
80991554f2SKenneth D. Merry     U16                     Reserved0;                          /* 0x00 */
81991554f2SKenneth D. Merry     U8                      ChainOffset;                        /* 0x02 */
82991554f2SKenneth D. Merry     U8                      Function;                           /* 0x03 */
83991554f2SKenneth D. Merry     U16                     Reserved1;                          /* 0x04 */
84991554f2SKenneth D. Merry     U8                      Reserved2;                          /* 0x06 */
85991554f2SKenneth D. Merry     U8                      MsgFlags;                           /* 0x07 */
86991554f2SKenneth D. Merry     U8                      VP_ID;                              /* 0x08 */
87991554f2SKenneth D. Merry     U8                      VF_ID;                              /* 0x09 */
88991554f2SKenneth D. Merry     U16                     Reserved3;                          /* 0x0A */
89991554f2SKenneth D. Merry     U64                     RaidAcceleratorControlBlockAddress; /* 0x0C */
90991554f2SKenneth D. Merry     U8                      DmaEngineNumber;                    /* 0x14 */
91991554f2SKenneth D. Merry     U8                      Reserved4;                          /* 0x15 */
92991554f2SKenneth D. Merry     U16                     Reserved5;                          /* 0x16 */
93991554f2SKenneth D. Merry     U32                     Reserved6;                          /* 0x18 */
94991554f2SKenneth D. Merry     U32                     Reserved7;                          /* 0x1C */
95991554f2SKenneth D. Merry     U32                     Reserved8;                          /* 0x20 */
96991554f2SKenneth D. Merry } MPI2_RAID_ACCELERATOR_REQUEST, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REQUEST,
97991554f2SKenneth D. Merry   Mpi2RAIDAcceleratorRequest_t, MPI2_POINTER pMpi2RAIDAcceleratorRequest_t;
98991554f2SKenneth D. Merry 
99991554f2SKenneth D. Merry 
100991554f2SKenneth D. Merry /* RAID Accelerator Error Reply Message */
101991554f2SKenneth D. Merry typedef struct _MPI2_RAID_ACCELERATOR_REPLY
102991554f2SKenneth D. Merry {
103991554f2SKenneth D. Merry     U16                     Reserved0;                      /* 0x00 */
104991554f2SKenneth D. Merry     U8                      MsgLength;                      /* 0x02 */
105991554f2SKenneth D. Merry     U8                      Function;                       /* 0x03 */
106991554f2SKenneth D. Merry     U16                     Reserved1;                      /* 0x04 */
107991554f2SKenneth D. Merry     U8                      Reserved2;                      /* 0x06 */
108991554f2SKenneth D. Merry     U8                      MsgFlags;                       /* 0x07 */
109991554f2SKenneth D. Merry     U8                      VP_ID;                          /* 0x08 */
110991554f2SKenneth D. Merry     U8                      VF_ID;                          /* 0x09 */
111991554f2SKenneth D. Merry     U16                     Reserved3;                      /* 0x0A */
112991554f2SKenneth D. Merry     U16                     Reserved4;                      /* 0x0C */
113991554f2SKenneth D. Merry     U16                     IOCStatus;                      /* 0x0E */
114991554f2SKenneth D. Merry     U32                     IOCLogInfo;                     /* 0x10 */
115991554f2SKenneth D. Merry     U32                     ProductSpecificData[3];         /* 0x14 */
116991554f2SKenneth D. Merry } MPI2_RAID_ACCELERATOR_REPLY, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REPLY,
117991554f2SKenneth D. Merry   Mpi2RAIDAcceleratorReply_t, MPI2_POINTER pMpi2RAIDAcceleratorReply_t;
118991554f2SKenneth D. Merry 
119991554f2SKenneth D. Merry 
120991554f2SKenneth D. Merry #endif
121991554f2SKenneth D. Merry 
122991554f2SKenneth D. Merry 
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