1 /*- 2 * Copyright 2000-2020 Broadcom Inc. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 3. Neither the name of the author nor the names of any co-contributors 13 * may be used to endorse or promote products derived from this software 14 * without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * Broadcom Inc. (LSI) MPT-Fusion Host Adapter FreeBSD 29 * 30 * $FreeBSD$ 31 */ 32 33 /* 34 * Copyright 2000-2020 Broadcom Inc. All rights reserved. 35 * 36 * 37 * Name: mpi2_pci.h 38 * Title: MPI PCIe Attached Devices structures and definitions. 39 * Creation Date: October 9, 2012 40 * 41 * mpi2_pci.h Version: 02.00.03 42 * 43 * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25 44 * prefix are for use only on MPI v2.5 products, and must not be used 45 * with MPI v2.0 products. Unless otherwise noted, names beginning with 46 * MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products. 47 * 48 * Version History 49 * --------------- 50 * 51 * Date Version Description 52 * -------- -------- ------------------------------------------------------ 53 * 03-16-15 02.00.00 Initial version. 54 * 02-17-16 02.00.01 Removed AHCI support. 55 * Removed SOP support. 56 * 07-01-16 02.00.02 Added MPI26_NVME_FLAGS_FORCE_ADMIN_ERR_RESP to 57 * NVME Encapsulated Request. 58 * 07-22-18 02.00.03 Updted flags field for NVME Encapsulated req 59 * -------------------------------------------------------------------------- 60 */ 61 62 #ifndef MPI2_PCI_H 63 #define MPI2_PCI_H 64 65 66 /* 67 * Values for the PCIe DeviceInfo field used in PCIe Device Status Change Event 68 * data and PCIe Configuration pages. 69 */ 70 #define MPI26_PCIE_DEVINFO_DIRECT_ATTACH (0x00000010) 71 72 #define MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE (0x0000000F) 73 #define MPI26_PCIE_DEVINFO_NO_DEVICE (0x00000000) 74 #define MPI26_PCIE_DEVINFO_PCI_SWITCH (0x00000001) 75 #define MPI26_PCIE_DEVINFO_NVME (0x00000003) 76 77 78 /**************************************************************************** 79 * NVMe Encapsulated message 80 ****************************************************************************/ 81 82 /* NVME Encapsulated Request Message */ 83 typedef struct _MPI26_NVME_ENCAPSULATED_REQUEST 84 { 85 U16 DevHandle; /* 0x00 */ 86 U8 ChainOffset; /* 0x02 */ 87 U8 Function; /* 0x03 */ 88 U16 EncapsulatedCommandLength; /* 0x04 */ 89 U8 Reserved1; /* 0x06 */ 90 U8 MsgFlags; /* 0x07 */ 91 U8 VP_ID; /* 0x08 */ 92 U8 VF_ID; /* 0x09 */ 93 U16 Reserved2; /* 0x0A */ 94 U32 Reserved3; /* 0x0C */ 95 U64 ErrorResponseBaseAddress; /* 0x10 */ 96 U16 ErrorResponseAllocationLength; /* 0x18 */ 97 U16 Flags; /* 0x1A */ 98 U32 DataLength; /* 0x1C */ 99 U8 NVMe_Command[4]; /* 0x20 */ /* variable length */ 100 101 } MPI26_NVME_ENCAPSULATED_REQUEST, MPI2_POINTER PTR_MPI26_NVME_ENCAPSULATED_REQUEST, 102 Mpi26NVMeEncapsulatedRequest_t, MPI2_POINTER pMpi26NVMeEncapsulatedRequest_t; 103 104 /* defines for the Flags field */ 105 #define MPI26_NVME_FLAGS_FORCE_ADMIN_ERR_RESP (0x0020) 106 /* Submission Queue Type*/ 107 #define MPI26_NVME_FLAGS_SUBMISSIONQ_MASK (0x0010) 108 #define MPI26_NVME_FLAGS_SUBMISSIONQ_IO (0x0000) 109 #define MPI26_NVME_FLAGS_SUBMISSIONQ_ADMIN (0x0010) 110 /* Error Response Address Space */ 111 #define MPI26_NVME_FLAGS_MASK_ERROR_RSP_ADDR (0x000C) 112 #define MPI26_NVME_FLAGS_MASK_ERROR_RSP_ADDR_MASK (0x000C) 113 #define MPI26_NVME_FLAGS_SYSTEM_RSP_ADDR (0x0000) 114 #define MPI26_NVME_FLAGS_IOCCTL_RSP_ADDR (0x0008) 115 /* Data Direction*/ 116 #define MPI26_NVME_FLAGS_DATADIRECTION_MASK (0x0003) 117 #define MPI26_NVME_FLAGS_NODATATRANSFER (0x0000) 118 #define MPI26_NVME_FLAGS_WRITE (0x0001) 119 #define MPI26_NVME_FLAGS_READ (0x0002) 120 #define MPI26_NVME_FLAGS_BIDIRECTIONAL (0x0003) 121 122 123 /* NVMe Encapuslated Reply Message */ 124 typedef struct _MPI26_NVME_ENCAPSULATED_ERROR_REPLY 125 { 126 U16 DevHandle; /* 0x00 */ 127 U8 MsgLength; /* 0x02 */ 128 U8 Function; /* 0x03 */ 129 U16 EncapsulatedCommandLength; /* 0x04 */ 130 U8 Reserved1; /* 0x06 */ 131 U8 MsgFlags; /* 0x07 */ 132 U8 VP_ID; /* 0x08 */ 133 U8 VF_ID; /* 0x09 */ 134 U16 Reserved2; /* 0x0A */ 135 U16 Reserved3; /* 0x0C */ 136 U16 IOCStatus; /* 0x0E */ 137 U32 IOCLogInfo; /* 0x10 */ 138 U16 ErrorResponseCount; /* 0x14 */ 139 U16 Reserved4; /* 0x16 */ 140 } MPI26_NVME_ENCAPSULATED_ERROR_REPLY, 141 MPI2_POINTER PTR_MPI26_NVME_ENCAPSULATED_ERROR_REPLY, 142 Mpi26NVMeEncapsulatedErrorReply_t, 143 MPI2_POINTER pMpi26NVMeEncapsulatedErrorReply_t; 144 145 146 #endif 147 148 149