1 /*- 2 * Copyright (c) 2012-2015 LSI Corp. 3 * Copyright (c) 2013-2015 Avago Technologies 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. Neither the name of the author nor the names of any co-contributors 15 * may be used to endorse or promote products derived from this software 16 * without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 31 * 32 * $FreeBSD$ 33 */ 34 35 /* 36 * Copyright (c) 2000-2015 LSI Corporation. 37 * Copyright (c) 2013-2015 Avago Technologies 38 * 39 * 40 * Name: mpi2.h 41 * Title: MPI Message independent structures and definitions 42 * including System Interface Register Set and 43 * scatter/gather formats. 44 * Creation Date: June 21, 2006 45 * 46 * mpi2.h Version: 02.00.33 47 * 48 * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25 49 * prefix are for use only on MPI v2.5 products, and must not be used 50 * with MPI v2.0 products. Unless otherwise noted, names beginning with 51 * MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products. 52 * 53 * Version History 54 * --------------- 55 * 56 * Date Version Description 57 * -------- -------- ------------------------------------------------------ 58 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. 59 * 06-04-07 02.00.01 Bumped MPI2_HEADER_VERSION_UNIT. 60 * 06-26-07 02.00.02 Bumped MPI2_HEADER_VERSION_UNIT. 61 * 08-31-07 02.00.03 Bumped MPI2_HEADER_VERSION_UNIT. 62 * Moved ReplyPostHostIndex register to offset 0x6C of the 63 * MPI2_SYSTEM_INTERFACE_REGS and modified the define for 64 * MPI2_REPLY_POST_HOST_INDEX_OFFSET. 65 * Added union of request descriptors. 66 * Added union of reply descriptors. 67 * 10-31-07 02.00.04 Bumped MPI2_HEADER_VERSION_UNIT. 68 * Added define for MPI2_VERSION_02_00. 69 * Fixed the size of the FunctionDependent5 field in the 70 * MPI2_DEFAULT_REPLY structure. 71 * 12-18-07 02.00.05 Bumped MPI2_HEADER_VERSION_UNIT. 72 * Removed the MPI-defined Fault Codes and extended the 73 * product specific codes up to 0xEFFF. 74 * Added a sixth key value for the WriteSequence register 75 * and changed the flush value to 0x0. 76 * Added message function codes for Diagnostic Buffer Post 77 * and Diagnsotic Release. 78 * New IOCStatus define: MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED 79 * Moved MPI2_VERSION_UNION from mpi2_ioc.h. 80 * 02-29-08 02.00.06 Bumped MPI2_HEADER_VERSION_UNIT. 81 * 03-03-08 02.00.07 Bumped MPI2_HEADER_VERSION_UNIT. 82 * 05-21-08 02.00.08 Bumped MPI2_HEADER_VERSION_UNIT. 83 * Added #defines for marking a reply descriptor as unused. 84 * 06-27-08 02.00.09 Bumped MPI2_HEADER_VERSION_UNIT. 85 * 10-02-08 02.00.10 Bumped MPI2_HEADER_VERSION_UNIT. 86 * Moved LUN field defines from mpi2_init.h. 87 * 01-19-09 02.00.11 Bumped MPI2_HEADER_VERSION_UNIT. 88 * 05-06-09 02.00.12 Bumped MPI2_HEADER_VERSION_UNIT. 89 * In all request and reply descriptors, replaced VF_ID 90 * field with MSIxIndex field. 91 * Removed DevHandle field from 92 * MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR and made those 93 * bytes reserved. 94 * Added RAID Accelerator functionality. 95 * 07-30-09 02.00.13 Bumped MPI2_HEADER_VERSION_UNIT. 96 * 10-28-09 02.00.14 Bumped MPI2_HEADER_VERSION_UNIT. 97 * Added MSI-x index mask and shift for Reply Post Host 98 * Index register. 99 * Added function code for Host Based Discovery Action. 100 * 02-10-10 02.00.15 Bumped MPI2_HEADER_VERSION_UNIT. 101 * Added define for MPI2_FUNCTION_PWR_MGMT_CONTROL. 102 * Added defines for product-specific range of message 103 * function codes, 0xF0 to 0xFF. 104 * 05-12-10 02.00.16 Bumped MPI2_HEADER_VERSION_UNIT. 105 * Added alternative defines for the SGE Direction bit. 106 * 08-11-10 02.00.17 Bumped MPI2_HEADER_VERSION_UNIT. 107 * 11-10-10 02.00.18 Bumped MPI2_HEADER_VERSION_UNIT. 108 * Added MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR define. 109 * 02-23-11 02.00.19 Bumped MPI2_HEADER_VERSION_UNIT. 110 * Added MPI2_FUNCTION_SEND_HOST_MESSAGE. 111 * 03-09-11 02.00.20 Bumped MPI2_HEADER_VERSION_UNIT. 112 * 05-25-11 02.00.21 Bumped MPI2_HEADER_VERSION_UNIT. 113 * 08-24-11 02.00.22 Bumped MPI2_HEADER_VERSION_UNIT. 114 * 11-18-11 02.00.23 Bumped MPI2_HEADER_VERSION_UNIT. 115 * Incorporating additions for MPI v2.5. 116 * 02-06-12 02.00.24 Bumped MPI2_HEADER_VERSION_UNIT. 117 * 03-29-12 02.00.25 Bumped MPI2_HEADER_VERSION_UNIT. 118 * Added Hard Reset delay timings. 119 * 07-10-12 02.00.26 Bumped MPI2_HEADER_VERSION_UNIT. 120 * 07-26-12 02.00.27 Bumped MPI2_HEADER_VERSION_UNIT. 121 * 11-27-12 02.00.28 Bumped MPI2_HEADER_VERSION_UNIT. 122 * 12-20-12 02.00.29 Bumped MPI2_HEADER_VERSION_UNIT. 123 * Added MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET. 124 * 04-09-13 02.00.30 Bumped MPI2_HEADER_VERSION_UNIT. 125 * 04-17-13 02.00.31 Bumped MPI2_HEADER_VERSION_UNIT. 126 * 08-19-13 02.00.32 Bumped MPI2_HEADER_VERSION_UNIT. 127 * 12-05-13 02.00.33 Bumped MPI2_HEADER_VERSION_UNIT. 128 * -------------------------------------------------------------------------- 129 */ 130 131 #ifndef MPI2_H 132 #define MPI2_H 133 134 135 /***************************************************************************** 136 * 137 * MPI Version Definitions 138 * 139 *****************************************************************************/ 140 141 #define MPI2_VERSION_MAJOR_MASK (0xFF00) 142 #define MPI2_VERSION_MAJOR_SHIFT (8) 143 #define MPI2_VERSION_MINOR_MASK (0x00FF) 144 #define MPI2_VERSION_MINOR_SHIFT (0) 145 146 /* major version for all MPI v2.x */ 147 #define MPI2_VERSION_MAJOR (0x02) 148 149 /* minor version for MPI v2.0 compatible products */ 150 #define MPI2_VERSION_MINOR (0x00) 151 #define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \ 152 MPI2_VERSION_MINOR) 153 #define MPI2_VERSION_02_00 (0x0200) 154 155 156 /* minor version for MPI v2.5 compatible products */ 157 #define MPI25_VERSION_MINOR (0x05) 158 #define MPI25_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \ 159 MPI25_VERSION_MINOR) 160 #define MPI2_VERSION_02_05 (0x0205) 161 162 163 /* Unit and Dev versioning for this MPI header set */ 164 #define MPI2_HEADER_VERSION_UNIT (0x21) 165 #define MPI2_HEADER_VERSION_DEV (0x00) 166 #define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00) 167 #define MPI2_HEADER_VERSION_UNIT_SHIFT (8) 168 #define MPI2_HEADER_VERSION_DEV_MASK (0x00FF) 169 #define MPI2_HEADER_VERSION_DEV_SHIFT (0) 170 #define MPI2_HEADER_VERSION ((MPI2_HEADER_VERSION_UNIT << 8) | MPI2_HEADER_VERSION_DEV) 171 172 173 /***************************************************************************** 174 * 175 * IOC State Definitions 176 * 177 *****************************************************************************/ 178 179 #define MPI2_IOC_STATE_RESET (0x00000000) 180 #define MPI2_IOC_STATE_READY (0x10000000) 181 #define MPI2_IOC_STATE_OPERATIONAL (0x20000000) 182 #define MPI2_IOC_STATE_FAULT (0x40000000) 183 184 #define MPI2_IOC_STATE_MASK (0xF0000000) 185 #define MPI2_IOC_STATE_SHIFT (28) 186 187 /* Fault state range for prodcut specific codes */ 188 #define MPI2_FAULT_PRODUCT_SPECIFIC_MIN (0x0000) 189 #define MPI2_FAULT_PRODUCT_SPECIFIC_MAX (0xEFFF) 190 191 192 /***************************************************************************** 193 * 194 * System Interface Register Definitions 195 * 196 *****************************************************************************/ 197 198 typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS 199 { 200 U32 Doorbell; /* 0x00 */ 201 U32 WriteSequence; /* 0x04 */ 202 U32 HostDiagnostic; /* 0x08 */ 203 U32 Reserved1; /* 0x0C */ 204 U32 DiagRWData; /* 0x10 */ 205 U32 DiagRWAddressLow; /* 0x14 */ 206 U32 DiagRWAddressHigh; /* 0x18 */ 207 U32 Reserved2[5]; /* 0x1C */ 208 U32 HostInterruptStatus; /* 0x30 */ 209 U32 HostInterruptMask; /* 0x34 */ 210 U32 DCRData; /* 0x38 */ 211 U32 DCRAddress; /* 0x3C */ 212 U32 Reserved3[2]; /* 0x40 */ 213 U32 ReplyFreeHostIndex; /* 0x48 */ 214 U32 Reserved4[8]; /* 0x4C */ 215 U32 ReplyPostHostIndex; /* 0x6C */ 216 U32 Reserved5; /* 0x70 */ 217 U32 HCBSize; /* 0x74 */ 218 U32 HCBAddressLow; /* 0x78 */ 219 U32 HCBAddressHigh; /* 0x7C */ 220 U32 Reserved6[16]; /* 0x80 */ 221 U32 RequestDescriptorPostLow; /* 0xC0 */ 222 U32 RequestDescriptorPostHigh; /* 0xC4 */ 223 U32 Reserved7[14]; /* 0xC8 */ 224 } MPI2_SYSTEM_INTERFACE_REGS, MPI2_POINTER PTR_MPI2_SYSTEM_INTERFACE_REGS, 225 Mpi2SystemInterfaceRegs_t, MPI2_POINTER pMpi2SystemInterfaceRegs_t; 226 227 /* 228 * Defines for working with the Doorbell register. 229 */ 230 #define MPI2_DOORBELL_OFFSET (0x00000000) 231 232 /* IOC --> System values */ 233 #define MPI2_DOORBELL_USED (0x08000000) 234 #define MPI2_DOORBELL_WHO_INIT_MASK (0x07000000) 235 #define MPI2_DOORBELL_WHO_INIT_SHIFT (24) 236 #define MPI2_DOORBELL_FAULT_CODE_MASK (0x0000FFFF) 237 #define MPI2_DOORBELL_DATA_MASK (0x0000FFFF) 238 239 /* System --> IOC values */ 240 #define MPI2_DOORBELL_FUNCTION_MASK (0xFF000000) 241 #define MPI2_DOORBELL_FUNCTION_SHIFT (24) 242 #define MPI2_DOORBELL_ADD_DWORDS_MASK (0x00FF0000) 243 #define MPI2_DOORBELL_ADD_DWORDS_SHIFT (16) 244 245 246 /* 247 * Defines for the WriteSequence register 248 */ 249 #define MPI2_WRITE_SEQUENCE_OFFSET (0x00000004) 250 #define MPI2_WRSEQ_KEY_VALUE_MASK (0x0000000F) 251 #define MPI2_WRSEQ_FLUSH_KEY_VALUE (0x0) 252 #define MPI2_WRSEQ_1ST_KEY_VALUE (0xF) 253 #define MPI2_WRSEQ_2ND_KEY_VALUE (0x4) 254 #define MPI2_WRSEQ_3RD_KEY_VALUE (0xB) 255 #define MPI2_WRSEQ_4TH_KEY_VALUE (0x2) 256 #define MPI2_WRSEQ_5TH_KEY_VALUE (0x7) 257 #define MPI2_WRSEQ_6TH_KEY_VALUE (0xD) 258 259 /* 260 * Defines for the HostDiagnostic register 261 */ 262 #define MPI2_HOST_DIAGNOSTIC_OFFSET (0x00000008) 263 264 #define MPI2_DIAG_BOOT_DEVICE_SELECT_MASK (0x00001800) 265 #define MPI2_DIAG_BOOT_DEVICE_SELECT_DEFAULT (0x00000000) 266 #define MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW (0x00000800) 267 268 #define MPI2_DIAG_CLEAR_FLASH_BAD_SIG (0x00000400) 269 #define MPI2_DIAG_FORCE_HCB_ON_RESET (0x00000200) 270 #define MPI2_DIAG_HCB_MODE (0x00000100) 271 #define MPI2_DIAG_DIAG_WRITE_ENABLE (0x00000080) 272 #define MPI2_DIAG_FLASH_BAD_SIG (0x00000040) 273 #define MPI2_DIAG_RESET_HISTORY (0x00000020) 274 #define MPI2_DIAG_DIAG_RW_ENABLE (0x00000010) 275 #define MPI2_DIAG_RESET_ADAPTER (0x00000004) 276 #define MPI2_DIAG_HOLD_IOC_RESET (0x00000002) 277 278 /* 279 * Offsets for DiagRWData and address 280 */ 281 #define MPI2_DIAG_RW_DATA_OFFSET (0x00000010) 282 #define MPI2_DIAG_RW_ADDRESS_LOW_OFFSET (0x00000014) 283 #define MPI2_DIAG_RW_ADDRESS_HIGH_OFFSET (0x00000018) 284 285 /* 286 * Defines for the HostInterruptStatus register 287 */ 288 #define MPI2_HOST_INTERRUPT_STATUS_OFFSET (0x00000030) 289 #define MPI2_HIS_SYS2IOC_DB_STATUS (0x80000000) 290 #define MPI2_HIS_IOP_DOORBELL_STATUS MPI2_HIS_SYS2IOC_DB_STATUS 291 #define MPI2_HIS_RESET_IRQ_STATUS (0x40000000) 292 #define MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT (0x00000008) 293 #define MPI2_HIS_IOC2SYS_DB_STATUS (0x00000001) 294 #define MPI2_HIS_DOORBELL_INTERRUPT MPI2_HIS_IOC2SYS_DB_STATUS 295 296 /* 297 * Defines for the HostInterruptMask register 298 */ 299 #define MPI2_HOST_INTERRUPT_MASK_OFFSET (0x00000034) 300 #define MPI2_HIM_RESET_IRQ_MASK (0x40000000) 301 #define MPI2_HIM_REPLY_INT_MASK (0x00000008) 302 #define MPI2_HIM_RIM MPI2_HIM_REPLY_INT_MASK 303 #define MPI2_HIM_IOC2SYS_DB_MASK (0x00000001) 304 #define MPI2_HIM_DIM MPI2_HIM_IOC2SYS_DB_MASK 305 306 /* 307 * Offsets for DCRData and address 308 */ 309 #define MPI2_DCR_DATA_OFFSET (0x00000038) 310 #define MPI2_DCR_ADDRESS_OFFSET (0x0000003C) 311 312 /* 313 * Offset for the Reply Free Queue 314 */ 315 #define MPI2_REPLY_FREE_HOST_INDEX_OFFSET (0x00000048) 316 317 /* 318 * Defines for the Reply Descriptor Post Queue 319 */ 320 #define MPI2_REPLY_POST_HOST_INDEX_OFFSET (0x0000006C) 321 #define MPI2_REPLY_POST_HOST_INDEX_MASK (0x00FFFFFF) 322 #define MPI2_RPHI_MSIX_INDEX_MASK (0xFF000000) 323 #define MPI2_RPHI_MSIX_INDEX_SHIFT (24) 324 #define MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET (0x0000030C) /* MPI v2.5 only */ 325 326 327 /* 328 * Defines for the HCBSize and address 329 */ 330 #define MPI2_HCB_SIZE_OFFSET (0x00000074) 331 #define MPI2_HCB_SIZE_SIZE_MASK (0xFFFFF000) 332 #define MPI2_HCB_SIZE_HCB_ENABLE (0x00000001) 333 334 #define MPI2_HCB_ADDRESS_LOW_OFFSET (0x00000078) 335 #define MPI2_HCB_ADDRESS_HIGH_OFFSET (0x0000007C) 336 337 /* 338 * Offsets for the Request Queue 339 */ 340 #define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET (0x000000C0) 341 #define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET (0x000000C4) 342 343 344 /* Hard Reset delay timings */ 345 #define MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC (50000) 346 #define MPI2_HARD_RESET_PCIE_RESET_READ_WINDOW_MICRO_SEC (255000) 347 #define MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC (256000) 348 349 /***************************************************************************** 350 * 351 * Message Descriptors 352 * 353 *****************************************************************************/ 354 355 /* Request Descriptors */ 356 357 /* Default Request Descriptor */ 358 typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR 359 { 360 U8 RequestFlags; /* 0x00 */ 361 U8 MSIxIndex; /* 0x01 */ 362 U16 SMID; /* 0x02 */ 363 U16 LMID; /* 0x04 */ 364 U16 DescriptorTypeDependent; /* 0x06 */ 365 } MPI2_DEFAULT_REQUEST_DESCRIPTOR, 366 MPI2_POINTER PTR_MPI2_DEFAULT_REQUEST_DESCRIPTOR, 367 Mpi2DefaultRequestDescriptor_t, MPI2_POINTER pMpi2DefaultRequestDescriptor_t; 368 369 /* defines for the RequestFlags field */ 370 #define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK (0x0E) 371 #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO (0x00) 372 #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET (0x02) 373 #define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY (0x06) 374 #define MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE (0x08) 375 #define MPI2_REQ_DESCRIPT_FLAGS_RAID_ACCELERATOR (0x0A) 376 #define MPI25_REQ_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO (0x0C) 377 378 #define MPI2_REQ_DESCRIPT_FLAGS_IOC_FIFO_MARKER (0x01) 379 380 381 /* High Priority Request Descriptor */ 382 typedef struct _MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR 383 { 384 U8 RequestFlags; /* 0x00 */ 385 U8 MSIxIndex; /* 0x01 */ 386 U16 SMID; /* 0x02 */ 387 U16 LMID; /* 0x04 */ 388 U16 Reserved1; /* 0x06 */ 389 } MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR, 390 MPI2_POINTER PTR_MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR, 391 Mpi2HighPriorityRequestDescriptor_t, 392 MPI2_POINTER pMpi2HighPriorityRequestDescriptor_t; 393 394 395 /* SCSI IO Request Descriptor */ 396 typedef struct _MPI2_SCSI_IO_REQUEST_DESCRIPTOR 397 { 398 U8 RequestFlags; /* 0x00 */ 399 U8 MSIxIndex; /* 0x01 */ 400 U16 SMID; /* 0x02 */ 401 U16 LMID; /* 0x04 */ 402 U16 DevHandle; /* 0x06 */ 403 } MPI2_SCSI_IO_REQUEST_DESCRIPTOR, 404 MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST_DESCRIPTOR, 405 Mpi2SCSIIORequestDescriptor_t, MPI2_POINTER pMpi2SCSIIORequestDescriptor_t; 406 407 408 /* SCSI Target Request Descriptor */ 409 typedef struct _MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR 410 { 411 U8 RequestFlags; /* 0x00 */ 412 U8 MSIxIndex; /* 0x01 */ 413 U16 SMID; /* 0x02 */ 414 U16 LMID; /* 0x04 */ 415 U16 IoIndex; /* 0x06 */ 416 } MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR, 417 MPI2_POINTER PTR_MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR, 418 Mpi2SCSITargetRequestDescriptor_t, 419 MPI2_POINTER pMpi2SCSITargetRequestDescriptor_t; 420 421 422 /* RAID Accelerator Request Descriptor */ 423 typedef struct _MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR 424 { 425 U8 RequestFlags; /* 0x00 */ 426 U8 MSIxIndex; /* 0x01 */ 427 U16 SMID; /* 0x02 */ 428 U16 LMID; /* 0x04 */ 429 U16 Reserved; /* 0x06 */ 430 } MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR, 431 MPI2_POINTER PTR_MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR, 432 Mpi2RAIDAcceleratorRequestDescriptor_t, 433 MPI2_POINTER pMpi2RAIDAcceleratorRequestDescriptor_t; 434 435 436 /* Fast Path SCSI IO Request Descriptor */ 437 typedef MPI2_SCSI_IO_REQUEST_DESCRIPTOR 438 MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR, 439 MPI2_POINTER PTR_MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR, 440 Mpi25FastPathSCSIIORequestDescriptor_t, 441 MPI2_POINTER pMpi25FastPathSCSIIORequestDescriptor_t; 442 443 444 /* union of Request Descriptors */ 445 typedef union _MPI2_REQUEST_DESCRIPTOR_UNION 446 { 447 MPI2_DEFAULT_REQUEST_DESCRIPTOR Default; 448 MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR HighPriority; 449 MPI2_SCSI_IO_REQUEST_DESCRIPTOR SCSIIO; 450 MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR SCSITarget; 451 MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR RAIDAccelerator; 452 MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR FastPathSCSIIO; 453 U64 Words; 454 } MPI2_REQUEST_DESCRIPTOR_UNION, MPI2_POINTER PTR_MPI2_REQUEST_DESCRIPTOR_UNION, 455 Mpi2RequestDescriptorUnion_t, MPI2_POINTER pMpi2RequestDescriptorUnion_t; 456 457 458 /* Reply Descriptors */ 459 460 /* Default Reply Descriptor */ 461 typedef struct _MPI2_DEFAULT_REPLY_DESCRIPTOR 462 { 463 U8 ReplyFlags; /* 0x00 */ 464 U8 MSIxIndex; /* 0x01 */ 465 U16 DescriptorTypeDependent1; /* 0x02 */ 466 U32 DescriptorTypeDependent2; /* 0x04 */ 467 } MPI2_DEFAULT_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY_DESCRIPTOR, 468 Mpi2DefaultReplyDescriptor_t, MPI2_POINTER pMpi2DefaultReplyDescriptor_t; 469 470 /* defines for the ReplyFlags field */ 471 #define MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK (0x0F) 472 #define MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS (0x00) 473 #define MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY (0x01) 474 #define MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS (0x02) 475 #define MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER (0x03) 476 #define MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS (0x05) 477 #define MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS (0x06) 478 #define MPI2_RPY_DESCRIPT_FLAGS_UNUSED (0x0F) 479 480 /* values for marking a reply descriptor as unused */ 481 #define MPI2_RPY_DESCRIPT_UNUSED_WORD0_MARK (0xFFFFFFFF) 482 #define MPI2_RPY_DESCRIPT_UNUSED_WORD1_MARK (0xFFFFFFFF) 483 484 /* Address Reply Descriptor */ 485 typedef struct _MPI2_ADDRESS_REPLY_DESCRIPTOR 486 { 487 U8 ReplyFlags; /* 0x00 */ 488 U8 MSIxIndex; /* 0x01 */ 489 U16 SMID; /* 0x02 */ 490 U32 ReplyFrameAddress; /* 0x04 */ 491 } MPI2_ADDRESS_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_ADDRESS_REPLY_DESCRIPTOR, 492 Mpi2AddressReplyDescriptor_t, MPI2_POINTER pMpi2AddressReplyDescriptor_t; 493 494 #define MPI2_ADDRESS_REPLY_SMID_INVALID (0x00) 495 496 497 /* SCSI IO Success Reply Descriptor */ 498 typedef struct _MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR 499 { 500 U8 ReplyFlags; /* 0x00 */ 501 U8 MSIxIndex; /* 0x01 */ 502 U16 SMID; /* 0x02 */ 503 U16 TaskTag; /* 0x04 */ 504 U16 Reserved1; /* 0x06 */ 505 } MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR, 506 MPI2_POINTER PTR_MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR, 507 Mpi2SCSIIOSuccessReplyDescriptor_t, 508 MPI2_POINTER pMpi2SCSIIOSuccessReplyDescriptor_t; 509 510 511 /* TargetAssist Success Reply Descriptor */ 512 typedef struct _MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR 513 { 514 U8 ReplyFlags; /* 0x00 */ 515 U8 MSIxIndex; /* 0x01 */ 516 U16 SMID; /* 0x02 */ 517 U8 SequenceNumber; /* 0x04 */ 518 U8 Reserved1; /* 0x05 */ 519 U16 IoIndex; /* 0x06 */ 520 } MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR, 521 MPI2_POINTER PTR_MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR, 522 Mpi2TargetAssistSuccessReplyDescriptor_t, 523 MPI2_POINTER pMpi2TargetAssistSuccessReplyDescriptor_t; 524 525 526 /* Target Command Buffer Reply Descriptor */ 527 typedef struct _MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR 528 { 529 U8 ReplyFlags; /* 0x00 */ 530 U8 MSIxIndex; /* 0x01 */ 531 U8 VP_ID; /* 0x02 */ 532 U8 Flags; /* 0x03 */ 533 U16 InitiatorDevHandle; /* 0x04 */ 534 U16 IoIndex; /* 0x06 */ 535 } MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR, 536 MPI2_POINTER PTR_MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR, 537 Mpi2TargetCommandBufferReplyDescriptor_t, 538 MPI2_POINTER pMpi2TargetCommandBufferReplyDescriptor_t; 539 540 /* defines for Flags field */ 541 #define MPI2_RPY_DESCRIPT_TCB_FLAGS_PHYNUM_MASK (0x3F) 542 543 544 /* RAID Accelerator Success Reply Descriptor */ 545 typedef struct _MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR 546 { 547 U8 ReplyFlags; /* 0x00 */ 548 U8 MSIxIndex; /* 0x01 */ 549 U16 SMID; /* 0x02 */ 550 U32 Reserved; /* 0x04 */ 551 } MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR, 552 MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR, 553 Mpi2RAIDAcceleratorSuccessReplyDescriptor_t, 554 MPI2_POINTER pMpi2RAIDAcceleratorSuccessReplyDescriptor_t; 555 556 557 /* Fast Path SCSI IO Success Reply Descriptor */ 558 typedef MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR 559 MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR, 560 MPI2_POINTER PTR_MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR, 561 Mpi25FastPathSCSIIOSuccessReplyDescriptor_t, 562 MPI2_POINTER pMpi25FastPathSCSIIOSuccessReplyDescriptor_t; 563 564 565 /* union of Reply Descriptors */ 566 typedef union _MPI2_REPLY_DESCRIPTORS_UNION 567 { 568 MPI2_DEFAULT_REPLY_DESCRIPTOR Default; 569 MPI2_ADDRESS_REPLY_DESCRIPTOR AddressReply; 570 MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR SCSIIOSuccess; 571 MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR TargetAssistSuccess; 572 MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR TargetCommandBuffer; 573 MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR RAIDAcceleratorSuccess; 574 MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR FastPathSCSIIOSuccess; 575 U64 Words; 576 } MPI2_REPLY_DESCRIPTORS_UNION, MPI2_POINTER PTR_MPI2_REPLY_DESCRIPTORS_UNION, 577 Mpi2ReplyDescriptorsUnion_t, MPI2_POINTER pMpi2ReplyDescriptorsUnion_t; 578 579 580 581 /***************************************************************************** 582 * 583 * Message Functions 584 * 585 *****************************************************************************/ 586 587 #define MPI2_FUNCTION_SCSI_IO_REQUEST (0x00) /* SCSI IO */ 588 #define MPI2_FUNCTION_SCSI_TASK_MGMT (0x01) /* SCSI Task Management */ 589 #define MPI2_FUNCTION_IOC_INIT (0x02) /* IOC Init */ 590 #define MPI2_FUNCTION_IOC_FACTS (0x03) /* IOC Facts */ 591 #define MPI2_FUNCTION_CONFIG (0x04) /* Configuration */ 592 #define MPI2_FUNCTION_PORT_FACTS (0x05) /* Port Facts */ 593 #define MPI2_FUNCTION_PORT_ENABLE (0x06) /* Port Enable */ 594 #define MPI2_FUNCTION_EVENT_NOTIFICATION (0x07) /* Event Notification */ 595 #define MPI2_FUNCTION_EVENT_ACK (0x08) /* Event Acknowledge */ 596 #define MPI2_FUNCTION_FW_DOWNLOAD (0x09) /* FW Download */ 597 #define MPI2_FUNCTION_TARGET_ASSIST (0x0B) /* Target Assist */ 598 #define MPI2_FUNCTION_TARGET_STATUS_SEND (0x0C) /* Target Status Send */ 599 #define MPI2_FUNCTION_TARGET_MODE_ABORT (0x0D) /* Target Mode Abort */ 600 #define MPI2_FUNCTION_FW_UPLOAD (0x12) /* FW Upload */ 601 #define MPI2_FUNCTION_RAID_ACTION (0x15) /* RAID Action */ 602 #define MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH (0x16) /* SCSI IO RAID Passthrough */ 603 #define MPI2_FUNCTION_TOOLBOX (0x17) /* Toolbox */ 604 #define MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18) /* SCSI Enclosure Processor */ 605 #define MPI2_FUNCTION_SMP_PASSTHROUGH (0x1A) /* SMP Passthrough */ 606 #define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B) /* SAS IO Unit Control */ 607 #define MPI2_FUNCTION_SATA_PASSTHROUGH (0x1C) /* SATA Passthrough */ 608 #define MPI2_FUNCTION_DIAG_BUFFER_POST (0x1D) /* Diagnostic Buffer Post */ 609 #define MPI2_FUNCTION_DIAG_RELEASE (0x1E) /* Diagnostic Release */ 610 #define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24) /* Target Command Buffer Post Base */ 611 #define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25) /* Target Command Buffer Post List */ 612 #define MPI2_FUNCTION_RAID_ACCELERATOR (0x2C) /* RAID Accelerator */ 613 #define MPI2_FUNCTION_HOST_BASED_DISCOVERY_ACTION (0x2F) /* Host Based Discovery Action */ 614 #define MPI2_FUNCTION_PWR_MGMT_CONTROL (0x30) /* Power Management Control */ 615 #define MPI2_FUNCTION_SEND_HOST_MESSAGE (0x31) /* Send Host Message */ 616 #define MPI2_FUNCTION_MIN_PRODUCT_SPECIFIC (0xF0) /* beginning of product-specific range */ 617 #define MPI2_FUNCTION_MAX_PRODUCT_SPECIFIC (0xFF) /* end of product-specific range */ 618 619 620 621 /* Doorbell functions */ 622 #define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40) 623 #define MPI2_FUNCTION_HANDSHAKE (0x42) 624 625 626 /***************************************************************************** 627 * 628 * IOC Status Values 629 * 630 *****************************************************************************/ 631 632 /* mask for IOCStatus status value */ 633 #define MPI2_IOCSTATUS_MASK (0x7FFF) 634 635 /**************************************************************************** 636 * Common IOCStatus values for all replies 637 ****************************************************************************/ 638 639 #define MPI2_IOCSTATUS_SUCCESS (0x0000) 640 #define MPI2_IOCSTATUS_INVALID_FUNCTION (0x0001) 641 #define MPI2_IOCSTATUS_BUSY (0x0002) 642 #define MPI2_IOCSTATUS_INVALID_SGL (0x0003) 643 #define MPI2_IOCSTATUS_INTERNAL_ERROR (0x0004) 644 #define MPI2_IOCSTATUS_INVALID_VPID (0x0005) 645 #define MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES (0x0006) 646 #define MPI2_IOCSTATUS_INVALID_FIELD (0x0007) 647 #define MPI2_IOCSTATUS_INVALID_STATE (0x0008) 648 #define MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED (0x0009) 649 650 /**************************************************************************** 651 * Config IOCStatus values 652 ****************************************************************************/ 653 654 #define MPI2_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020) 655 #define MPI2_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021) 656 #define MPI2_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022) 657 #define MPI2_IOCSTATUS_CONFIG_INVALID_DATA (0x0023) 658 #define MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024) 659 #define MPI2_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025) 660 661 /**************************************************************************** 662 * SCSI IO Reply 663 ****************************************************************************/ 664 665 #define MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR (0x0040) 666 #define MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE (0x0042) 667 #define MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE (0x0043) 668 #define MPI2_IOCSTATUS_SCSI_DATA_OVERRUN (0x0044) 669 #define MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN (0x0045) 670 #define MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR (0x0046) 671 #define MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR (0x0047) 672 #define MPI2_IOCSTATUS_SCSI_TASK_TERMINATED (0x0048) 673 #define MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH (0x0049) 674 #define MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED (0x004A) 675 #define MPI2_IOCSTATUS_SCSI_IOC_TERMINATED (0x004B) 676 #define MPI2_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C) 677 678 /**************************************************************************** 679 * For use by SCSI Initiator and SCSI Target end-to-end data protection 680 ****************************************************************************/ 681 682 #define MPI2_IOCSTATUS_EEDP_GUARD_ERROR (0x004D) 683 #define MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR (0x004E) 684 #define MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR (0x004F) 685 686 /**************************************************************************** 687 * SCSI Target values 688 ****************************************************************************/ 689 690 #define MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX (0x0062) 691 #define MPI2_IOCSTATUS_TARGET_ABORTED (0x0063) 692 #define MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064) 693 #define MPI2_IOCSTATUS_TARGET_NO_CONNECTION (0x0065) 694 #define MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A) 695 #define MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR (0x006D) 696 #define MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA (0x006E) 697 #define MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT (0x006F) 698 #define MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT (0x0070) 699 #define MPI2_IOCSTATUS_TARGET_NAK_RECEIVED (0x0071) 700 701 /**************************************************************************** 702 * Serial Attached SCSI values 703 ****************************************************************************/ 704 705 #define MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED (0x0090) 706 #define MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN (0x0091) 707 708 /**************************************************************************** 709 * Diagnostic Buffer Post / Diagnostic Release values 710 ****************************************************************************/ 711 712 #define MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED (0x00A0) 713 714 /**************************************************************************** 715 * RAID Accelerator values 716 ****************************************************************************/ 717 718 #define MPI2_IOCSTATUS_RAID_ACCEL_ERROR (0x00B0) 719 720 /**************************************************************************** 721 * IOCStatus flag to indicate that log info is available 722 ****************************************************************************/ 723 724 #define MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE (0x8000) 725 726 /**************************************************************************** 727 * IOCLogInfo Types 728 ****************************************************************************/ 729 730 #define MPI2_IOCLOGINFO_TYPE_MASK (0xF0000000) 731 #define MPI2_IOCLOGINFO_TYPE_SHIFT (28) 732 #define MPI2_IOCLOGINFO_TYPE_NONE (0x0) 733 #define MPI2_IOCLOGINFO_TYPE_SCSI (0x1) 734 #define MPI2_IOCLOGINFO_TYPE_FC (0x2) 735 #define MPI2_IOCLOGINFO_TYPE_SAS (0x3) 736 #define MPI2_IOCLOGINFO_TYPE_ISCSI (0x4) 737 #define MPI2_IOCLOGINFO_LOG_DATA_MASK (0x0FFFFFFF) 738 739 740 /***************************************************************************** 741 * 742 * Standard Message Structures 743 * 744 *****************************************************************************/ 745 746 /**************************************************************************** 747 * Request Message Header for all request messages 748 ****************************************************************************/ 749 750 typedef struct _MPI2_REQUEST_HEADER 751 { 752 U16 FunctionDependent1; /* 0x00 */ 753 U8 ChainOffset; /* 0x02 */ 754 U8 Function; /* 0x03 */ 755 U16 FunctionDependent2; /* 0x04 */ 756 U8 FunctionDependent3; /* 0x06 */ 757 U8 MsgFlags; /* 0x07 */ 758 U8 VP_ID; /* 0x08 */ 759 U8 VF_ID; /* 0x09 */ 760 U16 Reserved1; /* 0x0A */ 761 } MPI2_REQUEST_HEADER, MPI2_POINTER PTR_MPI2_REQUEST_HEADER, 762 MPI2RequestHeader_t, MPI2_POINTER pMPI2RequestHeader_t; 763 764 765 /**************************************************************************** 766 * Default Reply 767 ****************************************************************************/ 768 769 typedef struct _MPI2_DEFAULT_REPLY 770 { 771 U16 FunctionDependent1; /* 0x00 */ 772 U8 MsgLength; /* 0x02 */ 773 U8 Function; /* 0x03 */ 774 U16 FunctionDependent2; /* 0x04 */ 775 U8 FunctionDependent3; /* 0x06 */ 776 U8 MsgFlags; /* 0x07 */ 777 U8 VP_ID; /* 0x08 */ 778 U8 VF_ID; /* 0x09 */ 779 U16 Reserved1; /* 0x0A */ 780 U16 FunctionDependent5; /* 0x0C */ 781 U16 IOCStatus; /* 0x0E */ 782 U32 IOCLogInfo; /* 0x10 */ 783 } MPI2_DEFAULT_REPLY, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY, 784 MPI2DefaultReply_t, MPI2_POINTER pMPI2DefaultReply_t; 785 786 787 /* common version structure/union used in messages and configuration pages */ 788 789 typedef struct _MPI2_VERSION_STRUCT 790 { 791 U8 Dev; /* 0x00 */ 792 U8 Unit; /* 0x01 */ 793 U8 Minor; /* 0x02 */ 794 U8 Major; /* 0x03 */ 795 } MPI2_VERSION_STRUCT; 796 797 typedef union _MPI2_VERSION_UNION 798 { 799 MPI2_VERSION_STRUCT Struct; 800 U32 Word; 801 } MPI2_VERSION_UNION; 802 803 804 /* LUN field defines, common to many structures */ 805 #define MPI2_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF) 806 #define MPI2_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000) 807 #define MPI2_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF) 808 #define MPI2_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000) 809 #define MPI2_LUN_LEVEL_1_WORD (0xFF00) 810 #define MPI2_LUN_LEVEL_1_DWORD (0x0000FF00) 811 812 813 /***************************************************************************** 814 * 815 * Fusion-MPT MPI Scatter Gather Elements 816 * 817 *****************************************************************************/ 818 819 /**************************************************************************** 820 * MPI Simple Element structures 821 ****************************************************************************/ 822 823 typedef struct _MPI2_SGE_SIMPLE32 824 { 825 U32 FlagsLength; 826 U32 Address; 827 } MPI2_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_SGE_SIMPLE32, 828 Mpi2SGESimple32_t, MPI2_POINTER pMpi2SGESimple32_t; 829 830 typedef struct _MPI2_SGE_SIMPLE64 831 { 832 U32 FlagsLength; 833 U64 Address; 834 } MPI2_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_SGE_SIMPLE64, 835 Mpi2SGESimple64_t, MPI2_POINTER pMpi2SGESimple64_t; 836 837 typedef struct _MPI2_SGE_SIMPLE_UNION 838 { 839 U32 FlagsLength; 840 union 841 { 842 U32 Address32; 843 U64 Address64; 844 } u; 845 } MPI2_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_SIMPLE_UNION, 846 Mpi2SGESimpleUnion_t, MPI2_POINTER pMpi2SGESimpleUnion_t; 847 848 849 /**************************************************************************** 850 * MPI Chain Element structures - for MPI v2.0 products only 851 ****************************************************************************/ 852 853 typedef struct _MPI2_SGE_CHAIN32 854 { 855 U16 Length; 856 U8 NextChainOffset; 857 U8 Flags; 858 U32 Address; 859 } MPI2_SGE_CHAIN32, MPI2_POINTER PTR_MPI2_SGE_CHAIN32, 860 Mpi2SGEChain32_t, MPI2_POINTER pMpi2SGEChain32_t; 861 862 typedef struct _MPI2_SGE_CHAIN64 863 { 864 U16 Length; 865 U8 NextChainOffset; 866 U8 Flags; 867 U64 Address; 868 } MPI2_SGE_CHAIN64, MPI2_POINTER PTR_MPI2_SGE_CHAIN64, 869 Mpi2SGEChain64_t, MPI2_POINTER pMpi2SGEChain64_t; 870 871 typedef struct _MPI2_SGE_CHAIN_UNION 872 { 873 U16 Length; 874 U8 NextChainOffset; 875 U8 Flags; 876 union 877 { 878 U32 Address32; 879 U64 Address64; 880 } u; 881 } MPI2_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_SGE_CHAIN_UNION, 882 Mpi2SGEChainUnion_t, MPI2_POINTER pMpi2SGEChainUnion_t; 883 884 885 /**************************************************************************** 886 * MPI Transaction Context Element structures - for MPI v2.0 products only 887 ****************************************************************************/ 888 889 typedef struct _MPI2_SGE_TRANSACTION32 890 { 891 U8 Reserved; 892 U8 ContextSize; 893 U8 DetailsLength; 894 U8 Flags; 895 U32 TransactionContext[1]; 896 U32 TransactionDetails[1]; 897 } MPI2_SGE_TRANSACTION32, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION32, 898 Mpi2SGETransaction32_t, MPI2_POINTER pMpi2SGETransaction32_t; 899 900 typedef struct _MPI2_SGE_TRANSACTION64 901 { 902 U8 Reserved; 903 U8 ContextSize; 904 U8 DetailsLength; 905 U8 Flags; 906 U32 TransactionContext[2]; 907 U32 TransactionDetails[1]; 908 } MPI2_SGE_TRANSACTION64, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION64, 909 Mpi2SGETransaction64_t, MPI2_POINTER pMpi2SGETransaction64_t; 910 911 typedef struct _MPI2_SGE_TRANSACTION96 912 { 913 U8 Reserved; 914 U8 ContextSize; 915 U8 DetailsLength; 916 U8 Flags; 917 U32 TransactionContext[3]; 918 U32 TransactionDetails[1]; 919 } MPI2_SGE_TRANSACTION96, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION96, 920 Mpi2SGETransaction96_t, MPI2_POINTER pMpi2SGETransaction96_t; 921 922 typedef struct _MPI2_SGE_TRANSACTION128 923 { 924 U8 Reserved; 925 U8 ContextSize; 926 U8 DetailsLength; 927 U8 Flags; 928 U32 TransactionContext[4]; 929 U32 TransactionDetails[1]; 930 } MPI2_SGE_TRANSACTION128, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION128, 931 Mpi2SGETransaction_t128, MPI2_POINTER pMpi2SGETransaction_t128; 932 933 typedef struct _MPI2_SGE_TRANSACTION_UNION 934 { 935 U8 Reserved; 936 U8 ContextSize; 937 U8 DetailsLength; 938 U8 Flags; 939 union 940 { 941 U32 TransactionContext32[1]; 942 U32 TransactionContext64[2]; 943 U32 TransactionContext96[3]; 944 U32 TransactionContext128[4]; 945 } u; 946 U32 TransactionDetails[1]; 947 } MPI2_SGE_TRANSACTION_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION_UNION, 948 Mpi2SGETransactionUnion_t, MPI2_POINTER pMpi2SGETransactionUnion_t; 949 950 951 /**************************************************************************** 952 * MPI SGE union for IO SGL's - for MPI v2.0 products only 953 ****************************************************************************/ 954 955 typedef struct _MPI2_MPI_SGE_IO_UNION 956 { 957 union 958 { 959 MPI2_SGE_SIMPLE_UNION Simple; 960 MPI2_SGE_CHAIN_UNION Chain; 961 } u; 962 } MPI2_MPI_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_IO_UNION, 963 Mpi2MpiSGEIOUnion_t, MPI2_POINTER pMpi2MpiSGEIOUnion_t; 964 965 966 /**************************************************************************** 967 * MPI SGE union for SGL's with Simple and Transaction elements - for MPI v2.0 products only 968 ****************************************************************************/ 969 970 typedef struct _MPI2_SGE_TRANS_SIMPLE_UNION 971 { 972 union 973 { 974 MPI2_SGE_SIMPLE_UNION Simple; 975 MPI2_SGE_TRANSACTION_UNION Transaction; 976 } u; 977 } MPI2_SGE_TRANS_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANS_SIMPLE_UNION, 978 Mpi2SGETransSimpleUnion_t, MPI2_POINTER pMpi2SGETransSimpleUnion_t; 979 980 981 /**************************************************************************** 982 * All MPI SGE types union 983 ****************************************************************************/ 984 985 typedef struct _MPI2_MPI_SGE_UNION 986 { 987 union 988 { 989 MPI2_SGE_SIMPLE_UNION Simple; 990 MPI2_SGE_CHAIN_UNION Chain; 991 MPI2_SGE_TRANSACTION_UNION Transaction; 992 } u; 993 } MPI2_MPI_SGE_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_UNION, 994 Mpi2MpiSgeUnion_t, MPI2_POINTER pMpi2MpiSgeUnion_t; 995 996 997 /**************************************************************************** 998 * MPI SGE field definition and masks 999 ****************************************************************************/ 1000 1001 /* Flags field bit definitions */ 1002 1003 #define MPI2_SGE_FLAGS_LAST_ELEMENT (0x80) 1004 #define MPI2_SGE_FLAGS_END_OF_BUFFER (0x40) 1005 #define MPI2_SGE_FLAGS_ELEMENT_TYPE_MASK (0x30) 1006 #define MPI2_SGE_FLAGS_LOCAL_ADDRESS (0x08) 1007 #define MPI2_SGE_FLAGS_DIRECTION (0x04) 1008 #define MPI2_SGE_FLAGS_ADDRESS_SIZE (0x02) 1009 #define MPI2_SGE_FLAGS_END_OF_LIST (0x01) 1010 1011 #define MPI2_SGE_FLAGS_SHIFT (24) 1012 1013 #define MPI2_SGE_LENGTH_MASK (0x00FFFFFF) 1014 #define MPI2_SGE_CHAIN_LENGTH_MASK (0x0000FFFF) 1015 1016 /* Element Type */ 1017 1018 #define MPI2_SGE_FLAGS_TRANSACTION_ELEMENT (0x00) /* for MPI v2.0 products only */ 1019 #define MPI2_SGE_FLAGS_SIMPLE_ELEMENT (0x10) 1020 #define MPI2_SGE_FLAGS_CHAIN_ELEMENT (0x30) /* for MPI v2.0 products only */ 1021 #define MPI2_SGE_FLAGS_ELEMENT_MASK (0x30) 1022 1023 /* Address location */ 1024 1025 #define MPI2_SGE_FLAGS_SYSTEM_ADDRESS (0x00) 1026 1027 /* Direction */ 1028 1029 #define MPI2_SGE_FLAGS_IOC_TO_HOST (0x00) 1030 #define MPI2_SGE_FLAGS_HOST_TO_IOC (0x04) 1031 1032 #define MPI2_SGE_FLAGS_DEST (MPI2_SGE_FLAGS_IOC_TO_HOST) 1033 #define MPI2_SGE_FLAGS_SOURCE (MPI2_SGE_FLAGS_HOST_TO_IOC) 1034 1035 /* Address Size */ 1036 1037 #define MPI2_SGE_FLAGS_32_BIT_ADDRESSING (0x00) 1038 #define MPI2_SGE_FLAGS_64_BIT_ADDRESSING (0x02) 1039 1040 /* Context Size */ 1041 1042 #define MPI2_SGE_FLAGS_32_BIT_CONTEXT (0x00) 1043 #define MPI2_SGE_FLAGS_64_BIT_CONTEXT (0x02) 1044 #define MPI2_SGE_FLAGS_96_BIT_CONTEXT (0x04) 1045 #define MPI2_SGE_FLAGS_128_BIT_CONTEXT (0x06) 1046 1047 #define MPI2_SGE_CHAIN_OFFSET_MASK (0x00FF0000) 1048 #define MPI2_SGE_CHAIN_OFFSET_SHIFT (16) 1049 1050 /**************************************************************************** 1051 * MPI SGE operation Macros 1052 ****************************************************************************/ 1053 1054 /* SIMPLE FlagsLength manipulations... */ 1055 #define MPI2_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_SGE_FLAGS_SHIFT) 1056 #define MPI2_SGE_GET_FLAGS(f) (((f) & ~MPI2_SGE_LENGTH_MASK) >> MPI2_SGE_FLAGS_SHIFT) 1057 #define MPI2_SGE_LENGTH(f) ((f) & MPI2_SGE_LENGTH_MASK) 1058 #define MPI2_SGE_CHAIN_LENGTH(f) ((f) & MPI2_SGE_CHAIN_LENGTH_MASK) 1059 1060 #define MPI2_SGE_SET_FLAGS_LENGTH(f,l) (MPI2_SGE_SET_FLAGS(f) | MPI2_SGE_LENGTH(l)) 1061 1062 #define MPI2_pSGE_GET_FLAGS(psg) MPI2_SGE_GET_FLAGS((psg)->FlagsLength) 1063 #define MPI2_pSGE_GET_LENGTH(psg) MPI2_SGE_LENGTH((psg)->FlagsLength) 1064 #define MPI2_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_SGE_SET_FLAGS_LENGTH(f,l) 1065 1066 /* CAUTION - The following are READ-MODIFY-WRITE! */ 1067 #define MPI2_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_SGE_SET_FLAGS(f) 1068 #define MPI2_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_SGE_LENGTH(l) 1069 1070 #define MPI2_GET_CHAIN_OFFSET(x) ((x & MPI2_SGE_CHAIN_OFFSET_MASK) >> MPI2_SGE_CHAIN_OFFSET_SHIFT) 1071 1072 1073 /***************************************************************************** 1074 * 1075 * Fusion-MPT IEEE Scatter Gather Elements 1076 * 1077 *****************************************************************************/ 1078 1079 /**************************************************************************** 1080 * IEEE Simple Element structures 1081 ****************************************************************************/ 1082 1083 /* MPI2_IEEE_SGE_SIMPLE32 is for MPI v2.0 products only */ 1084 typedef struct _MPI2_IEEE_SGE_SIMPLE32 1085 { 1086 U32 Address; 1087 U32 FlagsLength; 1088 } MPI2_IEEE_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE32, 1089 Mpi2IeeeSgeSimple32_t, MPI2_POINTER pMpi2IeeeSgeSimple32_t; 1090 1091 typedef struct _MPI2_IEEE_SGE_SIMPLE64 1092 { 1093 U64 Address; 1094 U32 Length; 1095 U16 Reserved1; 1096 U8 Reserved2; 1097 U8 Flags; 1098 } MPI2_IEEE_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE64, 1099 Mpi2IeeeSgeSimple64_t, MPI2_POINTER pMpi2IeeeSgeSimple64_t; 1100 1101 typedef union _MPI2_IEEE_SGE_SIMPLE_UNION 1102 { 1103 MPI2_IEEE_SGE_SIMPLE32 Simple32; 1104 MPI2_IEEE_SGE_SIMPLE64 Simple64; 1105 } MPI2_IEEE_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE_UNION, 1106 Mpi2IeeeSgeSimpleUnion_t, MPI2_POINTER pMpi2IeeeSgeSimpleUnion_t; 1107 1108 1109 /**************************************************************************** 1110 * IEEE Chain Element structures 1111 ****************************************************************************/ 1112 1113 /* MPI2_IEEE_SGE_CHAIN32 is for MPI v2.0 products only */ 1114 typedef MPI2_IEEE_SGE_SIMPLE32 MPI2_IEEE_SGE_CHAIN32; 1115 1116 /* MPI2_IEEE_SGE_CHAIN64 is for MPI v2.0 products only */ 1117 typedef MPI2_IEEE_SGE_SIMPLE64 MPI2_IEEE_SGE_CHAIN64; 1118 1119 typedef union _MPI2_IEEE_SGE_CHAIN_UNION 1120 { 1121 MPI2_IEEE_SGE_CHAIN32 Chain32; 1122 MPI2_IEEE_SGE_CHAIN64 Chain64; 1123 } MPI2_IEEE_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_CHAIN_UNION, 1124 Mpi2IeeeSgeChainUnion_t, MPI2_POINTER pMpi2IeeeSgeChainUnion_t; 1125 1126 /* MPI25_IEEE_SGE_CHAIN64 is for MPI v2.5 products only */ 1127 typedef struct _MPI25_IEEE_SGE_CHAIN64 1128 { 1129 U64 Address; 1130 U32 Length; 1131 U16 Reserved1; 1132 U8 NextChainOffset; 1133 U8 Flags; 1134 } MPI25_IEEE_SGE_CHAIN64, MPI2_POINTER PTR_MPI25_IEEE_SGE_CHAIN64, 1135 Mpi25IeeeSgeChain64_t, MPI2_POINTER pMpi25IeeeSgeChain64_t; 1136 1137 1138 /**************************************************************************** 1139 * All IEEE SGE types union 1140 ****************************************************************************/ 1141 1142 /* MPI2_IEEE_SGE_UNION is for MPI v2.0 products only */ 1143 typedef struct _MPI2_IEEE_SGE_UNION 1144 { 1145 union 1146 { 1147 MPI2_IEEE_SGE_SIMPLE_UNION Simple; 1148 MPI2_IEEE_SGE_CHAIN_UNION Chain; 1149 } u; 1150 } MPI2_IEEE_SGE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_UNION, 1151 Mpi2IeeeSgeUnion_t, MPI2_POINTER pMpi2IeeeSgeUnion_t; 1152 1153 1154 /**************************************************************************** 1155 * IEEE SGE union for IO SGL's 1156 ****************************************************************************/ 1157 1158 typedef union _MPI25_SGE_IO_UNION 1159 { 1160 MPI2_IEEE_SGE_SIMPLE64 IeeeSimple; 1161 MPI25_IEEE_SGE_CHAIN64 IeeeChain; 1162 } MPI25_SGE_IO_UNION, MPI2_POINTER PTR_MPI25_SGE_IO_UNION, 1163 Mpi25SGEIOUnion_t, MPI2_POINTER pMpi25SGEIOUnion_t; 1164 1165 1166 /**************************************************************************** 1167 * IEEE SGE field definitions and masks 1168 ****************************************************************************/ 1169 1170 /* Flags field bit definitions */ 1171 1172 #define MPI2_IEEE_SGE_FLAGS_ELEMENT_TYPE_MASK (0x80) 1173 #define MPI25_IEEE_SGE_FLAGS_END_OF_LIST (0x40) 1174 1175 #define MPI2_IEEE32_SGE_FLAGS_SHIFT (24) 1176 1177 #define MPI2_IEEE32_SGE_LENGTH_MASK (0x00FFFFFF) 1178 1179 /* Element Type */ 1180 1181 #define MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT (0x00) 1182 #define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT (0x80) 1183 1184 /* Data Location Address Space */ 1185 1186 #define MPI2_IEEE_SGE_FLAGS_ADDR_MASK (0x03) 1187 #define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00) /* for MPI v2.0, use in IEEE Simple Element only; for MPI v2.5, use in IEEE Simple or Chain element */ 1188 #define MPI2_IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01) /* use in IEEE Simple Element only */ 1189 #define MPI2_IEEE_SGE_FLAGS_IOCPLB_ADDR (0x02) 1190 #define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03) /* for MPI v2.0, use in IEEE Simple Element only; for MPI v2.5, use in IEEE Simple or Chain element */ 1191 #define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBPCI_ADDR (0x03) /* use in MPI v2.0 IEEE Chain Element only */ 1192 #define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR (MPI2_IEEE_SGE_FLAGS_SYSTEMPLBPCI_ADDR) /* typo in name */ 1193 1194 /**************************************************************************** 1195 * IEEE SGE operation Macros 1196 ****************************************************************************/ 1197 1198 /* SIMPLE FlagsLength manipulations... */ 1199 #define MPI2_IEEE32_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT) 1200 #define MPI2_IEEE32_SGE_GET_FLAGS(f) (((f) & ~MPI2_IEEE32_SGE_LENGTH_MASK) >> MPI2_IEEE32_SGE_FLAGS_SHIFT) 1201 #define MPI2_IEEE32_SGE_LENGTH(f) ((f) & MPI2_IEEE32_SGE_LENGTH_MASK) 1202 1203 #define MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f, l) (MPI2_IEEE32_SGE_SET_FLAGS(f) | MPI2_IEEE32_SGE_LENGTH(l)) 1204 1205 #define MPI2_IEEE32_pSGE_GET_FLAGS(psg) MPI2_IEEE32_SGE_GET_FLAGS((psg)->FlagsLength) 1206 #define MPI2_IEEE32_pSGE_GET_LENGTH(psg) MPI2_IEEE32_SGE_LENGTH((psg)->FlagsLength) 1207 #define MPI2_IEEE32_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f,l) 1208 1209 /* CAUTION - The following are READ-MODIFY-WRITE! */ 1210 #define MPI2_IEEE32_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_IEEE32_SGE_SET_FLAGS(f) 1211 #define MPI2_IEEE32_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_IEEE32_SGE_LENGTH(l) 1212 1213 1214 1215 /***************************************************************************** 1216 * 1217 * Fusion-MPT MPI/IEEE Scatter Gather Unions 1218 * 1219 *****************************************************************************/ 1220 1221 typedef union _MPI2_SIMPLE_SGE_UNION 1222 { 1223 MPI2_SGE_SIMPLE_UNION MpiSimple; 1224 MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple; 1225 } MPI2_SIMPLE_SGE_UNION, MPI2_POINTER PTR_MPI2_SIMPLE_SGE_UNION, 1226 Mpi2SimpleSgeUntion_t, MPI2_POINTER pMpi2SimpleSgeUntion_t; 1227 1228 1229 typedef union _MPI2_SGE_IO_UNION 1230 { 1231 MPI2_SGE_SIMPLE_UNION MpiSimple; 1232 MPI2_SGE_CHAIN_UNION MpiChain; 1233 MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple; 1234 MPI2_IEEE_SGE_CHAIN_UNION IeeeChain; 1235 } MPI2_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_SGE_IO_UNION, 1236 Mpi2SGEIOUnion_t, MPI2_POINTER pMpi2SGEIOUnion_t; 1237 1238 1239 /**************************************************************************** 1240 * 1241 * Values for SGLFlags field, used in many request messages with an SGL 1242 * 1243 ****************************************************************************/ 1244 1245 /* values for MPI SGL Data Location Address Space subfield */ 1246 #define MPI2_SGLFLAGS_ADDRESS_SPACE_MASK (0x0C) 1247 #define MPI2_SGLFLAGS_SYSTEM_ADDRESS_SPACE (0x00) 1248 #define MPI2_SGLFLAGS_IOCDDR_ADDRESS_SPACE (0x04) 1249 #define MPI2_SGLFLAGS_IOCPLB_ADDRESS_SPACE (0x08) 1250 #define MPI2_SGLFLAGS_IOCPLBNTA_ADDRESS_SPACE (0x0C) 1251 /* values for SGL Type subfield */ 1252 #define MPI2_SGLFLAGS_SGL_TYPE_MASK (0x03) 1253 #define MPI2_SGLFLAGS_SGL_TYPE_MPI (0x00) 1254 #define MPI2_SGLFLAGS_SGL_TYPE_IEEE32 (0x01) /* MPI v2.0 products only */ 1255 #define MPI2_SGLFLAGS_SGL_TYPE_IEEE64 (0x02) 1256 1257 1258 #endif 1259 1260