xref: /freebsd/sys/dev/mpi3mr/mpi/mpi30_ioc.h (revision 92f340d137ba5d6db7610ba1dae35842e2c9c8ea)
12d1d418eSSumit Saxena /*
2baabb919SChandrakanth patil  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
32d1d418eSSumit Saxena  *
4*92f340d1SChandrakanth patil  * Copyright (c) 2016-2025, Broadcom Inc. All rights reserved.
52d1d418eSSumit Saxena  * Support: <fbsd-storage-driver.pdl@broadcom.com>
62d1d418eSSumit Saxena  *
72d1d418eSSumit Saxena  * Redistribution and use in source and binary forms, with or without
82d1d418eSSumit Saxena  * modification, are permitted provided that the following conditions are
92d1d418eSSumit Saxena  * met:
102d1d418eSSumit Saxena  *
112d1d418eSSumit Saxena  * 1. Redistributions of source code must retain the above copyright notice,
122d1d418eSSumit Saxena  *    this list of conditions and the following disclaimer.
132d1d418eSSumit Saxena  * 2. Redistributions in binary form must reproduce the above copyright notice,
142d1d418eSSumit Saxena  *    this list of conditions and the following disclaimer in the documentation and/or other
152d1d418eSSumit Saxena  *    materials provided with the distribution.
162d1d418eSSumit Saxena  * 3. Neither the name of the Broadcom Inc. nor the names of its contributors
172d1d418eSSumit Saxena  *    may be used to endorse or promote products derived from this software without
182d1d418eSSumit Saxena  *    specific prior written permission.
192d1d418eSSumit Saxena  *
202d1d418eSSumit Saxena  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
212d1d418eSSumit Saxena  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
222d1d418eSSumit Saxena  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
232d1d418eSSumit Saxena  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
242d1d418eSSumit Saxena  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
252d1d418eSSumit Saxena  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
262d1d418eSSumit Saxena  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
272d1d418eSSumit Saxena  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
282d1d418eSSumit Saxena  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
292d1d418eSSumit Saxena  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
302d1d418eSSumit Saxena  * POSSIBILITY OF SUCH DAMAGE.
312d1d418eSSumit Saxena  *
322d1d418eSSumit Saxena  * The views and conclusions contained in the software and documentation are
332d1d418eSSumit Saxena  * those of the authors and should not be interpreted as representing
342d1d418eSSumit Saxena  * official policies,either expressed or implied, of the FreeBSD Project.
352d1d418eSSumit Saxena  *
362d1d418eSSumit Saxena  * Mail to: Broadcom Inc 1320 Ridder Park Dr, San Jose, CA 95131
372d1d418eSSumit Saxena  *
382d1d418eSSumit Saxena  * Broadcom Inc. (Broadcom) MPI3MR Adapter FreeBSD
392d1d418eSSumit Saxena  *
402d1d418eSSumit Saxena  */
41*92f340d1SChandrakanth patil 
422d1d418eSSumit Saxena #ifndef MPI30_IOC_H
432d1d418eSSumit Saxena #define MPI30_IOC_H     1
442d1d418eSSumit Saxena 
452d1d418eSSumit Saxena /*****************************************************************************
462d1d418eSSumit Saxena  *              IOC Messages                                                 *
472d1d418eSSumit Saxena  ****************************************************************************/
482d1d418eSSumit Saxena 
492d1d418eSSumit Saxena /*****************************************************************************
502d1d418eSSumit Saxena  *              IOCInit Request Message                                      *
512d1d418eSSumit Saxena  ****************************************************************************/
522d1d418eSSumit Saxena typedef struct _MPI3_IOC_INIT_REQUEST
532d1d418eSSumit Saxena {
542d1d418eSSumit Saxena     U16                   HostTag;                            /* 0x00 */
552d1d418eSSumit Saxena     U8                    IOCUseOnly02;                       /* 0x02 */
562d1d418eSSumit Saxena     U8                    Function;                           /* 0x03 */
572d1d418eSSumit Saxena     U16                   IOCUseOnly04;                       /* 0x04 */
582d1d418eSSumit Saxena     U8                    IOCUseOnly06;                       /* 0x06 */
592d1d418eSSumit Saxena     U8                    MsgFlags;                           /* 0x07 */
602d1d418eSSumit Saxena     U16                   ChangeCount;                        /* 0x08 */
612d1d418eSSumit Saxena     U16                   Reserved0A;                         /* 0x0A */
622d1d418eSSumit Saxena     MPI3_VERSION_UNION    MPIVersion;                         /* 0x0C */
632d1d418eSSumit Saxena     U64                   TimeStamp;                          /* 0x10 */
642d1d418eSSumit Saxena     U8                    Reserved18;                         /* 0x18 */
652d1d418eSSumit Saxena     U8                    WhoInit;                            /* 0x19 */
662d1d418eSSumit Saxena     U16                   Reserved1A;                         /* 0x1A */
672d1d418eSSumit Saxena     U16                   ReplyFreeQueueDepth;                /* 0x1C */
682d1d418eSSumit Saxena     U16                   Reserved1E;                         /* 0x1E */
692d1d418eSSumit Saxena     U64                   ReplyFreeQueueAddress;              /* 0x20 */
702d1d418eSSumit Saxena     U32                   Reserved28;                         /* 0x28 */
712d1d418eSSumit Saxena     U16                   SenseBufferFreeQueueDepth;          /* 0x2C */
722d1d418eSSumit Saxena     U16                   SenseBufferLength;                  /* 0x2E */
732d1d418eSSumit Saxena     U64                   SenseBufferFreeQueueAddress;        /* 0x30 */
742d1d418eSSumit Saxena     U64                   DriverInformationAddress;           /* 0x38 */
752d1d418eSSumit Saxena } MPI3_IOC_INIT_REQUEST, MPI3_POINTER PTR_MPI3_IOC_INIT_REQUEST,
762d1d418eSSumit Saxena   Mpi3IOCInitRequest_t, MPI3_POINTER pMpi3IOCInitRequest_t;
772d1d418eSSumit Saxena 
782d1d418eSSumit Saxena /**** Defines for the MsgFlags field ****/
79baabb919SChandrakanth patil #define MPI3_IOCINIT_MSGFLAGS_WRITESAMEDIVERT_SUPPORTED     (0x08)
80baabb919SChandrakanth patil #define MPI3_IOCINIT_MSGFLAGS_SCSIIOSTATUSREPLY_SUPPORTED   (0x04)
812d1d418eSSumit Saxena #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_MASK             (0x03)
82*92f340d1SChandrakanth patil #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_SHIFT            (0)
832d1d418eSSumit Saxena #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_NOT_USED         (0x00)
842d1d418eSSumit Saxena #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_SEPARATED        (0x01)
852d1d418eSSumit Saxena #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_INLINE           (0x02)
862d1d418eSSumit Saxena #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_BOTH             (0x03)
872d1d418eSSumit Saxena 
882d1d418eSSumit Saxena /**** Defines for the WhoInit field ****/
892d1d418eSSumit Saxena #define MPI3_WHOINIT_NOT_INITIALIZED                        (0x00)
902d1d418eSSumit Saxena #define MPI3_WHOINIT_ROM_BIOS                               (0x02)
912d1d418eSSumit Saxena #define MPI3_WHOINIT_HOST_DRIVER                            (0x03)
922d1d418eSSumit Saxena #define MPI3_WHOINIT_MANUFACTURER                           (0x04)
932d1d418eSSumit Saxena 
942d1d418eSSumit Saxena /**** Defines for the DriverInformationAddress field */
952d1d418eSSumit Saxena typedef struct _MPI3_DRIVER_INFO_LAYOUT
962d1d418eSSumit Saxena {
972d1d418eSSumit Saxena     U32             InformationLength;                  /* 0x00 */
982d1d418eSSumit Saxena     U8              DriverSignature[12];                /* 0x04 */
992d1d418eSSumit Saxena     U8              OsName[16];                         /* 0x10 */
1002d1d418eSSumit Saxena     U8              OsVersion[12];                      /* 0x20 */
1012d1d418eSSumit Saxena     U8              DriverName[20];                     /* 0x2C */
1022d1d418eSSumit Saxena     U8              DriverVersion[32];                  /* 0x40 */
1032d1d418eSSumit Saxena     U8              DriverReleaseDate[20];              /* 0x60 */
1042d1d418eSSumit Saxena     U32             DriverCapabilities;                 /* 0x74 */
1052d1d418eSSumit Saxena } MPI3_DRIVER_INFO_LAYOUT, MPI3_POINTER PTR_MPI3_DRIVER_INFO_LAYOUT,
1062d1d418eSSumit Saxena   Mpi3DriverInfoLayout_t, MPI3_POINTER pMpi3DriverInfoLayout_t;
1072d1d418eSSumit Saxena 
108*92f340d1SChandrakanth patil #define MPI3_IOCINIT_DRIVERCAP_OSEXPOSURE_MASK              (0x00000003)
109*92f340d1SChandrakanth patil #define MPI3_IOCINIT_DRIVERCAP_OSEXPOSURE_SHIFT             (0)
110*92f340d1SChandrakanth patil #define MPI3_IOCINIT_DRIVERCAP_OSEXPOSURE_NO_GUIDANCE       (0x00000000)
111*92f340d1SChandrakanth patil #define MPI3_IOCINIT_DRIVERCAP_OSEXPOSURE_NO_SPECIAL        (0x00000001)
112*92f340d1SChandrakanth patil #define MPI3_IOCINIT_DRIVERCAP_OSEXPOSURE_REPORT_AS_HDD     (0x00000002)
113*92f340d1SChandrakanth patil #define MPI3_IOCINIT_DRIVERCAP_OSEXPOSURE_REPORT_AS_SSD     (0x00000003)
114*92f340d1SChandrakanth patil 
1152d1d418eSSumit Saxena /*****************************************************************************
1162d1d418eSSumit Saxena  *              IOCFacts Request Message                                     *
1172d1d418eSSumit Saxena  ****************************************************************************/
1182d1d418eSSumit Saxena typedef struct _MPI3_IOC_FACTS_REQUEST
1192d1d418eSSumit Saxena {
1202d1d418eSSumit Saxena     U16                 HostTag;                            /* 0x00 */
1212d1d418eSSumit Saxena     U8                  IOCUseOnly02;                       /* 0x02 */
1222d1d418eSSumit Saxena     U8                  Function;                           /* 0x03 */
1232d1d418eSSumit Saxena     U16                 IOCUseOnly04;                       /* 0x04 */
1242d1d418eSSumit Saxena     U8                  IOCUseOnly06;                       /* 0x06 */
1252d1d418eSSumit Saxena     U8                  MsgFlags;                           /* 0x07 */
1262d1d418eSSumit Saxena     U16                 ChangeCount;                        /* 0x08 */
1272d1d418eSSumit Saxena     U16                 Reserved0A;                         /* 0x0A */
1282d1d418eSSumit Saxena     U32                 Reserved0C;                         /* 0x0C */
1292d1d418eSSumit Saxena     MPI3_SGE_UNION      SGL;                                /* 0x10 */
1302d1d418eSSumit Saxena } MPI3_IOC_FACTS_REQUEST, MPI3_POINTER PTR_MPI3_IOC_FACTS_REQUEST,
1312d1d418eSSumit Saxena   Mpi3IOCFactsRequest_t, MPI3_POINTER pMpi3IOCFactsRequest_t;
1322d1d418eSSumit Saxena 
1332d1d418eSSumit Saxena /*****************************************************************************
1342d1d418eSSumit Saxena  *              IOCFacts Data                                                *
1352d1d418eSSumit Saxena  ****************************************************************************/
1362d1d418eSSumit Saxena typedef struct _MPI3_IOC_FACTS_DATA
1372d1d418eSSumit Saxena {
1382d1d418eSSumit Saxena     U16                     IOCFactsDataLength;                 /* 0x00 */
1392d1d418eSSumit Saxena     U16                     Reserved02;                         /* 0x02 */
1402d1d418eSSumit Saxena     MPI3_VERSION_UNION      MPIVersion;                         /* 0x04 */
1412d1d418eSSumit Saxena     MPI3_COMP_IMAGE_VERSION FWVersion;                          /* 0x08 */
1422d1d418eSSumit Saxena     U32                     IOCCapabilities;                    /* 0x10 */
1432d1d418eSSumit Saxena     U8                      IOCNumber;                          /* 0x14 */
1442d1d418eSSumit Saxena     U8                      WhoInit;                            /* 0x15 */
1452d1d418eSSumit Saxena     U16                     MaxMSIxVectors;                     /* 0x16 */
1462d1d418eSSumit Saxena     U16                     MaxOutstandingRequests;             /* 0x18 */
1472d1d418eSSumit Saxena     U16                     ProductID;                          /* 0x1A */
1482d1d418eSSumit Saxena     U16                     IOCRequestFrameSize;                /* 0x1C */
1492d1d418eSSumit Saxena     U16                     ReplyFrameSize;                     /* 0x1E */
1502d1d418eSSumit Saxena     U16                     IOCExceptions;                      /* 0x20 */
1512d1d418eSSumit Saxena     U16                     MaxPersistentID;                    /* 0x22 */
1522d1d418eSSumit Saxena     U8                      SGEModifierMask;                    /* 0x24 */
1532d1d418eSSumit Saxena     U8                      SGEModifierValue;                   /* 0x25 */
1542d1d418eSSumit Saxena     U8                      SGEModifierShift;                   /* 0x26 */
1552d1d418eSSumit Saxena     U8                      ProtocolFlags;                      /* 0x27 */
1562d1d418eSSumit Saxena     U16                     MaxSASInitiators;                   /* 0x28 */
1572d1d418eSSumit Saxena     U16                     MaxDataLength;                      /* 0x2A */
1582d1d418eSSumit Saxena     U16                     MaxSASExpanders;                    /* 0x2C */
1592d1d418eSSumit Saxena     U16                     MaxEnclosures;                      /* 0x2E */
1602d1d418eSSumit Saxena     U16                     MinDevHandle;                       /* 0x30 */
1612d1d418eSSumit Saxena     U16                     MaxDevHandle;                       /* 0x32 */
1622d1d418eSSumit Saxena     U16                     MaxPCIeSwitches;                    /* 0x34 */
1632d1d418eSSumit Saxena     U16                     MaxNVMe;                            /* 0x36 */
1642d1d418eSSumit Saxena     U16                     Reserved38;                         /* 0x38 */
1652d1d418eSSumit Saxena     U16                     MaxVDs;                             /* 0x3A */
1662d1d418eSSumit Saxena     U16                     MaxHostPDs;                         /* 0x3C */
1672d1d418eSSumit Saxena     U16                     MaxAdvHostPDs;                      /* 0x3E */
1682d1d418eSSumit Saxena     U16                     MaxRAIDPDs;                         /* 0x40 */
1692d1d418eSSumit Saxena     U16                     MaxPostedCmdBuffers;                /* 0x42 */
1702d1d418eSSumit Saxena     U32                     Flags;                              /* 0x44 */
1712d1d418eSSumit Saxena     U16                     MaxOperationalRequestQueues;        /* 0x48 */
1722d1d418eSSumit Saxena     U16                     MaxOperationalReplyQueues;          /* 0x4A */
1732d1d418eSSumit Saxena     U16                     ShutdownTimeout;                    /* 0x4C */
1742d1d418eSSumit Saxena     U16                     Reserved4E;                         /* 0x4E */
1752d1d418eSSumit Saxena     U32                     DiagTraceSize;                      /* 0x50 */
1762d1d418eSSumit Saxena     U32                     DiagFwSize;                         /* 0x54 */
1772d1d418eSSumit Saxena     U32                     DiagDriverSize;                     /* 0x58 */
1782d1d418eSSumit Saxena     U8                      MaxHostPDNsCount;                   /* 0x5C */
1792d1d418eSSumit Saxena     U8                      MaxAdvHostPDNsCount;                /* 0x5D */
1802d1d418eSSumit Saxena     U8                      MaxRAIDPDNsCount;                   /* 0x5E */
1812d1d418eSSumit Saxena     U8                      MaxDevicesPerThrottleGroup;         /* 0x5F */
1822d1d418eSSumit Saxena     U16                     IOThrottleDataLength;               /* 0x60 */
1832d1d418eSSumit Saxena     U16                     MaxIOThrottleGroup;                 /* 0x62 */
1842d1d418eSSumit Saxena     U16                     IOThrottleLow;                      /* 0x64 */
1852d1d418eSSumit Saxena     U16                     IOThrottleHigh;                     /* 0x66 */
186baabb919SChandrakanth patil     U32                     DiagFdlSize;                        /* 0x68 */
187baabb919SChandrakanth patil     U32                     DiagTtySize;                        /* 0x6C */
1882d1d418eSSumit Saxena } MPI3_IOC_FACTS_DATA, MPI3_POINTER PTR_MPI3_IOC_FACTS_DATA,
1892d1d418eSSumit Saxena   Mpi3IOCFactsData_t, MPI3_POINTER pMpi3IOCFactsData_t;
1902d1d418eSSumit Saxena 
1912d1d418eSSumit Saxena /**** Defines for the IOCCapabilities field ****/
1922d1d418eSSumit Saxena #define MPI3_IOCFACTS_CAPABILITY_NON_SUPERVISOR_MASK          (0x80000000)
193*92f340d1SChandrakanth patil #define MPI3_IOCFACTS_CAPABILITY_NON_SUPERVISOR_SHIFT         (31)
1942d1d418eSSumit Saxena #define MPI3_IOCFACTS_CAPABILITY_SUPERVISOR_IOC               (0x00000000)
1952d1d418eSSumit Saxena #define MPI3_IOCFACTS_CAPABILITY_NON_SUPERVISOR_IOC           (0x80000000)
1962d1d418eSSumit Saxena #define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_MASK            (0x00000600)
197*92f340d1SChandrakanth patil #define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_SHIFT           (9)
1982d1d418eSSumit Saxena #define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_FIXED_THRESHOLD (0x00000000)
1992d1d418eSSumit Saxena #define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_OUTSTANDING_IO  (0x00000200)
200baabb919SChandrakanth patil #define MPI3_IOCFACTS_CAPABILITY_COMPLETE_RESET_SUPPORTED     (0x00000100)
201baabb919SChandrakanth patil #define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_TRACE_SUPPORTED     (0x00000080)
202baabb919SChandrakanth patil #define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_FW_SUPPORTED        (0x00000040)
203baabb919SChandrakanth patil #define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_DRIVER_SUPPORTED    (0x00000020)
204baabb919SChandrakanth patil #define MPI3_IOCFACTS_CAPABILITY_ADVANCED_HOST_PD_SUPPORTED   (0x00000010)
205baabb919SChandrakanth patil #define MPI3_IOCFACTS_CAPABILITY_RAID_SUPPORTED               (0x00000008)
206baabb919SChandrakanth patil #define MPI3_IOCFACTS_CAPABILITY_MULTIPATH_SUPPORTED          (0x00000002)
2072d1d418eSSumit Saxena #define MPI3_IOCFACTS_CAPABILITY_COALESCE_CTRL_SUPPORTED      (0x00000001)
2082d1d418eSSumit Saxena 
2092d1d418eSSumit Saxena /**** WhoInit values are defined under IOCInit Request Message definition ****/
2102d1d418eSSumit Saxena 
2112d1d418eSSumit Saxena /**** Defines for the ProductID field ****/
2122d1d418eSSumit Saxena #define MPI3_IOCFACTS_PID_TYPE_MASK                           (0xF000)
2132d1d418eSSumit Saxena #define MPI3_IOCFACTS_PID_TYPE_SHIFT                          (12)
2142d1d418eSSumit Saxena #define MPI3_IOCFACTS_PID_PRODUCT_MASK                        (0x0F00)
2152d1d418eSSumit Saxena #define MPI3_IOCFACTS_PID_PRODUCT_SHIFT                       (8)
2162d1d418eSSumit Saxena #define MPI3_IOCFACTS_PID_FAMILY_MASK                         (0x00FF)
2172d1d418eSSumit Saxena #define MPI3_IOCFACTS_PID_FAMILY_SHIFT                        (0)
2182d1d418eSSumit Saxena 
2192d1d418eSSumit Saxena /**** Defines for the IOCExceptions field ****/
2202d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SECURITY_REKEY                   (0x2000)
2212d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SAS_DISABLED                     (0x1000)
2222d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SAFE_MODE                        (0x0800)
2232d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_MASK                (0x0700)
224*92f340d1SChandrakanth patil #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_SHIFT               (8)
2252d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_NONE                (0x0000)
2262d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_LOCAL_VIA_MGMT      (0x0100)
2272d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_EXT_VIA_MGMT        (0x0200)
2282d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_DRIVE_EXT_VIA_MGMT  (0x0300)
2292d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_LOCAL_VIA_OOB       (0x0400)
2302d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_EXT_VIA_OOB         (0x0500)
2312d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_DRIVE_EXT_VIA_OOB   (0x0600)
2322d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_PCIE_DISABLED                    (0x0080)
2332d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_PARTIAL_MEMORY_FAILURE           (0x0040)
2342d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_MANUFACT_CHECKSUM_FAIL           (0x0020)
2352d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL                 (0x0010)
2362d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL             (0x0008)
237*92f340d1SChandrakanth patil #define MPI3_IOCFACTS_EXCEPT_BLOCKING_BOOT_EVENT              (0x0004)
238*92f340d1SChandrakanth patil #define MPI3_IOCFACTS_EXCEPT_SECURITY_SELFTEST_FAILURE        (0x0002)
2392d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_MASK                    (0x0001)
240*92f340d1SChandrakanth patil #define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_SHIFT                   (0)
2412d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_PRIMARY                 (0x0000)
2422d1d418eSSumit Saxena #define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_SECONDARY               (0x0001)
2432d1d418eSSumit Saxena 
2442d1d418eSSumit Saxena /**** Defines for the ProtocolFlags field ****/
2452d1d418eSSumit Saxena #define MPI3_IOCFACTS_PROTOCOL_SAS                            (0x0010)
2462d1d418eSSumit Saxena #define MPI3_IOCFACTS_PROTOCOL_SATA                           (0x0008)
2472d1d418eSSumit Saxena #define MPI3_IOCFACTS_PROTOCOL_NVME                           (0x0004)
2482d1d418eSSumit Saxena #define MPI3_IOCFACTS_PROTOCOL_SCSI_INITIATOR                 (0x0002)
2492d1d418eSSumit Saxena #define MPI3_IOCFACTS_PROTOCOL_SCSI_TARGET                    (0x0001)
2502d1d418eSSumit Saxena 
2512d1d418eSSumit Saxena /**** Defines for the MaxDataLength field ****/
2522d1d418eSSumit Saxena #define MPI3_IOCFACTS_MAX_DATA_LENGTH_NOT_REPORTED            (0x0000)
2532d1d418eSSumit Saxena 
2542d1d418eSSumit Saxena /**** Defines for the Flags field ****/
2552d1d418eSSumit Saxena #define MPI3_IOCFACTS_FLAGS_SIGNED_NVDATA_REQUIRED             (0x00010000)
2562d1d418eSSumit Saxena #define MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_MASK             (0x0000FF00)
2572d1d418eSSumit Saxena #define MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_SHIFT            (8)
258baabb919SChandrakanth patil #define MPI3_IOCFACTS_FLAGS_MAX_REQ_PER_REPLY_QUEUE_LIMIT      (0x00000040)
2592d1d418eSSumit Saxena #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_MASK           (0x00000030)
260*92f340d1SChandrakanth patil #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_SHIFT          (4)
2612d1d418eSSumit Saxena #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_NOT_STARTED    (0x00000000)
2622d1d418eSSumit Saxena #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_IN_PROGRESS    (0x00000010)
2632d1d418eSSumit Saxena #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_COMPLETE       (0x00000020)
2642d1d418eSSumit Saxena #define MPI3_IOCFACTS_FLAGS_PERSONALITY_MASK                   (0x0000000F)
265*92f340d1SChandrakanth patil #define MPI3_IOCFACTS_FLAGS_PERSONALITY_SHIFT                  (0)
2662d1d418eSSumit Saxena #define MPI3_IOCFACTS_FLAGS_PERSONALITY_EHBA                   (0x00000000)
2672d1d418eSSumit Saxena #define MPI3_IOCFACTS_FLAGS_PERSONALITY_RAID_DDR               (0x00000002)
2682d1d418eSSumit Saxena 
2692d1d418eSSumit Saxena /**** Defines for the IOThrottleDataLength field ****/
2702d1d418eSSumit Saxena #define MPI3_IOCFACTS_IO_THROTTLE_DATA_LENGTH_NOT_REQUIRED     (0x0000)
2712d1d418eSSumit Saxena 
272baabb919SChandrakanth patil /**** Defines for the MaxIOThrottleGroup field ****/
2732d1d418eSSumit Saxena #define MPI3_IOCFACTS_MAX_IO_THROTTLE_GROUP_NOT_REQUIRED       (0x0000)
2742d1d418eSSumit Saxena 
275baabb919SChandrakanth patil /**** Defines for the DiagFdlSize field ****/
276baabb919SChandrakanth patil #define MPI3_IOCFACTS_DIAGFDLSIZE_NOT_SUPPORTED                (0x00000000)
277baabb919SChandrakanth patil 
278baabb919SChandrakanth patil /**** Defines for the DiagTtySize field ****/
279baabb919SChandrakanth patil #define MPI3_IOCFACTS_DIAGTTYSIZE_NOT_SUPPORTED                (0x00000000)
280baabb919SChandrakanth patil 
2812d1d418eSSumit Saxena /*****************************************************************************
2822d1d418eSSumit Saxena  *              Management Passthrough Request Message                      *
2832d1d418eSSumit Saxena  ****************************************************************************/
2842d1d418eSSumit Saxena typedef struct _MPI3_MGMT_PASSTHROUGH_REQUEST
2852d1d418eSSumit Saxena {
2862d1d418eSSumit Saxena     U16                 HostTag;                        /* 0x00 */
2872d1d418eSSumit Saxena     U8                  IOCUseOnly02;                   /* 0x02 */
2882d1d418eSSumit Saxena     U8                  Function;                       /* 0x03 */
2892d1d418eSSumit Saxena     U16                 IOCUseOnly04;                   /* 0x04 */
2902d1d418eSSumit Saxena     U8                  IOCUseOnly06;                   /* 0x06 */
2912d1d418eSSumit Saxena     U8                  MsgFlags;                       /* 0x07 */
2922d1d418eSSumit Saxena     U16                 ChangeCount;                    /* 0x08 */
2932d1d418eSSumit Saxena     U16                 Reserved0A;                     /* 0x0A */
2942d1d418eSSumit Saxena     U32                 Reserved0C[5];                  /* 0x0C */
2952d1d418eSSumit Saxena     MPI3_SGE_UNION      CommandSGL;                     /* 0x20 */
2962d1d418eSSumit Saxena     MPI3_SGE_UNION      ResponseSGL;                    /* 0x30 */
2972d1d418eSSumit Saxena } MPI3_MGMT_PASSTHROUGH_REQUEST, MPI3_POINTER PTR_MPI3_MGMT_PASSTHROUGH_REQUEST,
2982d1d418eSSumit Saxena   Mpi3MgmtPassthroughRequest_t, MPI3_POINTER pMpi3MgmtPassthroughRequest_t;
2992d1d418eSSumit Saxena 
3002d1d418eSSumit Saxena /*****************************************************************************
3012d1d418eSSumit Saxena  *              CreateRequestQueue Request Message                        *
3022d1d418eSSumit Saxena  ****************************************************************************/
3032d1d418eSSumit Saxena typedef struct _MPI3_CREATE_REQUEST_QUEUE_REQUEST
3042d1d418eSSumit Saxena {
3052d1d418eSSumit Saxena     U16             HostTag;                            /* 0x00 */
3062d1d418eSSumit Saxena     U8              IOCUseOnly02;                       /* 0x02 */
3072d1d418eSSumit Saxena     U8              Function;                           /* 0x03 */
3082d1d418eSSumit Saxena     U16             IOCUseOnly04;                       /* 0x04 */
3092d1d418eSSumit Saxena     U8              IOCUseOnly06;                       /* 0x06 */
3102d1d418eSSumit Saxena     U8              MsgFlags;                           /* 0x07 */
3112d1d418eSSumit Saxena     U16             ChangeCount;                        /* 0x08 */
3122d1d418eSSumit Saxena     U8              Flags;                              /* 0x0A */
3132d1d418eSSumit Saxena     U8              Burst;                              /* 0x0B */
3142d1d418eSSumit Saxena     U16             Size;                               /* 0x0C */
3152d1d418eSSumit Saxena     U16             QueueID;                            /* 0x0E */
3162d1d418eSSumit Saxena     U16             ReplyQueueID;                       /* 0x10 */
3172d1d418eSSumit Saxena     U16             Reserved12;                         /* 0x12 */
3182d1d418eSSumit Saxena     U32             Reserved14;                         /* 0x14 */
3192d1d418eSSumit Saxena     U64             BaseAddress;                        /* 0x18 */
3202d1d418eSSumit Saxena } MPI3_CREATE_REQUEST_QUEUE_REQUEST, MPI3_POINTER PTR_MPI3_CREATE_REQUEST_QUEUE_REQUEST,
3212d1d418eSSumit Saxena   Mpi3CreateRequestQueueRequest_t, MPI3_POINTER pMpi3CreateRequestQueueRequest_t;
3222d1d418eSSumit Saxena 
3232d1d418eSSumit Saxena /**** Defines for the Flags field ****/
3242d1d418eSSumit Saxena #define MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_MASK          (0x80)
325*92f340d1SChandrakanth patil #define MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_SHIFT         (7)
3262d1d418eSSumit Saxena #define MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_SEGMENTED     (0x80)
3272d1d418eSSumit Saxena #define MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_CONTIGUOUS    (0x00)
3282d1d418eSSumit Saxena 
3292d1d418eSSumit Saxena /**** Defines for the Size field ****/
3302d1d418eSSumit Saxena #define MPI3_CREATE_REQUEST_QUEUE_SIZE_MINIMUM                  (2)
3312d1d418eSSumit Saxena 
3322d1d418eSSumit Saxena /*****************************************************************************
3332d1d418eSSumit Saxena  *              DeleteRequestQueue Request Message                        *
3342d1d418eSSumit Saxena  ****************************************************************************/
3352d1d418eSSumit Saxena typedef struct _MPI3_DELETE_REQUEST_QUEUE_REQUEST
3362d1d418eSSumit Saxena {
3372d1d418eSSumit Saxena     U16             HostTag;                            /* 0x00 */
3382d1d418eSSumit Saxena     U8              IOCUseOnly02;                       /* 0x02 */
3392d1d418eSSumit Saxena     U8              Function;                           /* 0x03 */
3402d1d418eSSumit Saxena     U16             IOCUseOnly04;                       /* 0x04 */
3412d1d418eSSumit Saxena     U8              IOCUseOnly06;                       /* 0x06 */
3422d1d418eSSumit Saxena     U8              MsgFlags;                           /* 0x07 */
3432d1d418eSSumit Saxena     U16             ChangeCount;                        /* 0x08 */
3442d1d418eSSumit Saxena     U16             QueueID;                            /* 0x0A */
3452d1d418eSSumit Saxena } MPI3_DELETE_REQUEST_QUEUE_REQUEST, MPI3_POINTER PTR_MPI3_DELETE_REQUEST_QUEUE_REQUEST,
3462d1d418eSSumit Saxena   Mpi3DeleteRequestQueueRequest_t, MPI3_POINTER pMpi3DeleteRequestQueueRequest_t;
3472d1d418eSSumit Saxena 
3482d1d418eSSumit Saxena 
3492d1d418eSSumit Saxena /*****************************************************************************
3502d1d418eSSumit Saxena  *              CreateReplyQueue Request Message                          *
3512d1d418eSSumit Saxena  ****************************************************************************/
3522d1d418eSSumit Saxena typedef struct _MPI3_CREATE_REPLY_QUEUE_REQUEST
3532d1d418eSSumit Saxena {
3542d1d418eSSumit Saxena     U16             HostTag;                            /* 0x00 */
3552d1d418eSSumit Saxena     U8              IOCUseOnly02;                       /* 0x02 */
3562d1d418eSSumit Saxena     U8              Function;                           /* 0x03 */
3572d1d418eSSumit Saxena     U16             IOCUseOnly04;                       /* 0x04 */
3582d1d418eSSumit Saxena     U8              IOCUseOnly06;                       /* 0x06 */
3592d1d418eSSumit Saxena     U8              MsgFlags;                           /* 0x07 */
3602d1d418eSSumit Saxena     U16             ChangeCount;                        /* 0x08 */
3612d1d418eSSumit Saxena     U8              Flags;                              /* 0x0A */
3622d1d418eSSumit Saxena     U8              Reserved0B;                         /* 0x0B */
3632d1d418eSSumit Saxena     U16             Size;                               /* 0x0C */
3642d1d418eSSumit Saxena     U16             QueueID;                            /* 0x0E */
3652d1d418eSSumit Saxena     U16             MSIxIndex;                          /* 0x10 */
3662d1d418eSSumit Saxena     U16             Reserved12;                         /* 0x12 */
3672d1d418eSSumit Saxena     U32             Reserved14;                         /* 0x14 */
3682d1d418eSSumit Saxena     U64             BaseAddress;                        /* 0x18 */
3692d1d418eSSumit Saxena } MPI3_CREATE_REPLY_QUEUE_REQUEST, MPI3_POINTER PTR_MPI3_CREATE_REPLY_QUEUE_REQUEST,
3702d1d418eSSumit Saxena   Mpi3CreateReplyQueueRequest_t, MPI3_POINTER pMpi3CreateReplyQueueRequest_t;
3712d1d418eSSumit Saxena 
3722d1d418eSSumit Saxena /**** Defines for the Flags field ****/
3732d1d418eSSumit Saxena #define MPI3_CREATE_REPLY_QUEUE_FLAGS_SEGMENTED_MASK            (0x80)
374*92f340d1SChandrakanth patil #define MPI3_CREATE_REPLY_QUEUE_FLAGS_SEGMENTED_SHIFT           (7)
3752d1d418eSSumit Saxena #define MPI3_CREATE_REPLY_QUEUE_FLAGS_SEGMENTED_SEGMENTED       (0x80)
3762d1d418eSSumit Saxena #define MPI3_CREATE_REPLY_QUEUE_FLAGS_SEGMENTED_CONTIGUOUS      (0x00)
3772d1d418eSSumit Saxena #define MPI3_CREATE_REPLY_QUEUE_FLAGS_COALESCE_DISABLE          (0x02)
3782d1d418eSSumit Saxena #define MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_MASK           (0x01)
379*92f340d1SChandrakanth patil #define MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_SHIFT          (0)
3802d1d418eSSumit Saxena #define MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_DISABLE        (0x00)
3812d1d418eSSumit Saxena #define MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_ENABLE         (0x01)
3822d1d418eSSumit Saxena 
3832d1d418eSSumit Saxena /**** Defines for the Size field ****/
3842d1d418eSSumit Saxena #define MPI3_CREATE_REPLY_QUEUE_SIZE_MINIMUM                    (2)
3852d1d418eSSumit Saxena 
3862d1d418eSSumit Saxena /*****************************************************************************
3872d1d418eSSumit Saxena  *              DeleteReplyQueue Request Message                          *
3882d1d418eSSumit Saxena  ****************************************************************************/
3892d1d418eSSumit Saxena typedef struct _MPI3_DELETE_REPLY_QUEUE_REQUEST
3902d1d418eSSumit Saxena {
3912d1d418eSSumit Saxena     U16             HostTag;                            /* 0x00 */
3922d1d418eSSumit Saxena     U8              IOCUseOnly02;                       /* 0x02 */
3932d1d418eSSumit Saxena     U8              Function;                           /* 0x03 */
3942d1d418eSSumit Saxena     U16             IOCUseOnly04;                       /* 0x04 */
3952d1d418eSSumit Saxena     U8              IOCUseOnly06;                       /* 0x06 */
3962d1d418eSSumit Saxena     U8              MsgFlags;                           /* 0x07 */
3972d1d418eSSumit Saxena     U16             ChangeCount;                        /* 0x08 */
3982d1d418eSSumit Saxena     U16             QueueID;                            /* 0x0A */
3992d1d418eSSumit Saxena } MPI3_DELETE_REPLY_QUEUE_REQUEST, MPI3_POINTER PTR_MPI3_DELETE_REPLY_QUEUE_REQUEST,
4002d1d418eSSumit Saxena   Mpi3DeleteReplyQueueRequest_t, MPI3_POINTER pMpi3DeleteReplyQueueRequest_t;
4012d1d418eSSumit Saxena 
4022d1d418eSSumit Saxena 
4032d1d418eSSumit Saxena /*****************************************************************************
4042d1d418eSSumit Saxena  *              PortEnable Request Message                                   *
4052d1d418eSSumit Saxena  ****************************************************************************/
4062d1d418eSSumit Saxena typedef struct _MPI3_PORT_ENABLE_REQUEST
4072d1d418eSSumit Saxena {
4082d1d418eSSumit Saxena     U16             HostTag;                            /* 0x00 */
4092d1d418eSSumit Saxena     U8              IOCUseOnly02;                       /* 0x02 */
4102d1d418eSSumit Saxena     U8              Function;                           /* 0x03 */
4112d1d418eSSumit Saxena     U16             IOCUseOnly04;                       /* 0x04 */
4122d1d418eSSumit Saxena     U8              IOCUseOnly06;                       /* 0x06 */
4132d1d418eSSumit Saxena     U8              MsgFlags;                           /* 0x07 */
4142d1d418eSSumit Saxena     U16             ChangeCount;                        /* 0x08 */
4152d1d418eSSumit Saxena     U16             Reserved0A;                         /* 0x0A */
4162d1d418eSSumit Saxena } MPI3_PORT_ENABLE_REQUEST, MPI3_POINTER PTR_MPI3_PORT_ENABLE_REQUEST,
4172d1d418eSSumit Saxena   Mpi3PortEnableRequest_t, MPI3_POINTER pMpi3PortEnableRequest_t;
4182d1d418eSSumit Saxena 
4192d1d418eSSumit Saxena 
4202d1d418eSSumit Saxena /*****************************************************************************
4212d1d418eSSumit Saxena  *              IOC Events and Event Management                              *
4222d1d418eSSumit Saxena  ****************************************************************************/
4232d1d418eSSumit Saxena #define MPI3_EVENT_LOG_DATA                         (0x01)
4242d1d418eSSumit Saxena #define MPI3_EVENT_CHANGE                           (0x02)
4252d1d418eSSumit Saxena #define MPI3_EVENT_GPIO_INTERRUPT                   (0x04)
4262d1d418eSSumit Saxena #define MPI3_EVENT_CABLE_MGMT                       (0x06)
4272d1d418eSSumit Saxena #define MPI3_EVENT_DEVICE_ADDED                     (0x07)
4282d1d418eSSumit Saxena #define MPI3_EVENT_DEVICE_INFO_CHANGED              (0x08)
4292d1d418eSSumit Saxena #define MPI3_EVENT_PREPARE_FOR_RESET                (0x09)
4302d1d418eSSumit Saxena #define MPI3_EVENT_COMP_IMAGE_ACT_START             (0x0A)
4312d1d418eSSumit Saxena #define MPI3_EVENT_ENCL_DEVICE_ADDED                (0x0B)
4322d1d418eSSumit Saxena #define MPI3_EVENT_ENCL_DEVICE_STATUS_CHANGE        (0x0C)
4332d1d418eSSumit Saxena #define MPI3_EVENT_DEVICE_STATUS_CHANGE             (0x0D)
4342d1d418eSSumit Saxena #define MPI3_EVENT_ENERGY_PACK_CHANGE               (0x0E)
4352d1d418eSSumit Saxena #define MPI3_EVENT_SAS_DISCOVERY                    (0x11)
4362d1d418eSSumit Saxena #define MPI3_EVENT_SAS_BROADCAST_PRIMITIVE          (0x12)
4372d1d418eSSumit Saxena #define MPI3_EVENT_SAS_NOTIFY_PRIMITIVE             (0x13)
4382d1d418eSSumit Saxena #define MPI3_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE    (0x14)
4392d1d418eSSumit Saxena #define MPI3_EVENT_SAS_INIT_TABLE_OVERFLOW          (0x15)
4402d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPOLOGY_CHANGE_LIST         (0x16)
4412d1d418eSSumit Saxena #define MPI3_EVENT_SAS_PHY_COUNTER                  (0x18)
4422d1d418eSSumit Saxena #define MPI3_EVENT_SAS_DEVICE_DISCOVERY_ERROR       (0x19)
4432d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPOLOGY_CHANGE_LIST        (0x20)
4442d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_ENUMERATION                 (0x22)
4452d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_ERROR_THRESHOLD             (0x23)
4462d1d418eSSumit Saxena #define MPI3_EVENT_HARD_RESET_RECEIVED              (0x40)
4472d1d418eSSumit Saxena #define MPI3_EVENT_DIAGNOSTIC_BUFFER_STATUS_CHANGE  (0x50)
4482d1d418eSSumit Saxena #define MPI3_EVENT_MIN_PRODUCT_SPECIFIC             (0x60)
4492d1d418eSSumit Saxena #define MPI3_EVENT_MAX_PRODUCT_SPECIFIC             (0x7F)
4502d1d418eSSumit Saxena 
4512d1d418eSSumit Saxena 
4522d1d418eSSumit Saxena /*****************************************************************************
4532d1d418eSSumit Saxena  *              Event Notification Request Message                           *
4542d1d418eSSumit Saxena  ****************************************************************************/
4552d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_EVENTMASK_WORDS           (4)
4562d1d418eSSumit Saxena 
4572d1d418eSSumit Saxena typedef struct _MPI3_EVENT_NOTIFICATION_REQUEST
4582d1d418eSSumit Saxena {
4592d1d418eSSumit Saxena     U16             HostTag;                                            /* 0x00 */
4602d1d418eSSumit Saxena     U8              IOCUseOnly02;                                       /* 0x02 */
4612d1d418eSSumit Saxena     U8              Function;                                           /* 0x03 */
4622d1d418eSSumit Saxena     U16             IOCUseOnly04;                                       /* 0x04 */
4632d1d418eSSumit Saxena     U8              IOCUseOnly06;                                       /* 0x06 */
4642d1d418eSSumit Saxena     U8              MsgFlags;                                           /* 0x07 */
4652d1d418eSSumit Saxena     U16             ChangeCount;                                        /* 0x08 */
4662d1d418eSSumit Saxena     U16             Reserved0A;                                         /* 0x0A */
4672d1d418eSSumit Saxena     U16             SASBroadcastPrimitiveMasks;                         /* 0x0C */
4682d1d418eSSumit Saxena     U16             SASNotifyPrimitiveMasks;                            /* 0x0E */
4692d1d418eSSumit Saxena     U32             EventMasks[MPI3_EVENT_NOTIFY_EVENTMASK_WORDS];      /* 0x10 */
4702d1d418eSSumit Saxena } MPI3_EVENT_NOTIFICATION_REQUEST, MPI3_POINTER PTR_MPI3_EVENT_NOTIFICATION_REQUEST,
4712d1d418eSSumit Saxena   Mpi3EventNotificationRequest_t, MPI3_POINTER pMpi3EventNotificationRequest_t;
4722d1d418eSSumit Saxena 
473baabb919SChandrakanth patil /**** Defines for the SASBroadcastPrimitiveMasks field - use MPI3_EVENT_BROADCAST_PRIMITIVE_ values ****/
4742d1d418eSSumit Saxena 
475baabb919SChandrakanth patil /**** Defines for the SASNotifyPrimitiveMasks field - use MPI3_EVENT_NOTIFY_PRIMITIVE_ values ****/
4762d1d418eSSumit Saxena 
4772d1d418eSSumit Saxena /**** Defines for the EventMasks field - use MPI3_EVENT_ values ****/
4782d1d418eSSumit Saxena 
4792d1d418eSSumit Saxena /*****************************************************************************
4802d1d418eSSumit Saxena  *              Event Notification Reply Message                             *
4812d1d418eSSumit Saxena  ****************************************************************************/
4822d1d418eSSumit Saxena typedef struct _MPI3_EVENT_NOTIFICATION_REPLY
4832d1d418eSSumit Saxena {
4842d1d418eSSumit Saxena     U16             HostTag;                /* 0x00 */
4852d1d418eSSumit Saxena     U8              IOCUseOnly02;           /* 0x02 */
4862d1d418eSSumit Saxena     U8              Function;               /* 0x03 */
4872d1d418eSSumit Saxena     U16             IOCUseOnly04;           /* 0x04 */
4882d1d418eSSumit Saxena     U8              IOCUseOnly06;           /* 0x06 */
4892d1d418eSSumit Saxena     U8              MsgFlags;               /* 0x07 */
4902d1d418eSSumit Saxena     U16             IOCUseOnly08;           /* 0x08 */
4912d1d418eSSumit Saxena     U16             IOCStatus;              /* 0x0A */
4922d1d418eSSumit Saxena     U32             IOCLogInfo;             /* 0x0C */
4932d1d418eSSumit Saxena     U8              EventDataLength;        /* 0x10 */
4942d1d418eSSumit Saxena     U8              Event;                  /* 0x11 */
4952d1d418eSSumit Saxena     U16             IOCChangeCount;         /* 0x12 */
4962d1d418eSSumit Saxena     U32             EventContext;           /* 0x14 */
4972d1d418eSSumit Saxena     U32             EventData[1];           /* 0x18 */
4982d1d418eSSumit Saxena } MPI3_EVENT_NOTIFICATION_REPLY, MPI3_POINTER PTR_MPI3_EVENT_NOTIFICATION_REPLY,
4992d1d418eSSumit Saxena   Mpi3EventNotificationReply_t, MPI3_POINTER pMpi3EventNotificationReply_t;
5002d1d418eSSumit Saxena 
5012d1d418eSSumit Saxena /**** Defines for the MsgFlags field ****/
5022d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_MASK                        (0x01)
503*92f340d1SChandrakanth patil #define MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_SHIFT                       (0)
5042d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_REQUIRED                    (0x01)
5052d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_NOT_REQUIRED                (0x00)
5062d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_MSGFLAGS_EVENT_ORIGINALITY_MASK          (0x02)
507*92f340d1SChandrakanth patil #define MPI3_EVENT_NOTIFY_MSGFLAGS_EVENT_ORIGINALITY_SHIFT         (1)
5082d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_MSGFLAGS_EVENT_ORIGINALITY_ORIGINAL      (0x00)
5092d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_MSGFLAGS_EVENT_ORIGINALITY_REPLAY        (0x02)
5102d1d418eSSumit Saxena 
5112d1d418eSSumit Saxena /**** Defines for the Event field - use MPI3_EVENT_ values ****/
5122d1d418eSSumit Saxena 
5132d1d418eSSumit Saxena 
5142d1d418eSSumit Saxena /*****************************************************************************
5152d1d418eSSumit Saxena  *              GPIO Interrupt Event                                         *
5162d1d418eSSumit Saxena  ****************************************************************************/
5172d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_GPIO_INTERRUPT
5182d1d418eSSumit Saxena {
5192d1d418eSSumit Saxena     U8              GPIONum;            /* 0x00 */
5202d1d418eSSumit Saxena     U8              Reserved01[3];      /* 0x01 */
5212d1d418eSSumit Saxena } MPI3_EVENT_DATA_GPIO_INTERRUPT, MPI3_POINTER PTR_MPI3_EVENT_DATA_GPIO_INTERRUPT,
5222d1d418eSSumit Saxena   Mpi3EventDataGpioInterrupt_t, MPI3_POINTER pMpi3EventDataGpioInterrupt_t;
5232d1d418eSSumit Saxena 
5242d1d418eSSumit Saxena 
5252d1d418eSSumit Saxena /*****************************************************************************
5262d1d418eSSumit Saxena  *              Cable Management Event                                       *
5272d1d418eSSumit Saxena  ****************************************************************************/
5282d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_CABLE_MANAGEMENT
5292d1d418eSSumit Saxena {
5302d1d418eSSumit Saxena     U32             ActiveCablePowerRequirement;    /* 0x00 */
5312d1d418eSSumit Saxena     U8              Status;                         /* 0x04 */
5322d1d418eSSumit Saxena     U8              ReceptacleID;                   /* 0x05 */
5332d1d418eSSumit Saxena     U16             Reserved06;                     /* 0x06 */
5342d1d418eSSumit Saxena } MPI3_EVENT_DATA_CABLE_MANAGEMENT, MPI3_POINTER PTR_MPI3_EVENT_DATA_CABLE_MANAGEMENT,
5352d1d418eSSumit Saxena   Mpi3EventDataCableManagement_t, MPI3_POINTER pMpi3EventDataCableManagement_t;
5362d1d418eSSumit Saxena 
5372d1d418eSSumit Saxena /**** Defines for the ActiveCablePowerRequirement field ****/
5382d1d418eSSumit Saxena #define MPI3_EVENT_CABLE_MGMT_ACT_CABLE_PWR_INVALID     (0xFFFFFFFF)
5392d1d418eSSumit Saxena 
5402d1d418eSSumit Saxena /**** Defines for the Status field ****/
5412d1d418eSSumit Saxena #define MPI3_EVENT_CABLE_MGMT_STATUS_INSUFFICIENT_POWER        (0x00)
5422d1d418eSSumit Saxena #define MPI3_EVENT_CABLE_MGMT_STATUS_PRESENT                   (0x01)
5432d1d418eSSumit Saxena #define MPI3_EVENT_CABLE_MGMT_STATUS_DEGRADED                  (0x02)
5442d1d418eSSumit Saxena 
5452d1d418eSSumit Saxena 
5462d1d418eSSumit Saxena /*****************************************************************************
5472d1d418eSSumit Saxena  *              Event Ack Request Message                                    *
5482d1d418eSSumit Saxena  ****************************************************************************/
5492d1d418eSSumit Saxena typedef struct _MPI3_EVENT_ACK_REQUEST
5502d1d418eSSumit Saxena {
5512d1d418eSSumit Saxena     U16             HostTag;            /* 0x00 */
5522d1d418eSSumit Saxena     U8              IOCUseOnly02;       /* 0x02 */
5532d1d418eSSumit Saxena     U8              Function;           /* 0x03 */
5542d1d418eSSumit Saxena     U16             IOCUseOnly04;       /* 0x04 */
5552d1d418eSSumit Saxena     U8              IOCUseOnly06;       /* 0x06 */
5562d1d418eSSumit Saxena     U8              MsgFlags;           /* 0x07 */
5572d1d418eSSumit Saxena     U16             ChangeCount;        /* 0x08 */
5582d1d418eSSumit Saxena     U16             Reserved0A;         /* 0x0A */
5592d1d418eSSumit Saxena     U8              Event;              /* 0x0C */
5602d1d418eSSumit Saxena     U8              Reserved0D[3];      /* 0x0D */
5612d1d418eSSumit Saxena     U32             EventContext;       /* 0x10 */
5622d1d418eSSumit Saxena } MPI3_EVENT_ACK_REQUEST, MPI3_POINTER PTR_MPI3_EVENT_ACK_REQUEST,
5632d1d418eSSumit Saxena   Mpi3EventAckRequest_t, MPI3_POINTER pMpi3EventAckRequest_t;
5642d1d418eSSumit Saxena 
5652d1d418eSSumit Saxena /**** Defines for the Event field - use MPI3_EVENT_ values ****/
5662d1d418eSSumit Saxena 
5672d1d418eSSumit Saxena 
5682d1d418eSSumit Saxena /*****************************************************************************
5692d1d418eSSumit Saxena  *              Prepare for Reset Event                                      *
5702d1d418eSSumit Saxena  ****************************************************************************/
5712d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_PREPARE_FOR_RESET
5722d1d418eSSumit Saxena {
5732d1d418eSSumit Saxena     U8              ReasonCode;         /* 0x00 */
5742d1d418eSSumit Saxena     U8              Reserved01;         /* 0x01 */
5752d1d418eSSumit Saxena     U16             Reserved02;         /* 0x02 */
5762d1d418eSSumit Saxena } MPI3_EVENT_DATA_PREPARE_FOR_RESET, MPI3_POINTER PTR_MPI3_EVENT_DATA_PREPARE_FOR_RESET,
5772d1d418eSSumit Saxena   Mpi3EventDataPrepareForReset_t, MPI3_POINTER pMpi3EventDataPrepareForReset_t;
5782d1d418eSSumit Saxena 
5792d1d418eSSumit Saxena /**** Defines for the ReasonCode field ****/
5802d1d418eSSumit Saxena #define MPI3_EVENT_PREPARE_RESET_RC_START                (0x01)
5812d1d418eSSumit Saxena #define MPI3_EVENT_PREPARE_RESET_RC_ABORT                (0x02)
5822d1d418eSSumit Saxena 
5832d1d418eSSumit Saxena 
5842d1d418eSSumit Saxena /*****************************************************************************
5852d1d418eSSumit Saxena  *              Component Image Activation Start Event                       *
5862d1d418eSSumit Saxena  ****************************************************************************/
5872d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_COMP_IMAGE_ACTIVATION
5882d1d418eSSumit Saxena {
5892d1d418eSSumit Saxena     U32            Reserved00;         /* 0x00 */
5902d1d418eSSumit Saxena } MPI3_EVENT_DATA_COMP_IMAGE_ACTIVATION, MPI3_POINTER PTR_MPI3_EVENT_DATA_COMP_IMAGE_ACTIVATION,
5912d1d418eSSumit Saxena   Mpi3EventDataCompImageActivation_t, MPI3_POINTER pMpi3EventDataCompImageActivation_t;
5922d1d418eSSumit Saxena 
5932d1d418eSSumit Saxena /*****************************************************************************
5942d1d418eSSumit Saxena  *              Device Added Event                                           *
5952d1d418eSSumit Saxena  ****************************************************************************/
5962d1d418eSSumit Saxena /*
5972d1d418eSSumit Saxena  * The Device Added Event Data is exactly the same as Device Page 0 data
5982d1d418eSSumit Saxena  * (including the Configuration Page header). So, please use/refer to
5992d1d418eSSumit Saxena  * MPI3_DEVICE_PAGE0  structure for Device Added Event data.
6002d1d418eSSumit Saxena  */
6012d1d418eSSumit Saxena 
6022d1d418eSSumit Saxena /****************************************************************************
6032d1d418eSSumit Saxena  *              Device Info Changed Event                                   *
6042d1d418eSSumit Saxena  ****************************************************************************/
6052d1d418eSSumit Saxena /*
6062d1d418eSSumit Saxena  * The Device Info Changed Event Data is exactly the same as Device Page 0 data
6072d1d418eSSumit Saxena  * (including the Configuration Page header). So, please use/refer to
6082d1d418eSSumit Saxena  * MPI3_DEVICE_PAGE0  structure for Device Added Event data.
6092d1d418eSSumit Saxena  */
6102d1d418eSSumit Saxena 
6112d1d418eSSumit Saxena /*****************************************************************************
6122d1d418eSSumit Saxena  *              Device Status Change Event                                  *
6132d1d418eSSumit Saxena  ****************************************************************************/
6142d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_DEVICE_STATUS_CHANGE
6152d1d418eSSumit Saxena {
6162d1d418eSSumit Saxena     U16             TaskTag;            /* 0x00 */
6172d1d418eSSumit Saxena     U8              ReasonCode;         /* 0x02 */
6182d1d418eSSumit Saxena     U8              IOUnitPort;         /* 0x03 */
6192d1d418eSSumit Saxena     U16             ParentDevHandle;    /* 0x04 */
6202d1d418eSSumit Saxena     U16             DevHandle;          /* 0x06 */
6212d1d418eSSumit Saxena     U64             WWID;               /* 0x08 */
6222d1d418eSSumit Saxena     U8              LUN[8];             /* 0x10 */
6232d1d418eSSumit Saxena } MPI3_EVENT_DATA_DEVICE_STATUS_CHANGE, MPI3_POINTER PTR_MPI3_EVENT_DATA_DEVICE_STATUS_CHANGE,
6242d1d418eSSumit Saxena   Mpi3EventDataDeviceStatusChange_t, MPI3_POINTER pMpi3EventDataDeviceStatusChange_t;
6252d1d418eSSumit Saxena 
6262d1d418eSSumit Saxena /**** Defines for the ReasonCode field ****/
6272d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_MOVED                                (0x01)
6282d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_HIDDEN                               (0x02)
6292d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_NOT_HIDDEN                           (0x03)
6302d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_ASYNC_NOTIFICATION                   (0x04)
6312d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_INT_DEVICE_RESET_STRT                (0x20)
6322d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_INT_DEVICE_RESET_CMP                 (0x21)
6332d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_INT_TASK_ABORT_STRT                  (0x22)
6342d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_INT_TASK_ABORT_CMP                   (0x23)
6352d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_INT_IT_NEXUS_RESET_STRT              (0x24)
6362d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_INT_IT_NEXUS_RESET_CMP               (0x25)
6372d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_PCIE_HOT_RESET_FAILED                (0x30)
6382d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_EXPANDER_REDUCED_FUNC_STRT           (0x40)
6392d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_EXPANDER_REDUCED_FUNC_CMP            (0x41)
6402d1d418eSSumit Saxena #define MPI3_EVENT_DEV_STAT_RC_VD_NOT_RESPONDING                    (0x50)
6412d1d418eSSumit Saxena 
6422d1d418eSSumit Saxena /*****************************************************************************
6432d1d418eSSumit Saxena  *              Energy Pack Change Event                                    *
6442d1d418eSSumit Saxena  ****************************************************************************/
6452d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_ENERGY_PACK_CHANGE
6462d1d418eSSumit Saxena {
6472d1d418eSSumit Saxena     U32             Reserved00;         /* 0x00 */
6482d1d418eSSumit Saxena     U16             ShutdownTimeout;    /* 0x04 */
6492d1d418eSSumit Saxena     U16             Reserved06;         /* 0x06 */
6502d1d418eSSumit Saxena } MPI3_EVENT_DATA_ENERGY_PACK_CHANGE, MPI3_POINTER PTR_MPI3_EVENT_DATA_ENERGY_PACK_CHANGE,
6512d1d418eSSumit Saxena   Mpi3EventDataEnergyPackChange_t, MPI3_POINTER pMpi3EventDataEnergyPackChange_t;
6522d1d418eSSumit Saxena 
6532d1d418eSSumit Saxena /*****************************************************************************
6542d1d418eSSumit Saxena  *              SAS Discovery Event                                          *
6552d1d418eSSumit Saxena  ****************************************************************************/
6562d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_SAS_DISCOVERY
6572d1d418eSSumit Saxena {
6582d1d418eSSumit Saxena     U8              Flags;              /* 0x00 */
6592d1d418eSSumit Saxena     U8              ReasonCode;         /* 0x01 */
6602d1d418eSSumit Saxena     U8              IOUnitPort;         /* 0x02 */
6612d1d418eSSumit Saxena     U8              Reserved03;         /* 0x03 */
6622d1d418eSSumit Saxena     U32             DiscoveryStatus;    /* 0x04 */
6632d1d418eSSumit Saxena } MPI3_EVENT_DATA_SAS_DISCOVERY, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_DISCOVERY,
6642d1d418eSSumit Saxena   Mpi3EventDataSasDiscovery_t, MPI3_POINTER pMpi3EventDataSasDiscovery_t;
6652d1d418eSSumit Saxena 
6662d1d418eSSumit Saxena /**** Defines for the Flags field ****/
6672d1d418eSSumit Saxena #define MPI3_EVENT_SAS_DISC_FLAGS_DEVICE_CHANGE                 (0x02)
6682d1d418eSSumit Saxena #define MPI3_EVENT_SAS_DISC_FLAGS_IN_PROGRESS                   (0x01)
6692d1d418eSSumit Saxena 
6702d1d418eSSumit Saxena /**** Defines for the ReasonCode field ****/
6712d1d418eSSumit Saxena #define MPI3_EVENT_SAS_DISC_RC_STARTED                          (0x01)
6722d1d418eSSumit Saxena #define MPI3_EVENT_SAS_DISC_RC_COMPLETED                        (0x02)
6732d1d418eSSumit Saxena 
6742d1d418eSSumit Saxena /**** Defines for the DiscoveryStatus field ****/
6752d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_MAX_ENCLOSURES_EXCEED            (0x80000000)
6762d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_MAX_EXPANDERS_EXCEED             (0x40000000)
6772d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_MAX_DEVICES_EXCEED               (0x20000000)
6782d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_MAX_TOPO_PHYS_EXCEED             (0x10000000)
6792d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_INVALID_CEI                      (0x00010000)
6802d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_FECEI_MISMATCH                   (0x00008000)
6812d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_MULTIPLE_DEVICES_IN_SLOT         (0x00004000)
6822d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_NECEI_MISMATCH                   (0x00002000)
6832d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_TOO_MANY_SLOTS                   (0x00001000)
6842d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_EXP_MULTI_SUBTRACTIVE            (0x00000800)
6852d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_MULTI_PORT_DOMAIN                (0x00000400)
6862d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_TABLE_TO_SUBTRACTIVE_LINK        (0x00000200)
6872d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_UNSUPPORTED_DEVICE               (0x00000100)
6882d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_TABLE_LINK                       (0x00000080)
6892d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_SUBTRACTIVE_LINK                 (0x00000040)
6902d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_SMP_CRC_ERROR                    (0x00000020)
6912d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_SMP_FUNCTION_FAILED              (0x00000010)
6922d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_SMP_TIMEOUT                      (0x00000008)
6932d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_MULTIPLE_PORTS                   (0x00000004)
6942d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_INVALID_SAS_ADDRESS              (0x00000002)
6952d1d418eSSumit Saxena #define MPI3_SAS_DISC_STATUS_LOOP_DETECTED                    (0x00000001)
6962d1d418eSSumit Saxena 
6972d1d418eSSumit Saxena 
6982d1d418eSSumit Saxena /*****************************************************************************
6992d1d418eSSumit Saxena  *              SAS Broadcast Primitive Event                                *
7002d1d418eSSumit Saxena  ****************************************************************************/
7012d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_SAS_BROADCAST_PRIMITIVE
7022d1d418eSSumit Saxena {
7032d1d418eSSumit Saxena     U8              PhyNum;         /* 0x00 */
7042d1d418eSSumit Saxena     U8              IOUnitPort;     /* 0x01 */
7052d1d418eSSumit Saxena     U8              PortWidth;      /* 0x02 */
7062d1d418eSSumit Saxena     U8              Primitive;      /* 0x03 */
7072d1d418eSSumit Saxena } MPI3_EVENT_DATA_SAS_BROADCAST_PRIMITIVE, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
7082d1d418eSSumit Saxena   Mpi3EventDataSasBroadcastPrimitive_t, MPI3_POINTER pMpi3EventDataSasBroadcastPrimitive_t;
7092d1d418eSSumit Saxena 
7102d1d418eSSumit Saxena /**** Defines for the Primitive field ****/
7112d1d418eSSumit Saxena #define MPI3_EVENT_BROADCAST_PRIMITIVE_CHANGE                 (0x01)
7122d1d418eSSumit Saxena #define MPI3_EVENT_BROADCAST_PRIMITIVE_SES                    (0x02)
7132d1d418eSSumit Saxena #define MPI3_EVENT_BROADCAST_PRIMITIVE_EXPANDER               (0x03)
7142d1d418eSSumit Saxena #define MPI3_EVENT_BROADCAST_PRIMITIVE_ASYNCHRONOUS_EVENT     (0x04)
7152d1d418eSSumit Saxena #define MPI3_EVENT_BROADCAST_PRIMITIVE_RESERVED3              (0x05)
7162d1d418eSSumit Saxena #define MPI3_EVENT_BROADCAST_PRIMITIVE_RESERVED4              (0x06)
7172d1d418eSSumit Saxena #define MPI3_EVENT_BROADCAST_PRIMITIVE_CHANGE0_RESERVED       (0x07)
7182d1d418eSSumit Saxena #define MPI3_EVENT_BROADCAST_PRIMITIVE_CHANGE1_RESERVED       (0x08)
7192d1d418eSSumit Saxena 
7202d1d418eSSumit Saxena 
7212d1d418eSSumit Saxena /*****************************************************************************
7222d1d418eSSumit Saxena  *              SAS Notify Primitive Event                                   *
7232d1d418eSSumit Saxena  ****************************************************************************/
7242d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_SAS_NOTIFY_PRIMITIVE
7252d1d418eSSumit Saxena {
7262d1d418eSSumit Saxena     U8              PhyNum;         /* 0x00 */
7272d1d418eSSumit Saxena     U8              IOUnitPort;     /* 0x01 */
7282d1d418eSSumit Saxena     U8              Reserved02;     /* 0x02 */
7292d1d418eSSumit Saxena     U8              Primitive;      /* 0x03 */
7302d1d418eSSumit Saxena } MPI3_EVENT_DATA_SAS_NOTIFY_PRIMITIVE, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_NOTIFY_PRIMITIVE,
7312d1d418eSSumit Saxena   Mpi3EventDataSasNotifyPrimitive_t, MPI3_POINTER pMpi3EventDataSasNotifyPrimitive_t;
7322d1d418eSSumit Saxena 
7332d1d418eSSumit Saxena /**** Defines for the Primitive field ****/
7342d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_PRIMITIVE_ENABLE_SPINUP         (0x01)
7352d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_PRIMITIVE_POWER_LOSS_EXPECTED   (0x02)
7362d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_PRIMITIVE_RESERVED1             (0x03)
7372d1d418eSSumit Saxena #define MPI3_EVENT_NOTIFY_PRIMITIVE_RESERVED2             (0x04)
7382d1d418eSSumit Saxena 
7392d1d418eSSumit Saxena 
7402d1d418eSSumit Saxena /*****************************************************************************
7412d1d418eSSumit Saxena  *              SAS Topology Change List Event                               *
7422d1d418eSSumit Saxena  ****************************************************************************/
7432d1d418eSSumit Saxena #ifndef MPI3_EVENT_SAS_TOPO_PHY_COUNT
7442d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_COUNT           (1)
7452d1d418eSSumit Saxena #endif  /* MPI3_EVENT_SAS_TOPO_PHY_COUNT */
7462d1d418eSSumit Saxena 
7472d1d418eSSumit Saxena typedef struct _MPI3_EVENT_SAS_TOPO_PHY_ENTRY
7482d1d418eSSumit Saxena {
7492d1d418eSSumit Saxena     U16             AttachedDevHandle;      /* 0x00 */
7502d1d418eSSumit Saxena     U8              LinkRate;               /* 0x02 */
751baabb919SChandrakanth patil     U8              PhyStatus;              /* 0x03 */
7522d1d418eSSumit Saxena } MPI3_EVENT_SAS_TOPO_PHY_ENTRY, MPI3_POINTER PTR_MPI3_EVENT_SAS_TOPO_PHY_ENTRY,
7532d1d418eSSumit Saxena   Mpi3EventSasTopoPhyEntry_t, MPI3_POINTER pMpi3EventSasTopoPhyEntry_t;
7542d1d418eSSumit Saxena 
7552d1d418eSSumit Saxena /**** Defines for the LinkRate field ****/
7562d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_CURRENT_MASK                 (0xF0)
7572d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_CURRENT_SHIFT                (4)
7582d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_PREV_MASK                    (0x0F)
7592d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_PREV_SHIFT                   (0)
7602d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_UNKNOWN_LINK_RATE            (0x00)
7612d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_PHY_DISABLED                 (0x01)
7622d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED           (0x02)
7632d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE            (0x03)
7642d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_PORT_SELECTOR                (0x04)
7652d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS        (0x05)
7662d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY              (0x06)
7672d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_RATE_6_0                     (0x0A)
7682d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_RATE_12_0                    (0x0B)
7692d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_LR_RATE_22_5                    (0x0C)
7702d1d418eSSumit Saxena 
7712d1d418eSSumit Saxena /**** Defines for the PhyStatus field ****/
7722d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_MASK                 (0xC0)
7732d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_SHIFT                (6)
7742d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_ACCESSIBLE           (0x00)
7752d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_NO_EXIST             (0x40)
7762d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_VACANT               (0x80)
7772d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_RC_MASK                     (0x0F)
778*92f340d1SChandrakanth patil #define MPI3_EVENT_SAS_TOPO_PHY_RC_SHIFT                    (0)
7792d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_RC_TARG_NOT_RESPONDING      (0x02)
7802d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_RC_PHY_CHANGED              (0x03)
7812d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_RC_NO_CHANGE                (0x04)
7822d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_RC_DELAY_NOT_RESPONDING     (0x05)
7832d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_PHY_RC_RESPONDING               (0x06)
7842d1d418eSSumit Saxena 
7852d1d418eSSumit Saxena 
7862d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST
7872d1d418eSSumit Saxena {
7882d1d418eSSumit Saxena     U16                             EnclosureHandle;                            /* 0x00 */
7892d1d418eSSumit Saxena     U16                             ExpanderDevHandle;                          /* 0x02 */
7902d1d418eSSumit Saxena     U8                              NumPhys;                                    /* 0x04 */
7912d1d418eSSumit Saxena     U8                              Reserved05[3];                              /* 0x05 */
7922d1d418eSSumit Saxena     U8                              NumEntries;                                 /* 0x08 */
7932d1d418eSSumit Saxena     U8                              StartPhyNum;                                /* 0x09 */
7942d1d418eSSumit Saxena     U8                              ExpStatus;                                  /* 0x0A */
7952d1d418eSSumit Saxena     U8                              IOUnitPort;                                 /* 0x0B */
7962d1d418eSSumit Saxena     MPI3_EVENT_SAS_TOPO_PHY_ENTRY   PhyEntry[MPI3_EVENT_SAS_TOPO_PHY_COUNT];    /* 0x0C */
7972d1d418eSSumit Saxena } MPI3_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST,
7982d1d418eSSumit Saxena   Mpi3EventDataSasTopologyChangeList_t, MPI3_POINTER pMpi3EventDataSasTopologyChangeList_t;
7992d1d418eSSumit Saxena 
8002d1d418eSSumit Saxena /**** Defines for the ExpStatus field ****/
8012d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_ES_NO_EXPANDER              (0x00)
8022d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_ES_NOT_RESPONDING           (0x02)
8032d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_ES_RESPONDING               (0x03)
8042d1d418eSSumit Saxena #define MPI3_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING     (0x04)
8052d1d418eSSumit Saxena 
8062d1d418eSSumit Saxena /*****************************************************************************
8072d1d418eSSumit Saxena  *              SAS PHY Counter Event                                        *
8082d1d418eSSumit Saxena  ****************************************************************************/
8092d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_SAS_PHY_COUNTER
8102d1d418eSSumit Saxena {
8112d1d418eSSumit Saxena     U64             TimeStamp;              /* 0x00 */
8122d1d418eSSumit Saxena     U32             Reserved08;             /* 0x08 */
8132d1d418eSSumit Saxena     U8              PhyEventCode;           /* 0x0C */
8142d1d418eSSumit Saxena     U8              PhyNum;                 /* 0x0D */
8152d1d418eSSumit Saxena     U16             Reserved0E;             /* 0x0E */
8162d1d418eSSumit Saxena     U32             PhyEventInfo;           /* 0x10 */
8172d1d418eSSumit Saxena     U8              CounterType;            /* 0x14 */
8182d1d418eSSumit Saxena     U8              ThresholdWindow;        /* 0x15 */
8192d1d418eSSumit Saxena     U8              TimeUnits;              /* 0x16 */
8202d1d418eSSumit Saxena     U8              Reserved17;             /* 0x17 */
8212d1d418eSSumit Saxena     U32             EventThreshold;         /* 0x18 */
8222d1d418eSSumit Saxena     U16             ThresholdFlags;         /* 0x1C */
8232d1d418eSSumit Saxena     U16             Reserved1E;             /* 0x1E */
8242d1d418eSSumit Saxena } MPI3_EVENT_DATA_SAS_PHY_COUNTER, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_PHY_COUNTER,
8252d1d418eSSumit Saxena   Mpi3EventDataSasPhyCounter_t, MPI3_POINTER pMpi3EventDataSasPhyCounter_t;
8262d1d418eSSumit Saxena 
8272d1d418eSSumit Saxena /**** Defines for the PhyEventCode field - use MPI3_SASPHY3_EVENT_CODE_ defines ****/
8282d1d418eSSumit Saxena 
8292d1d418eSSumit Saxena /**** Defines for the CounterType field - use MPI3_SASPHY3_COUNTER_TYPE_ defines ****/
8302d1d418eSSumit Saxena 
8312d1d418eSSumit Saxena /**** Defines for the TimeUnits field - use MPI3_SASPHY3_TIME_UNITS_ defines ****/
8322d1d418eSSumit Saxena 
8332d1d418eSSumit Saxena /**** Defines for the ThresholdFlags field - use MPI3_SASPHY3_TFLAGS_ defines ****/
8342d1d418eSSumit Saxena 
8352d1d418eSSumit Saxena 
8362d1d418eSSumit Saxena /*****************************************************************************
8372d1d418eSSumit Saxena  *              SAS Device Discovery Error Event                             *
8382d1d418eSSumit Saxena  ****************************************************************************/
8392d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_SAS_DEVICE_DISC_ERR
8402d1d418eSSumit Saxena {
8412d1d418eSSumit Saxena     U16             DevHandle;              /* 0x00 */
8422d1d418eSSumit Saxena     U8              ReasonCode;             /* 0x02 */
8432d1d418eSSumit Saxena     U8              IOUnitPort;             /* 0x03 */
8442d1d418eSSumit Saxena     U32             Reserved04;             /* 0x04 */
8452d1d418eSSumit Saxena     U64             SASAddress;             /* 0x08 */
8462d1d418eSSumit Saxena } MPI3_EVENT_DATA_SAS_DEVICE_DISC_ERR, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_DEVICE_DISC_ERR,
8472d1d418eSSumit Saxena   Mpi3EventDataSasDeviceDiscErr_t, MPI3_POINTER pMpi3EventDataSasDeviceDiscErr_t;
8482d1d418eSSumit Saxena 
8492d1d418eSSumit Saxena /**** Defines for the ReasonCode field ****/
8502d1d418eSSumit Saxena #define MPI3_EVENT_SAS_DISC_ERR_RC_SMP_FAILED          (0x01)
8512d1d418eSSumit Saxena #define MPI3_EVENT_SAS_DISC_ERR_RC_SMP_TIMEOUT         (0x02)
8522d1d418eSSumit Saxena 
8532d1d418eSSumit Saxena /*****************************************************************************
8542d1d418eSSumit Saxena  *              PCIe Enumeration Event                                       *
8552d1d418eSSumit Saxena  ****************************************************************************/
8562d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_PCIE_ENUMERATION
8572d1d418eSSumit Saxena {
8582d1d418eSSumit Saxena     U8              Flags;                  /* 0x00 */
8592d1d418eSSumit Saxena     U8              ReasonCode;             /* 0x01 */
8602d1d418eSSumit Saxena     U8              IOUnitPort;             /* 0x02 */
8612d1d418eSSumit Saxena     U8              Reserved03;             /* 0x03 */
8622d1d418eSSumit Saxena     U32             EnumerationStatus;      /* 0x04 */
8632d1d418eSSumit Saxena } MPI3_EVENT_DATA_PCIE_ENUMERATION, MPI3_POINTER PTR_MPI3_EVENT_DATA_PCIE_ENUMERATION,
8642d1d418eSSumit Saxena   Mpi3EventDataPcieEnumeration_t, MPI3_POINTER pMpi3EventDataPcieEnumeration_t;
8652d1d418eSSumit Saxena 
8662d1d418eSSumit Saxena /**** Defines for the Flags field ****/
8672d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_ENUM_FLAGS_DEVICE_CHANGE            (0x02)
8682d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_ENUM_FLAGS_IN_PROGRESS              (0x01)
8692d1d418eSSumit Saxena 
8702d1d418eSSumit Saxena /**** Defines for the ReasonCode field ****/
8712d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_ENUM_RC_STARTED                     (0x01)
8722d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_ENUM_RC_COMPLETED                   (0x02)
8732d1d418eSSumit Saxena 
8742d1d418eSSumit Saxena /**** Defines for the EnumerationStatus field ****/
8752d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_ENUM_ES_MAX_SWITCH_DEPTH_EXCEED     (0x80000000)
8762d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_ENUM_ES_MAX_SWITCHES_EXCEED         (0x40000000)
8772d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_ENUM_ES_MAX_DEVICES_EXCEED          (0x20000000)
8782d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_ENUM_ES_RESOURCES_EXHAUSTED         (0x10000000)
8792d1d418eSSumit Saxena 
8802d1d418eSSumit Saxena 
8812d1d418eSSumit Saxena /*****************************************************************************
8822d1d418eSSumit Saxena  *              PCIe Topology Change List Event                              *
8832d1d418eSSumit Saxena  ****************************************************************************/
8842d1d418eSSumit Saxena #ifndef MPI3_EVENT_PCIE_TOPO_PORT_COUNT
8852d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PORT_COUNT         (1)
8862d1d418eSSumit Saxena #endif  /* MPI3_EVENT_PCIE_TOPO_PORT_COUNT */
8872d1d418eSSumit Saxena 
8882d1d418eSSumit Saxena typedef struct _MPI3_EVENT_PCIE_TOPO_PORT_ENTRY
8892d1d418eSSumit Saxena {
8902d1d418eSSumit Saxena     U16             AttachedDevHandle;      /* 0x00 */
8912d1d418eSSumit Saxena     U8              PortStatus;             /* 0x02 */
8922d1d418eSSumit Saxena     U8              Reserved03;             /* 0x03 */
8932d1d418eSSumit Saxena     U8              CurrentPortInfo;        /* 0x04 */
8942d1d418eSSumit Saxena     U8              Reserved05;             /* 0x05 */
8952d1d418eSSumit Saxena     U8              PreviousPortInfo;       /* 0x06 */
8962d1d418eSSumit Saxena     U8              Reserved07;             /* 0x07 */
8972d1d418eSSumit Saxena } MPI3_EVENT_PCIE_TOPO_PORT_ENTRY, MPI3_POINTER PTR_MPI3_EVENT_PCIE_TOPO_PORT_ENTRY,
8982d1d418eSSumit Saxena   Mpi3EventPcieTopoPortEntry_t, MPI3_POINTER pMpi3EventPcieTopoPortEntry_t;
8992d1d418eSSumit Saxena 
9002d1d418eSSumit Saxena /**** Defines for the PortStatus field ****/
9012d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PS_NOT_RESPONDING          (0x02)
9022d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PS_PORT_CHANGED            (0x03)
9032d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PS_NO_CHANGE               (0x04)
9042d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PS_DELAY_NOT_RESPONDING    (0x05)
9052d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PS_RESPONDING              (0x06)
9062d1d418eSSumit Saxena 
9072d1d418eSSumit Saxena /**** Defines for the CurrentPortInfo and PreviousPortInfo field ****/
9082d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_LANES_MASK              (0xF0)
909*92f340d1SChandrakanth patil #define MPI3_EVENT_PCIE_TOPO_PI_LANES_SHIFT             (4)
9102d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_LANES_UNKNOWN           (0x00)
9112d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_LANES_1                 (0x10)
9122d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_LANES_2                 (0x20)
9132d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_LANES_4                 (0x30)
9142d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_LANES_8                 (0x40)
9152d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_LANES_16                (0x50)
9162d1d418eSSumit Saxena 
9172d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_RATE_MASK               (0x0F)
918*92f340d1SChandrakanth patil #define MPI3_EVENT_PCIE_TOPO_PI_RATE_SHIFT              (0)
9192d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_RATE_UNKNOWN            (0x00)
9202d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_RATE_DISABLED           (0x01)
9212d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_RATE_2_5                (0x02)
9222d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_RATE_5_0                (0x03)
9232d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_RATE_8_0                (0x04)
9242d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_RATE_16_0               (0x05)
9252d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_PI_RATE_32_0               (0x06)
9262d1d418eSSumit Saxena 
9272d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST
9282d1d418eSSumit Saxena {
9292d1d418eSSumit Saxena     U16                                 EnclosureHandle;                                /* 0x00 */
9302d1d418eSSumit Saxena     U16                                 SwitchDevHandle;                                /* 0x02 */
9312d1d418eSSumit Saxena     U8                                  NumPorts;                                       /* 0x04 */
9322d1d418eSSumit Saxena     U8                                  Reserved05[3];                                  /* 0x05 */
9332d1d418eSSumit Saxena     U8                                  NumEntries;                                     /* 0x08 */
9342d1d418eSSumit Saxena     U8                                  StartPortNum;                                   /* 0x09 */
9352d1d418eSSumit Saxena     U8                                  SwitchStatus;                                   /* 0x0A */
9362d1d418eSSumit Saxena     U8                                  IOUnitPort;                                     /* 0x0B */
9372d1d418eSSumit Saxena     U32                                 Reserved0C;                                     /* 0x0C */
9382d1d418eSSumit Saxena     MPI3_EVENT_PCIE_TOPO_PORT_ENTRY     PortEntry[MPI3_EVENT_PCIE_TOPO_PORT_COUNT];     /* 0x10 */
9392d1d418eSSumit Saxena } MPI3_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST, MPI3_POINTER PTR_MPI3_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST,
9402d1d418eSSumit Saxena   Mpi3EventDataPcieTopologyChangeList_t, MPI3_POINTER pMpi3EventDataPcieTopologyChangeList_t;
9412d1d418eSSumit Saxena 
9422d1d418eSSumit Saxena /**** Defines for the SwitchStatus field ****/
9432d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_SS_NO_PCIE_SWITCH          (0x00)
9442d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_SS_NOT_RESPONDING          (0x02)
9452d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_SS_RESPONDING              (0x03)
9462d1d418eSSumit Saxena #define MPI3_EVENT_PCIE_TOPO_SS_DELAY_NOT_RESPONDING    (0x04)
9472d1d418eSSumit Saxena 
9482d1d418eSSumit Saxena /*****************************************************************************
9492d1d418eSSumit Saxena  *              PCIe Error Threshold Event                                  *
9502d1d418eSSumit Saxena  ****************************************************************************/
9512d1d418eSSumit Saxena 
9522d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_PCIE_ERROR_THRESHOLD
9532d1d418eSSumit Saxena {
9542d1d418eSSumit Saxena     U64                                 Timestamp;          /* 0x00 */
9552d1d418eSSumit Saxena     U8                                  ReasonCode;         /* 0x08 */
9562d1d418eSSumit Saxena     U8                                  Port;               /* 0x09 */
9572d1d418eSSumit Saxena     U16                                 SwitchDevHandle;    /* 0x0A */
9582d1d418eSSumit Saxena     U8                                  Error;              /* 0x0C */
9592d1d418eSSumit Saxena     U8                                  Action;             /* 0x0D */
9602d1d418eSSumit Saxena     U16                                 ThresholdCount;     /* 0x0E */
9612d1d418eSSumit Saxena     U16                                 AttachedDevHandle;  /* 0x10 */
9622d1d418eSSumit Saxena     U16                                 Reserved12;         /* 0x12 */
9632d1d418eSSumit Saxena     U32                                 Reserved14;         /* 0x14 */
9642d1d418eSSumit Saxena } MPI3_EVENT_DATA_PCIE_ERROR_THRESHOLD, MPI3_POINTER PTR_MPI3_EVENT_DATA_PCIE_ERROR_THRESHOLD,
9652d1d418eSSumit Saxena   Mpi3EventDataPcieErrorThreshold_t, MPI3_POINTER pMpi3EventDataPcieErrorThreshold_t;
9662d1d418eSSumit Saxena 
9672d1d418eSSumit Saxena 
9682d1d418eSSumit Saxena /**** Defines for the ReasonCode field ****/
9692d1d418eSSumit Saxena #define MPI3_EVENT_PCI_ERROR_RC_THRESHOLD_EXCEEDED          (0x00)
9702d1d418eSSumit Saxena #define MPI3_EVENT_PCI_ERROR_RC_ESCALATION                  (0x01)
9712d1d418eSSumit Saxena 
9722d1d418eSSumit Saxena /**** Defines for the Error field - use MPI3_PCIEIOUNIT3_ERROR_ values ****/
9732d1d418eSSumit Saxena 
9742d1d418eSSumit Saxena /**** Defines for the Action field - use MPI3_PCIEIOUNIT3_ACTION_ values ****/
9752d1d418eSSumit Saxena 
9762d1d418eSSumit Saxena /****************************************************************************
9772d1d418eSSumit Saxena  *              Enclosure Device Added Event                                *
9782d1d418eSSumit Saxena  ****************************************************************************/
9792d1d418eSSumit Saxena /*
9802d1d418eSSumit Saxena  * The Enclosure Device Added Event Data is exactly the same as Enclosure
9812d1d418eSSumit Saxena  *  Page 0 data (including the Configuration Page header). So, please
9822d1d418eSSumit Saxena  *  use/refer to MPI3_ENCLOSURE_PAGE0  structure for Enclosure Device Added
9832d1d418eSSumit Saxena  *  Event data.
9842d1d418eSSumit Saxena  */
9852d1d418eSSumit Saxena 
9862d1d418eSSumit Saxena /****************************************************************************
9872d1d418eSSumit Saxena  *              Enclosure Device Changed Event                              *
9882d1d418eSSumit Saxena  ****************************************************************************/
9892d1d418eSSumit Saxena /*
9902d1d418eSSumit Saxena  * The Enclosure Device Change Event Data is exactly the same as Enclosure
9912d1d418eSSumit Saxena  *  Page 0 data (including the Configuration Page header). So, please
9922d1d418eSSumit Saxena  *  use/refer to MPI3_ENCLOSURE_PAGE0  structure for Enclosure Device Change
9932d1d418eSSumit Saxena  *  Event data.
9942d1d418eSSumit Saxena  */
9952d1d418eSSumit Saxena 
9962d1d418eSSumit Saxena /*****************************************************************************
9972d1d418eSSumit Saxena  *              SAS Initiator Device Status Change Event                     *
9982d1d418eSSumit Saxena  ****************************************************************************/
9992d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE
10002d1d418eSSumit Saxena {
10012d1d418eSSumit Saxena     U8              ReasonCode;             /* 0x00 */
10022d1d418eSSumit Saxena     U8              IOUnitPort;             /* 0x01 */
10032d1d418eSSumit Saxena     U16             DevHandle;              /* 0x02 */
10042d1d418eSSumit Saxena     U32             Reserved04;             /* 0x04 */
10052d1d418eSSumit Saxena     U64             SASAddress;             /* 0x08 */
10062d1d418eSSumit Saxena } MPI3_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
10072d1d418eSSumit Saxena   Mpi3EventDataSasInitDevStatusChange_t, MPI3_POINTER pMpi3EventDataSasInitDevStatusChange_t;
10082d1d418eSSumit Saxena 
10092d1d418eSSumit Saxena /**** Defines for the ReasonCode field ****/
10102d1d418eSSumit Saxena #define MPI3_EVENT_SAS_INIT_RC_ADDED                (0x01)
10112d1d418eSSumit Saxena #define MPI3_EVENT_SAS_INIT_RC_NOT_RESPONDING       (0x02)
10122d1d418eSSumit Saxena 
10132d1d418eSSumit Saxena 
10142d1d418eSSumit Saxena /*****************************************************************************
10152d1d418eSSumit Saxena  *              SAS Initiator Device Table Overflow Event                    *
10162d1d418eSSumit Saxena  ****************************************************************************/
10172d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW
10182d1d418eSSumit Saxena {
10192d1d418eSSumit Saxena     U16             MaxInit;                /* 0x00 */
10202d1d418eSSumit Saxena     U16             CurrentInit;            /* 0x02 */
10212d1d418eSSumit Saxena     U32             Reserved04;             /* 0x04 */
10222d1d418eSSumit Saxena     U64             SASAddress;             /* 0x08 */
10232d1d418eSSumit Saxena } MPI3_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
10242d1d418eSSumit Saxena   Mpi3EventDataSasInitTableOverflow_t, MPI3_POINTER pMpi3EventDataSasInitTableOverflow_t;
10252d1d418eSSumit Saxena 
10262d1d418eSSumit Saxena 
10272d1d418eSSumit Saxena /*****************************************************************************
10282d1d418eSSumit Saxena  *              Hard Reset Received Event                                    *
10292d1d418eSSumit Saxena  ****************************************************************************/
10302d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_HARD_RESET_RECEIVED
10312d1d418eSSumit Saxena {
10322d1d418eSSumit Saxena     U8              Reserved00;             /* 0x00 */
10332d1d418eSSumit Saxena     U8              IOUnitPort;             /* 0x01 */
10342d1d418eSSumit Saxena     U16             Reserved02;             /* 0x02 */
10352d1d418eSSumit Saxena } MPI3_EVENT_DATA_HARD_RESET_RECEIVED, MPI3_POINTER PTR_MPI3_EVENT_DATA_HARD_RESET_RECEIVED,
10362d1d418eSSumit Saxena   Mpi3EventDataHardResetReceived_t, MPI3_POINTER pMpi3EventDataHardResetReceived_t;
10372d1d418eSSumit Saxena 
10382d1d418eSSumit Saxena 
10392d1d418eSSumit Saxena /*****************************************************************************
10402d1d418eSSumit Saxena  *               Diagnostic Tool Events                                      *
10412d1d418eSSumit Saxena  *****************************************************************************/
10422d1d418eSSumit Saxena 
10432d1d418eSSumit Saxena /*****************************************************************************
10442d1d418eSSumit Saxena  *               Diagnostic Buffer Status Change Event                       *
10452d1d418eSSumit Saxena  *****************************************************************************/
10462d1d418eSSumit Saxena typedef struct _MPI3_EVENT_DATA_DIAG_BUFFER_STATUS_CHANGE
10472d1d418eSSumit Saxena {
10482d1d418eSSumit Saxena     U8              Type;                   /* 0x00 */
10492d1d418eSSumit Saxena     U8              ReasonCode;             /* 0x01 */
10502d1d418eSSumit Saxena     U16             Reserved02;             /* 0x02 */
10512d1d418eSSumit Saxena     U32             Reserved04;             /* 0x04 */
10522d1d418eSSumit Saxena } MPI3_EVENT_DATA_DIAG_BUFFER_STATUS_CHANGE, MPI3_POINTER PTR_MPI3_EVENT_DATA_DIAG_BUFFER_STATUS_CHANGE,
10532d1d418eSSumit Saxena   Mpi3EventDataDiagBufferStatusChange_t, MPI3_POINTER pMpi3EventDataDiagBufferStatusChange_t;
10542d1d418eSSumit Saxena 
10552d1d418eSSumit Saxena /**** Defines for the Type field - use MPI3_DIAG_BUFFER_TYPE_ values ****/
10562d1d418eSSumit Saxena 
10572d1d418eSSumit Saxena /**** Defines for the ReasonCode field ****/
10582d1d418eSSumit Saxena #define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_RELEASED             (0x01)
10592d1d418eSSumit Saxena #define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_PAUSED               (0x02)
10602d1d418eSSumit Saxena #define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_RESUMED              (0x03)
10612d1d418eSSumit Saxena 
10622d1d418eSSumit Saxena /*****************************************************************************
10632d1d418eSSumit Saxena  *              Persistent Event Logs                                       *
10642d1d418eSSumit Saxena  ****************************************************************************/
10652d1d418eSSumit Saxena 
10662d1d418eSSumit Saxena /**** Definitions for the Locale field ****/
10672d1d418eSSumit Saxena #define MPI3_PEL_LOCALE_FLAGS_NON_BLOCKING_BOOT_EVENT   (0x0200)
10682d1d418eSSumit Saxena #define MPI3_PEL_LOCALE_FLAGS_BLOCKING_BOOT_EVENT       (0x0100)
10692d1d418eSSumit Saxena #define MPI3_PEL_LOCALE_FLAGS_PCIE                      (0x0080)
10702d1d418eSSumit Saxena #define MPI3_PEL_LOCALE_FLAGS_CONFIGURATION             (0x0040)
10712d1d418eSSumit Saxena #define MPI3_PEL_LOCALE_FLAGS_CONTROLER                 (0x0020)
10722d1d418eSSumit Saxena #define MPI3_PEL_LOCALE_FLAGS_SAS                       (0x0010)
10732d1d418eSSumit Saxena #define MPI3_PEL_LOCALE_FLAGS_EPACK                     (0x0008)
10742d1d418eSSumit Saxena #define MPI3_PEL_LOCALE_FLAGS_ENCLOSURE                 (0x0004)
10752d1d418eSSumit Saxena #define MPI3_PEL_LOCALE_FLAGS_PD                        (0x0002)
10762d1d418eSSumit Saxena #define MPI3_PEL_LOCALE_FLAGS_VD                        (0x0001)
10772d1d418eSSumit Saxena 
10782d1d418eSSumit Saxena /**** Definitions for the Class field ****/
10792d1d418eSSumit Saxena #define MPI3_PEL_CLASS_DEBUG                            (0x00)
10802d1d418eSSumit Saxena #define MPI3_PEL_CLASS_PROGRESS                         (0x01)
10812d1d418eSSumit Saxena #define MPI3_PEL_CLASS_INFORMATIONAL                    (0x02)
10822d1d418eSSumit Saxena #define MPI3_PEL_CLASS_WARNING                          (0x03)
10832d1d418eSSumit Saxena #define MPI3_PEL_CLASS_CRITICAL                         (0x04)
10842d1d418eSSumit Saxena #define MPI3_PEL_CLASS_FATAL                            (0x05)
10852d1d418eSSumit Saxena #define MPI3_PEL_CLASS_FAULT                            (0x06)
10862d1d418eSSumit Saxena 
10872d1d418eSSumit Saxena /**** Definitions for the ClearType field ****/
10882d1d418eSSumit Saxena #define MPI3_PEL_CLEARTYPE_CLEAR                        (0x00)
10892d1d418eSSumit Saxena 
10902d1d418eSSumit Saxena /**** Definitions for the WaitTime field ****/
10912d1d418eSSumit Saxena #define MPI3_PEL_WAITTIME_INFINITE_WAIT                 (0x00)
10922d1d418eSSumit Saxena 
10932d1d418eSSumit Saxena /**** Definitions for the Action field ****/
10942d1d418eSSumit Saxena #define MPI3_PEL_ACTION_GET_SEQNUM                      (0x01)
10952d1d418eSSumit Saxena #define MPI3_PEL_ACTION_MARK_CLEAR                      (0x02)
10962d1d418eSSumit Saxena #define MPI3_PEL_ACTION_GET_LOG                         (0x03)
10972d1d418eSSumit Saxena #define MPI3_PEL_ACTION_GET_COUNT                       (0x04)
10982d1d418eSSumit Saxena #define MPI3_PEL_ACTION_WAIT                            (0x05)
10992d1d418eSSumit Saxena #define MPI3_PEL_ACTION_ABORT                           (0x06)
11002d1d418eSSumit Saxena #define MPI3_PEL_ACTION_GET_PRINT_STRINGS               (0x07)
11012d1d418eSSumit Saxena #define MPI3_PEL_ACTION_ACKNOWLEDGE                     (0x08)
11022d1d418eSSumit Saxena 
11032d1d418eSSumit Saxena /**** Definitions for the LogStatus field ****/
11042d1d418eSSumit Saxena #define MPI3_PEL_STATUS_SUCCESS                         (0x00)
11052d1d418eSSumit Saxena #define MPI3_PEL_STATUS_NOT_FOUND                       (0x01)
11062d1d418eSSumit Saxena #define MPI3_PEL_STATUS_ABORTED                         (0x02)
11072d1d418eSSumit Saxena #define MPI3_PEL_STATUS_NOT_READY                       (0x03)
11082d1d418eSSumit Saxena 
11092d1d418eSSumit Saxena /****************************************************************************
11102d1d418eSSumit Saxena  *              PEL Sequence Numbers                                        *
11112d1d418eSSumit Saxena  ****************************************************************************/
11122d1d418eSSumit Saxena typedef struct _MPI3_PEL_SEQ
11132d1d418eSSumit Saxena {
11142d1d418eSSumit Saxena     U32                             Newest;                                   /* 0x00 */
11152d1d418eSSumit Saxena     U32                             Oldest;                                   /* 0x04 */
11162d1d418eSSumit Saxena     U32                             Clear;                                    /* 0x08 */
11172d1d418eSSumit Saxena     U32                             Shutdown;                                 /* 0x0C */
11182d1d418eSSumit Saxena     U32                             Boot;                                     /* 0x10 */
11192d1d418eSSumit Saxena     U32                             LastAcknowledged;                         /* 0x14 */
11202d1d418eSSumit Saxena } MPI3_PEL_SEQ, MPI3_POINTER PTR_MPI3_PEL_SEQ,
11212d1d418eSSumit Saxena   Mpi3PELSeq_t, MPI3_POINTER pMpi3PELSeq_t;
11222d1d418eSSumit Saxena 
11232d1d418eSSumit Saxena /****************************************************************************
11242d1d418eSSumit Saxena  *              PEL Entry                                                   *
11252d1d418eSSumit Saxena  ****************************************************************************/
11262d1d418eSSumit Saxena 
11272d1d418eSSumit Saxena typedef struct _MPI3_PEL_ENTRY
11282d1d418eSSumit Saxena {
11292d1d418eSSumit Saxena     U64                             TimeStamp;                                /* 0x00 */
11302d1d418eSSumit Saxena     U32                             SequenceNumber;                           /* 0x08 */
11312d1d418eSSumit Saxena     U16                             LogCode;                                  /* 0x0C */
11322d1d418eSSumit Saxena     U16                             ArgType;                                  /* 0x0E */
11332d1d418eSSumit Saxena     U16                             Locale;                                   /* 0x10 */
11342d1d418eSSumit Saxena     U8                              Class;                                    /* 0x12 */
11352d1d418eSSumit Saxena     U8                              Flags;                                    /* 0x13 */
11362d1d418eSSumit Saxena     U8                              ExtNum;                                   /* 0x14 */
11372d1d418eSSumit Saxena     U8                              NumExts;                                  /* 0x15 */
11382d1d418eSSumit Saxena     U8                              ArgDataSize;                              /* 0x16 */
11392d1d418eSSumit Saxena     U8                              FixedFormatStringsSize;                   /* 0x17 */
11402d1d418eSSumit Saxena     U32                             Reserved18[2];                            /* 0x18 */
11412d1d418eSSumit Saxena     U32                             PELInfo[24];                              /* 0x20 - 0x7F */
11422d1d418eSSumit Saxena } MPI3_PEL_ENTRY, MPI3_POINTER PTR_MPI3_PEL_ENTRY,
11432d1d418eSSumit Saxena   Mpi3PELEntry_t, MPI3_POINTER pMpi3PELEntry_t;
11442d1d418eSSumit Saxena 
11452d1d418eSSumit Saxena 
11462d1d418eSSumit Saxena /**** Definitions for the Flags field ****/
11472d1d418eSSumit Saxena 
11482d1d418eSSumit Saxena #define MPI3_PEL_FLAGS_COMPLETE_RESET_NEEDED                  (0x02)
11492d1d418eSSumit Saxena #define MPI3_PEL_FLAGS_ACK_NEEDED                             (0x01)
11502d1d418eSSumit Saxena 
11512d1d418eSSumit Saxena /****************************************************************************
11522d1d418eSSumit Saxena  *              PEL Event List                                              *
11532d1d418eSSumit Saxena  ****************************************************************************/
11542d1d418eSSumit Saxena typedef struct _MPI3_PEL_LIST
11552d1d418eSSumit Saxena {
11562d1d418eSSumit Saxena     U32                             LogCount;                                 /* 0x00 */
11572d1d418eSSumit Saxena     U32                             Reserved04;                               /* 0x04 */
11582d1d418eSSumit Saxena     MPI3_PEL_ENTRY                  Entry[1];                                 /* 0x08 */  /* variable length */
11592d1d418eSSumit Saxena } MPI3_PEL_LIST, MPI3_POINTER PTR_MPI3_PEL_LIST,
11602d1d418eSSumit Saxena   Mpi3PELList_t, MPI3_POINTER pMpi3PELList_t;
11612d1d418eSSumit Saxena 
11622d1d418eSSumit Saxena /****************************************************************************
11632d1d418eSSumit Saxena  *              PEL Count Data                                              *
11642d1d418eSSumit Saxena  ****************************************************************************/
11652d1d418eSSumit Saxena typedef U32 MPI3_PEL_LOG_COUNT, MPI3_POINTER PTR_MPI3_PEL_LOG_COUNT,
11662d1d418eSSumit Saxena             Mpi3PELLogCount_t, MPI3_POINTER pMpi3PELLogCount_t;
11672d1d418eSSumit Saxena 
11682d1d418eSSumit Saxena /****************************************************************************
11692d1d418eSSumit Saxena  *              PEL Arg Map                                                 *
11702d1d418eSSumit Saxena  ****************************************************************************/
11712d1d418eSSumit Saxena typedef struct _MPI3_PEL_ARG_MAP
11722d1d418eSSumit Saxena {
11732d1d418eSSumit Saxena     U8                              ArgType;                                 /* 0x00 */
11742d1d418eSSumit Saxena     U8                              Length;                                  /* 0x01 */
11752d1d418eSSumit Saxena     U16                             StartLocation;                           /* 0x02 */
11762d1d418eSSumit Saxena } MPI3_PEL_ARG_MAP, MPI3_POINTER PTR_MPI3_PEL_ARG_MAP,
11772d1d418eSSumit Saxena   Mpi3PELArgMap_t, MPI3_POINTER pMpi3PELArgMap_t;
11782d1d418eSSumit Saxena 
11792d1d418eSSumit Saxena /**** Definitions for the ArgType field ****/
11802d1d418eSSumit Saxena #define MPI3_PEL_ARG_MAP_ARG_TYPE_APPEND_STRING                (0x00)
11812d1d418eSSumit Saxena #define MPI3_PEL_ARG_MAP_ARG_TYPE_INTEGER                      (0x01)
11822d1d418eSSumit Saxena #define MPI3_PEL_ARG_MAP_ARG_TYPE_STRING                       (0x02)
11832d1d418eSSumit Saxena #define MPI3_PEL_ARG_MAP_ARG_TYPE_BIT_FIELD                    (0x03)
11842d1d418eSSumit Saxena 
11852d1d418eSSumit Saxena 
11862d1d418eSSumit Saxena /****************************************************************************
11872d1d418eSSumit Saxena  *              PEL Print String                                            *
11882d1d418eSSumit Saxena  ****************************************************************************/
11892d1d418eSSumit Saxena typedef struct _MPI3_PEL_PRINT_STRING
11902d1d418eSSumit Saxena {
11912d1d418eSSumit Saxena     U16                             LogCode;                                  /* 0x00 */
11922d1d418eSSumit Saxena     U16                             StringLength;                             /* 0x02 */
11932d1d418eSSumit Saxena     U8                              NumArgMap;                                /* 0x04 */
11942d1d418eSSumit Saxena     U8                              Reserved05[3];                            /* 0x05 */
11952d1d418eSSumit Saxena     MPI3_PEL_ARG_MAP                ArgMap[1];                                /* 0x08 */  /* variable length */
11962d1d418eSSumit Saxena     /*                              FormatString - offset must be calculated */           /* variable length */
11972d1d418eSSumit Saxena } MPI3_PEL_PRINT_STRING, MPI3_POINTER PTR_MPI3_PEL_PRINT_STRING,
11982d1d418eSSumit Saxena   Mpi3PELPrintString_t, MPI3_POINTER pMpi3PELPrintString_t;
11992d1d418eSSumit Saxena 
12002d1d418eSSumit Saxena /****************************************************************************
12012d1d418eSSumit Saxena  *              PEL Print String List                                       *
12022d1d418eSSumit Saxena  ****************************************************************************/
12032d1d418eSSumit Saxena typedef struct _MPI3_PEL_PRINT_STRING_LIST
12042d1d418eSSumit Saxena {
12052d1d418eSSumit Saxena     U32                             NumPrintStrings;                           /* 0x00 */
12062d1d418eSSumit Saxena     U32                             ResidualBytesRemain;                       /* 0x04 */
12072d1d418eSSumit Saxena     U32                             Reserved08[2];                             /* 0x08 */
12082d1d418eSSumit Saxena     MPI3_PEL_PRINT_STRING           PrintString[1];                            /* 0x10 */  /* variable length */
12092d1d418eSSumit Saxena } MPI3_PEL_PRINT_STRING_LIST, MPI3_POINTER PTR_MPI3_PEL_PRINT_STRING_LIST,
12102d1d418eSSumit Saxena   Mpi3PELPrintStringList_t, MPI3_POINTER pMpi3PELPrintStringList_t;
12112d1d418eSSumit Saxena 
12122d1d418eSSumit Saxena 
12132d1d418eSSumit Saxena /****************************************************************************
12142d1d418eSSumit Saxena  *              PEL Request Msg - generic to allow header decoding          *
12152d1d418eSSumit Saxena  ****************************************************************************/
12162d1d418eSSumit Saxena #ifndef MPI3_PEL_ACTION_SPECIFIC_MAX
12172d1d418eSSumit Saxena #define MPI3_PEL_ACTION_SPECIFIC_MAX               (1)
12182d1d418eSSumit Saxena #endif  /* MPI3_PEL_ACTION_SPECIFIC_MAX */
12192d1d418eSSumit Saxena 
12202d1d418eSSumit Saxena typedef struct _MPI3_PEL_REQUEST
12212d1d418eSSumit Saxena {
12222d1d418eSSumit Saxena     U16                             HostTag;                                         /* 0x00 */
12232d1d418eSSumit Saxena     U8                              IOCUseOnly02;                                    /* 0x02 */
12242d1d418eSSumit Saxena     U8                              Function;                                        /* 0x03 */
12252d1d418eSSumit Saxena     U16                             IOCUseOnly04;                                    /* 0x04 */
12262d1d418eSSumit Saxena     U8                              IOCUseOnly06;                                    /* 0x06 */
12272d1d418eSSumit Saxena     U8                              MsgFlags;                                        /* 0x07 */
12282d1d418eSSumit Saxena     U16                             ChangeCount;                                     /* 0x08 */
12292d1d418eSSumit Saxena     U8                              Action;                                          /* 0x0A */
12302d1d418eSSumit Saxena     U8                              Reserved0B;                                      /* 0x0B */
12312d1d418eSSumit Saxena     U32                             ActionSpecific[MPI3_PEL_ACTION_SPECIFIC_MAX];    /* 0x0C */  /* variable length */
12322d1d418eSSumit Saxena } MPI3_PEL_REQUEST, MPI3_POINTER PTR_MPI3_PEL_REQUEST,
12332d1d418eSSumit Saxena   Mpi3PELRequest_t, MPI3_POINTER pMpi3PELRequest_t;
12342d1d418eSSumit Saxena 
12352d1d418eSSumit Saxena /****************************************************************************
12362d1d418eSSumit Saxena  *              PEL ACTION Get Sequence Nembers                             *
12372d1d418eSSumit Saxena  ****************************************************************************/
12382d1d418eSSumit Saxena typedef struct _MPI3_PEL_REQ_ACTION_GET_SEQUENCE_NUMBERS
12392d1d418eSSumit Saxena {
12402d1d418eSSumit Saxena     U16                             HostTag;                                  /* 0x00 */
12412d1d418eSSumit Saxena     U8                              IOCUseOnly02;                             /* 0x02 */
12422d1d418eSSumit Saxena     U8                              Function;                                 /* 0x03 */
12432d1d418eSSumit Saxena     U16                             IOCUseOnly04;                             /* 0x04 */
12442d1d418eSSumit Saxena     U8                              IOCUseOnly06;                             /* 0x06 */
12452d1d418eSSumit Saxena     U8                              MsgFlags;                                 /* 0x07 */
12462d1d418eSSumit Saxena     U16                             ChangeCount;                              /* 0x08 */
12472d1d418eSSumit Saxena     U8                              Action;                                   /* 0x0A */
12482d1d418eSSumit Saxena     U8                              Reserved0B;                               /* 0x0B */
12492d1d418eSSumit Saxena     U32                             Reserved0C[5];                            /* 0x0C */
12502d1d418eSSumit Saxena     MPI3_SGE_UNION                  SGL;                                      /* 0x20 */
12512d1d418eSSumit Saxena } MPI3_PEL_REQ_ACTION_GET_SEQUENCE_NUMBERS, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_GET_SEQUENCE_NUMBERS,
12522d1d418eSSumit Saxena   Mpi3PELReqActionGetSequenceNumbers_t, MPI3_POINTER pMpi3PELReqActionGetSequenceNumbers_t;
12532d1d418eSSumit Saxena 
12542d1d418eSSumit Saxena /****************************************************************************
12552d1d418eSSumit Saxena  *              PEL ACTION Clear Log                                        *
12562d1d418eSSumit Saxena  ****************************************************************************/
12572d1d418eSSumit Saxena typedef struct _MPI3_PEL_REQ_ACTION_CLEAR_LOG_MARKER
12582d1d418eSSumit Saxena {
12592d1d418eSSumit Saxena     U16                             HostTag;                                  /* 0x00 */
12602d1d418eSSumit Saxena     U8                              IOCUseOnly02;                             /* 0x02 */
12612d1d418eSSumit Saxena     U8                              Function;                                 /* 0x03 */
12622d1d418eSSumit Saxena     U16                             IOCUseOnly04;                             /* 0x04 */
12632d1d418eSSumit Saxena     U8                              IOCUseOnly06;                             /* 0x06 */
12642d1d418eSSumit Saxena     U8                              MsgFlags;                                 /* 0x07 */
12652d1d418eSSumit Saxena     U16                             ChangeCount;                              /* 0x08 */
12662d1d418eSSumit Saxena     U8                              Action;                                   /* 0x0A */
12672d1d418eSSumit Saxena     U8                              Reserved0B;                               /* 0x0B */
12682d1d418eSSumit Saxena     U8                              ClearType;                                /* 0x0C */
12692d1d418eSSumit Saxena     U8                              Reserved0D[3];                            /* 0x0D */
12702d1d418eSSumit Saxena } MPI3_PEL_REQ_ACTION_CLEAR_LOG_MARKER, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_CLEAR_LOG_MARKER,
12712d1d418eSSumit Saxena   Mpi3PELReqActionClearLogMMarker_t, MPI3_POINTER pMpi3PELReqActionClearLogMMarker_t;
12722d1d418eSSumit Saxena 
12732d1d418eSSumit Saxena /****************************************************************************
12742d1d418eSSumit Saxena  *              PEL ACTION Get Log                                          *
12752d1d418eSSumit Saxena  ****************************************************************************/
12762d1d418eSSumit Saxena typedef struct _MPI3_PEL_REQ_ACTION_GET_LOG
12772d1d418eSSumit Saxena {
12782d1d418eSSumit Saxena     U16                             HostTag;                                  /* 0x00 */
12792d1d418eSSumit Saxena     U8                              IOCUseOnly02;                             /* 0x02 */
12802d1d418eSSumit Saxena     U8                              Function;                                 /* 0x03 */
12812d1d418eSSumit Saxena     U16                             IOCUseOnly04;                             /* 0x04 */
12822d1d418eSSumit Saxena     U8                              IOCUseOnly06;                             /* 0x06 */
12832d1d418eSSumit Saxena     U8                              MsgFlags;                                 /* 0x07 */
12842d1d418eSSumit Saxena     U16                             ChangeCount;                              /* 0x08 */
12852d1d418eSSumit Saxena     U8                              Action;                                   /* 0x0A */
12862d1d418eSSumit Saxena     U8                              Reserved0B;                               /* 0x0B */
12872d1d418eSSumit Saxena     U32                             StartingSequenceNumber;                   /* 0x0C */
12882d1d418eSSumit Saxena     U16                             Locale;                                   /* 0x10 */
12892d1d418eSSumit Saxena     U8                              Class;                                    /* 0x12 */
12902d1d418eSSumit Saxena     U8                              Reserved13;                               /* 0x13 */
12912d1d418eSSumit Saxena     U32                             Reserved14[3];                            /* 0x14 */
12922d1d418eSSumit Saxena     MPI3_SGE_UNION                  SGL;                                      /* 0x20 */
12932d1d418eSSumit Saxena } MPI3_PEL_REQ_ACTION_GET_LOG, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_GET_LOG,
12942d1d418eSSumit Saxena   Mpi3PELReqActionGetLog_t, MPI3_POINTER pMpi3PELReqActionGetLog_t;
12952d1d418eSSumit Saxena 
12962d1d418eSSumit Saxena /****************************************************************************
12972d1d418eSSumit Saxena  *              PEL ACTION Get Count                                        *
12982d1d418eSSumit Saxena  ****************************************************************************/
12992d1d418eSSumit Saxena typedef struct _MPI3_PEL_REQ_ACTION_GET_COUNT
13002d1d418eSSumit Saxena {
13012d1d418eSSumit Saxena     U16                             HostTag;                                  /* 0x00 */
13022d1d418eSSumit Saxena     U8                              IOCUseOnly02;                             /* 0x02 */
13032d1d418eSSumit Saxena     U8                              Function;                                 /* 0x03 */
13042d1d418eSSumit Saxena     U16                             IOCUseOnly04;                             /* 0x04 */
13052d1d418eSSumit Saxena     U8                              IOCUseOnly06;                             /* 0x06 */
13062d1d418eSSumit Saxena     U8                              MsgFlags;                                 /* 0x07 */
13072d1d418eSSumit Saxena     U16                             ChangeCount;                              /* 0x08 */
13082d1d418eSSumit Saxena     U8                              Action;                                   /* 0x0A */
13092d1d418eSSumit Saxena     U8                              Reserved0B;                               /* 0x0B */
13102d1d418eSSumit Saxena     U32                             StartingSequenceNumber;                   /* 0x0C */
13112d1d418eSSumit Saxena     U16                             Locale;                                   /* 0x10 */
13122d1d418eSSumit Saxena     U8                              Class;                                    /* 0x12 */
13132d1d418eSSumit Saxena     U8                              Reserved13;                               /* 0x13 */
13142d1d418eSSumit Saxena     U32                             Reserved14[3];                            /* 0x14 */
13152d1d418eSSumit Saxena     MPI3_SGE_UNION                  SGL;                                      /* 0x20 */
13162d1d418eSSumit Saxena } MPI3_PEL_REQ_ACTION_GET_COUNT, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_GET_COUNT,
13172d1d418eSSumit Saxena   Mpi3PELReqActionGetCount_t, MPI3_POINTER pMpi3PELReqActionGetCount_t;
13182d1d418eSSumit Saxena 
13192d1d418eSSumit Saxena /****************************************************************************
13202d1d418eSSumit Saxena  *              PEL ACTION Wait                                             *
13212d1d418eSSumit Saxena  ****************************************************************************/
13222d1d418eSSumit Saxena typedef struct _MPI3_PEL_REQ_ACTION_WAIT
13232d1d418eSSumit Saxena {
13242d1d418eSSumit Saxena     U16                             HostTag;                                  /* 0x00 */
13252d1d418eSSumit Saxena     U8                              IOCUseOnly02;                             /* 0x02 */
13262d1d418eSSumit Saxena     U8                              Function;                                 /* 0x03 */
13272d1d418eSSumit Saxena     U16                             IOCUseOnly04;                             /* 0x04 */
13282d1d418eSSumit Saxena     U8                              IOCUseOnly06;                             /* 0x06 */
13292d1d418eSSumit Saxena     U8                              MsgFlags;                                 /* 0x07 */
13302d1d418eSSumit Saxena     U16                             ChangeCount;                              /* 0x08 */
13312d1d418eSSumit Saxena     U8                              Action;                                   /* 0x0A */
13322d1d418eSSumit Saxena     U8                              Reserved0B;                               /* 0x0B */
13332d1d418eSSumit Saxena     U32                             StartingSequenceNumber;                   /* 0x0C */
13342d1d418eSSumit Saxena     U16                             Locale;                                   /* 0x10 */
13352d1d418eSSumit Saxena     U8                              Class;                                    /* 0x12 */
13362d1d418eSSumit Saxena     U8                              Reserved13;                               /* 0x13 */
13372d1d418eSSumit Saxena     U16                             WaitTime;                                 /* 0x14 */
13382d1d418eSSumit Saxena     U16                             Reserved16;                               /* 0x16 */
13392d1d418eSSumit Saxena     U32                             Reserved18[2];                            /* 0x18 */
13402d1d418eSSumit Saxena } MPI3_PEL_REQ_ACTION_WAIT, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_WAIT,
13412d1d418eSSumit Saxena   Mpi3PELReqActionWait_t, MPI3_POINTER pMpi3PELReqActionWait_t;
13422d1d418eSSumit Saxena 
13432d1d418eSSumit Saxena /****************************************************************************
13442d1d418eSSumit Saxena  *              PEL ACTION Abort                                            *
13452d1d418eSSumit Saxena  ****************************************************************************/
13462d1d418eSSumit Saxena typedef struct _MPI3_PEL_REQ_ACTION_ABORT
13472d1d418eSSumit Saxena {
13482d1d418eSSumit Saxena     U16                             HostTag;                                  /* 0x00 */
13492d1d418eSSumit Saxena     U8                              IOCUseOnly02;                             /* 0x02 */
13502d1d418eSSumit Saxena     U8                              Function;                                 /* 0x03 */
13512d1d418eSSumit Saxena     U16                             IOCUseOnly04;                             /* 0x04 */
13522d1d418eSSumit Saxena     U8                              IOCUseOnly06;                             /* 0x06 */
13532d1d418eSSumit Saxena     U8                              MsgFlags;                                 /* 0x07 */
13542d1d418eSSumit Saxena     U16                             ChangeCount;                              /* 0x08 */
13552d1d418eSSumit Saxena     U8                              Action;                                   /* 0x0A */
13562d1d418eSSumit Saxena     U8                              Reserved0B;                               /* 0x0B */
13572d1d418eSSumit Saxena     U32                             Reserved0C;                               /* 0x0C */
13582d1d418eSSumit Saxena     U16                             AbortHostTag;                             /* 0x10 */
13592d1d418eSSumit Saxena     U16                             Reserved12;                               /* 0x12 */
13602d1d418eSSumit Saxena     U32                             Reserved14;                               /* 0x14 */
13612d1d418eSSumit Saxena } MPI3_PEL_REQ_ACTION_ABORT, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_ABORT,
13622d1d418eSSumit Saxena   Mpi3PELReqActionAbort_t, MPI3_POINTER pMpi3PELReqActionAbort_t;
13632d1d418eSSumit Saxena 
13642d1d418eSSumit Saxena /****************************************************************************
13652d1d418eSSumit Saxena  *              PEL ACTION Get Print Strings                                *
13662d1d418eSSumit Saxena  ****************************************************************************/
13672d1d418eSSumit Saxena typedef struct _MPI3_PEL_REQ_ACTION_GET_PRINT_STRINGS
13682d1d418eSSumit Saxena {
13692d1d418eSSumit Saxena     U16                             HostTag;                                  /* 0x00 */
13702d1d418eSSumit Saxena     U8                              IOCUseOnly02;                             /* 0x02 */
13712d1d418eSSumit Saxena     U8                              Function;                                 /* 0x03 */
13722d1d418eSSumit Saxena     U16                             IOCUseOnly04;                             /* 0x04 */
13732d1d418eSSumit Saxena     U8                              IOCUseOnly06;                             /* 0x06 */
13742d1d418eSSumit Saxena     U8                              MsgFlags;                                 /* 0x07 */
13752d1d418eSSumit Saxena     U16                             ChangeCount;                              /* 0x08 */
13762d1d418eSSumit Saxena     U8                              Action;                                   /* 0x0A */
13772d1d418eSSumit Saxena     U8                              Reserved0B;                               /* 0x0B */
13782d1d418eSSumit Saxena     U32                             Reserved0C;                               /* 0x0C */
13792d1d418eSSumit Saxena     U16                             StartLogCode;                             /* 0x10 */
13802d1d418eSSumit Saxena     U16                             Reserved12;                               /* 0x12 */
13812d1d418eSSumit Saxena     U32                             Reserved14[3];                            /* 0x14 */
13822d1d418eSSumit Saxena     MPI3_SGE_UNION                  SGL;                                      /* 0x20 */
13832d1d418eSSumit Saxena } MPI3_PEL_REQ_ACTION_GET_PRINT_STRINGS, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_GET_PRINT_STRINGS,
13842d1d418eSSumit Saxena   Mpi3PELReqActionGetPrintStrings_t, MPI3_POINTER pMpi3PELReqActionGetPrintStrings_t;
13852d1d418eSSumit Saxena 
13862d1d418eSSumit Saxena /****************************************************************************
13872d1d418eSSumit Saxena  *              PEL ACTION Acknowledge                                      *
13882d1d418eSSumit Saxena  ****************************************************************************/
13892d1d418eSSumit Saxena typedef struct _MPI3_PEL_REQ_ACTION_ACKNOWLEDGE
13902d1d418eSSumit Saxena {
13912d1d418eSSumit Saxena     U16                             HostTag;                                  /* 0x00 */
13922d1d418eSSumit Saxena     U8                              IOCUseOnly02;                             /* 0x02 */
13932d1d418eSSumit Saxena     U8                              Function;                                 /* 0x03 */
13942d1d418eSSumit Saxena     U16                             IOCUseOnly04;                             /* 0x04 */
13952d1d418eSSumit Saxena     U8                              IOCUseOnly06;                             /* 0x06 */
13962d1d418eSSumit Saxena     U8                              MsgFlags;                                 /* 0x07 */
13972d1d418eSSumit Saxena     U16                             ChangeCount;                              /* 0x08 */
13982d1d418eSSumit Saxena     U8                              Action;                                   /* 0x0A */
13992d1d418eSSumit Saxena     U8                              Reserved0B;                               /* 0x0B */
14002d1d418eSSumit Saxena     U32                             SequenceNumber;                           /* 0x0C */
14012d1d418eSSumit Saxena     U32                             Reserved10;                               /* 0x10 */
14022d1d418eSSumit Saxena } MPI3_PEL_REQ_ACTION_ACKNOWLEDGE, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_ACKNOWLEDGE,
14032d1d418eSSumit Saxena   Mpi3PELReqActionAcknowledge_t, MPI3_POINTER pMpi3PELReqActionAcknowledge_t;
14042d1d418eSSumit Saxena 
14052d1d418eSSumit Saxena /**** Definitions for the MsgFlags field ****/
14062d1d418eSSumit Saxena #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_MASK                     (0x03)
1407*92f340d1SChandrakanth patil #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_SHIFT                    (0)
14082d1d418eSSumit Saxena #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_NO_GUIDANCE              (0x00)
14092d1d418eSSumit Saxena #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_CONTINUE_OP              (0x01)
14102d1d418eSSumit Saxena #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_TRANSITION_TO_FAULT      (0x02)
14112d1d418eSSumit Saxena 
14122d1d418eSSumit Saxena /****************************************************************************
14132d1d418eSSumit Saxena  *              PEL Reply                                                   *
14142d1d418eSSumit Saxena  ****************************************************************************/
14152d1d418eSSumit Saxena typedef struct _MPI3_PEL_REPLY
14162d1d418eSSumit Saxena {
14172d1d418eSSumit Saxena     U16                             HostTag;                                  /* 0x00 */
14182d1d418eSSumit Saxena     U8                              IOCUseOnly02;                             /* 0x02 */
14192d1d418eSSumit Saxena     U8                              Function;                                 /* 0x03 */
14202d1d418eSSumit Saxena     U16                             IOCUseOnly04;                             /* 0x04 */
14212d1d418eSSumit Saxena     U8                              IOCUseOnly06;                             /* 0x06 */
14222d1d418eSSumit Saxena     U8                              MsgFlags;                                 /* 0x07 */
14232d1d418eSSumit Saxena     U16                             IOCUseOnly08;                             /* 0x08 */
14242d1d418eSSumit Saxena     U16                             IOCStatus;                                /* 0x0A */
14252d1d418eSSumit Saxena     U32                             IOCLogInfo;                               /* 0x0C */
14262d1d418eSSumit Saxena     U8                              Action;                                   /* 0x10 */
14272d1d418eSSumit Saxena     U8                              Reserved11;                               /* 0x11 */
14282d1d418eSSumit Saxena     U16                             Reserved12;                               /* 0x12 */
14292d1d418eSSumit Saxena     U16                             PELogStatus;                              /* 0x14 */
14302d1d418eSSumit Saxena     U16                             Reserved16;                               /* 0x16 */
14312d1d418eSSumit Saxena     U32                             TransferLength;                           /* 0x18 */
14322d1d418eSSumit Saxena } MPI3_PEL_REPLY, MPI3_POINTER PTR_MPI3_PEL_REPLY,
14332d1d418eSSumit Saxena   Mpi3PELReply_t, MPI3_POINTER pMpi3PELReply_t;
14342d1d418eSSumit Saxena 
14352d1d418eSSumit Saxena 
14362d1d418eSSumit Saxena /*****************************************************************************
14372d1d418eSSumit Saxena  *              Component Image Download                                     *
14382d1d418eSSumit Saxena  ****************************************************************************/
14392d1d418eSSumit Saxena typedef struct _MPI3_CI_DOWNLOAD_REQUEST
14402d1d418eSSumit Saxena {
14412d1d418eSSumit Saxena     U16                             HostTag;                                  /* 0x00 */
14422d1d418eSSumit Saxena     U8                              IOCUseOnly02;                             /* 0x02 */
14432d1d418eSSumit Saxena     U8                              Function;                                 /* 0x03 */
14442d1d418eSSumit Saxena     U16                             IOCUseOnly04;                             /* 0x04 */
14452d1d418eSSumit Saxena     U8                              IOCUseOnly06;                             /* 0x06 */
14462d1d418eSSumit Saxena     U8                              MsgFlags;                                 /* 0x07 */
14472d1d418eSSumit Saxena     U16                             ChangeCount;                              /* 0x08 */
14482d1d418eSSumit Saxena     U8                              Action;                                   /* 0x0A */
14492d1d418eSSumit Saxena     U8                              Reserved0B;                               /* 0x0B */
14502d1d418eSSumit Saxena     U32                             Signature1;                               /* 0x0C */
14512d1d418eSSumit Saxena     U32                             TotalImageSize;                           /* 0x10 */
14522d1d418eSSumit Saxena     U32                             ImageOffset;                              /* 0x14 */
14532d1d418eSSumit Saxena     U32                             SegmentSize;                              /* 0x18 */
14542d1d418eSSumit Saxena     U32                             Reserved1C;                               /* 0x1C */
14552d1d418eSSumit Saxena     MPI3_SGE_UNION                  SGL;                                      /* 0x20 */
14562d1d418eSSumit Saxena } MPI3_CI_DOWNLOAD_REQUEST, MPI3_POINTER PTR_MPI3_CI_DOWNLOAD_REQUEST,
14572d1d418eSSumit Saxena   Mpi3CIDownloadRequest_t,   MPI3_POINTER pMpi3CIDownloadRequest_t;
14582d1d418eSSumit Saxena 
14592d1d418eSSumit Saxena /**** Definitions for the MsgFlags field ****/
14602d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_MSGFLAGS_LAST_SEGMENT                 (0x80)
14612d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_MSGFLAGS_FORCE_FMC_ENABLE             (0x40)
14622d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_MSGFLAGS_SIGNED_NVDATA                (0x20)
14632d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_MASK       (0x03)
1464*92f340d1SChandrakanth patil #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_SHIFT      (0)
14652d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_FAST       (0x00)
14662d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_MEDIUM     (0x01)
14672d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_SLOW       (0x02)
14682d1d418eSSumit Saxena 
14692d1d418eSSumit Saxena /**** Definitions for the Action field ****/
14702d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_ACTION_DOWNLOAD                       (0x01)
14712d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_ACTION_ONLINE_ACTIVATION              (0x02)
14722d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_ACTION_OFFLINE_ACTIVATION             (0x03)
14732d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_ACTION_GET_STATUS                     (0x04)
14742d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_ACTION_CANCEL_OFFLINE_ACTIVATION      (0x05)
14752d1d418eSSumit Saxena 
14762d1d418eSSumit Saxena typedef struct _MPI3_CI_DOWNLOAD_REPLY
14772d1d418eSSumit Saxena {
14782d1d418eSSumit Saxena     U16                             HostTag;                                  /* 0x00 */
14792d1d418eSSumit Saxena     U8                              IOCUseOnly02;                             /* 0x02 */
14802d1d418eSSumit Saxena     U8                              Function;                                 /* 0x03 */
14812d1d418eSSumit Saxena     U16                             IOCUseOnly04;                             /* 0x04 */
14822d1d418eSSumit Saxena     U8                              IOCUseOnly06;                             /* 0x06 */
14832d1d418eSSumit Saxena     U8                              MsgFlags;                                 /* 0x07 */
14842d1d418eSSumit Saxena     U16                             IOCUseOnly08;                             /* 0x08 */
14852d1d418eSSumit Saxena     U16                             IOCStatus;                                /* 0x0A */
14862d1d418eSSumit Saxena     U32                             IOCLogInfo;                               /* 0x0C */
14872d1d418eSSumit Saxena     U8                              Flags;                                    /* 0x10 */
14882d1d418eSSumit Saxena     U8                              CacheDirty;                               /* 0x11 */
14892d1d418eSSumit Saxena     U8                              PendingCount;                             /* 0x12 */
14902d1d418eSSumit Saxena     U8                              Reserved13;                               /* 0x13 */
14912d1d418eSSumit Saxena } MPI3_CI_DOWNLOAD_REPLY, MPI3_POINTER PTR_MPI3_CI_DOWNLOAD_REPLY,
14922d1d418eSSumit Saxena   Mpi3CIDownloadReply_t,  MPI3_POINTER pMpi3CIDownloadReply_t;
14932d1d418eSSumit Saxena 
14942d1d418eSSumit Saxena /**** Definitions for the Flags field ****/
14952d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_FLAGS_DOWNLOAD_IN_PROGRESS                  (0x80)
14962d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_FAILURE                    (0x40)
14972d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_FLAGS_OFFLINE_ACTIVATION_REQUIRED           (0x20)
14982d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_FLAGS_KEY_UPDATE_PENDING                    (0x10)
14992d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_MASK                (0x0E)
1500*92f340d1SChandrakanth patil #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_SHIFT               (1)
15012d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_NOT_NEEDED          (0x00)
15022d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_AWAITING            (0x02)
15032d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_ONLINE_PENDING      (0x04)
15042d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_OFFLINE_PENDING     (0x06)
15052d1d418eSSumit Saxena #define MPI3_CI_DOWNLOAD_FLAGS_COMPATIBLE                            (0x01)
15062d1d418eSSumit Saxena 
15072d1d418eSSumit Saxena /*****************************************************************************
15082d1d418eSSumit Saxena  *              Component Image Upload                                       *
15092d1d418eSSumit Saxena  ****************************************************************************/
15102d1d418eSSumit Saxena typedef struct _MPI3_CI_UPLOAD_REQUEST
15112d1d418eSSumit Saxena {
15122d1d418eSSumit Saxena     U16                             HostTag;                                  /* 0x00 */
15132d1d418eSSumit Saxena     U8                              IOCUseOnly02;                             /* 0x02 */
15142d1d418eSSumit Saxena     U8                              Function;                                 /* 0x03 */
15152d1d418eSSumit Saxena     U16                             IOCUseOnly04;                             /* 0x04 */
15162d1d418eSSumit Saxena     U8                              IOCUseOnly06;                             /* 0x06 */
15172d1d418eSSumit Saxena     U8                              MsgFlags;                                 /* 0x07 */
15182d1d418eSSumit Saxena     U16                             ChangeCount;                              /* 0x08 */
15192d1d418eSSumit Saxena     U16                             Reserved0A;                               /* 0x0A */
15202d1d418eSSumit Saxena     U32                             Signature1;                               /* 0x0C */
15212d1d418eSSumit Saxena     U32                             Reserved10;                               /* 0x10 */
15222d1d418eSSumit Saxena     U32                             ImageOffset;                              /* 0x14 */
15232d1d418eSSumit Saxena     U32                             SegmentSize;                              /* 0x18 */
15242d1d418eSSumit Saxena     U32                             Reserved1C;                               /* 0x1C */
15252d1d418eSSumit Saxena     MPI3_SGE_UNION                  SGL;                                      /* 0x20 */
15262d1d418eSSumit Saxena } MPI3_CI_UPLOAD_REQUEST, MPI3_POINTER PTR_MPI3_CI_UPLOAD_REQUEST,
15272d1d418eSSumit Saxena   Mpi3CIUploadRequest_t,   MPI3_POINTER pMpi3CIUploadRequest_t;
15282d1d418eSSumit Saxena 
15292d1d418eSSumit Saxena /**** Defines for the MsgFlags field ****/
15302d1d418eSSumit Saxena #define MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_MASK                        (0x01)
1531*92f340d1SChandrakanth patil #define MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_SHIFT                       (0)
15322d1d418eSSumit Saxena #define MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_PRIMARY                     (0x00)
15332d1d418eSSumit Saxena #define MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_SECONDARY                   (0x01)
15342d1d418eSSumit Saxena #define MPI3_CI_UPLOAD_MSGFLAGS_FORMAT_MASK                          (0x02)
1535*92f340d1SChandrakanth patil #define MPI3_CI_UPLOAD_MSGFLAGS_FORMAT_SHIFT                         (1)
15362d1d418eSSumit Saxena #define MPI3_CI_UPLOAD_MSGFLAGS_FORMAT_FLASH                         (0x00)
15372d1d418eSSumit Saxena #define MPI3_CI_UPLOAD_MSGFLAGS_FORMAT_EXECUTABLE                    (0x02)
15382d1d418eSSumit Saxena 
15392d1d418eSSumit Saxena /**** Defines for Signature1 field - use MPI3_IMAGE_HEADER_SIGNATURE1_ defines */
15402d1d418eSSumit Saxena 
15412d1d418eSSumit Saxena /*****************************************************************************
15422d1d418eSSumit Saxena  *              IO Unit Control                                              *
15432d1d418eSSumit Saxena  ****************************************************************************/
15442d1d418eSSumit Saxena 
15452d1d418eSSumit Saxena /**** Definitions for the Operation field ****/
15462d1d418eSSumit Saxena #define MPI3_CTRL_OP_FORCE_FULL_DISCOVERY                            (0x01)
15472d1d418eSSumit Saxena #define MPI3_CTRL_OP_LOOKUP_MAPPING                                  (0x02)
15482d1d418eSSumit Saxena #define MPI3_CTRL_OP_UPDATE_TIMESTAMP                                (0x04)
15492d1d418eSSumit Saxena #define MPI3_CTRL_OP_GET_TIMESTAMP                                   (0x05)
15502d1d418eSSumit Saxena #define MPI3_CTRL_OP_GET_IOC_CHANGE_COUNT                            (0x06)
15512d1d418eSSumit Saxena #define MPI3_CTRL_OP_CHANGE_PROFILE                                  (0x07)
15522d1d418eSSumit Saxena #define MPI3_CTRL_OP_REMOVE_DEVICE                                   (0x10)
15532d1d418eSSumit Saxena #define MPI3_CTRL_OP_CLOSE_PERSISTENT_CONNECTION                     (0x11)
15542d1d418eSSumit Saxena #define MPI3_CTRL_OP_HIDDEN_ACK                                      (0x12)
15552d1d418eSSumit Saxena #define MPI3_CTRL_OP_CLEAR_DEVICE_COUNTERS                           (0x13)
15562d1d418eSSumit Saxena #define MPI3_CTRL_OP_SEND_SAS_PRIMITIVE                              (0x20)
15572d1d418eSSumit Saxena #define MPI3_CTRL_OP_SAS_PHY_CONTROL                                 (0x21)
15582d1d418eSSumit Saxena #define MPI3_CTRL_OP_READ_INTERNAL_BUS                               (0x23)
15592d1d418eSSumit Saxena #define MPI3_CTRL_OP_WRITE_INTERNAL_BUS                              (0x24)
15602d1d418eSSumit Saxena #define MPI3_CTRL_OP_PCIE_LINK_CONTROL                               (0x30)
15612d1d418eSSumit Saxena 
15622d1d418eSSumit Saxena /**** Depending on the Operation selected, the various ParamX fields         *****/
15632d1d418eSSumit Saxena /****  contain defined data values. These indexes help identify those values *****/
15642d1d418eSSumit Saxena #define MPI3_CTRL_OP_LOOKUP_MAPPING_PARAM8_LOOKUP_METHOD_INDEX       (0x00)
15652d1d418eSSumit Saxena #define MPI3_CTRL_OP_UPDATE_TIMESTAMP_PARAM64_TIMESTAMP_INDEX        (0x00)
15662d1d418eSSumit Saxena #define MPI3_CTRL_OP_CHANGE_PROFILE_PARAM8_PROFILE_ID_INDEX          (0x00)
15672d1d418eSSumit Saxena #define MPI3_CTRL_OP_REMOVE_DEVICE_PARAM16_DEVHANDLE_INDEX           (0x00)
15682d1d418eSSumit Saxena #define MPI3_CTRL_OP_CLOSE_PERSIST_CONN_PARAM16_DEVHANDLE_INDEX      (0x00)
15692d1d418eSSumit Saxena #define MPI3_CTRL_OP_HIDDEN_ACK_PARAM16_DEVHANDLE_INDEX              (0x00)
15702d1d418eSSumit Saxena #define MPI3_CTRL_OP_CLEAR_DEVICE_COUNTERS_PARAM16_DEVHANDLE_INDEX   (0x00)
15712d1d418eSSumit Saxena #define MPI3_CTRL_OP_SEND_SAS_PRIM_PARAM8_PHY_INDEX                  (0x00)
15722d1d418eSSumit Saxena #define MPI3_CTRL_OP_SEND_SAS_PRIM_PARAM8_PRIMSEQ_INDEX              (0x01)
15732d1d418eSSumit Saxena #define MPI3_CTRL_OP_SEND_SAS_PRIM_PARAM32_PRIMITIVE_INDEX           (0x00)
15742d1d418eSSumit Saxena #define MPI3_CTRL_OP_SAS_PHY_CONTROL_PARAM8_ACTION_INDEX             (0x00)
15752d1d418eSSumit Saxena #define MPI3_CTRL_OP_SAS_PHY_CONTROL_PARAM8_PHY_INDEX                (0x01)
15762d1d418eSSumit Saxena #define MPI3_CTRL_OP_READ_INTERNAL_BUS_PARAM64_ADDRESS_INDEX         (0x00)
15772d1d418eSSumit Saxena #define MPI3_CTRL_OP_WRITE_INTERNAL_BUS_PARAM64_ADDRESS_INDEX        (0x00)
15782d1d418eSSumit Saxena #define MPI3_CTRL_OP_WRITE_INTERNAL_BUS_PARAM32_VALUE_INDEX          (0x00)
15792d1d418eSSumit Saxena #define MPI3_CTRL_OP_PCIE_LINK_CONTROL_PARAM8_ACTION_INDEX           (0x00)
15802d1d418eSSumit Saxena #define MPI3_CTRL_OP_PCIE_LINK_CONTROL_PARAM8_LINK_INDEX             (0x01)
15812d1d418eSSumit Saxena 
15822d1d418eSSumit Saxena /**** Definitions for the LookupMethod field in LOOKUP_MAPPING reqs ****/
15832d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_WWID_ADDRESS                         (0x01)
15842d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_ENCLOSURE_SLOT                       (0x02)
15852d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_SAS_DEVICE_NAME                      (0x03)
15862d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_PERSISTENT_ID                        (0x04)
15872d1d418eSSumit Saxena 
15882d1d418eSSumit Saxena /**** Definitions for IoUnitControl Lookup Mapping Method Parameters ****/
15892d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_WWIDADDR_PARAM16_DEVH_INDEX             (0)
15902d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_WWIDADDR_PARAM64_WWID_INDEX             (0)
15912d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_ENCLSLOT_PARAM16_SLOTNUM_INDEX          (0)
15922d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_ENCLSLOT_PARAM64_ENCLOSURELID_INDEX     (0)
15932d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_SASDEVNAME_PARAM16_DEVH_INDEX           (0)
15942d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_SASDEVNAME_PARAM64_DEVNAME_INDEX        (0)
15952d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_PERSISTID_PARAM16_DEVH_INDEX            (0)
15962d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_PERSISTID_PARAM16_PERSISTENT_ID_INDEX   (1)
15972d1d418eSSumit Saxena 
15982d1d418eSSumit Saxena /*** Definitions for IoUnitControl Reply fields ****/
15992d1d418eSSumit Saxena #define MPI3_CTRL_LOOKUP_METHOD_VALUE16_DEVH_INDEX                      (0)
16002d1d418eSSumit Saxena #define MPI3_CTRL_GET_TIMESTAMP_VALUE64_TIMESTAMP_INDEX                 (0)
16012d1d418eSSumit Saxena #define MPI3_CTRL_GET_IOC_CHANGE_COUNT_VALUE16_CHANGECOUNT_INDEX        (0)
16022d1d418eSSumit Saxena #define MPI3_CTRL_READ_INTERNAL_BUS_VALUE32_VALUE_INDEX                 (0)
16032d1d418eSSumit Saxena 
16042d1d418eSSumit Saxena /**** Definitions for the PrimSeq field in SEND_SAS_PRIMITIVE reqs ****/
16052d1d418eSSumit Saxena #define MPI3_CTRL_PRIMFLAGS_SINGLE                                   (0x01)
16062d1d418eSSumit Saxena #define MPI3_CTRL_PRIMFLAGS_TRIPLE                                   (0x03)
16072d1d418eSSumit Saxena #define MPI3_CTRL_PRIMFLAGS_REDUNDANT                                (0x06)
16082d1d418eSSumit Saxena 
16092d1d418eSSumit Saxena /**** Definitions for the Action field in PCIE_LINK_CONTROL  and SAS_PHY_CONTROL reqs ****/
16102d1d418eSSumit Saxena #define MPI3_CTRL_ACTION_NOP                                         (0x00)
16112d1d418eSSumit Saxena #define MPI3_CTRL_ACTION_LINK_RESET                                  (0x01)
16122d1d418eSSumit Saxena #define MPI3_CTRL_ACTION_HARD_RESET                                  (0x02)
16132d1d418eSSumit Saxena #define MPI3_CTRL_ACTION_CLEAR_ERROR_LOG                             (0x05)
16142d1d418eSSumit Saxena 
16152d1d418eSSumit Saxena typedef struct _MPI3_IOUNIT_CONTROL_REQUEST
16162d1d418eSSumit Saxena {
16172d1d418eSSumit Saxena     U16                             HostTag;                                  /* 0x00 */
16182d1d418eSSumit Saxena     U8                              IOCUseOnly02;                             /* 0x02 */
16192d1d418eSSumit Saxena     U8                              Function;                                 /* 0x03 */
16202d1d418eSSumit Saxena     U16                             IOCUseOnly04;                             /* 0x04 */
16212d1d418eSSumit Saxena     U8                              IOCUseOnly06;                             /* 0x06 */
16222d1d418eSSumit Saxena     U8                              MsgFlags;                                 /* 0x07 */
16232d1d418eSSumit Saxena     U16                             ChangeCount;                              /* 0x08 */
16242d1d418eSSumit Saxena     U8                              Reserved0A;                               /* 0x0A */
16252d1d418eSSumit Saxena     U8                              Operation;                                /* 0x0B */
16262d1d418eSSumit Saxena     U32                             Reserved0C;                               /* 0x0C */
16272d1d418eSSumit Saxena     U64                             Param64[2];                               /* 0x10 */
16282d1d418eSSumit Saxena     U32                             Param32[4];                               /* 0x20 */
16292d1d418eSSumit Saxena     U16                             Param16[4];                               /* 0x30 */
16302d1d418eSSumit Saxena     U8                              Param8[8];                                /* 0x38 */
16312d1d418eSSumit Saxena } MPI3_IOUNIT_CONTROL_REQUEST, MPI3_POINTER PTR_MPI3_IOUNIT_CONTROL_REQUEST,
16322d1d418eSSumit Saxena   Mpi3IoUnitControlRequest_t, MPI3_POINTER pMpi3IoUnitControlRequest_t;
16332d1d418eSSumit Saxena 
16342d1d418eSSumit Saxena 
16352d1d418eSSumit Saxena typedef struct _MPI3_IOUNIT_CONTROL_REPLY
16362d1d418eSSumit Saxena {
16372d1d418eSSumit Saxena     U16                             HostTag;                                  /* 0x00 */
16382d1d418eSSumit Saxena     U8                              IOCUseOnly02;                             /* 0x02 */
16392d1d418eSSumit Saxena     U8                              Function;                                 /* 0x03 */
16402d1d418eSSumit Saxena     U16                             IOCUseOnly04;                             /* 0x04 */
16412d1d418eSSumit Saxena     U8                              IOCUseOnly06;                             /* 0x06 */
16422d1d418eSSumit Saxena     U8                              MsgFlags;                                 /* 0x07 */
16432d1d418eSSumit Saxena     U16                             IOCUseOnly08;                             /* 0x08 */
16442d1d418eSSumit Saxena     U16                             IOCStatus;                                /* 0x0A */
16452d1d418eSSumit Saxena     U32                             IOCLogInfo;                               /* 0x0C */
16462d1d418eSSumit Saxena     U64                             Value64[2];                               /* 0x10 */
16472d1d418eSSumit Saxena     U32                             Value32[4];                               /* 0x20 */
16482d1d418eSSumit Saxena     U16                             Value16[4];                               /* 0x30 */
16492d1d418eSSumit Saxena     U8                              Value8[8];                                /* 0x38 */
16502d1d418eSSumit Saxena } MPI3_IOUNIT_CONTROL_REPLY, MPI3_POINTER PTR_MPI3_IOUNIT_CONTROL_REPLY,
16512d1d418eSSumit Saxena   Mpi3IoUnitControlReply_t, MPI3_POINTER pMpi3IoUnitControlReply_t;
16522d1d418eSSumit Saxena 
16532d1d418eSSumit Saxena #endif  /* MPI30_IOC_H */
16542d1d418eSSumit Saxena 
16552d1d418eSSumit Saxena 
1656