xref: /freebsd/sys/dev/mpi3mr/mpi/mpi30_image.h (revision 92f340d137ba5d6db7610ba1dae35842e2c9c8ea)
12d1d418eSSumit Saxena /*
2baabb919SChandrakanth patil  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
32d1d418eSSumit Saxena  *
4*92f340d1SChandrakanth patil  * Copyright (c) 2016-2025, Broadcom Inc. All rights reserved.
52d1d418eSSumit Saxena  * Support: <fbsd-storage-driver.pdl@broadcom.com>
62d1d418eSSumit Saxena  *
72d1d418eSSumit Saxena  * Redistribution and use in source and binary forms, with or without
82d1d418eSSumit Saxena  * modification, are permitted provided that the following conditions are
92d1d418eSSumit Saxena  * met:
102d1d418eSSumit Saxena  *
112d1d418eSSumit Saxena  * 1. Redistributions of source code must retain the above copyright notice,
122d1d418eSSumit Saxena  *    this list of conditions and the following disclaimer.
132d1d418eSSumit Saxena  * 2. Redistributions in binary form must reproduce the above copyright notice,
142d1d418eSSumit Saxena  *    this list of conditions and the following disclaimer in the documentation and/or other
152d1d418eSSumit Saxena  *    materials provided with the distribution.
162d1d418eSSumit Saxena  * 3. Neither the name of the Broadcom Inc. nor the names of its contributors
172d1d418eSSumit Saxena  *    may be used to endorse or promote products derived from this software without
182d1d418eSSumit Saxena  *    specific prior written permission.
192d1d418eSSumit Saxena  *
202d1d418eSSumit Saxena  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
212d1d418eSSumit Saxena  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
222d1d418eSSumit Saxena  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
232d1d418eSSumit Saxena  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
242d1d418eSSumit Saxena  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
252d1d418eSSumit Saxena  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
262d1d418eSSumit Saxena  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
272d1d418eSSumit Saxena  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
282d1d418eSSumit Saxena  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
292d1d418eSSumit Saxena  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
302d1d418eSSumit Saxena  * POSSIBILITY OF SUCH DAMAGE.
312d1d418eSSumit Saxena  *
322d1d418eSSumit Saxena  * The views and conclusions contained in the software and documentation are
332d1d418eSSumit Saxena  * those of the authors and should not be interpreted as representing
342d1d418eSSumit Saxena  * official policies,either expressed or implied, of the FreeBSD Project.
352d1d418eSSumit Saxena  *
362d1d418eSSumit Saxena  * Mail to: Broadcom Inc 1320 Ridder Park Dr, San Jose, CA 95131
372d1d418eSSumit Saxena  *
382d1d418eSSumit Saxena  * Broadcom Inc. (Broadcom) MPI3MR Adapter FreeBSD
392d1d418eSSumit Saxena  *
402d1d418eSSumit Saxena  */
41*92f340d1SChandrakanth patil 
422d1d418eSSumit Saxena #ifndef MPI30_IMAGE_H
432d1d418eSSumit Saxena #define MPI30_IMAGE_H     1
442d1d418eSSumit Saxena 
452d1d418eSSumit Saxena /* Component Image Version */
462d1d418eSSumit Saxena typedef struct _MPI3_COMP_IMAGE_VERSION
472d1d418eSSumit Saxena {
482d1d418eSSumit Saxena     U16     BuildNum;            /* 0x00 */
492d1d418eSSumit Saxena     U16     CustomerID;          /* 0x02 */
502d1d418eSSumit Saxena     U8      PhaseMinor;          /* 0x04 */
512d1d418eSSumit Saxena     U8      PhaseMajor;          /* 0x05 */
522d1d418eSSumit Saxena     U8      GenMinor;            /* 0x06 */
532d1d418eSSumit Saxena     U8      GenMajor;            /* 0x07 */
542d1d418eSSumit Saxena } MPI3_COMP_IMAGE_VERSION, MPI3_POINTER PTR_MPI3_COMP_IMAGE_VERSION,
552d1d418eSSumit Saxena   Mpi3CompImageVersion_t, MPI3_POINTER pMpi3CompImageVersion_t;
562d1d418eSSumit Saxena 
572d1d418eSSumit Saxena /* Hash Exclusion Format */
582d1d418eSSumit Saxena typedef struct _MPI3_HASH_EXCLUSION_FORMAT
592d1d418eSSumit Saxena {
602d1d418eSSumit Saxena     U32                     Offset;        /* 0x00 */
612d1d418eSSumit Saxena     U32                     Size;          /* 0x04 */
622d1d418eSSumit Saxena } MPI3_HASH_EXCLUSION_FORMAT, MPI3_POINTER PTR_MPI3_HASH_EXCLUSION_FORMAT,
632d1d418eSSumit Saxena Mpi3HashSxclusionFormat_t, MPI3_POINTER pMpi3HashExclusionFormat_t;
642d1d418eSSumit Saxena 
652d1d418eSSumit Saxena #define MPI3_IMAGE_HASH_EXCUSION_NUM                           (4)
662d1d418eSSumit Saxena 
672d1d418eSSumit Saxena /* FW Image Header */
682d1d418eSSumit Saxena typedef struct _MPI3_COMPONENT_IMAGE_HEADER
692d1d418eSSumit Saxena {
702d1d418eSSumit Saxena     U32                            Signature0;                                      /* 0x00 */
712d1d418eSSumit Saxena     U32                            LoadAddress;                                     /* 0x04 */
722d1d418eSSumit Saxena     U32                            DataSize;                                        /* 0x08 */
732d1d418eSSumit Saxena     U32                            StartOffset;                                     /* 0x0C */
742d1d418eSSumit Saxena     U32                            Signature1;                                      /* 0x10 */
752d1d418eSSumit Saxena     U32                            FlashOffset;                                     /* 0x14 */
762d1d418eSSumit Saxena     U32                            ImageSize;                                       /* 0x18 */
772d1d418eSSumit Saxena     U32                            VersionStringOffset;                             /* 0x1C */
782d1d418eSSumit Saxena     U32                            BuildDateStringOffset;                           /* 0x20 */
792d1d418eSSumit Saxena     U32                            BuildTimeStringOffset;                           /* 0x24 */
802d1d418eSSumit Saxena     U32                            EnvironmentVariableOffset;                       /* 0x28 */
812d1d418eSSumit Saxena     U32                            ApplicationSpecific;                             /* 0x2C */
822d1d418eSSumit Saxena     U32                            Signature2;                                      /* 0x30 */
832d1d418eSSumit Saxena     U32                            HeaderSize;                                      /* 0x34 */
842d1d418eSSumit Saxena     U32                            Crc;                                             /* 0x38 */
852d1d418eSSumit Saxena     U32                            Flags;                                           /* 0x3C */
862d1d418eSSumit Saxena     U32                            SecondaryFlashOffset;                            /* 0x40 */
872d1d418eSSumit Saxena     U32                            ETPOffset;                                       /* 0x44 */
882d1d418eSSumit Saxena     U32                            ETPSize;                                         /* 0x48 */
892d1d418eSSumit Saxena     MPI3_VERSION_UNION             RMCInterfaceVersion;                             /* 0x4C */
902d1d418eSSumit Saxena     MPI3_VERSION_UNION             ETPInterfaceVersion;                             /* 0x50 */
912d1d418eSSumit Saxena     MPI3_COMP_IMAGE_VERSION        ComponentImageVersion;                           /* 0x54 */
922d1d418eSSumit Saxena     MPI3_HASH_EXCLUSION_FORMAT     HashExclusion[MPI3_IMAGE_HASH_EXCUSION_NUM];     /* 0x5C */
932d1d418eSSumit Saxena     U32                            NextImageHeaderOffset;                           /* 0x7C */
942d1d418eSSumit Saxena     MPI3_VERSION_UNION             SecurityVersion;                                 /* 0x80 */
952d1d418eSSumit Saxena     U32                            Reserved84[31];                                  /* 0x84 -- 0xFC */
962d1d418eSSumit Saxena } MPI3_COMPONENT_IMAGE_HEADER, MPI3_POINTER PTR_MPI3_COMPONENT_IMAGE_HEADER,
972d1d418eSSumit Saxena   Mpi3ComponentImageHeader_t, MPI3_POINTER pMpi3ComponentImageHeader_t;
982d1d418eSSumit Saxena 
992d1d418eSSumit Saxena 
1002d1d418eSSumit Saxena /**** Definitions for Signature0 field ****/
1012d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIGNATURE0_MPI3                     (0xEB00003E)
1022d1d418eSSumit Saxena 
1032d1d418eSSumit Saxena /**** Definitions for LoadAddress field ****/
1042d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_LOAD_ADDRESS_INVALID                (0x00000000)
1052d1d418eSSumit Saxena 
1062d1d418eSSumit Saxena /**** Definitions for Signature1 field ****/
1072d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIGNATURE1_APPLICATION              (0x20505041)  /* string "APP "  */
1082d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIGNATURE1_FIRST_MUTABLE            (0x20434D46)  /* string "FMC "  */
1092d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIGNATURE1_BSP                      (0x20505342)  /* string "BSP "  */
1102d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIGNATURE1_ROM_BIOS                 (0x534F4942)  /* string "BIOS"  */
1112d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIGNATURE1_HII_X64                  (0x4D494948)  /* string "HIIM"  */
1122d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIGNATURE1_HII_ARM                  (0x41494948)  /* string "HIIA"  */
1132d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIGNATURE1_CPLD                     (0x444C5043)  /* string "CPLD"  */
1142d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIGNATURE1_SPD                      (0x20445053)  /* string "SPD "  */
1152d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIGNATURE1_GAS_GAUGE                (0x20534147)  /* string "GAS "  */
1162d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIGNATURE1_PBLP                     (0x504C4250)  /* string "PBLP"  */
1172d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIGNATURE1_MANIFEST                 (0x464E414D)  /* string "MANF"  */
1182d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIGNATURE1_OEM                      (0x204D454F)  /* string "OEM "  */
1192d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIGNATURE1_RMC                      (0x20434D52)  /* string "RMC "  */
1202d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIGNATURE1_SMM                      (0x204D4D53)  /* string "SMM "  */
1212d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIGNATURE1_PSW                      (0x20575350)  /* string "PSW "  */
122baabb919SChandrakanth patil #define MPI3_IMAGE_HEADER_SIGNATURE1_CSW                      (0x20575343)  /* string "CSW "  */
1232d1d418eSSumit Saxena 
1242d1d418eSSumit Saxena /**** Definitions for Signature2 field ****/
1252d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIGNATURE2_VALUE                    (0x50584546)
1262d1d418eSSumit Saxena 
1272d1d418eSSumit Saxena /**** Definitions for Flags field ****/
128baabb919SChandrakanth patil #define MPI3_IMAGE_HEADER_FLAGS_SIGNED_UEFI_MASK              (0x00000300)
129*92f340d1SChandrakanth patil #define MPI3_IMAGE_HEADER_FLAGS_SIGNED_UEFI_SHIFT             (8)
130baabb919SChandrakanth patil #define MPI3_IMAGE_HEADER_FLAGS_SIGNED_UEFI_UNSPECIFIED       (0x00000000)
131baabb919SChandrakanth patil #define MPI3_IMAGE_HEADER_FLAGS_SIGNED_UEFI_NOT_SIGNED        (0x00000100)
132baabb919SChandrakanth patil #define MPI3_IMAGE_HEADER_FLAGS_SIGNED_UEFI_MICROSOFT_SIGNED  (0x00000200)
133baabb919SChandrakanth patil #define MPI3_IMAGE_HEADER_FLAGS_CERT_CHAIN_FORMAT_MASK        (0x000000C0)
134*92f340d1SChandrakanth patil #define MPI3_IMAGE_HEADER_FLAGS_CERT_CHAIN_FORMAT_SHIFT       (6)
135baabb919SChandrakanth patil #define MPI3_IMAGE_HEADER_FLAGS_CERT_CHAIN_FORMAT_DEVICE_CERT (0x00000000)
136baabb919SChandrakanth patil #define MPI3_IMAGE_HEADER_FLAGS_CERT_CHAIN_FORMAT_ALIAS_CERT  (0x00000040)
1372d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_FLAGS_DEVICE_KEY_BASIS_MASK         (0x00000030)
138*92f340d1SChandrakanth patil #define MPI3_IMAGE_HEADER_FLAGS_DEVICE_KEY_BASIS_SHIFT        (4)
1392d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_FLAGS_DEVICE_KEY_BASIS_CDI          (0x00000000)
1402d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_FLAGS_DEVICE_KEY_BASIS_DI           (0x00000010)
1412d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_FLAGS_SIGNED_NVDATA                 (0x00000008)
1422d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_FLAGS_REQUIRES_ACTIVATION           (0x00000004)
1432d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_FLAGS_COMPRESSED                    (0x00000002)
1442d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_FLAGS_FLASH                         (0x00000001)
1452d1d418eSSumit Saxena 
1462d1d418eSSumit Saxena 
1472d1d418eSSumit Saxena /**** Offsets for Image Header Fields ****/
1482d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIGNATURE0_OFFSET                   (0x00)
1492d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_LOAD_ADDRESS_OFFSET                 (0x04)
1502d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_DATA_SIZE_OFFSET                    (0x08)
1512d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_START_OFFSET_OFFSET                 (0x0C)
1522d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIGNATURE1_OFFSET                   (0x10)
1532d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_FLASH_OFFSET_OFFSET                 (0x14)
1542d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_FLASH_SIZE_OFFSET                   (0x18)
1552d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_VERSION_STRING_OFFSET_OFFSET        (0x1C)
1562d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_BUILD_DATE_STRING_OFFSET_OFFSET     (0x20)
1572d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_BUILD_TIME_OFFSET_OFFSET            (0x24)
1582d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_ENVIROMENT_VAR_OFFSET_OFFSET        (0x28)
1592d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_APPLICATION_SPECIFIC_OFFSET         (0x2C)
1602d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIGNATURE2_OFFSET                   (0x30)
1612d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_HEADER_SIZE_OFFSET                  (0x34)
1622d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_CRC_OFFSET                          (0x38)
1632d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_FLAGS_OFFSET                        (0x3C)
1642d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SECONDARY_FLASH_OFFSET_OFFSET       (0x40)
1652d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_ETP_OFFSET_OFFSET                   (0x44)
1662d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_ETP_SIZE_OFFSET                     (0x48)
1672d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_RMC_INTERFACE_VER_OFFSET            (0x4C)
1682d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_ETP_INTERFACE_VER_OFFSET            (0x50)
1692d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_COMPONENT_IMAGE_VER_OFFSET          (0x54)
1702d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_HASH_EXCLUSION_OFFSET               (0x5C)
1712d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_NEXT_IMAGE_HEADER_OFFSET_OFFSET     (0x7C)
1722d1d418eSSumit Saxena 
1732d1d418eSSumit Saxena 
1742d1d418eSSumit Saxena #define MPI3_IMAGE_HEADER_SIZE                                (0x100)
1752d1d418eSSumit Saxena 
1762d1d418eSSumit Saxena 
1772d1d418eSSumit Saxena 
1782d1d418eSSumit Saxena /*****************************************************************************
1792d1d418eSSumit Saxena  *              Component Image Data                                         *
1802d1d418eSSumit Saxena  *****************************************************************************/
1812d1d418eSSumit Saxena 
1822d1d418eSSumit Saxena /* Package Manifest Data */
1832d1d418eSSumit Saxena 
1842d1d418eSSumit Saxena #ifndef MPI3_CI_MANIFEST_MPI_MAX
1852d1d418eSSumit Saxena #define MPI3_CI_MANIFEST_MPI_MAX                               (1)
1862d1d418eSSumit Saxena #endif  /* MPI3_CI_MANIFEST_MPI_MAX */
1872d1d418eSSumit Saxena 
1882d1d418eSSumit Saxena typedef struct _MPI3_CI_MANIFEST_MPI_COMP_IMAGE_REF
1892d1d418eSSumit Saxena {
1902d1d418eSSumit Saxena     U32                                Signature1;                                    /* 0x00 */
1912d1d418eSSumit Saxena     U32                                Reserved04[3];                                 /* 0x04 */
1922d1d418eSSumit Saxena     MPI3_COMP_IMAGE_VERSION            ComponentImageVersion;                         /* 0x10 */
1932d1d418eSSumit Saxena     U32                                ComponentImageVersionStringOffset;             /* 0x18 */
1942d1d418eSSumit Saxena     U32                                CRC;                                           /* 0x1C */
1952d1d418eSSumit Saxena } MPI3_CI_MANIFEST_MPI_COMP_IMAGE_REF, MPI3_POINTER PTR_MPI3_CI_MANIFEST_MPI_COMP_IMAGE_REF,
1962d1d418eSSumit Saxena   Mpi3CIManifestMpiCompImageRef_t, MPI3_POINTER pMpi3CIManifestMpiCompImageRef_t;
1972d1d418eSSumit Saxena 
1982d1d418eSSumit Saxena typedef struct _MPI3_CI_MANIFEST_MPI
1992d1d418eSSumit Saxena {
2002d1d418eSSumit Saxena     U8                                    ManifestType;                                  /* 0x00 */
2012d1d418eSSumit Saxena     U8                                    Reserved01[3];                                 /* 0x01 */
2022d1d418eSSumit Saxena     U32                                   Reserved04[3];                                 /* 0x04 */
2032d1d418eSSumit Saxena     U8                                    NumImageReferences;                            /* 0x10 */
2042d1d418eSSumit Saxena     U8                                    ReleaseLevel;                                  /* 0x11 */
2052d1d418eSSumit Saxena     U16                                   Reserved12;                                    /* 0x12 */
2062d1d418eSSumit Saxena     U16                                   Reserved14;                                    /* 0x14 */
2072d1d418eSSumit Saxena     U16                                   Flags;                                         /* 0x16 */
2082d1d418eSSumit Saxena     U32                                   Reserved18[2];                                 /* 0x18 */
2092d1d418eSSumit Saxena     U16                                   VendorID;                                      /* 0x20 */
2102d1d418eSSumit Saxena     U16                                   DeviceID;                                      /* 0x22 */
2112d1d418eSSumit Saxena     U16                                   SubsystemVendorID;                             /* 0x24 */
2122d1d418eSSumit Saxena     U16                                   SubsystemID;                                   /* 0x26 */
2132d1d418eSSumit Saxena     U32                                   Reserved28[2];                                 /* 0x28 */
2142d1d418eSSumit Saxena     MPI3_VERSION_UNION                    PackageSecurityVersion;                        /* 0x30 */
2152d1d418eSSumit Saxena     U32                                   Reserved34;                                    /* 0x34 */
2162d1d418eSSumit Saxena     MPI3_COMP_IMAGE_VERSION               PackageVersion;                                /* 0x38 */
2172d1d418eSSumit Saxena     U32                                   PackageVersionStringOffset;                    /* 0x40 */
2182d1d418eSSumit Saxena     U32                                   PackageBuildDateStringOffset;                  /* 0x44 */
2192d1d418eSSumit Saxena     U32                                   PackageBuildTimeStringOffset;                  /* 0x48 */
2202d1d418eSSumit Saxena     U32                                   Reserved4C;                                    /* 0x4C */
2212d1d418eSSumit Saxena     U32                                   DiagAuthorizationIdentifier[16];               /* 0x50 */
2222d1d418eSSumit Saxena     MPI3_CI_MANIFEST_MPI_COMP_IMAGE_REF   ComponentImageRef[MPI3_CI_MANIFEST_MPI_MAX];   /* 0x90 */    /* variable length */
2232d1d418eSSumit Saxena     /*                                    StringData - offset of this field must be calculated   */    /* variable length */
2242d1d418eSSumit Saxena } MPI3_CI_MANIFEST_MPI, MPI3_POINTER PTR_MPI3_CI_MANIFEST_MPI,
2252d1d418eSSumit Saxena   Mpi3CIManifestMpi_t, MPI3_POINTER pMpi3CIManifestMpi_t;
2262d1d418eSSumit Saxena 
2272d1d418eSSumit Saxena /* defines for the ReleaseLevel field */
2282d1d418eSSumit Saxena #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_DEV                        (0x00)
229baabb919SChandrakanth patil #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_PRE_PRODUCTION             (0x08)
2302d1d418eSSumit Saxena #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_PREALPHA                   (0x10)
2312d1d418eSSumit Saxena #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_ALPHA                      (0x20)
2322d1d418eSSumit Saxena #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_BETA                       (0x30)
2332d1d418eSSumit Saxena #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_RC                         (0x40)
2342d1d418eSSumit Saxena #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_GCA                        (0x50)
2352d1d418eSSumit Saxena #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_POINT                      (0x60)
236baabb919SChandrakanth patil #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_DIAG                       (0xF0)
2372d1d418eSSumit Saxena 
2382d1d418eSSumit Saxena /* defines for the Flags field */
2392d1d418eSSumit Saxena #define MPI3_CI_MANIFEST_MPI_FLAGS_DIAG_AUTHORIZATION                 (0x01)
2402d1d418eSSumit Saxena 
2412d1d418eSSumit Saxena /* defines for the SubsystemID field */
2422d1d418eSSumit Saxena #define MPI3_CI_MANIFEST_MPI_SUBSYSTEMID_IGNORED                   (0xFFFF)
2432d1d418eSSumit Saxena 
2442d1d418eSSumit Saxena /* defines for the PackageVersionStringOffset field */
2452d1d418eSSumit Saxena #define MPI3_CI_MANIFEST_MPI_PKG_VER_STR_OFF_UNSPECIFIED           (0x00000000)
2462d1d418eSSumit Saxena 
2472d1d418eSSumit Saxena /* defines for the PackageBuildDateStringOffset field */
2482d1d418eSSumit Saxena #define MPI3_CI_MANIFEST_MPI_PKG_BUILD_DATE_STR_OFF_UNSPECIFIED    (0x00000000)
2492d1d418eSSumit Saxena 
2502d1d418eSSumit Saxena /* defines for the PackageBuildTimeStringOffset field */
2512d1d418eSSumit Saxena #define MPI3_CI_MANIFEST_MPI_PKG_BUILD_TIME_STR_OFF_UNSPECIFIED    (0x00000000)
2522d1d418eSSumit Saxena 
2532d1d418eSSumit Saxena typedef union _MPI3_CI_MANIFEST
2542d1d418eSSumit Saxena {
2552d1d418eSSumit Saxena     MPI3_CI_MANIFEST_MPI               Mpi;
2562d1d418eSSumit Saxena     U32                                Dword[1];
2572d1d418eSSumit Saxena } MPI3_CI_MANIFEST, MPI3_POINTER PTR_MPI3_CI_MANIFEST,
2582d1d418eSSumit Saxena   Mpi3CIManifest_t, MPI3_POINTER pMpi3CIManifest_t;
2592d1d418eSSumit Saxena 
2602d1d418eSSumit Saxena /* defines for ManifestType field */
2612d1d418eSSumit Saxena #define MPI3_CI_MANIFEST_TYPE_MPI                                  (0x00)
2622d1d418eSSumit Saxena 
2632d1d418eSSumit Saxena 
2642d1d418eSSumit Saxena /*****************************************************************************
2652d1d418eSSumit Saxena  *              Extended Image Data                                          *
2662d1d418eSSumit Saxena  *****************************************************************************/
2672d1d418eSSumit Saxena 
2682d1d418eSSumit Saxena /* Extended Image Header */
2692d1d418eSSumit Saxena typedef struct _MPI3_EXTENDED_IMAGE_HEADER
2702d1d418eSSumit Saxena {
2712d1d418eSSumit Saxena     U8                             ImageType;                   /* 0x00 */
2722d1d418eSSumit Saxena     U8                             Reserved01[3];               /* 0x01 */
2732d1d418eSSumit Saxena     U32                            Checksum;                    /* 0x04 */
2742d1d418eSSumit Saxena     U32                            ImageSize;                   /* 0x08 */
2752d1d418eSSumit Saxena     U32                            NextImageHeaderOffset;       /* 0x0C */
2762d1d418eSSumit Saxena     U32                            Reserved10[4];               /* 0x10 */
2772d1d418eSSumit Saxena     U32                            IdentifyString[8];           /* 0x20 */
2782d1d418eSSumit Saxena } MPI3_EXTENDED_IMAGE_HEADER, MPI3_POINTER PTR_MPI3_EXTENDED_IMAGE_HEADER,
2792d1d418eSSumit Saxena   Mpi3ExtendedImageHeader_t, MPI3_POINTER pMpi3ExtendedImageHeader_t;
2802d1d418eSSumit Saxena 
2812d1d418eSSumit Saxena /* useful offsets */
2822d1d418eSSumit Saxena #define MPI3_EXT_IMAGE_IMAGETYPE_OFFSET         (0x00)
2832d1d418eSSumit Saxena #define MPI3_EXT_IMAGE_IMAGESIZE_OFFSET         (0x08)
2842d1d418eSSumit Saxena #define MPI3_EXT_IMAGE_NEXTIMAGE_OFFSET         (0x0C)
2852d1d418eSSumit Saxena 
2862d1d418eSSumit Saxena #define MPI3_EXT_IMAGE_HEADER_SIZE              (0x40)
2872d1d418eSSumit Saxena 
2882d1d418eSSumit Saxena /* defines for the ImageType field */
2892d1d418eSSumit Saxena #define MPI3_EXT_IMAGE_TYPE_UNSPECIFIED             (0x00)
2902d1d418eSSumit Saxena #define MPI3_EXT_IMAGE_TYPE_NVDATA                  (0x03)
2912d1d418eSSumit Saxena #define MPI3_EXT_IMAGE_TYPE_SUPPORTED_DEVICES       (0x07)
2922d1d418eSSumit Saxena #define MPI3_EXT_IMAGE_TYPE_ENCRYPTED_HASH          (0x09)
2932d1d418eSSumit Saxena #define MPI3_EXT_IMAGE_TYPE_RDE                     (0x0A)
2942d1d418eSSumit Saxena #define MPI3_EXT_IMAGE_TYPE_AUXILIARY_PROCESSOR     (0x0B)
2952d1d418eSSumit Saxena #define MPI3_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC    (0x80)
2962d1d418eSSumit Saxena #define MPI3_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC    (0xFF)
2972d1d418eSSumit Saxena 
2982d1d418eSSumit Saxena 
2992d1d418eSSumit Saxena /* Supported Device Data Format */
3002d1d418eSSumit Saxena typedef struct _MPI3_SUPPORTED_DEVICE
3012d1d418eSSumit Saxena {
3022d1d418eSSumit Saxena     U16                     DeviceID;                   /* 0x00 */
3032d1d418eSSumit Saxena     U16                     VendorID;                   /* 0x02 */
3042d1d418eSSumit Saxena     U16                     DeviceIDMask;               /* 0x04 */
3052d1d418eSSumit Saxena     U16                     Reserved06;                 /* 0x06 */
3062d1d418eSSumit Saxena     U8                      LowPCIRev;                  /* 0x08 */
3072d1d418eSSumit Saxena     U8                      HighPCIRev;                 /* 0x09 */
3082d1d418eSSumit Saxena     U16                     Reserved0A;                 /* 0x0A */
3092d1d418eSSumit Saxena     U32                     Reserved0C;                 /* 0x0C */
3102d1d418eSSumit Saxena } MPI3_SUPPORTED_DEVICE, MPI3_POINTER PTR_MPI3_SUPPORTED_DEVICE,
3112d1d418eSSumit Saxena   Mpi3SupportedDevice_t, MPI3_POINTER pMpi3SupportedDevice_t;
3122d1d418eSSumit Saxena 
3132d1d418eSSumit Saxena #ifndef MPI3_SUPPORTED_DEVICE_MAX
3142d1d418eSSumit Saxena #define MPI3_SUPPORTED_DEVICE_MAX                      (1)
3152d1d418eSSumit Saxena #endif  /* MPI3_SUPPORTED_DEVICE_MAX */
3162d1d418eSSumit Saxena 
3172d1d418eSSumit Saxena /* Supported Devices Extended Image Data */
3182d1d418eSSumit Saxena typedef struct _MPI3_SUPPORTED_DEVICES_DATA
3192d1d418eSSumit Saxena {
3202d1d418eSSumit Saxena     U8                      ImageVersion;                                   /* 0x00 */
3212d1d418eSSumit Saxena     U8                      Reserved01;                                     /* 0x01 */
3222d1d418eSSumit Saxena     U8                      NumDevices;                                     /* 0x02 */
3232d1d418eSSumit Saxena     U8                      Reserved03;                                     /* 0x03 */
3242d1d418eSSumit Saxena     U32                     Reserved04;                                     /* 0x04 */
3252d1d418eSSumit Saxena     MPI3_SUPPORTED_DEVICE   SupportedDevice[MPI3_SUPPORTED_DEVICE_MAX];     /* 0x08 */    /* variable length */
3262d1d418eSSumit Saxena } MPI3_SUPPORTED_DEVICES_DATA, MPI3_POINTER PTR_MPI3_SUPPORTED_DEVICES_DATA,
3272d1d418eSSumit Saxena   Mpi3SupportedDevicesData_t, MPI3_POINTER pMpi3SupportedDevicesData_t;
3282d1d418eSSumit Saxena 
329baabb919SChandrakanth patil #ifndef MPI3_PUBLIC_KEY_MAX
330baabb919SChandrakanth patil #define MPI3_PUBLIC_KEY_MAX                          (1)
331baabb919SChandrakanth patil #endif  /* MPI3_PUBLIC_KEY_MAX */
3322d1d418eSSumit Saxena 
3332d1d418eSSumit Saxena /* Encrypted Hash Entry Format */
3342d1d418eSSumit Saxena typedef struct _MPI3_ENCRYPTED_HASH_ENTRY
3352d1d418eSSumit Saxena {
3362d1d418eSSumit Saxena     U8                      HashImageType;                                  /* 0x00 */
3372d1d418eSSumit Saxena     U8                      HashAlgorithm;                                  /* 0x01 */
3382d1d418eSSumit Saxena     U8                      EncryptionAlgorithm;                            /* 0x02 */
339*92f340d1SChandrakanth patil     U8                      Flags;                                          /* 0x03 */
340baabb919SChandrakanth patil     U16                     PublicKeySize;                                  /* 0x04 */
341baabb919SChandrakanth patil     U16                     SignatureSize;                                  /* 0x06 */
342baabb919SChandrakanth patil     U32                     PublicKey[MPI3_PUBLIC_KEY_MAX];                 /* 0x08 */     /* variable length */
343baabb919SChandrakanth patil     /*                      Signature     - offset of this field must be calculated */     /* variable length */
3442d1d418eSSumit Saxena } MPI3_ENCRYPTED_HASH_ENTRY, MPI3_POINTER PTR_MPI3_ENCRYPTED_HASH_ENTRY,
3452d1d418eSSumit Saxena   Mpi3EncryptedHashEntry_t, MPI3_POINTER pMpi3EncryptedHashEntry_t;
3462d1d418eSSumit Saxena 
3472d1d418eSSumit Saxena 
3482d1d418eSSumit Saxena /* defines for the HashImageType field */
349*92f340d1SChandrakanth patil #define MPI3_HASH_IMAGE_TYPE_KEY_WITH_HASH           (0x03)
350*92f340d1SChandrakanth patil #define MPI3_HASH_IMAGE_TYPE_KEY_WITH_HASH_1_OF_2    (0x04)
351*92f340d1SChandrakanth patil #define MPI3_HASH_IMAGE_TYPE_KEY_WITH_HASH_2_OF_2    (0x05)
3522d1d418eSSumit Saxena 
3532d1d418eSSumit Saxena /* defines for the HashAlgorithm field */
3542d1d418eSSumit Saxena #define MPI3_HASH_ALGORITHM_VERSION_MASK             (0xE0)
355*92f340d1SChandrakanth patil #define MPI3_HASH_ALGORITHM_VERSION_SHIFT            (5)
3562d1d418eSSumit Saxena #define MPI3_HASH_ALGORITHM_VERSION_NONE             (0x00)
3572d1d418eSSumit Saxena #define MPI3_HASH_ALGORITHM_VERSION_SHA1             (0x20)   /* Obsolete */
3582d1d418eSSumit Saxena #define MPI3_HASH_ALGORITHM_VERSION_SHA2             (0x40)
3592d1d418eSSumit Saxena #define MPI3_HASH_ALGORITHM_VERSION_SHA3             (0x60)
3602d1d418eSSumit Saxena 
3612d1d418eSSumit Saxena #define MPI3_HASH_ALGORITHM_SIZE_MASK                (0x1F)
362*92f340d1SChandrakanth patil #define MPI3_HASH_ALGORITHM_SIZE_SHIFT               (0)
3632d1d418eSSumit Saxena #define MPI3_HASH_ALGORITHM_SIZE_UNUSED              (0x00)
3642d1d418eSSumit Saxena #define MPI3_HASH_ALGORITHM_SIZE_SHA256              (0x01)
3652d1d418eSSumit Saxena #define MPI3_HASH_ALGORITHM_SIZE_SHA512              (0x02)
3662d1d418eSSumit Saxena #define MPI3_HASH_ALGORITHM_SIZE_SHA384              (0x03)
3672d1d418eSSumit Saxena 
3682d1d418eSSumit Saxena /* defines for the EncryptionAlgorithm field */
3692d1d418eSSumit Saxena #define MPI3_ENCRYPTION_ALGORITHM_UNUSED             (0x00)
3702d1d418eSSumit Saxena #define MPI3_ENCRYPTION_ALGORITHM_RSA256             (0x01)   /* Obsolete */
3712d1d418eSSumit Saxena #define MPI3_ENCRYPTION_ALGORITHM_RSA512             (0x02)   /* Obsolete */
3722d1d418eSSumit Saxena #define MPI3_ENCRYPTION_ALGORITHM_RSA1024            (0x03)   /* Obsolete */
3732d1d418eSSumit Saxena #define MPI3_ENCRYPTION_ALGORITHM_RSA2048            (0x04)
3742d1d418eSSumit Saxena #define MPI3_ENCRYPTION_ALGORITHM_RSA4096            (0x05)
3752d1d418eSSumit Saxena #define MPI3_ENCRYPTION_ALGORITHM_RSA3072            (0x06)
3762d1d418eSSumit Saxena #define MPI3_ENCRYPTION_ALGORITHM_ECDSA_P256         (0x07)   /* NIST secp256r1 curve */
3772d1d418eSSumit Saxena #define MPI3_ENCRYPTION_ALGORITHM_ECDSA_P384         (0x08)   /* NIST secp384r1 curve */
3782d1d418eSSumit Saxena #define MPI3_ENCRYPTION_ALGORITHM_ECDSA_P521         (0x09)   /* NIST secp521r1 curve */
379*92f340d1SChandrakanth patil #define MPI3_ENCRYPTION_ALGORITHM_LMS_HSS            (0x0A)   /* Leighton-Micali Signature (LMS) */
380*92f340d1SChandrakanth patil 							      /* Hierarchical Signature System (HSS) */
381*92f340d1SChandrakanth patil #define MPI3_ENCRYPTION_ALGORITHM_ML_DSA_87          (0x0B)   /* Module-Lattice-Based Sig Algo - Category 5 */
382*92f340d1SChandrakanth patil #define MPI3_ENCRYPTION_ALGORITHM_ML_DSA_65          (0x0C)   /* Module-Lattice-Based Sig Algo - Category 3 */
383*92f340d1SChandrakanth patil #define MPI3_ENCRYPTION_ALGORITHM_ML_DSA_44          (0x0D)   /* Module-Lattice-Based Sig Algo - Category 2 */
384*92f340d1SChandrakanth patil 
385*92f340d1SChandrakanth patil /* defines for the Flags field */
386*92f340d1SChandrakanth patil #define MPI3_ENCRYPTED_HASH_ENTRY_FLAGS_PAIRED_KEY_MASK   (0x0F)
387*92f340d1SChandrakanth patil #define MPI3_ENCRYPTED_HASH_ENTRY_FLAGS_PAIRED_KEY_SHIFT  (0)
3882d1d418eSSumit Saxena 
3892d1d418eSSumit Saxena #ifndef MPI3_ENCRYPTED_HASH_ENTRY_MAX
3902d1d418eSSumit Saxena #define MPI3_ENCRYPTED_HASH_ENTRY_MAX               (1)
3912d1d418eSSumit Saxena #endif  /* MPI3_ENCRYPTED_HASH_ENTRY_MAX */
3922d1d418eSSumit Saxena 
3932d1d418eSSumit Saxena /* Encrypted Hash Image Data */
3942d1d418eSSumit Saxena typedef struct _MPI3_ENCRYPTED_HASH_DATA
3952d1d418eSSumit Saxena {
3962d1d418eSSumit Saxena     U8                               ImageVersion;                                          /* 0x00 */
3972d1d418eSSumit Saxena     U8                               NumHash;                                               /* 0x01 */
3982d1d418eSSumit Saxena     U16                              Reserved02;                                            /* 0x02 */
3992d1d418eSSumit Saxena     U32                              Reserved04;                                            /* 0x04 */
4002d1d418eSSumit Saxena     MPI3_ENCRYPTED_HASH_ENTRY        EncryptedHashEntry[MPI3_ENCRYPTED_HASH_ENTRY_MAX];     /* 0x08 */   /* variable length */
4012d1d418eSSumit Saxena } MPI3_ENCRYPTED_HASH_DATA, MPI3_POINTER PTR_MPI3_ENCRYPTED_HASH_DATA,
4022d1d418eSSumit Saxena   Mpi3EncryptedHashData_t, MPI3_POINTER pMpi3EncryptedHashData_t;
4032d1d418eSSumit Saxena 
4042d1d418eSSumit Saxena 
4052d1d418eSSumit Saxena #ifndef MPI3_AUX_PROC_DATA_MAX
4062d1d418eSSumit Saxena #define MPI3_AUX_PROC_DATA_MAX               (1)
4072d1d418eSSumit Saxena #endif  /* MPI3_ENCRYPTED_HASH_ENTRY_MAX */
4082d1d418eSSumit Saxena 
4092d1d418eSSumit Saxena /* Auxiliary Processor Extended Image Data */
4102d1d418eSSumit Saxena typedef struct _MPI3_AUX_PROCESSOR_DATA
4112d1d418eSSumit Saxena {
4122d1d418eSSumit Saxena     U8                      BootMethod;                               /* 0x00 */
4132d1d418eSSumit Saxena     U8                      NumLoadAddr;                              /* 0x01 */
4142d1d418eSSumit Saxena     U8                      Reserved02;                               /* 0x02 */
4152d1d418eSSumit Saxena     U8                      Type;                                     /* 0x03 */
4162d1d418eSSumit Saxena     U32                     Version;                                  /* 0x04 */
4172d1d418eSSumit Saxena     U32                     LoadAddress[8];                           /* 0x08 */
4182d1d418eSSumit Saxena     U32                     Reserved28[22];                           /* 0x28 */
4192d1d418eSSumit Saxena     U32                     AuxProcessorData[MPI3_AUX_PROC_DATA_MAX]; /* 0x80 */   /* variable length */
4202d1d418eSSumit Saxena } MPI3_AUX_PROCESSOR_DATA, MPI3_POINTER PTR_MPI3_AUX_PROCESSOR_DATA,
4212d1d418eSSumit Saxena   Mpi3AuxProcessorData_t, MPI3_POINTER pMpi3AuxProcessorData_t;
4222d1d418eSSumit Saxena 
4232d1d418eSSumit Saxena #define MPI3_AUX_PROC_DATA_OFFSET                                     (0x80)
4242d1d418eSSumit Saxena 
4252d1d418eSSumit Saxena /* defines for the BootMethod field */
4262d1d418eSSumit Saxena #define MPI3_AUXPROCESSOR_BOOT_METHOD_MO_MSG                          (0x00)
4272d1d418eSSumit Saxena #define MPI3_AUXPROCESSOR_BOOT_METHOD_MO_DOORBELL                     (0x01)
4282d1d418eSSumit Saxena #define MPI3_AUXPROCESSOR_BOOT_METHOD_COMPONENT                       (0x02)
4292d1d418eSSumit Saxena 
4302d1d418eSSumit Saxena /* defines for the Type field */
4312d1d418eSSumit Saxena #define MPI3_AUXPROCESSOR_TYPE_ARM_A15                                (0x00)
4322d1d418eSSumit Saxena #define MPI3_AUXPROCESSOR_TYPE_ARM_M0                                 (0x01)
4332d1d418eSSumit Saxena #define MPI3_AUXPROCESSOR_TYPE_ARM_R4                                 (0x02)
4342d1d418eSSumit Saxena 
4352d1d418eSSumit Saxena #endif /* MPI30_IMAGE_H */
436